kvm_book3s_64.h 4.2 KB

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  1. /*
  2. * This program is free software; you can redistribute it and/or modify
  3. * it under the terms of the GNU General Public License, version 2, as
  4. * published by the Free Software Foundation.
  5. *
  6. * This program is distributed in the hope that it will be useful,
  7. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  8. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  9. * GNU General Public License for more details.
  10. *
  11. * You should have received a copy of the GNU General Public License
  12. * along with this program; if not, write to the Free Software
  13. * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
  14. *
  15. * Copyright SUSE Linux Products GmbH 2010
  16. *
  17. * Authors: Alexander Graf <agraf@suse.de>
  18. */
  19. #ifndef __ASM_KVM_BOOK3S_64_H__
  20. #define __ASM_KVM_BOOK3S_64_H__
  21. #ifdef CONFIG_KVM_BOOK3S_PR
  22. static inline struct kvmppc_book3s_shadow_vcpu *svcpu_get(struct kvm_vcpu *vcpu)
  23. {
  24. preempt_disable();
  25. return &get_paca()->shadow_vcpu;
  26. }
  27. static inline void svcpu_put(struct kvmppc_book3s_shadow_vcpu *svcpu)
  28. {
  29. preempt_enable();
  30. }
  31. #endif
  32. #define SPAPR_TCE_SHIFT 12
  33. #ifdef CONFIG_KVM_BOOK3S_64_HV
  34. /* For now use fixed-size 16MB page table */
  35. #define HPT_ORDER 24
  36. #define HPT_NPTEG (1ul << (HPT_ORDER - 7)) /* 128B per pteg */
  37. #define HPT_NPTE (HPT_NPTEG << 3) /* 8 PTEs per PTEG */
  38. #define HPT_HASH_MASK (HPT_NPTEG - 1)
  39. #endif
  40. /*
  41. * We use a lock bit in HPTE dword 0 to synchronize updates and
  42. * accesses to each HPTE, and another bit to indicate non-present
  43. * HPTEs.
  44. */
  45. #define HPTE_V_HVLOCK 0x40UL
  46. static inline long try_lock_hpte(unsigned long *hpte, unsigned long bits)
  47. {
  48. unsigned long tmp, old;
  49. asm volatile(" ldarx %0,0,%2\n"
  50. " and. %1,%0,%3\n"
  51. " bne 2f\n"
  52. " ori %0,%0,%4\n"
  53. " stdcx. %0,0,%2\n"
  54. " beq+ 2f\n"
  55. " li %1,%3\n"
  56. "2: isync"
  57. : "=&r" (tmp), "=&r" (old)
  58. : "r" (hpte), "r" (bits), "i" (HPTE_V_HVLOCK)
  59. : "cc", "memory");
  60. return old == 0;
  61. }
  62. static inline unsigned long compute_tlbie_rb(unsigned long v, unsigned long r,
  63. unsigned long pte_index)
  64. {
  65. unsigned long rb, va_low;
  66. rb = (v & ~0x7fUL) << 16; /* AVA field */
  67. va_low = pte_index >> 3;
  68. if (v & HPTE_V_SECONDARY)
  69. va_low = ~va_low;
  70. /* xor vsid from AVA */
  71. if (!(v & HPTE_V_1TB_SEG))
  72. va_low ^= v >> 12;
  73. else
  74. va_low ^= v >> 24;
  75. va_low &= 0x7ff;
  76. if (v & HPTE_V_LARGE) {
  77. rb |= 1; /* L field */
  78. if (cpu_has_feature(CPU_FTR_ARCH_206) &&
  79. (r & 0xff000)) {
  80. /* non-16MB large page, must be 64k */
  81. /* (masks depend on page size) */
  82. rb |= 0x1000; /* page encoding in LP field */
  83. rb |= (va_low & 0x7f) << 16; /* 7b of VA in AVA/LP field */
  84. rb |= (va_low & 0xfe); /* AVAL field (P7 doesn't seem to care) */
  85. }
  86. } else {
  87. /* 4kB page */
  88. rb |= (va_low & 0x7ff) << 12; /* remaining 11b of VA */
  89. }
  90. rb |= (v >> 54) & 0x300; /* B field */
  91. return rb;
  92. }
  93. static inline unsigned long hpte_page_size(unsigned long h, unsigned long l)
  94. {
  95. /* only handle 4k, 64k and 16M pages for now */
  96. if (!(h & HPTE_V_LARGE))
  97. return 1ul << 12; /* 4k page */
  98. if ((l & 0xf000) == 0x1000 && cpu_has_feature(CPU_FTR_ARCH_206))
  99. return 1ul << 16; /* 64k page */
  100. if ((l & 0xff000) == 0)
  101. return 1ul << 24; /* 16M page */
  102. return 0; /* error */
  103. }
  104. static inline int hpte_cache_flags_ok(unsigned long ptel, unsigned long io_type)
  105. {
  106. unsigned int wimg = ptel & HPTE_R_WIMG;
  107. /* Handle SAO */
  108. if (wimg == (HPTE_R_W | HPTE_R_I | HPTE_R_M) &&
  109. cpu_has_feature(CPU_FTR_ARCH_206))
  110. wimg = HPTE_R_M;
  111. if (!io_type)
  112. return wimg == HPTE_R_M;
  113. return (wimg & (HPTE_R_W | HPTE_R_I)) == io_type;
  114. }
  115. /* Return HPTE cache control bits corresponding to Linux pte bits */
  116. static inline unsigned long hpte_cache_bits(unsigned long pte_val)
  117. {
  118. #if _PAGE_NO_CACHE == HPTE_R_I && _PAGE_WRITETHRU == HPTE_R_W
  119. return pte_val & (HPTE_R_W | HPTE_R_I);
  120. #else
  121. return ((pte_val & _PAGE_NO_CACHE) ? HPTE_R_I : 0) +
  122. ((pte_val & _PAGE_WRITETHRU) ? HPTE_R_W : 0);
  123. #endif
  124. }
  125. static inline bool slot_is_aligned(struct kvm_memory_slot *memslot,
  126. unsigned long pagesize)
  127. {
  128. unsigned long mask = (pagesize >> PAGE_SHIFT) - 1;
  129. if (pagesize <= PAGE_SIZE)
  130. return 1;
  131. return !(memslot->base_gfn & mask) && !(memslot->npages & mask);
  132. }
  133. #endif /* __ASM_KVM_BOOK3S_64_H__ */