setup_64.c 16 KB

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  1. /*
  2. *
  3. * Common boot and setup code.
  4. *
  5. * Copyright (C) 2001 PPC64 Team, IBM Corp
  6. *
  7. * This program is free software; you can redistribute it and/or
  8. * modify it under the terms of the GNU General Public License
  9. * as published by the Free Software Foundation; either version
  10. * 2 of the License, or (at your option) any later version.
  11. */
  12. #undef DEBUG
  13. #include <linux/module.h>
  14. #include <linux/string.h>
  15. #include <linux/sched.h>
  16. #include <linux/init.h>
  17. #include <linux/kernel.h>
  18. #include <linux/reboot.h>
  19. #include <linux/delay.h>
  20. #include <linux/initrd.h>
  21. #include <linux/seq_file.h>
  22. #include <linux/ioport.h>
  23. #include <linux/console.h>
  24. #include <linux/utsname.h>
  25. #include <linux/tty.h>
  26. #include <linux/root_dev.h>
  27. #include <linux/notifier.h>
  28. #include <linux/cpu.h>
  29. #include <linux/unistd.h>
  30. #include <linux/serial.h>
  31. #include <linux/serial_8250.h>
  32. #include <linux/bootmem.h>
  33. #include <linux/pci.h>
  34. #include <linux/lockdep.h>
  35. #include <linux/memblock.h>
  36. #include <asm/io.h>
  37. #include <asm/kdump.h>
  38. #include <asm/prom.h>
  39. #include <asm/processor.h>
  40. #include <asm/pgtable.h>
  41. #include <asm/smp.h>
  42. #include <asm/elf.h>
  43. #include <asm/machdep.h>
  44. #include <asm/paca.h>
  45. #include <asm/time.h>
  46. #include <asm/cputable.h>
  47. #include <asm/sections.h>
  48. #include <asm/btext.h>
  49. #include <asm/nvram.h>
  50. #include <asm/setup.h>
  51. #include <asm/system.h>
  52. #include <asm/rtas.h>
  53. #include <asm/iommu.h>
  54. #include <asm/serial.h>
  55. #include <asm/cache.h>
  56. #include <asm/page.h>
  57. #include <asm/mmu.h>
  58. #include <asm/firmware.h>
  59. #include <asm/xmon.h>
  60. #include <asm/udbg.h>
  61. #include <asm/kexec.h>
  62. #include <asm/mmu_context.h>
  63. #include "setup.h"
  64. #ifdef DEBUG
  65. #define DBG(fmt...) udbg_printf(fmt)
  66. #else
  67. #define DBG(fmt...)
  68. #endif
  69. int boot_cpuid = 0;
  70. int __initdata boot_cpu_count;
  71. u64 ppc64_pft_size;
  72. /* Pick defaults since we might want to patch instructions
  73. * before we've read this from the device tree.
  74. */
  75. struct ppc64_caches ppc64_caches = {
  76. .dline_size = 0x40,
  77. .log_dline_size = 6,
  78. .iline_size = 0x40,
  79. .log_iline_size = 6
  80. };
  81. EXPORT_SYMBOL_GPL(ppc64_caches);
  82. /*
  83. * These are used in binfmt_elf.c to put aux entries on the stack
  84. * for each elf executable being started.
  85. */
  86. int dcache_bsize;
  87. int icache_bsize;
  88. int ucache_bsize;
  89. #ifdef CONFIG_SMP
  90. static char *smt_enabled_cmdline;
  91. /* Look for ibm,smt-enabled OF option */
  92. static void check_smt_enabled(void)
  93. {
  94. struct device_node *dn;
  95. const char *smt_option;
  96. /* Default to enabling all threads */
  97. smt_enabled_at_boot = threads_per_core;
  98. /* Allow the command line to overrule the OF option */
  99. if (smt_enabled_cmdline) {
  100. if (!strcmp(smt_enabled_cmdline, "on"))
  101. smt_enabled_at_boot = threads_per_core;
  102. else if (!strcmp(smt_enabled_cmdline, "off"))
  103. smt_enabled_at_boot = 0;
  104. else {
  105. long smt;
  106. int rc;
  107. rc = strict_strtol(smt_enabled_cmdline, 10, &smt);
  108. if (!rc)
  109. smt_enabled_at_boot =
  110. min(threads_per_core, (int)smt);
  111. }
  112. } else {
  113. dn = of_find_node_by_path("/options");
  114. if (dn) {
  115. smt_option = of_get_property(dn, "ibm,smt-enabled",
  116. NULL);
  117. if (smt_option) {
  118. if (!strcmp(smt_option, "on"))
  119. smt_enabled_at_boot = threads_per_core;
  120. else if (!strcmp(smt_option, "off"))
  121. smt_enabled_at_boot = 0;
  122. }
  123. of_node_put(dn);
  124. }
  125. }
  126. }
  127. /* Look for smt-enabled= cmdline option */
  128. static int __init early_smt_enabled(char *p)
  129. {
  130. smt_enabled_cmdline = p;
  131. return 0;
  132. }
  133. early_param("smt-enabled", early_smt_enabled);
  134. #else
  135. #define check_smt_enabled()
  136. #endif /* CONFIG_SMP */
  137. /*
  138. * Early initialization entry point. This is called by head.S
  139. * with MMU translation disabled. We rely on the "feature" of
  140. * the CPU that ignores the top 2 bits of the address in real
  141. * mode so we can access kernel globals normally provided we
  142. * only toy with things in the RMO region. From here, we do
  143. * some early parsing of the device-tree to setup out MEMBLOCK
  144. * data structures, and allocate & initialize the hash table
  145. * and segment tables so we can start running with translation
  146. * enabled.
  147. *
  148. * It is this function which will call the probe() callback of
  149. * the various platform types and copy the matching one to the
  150. * global ppc_md structure. Your platform can eventually do
  151. * some very early initializations from the probe() routine, but
  152. * this is not recommended, be very careful as, for example, the
  153. * device-tree is not accessible via normal means at this point.
  154. */
  155. void __init early_setup(unsigned long dt_ptr)
  156. {
  157. /* -------- printk is _NOT_ safe to use here ! ------- */
  158. /* Identify CPU type */
  159. identify_cpu(0, mfspr(SPRN_PVR));
  160. /* Assume we're on cpu 0 for now. Don't write to the paca yet! */
  161. initialise_paca(&boot_paca, 0);
  162. setup_paca(&boot_paca);
  163. /* Initialize lockdep early or else spinlocks will blow */
  164. lockdep_init();
  165. /* -------- printk is now safe to use ------- */
  166. /* Enable early debugging if any specified (see udbg.h) */
  167. udbg_early_init();
  168. DBG(" -> early_setup(), dt_ptr: 0x%lx\n", dt_ptr);
  169. /*
  170. * Do early initialization using the flattened device
  171. * tree, such as retrieving the physical memory map or
  172. * calculating/retrieving the hash table size.
  173. */
  174. early_init_devtree(__va(dt_ptr));
  175. /* Now we know the logical id of our boot cpu, setup the paca. */
  176. setup_paca(&paca[boot_cpuid]);
  177. /* Fix up paca fields required for the boot cpu */
  178. get_paca()->cpu_start = 1;
  179. /* Probe the machine type */
  180. probe_machine();
  181. setup_kdump_trampoline();
  182. DBG("Found, Initializing memory management...\n");
  183. /* Initialize the hash table or TLB handling */
  184. early_init_mmu();
  185. DBG(" <- early_setup()\n");
  186. }
  187. #ifdef CONFIG_SMP
  188. void early_setup_secondary(void)
  189. {
  190. /* Mark interrupts enabled in PACA */
  191. get_paca()->soft_enabled = 0;
  192. /* Initialize the hash table or TLB handling */
  193. early_init_mmu_secondary();
  194. }
  195. #endif /* CONFIG_SMP */
  196. #if defined(CONFIG_SMP) || defined(CONFIG_KEXEC)
  197. void smp_release_cpus(void)
  198. {
  199. unsigned long *ptr;
  200. int i;
  201. DBG(" -> smp_release_cpus()\n");
  202. /* All secondary cpus are spinning on a common spinloop, release them
  203. * all now so they can start to spin on their individual paca
  204. * spinloops. For non SMP kernels, the secondary cpus never get out
  205. * of the common spinloop.
  206. */
  207. ptr = (unsigned long *)((unsigned long)&__secondary_hold_spinloop
  208. - PHYSICAL_START);
  209. *ptr = __pa(generic_secondary_smp_init);
  210. /* And wait a bit for them to catch up */
  211. for (i = 0; i < 100000; i++) {
  212. mb();
  213. HMT_low();
  214. if (boot_cpu_count == 0)
  215. break;
  216. udelay(1);
  217. }
  218. DBG("boot_cpu_count = %d\n", boot_cpu_count);
  219. DBG(" <- smp_release_cpus()\n");
  220. }
  221. #endif /* CONFIG_SMP || CONFIG_KEXEC */
  222. /*
  223. * Initialize some remaining members of the ppc64_caches and systemcfg
  224. * structures
  225. * (at least until we get rid of them completely). This is mostly some
  226. * cache informations about the CPU that will be used by cache flush
  227. * routines and/or provided to userland
  228. */
  229. static void __init initialize_cache_info(void)
  230. {
  231. struct device_node *np;
  232. unsigned long num_cpus = 0;
  233. DBG(" -> initialize_cache_info()\n");
  234. for (np = NULL; (np = of_find_node_by_type(np, "cpu"));) {
  235. num_cpus += 1;
  236. /* We're assuming *all* of the CPUs have the same
  237. * d-cache and i-cache sizes... -Peter
  238. */
  239. if ( num_cpus == 1 ) {
  240. const u32 *sizep, *lsizep;
  241. u32 size, lsize;
  242. size = 0;
  243. lsize = cur_cpu_spec->dcache_bsize;
  244. sizep = of_get_property(np, "d-cache-size", NULL);
  245. if (sizep != NULL)
  246. size = *sizep;
  247. lsizep = of_get_property(np, "d-cache-block-size", NULL);
  248. /* fallback if block size missing */
  249. if (lsizep == NULL)
  250. lsizep = of_get_property(np, "d-cache-line-size", NULL);
  251. if (lsizep != NULL)
  252. lsize = *lsizep;
  253. if (sizep == 0 || lsizep == 0)
  254. DBG("Argh, can't find dcache properties ! "
  255. "sizep: %p, lsizep: %p\n", sizep, lsizep);
  256. ppc64_caches.dsize = size;
  257. ppc64_caches.dline_size = lsize;
  258. ppc64_caches.log_dline_size = __ilog2(lsize);
  259. ppc64_caches.dlines_per_page = PAGE_SIZE / lsize;
  260. size = 0;
  261. lsize = cur_cpu_spec->icache_bsize;
  262. sizep = of_get_property(np, "i-cache-size", NULL);
  263. if (sizep != NULL)
  264. size = *sizep;
  265. lsizep = of_get_property(np, "i-cache-block-size", NULL);
  266. if (lsizep == NULL)
  267. lsizep = of_get_property(np, "i-cache-line-size", NULL);
  268. if (lsizep != NULL)
  269. lsize = *lsizep;
  270. if (sizep == 0 || lsizep == 0)
  271. DBG("Argh, can't find icache properties ! "
  272. "sizep: %p, lsizep: %p\n", sizep, lsizep);
  273. ppc64_caches.isize = size;
  274. ppc64_caches.iline_size = lsize;
  275. ppc64_caches.log_iline_size = __ilog2(lsize);
  276. ppc64_caches.ilines_per_page = PAGE_SIZE / lsize;
  277. }
  278. }
  279. DBG(" <- initialize_cache_info()\n");
  280. }
  281. /*
  282. * Do some initial setup of the system. The parameters are those which
  283. * were passed in from the bootloader.
  284. */
  285. void __init setup_system(void)
  286. {
  287. DBG(" -> setup_system()\n");
  288. /* Apply the CPUs-specific and firmware specific fixups to kernel
  289. * text (nop out sections not relevant to this CPU or this firmware)
  290. */
  291. do_feature_fixups(cur_cpu_spec->cpu_features,
  292. &__start___ftr_fixup, &__stop___ftr_fixup);
  293. do_feature_fixups(cur_cpu_spec->mmu_features,
  294. &__start___mmu_ftr_fixup, &__stop___mmu_ftr_fixup);
  295. do_feature_fixups(powerpc_firmware_features,
  296. &__start___fw_ftr_fixup, &__stop___fw_ftr_fixup);
  297. do_lwsync_fixups(cur_cpu_spec->cpu_features,
  298. &__start___lwsync_fixup, &__stop___lwsync_fixup);
  299. /*
  300. * Unflatten the device-tree passed by prom_init or kexec
  301. */
  302. unflatten_device_tree();
  303. /*
  304. * Fill the ppc64_caches & systemcfg structures with informations
  305. * retrieved from the device-tree.
  306. */
  307. initialize_cache_info();
  308. #ifdef CONFIG_PPC_RTAS
  309. /*
  310. * Initialize RTAS if available
  311. */
  312. rtas_initialize();
  313. #endif /* CONFIG_PPC_RTAS */
  314. /*
  315. * Check if we have an initrd provided via the device-tree
  316. */
  317. check_for_initrd();
  318. /*
  319. * Do some platform specific early initializations, that includes
  320. * setting up the hash table pointers. It also sets up some interrupt-mapping
  321. * related options that will be used by finish_device_tree()
  322. */
  323. if (ppc_md.init_early)
  324. ppc_md.init_early();
  325. /*
  326. * We can discover serial ports now since the above did setup the
  327. * hash table management for us, thus ioremap works. We do that early
  328. * so that further code can be debugged
  329. */
  330. find_legacy_serial_ports();
  331. /*
  332. * Register early console
  333. */
  334. register_early_udbg_console();
  335. /*
  336. * Initialize xmon
  337. */
  338. xmon_setup();
  339. smp_setup_cpu_maps();
  340. check_smt_enabled();
  341. #ifdef CONFIG_SMP
  342. /* Release secondary cpus out of their spinloops at 0x60 now that
  343. * we can map physical -> logical CPU ids
  344. */
  345. smp_release_cpus();
  346. #endif
  347. printk("Starting Linux PPC64 %s\n", init_utsname()->version);
  348. printk("-----------------------------------------------------\n");
  349. printk("ppc64_pft_size = 0x%llx\n", ppc64_pft_size);
  350. printk("physicalMemorySize = 0x%llx\n", memblock_phys_mem_size());
  351. if (ppc64_caches.dline_size != 0x80)
  352. printk("ppc64_caches.dcache_line_size = 0x%x\n",
  353. ppc64_caches.dline_size);
  354. if (ppc64_caches.iline_size != 0x80)
  355. printk("ppc64_caches.icache_line_size = 0x%x\n",
  356. ppc64_caches.iline_size);
  357. #ifdef CONFIG_PPC_STD_MMU_64
  358. if (htab_address)
  359. printk("htab_address = 0x%p\n", htab_address);
  360. printk("htab_hash_mask = 0x%lx\n", htab_hash_mask);
  361. #endif /* CONFIG_PPC_STD_MMU_64 */
  362. if (PHYSICAL_START > 0)
  363. printk("physical_start = 0x%llx\n",
  364. (unsigned long long)PHYSICAL_START);
  365. printk("-----------------------------------------------------\n");
  366. DBG(" <- setup_system()\n");
  367. }
  368. static u64 slb0_limit(void)
  369. {
  370. if (cpu_has_feature(CPU_FTR_1T_SEGMENT)) {
  371. return 1UL << SID_SHIFT_1T;
  372. }
  373. return 1UL << SID_SHIFT;
  374. }
  375. static void __init irqstack_early_init(void)
  376. {
  377. u64 limit = slb0_limit();
  378. unsigned int i;
  379. /*
  380. * Interrupt stacks must be in the first segment since we
  381. * cannot afford to take SLB misses on them.
  382. */
  383. for_each_possible_cpu(i) {
  384. softirq_ctx[i] = (struct thread_info *)
  385. __va(memblock_alloc_base(THREAD_SIZE,
  386. THREAD_SIZE, limit));
  387. hardirq_ctx[i] = (struct thread_info *)
  388. __va(memblock_alloc_base(THREAD_SIZE,
  389. THREAD_SIZE, limit));
  390. }
  391. }
  392. #ifdef CONFIG_PPC_BOOK3E
  393. static void __init exc_lvl_early_init(void)
  394. {
  395. unsigned int i;
  396. for_each_possible_cpu(i) {
  397. critirq_ctx[i] = (struct thread_info *)
  398. __va(memblock_alloc(THREAD_SIZE, THREAD_SIZE));
  399. dbgirq_ctx[i] = (struct thread_info *)
  400. __va(memblock_alloc(THREAD_SIZE, THREAD_SIZE));
  401. mcheckirq_ctx[i] = (struct thread_info *)
  402. __va(memblock_alloc(THREAD_SIZE, THREAD_SIZE));
  403. }
  404. }
  405. #else
  406. #define exc_lvl_early_init()
  407. #endif
  408. /*
  409. * Stack space used when we detect a bad kernel stack pointer, and
  410. * early in SMP boots before relocation is enabled.
  411. */
  412. static void __init emergency_stack_init(void)
  413. {
  414. u64 limit;
  415. unsigned int i;
  416. /*
  417. * Emergency stacks must be under 256MB, we cannot afford to take
  418. * SLB misses on them. The ABI also requires them to be 128-byte
  419. * aligned.
  420. *
  421. * Since we use these as temporary stacks during secondary CPU
  422. * bringup, we need to get at them in real mode. This means they
  423. * must also be within the RMO region.
  424. */
  425. limit = min(slb0_limit(), ppc64_rma_size);
  426. for_each_possible_cpu(i) {
  427. unsigned long sp;
  428. sp = memblock_alloc_base(THREAD_SIZE, THREAD_SIZE, limit);
  429. sp += THREAD_SIZE;
  430. paca[i].emergency_sp = __va(sp);
  431. }
  432. }
  433. /*
  434. * Called into from start_kernel this initializes bootmem, which is used
  435. * to manage page allocation until mem_init is called.
  436. */
  437. void __init setup_arch(char **cmdline_p)
  438. {
  439. ppc64_boot_msg(0x12, "Setup Arch");
  440. *cmdline_p = cmd_line;
  441. /*
  442. * Set cache line size based on type of cpu as a default.
  443. * Systems with OF can look in the properties on the cpu node(s)
  444. * for a possibly more accurate value.
  445. */
  446. dcache_bsize = ppc64_caches.dline_size;
  447. icache_bsize = ppc64_caches.iline_size;
  448. /* reboot on panic */
  449. panic_timeout = 180;
  450. if (ppc_md.panic)
  451. setup_panic();
  452. init_mm.start_code = (unsigned long)_stext;
  453. init_mm.end_code = (unsigned long) _etext;
  454. init_mm.end_data = (unsigned long) _edata;
  455. init_mm.brk = klimit;
  456. irqstack_early_init();
  457. exc_lvl_early_init();
  458. emergency_stack_init();
  459. #ifdef CONFIG_PPC_STD_MMU_64
  460. stabs_alloc();
  461. #endif
  462. /* set up the bootmem stuff with available memory */
  463. do_init_bootmem();
  464. sparse_init();
  465. #ifdef CONFIG_DUMMY_CONSOLE
  466. conswitchp = &dummy_con;
  467. #endif
  468. if (ppc_md.setup_arch)
  469. ppc_md.setup_arch();
  470. paging_init();
  471. /* Initialize the MMU context management stuff */
  472. mmu_context_init();
  473. ppc64_boot_msg(0x15, "Setup Done");
  474. }
  475. /* ToDo: do something useful if ppc_md is not yet setup. */
  476. #define PPC64_LINUX_FUNCTION 0x0f000000
  477. #define PPC64_IPL_MESSAGE 0xc0000000
  478. #define PPC64_TERM_MESSAGE 0xb0000000
  479. static void ppc64_do_msg(unsigned int src, const char *msg)
  480. {
  481. if (ppc_md.progress) {
  482. char buf[128];
  483. sprintf(buf, "%08X\n", src);
  484. ppc_md.progress(buf, 0);
  485. snprintf(buf, 128, "%s", msg);
  486. ppc_md.progress(buf, 0);
  487. }
  488. }
  489. /* Print a boot progress message. */
  490. void ppc64_boot_msg(unsigned int src, const char *msg)
  491. {
  492. ppc64_do_msg(PPC64_LINUX_FUNCTION|PPC64_IPL_MESSAGE|src, msg);
  493. printk("[boot]%04x %s\n", src, msg);
  494. }
  495. #ifdef CONFIG_SMP
  496. #define PCPU_DYN_SIZE ()
  497. static void * __init pcpu_fc_alloc(unsigned int cpu, size_t size, size_t align)
  498. {
  499. return __alloc_bootmem_node(NODE_DATA(cpu_to_node(cpu)), size, align,
  500. __pa(MAX_DMA_ADDRESS));
  501. }
  502. static void __init pcpu_fc_free(void *ptr, size_t size)
  503. {
  504. free_bootmem(__pa(ptr), size);
  505. }
  506. static int pcpu_cpu_distance(unsigned int from, unsigned int to)
  507. {
  508. if (cpu_to_node(from) == cpu_to_node(to))
  509. return LOCAL_DISTANCE;
  510. else
  511. return REMOTE_DISTANCE;
  512. }
  513. unsigned long __per_cpu_offset[NR_CPUS] __read_mostly;
  514. EXPORT_SYMBOL(__per_cpu_offset);
  515. void __init setup_per_cpu_areas(void)
  516. {
  517. const size_t dyn_size = PERCPU_MODULE_RESERVE + PERCPU_DYNAMIC_RESERVE;
  518. size_t atom_size;
  519. unsigned long delta;
  520. unsigned int cpu;
  521. int rc;
  522. /*
  523. * Linear mapping is one of 4K, 1M and 16M. For 4K, no need
  524. * to group units. For larger mappings, use 1M atom which
  525. * should be large enough to contain a number of units.
  526. */
  527. if (mmu_linear_psize == MMU_PAGE_4K)
  528. atom_size = PAGE_SIZE;
  529. else
  530. atom_size = 1 << 20;
  531. rc = pcpu_embed_first_chunk(0, dyn_size, atom_size, pcpu_cpu_distance,
  532. pcpu_fc_alloc, pcpu_fc_free);
  533. if (rc < 0)
  534. panic("cannot initialize percpu area (err=%d)", rc);
  535. delta = (unsigned long)pcpu_base_addr - (unsigned long)__per_cpu_start;
  536. for_each_possible_cpu(cpu) {
  537. __per_cpu_offset[cpu] = delta + pcpu_unit_offsets[cpu];
  538. paca[cpu].data_offset = __per_cpu_offset[cpu];
  539. }
  540. }
  541. #endif
  542. #ifdef CONFIG_PPC_INDIRECT_IO
  543. struct ppc_pci_io ppc_pci_io;
  544. EXPORT_SYMBOL(ppc_pci_io);
  545. #endif /* CONFIG_PPC_INDIRECT_IO */