rt2x00queue.h 20 KB

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  1. /*
  2. Copyright (C) 2004 - 2009 Ivo van Doorn <IvDoorn@gmail.com>
  3. <http://rt2x00.serialmonkey.com>
  4. This program is free software; you can redistribute it and/or modify
  5. it under the terms of the GNU General Public License as published by
  6. the Free Software Foundation; either version 2 of the License, or
  7. (at your option) any later version.
  8. This program is distributed in the hope that it will be useful,
  9. but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. GNU General Public License for more details.
  12. You should have received a copy of the GNU General Public License
  13. along with this program; if not, write to the
  14. Free Software Foundation, Inc.,
  15. 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  16. */
  17. /*
  18. Module: rt2x00
  19. Abstract: rt2x00 queue datastructures and routines
  20. */
  21. #ifndef RT2X00QUEUE_H
  22. #define RT2X00QUEUE_H
  23. #include <linux/prefetch.h>
  24. /**
  25. * DOC: Entry frame size
  26. *
  27. * Ralink PCI devices demand the Frame size to be a multiple of 128 bytes,
  28. * for USB devices this restriction does not apply, but the value of
  29. * 2432 makes sense since it is big enough to contain the maximum fragment
  30. * size according to the ieee802.11 specs.
  31. * The aggregation size depends on support from the driver, but should
  32. * be something around 3840 bytes.
  33. */
  34. #define DATA_FRAME_SIZE 2432
  35. #define MGMT_FRAME_SIZE 256
  36. #define AGGREGATION_SIZE 3840
  37. /**
  38. * DOC: Number of entries per queue
  39. *
  40. * Under normal load without fragmentation, 12 entries are sufficient
  41. * without the queue being filled up to the maximum. When using fragmentation
  42. * and the queue threshold code, we need to add some additional margins to
  43. * make sure the queue will never (or only under extreme load) fill up
  44. * completely.
  45. * Since we don't use preallocated DMA, having a large number of queue entries
  46. * will have minimal impact on the memory requirements for the queue.
  47. */
  48. #define RX_ENTRIES 24
  49. #define TX_ENTRIES 24
  50. #define BEACON_ENTRIES 1
  51. #define ATIM_ENTRIES 8
  52. /**
  53. * enum data_queue_qid: Queue identification
  54. *
  55. * @QID_AC_BE: AC BE queue
  56. * @QID_AC_BK: AC BK queue
  57. * @QID_AC_VI: AC VI queue
  58. * @QID_AC_VO: AC VO queue
  59. * @QID_HCCA: HCCA queue
  60. * @QID_MGMT: MGMT queue (prio queue)
  61. * @QID_RX: RX queue
  62. * @QID_OTHER: None of the above (don't use, only present for completeness)
  63. * @QID_BEACON: Beacon queue (value unspecified, don't send it to device)
  64. * @QID_ATIM: Atim queue (value unspeficied, don't send it to device)
  65. */
  66. enum data_queue_qid {
  67. QID_AC_BE = 0,
  68. QID_AC_BK = 1,
  69. QID_AC_VI = 2,
  70. QID_AC_VO = 3,
  71. QID_HCCA = 4,
  72. QID_MGMT = 13,
  73. QID_RX = 14,
  74. QID_OTHER = 15,
  75. QID_BEACON,
  76. QID_ATIM,
  77. };
  78. /**
  79. * enum skb_frame_desc_flags: Flags for &struct skb_frame_desc
  80. *
  81. * @SKBDESC_DMA_MAPPED_RX: &skb_dma field has been mapped for RX
  82. * @SKBDESC_DMA_MAPPED_TX: &skb_dma field has been mapped for TX
  83. * @SKBDESC_IV_STRIPPED: Frame contained a IV/EIV provided by
  84. * mac80211 but was stripped for processing by the driver.
  85. * @SKBDESC_NOT_MAC80211: Frame didn't originate from mac80211,
  86. * don't try to pass it back.
  87. * @SKBDESC_DESC_IN_SKB: The descriptor is at the start of the
  88. * skb, instead of in the desc field.
  89. */
  90. enum skb_frame_desc_flags {
  91. SKBDESC_DMA_MAPPED_RX = 1 << 0,
  92. SKBDESC_DMA_MAPPED_TX = 1 << 1,
  93. SKBDESC_IV_STRIPPED = 1 << 2,
  94. SKBDESC_NOT_MAC80211 = 1 << 3,
  95. SKBDESC_DESC_IN_SKB = 1 << 4,
  96. };
  97. /**
  98. * struct skb_frame_desc: Descriptor information for the skb buffer
  99. *
  100. * This structure is placed over the driver_data array, this means that
  101. * this structure should not exceed the size of that array (40 bytes).
  102. *
  103. * @flags: Frame flags, see &enum skb_frame_desc_flags.
  104. * @desc_len: Length of the frame descriptor.
  105. * @tx_rate_idx: the index of the TX rate, used for TX status reporting
  106. * @tx_rate_flags: the TX rate flags, used for TX status reporting
  107. * @desc: Pointer to descriptor part of the frame.
  108. * Note that this pointer could point to something outside
  109. * of the scope of the skb->data pointer.
  110. * @iv: IV/EIV data used during encryption/decryption.
  111. * @skb_dma: (PCI-only) the DMA address associated with the sk buffer.
  112. * @entry: The entry to which this sk buffer belongs.
  113. */
  114. struct skb_frame_desc {
  115. u8 flags;
  116. u8 desc_len;
  117. u8 tx_rate_idx;
  118. u8 tx_rate_flags;
  119. void *desc;
  120. __le32 iv[2];
  121. dma_addr_t skb_dma;
  122. struct queue_entry *entry;
  123. };
  124. /**
  125. * get_skb_frame_desc - Obtain the rt2x00 frame descriptor from a sk_buff.
  126. * @skb: &struct sk_buff from where we obtain the &struct skb_frame_desc
  127. */
  128. static inline struct skb_frame_desc* get_skb_frame_desc(struct sk_buff *skb)
  129. {
  130. BUILD_BUG_ON(sizeof(struct skb_frame_desc) >
  131. IEEE80211_TX_INFO_DRIVER_DATA_SIZE);
  132. return (struct skb_frame_desc *)&IEEE80211_SKB_CB(skb)->driver_data;
  133. }
  134. /**
  135. * enum rxdone_entry_desc_flags: Flags for &struct rxdone_entry_desc
  136. *
  137. * @RXDONE_SIGNAL_PLCP: Signal field contains the plcp value.
  138. * @RXDONE_SIGNAL_BITRATE: Signal field contains the bitrate value.
  139. * @RXDONE_SIGNAL_MCS: Signal field contains the mcs value.
  140. * @RXDONE_MY_BSS: Does this frame originate from device's BSS.
  141. * @RXDONE_CRYPTO_IV: Driver provided IV/EIV data.
  142. * @RXDONE_CRYPTO_ICV: Driver provided ICV data.
  143. * @RXDONE_L2PAD: 802.11 payload has been padded to 4-byte boundary.
  144. */
  145. enum rxdone_entry_desc_flags {
  146. RXDONE_SIGNAL_PLCP = BIT(0),
  147. RXDONE_SIGNAL_BITRATE = BIT(1),
  148. RXDONE_SIGNAL_MCS = BIT(2),
  149. RXDONE_MY_BSS = BIT(3),
  150. RXDONE_CRYPTO_IV = BIT(4),
  151. RXDONE_CRYPTO_ICV = BIT(5),
  152. RXDONE_L2PAD = BIT(6),
  153. };
  154. /**
  155. * RXDONE_SIGNAL_MASK - Define to mask off all &rxdone_entry_desc_flags flags
  156. * except for the RXDONE_SIGNAL_* flags. This is useful to convert the dev_flags
  157. * from &rxdone_entry_desc to a signal value type.
  158. */
  159. #define RXDONE_SIGNAL_MASK \
  160. ( RXDONE_SIGNAL_PLCP | RXDONE_SIGNAL_BITRATE | RXDONE_SIGNAL_MCS )
  161. /**
  162. * struct rxdone_entry_desc: RX Entry descriptor
  163. *
  164. * Summary of information that has been read from the RX frame descriptor.
  165. *
  166. * @timestamp: RX Timestamp
  167. * @signal: Signal of the received frame.
  168. * @rssi: RSSI of the received frame.
  169. * @size: Data size of the received frame.
  170. * @flags: MAC80211 receive flags (See &enum mac80211_rx_flags).
  171. * @dev_flags: Ralink receive flags (See &enum rxdone_entry_desc_flags).
  172. * @rate_mode: Rate mode (See @enum rate_modulation).
  173. * @cipher: Cipher type used during decryption.
  174. * @cipher_status: Decryption status.
  175. * @iv: IV/EIV data used during decryption.
  176. * @icv: ICV data used during decryption.
  177. */
  178. struct rxdone_entry_desc {
  179. u64 timestamp;
  180. int signal;
  181. int rssi;
  182. int size;
  183. int flags;
  184. int dev_flags;
  185. u16 rate_mode;
  186. u8 cipher;
  187. u8 cipher_status;
  188. __le32 iv[2];
  189. __le32 icv;
  190. };
  191. /**
  192. * enum txdone_entry_desc_flags: Flags for &struct txdone_entry_desc
  193. *
  194. * Every txdone report has to contain the basic result of the
  195. * transmission, either &TXDONE_UNKNOWN, &TXDONE_SUCCESS or
  196. * &TXDONE_FAILURE. The flag &TXDONE_FALLBACK can be used in
  197. * conjunction with all of these flags but should only be set
  198. * if retires > 0. The flag &TXDONE_EXCESSIVE_RETRY can only be used
  199. * in conjunction with &TXDONE_FAILURE.
  200. *
  201. * @TXDONE_UNKNOWN: Hardware could not determine success of transmission.
  202. * @TXDONE_SUCCESS: Frame was successfully send
  203. * @TXDONE_FALLBACK: Hardware used fallback rates for retries
  204. * @TXDONE_FAILURE: Frame was not successfully send
  205. * @TXDONE_EXCESSIVE_RETRY: In addition to &TXDONE_FAILURE, the
  206. * frame transmission failed due to excessive retries.
  207. */
  208. enum txdone_entry_desc_flags {
  209. TXDONE_UNKNOWN,
  210. TXDONE_SUCCESS,
  211. TXDONE_FALLBACK,
  212. TXDONE_FAILURE,
  213. TXDONE_EXCESSIVE_RETRY,
  214. };
  215. /**
  216. * struct txdone_entry_desc: TX done entry descriptor
  217. *
  218. * Summary of information that has been read from the TX frame descriptor
  219. * after the device is done with transmission.
  220. *
  221. * @flags: TX done flags (See &enum txdone_entry_desc_flags).
  222. * @retry: Retry count.
  223. */
  224. struct txdone_entry_desc {
  225. unsigned long flags;
  226. int retry;
  227. };
  228. /**
  229. * enum txentry_desc_flags: Status flags for TX entry descriptor
  230. *
  231. * @ENTRY_TXD_RTS_FRAME: This frame is a RTS frame.
  232. * @ENTRY_TXD_CTS_FRAME: This frame is a CTS-to-self frame.
  233. * @ENTRY_TXD_GENERATE_SEQ: This frame requires sequence counter.
  234. * @ENTRY_TXD_FIRST_FRAGMENT: This is the first frame.
  235. * @ENTRY_TXD_MORE_FRAG: This frame is followed by another fragment.
  236. * @ENTRY_TXD_REQ_TIMESTAMP: Require timestamp to be inserted.
  237. * @ENTRY_TXD_BURST: This frame belongs to the same burst event.
  238. * @ENTRY_TXD_ACK: An ACK is required for this frame.
  239. * @ENTRY_TXD_RETRY_MODE: When set, the long retry count is used.
  240. * @ENTRY_TXD_ENCRYPT: This frame should be encrypted.
  241. * @ENTRY_TXD_ENCRYPT_PAIRWISE: Use pairwise key table (instead of shared).
  242. * @ENTRY_TXD_ENCRYPT_IV: Generate IV/EIV in hardware.
  243. * @ENTRY_TXD_ENCRYPT_MMIC: Generate MIC in hardware.
  244. * @ENTRY_TXD_HT_AMPDU: This frame is part of an AMPDU.
  245. * @ENTRY_TXD_HT_BW_40: Use 40MHz Bandwidth.
  246. * @ENTRY_TXD_HT_SHORT_GI: Use short GI.
  247. */
  248. enum txentry_desc_flags {
  249. ENTRY_TXD_RTS_FRAME,
  250. ENTRY_TXD_CTS_FRAME,
  251. ENTRY_TXD_GENERATE_SEQ,
  252. ENTRY_TXD_FIRST_FRAGMENT,
  253. ENTRY_TXD_MORE_FRAG,
  254. ENTRY_TXD_REQ_TIMESTAMP,
  255. ENTRY_TXD_BURST,
  256. ENTRY_TXD_ACK,
  257. ENTRY_TXD_RETRY_MODE,
  258. ENTRY_TXD_ENCRYPT,
  259. ENTRY_TXD_ENCRYPT_PAIRWISE,
  260. ENTRY_TXD_ENCRYPT_IV,
  261. ENTRY_TXD_ENCRYPT_MMIC,
  262. ENTRY_TXD_HT_AMPDU,
  263. ENTRY_TXD_HT_BW_40,
  264. ENTRY_TXD_HT_SHORT_GI,
  265. };
  266. /**
  267. * struct txentry_desc: TX Entry descriptor
  268. *
  269. * Summary of information for the frame descriptor before sending a TX frame.
  270. *
  271. * @flags: Descriptor flags (See &enum queue_entry_flags).
  272. * @queue: Queue identification (See &enum data_queue_qid).
  273. * @length: Length of the entire frame.
  274. * @header_length: Length of 802.11 header.
  275. * @length_high: PLCP length high word.
  276. * @length_low: PLCP length low word.
  277. * @signal: PLCP signal.
  278. * @service: PLCP service.
  279. * @msc: MCS.
  280. * @stbc: STBC.
  281. * @ba_size: BA size.
  282. * @rate_mode: Rate mode (See @enum rate_modulation).
  283. * @mpdu_density: MDPU density.
  284. * @retry_limit: Max number of retries.
  285. * @aifs: AIFS value.
  286. * @ifs: IFS value.
  287. * @txop: IFS value for 11n capable chips.
  288. * @cw_min: cwmin value.
  289. * @cw_max: cwmax value.
  290. * @cipher: Cipher type used for encryption.
  291. * @key_idx: Key index used for encryption.
  292. * @iv_offset: Position where IV should be inserted by hardware.
  293. * @iv_len: Length of IV data.
  294. */
  295. struct txentry_desc {
  296. unsigned long flags;
  297. enum data_queue_qid queue;
  298. u16 length;
  299. u16 header_length;
  300. u16 length_high;
  301. u16 length_low;
  302. u16 signal;
  303. u16 service;
  304. u16 mcs;
  305. u16 stbc;
  306. u16 ba_size;
  307. u16 rate_mode;
  308. u16 mpdu_density;
  309. short retry_limit;
  310. short aifs;
  311. short ifs;
  312. short txop;
  313. short cw_min;
  314. short cw_max;
  315. enum cipher cipher;
  316. u16 key_idx;
  317. u16 iv_offset;
  318. u16 iv_len;
  319. };
  320. /**
  321. * enum queue_entry_flags: Status flags for queue entry
  322. *
  323. * @ENTRY_BCN_ASSIGNED: This entry has been assigned to an interface.
  324. * As long as this bit is set, this entry may only be touched
  325. * through the interface structure.
  326. * @ENTRY_OWNER_DEVICE_DATA: This entry is owned by the device for data
  327. * transfer (either TX or RX depending on the queue). The entry should
  328. * only be touched after the device has signaled it is done with it.
  329. * @ENTRY_OWNER_DEVICE_CRYPTO: This entry is owned by the device for data
  330. * encryption or decryption. The entry should only be touched after
  331. * the device has signaled it is done with it.
  332. * @ENTRY_DATA_PENDING: This entry contains a valid frame and is waiting
  333. * for the signal to start sending.
  334. */
  335. enum queue_entry_flags {
  336. ENTRY_BCN_ASSIGNED,
  337. ENTRY_OWNER_DEVICE_DATA,
  338. ENTRY_OWNER_DEVICE_CRYPTO,
  339. ENTRY_DATA_PENDING,
  340. };
  341. /**
  342. * struct queue_entry: Entry inside the &struct data_queue
  343. *
  344. * @flags: Entry flags, see &enum queue_entry_flags.
  345. * @queue: The data queue (&struct data_queue) to which this entry belongs.
  346. * @skb: The buffer which is currently being transmitted (for TX queue),
  347. * or used to directly recieve data in (for RX queue).
  348. * @entry_idx: The entry index number.
  349. * @priv_data: Private data belonging to this queue entry. The pointer
  350. * points to data specific to a particular driver and queue type.
  351. */
  352. struct queue_entry {
  353. unsigned long flags;
  354. struct data_queue *queue;
  355. struct sk_buff *skb;
  356. unsigned int entry_idx;
  357. void *priv_data;
  358. };
  359. /**
  360. * enum queue_index: Queue index type
  361. *
  362. * @Q_INDEX: Index pointer to the current entry in the queue, if this entry is
  363. * owned by the hardware then the queue is considered to be full.
  364. * @Q_INDEX_DONE: Index pointer to the next entry which will be completed by
  365. * the hardware and for which we need to run the txdone handler. If this
  366. * entry is not owned by the hardware the queue is considered to be empty.
  367. * @Q_INDEX_CRYPTO: Index pointer to the next entry which encryption/decription
  368. * will be completed by the hardware next.
  369. * @Q_INDEX_MAX: Keep last, used in &struct data_queue to determine the size
  370. * of the index array.
  371. */
  372. enum queue_index {
  373. Q_INDEX,
  374. Q_INDEX_DONE,
  375. Q_INDEX_CRYPTO,
  376. Q_INDEX_MAX,
  377. };
  378. /**
  379. * struct data_queue: Data queue
  380. *
  381. * @rt2x00dev: Pointer to main &struct rt2x00dev where this queue belongs to.
  382. * @entries: Base address of the &struct queue_entry which are
  383. * part of this queue.
  384. * @qid: The queue identification, see &enum data_queue_qid.
  385. * @lock: Spinlock to protect index handling. Whenever @index, @index_done or
  386. * @index_crypt needs to be changed this lock should be grabbed to prevent
  387. * index corruption due to concurrency.
  388. * @count: Number of frames handled in the queue.
  389. * @limit: Maximum number of entries in the queue.
  390. * @threshold: Minimum number of free entries before queue is kicked by force.
  391. * @length: Number of frames in queue.
  392. * @index: Index pointers to entry positions in the queue,
  393. * use &enum queue_index to get a specific index field.
  394. * @txop: maximum burst time.
  395. * @aifs: The aifs value for outgoing frames (field ignored in RX queue).
  396. * @cw_min: The cw min value for outgoing frames (field ignored in RX queue).
  397. * @cw_max: The cw max value for outgoing frames (field ignored in RX queue).
  398. * @data_size: Maximum data size for the frames in this queue.
  399. * @desc_size: Hardware descriptor size for the data in this queue.
  400. * @usb_endpoint: Device endpoint used for communication (USB only)
  401. * @usb_maxpacket: Max packet size for given endpoint (USB only)
  402. */
  403. struct data_queue {
  404. struct rt2x00_dev *rt2x00dev;
  405. struct queue_entry *entries;
  406. enum data_queue_qid qid;
  407. spinlock_t lock;
  408. unsigned int count;
  409. unsigned short limit;
  410. unsigned short threshold;
  411. unsigned short length;
  412. unsigned short index[Q_INDEX_MAX];
  413. unsigned short txop;
  414. unsigned short aifs;
  415. unsigned short cw_min;
  416. unsigned short cw_max;
  417. unsigned short data_size;
  418. unsigned short desc_size;
  419. unsigned short usb_endpoint;
  420. unsigned short usb_maxpacket;
  421. };
  422. /**
  423. * struct data_queue_desc: Data queue description
  424. *
  425. * The information in this structure is used by drivers
  426. * to inform rt2x00lib about the creation of the data queue.
  427. *
  428. * @entry_num: Maximum number of entries for a queue.
  429. * @data_size: Maximum data size for the frames in this queue.
  430. * @desc_size: Hardware descriptor size for the data in this queue.
  431. * @priv_size: Size of per-queue_entry private data.
  432. */
  433. struct data_queue_desc {
  434. unsigned short entry_num;
  435. unsigned short data_size;
  436. unsigned short desc_size;
  437. unsigned short priv_size;
  438. };
  439. /**
  440. * queue_end - Return pointer to the last queue (HELPER MACRO).
  441. * @__dev: Pointer to &struct rt2x00_dev
  442. *
  443. * Using the base rx pointer and the maximum number of available queues,
  444. * this macro will return the address of 1 position beyond the end of the
  445. * queues array.
  446. */
  447. #define queue_end(__dev) \
  448. &(__dev)->rx[(__dev)->data_queues]
  449. /**
  450. * tx_queue_end - Return pointer to the last TX queue (HELPER MACRO).
  451. * @__dev: Pointer to &struct rt2x00_dev
  452. *
  453. * Using the base tx pointer and the maximum number of available TX
  454. * queues, this macro will return the address of 1 position beyond
  455. * the end of the TX queue array.
  456. */
  457. #define tx_queue_end(__dev) \
  458. &(__dev)->tx[(__dev)->ops->tx_queues]
  459. /**
  460. * queue_next - Return pointer to next queue in list (HELPER MACRO).
  461. * @__queue: Current queue for which we need the next queue
  462. *
  463. * Using the current queue address we take the address directly
  464. * after the queue to take the next queue. Note that this macro
  465. * should be used carefully since it does not protect against
  466. * moving past the end of the list. (See macros &queue_end and
  467. * &tx_queue_end for determining the end of the queue).
  468. */
  469. #define queue_next(__queue) \
  470. &(__queue)[1]
  471. /**
  472. * queue_loop - Loop through the queues within a specific range (HELPER MACRO).
  473. * @__entry: Pointer where the current queue entry will be stored in.
  474. * @__start: Start queue pointer.
  475. * @__end: End queue pointer.
  476. *
  477. * This macro will loop through all queues between &__start and &__end.
  478. */
  479. #define queue_loop(__entry, __start, __end) \
  480. for ((__entry) = (__start); \
  481. prefetch(queue_next(__entry)), (__entry) != (__end);\
  482. (__entry) = queue_next(__entry))
  483. /**
  484. * queue_for_each - Loop through all queues
  485. * @__dev: Pointer to &struct rt2x00_dev
  486. * @__entry: Pointer where the current queue entry will be stored in.
  487. *
  488. * This macro will loop through all available queues.
  489. */
  490. #define queue_for_each(__dev, __entry) \
  491. queue_loop(__entry, (__dev)->rx, queue_end(__dev))
  492. /**
  493. * tx_queue_for_each - Loop through the TX queues
  494. * @__dev: Pointer to &struct rt2x00_dev
  495. * @__entry: Pointer where the current queue entry will be stored in.
  496. *
  497. * This macro will loop through all TX related queues excluding
  498. * the Beacon and Atim queues.
  499. */
  500. #define tx_queue_for_each(__dev, __entry) \
  501. queue_loop(__entry, (__dev)->tx, tx_queue_end(__dev))
  502. /**
  503. * txall_queue_for_each - Loop through all TX related queues
  504. * @__dev: Pointer to &struct rt2x00_dev
  505. * @__entry: Pointer where the current queue entry will be stored in.
  506. *
  507. * This macro will loop through all TX related queues including
  508. * the Beacon and Atim queues.
  509. */
  510. #define txall_queue_for_each(__dev, __entry) \
  511. queue_loop(__entry, (__dev)->tx, queue_end(__dev))
  512. /**
  513. * rt2x00queue_empty - Check if the queue is empty.
  514. * @queue: Queue to check if empty.
  515. */
  516. static inline int rt2x00queue_empty(struct data_queue *queue)
  517. {
  518. return queue->length == 0;
  519. }
  520. /**
  521. * rt2x00queue_full - Check if the queue is full.
  522. * @queue: Queue to check if full.
  523. */
  524. static inline int rt2x00queue_full(struct data_queue *queue)
  525. {
  526. return queue->length == queue->limit;
  527. }
  528. /**
  529. * rt2x00queue_free - Check the number of available entries in queue.
  530. * @queue: Queue to check.
  531. */
  532. static inline int rt2x00queue_available(struct data_queue *queue)
  533. {
  534. return queue->limit - queue->length;
  535. }
  536. /**
  537. * rt2x00queue_threshold - Check if the queue is below threshold
  538. * @queue: Queue to check.
  539. */
  540. static inline int rt2x00queue_threshold(struct data_queue *queue)
  541. {
  542. return rt2x00queue_available(queue) < queue->threshold;
  543. }
  544. /**
  545. * _rt2x00_desc_read - Read a word from the hardware descriptor.
  546. * @desc: Base descriptor address
  547. * @word: Word index from where the descriptor should be read.
  548. * @value: Address where the descriptor value should be written into.
  549. */
  550. static inline void _rt2x00_desc_read(__le32 *desc, const u8 word, __le32 *value)
  551. {
  552. *value = desc[word];
  553. }
  554. /**
  555. * rt2x00_desc_read - Read a word from the hardware descriptor, this
  556. * function will take care of the byte ordering.
  557. * @desc: Base descriptor address
  558. * @word: Word index from where the descriptor should be read.
  559. * @value: Address where the descriptor value should be written into.
  560. */
  561. static inline void rt2x00_desc_read(__le32 *desc, const u8 word, u32 *value)
  562. {
  563. __le32 tmp;
  564. _rt2x00_desc_read(desc, word, &tmp);
  565. *value = le32_to_cpu(tmp);
  566. }
  567. /**
  568. * rt2x00_desc_write - write a word to the hardware descriptor, this
  569. * function will take care of the byte ordering.
  570. * @desc: Base descriptor address
  571. * @word: Word index from where the descriptor should be written.
  572. * @value: Value that should be written into the descriptor.
  573. */
  574. static inline void _rt2x00_desc_write(__le32 *desc, const u8 word, __le32 value)
  575. {
  576. desc[word] = value;
  577. }
  578. /**
  579. * rt2x00_desc_write - write a word to the hardware descriptor.
  580. * @desc: Base descriptor address
  581. * @word: Word index from where the descriptor should be written.
  582. * @value: Value that should be written into the descriptor.
  583. */
  584. static inline void rt2x00_desc_write(__le32 *desc, const u8 word, u32 value)
  585. {
  586. _rt2x00_desc_write(desc, word, cpu_to_le32(value));
  587. }
  588. #endif /* RT2X00QUEUE_H */