mac.c 32 KB

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  1. /******************************************************************************
  2. *
  3. * Copyright(c) 2009-2010 Realtek Corporation. All rights reserved.
  4. *
  5. * This program is free software; you can redistribute it and/or modify it
  6. * under the terms of version 2 of the GNU General Public License as
  7. * published by the Free Software Foundation.
  8. *
  9. * This program is distributed in the hope that it will be useful, but WITHOUT
  10. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  12. * more details.
  13. *
  14. * You should have received a copy of the GNU General Public License along with
  15. * this program; if not, write to the Free Software Foundation, Inc.,
  16. * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  17. *
  18. * The full GNU General Public License is included in this distribution in the
  19. * file called LICENSE.
  20. *
  21. * Contact Information:
  22. * wlanfae <wlanfae@realtek.com>
  23. * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
  24. * Hsinchu 300, Taiwan.
  25. *
  26. * Larry Finger <Larry.Finger@lwfinger.net>
  27. *
  28. ****************************************************************************/
  29. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  30. #include <linux/module.h>
  31. #include "../wifi.h"
  32. #include "../pci.h"
  33. #include "../usb.h"
  34. #include "../ps.h"
  35. #include "../cam.h"
  36. #include "reg.h"
  37. #include "def.h"
  38. #include "phy.h"
  39. #include "rf.h"
  40. #include "dm.h"
  41. #include "mac.h"
  42. #include "trx.h"
  43. /* macro to shorten lines */
  44. #define LINK_Q ui_link_quality
  45. #define RX_EVM rx_evm_percentage
  46. #define RX_SIGQ rx_mimo_signalquality
  47. void rtl92c_read_chip_version(struct ieee80211_hw *hw)
  48. {
  49. struct rtl_priv *rtlpriv = rtl_priv(hw);
  50. struct rtl_phy *rtlphy = &(rtlpriv->phy);
  51. struct rtl_hal *rtlhal = rtl_hal(rtlpriv);
  52. enum version_8192c chip_version = VERSION_UNKNOWN;
  53. u32 value32;
  54. value32 = rtl_read_dword(rtlpriv, REG_SYS_CFG);
  55. if (value32 & TRP_VAUX_EN) {
  56. chip_version = (value32 & TYPE_ID) ? VERSION_TEST_CHIP_92C :
  57. VERSION_TEST_CHIP_88C;
  58. } else {
  59. /* Normal mass production chip. */
  60. chip_version = NORMAL_CHIP;
  61. chip_version |= ((value32 & TYPE_ID) ? CHIP_92C : 0);
  62. chip_version |= ((value32 & VENDOR_ID) ? CHIP_VENDOR_UMC : 0);
  63. /* RTL8723 with BT function. */
  64. chip_version |= ((value32 & BT_FUNC) ? CHIP_8723 : 0);
  65. if (IS_VENDOR_UMC(chip_version))
  66. chip_version |= ((value32 & CHIP_VER_RTL_MASK) ?
  67. CHIP_VENDOR_UMC_B_CUT : 0);
  68. if (IS_92C_SERIAL(chip_version)) {
  69. value32 = rtl_read_dword(rtlpriv, REG_HPON_FSM);
  70. chip_version |= ((CHIP_BONDING_IDENTIFIER(value32) ==
  71. CHIP_BONDING_92C_1T2R) ? CHIP_92C_1T2R : 0);
  72. } else if (IS_8723_SERIES(chip_version)) {
  73. value32 = rtl_read_dword(rtlpriv, REG_GPIO_OUTSTS);
  74. chip_version |= ((value32 & RF_RL_ID) ?
  75. CHIP_8723_DRV_REV : 0);
  76. }
  77. }
  78. rtlhal->version = (enum version_8192c)chip_version;
  79. pr_info("rtl8192cu: Chip version 0x%x\n", chip_version);
  80. switch (rtlhal->version) {
  81. case VERSION_NORMAL_TSMC_CHIP_92C_1T2R:
  82. RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
  83. ("Chip Version ID: VERSION_B_CHIP_92C.\n"));
  84. break;
  85. case VERSION_NORMAL_TSMC_CHIP_92C:
  86. RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
  87. ("Chip Version ID: VERSION_NORMAL_TSMC_CHIP_92C.\n"));
  88. break;
  89. case VERSION_NORMAL_TSMC_CHIP_88C:
  90. RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
  91. ("Chip Version ID: VERSION_NORMAL_TSMC_CHIP_88C.\n"));
  92. break;
  93. case VERSION_NORMAL_UMC_CHIP_92C_1T2R_A_CUT:
  94. RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
  95. ("Chip Version ID: VERSION_NORMAL_UMC_CHIP_i"
  96. "92C_1T2R_A_CUT.\n"));
  97. break;
  98. case VERSION_NORMAL_UMC_CHIP_92C_A_CUT:
  99. RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
  100. ("Chip Version ID: VERSION_NORMAL_UMC_CHIP_"
  101. "92C_A_CUT.\n"));
  102. break;
  103. case VERSION_NORMAL_UMC_CHIP_88C_A_CUT:
  104. RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
  105. ("Chip Version ID: VERSION_NORMAL_UMC_CHIP"
  106. "_88C_A_CUT.\n"));
  107. break;
  108. case VERSION_NORMAL_UMC_CHIP_92C_1T2R_B_CUT:
  109. RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
  110. ("Chip Version ID: VERSION_NORMAL_UMC_CHIP"
  111. "_92C_1T2R_B_CUT.\n"));
  112. break;
  113. case VERSION_NORMAL_UMC_CHIP_92C_B_CUT:
  114. RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
  115. ("Chip Version ID: VERSION_NORMAL_UMC_CHIP"
  116. "_92C_B_CUT.\n"));
  117. break;
  118. case VERSION_NORMAL_UMC_CHIP_88C_B_CUT:
  119. RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
  120. ("Chip Version ID: VERSION_NORMAL_UMC_CHIP"
  121. "_88C_B_CUT.\n"));
  122. break;
  123. case VERSION_NORMA_UMC_CHIP_8723_1T1R_A_CUT:
  124. RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
  125. ("Chip Version ID: VERSION_NORMA_UMC_CHIP"
  126. "_8723_1T1R_A_CUT.\n"));
  127. break;
  128. case VERSION_NORMA_UMC_CHIP_8723_1T1R_B_CUT:
  129. RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
  130. ("Chip Version ID: VERSION_NORMA_UMC_CHIP"
  131. "_8723_1T1R_B_CUT.\n"));
  132. break;
  133. case VERSION_TEST_CHIP_92C:
  134. RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
  135. ("Chip Version ID: VERSION_TEST_CHIP_92C.\n"));
  136. break;
  137. case VERSION_TEST_CHIP_88C:
  138. RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
  139. ("Chip Version ID: VERSION_TEST_CHIP_88C.\n"));
  140. break;
  141. default:
  142. RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
  143. ("Chip Version ID: ???????????????.\n"));
  144. break;
  145. }
  146. if (IS_92C_SERIAL(rtlhal->version))
  147. rtlphy->rf_type =
  148. (IS_92C_1T2R(rtlhal->version)) ? RF_1T2R : RF_2T2R;
  149. else
  150. rtlphy->rf_type = RF_1T1R;
  151. RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
  152. ("Chip RF Type: %s\n", (rtlphy->rf_type == RF_2T2R) ?
  153. "RF_2T2R" : "RF_1T1R"));
  154. if (get_rf_type(rtlphy) == RF_1T1R)
  155. rtlpriv->dm.rfpath_rxenable[0] = true;
  156. else
  157. rtlpriv->dm.rfpath_rxenable[0] =
  158. rtlpriv->dm.rfpath_rxenable[1] = true;
  159. RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, ("VersionID = 0x%4x\n",
  160. rtlhal->version));
  161. }
  162. /**
  163. * writeLLT - LLT table write access
  164. * @io: io callback
  165. * @address: LLT logical address.
  166. * @data: LLT data content
  167. *
  168. * Realtek hardware access function.
  169. *
  170. */
  171. bool rtl92c_llt_write(struct ieee80211_hw *hw, u32 address, u32 data)
  172. {
  173. struct rtl_priv *rtlpriv = rtl_priv(hw);
  174. bool status = true;
  175. long count = 0;
  176. u32 value = _LLT_INIT_ADDR(address) |
  177. _LLT_INIT_DATA(data) | _LLT_OP(_LLT_WRITE_ACCESS);
  178. rtl_write_dword(rtlpriv, REG_LLT_INIT, value);
  179. do {
  180. value = rtl_read_dword(rtlpriv, REG_LLT_INIT);
  181. if (_LLT_NO_ACTIVE == _LLT_OP_VALUE(value))
  182. break;
  183. if (count > POLLING_LLT_THRESHOLD) {
  184. RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
  185. ("Failed to polling write LLT done at"
  186. " address %d! _LLT_OP_VALUE(%x)\n",
  187. address, _LLT_OP_VALUE(value)));
  188. status = false;
  189. break;
  190. }
  191. } while (++count);
  192. return status;
  193. }
  194. /**
  195. * rtl92c_init_LLT_table - Init LLT table
  196. * @io: io callback
  197. * @boundary:
  198. *
  199. * Realtek hardware access function.
  200. *
  201. */
  202. bool rtl92c_init_llt_table(struct ieee80211_hw *hw, u32 boundary)
  203. {
  204. bool rst = true;
  205. u32 i;
  206. for (i = 0; i < (boundary - 1); i++) {
  207. rst = rtl92c_llt_write(hw, i , i + 1);
  208. if (true != rst) {
  209. pr_err("===> %s #1 fail\n", __func__);
  210. return rst;
  211. }
  212. }
  213. /* end of list */
  214. rst = rtl92c_llt_write(hw, (boundary - 1), 0xFF);
  215. if (true != rst) {
  216. pr_err("===> %s #2 fail\n", __func__);
  217. return rst;
  218. }
  219. /* Make the other pages as ring buffer
  220. * This ring buffer is used as beacon buffer if we config this MAC
  221. * as two MAC transfer.
  222. * Otherwise used as local loopback buffer.
  223. */
  224. for (i = boundary; i < LLT_LAST_ENTRY_OF_TX_PKT_BUFFER; i++) {
  225. rst = rtl92c_llt_write(hw, i, (i + 1));
  226. if (true != rst) {
  227. pr_err("===> %s #3 fail\n", __func__);
  228. return rst;
  229. }
  230. }
  231. /* Let last entry point to the start entry of ring buffer */
  232. rst = rtl92c_llt_write(hw, LLT_LAST_ENTRY_OF_TX_PKT_BUFFER, boundary);
  233. if (true != rst) {
  234. pr_err("===> %s #4 fail\n", __func__);
  235. return rst;
  236. }
  237. return rst;
  238. }
  239. void rtl92c_set_key(struct ieee80211_hw *hw, u32 key_index,
  240. u8 *p_macaddr, bool is_group, u8 enc_algo,
  241. bool is_wepkey, bool clear_all)
  242. {
  243. struct rtl_priv *rtlpriv = rtl_priv(hw);
  244. struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
  245. struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw));
  246. u8 *macaddr = p_macaddr;
  247. u32 entry_id = 0;
  248. bool is_pairwise = false;
  249. static u8 cam_const_addr[4][6] = {
  250. {0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
  251. {0x00, 0x00, 0x00, 0x00, 0x00, 0x01},
  252. {0x00, 0x00, 0x00, 0x00, 0x00, 0x02},
  253. {0x00, 0x00, 0x00, 0x00, 0x00, 0x03}
  254. };
  255. static u8 cam_const_broad[] = {
  256. 0xff, 0xff, 0xff, 0xff, 0xff, 0xff
  257. };
  258. if (clear_all) {
  259. u8 idx = 0;
  260. u8 cam_offset = 0;
  261. u8 clear_number = 5;
  262. RT_TRACE(rtlpriv, COMP_SEC, DBG_DMESG, ("clear_all\n"));
  263. for (idx = 0; idx < clear_number; idx++) {
  264. rtl_cam_mark_invalid(hw, cam_offset + idx);
  265. rtl_cam_empty_entry(hw, cam_offset + idx);
  266. if (idx < 5) {
  267. memset(rtlpriv->sec.key_buf[idx], 0,
  268. MAX_KEY_LEN);
  269. rtlpriv->sec.key_len[idx] = 0;
  270. }
  271. }
  272. } else {
  273. switch (enc_algo) {
  274. case WEP40_ENCRYPTION:
  275. enc_algo = CAM_WEP40;
  276. break;
  277. case WEP104_ENCRYPTION:
  278. enc_algo = CAM_WEP104;
  279. break;
  280. case TKIP_ENCRYPTION:
  281. enc_algo = CAM_TKIP;
  282. break;
  283. case AESCCMP_ENCRYPTION:
  284. enc_algo = CAM_AES;
  285. break;
  286. default:
  287. RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
  288. ("iillegal switch case\n"));
  289. enc_algo = CAM_TKIP;
  290. break;
  291. }
  292. if (is_wepkey || rtlpriv->sec.use_defaultkey) {
  293. macaddr = cam_const_addr[key_index];
  294. entry_id = key_index;
  295. } else {
  296. if (is_group) {
  297. macaddr = cam_const_broad;
  298. entry_id = key_index;
  299. } else {
  300. key_index = PAIRWISE_KEYIDX;
  301. entry_id = CAM_PAIRWISE_KEY_POSITION;
  302. is_pairwise = true;
  303. }
  304. }
  305. if (rtlpriv->sec.key_len[key_index] == 0) {
  306. RT_TRACE(rtlpriv, COMP_SEC, DBG_DMESG,
  307. ("delete one entry\n"));
  308. rtl_cam_delete_one_entry(hw, p_macaddr, entry_id);
  309. } else {
  310. RT_TRACE(rtlpriv, COMP_SEC, DBG_LOUD,
  311. ("The insert KEY length is %d\n",
  312. rtlpriv->sec.key_len[PAIRWISE_KEYIDX]));
  313. RT_TRACE(rtlpriv, COMP_SEC, DBG_LOUD,
  314. ("The insert KEY is %x %x\n",
  315. rtlpriv->sec.key_buf[0][0],
  316. rtlpriv->sec.key_buf[0][1]));
  317. RT_TRACE(rtlpriv, COMP_SEC, DBG_DMESG,
  318. ("add one entry\n"));
  319. if (is_pairwise) {
  320. RT_PRINT_DATA(rtlpriv, COMP_SEC, DBG_LOUD,
  321. "Pairwiase Key content :",
  322. rtlpriv->sec.pairwise_key,
  323. rtlpriv->sec.
  324. key_len[PAIRWISE_KEYIDX]);
  325. RT_TRACE(rtlpriv, COMP_SEC, DBG_DMESG,
  326. ("set Pairwiase key\n"));
  327. rtl_cam_add_one_entry(hw, macaddr, key_index,
  328. entry_id, enc_algo,
  329. CAM_CONFIG_NO_USEDK,
  330. rtlpriv->sec.
  331. key_buf[key_index]);
  332. } else {
  333. RT_TRACE(rtlpriv, COMP_SEC, DBG_DMESG,
  334. ("set group key\n"));
  335. if (mac->opmode == NL80211_IFTYPE_ADHOC) {
  336. rtl_cam_add_one_entry(hw,
  337. rtlefuse->dev_addr,
  338. PAIRWISE_KEYIDX,
  339. CAM_PAIRWISE_KEY_POSITION,
  340. enc_algo,
  341. CAM_CONFIG_NO_USEDK,
  342. rtlpriv->sec.key_buf
  343. [entry_id]);
  344. }
  345. rtl_cam_add_one_entry(hw, macaddr, key_index,
  346. entry_id, enc_algo,
  347. CAM_CONFIG_NO_USEDK,
  348. rtlpriv->sec.key_buf[entry_id]);
  349. }
  350. }
  351. }
  352. }
  353. u32 rtl92c_get_txdma_status(struct ieee80211_hw *hw)
  354. {
  355. struct rtl_priv *rtlpriv = rtl_priv(hw);
  356. return rtl_read_dword(rtlpriv, REG_TXDMA_STATUS);
  357. }
  358. void rtl92c_enable_interrupt(struct ieee80211_hw *hw)
  359. {
  360. struct rtl_priv *rtlpriv = rtl_priv(hw);
  361. struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
  362. struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
  363. struct rtl_usb *rtlusb = rtl_usbdev(rtl_usbpriv(hw));
  364. if (IS_HARDWARE_TYPE_8192CE(rtlhal)) {
  365. rtl_write_dword(rtlpriv, REG_HIMR, rtlpci->irq_mask[0] &
  366. 0xFFFFFFFF);
  367. rtl_write_dword(rtlpriv, REG_HIMRE, rtlpci->irq_mask[1] &
  368. 0xFFFFFFFF);
  369. } else {
  370. rtl_write_dword(rtlpriv, REG_HIMR, rtlusb->irq_mask[0] &
  371. 0xFFFFFFFF);
  372. rtl_write_dword(rtlpriv, REG_HIMRE, rtlusb->irq_mask[1] &
  373. 0xFFFFFFFF);
  374. }
  375. }
  376. void rtl92c_init_interrupt(struct ieee80211_hw *hw)
  377. {
  378. rtl92c_enable_interrupt(hw);
  379. }
  380. void rtl92c_disable_interrupt(struct ieee80211_hw *hw)
  381. {
  382. struct rtl_priv *rtlpriv = rtl_priv(hw);
  383. rtl_write_dword(rtlpriv, REG_HIMR, IMR8190_DISABLED);
  384. rtl_write_dword(rtlpriv, REG_HIMRE, IMR8190_DISABLED);
  385. }
  386. void rtl92c_set_qos(struct ieee80211_hw *hw, int aci)
  387. {
  388. struct rtl_priv *rtlpriv = rtl_priv(hw);
  389. struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
  390. u32 u4b_ac_param;
  391. rtl92c_dm_init_edca_turbo(hw);
  392. u4b_ac_param = (u32) mac->ac[aci].aifs;
  393. u4b_ac_param |=
  394. ((u32) le16_to_cpu(mac->ac[aci].cw_min) & 0xF) <<
  395. AC_PARAM_ECW_MIN_OFFSET;
  396. u4b_ac_param |=
  397. ((u32) le16_to_cpu(mac->ac[aci].cw_max) & 0xF) <<
  398. AC_PARAM_ECW_MAX_OFFSET;
  399. u4b_ac_param |= (u32) le16_to_cpu(mac->ac[aci].tx_op) <<
  400. AC_PARAM_TXOP_OFFSET;
  401. RT_TRACE(rtlpriv, COMP_QOS, DBG_LOUD,
  402. ("queue:%x, ac_param:%x\n", aci, u4b_ac_param));
  403. switch (aci) {
  404. case AC1_BK:
  405. rtl_write_dword(rtlpriv, REG_EDCA_BK_PARAM, u4b_ac_param);
  406. break;
  407. case AC0_BE:
  408. rtl_write_dword(rtlpriv, REG_EDCA_BE_PARAM, u4b_ac_param);
  409. break;
  410. case AC2_VI:
  411. rtl_write_dword(rtlpriv, REG_EDCA_VI_PARAM, u4b_ac_param);
  412. break;
  413. case AC3_VO:
  414. rtl_write_dword(rtlpriv, REG_EDCA_VO_PARAM, u4b_ac_param);
  415. break;
  416. default:
  417. RT_ASSERT(false, ("invalid aci: %d !\n", aci));
  418. break;
  419. }
  420. }
  421. /*-------------------------------------------------------------------------
  422. * HW MAC Address
  423. *-------------------------------------------------------------------------*/
  424. void rtl92c_set_mac_addr(struct ieee80211_hw *hw, const u8 *addr)
  425. {
  426. u32 i;
  427. struct rtl_priv *rtlpriv = rtl_priv(hw);
  428. for (i = 0 ; i < ETH_ALEN ; i++)
  429. rtl_write_byte(rtlpriv, (REG_MACID + i), *(addr+i));
  430. RT_TRACE(rtlpriv, COMP_CMD, DBG_DMESG, ("MAC Address: %02X-%02X-%02X-"
  431. "%02X-%02X-%02X\n",
  432. rtl_read_byte(rtlpriv, REG_MACID),
  433. rtl_read_byte(rtlpriv, REG_MACID+1),
  434. rtl_read_byte(rtlpriv, REG_MACID+2),
  435. rtl_read_byte(rtlpriv, REG_MACID+3),
  436. rtl_read_byte(rtlpriv, REG_MACID+4),
  437. rtl_read_byte(rtlpriv, REG_MACID+5)));
  438. }
  439. void rtl92c_init_driver_info_size(struct ieee80211_hw *hw, u8 size)
  440. {
  441. struct rtl_priv *rtlpriv = rtl_priv(hw);
  442. rtl_write_byte(rtlpriv, REG_RX_DRVINFO_SZ, size);
  443. }
  444. int rtl92c_set_network_type(struct ieee80211_hw *hw, enum nl80211_iftype type)
  445. {
  446. u8 value;
  447. struct rtl_priv *rtlpriv = rtl_priv(hw);
  448. switch (type) {
  449. case NL80211_IFTYPE_UNSPECIFIED:
  450. value = NT_NO_LINK;
  451. RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
  452. ("Set Network type to NO LINK!\n"));
  453. break;
  454. case NL80211_IFTYPE_ADHOC:
  455. value = NT_LINK_AD_HOC;
  456. RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
  457. ("Set Network type to Ad Hoc!\n"));
  458. break;
  459. case NL80211_IFTYPE_STATION:
  460. value = NT_LINK_AP;
  461. RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
  462. ("Set Network type to STA!\n"));
  463. break;
  464. case NL80211_IFTYPE_AP:
  465. value = NT_AS_AP;
  466. RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
  467. ("Set Network type to AP!\n"));
  468. break;
  469. default:
  470. RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
  471. ("Network type %d not support!\n", type));
  472. return -EOPNOTSUPP;
  473. }
  474. rtl_write_byte(rtlpriv, (REG_CR + 2), value);
  475. return 0;
  476. }
  477. void rtl92c_init_network_type(struct ieee80211_hw *hw)
  478. {
  479. rtl92c_set_network_type(hw, NL80211_IFTYPE_UNSPECIFIED);
  480. }
  481. void rtl92c_init_adaptive_ctrl(struct ieee80211_hw *hw)
  482. {
  483. u16 value16;
  484. u32 value32;
  485. struct rtl_priv *rtlpriv = rtl_priv(hw);
  486. /* Response Rate Set */
  487. value32 = rtl_read_dword(rtlpriv, REG_RRSR);
  488. value32 &= ~RATE_BITMAP_ALL;
  489. value32 |= RATE_RRSR_CCK_ONLY_1M;
  490. rtl_write_dword(rtlpriv, REG_RRSR, value32);
  491. /* SIFS (used in NAV) */
  492. value16 = _SPEC_SIFS_CCK(0x10) | _SPEC_SIFS_OFDM(0x10);
  493. rtl_write_word(rtlpriv, REG_SPEC_SIFS, value16);
  494. /* Retry Limit */
  495. value16 = _LRL(0x30) | _SRL(0x30);
  496. rtl_write_dword(rtlpriv, REG_RL, value16);
  497. }
  498. void rtl92c_init_rate_fallback(struct ieee80211_hw *hw)
  499. {
  500. struct rtl_priv *rtlpriv = rtl_priv(hw);
  501. /* Set Data Auto Rate Fallback Retry Count register. */
  502. rtl_write_dword(rtlpriv, REG_DARFRC, 0x00000000);
  503. rtl_write_dword(rtlpriv, REG_DARFRC+4, 0x10080404);
  504. rtl_write_dword(rtlpriv, REG_RARFRC, 0x04030201);
  505. rtl_write_dword(rtlpriv, REG_RARFRC+4, 0x08070605);
  506. }
  507. static void rtl92c_set_cck_sifs(struct ieee80211_hw *hw, u8 trx_sifs,
  508. u8 ctx_sifs)
  509. {
  510. struct rtl_priv *rtlpriv = rtl_priv(hw);
  511. rtl_write_byte(rtlpriv, REG_SIFS_CCK, trx_sifs);
  512. rtl_write_byte(rtlpriv, (REG_SIFS_CCK + 1), ctx_sifs);
  513. }
  514. static void rtl92c_set_ofdm_sifs(struct ieee80211_hw *hw, u8 trx_sifs,
  515. u8 ctx_sifs)
  516. {
  517. struct rtl_priv *rtlpriv = rtl_priv(hw);
  518. rtl_write_byte(rtlpriv, REG_SIFS_OFDM, trx_sifs);
  519. rtl_write_byte(rtlpriv, (REG_SIFS_OFDM + 1), ctx_sifs);
  520. }
  521. void rtl92c_init_edca_param(struct ieee80211_hw *hw,
  522. u16 queue, u16 txop, u8 cw_min, u8 cw_max, u8 aifs)
  523. {
  524. /* sequence: VO, VI, BE, BK ==> the same as 92C hardware design.
  525. * referenc : enum nl80211_txq_q or ieee80211_set_wmm_default function.
  526. */
  527. u32 value;
  528. struct rtl_priv *rtlpriv = rtl_priv(hw);
  529. value = (u32)aifs;
  530. value |= ((u32)cw_min & 0xF) << 8;
  531. value |= ((u32)cw_max & 0xF) << 12;
  532. value |= (u32)txop << 16;
  533. /* 92C hardware register sequence is the same as queue number. */
  534. rtl_write_dword(rtlpriv, (REG_EDCA_VO_PARAM + (queue * 4)), value);
  535. }
  536. void rtl92c_init_edca(struct ieee80211_hw *hw)
  537. {
  538. u16 value16;
  539. struct rtl_priv *rtlpriv = rtl_priv(hw);
  540. /* disable EDCCA count down, to reduce collison and retry */
  541. value16 = rtl_read_word(rtlpriv, REG_RD_CTRL);
  542. value16 |= DIS_EDCA_CNT_DWN;
  543. rtl_write_word(rtlpriv, REG_RD_CTRL, value16);
  544. /* Update SIFS timing. ??????????
  545. * pHalData->SifsTime = 0x0e0e0a0a; */
  546. rtl92c_set_cck_sifs(hw, 0xa, 0xa);
  547. rtl92c_set_ofdm_sifs(hw, 0xe, 0xe);
  548. /* Set CCK/OFDM SIFS to be 10us. */
  549. rtl_write_word(rtlpriv, REG_SIFS_CCK, 0x0a0a);
  550. rtl_write_word(rtlpriv, REG_SIFS_OFDM, 0x1010);
  551. rtl_write_word(rtlpriv, REG_PROT_MODE_CTRL, 0x0204);
  552. rtl_write_dword(rtlpriv, REG_BAR_MODE_CTRL, 0x014004);
  553. /* TXOP */
  554. rtl_write_dword(rtlpriv, REG_EDCA_BE_PARAM, 0x005EA42B);
  555. rtl_write_dword(rtlpriv, REG_EDCA_BK_PARAM, 0x0000A44F);
  556. rtl_write_dword(rtlpriv, REG_EDCA_VI_PARAM, 0x005EA324);
  557. rtl_write_dword(rtlpriv, REG_EDCA_VO_PARAM, 0x002FA226);
  558. /* PIFS */
  559. rtl_write_byte(rtlpriv, REG_PIFS, 0x1C);
  560. /* AGGR BREAK TIME Register */
  561. rtl_write_byte(rtlpriv, REG_AGGR_BREAK_TIME, 0x16);
  562. rtl_write_word(rtlpriv, REG_NAV_PROT_LEN, 0x0040);
  563. rtl_write_byte(rtlpriv, REG_BCNDMATIM, 0x02);
  564. rtl_write_byte(rtlpriv, REG_ATIMWND, 0x02);
  565. }
  566. void rtl92c_init_ampdu_aggregation(struct ieee80211_hw *hw)
  567. {
  568. struct rtl_priv *rtlpriv = rtl_priv(hw);
  569. rtl_write_dword(rtlpriv, REG_AGGLEN_LMT, 0x99997631);
  570. rtl_write_byte(rtlpriv, REG_AGGR_BREAK_TIME, 0x16);
  571. /* init AMPDU aggregation number, tuning for Tx's TP, */
  572. rtl_write_word(rtlpriv, 0x4CA, 0x0708);
  573. }
  574. void rtl92c_init_beacon_max_error(struct ieee80211_hw *hw, bool infra_mode)
  575. {
  576. struct rtl_priv *rtlpriv = rtl_priv(hw);
  577. rtl_write_byte(rtlpriv, REG_BCN_MAX_ERR, 0xFF);
  578. }
  579. void rtl92c_init_rdg_setting(struct ieee80211_hw *hw)
  580. {
  581. struct rtl_priv *rtlpriv = rtl_priv(hw);
  582. rtl_write_byte(rtlpriv, REG_RD_CTRL, 0xFF);
  583. rtl_write_word(rtlpriv, REG_RD_NAV_NXT, 0x200);
  584. rtl_write_byte(rtlpriv, REG_RD_RESP_PKT_TH, 0x05);
  585. }
  586. void rtl92c_init_retry_function(struct ieee80211_hw *hw)
  587. {
  588. u8 value8;
  589. struct rtl_priv *rtlpriv = rtl_priv(hw);
  590. value8 = rtl_read_byte(rtlpriv, REG_FWHW_TXQ_CTRL);
  591. value8 |= EN_AMPDU_RTY_NEW;
  592. rtl_write_byte(rtlpriv, REG_FWHW_TXQ_CTRL, value8);
  593. /* Set ACK timeout */
  594. rtl_write_byte(rtlpriv, REG_ACKTO, 0x40);
  595. }
  596. void rtl92c_init_beacon_parameters(struct ieee80211_hw *hw,
  597. enum version_8192c version)
  598. {
  599. struct rtl_priv *rtlpriv = rtl_priv(hw);
  600. struct rtl_hal *rtlhal = rtl_hal(rtlpriv);
  601. rtl_write_word(rtlpriv, REG_TBTT_PROHIBIT, 0x6404);/* ms */
  602. rtl_write_byte(rtlpriv, REG_DRVERLYINT, DRIVER_EARLY_INT_TIME);/*ms*/
  603. rtl_write_byte(rtlpriv, REG_BCNDMATIM, BCN_DMA_ATIME_INT_TIME);
  604. if (IS_NORMAL_CHIP(rtlhal->version))
  605. rtl_write_word(rtlpriv, REG_BCNTCFG, 0x660F);
  606. else
  607. rtl_write_word(rtlpriv, REG_BCNTCFG, 0x66FF);
  608. }
  609. void rtl92c_disable_fast_edca(struct ieee80211_hw *hw)
  610. {
  611. struct rtl_priv *rtlpriv = rtl_priv(hw);
  612. rtl_write_word(rtlpriv, REG_FAST_EDCA_CTRL, 0);
  613. }
  614. void rtl92c_set_min_space(struct ieee80211_hw *hw, bool is2T)
  615. {
  616. struct rtl_priv *rtlpriv = rtl_priv(hw);
  617. u8 value = is2T ? MAX_MSS_DENSITY_2T : MAX_MSS_DENSITY_1T;
  618. rtl_write_byte(rtlpriv, REG_AMPDU_MIN_SPACE, value);
  619. }
  620. u16 rtl92c_get_mgt_filter(struct ieee80211_hw *hw)
  621. {
  622. struct rtl_priv *rtlpriv = rtl_priv(hw);
  623. return rtl_read_word(rtlpriv, REG_RXFLTMAP0);
  624. }
  625. void rtl92c_set_mgt_filter(struct ieee80211_hw *hw, u16 filter)
  626. {
  627. struct rtl_priv *rtlpriv = rtl_priv(hw);
  628. rtl_write_word(rtlpriv, REG_RXFLTMAP0, filter);
  629. }
  630. u16 rtl92c_get_ctrl_filter(struct ieee80211_hw *hw)
  631. {
  632. struct rtl_priv *rtlpriv = rtl_priv(hw);
  633. return rtl_read_word(rtlpriv, REG_RXFLTMAP1);
  634. }
  635. void rtl92c_set_ctrl_filter(struct ieee80211_hw *hw, u16 filter)
  636. {
  637. struct rtl_priv *rtlpriv = rtl_priv(hw);
  638. rtl_write_word(rtlpriv, REG_RXFLTMAP1, filter);
  639. }
  640. u16 rtl92c_get_data_filter(struct ieee80211_hw *hw)
  641. {
  642. struct rtl_priv *rtlpriv = rtl_priv(hw);
  643. return rtl_read_word(rtlpriv, REG_RXFLTMAP2);
  644. }
  645. void rtl92c_set_data_filter(struct ieee80211_hw *hw, u16 filter)
  646. {
  647. struct rtl_priv *rtlpriv = rtl_priv(hw);
  648. rtl_write_word(rtlpriv, REG_RXFLTMAP2, filter);
  649. }
  650. /*==============================================================*/
  651. static u8 _rtl92c_query_rxpwrpercentage(char antpower)
  652. {
  653. if ((antpower <= -100) || (antpower >= 20))
  654. return 0;
  655. else if (antpower >= 0)
  656. return 100;
  657. else
  658. return 100 + antpower;
  659. }
  660. static u8 _rtl92c_evm_db_to_percentage(char value)
  661. {
  662. char ret_val;
  663. ret_val = value;
  664. if (ret_val >= 0)
  665. ret_val = 0;
  666. if (ret_val <= -33)
  667. ret_val = -33;
  668. ret_val = 0 - ret_val;
  669. ret_val *= 3;
  670. if (ret_val == 99)
  671. ret_val = 100;
  672. return ret_val;
  673. }
  674. static long _rtl92c_translate_todbm(struct ieee80211_hw *hw,
  675. u8 signal_strength_index)
  676. {
  677. long signal_power;
  678. signal_power = (long)((signal_strength_index + 1) >> 1);
  679. signal_power -= 95;
  680. return signal_power;
  681. }
  682. static long _rtl92c_signal_scale_mapping(struct ieee80211_hw *hw,
  683. long currsig)
  684. {
  685. long retsig;
  686. if (currsig >= 61 && currsig <= 100)
  687. retsig = 90 + ((currsig - 60) / 4);
  688. else if (currsig >= 41 && currsig <= 60)
  689. retsig = 78 + ((currsig - 40) / 2);
  690. else if (currsig >= 31 && currsig <= 40)
  691. retsig = 66 + (currsig - 30);
  692. else if (currsig >= 21 && currsig <= 30)
  693. retsig = 54 + (currsig - 20);
  694. else if (currsig >= 5 && currsig <= 20)
  695. retsig = 42 + (((currsig - 5) * 2) / 3);
  696. else if (currsig == 4)
  697. retsig = 36;
  698. else if (currsig == 3)
  699. retsig = 27;
  700. else if (currsig == 2)
  701. retsig = 18;
  702. else if (currsig == 1)
  703. retsig = 9;
  704. else
  705. retsig = currsig;
  706. return retsig;
  707. }
  708. static void _rtl92c_query_rxphystatus(struct ieee80211_hw *hw,
  709. struct rtl_stats *pstats,
  710. struct rx_desc_92c *pdesc,
  711. struct rx_fwinfo_92c *p_drvinfo,
  712. bool packet_match_bssid,
  713. bool packet_toself,
  714. bool packet_beacon)
  715. {
  716. struct rtl_priv *rtlpriv = rtl_priv(hw);
  717. struct rtl_phy *rtlphy = &(rtlpriv->phy);
  718. struct phy_sts_cck_8192s_t *cck_buf;
  719. s8 rx_pwr_all = 0, rx_pwr[4];
  720. u8 rf_rx_num = 0, evm, pwdb_all;
  721. u8 i, max_spatial_stream;
  722. u32 rssi, total_rssi = 0;
  723. bool in_powersavemode = false;
  724. bool is_cck_rate;
  725. is_cck_rate = RX_HAL_IS_CCK_RATE(pdesc);
  726. pstats->packet_matchbssid = packet_match_bssid;
  727. pstats->packet_toself = packet_toself;
  728. pstats->is_cck = is_cck_rate;
  729. pstats->packet_beacon = packet_beacon;
  730. pstats->is_cck = is_cck_rate;
  731. pstats->RX_SIGQ[0] = -1;
  732. pstats->RX_SIGQ[1] = -1;
  733. if (is_cck_rate) {
  734. u8 report, cck_highpwr;
  735. cck_buf = (struct phy_sts_cck_8192s_t *)p_drvinfo;
  736. if (!in_powersavemode)
  737. cck_highpwr = rtlphy->cck_high_power;
  738. else
  739. cck_highpwr = false;
  740. if (!cck_highpwr) {
  741. u8 cck_agc_rpt = cck_buf->cck_agc_rpt;
  742. report = cck_buf->cck_agc_rpt & 0xc0;
  743. report = report >> 6;
  744. switch (report) {
  745. case 0x3:
  746. rx_pwr_all = -46 - (cck_agc_rpt & 0x3e);
  747. break;
  748. case 0x2:
  749. rx_pwr_all = -26 - (cck_agc_rpt & 0x3e);
  750. break;
  751. case 0x1:
  752. rx_pwr_all = -12 - (cck_agc_rpt & 0x3e);
  753. break;
  754. case 0x0:
  755. rx_pwr_all = 16 - (cck_agc_rpt & 0x3e);
  756. break;
  757. }
  758. } else {
  759. u8 cck_agc_rpt = cck_buf->cck_agc_rpt;
  760. report = p_drvinfo->cfosho[0] & 0x60;
  761. report = report >> 5;
  762. switch (report) {
  763. case 0x3:
  764. rx_pwr_all = -46 - ((cck_agc_rpt & 0x1f) << 1);
  765. break;
  766. case 0x2:
  767. rx_pwr_all = -26 - ((cck_agc_rpt & 0x1f) << 1);
  768. break;
  769. case 0x1:
  770. rx_pwr_all = -12 - ((cck_agc_rpt & 0x1f) << 1);
  771. break;
  772. case 0x0:
  773. rx_pwr_all = 16 - ((cck_agc_rpt & 0x1f) << 1);
  774. break;
  775. }
  776. }
  777. pwdb_all = _rtl92c_query_rxpwrpercentage(rx_pwr_all);
  778. pstats->rx_pwdb_all = pwdb_all;
  779. pstats->recvsignalpower = rx_pwr_all;
  780. if (packet_match_bssid) {
  781. u8 sq;
  782. if (pstats->rx_pwdb_all > 40)
  783. sq = 100;
  784. else {
  785. sq = cck_buf->sq_rpt;
  786. if (sq > 64)
  787. sq = 0;
  788. else if (sq < 20)
  789. sq = 100;
  790. else
  791. sq = ((64 - sq) * 100) / 44;
  792. }
  793. pstats->signalquality = sq;
  794. pstats->RX_SIGQ[0] = sq;
  795. pstats->RX_SIGQ[1] = -1;
  796. }
  797. } else {
  798. rtlpriv->dm.rfpath_rxenable[0] =
  799. rtlpriv->dm.rfpath_rxenable[1] = true;
  800. for (i = RF90_PATH_A; i < RF90_PATH_MAX; i++) {
  801. if (rtlpriv->dm.rfpath_rxenable[i])
  802. rf_rx_num++;
  803. rx_pwr[i] =
  804. ((p_drvinfo->gain_trsw[i] & 0x3f) * 2) - 110;
  805. rssi = _rtl92c_query_rxpwrpercentage(rx_pwr[i]);
  806. total_rssi += rssi;
  807. rtlpriv->stats.rx_snr_db[i] =
  808. (long)(p_drvinfo->rxsnr[i] / 2);
  809. if (packet_match_bssid)
  810. pstats->rx_mimo_signalstrength[i] = (u8) rssi;
  811. }
  812. rx_pwr_all = ((p_drvinfo->pwdb_all >> 1) & 0x7f) - 110;
  813. pwdb_all = _rtl92c_query_rxpwrpercentage(rx_pwr_all);
  814. pstats->rx_pwdb_all = pwdb_all;
  815. pstats->rxpower = rx_pwr_all;
  816. pstats->recvsignalpower = rx_pwr_all;
  817. if (GET_RX_DESC_RX_MCS(pdesc) &&
  818. GET_RX_DESC_RX_MCS(pdesc) >= DESC92_RATEMCS8 &&
  819. GET_RX_DESC_RX_MCS(pdesc) <= DESC92_RATEMCS15)
  820. max_spatial_stream = 2;
  821. else
  822. max_spatial_stream = 1;
  823. for (i = 0; i < max_spatial_stream; i++) {
  824. evm = _rtl92c_evm_db_to_percentage(p_drvinfo->rxevm[i]);
  825. if (packet_match_bssid) {
  826. if (i == 0)
  827. pstats->signalquality =
  828. (u8) (evm & 0xff);
  829. pstats->RX_SIGQ[i] =
  830. (u8) (evm & 0xff);
  831. }
  832. }
  833. }
  834. if (is_cck_rate)
  835. pstats->signalstrength =
  836. (u8) (_rtl92c_signal_scale_mapping(hw, pwdb_all));
  837. else if (rf_rx_num != 0)
  838. pstats->signalstrength =
  839. (u8) (_rtl92c_signal_scale_mapping
  840. (hw, total_rssi /= rf_rx_num));
  841. }
  842. static void _rtl92c_process_ui_rssi(struct ieee80211_hw *hw,
  843. struct rtl_stats *pstats)
  844. {
  845. struct rtl_priv *rtlpriv = rtl_priv(hw);
  846. struct rtl_phy *rtlphy = &(rtlpriv->phy);
  847. u8 rfpath;
  848. u32 last_rssi, tmpval;
  849. if (pstats->packet_toself || pstats->packet_beacon) {
  850. rtlpriv->stats.rssi_calculate_cnt++;
  851. if (rtlpriv->stats.ui_rssi.total_num++ >=
  852. PHY_RSSI_SLID_WIN_MAX) {
  853. rtlpriv->stats.ui_rssi.total_num =
  854. PHY_RSSI_SLID_WIN_MAX;
  855. last_rssi =
  856. rtlpriv->stats.ui_rssi.elements[rtlpriv->
  857. stats.ui_rssi.index];
  858. rtlpriv->stats.ui_rssi.total_val -= last_rssi;
  859. }
  860. rtlpriv->stats.ui_rssi.total_val += pstats->signalstrength;
  861. rtlpriv->stats.ui_rssi.elements[rtlpriv->stats.ui_rssi.
  862. index++] = pstats->signalstrength;
  863. if (rtlpriv->stats.ui_rssi.index >= PHY_RSSI_SLID_WIN_MAX)
  864. rtlpriv->stats.ui_rssi.index = 0;
  865. tmpval = rtlpriv->stats.ui_rssi.total_val /
  866. rtlpriv->stats.ui_rssi.total_num;
  867. rtlpriv->stats.signal_strength =
  868. _rtl92c_translate_todbm(hw, (u8) tmpval);
  869. pstats->rssi = rtlpriv->stats.signal_strength;
  870. }
  871. if (!pstats->is_cck && pstats->packet_toself) {
  872. for (rfpath = RF90_PATH_A; rfpath < rtlphy->num_total_rfpath;
  873. rfpath++) {
  874. if (!rtl8192_phy_check_is_legal_rfpath(hw, rfpath))
  875. continue;
  876. if (rtlpriv->stats.rx_rssi_percentage[rfpath] == 0) {
  877. rtlpriv->stats.rx_rssi_percentage[rfpath] =
  878. pstats->rx_mimo_signalstrength[rfpath];
  879. }
  880. if (pstats->rx_mimo_signalstrength[rfpath] >
  881. rtlpriv->stats.rx_rssi_percentage[rfpath]) {
  882. rtlpriv->stats.rx_rssi_percentage[rfpath] =
  883. ((rtlpriv->stats.
  884. rx_rssi_percentage[rfpath] *
  885. (RX_SMOOTH_FACTOR - 1)) +
  886. (pstats->rx_mimo_signalstrength[rfpath])) /
  887. (RX_SMOOTH_FACTOR);
  888. rtlpriv->stats.rx_rssi_percentage[rfpath] =
  889. rtlpriv->stats.rx_rssi_percentage[rfpath] +
  890. 1;
  891. } else {
  892. rtlpriv->stats.rx_rssi_percentage[rfpath] =
  893. ((rtlpriv->stats.
  894. rx_rssi_percentage[rfpath] *
  895. (RX_SMOOTH_FACTOR - 1)) +
  896. (pstats->rx_mimo_signalstrength[rfpath])) /
  897. (RX_SMOOTH_FACTOR);
  898. }
  899. }
  900. }
  901. }
  902. static void _rtl92c_update_rxsignalstatistics(struct ieee80211_hw *hw,
  903. struct rtl_stats *pstats)
  904. {
  905. struct rtl_priv *rtlpriv = rtl_priv(hw);
  906. int weighting = 0;
  907. if (rtlpriv->stats.recv_signal_power == 0)
  908. rtlpriv->stats.recv_signal_power = pstats->recvsignalpower;
  909. if (pstats->recvsignalpower > rtlpriv->stats.recv_signal_power)
  910. weighting = 5;
  911. else if (pstats->recvsignalpower < rtlpriv->stats.recv_signal_power)
  912. weighting = (-5);
  913. rtlpriv->stats.recv_signal_power =
  914. (rtlpriv->stats.recv_signal_power * 5 +
  915. pstats->recvsignalpower + weighting) / 6;
  916. }
  917. static void _rtl92c_process_pwdb(struct ieee80211_hw *hw,
  918. struct rtl_stats *pstats)
  919. {
  920. struct rtl_priv *rtlpriv = rtl_priv(hw);
  921. struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
  922. long undecorated_smoothed_pwdb = 0;
  923. if (mac->opmode == NL80211_IFTYPE_ADHOC) {
  924. return;
  925. } else {
  926. undecorated_smoothed_pwdb =
  927. rtlpriv->dm.undecorated_smoothed_pwdb;
  928. }
  929. if (pstats->packet_toself || pstats->packet_beacon) {
  930. if (undecorated_smoothed_pwdb < 0)
  931. undecorated_smoothed_pwdb = pstats->rx_pwdb_all;
  932. if (pstats->rx_pwdb_all > (u32) undecorated_smoothed_pwdb) {
  933. undecorated_smoothed_pwdb =
  934. (((undecorated_smoothed_pwdb) *
  935. (RX_SMOOTH_FACTOR - 1)) +
  936. (pstats->rx_pwdb_all)) / (RX_SMOOTH_FACTOR);
  937. undecorated_smoothed_pwdb = undecorated_smoothed_pwdb
  938. + 1;
  939. } else {
  940. undecorated_smoothed_pwdb =
  941. (((undecorated_smoothed_pwdb) *
  942. (RX_SMOOTH_FACTOR - 1)) +
  943. (pstats->rx_pwdb_all)) / (RX_SMOOTH_FACTOR);
  944. }
  945. rtlpriv->dm.undecorated_smoothed_pwdb =
  946. undecorated_smoothed_pwdb;
  947. _rtl92c_update_rxsignalstatistics(hw, pstats);
  948. }
  949. }
  950. static void _rtl92c_process_LINK_Q(struct ieee80211_hw *hw,
  951. struct rtl_stats *pstats)
  952. {
  953. struct rtl_priv *rtlpriv = rtl_priv(hw);
  954. u32 last_evm = 0, n_stream, tmpval;
  955. if (pstats->signalquality != 0) {
  956. if (pstats->packet_toself || pstats->packet_beacon) {
  957. if (rtlpriv->stats.LINK_Q.total_num++ >=
  958. PHY_LINKQUALITY_SLID_WIN_MAX) {
  959. rtlpriv->stats.LINK_Q.total_num =
  960. PHY_LINKQUALITY_SLID_WIN_MAX;
  961. last_evm =
  962. rtlpriv->stats.LINK_Q.elements
  963. [rtlpriv->stats.LINK_Q.index];
  964. rtlpriv->stats.LINK_Q.total_val -=
  965. last_evm;
  966. }
  967. rtlpriv->stats.LINK_Q.total_val +=
  968. pstats->signalquality;
  969. rtlpriv->stats.LINK_Q.elements
  970. [rtlpriv->stats.LINK_Q.index++] =
  971. pstats->signalquality;
  972. if (rtlpriv->stats.LINK_Q.index >=
  973. PHY_LINKQUALITY_SLID_WIN_MAX)
  974. rtlpriv->stats.LINK_Q.index = 0;
  975. tmpval = rtlpriv->stats.LINK_Q.total_val /
  976. rtlpriv->stats.LINK_Q.total_num;
  977. rtlpriv->stats.signal_quality = tmpval;
  978. rtlpriv->stats.last_sigstrength_inpercent = tmpval;
  979. for (n_stream = 0; n_stream < 2;
  980. n_stream++) {
  981. if (pstats->RX_SIGQ[n_stream] != -1) {
  982. if (!rtlpriv->stats.RX_EVM[n_stream]) {
  983. rtlpriv->stats.RX_EVM[n_stream]
  984. = pstats->RX_SIGQ[n_stream];
  985. }
  986. rtlpriv->stats.RX_EVM[n_stream] =
  987. ((rtlpriv->stats.RX_EVM
  988. [n_stream] *
  989. (RX_SMOOTH_FACTOR - 1)) +
  990. (pstats->RX_SIGQ
  991. [n_stream] * 1)) /
  992. (RX_SMOOTH_FACTOR);
  993. }
  994. }
  995. }
  996. } else {
  997. ;
  998. }
  999. }
  1000. static void _rtl92c_process_phyinfo(struct ieee80211_hw *hw,
  1001. u8 *buffer,
  1002. struct rtl_stats *pcurrent_stats)
  1003. {
  1004. if (!pcurrent_stats->packet_matchbssid &&
  1005. !pcurrent_stats->packet_beacon)
  1006. return;
  1007. _rtl92c_process_ui_rssi(hw, pcurrent_stats);
  1008. _rtl92c_process_pwdb(hw, pcurrent_stats);
  1009. _rtl92c_process_LINK_Q(hw, pcurrent_stats);
  1010. }
  1011. void rtl92c_translate_rx_signal_stuff(struct ieee80211_hw *hw,
  1012. struct sk_buff *skb,
  1013. struct rtl_stats *pstats,
  1014. struct rx_desc_92c *pdesc,
  1015. struct rx_fwinfo_92c *p_drvinfo)
  1016. {
  1017. struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
  1018. struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw));
  1019. struct ieee80211_hdr *hdr;
  1020. u8 *tmp_buf;
  1021. u8 *praddr;
  1022. __le16 fc;
  1023. u16 type, cpu_fc;
  1024. bool packet_matchbssid, packet_toself, packet_beacon;
  1025. tmp_buf = skb->data + pstats->rx_drvinfo_size + pstats->rx_bufshift;
  1026. hdr = (struct ieee80211_hdr *)tmp_buf;
  1027. fc = hdr->frame_control;
  1028. cpu_fc = le16_to_cpu(fc);
  1029. type = WLAN_FC_GET_TYPE(fc);
  1030. praddr = hdr->addr1;
  1031. packet_matchbssid =
  1032. ((IEEE80211_FTYPE_CTL != type) &&
  1033. (!compare_ether_addr(mac->bssid,
  1034. (cpu_fc & IEEE80211_FCTL_TODS) ?
  1035. hdr->addr1 : (cpu_fc & IEEE80211_FCTL_FROMDS) ?
  1036. hdr->addr2 : hdr->addr3)) &&
  1037. (!pstats->hwerror) && (!pstats->crc) && (!pstats->icv));
  1038. packet_toself = packet_matchbssid &&
  1039. (!compare_ether_addr(praddr, rtlefuse->dev_addr));
  1040. if (ieee80211_is_beacon(fc))
  1041. packet_beacon = true;
  1042. _rtl92c_query_rxphystatus(hw, pstats, pdesc, p_drvinfo,
  1043. packet_matchbssid, packet_toself,
  1044. packet_beacon);
  1045. _rtl92c_process_phyinfo(hw, tmp_buf, pstats);
  1046. }