fw_common.c 24 KB

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  1. /******************************************************************************
  2. *
  3. * Copyright(c) 2009-2010 Realtek Corporation.
  4. *
  5. * This program is free software; you can redistribute it and/or modify it
  6. * under the terms of version 2 of the GNU General Public License as
  7. * published by the Free Software Foundation.
  8. *
  9. * This program is distributed in the hope that it will be useful, but WITHOUT
  10. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  12. * more details.
  13. *
  14. * You should have received a copy of the GNU General Public License along with
  15. * this program; if not, write to the Free Software Foundation, Inc.,
  16. * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  17. *
  18. * The full GNU General Public License is included in this distribution in the
  19. * file called LICENSE.
  20. *
  21. * Contact Information:
  22. * wlanfae <wlanfae@realtek.com>
  23. * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
  24. * Hsinchu 300, Taiwan.
  25. *
  26. * Larry Finger <Larry.Finger@lwfinger.net>
  27. *
  28. *****************************************************************************/
  29. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  30. #include <linux/firmware.h>
  31. #include <linux/export.h>
  32. #include "../wifi.h"
  33. #include "../pci.h"
  34. #include "../base.h"
  35. #include "../rtl8192ce/reg.h"
  36. #include "../rtl8192ce/def.h"
  37. #include "fw_common.h"
  38. static void _rtl92c_enable_fw_download(struct ieee80211_hw *hw, bool enable)
  39. {
  40. struct rtl_priv *rtlpriv = rtl_priv(hw);
  41. struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
  42. if (rtlhal->hw_type == HARDWARE_TYPE_RTL8192CU) {
  43. u32 value32 = rtl_read_dword(rtlpriv, REG_MCUFWDL);
  44. if (enable)
  45. value32 |= MCUFWDL_EN;
  46. else
  47. value32 &= ~MCUFWDL_EN;
  48. rtl_write_dword(rtlpriv, REG_MCUFWDL, value32);
  49. } else if (rtlhal->hw_type == HARDWARE_TYPE_RTL8192CE) {
  50. u8 tmp;
  51. if (enable) {
  52. tmp = rtl_read_byte(rtlpriv, REG_SYS_FUNC_EN + 1);
  53. rtl_write_byte(rtlpriv, REG_SYS_FUNC_EN + 1,
  54. tmp | 0x04);
  55. tmp = rtl_read_byte(rtlpriv, REG_MCUFWDL);
  56. rtl_write_byte(rtlpriv, REG_MCUFWDL, tmp | 0x01);
  57. tmp = rtl_read_byte(rtlpriv, REG_MCUFWDL + 2);
  58. rtl_write_byte(rtlpriv, REG_MCUFWDL + 2, tmp & 0xf7);
  59. } else {
  60. tmp = rtl_read_byte(rtlpriv, REG_MCUFWDL);
  61. rtl_write_byte(rtlpriv, REG_MCUFWDL, tmp & 0xfe);
  62. rtl_write_byte(rtlpriv, REG_MCUFWDL + 1, 0x00);
  63. }
  64. }
  65. }
  66. static void rtl_block_fw_writeN(struct ieee80211_hw *hw, const u8 *buffer,
  67. u32 size)
  68. {
  69. struct rtl_priv *rtlpriv = rtl_priv(hw);
  70. u32 blockSize = REALTEK_USB_VENQT_MAX_BUF_SIZE - 20;
  71. u8 *bufferPtr = (u8 *) buffer;
  72. u32 i, offset, blockCount, remainSize;
  73. blockCount = size / blockSize;
  74. remainSize = size % blockSize;
  75. for (i = 0; i < blockCount; i++) {
  76. offset = i * blockSize;
  77. rtlpriv->io.writeN_sync(rtlpriv,
  78. (FW_8192C_START_ADDRESS + offset),
  79. (void *)(bufferPtr + offset),
  80. blockSize);
  81. }
  82. if (remainSize) {
  83. offset = blockCount * blockSize;
  84. rtlpriv->io.writeN_sync(rtlpriv,
  85. (FW_8192C_START_ADDRESS + offset),
  86. (void *)(bufferPtr + offset),
  87. remainSize);
  88. }
  89. }
  90. static void _rtl92c_fw_block_write(struct ieee80211_hw *hw,
  91. const u8 *buffer, u32 size)
  92. {
  93. struct rtl_priv *rtlpriv = rtl_priv(hw);
  94. u32 blockSize = sizeof(u32);
  95. u8 *bufferPtr = (u8 *) buffer;
  96. u32 *pu4BytePtr = (u32 *) buffer;
  97. u32 i, offset, blockCount, remainSize;
  98. u32 data;
  99. if (rtlpriv->io.writeN_sync) {
  100. rtl_block_fw_writeN(hw, buffer, size);
  101. return;
  102. }
  103. blockCount = size / blockSize;
  104. remainSize = size % blockSize;
  105. if (remainSize) {
  106. /* the last word is < 4 bytes - pad it with zeros */
  107. for (i = 0; i < 4 - remainSize; i++)
  108. *(bufferPtr + size + i) = 0;
  109. blockCount++;
  110. }
  111. for (i = 0; i < blockCount; i++) {
  112. offset = i * blockSize;
  113. /* for big-endian platforms, the firmware data need to be byte
  114. * swapped as it was read as a byte string and will be written
  115. * as 32-bit dwords and byte swapped when written
  116. */
  117. data = le32_to_cpu(*(__le32 *)(pu4BytePtr + i));
  118. rtl_write_dword(rtlpriv, (FW_8192C_START_ADDRESS + offset),
  119. data);
  120. }
  121. }
  122. static void _rtl92c_fw_page_write(struct ieee80211_hw *hw,
  123. u32 page, const u8 *buffer, u32 size)
  124. {
  125. struct rtl_priv *rtlpriv = rtl_priv(hw);
  126. u8 value8;
  127. u8 u8page = (u8) (page & 0x07);
  128. value8 = (rtl_read_byte(rtlpriv, REG_MCUFWDL + 2) & 0xF8) | u8page;
  129. rtl_write_byte(rtlpriv, (REG_MCUFWDL + 2), value8);
  130. _rtl92c_fw_block_write(hw, buffer, size);
  131. }
  132. static void _rtl92c_fill_dummy(u8 *pfwbuf, u32 *pfwlen)
  133. {
  134. u32 fwlen = *pfwlen;
  135. u8 remain = (u8) (fwlen % 4);
  136. remain = (remain == 0) ? 0 : (4 - remain);
  137. while (remain > 0) {
  138. pfwbuf[fwlen] = 0;
  139. fwlen++;
  140. remain--;
  141. }
  142. *pfwlen = fwlen;
  143. }
  144. static void _rtl92c_write_fw(struct ieee80211_hw *hw,
  145. enum version_8192c version, u8 *buffer, u32 size)
  146. {
  147. struct rtl_priv *rtlpriv = rtl_priv(hw);
  148. struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
  149. u8 *bufferPtr = (u8 *) buffer;
  150. RT_TRACE(rtlpriv, COMP_FW, DBG_TRACE, ("FW size is %d bytes,\n", size));
  151. if (IS_CHIP_VER_B(version)) {
  152. u32 pageNums, remainSize;
  153. u32 page, offset;
  154. if (IS_HARDWARE_TYPE_8192CE(rtlhal))
  155. _rtl92c_fill_dummy(bufferPtr, &size);
  156. pageNums = size / FW_8192C_PAGE_SIZE;
  157. remainSize = size % FW_8192C_PAGE_SIZE;
  158. if (pageNums > 4) {
  159. RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
  160. ("Page numbers should not greater then 4\n"));
  161. }
  162. for (page = 0; page < pageNums; page++) {
  163. offset = page * FW_8192C_PAGE_SIZE;
  164. _rtl92c_fw_page_write(hw, page, (bufferPtr + offset),
  165. FW_8192C_PAGE_SIZE);
  166. }
  167. if (remainSize) {
  168. offset = pageNums * FW_8192C_PAGE_SIZE;
  169. page = pageNums;
  170. _rtl92c_fw_page_write(hw, page, (bufferPtr + offset),
  171. remainSize);
  172. }
  173. } else {
  174. _rtl92c_fw_block_write(hw, buffer, size);
  175. }
  176. }
  177. static int _rtl92c_fw_free_to_go(struct ieee80211_hw *hw)
  178. {
  179. struct rtl_priv *rtlpriv = rtl_priv(hw);
  180. u32 counter = 0;
  181. u32 value32;
  182. do {
  183. value32 = rtl_read_dword(rtlpriv, REG_MCUFWDL);
  184. } while ((counter++ < FW_8192C_POLLING_TIMEOUT_COUNT) &&
  185. (!(value32 & FWDL_ChkSum_rpt)));
  186. if (counter >= FW_8192C_POLLING_TIMEOUT_COUNT) {
  187. RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
  188. ("chksum report faill ! REG_MCUFWDL:0x%08x .\n",
  189. value32));
  190. return -EIO;
  191. }
  192. RT_TRACE(rtlpriv, COMP_FW, DBG_TRACE,
  193. ("Checksum report OK ! REG_MCUFWDL:0x%08x .\n", value32));
  194. value32 = rtl_read_dword(rtlpriv, REG_MCUFWDL);
  195. value32 |= MCUFWDL_RDY;
  196. value32 &= ~WINTINI_RDY;
  197. rtl_write_dword(rtlpriv, REG_MCUFWDL, value32);
  198. counter = 0;
  199. do {
  200. value32 = rtl_read_dword(rtlpriv, REG_MCUFWDL);
  201. if (value32 & WINTINI_RDY) {
  202. RT_TRACE(rtlpriv, COMP_FW, DBG_TRACE,
  203. ("Polling FW ready success!!"
  204. " REG_MCUFWDL:0x%08x .\n",
  205. value32));
  206. return 0;
  207. }
  208. mdelay(FW_8192C_POLLING_DELAY);
  209. } while (counter++ < FW_8192C_POLLING_TIMEOUT_COUNT);
  210. RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
  211. ("Polling FW ready fail!! REG_MCUFWDL:0x%08x .\n", value32));
  212. return -EIO;
  213. }
  214. int rtl92c_download_fw(struct ieee80211_hw *hw)
  215. {
  216. struct rtl_priv *rtlpriv = rtl_priv(hw);
  217. struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
  218. struct rtl92c_firmware_header *pfwheader;
  219. u8 *pfwdata;
  220. u32 fwsize;
  221. enum version_8192c version = rtlhal->version;
  222. if (!rtlhal->pfirmware)
  223. return 1;
  224. pr_info("Loading firmware file %s\n", rtlpriv->cfg->fw_name);
  225. pfwheader = (struct rtl92c_firmware_header *)rtlhal->pfirmware;
  226. pfwdata = (u8 *) rtlhal->pfirmware;
  227. fwsize = rtlhal->fwsize;
  228. if (IS_FW_HEADER_EXIST(pfwheader)) {
  229. RT_TRACE(rtlpriv, COMP_FW, DBG_DMESG,
  230. ("Firmware Version(%d), Signature(%#x),Size(%d)\n",
  231. le16_to_cpu(pfwheader->version),
  232. le16_to_cpu(pfwheader->signature),
  233. (uint)sizeof(struct rtl92c_firmware_header)));
  234. pfwdata = pfwdata + sizeof(struct rtl92c_firmware_header);
  235. fwsize = fwsize - sizeof(struct rtl92c_firmware_header);
  236. }
  237. _rtl92c_enable_fw_download(hw, true);
  238. _rtl92c_write_fw(hw, version, pfwdata, fwsize);
  239. _rtl92c_enable_fw_download(hw, false);
  240. if (_rtl92c_fw_free_to_go(hw)) {
  241. RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
  242. ("Firmware is not ready to run!\n"));
  243. } else {
  244. RT_TRACE(rtlpriv, COMP_FW, DBG_TRACE,
  245. ("Firmware is ready to run!\n"));
  246. }
  247. return 0;
  248. }
  249. EXPORT_SYMBOL(rtl92c_download_fw);
  250. static bool _rtl92c_check_fw_read_last_h2c(struct ieee80211_hw *hw, u8 boxnum)
  251. {
  252. struct rtl_priv *rtlpriv = rtl_priv(hw);
  253. u8 val_hmetfr, val_mcutst_1;
  254. bool result = false;
  255. val_hmetfr = rtl_read_byte(rtlpriv, REG_HMETFR);
  256. val_mcutst_1 = rtl_read_byte(rtlpriv, (REG_MCUTST_1 + boxnum));
  257. if (((val_hmetfr >> boxnum) & BIT(0)) == 0 && val_mcutst_1 == 0)
  258. result = true;
  259. return result;
  260. }
  261. static void _rtl92c_fill_h2c_command(struct ieee80211_hw *hw,
  262. u8 element_id, u32 cmd_len, u8 *p_cmdbuffer)
  263. {
  264. struct rtl_priv *rtlpriv = rtl_priv(hw);
  265. struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
  266. u8 boxnum;
  267. u16 box_reg = 0, box_extreg = 0;
  268. u8 u1b_tmp;
  269. bool isfw_read = false;
  270. bool bwrite_sucess = false;
  271. u8 wait_h2c_limmit = 100;
  272. u8 wait_writeh2c_limmit = 100;
  273. u8 boxcontent[4], boxextcontent[2];
  274. u32 h2c_waitcounter = 0;
  275. unsigned long flag;
  276. u8 idx;
  277. RT_TRACE(rtlpriv, COMP_CMD, DBG_LOUD, ("come in\n"));
  278. while (true) {
  279. spin_lock_irqsave(&rtlpriv->locks.h2c_lock, flag);
  280. if (rtlhal->h2c_setinprogress) {
  281. RT_TRACE(rtlpriv, COMP_CMD, DBG_LOUD,
  282. ("H2C set in progress! Wait to set.."
  283. "element_id(%d).\n", element_id));
  284. while (rtlhal->h2c_setinprogress) {
  285. spin_unlock_irqrestore(&rtlpriv->locks.h2c_lock,
  286. flag);
  287. h2c_waitcounter++;
  288. RT_TRACE(rtlpriv, COMP_CMD, DBG_LOUD,
  289. ("Wait 100 us (%d times)...\n",
  290. h2c_waitcounter));
  291. udelay(100);
  292. if (h2c_waitcounter > 1000)
  293. return;
  294. spin_lock_irqsave(&rtlpriv->locks.h2c_lock,
  295. flag);
  296. }
  297. spin_unlock_irqrestore(&rtlpriv->locks.h2c_lock, flag);
  298. } else {
  299. rtlhal->h2c_setinprogress = true;
  300. spin_unlock_irqrestore(&rtlpriv->locks.h2c_lock, flag);
  301. break;
  302. }
  303. }
  304. while (!bwrite_sucess) {
  305. wait_writeh2c_limmit--;
  306. if (wait_writeh2c_limmit == 0) {
  307. RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
  308. ("Write H2C fail because no trigger "
  309. "for FW INT!\n"));
  310. break;
  311. }
  312. boxnum = rtlhal->last_hmeboxnum;
  313. switch (boxnum) {
  314. case 0:
  315. box_reg = REG_HMEBOX_0;
  316. box_extreg = REG_HMEBOX_EXT_0;
  317. break;
  318. case 1:
  319. box_reg = REG_HMEBOX_1;
  320. box_extreg = REG_HMEBOX_EXT_1;
  321. break;
  322. case 2:
  323. box_reg = REG_HMEBOX_2;
  324. box_extreg = REG_HMEBOX_EXT_2;
  325. break;
  326. case 3:
  327. box_reg = REG_HMEBOX_3;
  328. box_extreg = REG_HMEBOX_EXT_3;
  329. break;
  330. default:
  331. RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
  332. ("switch case not process\n"));
  333. break;
  334. }
  335. isfw_read = _rtl92c_check_fw_read_last_h2c(hw, boxnum);
  336. while (!isfw_read) {
  337. wait_h2c_limmit--;
  338. if (wait_h2c_limmit == 0) {
  339. RT_TRACE(rtlpriv, COMP_CMD, DBG_LOUD,
  340. ("Wating too long for FW read "
  341. "clear HMEBox(%d)!\n", boxnum));
  342. break;
  343. }
  344. udelay(10);
  345. isfw_read = _rtl92c_check_fw_read_last_h2c(hw, boxnum);
  346. u1b_tmp = rtl_read_byte(rtlpriv, 0x1BF);
  347. RT_TRACE(rtlpriv, COMP_CMD, DBG_LOUD,
  348. ("Wating for FW read clear HMEBox(%d)!!! "
  349. "0x1BF = %2x\n", boxnum, u1b_tmp));
  350. }
  351. if (!isfw_read) {
  352. RT_TRACE(rtlpriv, COMP_CMD, DBG_LOUD,
  353. ("Write H2C register BOX[%d] fail!!!!! "
  354. "Fw do not read.\n", boxnum));
  355. break;
  356. }
  357. memset(boxcontent, 0, sizeof(boxcontent));
  358. memset(boxextcontent, 0, sizeof(boxextcontent));
  359. boxcontent[0] = element_id;
  360. RT_TRACE(rtlpriv, COMP_CMD, DBG_LOUD,
  361. ("Write element_id box_reg(%4x) = %2x\n",
  362. box_reg, element_id));
  363. switch (cmd_len) {
  364. case 1:
  365. boxcontent[0] &= ~(BIT(7));
  366. memcpy((u8 *) (boxcontent) + 1,
  367. p_cmdbuffer, 1);
  368. for (idx = 0; idx < 4; idx++) {
  369. rtl_write_byte(rtlpriv, box_reg + idx,
  370. boxcontent[idx]);
  371. }
  372. break;
  373. case 2:
  374. boxcontent[0] &= ~(BIT(7));
  375. memcpy((u8 *) (boxcontent) + 1,
  376. p_cmdbuffer, 2);
  377. for (idx = 0; idx < 4; idx++) {
  378. rtl_write_byte(rtlpriv, box_reg + idx,
  379. boxcontent[idx]);
  380. }
  381. break;
  382. case 3:
  383. boxcontent[0] &= ~(BIT(7));
  384. memcpy((u8 *) (boxcontent) + 1,
  385. p_cmdbuffer, 3);
  386. for (idx = 0; idx < 4; idx++) {
  387. rtl_write_byte(rtlpriv, box_reg + idx,
  388. boxcontent[idx]);
  389. }
  390. break;
  391. case 4:
  392. boxcontent[0] |= (BIT(7));
  393. memcpy((u8 *) (boxextcontent),
  394. p_cmdbuffer, 2);
  395. memcpy((u8 *) (boxcontent) + 1,
  396. p_cmdbuffer + 2, 2);
  397. for (idx = 0; idx < 2; idx++) {
  398. rtl_write_byte(rtlpriv, box_extreg + idx,
  399. boxextcontent[idx]);
  400. }
  401. for (idx = 0; idx < 4; idx++) {
  402. rtl_write_byte(rtlpriv, box_reg + idx,
  403. boxcontent[idx]);
  404. }
  405. break;
  406. case 5:
  407. boxcontent[0] |= (BIT(7));
  408. memcpy((u8 *) (boxextcontent),
  409. p_cmdbuffer, 2);
  410. memcpy((u8 *) (boxcontent) + 1,
  411. p_cmdbuffer + 2, 3);
  412. for (idx = 0; idx < 2; idx++) {
  413. rtl_write_byte(rtlpriv, box_extreg + idx,
  414. boxextcontent[idx]);
  415. }
  416. for (idx = 0; idx < 4; idx++) {
  417. rtl_write_byte(rtlpriv, box_reg + idx,
  418. boxcontent[idx]);
  419. }
  420. break;
  421. default:
  422. RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
  423. ("switch case not process\n"));
  424. break;
  425. }
  426. bwrite_sucess = true;
  427. rtlhal->last_hmeboxnum = boxnum + 1;
  428. if (rtlhal->last_hmeboxnum == 4)
  429. rtlhal->last_hmeboxnum = 0;
  430. RT_TRACE(rtlpriv, COMP_CMD, DBG_LOUD,
  431. ("pHalData->last_hmeboxnum = %d\n",
  432. rtlhal->last_hmeboxnum));
  433. }
  434. spin_lock_irqsave(&rtlpriv->locks.h2c_lock, flag);
  435. rtlhal->h2c_setinprogress = false;
  436. spin_unlock_irqrestore(&rtlpriv->locks.h2c_lock, flag);
  437. RT_TRACE(rtlpriv, COMP_CMD, DBG_LOUD, ("go out\n"));
  438. }
  439. void rtl92c_fill_h2c_cmd(struct ieee80211_hw *hw,
  440. u8 element_id, u32 cmd_len, u8 *p_cmdbuffer)
  441. {
  442. struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
  443. u32 tmp_cmdbuf[2];
  444. if (rtlhal->fw_ready == false) {
  445. RT_ASSERT(false, ("return H2C cmd because of Fw "
  446. "download fail!!!\n"));
  447. return;
  448. }
  449. memset(tmp_cmdbuf, 0, 8);
  450. memcpy(tmp_cmdbuf, p_cmdbuffer, cmd_len);
  451. _rtl92c_fill_h2c_command(hw, element_id, cmd_len, (u8 *)&tmp_cmdbuf);
  452. return;
  453. }
  454. EXPORT_SYMBOL(rtl92c_fill_h2c_cmd);
  455. void rtl92c_firmware_selfreset(struct ieee80211_hw *hw)
  456. {
  457. u8 u1b_tmp;
  458. u8 delay = 100;
  459. struct rtl_priv *rtlpriv = rtl_priv(hw);
  460. rtl_write_byte(rtlpriv, REG_HMETFR + 3, 0x20);
  461. u1b_tmp = rtl_read_byte(rtlpriv, REG_SYS_FUNC_EN + 1);
  462. while (u1b_tmp & BIT(2)) {
  463. delay--;
  464. if (delay == 0) {
  465. RT_ASSERT(false, ("8051 reset fail.\n"));
  466. break;
  467. }
  468. udelay(50);
  469. u1b_tmp = rtl_read_byte(rtlpriv, REG_SYS_FUNC_EN + 1);
  470. }
  471. }
  472. EXPORT_SYMBOL(rtl92c_firmware_selfreset);
  473. void rtl92c_set_fw_pwrmode_cmd(struct ieee80211_hw *hw, u8 mode)
  474. {
  475. struct rtl_priv *rtlpriv = rtl_priv(hw);
  476. u8 u1_h2c_set_pwrmode[3] = {0};
  477. struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
  478. RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD, ("FW LPS mode = %d\n", mode));
  479. SET_H2CCMD_PWRMODE_PARM_MODE(u1_h2c_set_pwrmode, mode);
  480. SET_H2CCMD_PWRMODE_PARM_SMART_PS(u1_h2c_set_pwrmode, 1);
  481. SET_H2CCMD_PWRMODE_PARM_BCN_PASS_TIME(u1_h2c_set_pwrmode,
  482. ppsc->reg_max_lps_awakeintvl);
  483. RT_PRINT_DATA(rtlpriv, COMP_CMD, DBG_DMESG,
  484. "rtl92c_set_fw_rsvdpagepkt(): u1_h2c_set_pwrmode\n",
  485. u1_h2c_set_pwrmode, 3);
  486. rtl92c_fill_h2c_cmd(hw, H2C_SETPWRMODE, 3, u1_h2c_set_pwrmode);
  487. }
  488. EXPORT_SYMBOL(rtl92c_set_fw_pwrmode_cmd);
  489. static bool _rtl92c_cmd_send_packet(struct ieee80211_hw *hw,
  490. struct sk_buff *skb)
  491. {
  492. struct rtl_priv *rtlpriv = rtl_priv(hw);
  493. struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
  494. struct rtl8192_tx_ring *ring;
  495. struct rtl_tx_desc *pdesc;
  496. unsigned long flags;
  497. struct sk_buff *pskb = NULL;
  498. ring = &rtlpci->tx_ring[BEACON_QUEUE];
  499. pskb = __skb_dequeue(&ring->queue);
  500. if (pskb)
  501. kfree_skb(pskb);
  502. spin_lock_irqsave(&rtlpriv->locks.irq_th_lock, flags);
  503. pdesc = &ring->desc[0];
  504. rtlpriv->cfg->ops->fill_tx_cmddesc(hw, (u8 *) pdesc, 1, 1, skb);
  505. __skb_queue_tail(&ring->queue, skb);
  506. spin_unlock_irqrestore(&rtlpriv->locks.irq_th_lock, flags);
  507. rtlpriv->cfg->ops->tx_polling(hw, BEACON_QUEUE);
  508. return true;
  509. }
  510. #define BEACON_PG 0 /*->1*/
  511. #define PSPOLL_PG 2
  512. #define NULL_PG 3
  513. #define PROBERSP_PG 4 /*->5*/
  514. #define TOTAL_RESERVED_PKT_LEN 768
  515. static u8 reserved_page_packet[TOTAL_RESERVED_PKT_LEN] = {
  516. /* page 0 beacon */
  517. 0x80, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF,
  518. 0xFF, 0xFF, 0x00, 0xE0, 0x4C, 0x76, 0x00, 0x42,
  519. 0x00, 0x40, 0x10, 0x10, 0x00, 0x03, 0x50, 0x08,
  520. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  521. 0x64, 0x00, 0x00, 0x04, 0x00, 0x0C, 0x6C, 0x69,
  522. 0x6E, 0x6B, 0x73, 0x79, 0x73, 0x5F, 0x77, 0x6C,
  523. 0x61, 0x6E, 0x01, 0x04, 0x82, 0x84, 0x8B, 0x96,
  524. 0x03, 0x01, 0x01, 0x06, 0x02, 0x00, 0x00, 0x2A,
  525. 0x01, 0x00, 0x32, 0x08, 0x24, 0x30, 0x48, 0x6C,
  526. 0x0C, 0x12, 0x18, 0x60, 0x2D, 0x1A, 0x6C, 0x18,
  527. 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  528. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  529. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  530. 0x3D, 0x00, 0xDD, 0x06, 0x00, 0xE0, 0x4C, 0x02,
  531. 0x01, 0x70, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  532. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  533. /* page 1 beacon */
  534. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  535. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  536. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  537. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  538. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  539. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  540. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  541. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  542. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  543. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  544. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  545. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  546. 0x10, 0x00, 0x20, 0x8C, 0x00, 0x12, 0x10, 0x00,
  547. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  548. 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  549. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  550. /* page 2 ps-poll */
  551. 0xA4, 0x10, 0x01, 0xC0, 0x00, 0x40, 0x10, 0x10,
  552. 0x00, 0x03, 0x00, 0xE0, 0x4C, 0x76, 0x00, 0x42,
  553. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  554. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  555. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  556. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  557. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  558. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  559. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  560. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  561. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  562. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  563. 0x18, 0x00, 0x20, 0x8C, 0x00, 0x12, 0x00, 0x00,
  564. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80,
  565. 0x80, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  566. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  567. /* page 3 null */
  568. 0x48, 0x01, 0x00, 0x00, 0x00, 0x40, 0x10, 0x10,
  569. 0x00, 0x03, 0x00, 0xE0, 0x4C, 0x76, 0x00, 0x42,
  570. 0x00, 0x40, 0x10, 0x10, 0x00, 0x03, 0x00, 0x00,
  571. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  572. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  573. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  574. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  575. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  576. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  577. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  578. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  579. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  580. 0x72, 0x00, 0x20, 0x8C, 0x00, 0x12, 0x00, 0x00,
  581. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80,
  582. 0x80, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  583. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  584. /* page 4 probe_resp */
  585. 0x50, 0x00, 0x00, 0x00, 0x00, 0x40, 0x10, 0x10,
  586. 0x00, 0x03, 0x00, 0xE0, 0x4C, 0x76, 0x00, 0x42,
  587. 0x00, 0x40, 0x10, 0x10, 0x00, 0x03, 0x00, 0x00,
  588. 0x9E, 0x46, 0x15, 0x32, 0x27, 0xF2, 0x2D, 0x00,
  589. 0x64, 0x00, 0x00, 0x04, 0x00, 0x0C, 0x6C, 0x69,
  590. 0x6E, 0x6B, 0x73, 0x79, 0x73, 0x5F, 0x77, 0x6C,
  591. 0x61, 0x6E, 0x01, 0x04, 0x82, 0x84, 0x8B, 0x96,
  592. 0x03, 0x01, 0x01, 0x06, 0x02, 0x00, 0x00, 0x2A,
  593. 0x01, 0x00, 0x32, 0x08, 0x24, 0x30, 0x48, 0x6C,
  594. 0x0C, 0x12, 0x18, 0x60, 0x2D, 0x1A, 0x6C, 0x18,
  595. 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  596. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  597. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  598. 0x3D, 0x00, 0xDD, 0x06, 0x00, 0xE0, 0x4C, 0x02,
  599. 0x01, 0x70, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  600. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  601. /* page 5 probe_resp */
  602. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  603. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  604. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  605. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  606. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  607. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  608. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  609. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  610. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  611. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  612. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  613. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  614. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  615. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  616. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  617. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  618. };
  619. void rtl92c_set_fw_rsvdpagepkt(struct ieee80211_hw *hw, bool dl_finished)
  620. {
  621. struct rtl_priv *rtlpriv = rtl_priv(hw);
  622. struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
  623. struct sk_buff *skb = NULL;
  624. u32 totalpacketlen;
  625. bool rtstatus;
  626. u8 u1RsvdPageLoc[3] = {0};
  627. bool dlok = false;
  628. u8 *beacon;
  629. u8 *pspoll;
  630. u8 *nullfunc;
  631. u8 *probersp;
  632. /*---------------------------------------------------------
  633. (1) beacon
  634. ---------------------------------------------------------*/
  635. beacon = &reserved_page_packet[BEACON_PG * 128];
  636. SET_80211_HDR_ADDRESS2(beacon, mac->mac_addr);
  637. SET_80211_HDR_ADDRESS3(beacon, mac->bssid);
  638. /*-------------------------------------------------------
  639. (2) ps-poll
  640. --------------------------------------------------------*/
  641. pspoll = &reserved_page_packet[PSPOLL_PG * 128];
  642. SET_80211_PS_POLL_AID(pspoll, (mac->assoc_id | 0xc000));
  643. SET_80211_PS_POLL_BSSID(pspoll, mac->bssid);
  644. SET_80211_PS_POLL_TA(pspoll, mac->mac_addr);
  645. SET_H2CCMD_RSVDPAGE_LOC_PSPOLL(u1RsvdPageLoc, PSPOLL_PG);
  646. /*--------------------------------------------------------
  647. (3) null data
  648. ---------------------------------------------------------*/
  649. nullfunc = &reserved_page_packet[NULL_PG * 128];
  650. SET_80211_HDR_ADDRESS1(nullfunc, mac->bssid);
  651. SET_80211_HDR_ADDRESS2(nullfunc, mac->mac_addr);
  652. SET_80211_HDR_ADDRESS3(nullfunc, mac->bssid);
  653. SET_H2CCMD_RSVDPAGE_LOC_NULL_DATA(u1RsvdPageLoc, NULL_PG);
  654. /*---------------------------------------------------------
  655. (4) probe response
  656. ----------------------------------------------------------*/
  657. probersp = &reserved_page_packet[PROBERSP_PG * 128];
  658. SET_80211_HDR_ADDRESS1(probersp, mac->bssid);
  659. SET_80211_HDR_ADDRESS2(probersp, mac->mac_addr);
  660. SET_80211_HDR_ADDRESS3(probersp, mac->bssid);
  661. SET_H2CCMD_RSVDPAGE_LOC_PROBE_RSP(u1RsvdPageLoc, PROBERSP_PG);
  662. totalpacketlen = TOTAL_RESERVED_PKT_LEN;
  663. RT_PRINT_DATA(rtlpriv, COMP_CMD, DBG_LOUD,
  664. "rtl92c_set_fw_rsvdpagepkt(): HW_VAR_SET_TX_CMD: ALL\n",
  665. &reserved_page_packet[0], totalpacketlen);
  666. RT_PRINT_DATA(rtlpriv, COMP_CMD, DBG_DMESG,
  667. "rtl92c_set_fw_rsvdpagepkt(): HW_VAR_SET_TX_CMD: ALL\n",
  668. u1RsvdPageLoc, 3);
  669. skb = dev_alloc_skb(totalpacketlen);
  670. memcpy((u8 *) skb_put(skb, totalpacketlen),
  671. &reserved_page_packet, totalpacketlen);
  672. rtstatus = _rtl92c_cmd_send_packet(hw, skb);
  673. if (rtstatus)
  674. dlok = true;
  675. if (dlok) {
  676. RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD,
  677. ("Set RSVD page location to Fw.\n"));
  678. RT_PRINT_DATA(rtlpriv, COMP_CMD, DBG_DMESG,
  679. "H2C_RSVDPAGE:\n",
  680. u1RsvdPageLoc, 3);
  681. rtl92c_fill_h2c_cmd(hw, H2C_RSVDPAGE,
  682. sizeof(u1RsvdPageLoc), u1RsvdPageLoc);
  683. } else
  684. RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
  685. ("Set RSVD page location to Fw FAIL!!!!!!.\n"));
  686. }
  687. EXPORT_SYMBOL(rtl92c_set_fw_rsvdpagepkt);
  688. void rtl92c_set_fw_joinbss_report_cmd(struct ieee80211_hw *hw, u8 mstatus)
  689. {
  690. u8 u1_joinbssrpt_parm[1] = {0};
  691. SET_H2CCMD_JOINBSSRPT_PARM_OPMODE(u1_joinbssrpt_parm, mstatus);
  692. rtl92c_fill_h2c_cmd(hw, H2C_JOINBSSRPT, 1, u1_joinbssrpt_parm);
  693. }
  694. EXPORT_SYMBOL(rtl92c_set_fw_joinbss_report_cmd);