3945-mac.c 106 KB

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  1. /******************************************************************************
  2. *
  3. * Copyright(c) 2003 - 2011 Intel Corporation. All rights reserved.
  4. *
  5. * Portions of this file are derived from the ipw3945 project, as well
  6. * as portions of the ieee80211 subsystem header files.
  7. *
  8. * This program is free software; you can redistribute it and/or modify it
  9. * under the terms of version 2 of the GNU General Public License as
  10. * published by the Free Software Foundation.
  11. *
  12. * This program is distributed in the hope that it will be useful, but WITHOUT
  13. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  14. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  15. * more details.
  16. *
  17. * You should have received a copy of the GNU General Public License along with
  18. * this program; if not, write to the Free Software Foundation, Inc.,
  19. * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  20. *
  21. * The full GNU General Public License is included in this distribution in the
  22. * file called LICENSE.
  23. *
  24. * Contact Information:
  25. * Intel Linux Wireless <ilw@linux.intel.com>
  26. * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  27. *
  28. *****************************************************************************/
  29. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  30. #include <linux/kernel.h>
  31. #include <linux/module.h>
  32. #include <linux/init.h>
  33. #include <linux/pci.h>
  34. #include <linux/pci-aspm.h>
  35. #include <linux/slab.h>
  36. #include <linux/dma-mapping.h>
  37. #include <linux/delay.h>
  38. #include <linux/sched.h>
  39. #include <linux/skbuff.h>
  40. #include <linux/netdevice.h>
  41. #include <linux/firmware.h>
  42. #include <linux/etherdevice.h>
  43. #include <linux/if_arp.h>
  44. #include <net/ieee80211_radiotap.h>
  45. #include <net/mac80211.h>
  46. #include <asm/div64.h>
  47. #define DRV_NAME "iwl3945"
  48. #include "commands.h"
  49. #include "common.h"
  50. #include "3945.h"
  51. #include "iwl-spectrum.h"
  52. /*
  53. * module name, copyright, version, etc.
  54. */
  55. #define DRV_DESCRIPTION \
  56. "Intel(R) PRO/Wireless 3945ABG/BG Network Connection driver for Linux"
  57. #ifdef CONFIG_IWLEGACY_DEBUG
  58. #define VD "d"
  59. #else
  60. #define VD
  61. #endif
  62. /*
  63. * add "s" to indicate spectrum measurement included.
  64. * we add it here to be consistent with previous releases in which
  65. * this was configurable.
  66. */
  67. #define DRV_VERSION IWLWIFI_VERSION VD "s"
  68. #define DRV_COPYRIGHT "Copyright(c) 2003-2011 Intel Corporation"
  69. #define DRV_AUTHOR "<ilw@linux.intel.com>"
  70. MODULE_DESCRIPTION(DRV_DESCRIPTION);
  71. MODULE_VERSION(DRV_VERSION);
  72. MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
  73. MODULE_LICENSE("GPL");
  74. /* module parameters */
  75. struct il_mod_params il3945_mod_params = {
  76. .sw_crypto = 1,
  77. .restart_fw = 1,
  78. .disable_hw_scan = 1,
  79. /* the rest are 0 by default */
  80. };
  81. /**
  82. * il3945_get_antenna_flags - Get antenna flags for RXON command
  83. * @il: eeprom and antenna fields are used to determine antenna flags
  84. *
  85. * il->eeprom39 is used to determine if antenna AUX/MAIN are reversed
  86. * il3945_mod_params.antenna specifies the antenna diversity mode:
  87. *
  88. * IL_ANTENNA_DIVERSITY - NIC selects best antenna by itself
  89. * IL_ANTENNA_MAIN - Force MAIN antenna
  90. * IL_ANTENNA_AUX - Force AUX antenna
  91. */
  92. __le32
  93. il3945_get_antenna_flags(const struct il_priv *il)
  94. {
  95. struct il3945_eeprom *eeprom = (struct il3945_eeprom *)il->eeprom;
  96. switch (il3945_mod_params.antenna) {
  97. case IL_ANTENNA_DIVERSITY:
  98. return 0;
  99. case IL_ANTENNA_MAIN:
  100. if (eeprom->antenna_switch_type)
  101. return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
  102. return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
  103. case IL_ANTENNA_AUX:
  104. if (eeprom->antenna_switch_type)
  105. return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
  106. return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
  107. }
  108. /* bad antenna selector value */
  109. IL_ERR("Bad antenna selector value (0x%x)\n",
  110. il3945_mod_params.antenna);
  111. return 0; /* "diversity" is default if error */
  112. }
  113. static int
  114. il3945_set_ccmp_dynamic_key_info(struct il_priv *il,
  115. struct ieee80211_key_conf *keyconf, u8 sta_id)
  116. {
  117. unsigned long flags;
  118. __le16 key_flags = 0;
  119. int ret;
  120. key_flags |= (STA_KEY_FLG_CCMP | STA_KEY_FLG_MAP_KEY_MSK);
  121. key_flags |= cpu_to_le16(keyconf->keyidx << STA_KEY_FLG_KEYID_POS);
  122. if (sta_id == il->ctx.bcast_sta_id)
  123. key_flags |= STA_KEY_MULTICAST_MSK;
  124. keyconf->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
  125. keyconf->hw_key_idx = keyconf->keyidx;
  126. key_flags &= ~STA_KEY_FLG_INVALID;
  127. spin_lock_irqsave(&il->sta_lock, flags);
  128. il->stations[sta_id].keyinfo.cipher = keyconf->cipher;
  129. il->stations[sta_id].keyinfo.keylen = keyconf->keylen;
  130. memcpy(il->stations[sta_id].keyinfo.key, keyconf->key, keyconf->keylen);
  131. memcpy(il->stations[sta_id].sta.key.key, keyconf->key, keyconf->keylen);
  132. if ((il->stations[sta_id].sta.key.
  133. key_flags & STA_KEY_FLG_ENCRYPT_MSK) == STA_KEY_FLG_NO_ENC)
  134. il->stations[sta_id].sta.key.key_offset =
  135. il_get_free_ucode_key_idx(il);
  136. /* else, we are overriding an existing key => no need to allocated room
  137. * in uCode. */
  138. WARN(il->stations[sta_id].sta.key.key_offset == WEP_INVALID_OFFSET,
  139. "no space for a new key");
  140. il->stations[sta_id].sta.key.key_flags = key_flags;
  141. il->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
  142. il->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
  143. D_INFO("hwcrypto: modify ucode station key info\n");
  144. ret = il_send_add_sta(il, &il->stations[sta_id].sta, CMD_ASYNC);
  145. spin_unlock_irqrestore(&il->sta_lock, flags);
  146. return ret;
  147. }
  148. static int
  149. il3945_set_tkip_dynamic_key_info(struct il_priv *il,
  150. struct ieee80211_key_conf *keyconf, u8 sta_id)
  151. {
  152. return -EOPNOTSUPP;
  153. }
  154. static int
  155. il3945_set_wep_dynamic_key_info(struct il_priv *il,
  156. struct ieee80211_key_conf *keyconf, u8 sta_id)
  157. {
  158. return -EOPNOTSUPP;
  159. }
  160. static int
  161. il3945_clear_sta_key_info(struct il_priv *il, u8 sta_id)
  162. {
  163. unsigned long flags;
  164. struct il_addsta_cmd sta_cmd;
  165. spin_lock_irqsave(&il->sta_lock, flags);
  166. memset(&il->stations[sta_id].keyinfo, 0, sizeof(struct il_hw_key));
  167. memset(&il->stations[sta_id].sta.key, 0, sizeof(struct il4965_keyinfo));
  168. il->stations[sta_id].sta.key.key_flags = STA_KEY_FLG_NO_ENC;
  169. il->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
  170. il->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
  171. memcpy(&sta_cmd, &il->stations[sta_id].sta,
  172. sizeof(struct il_addsta_cmd));
  173. spin_unlock_irqrestore(&il->sta_lock, flags);
  174. D_INFO("hwcrypto: clear ucode station key info\n");
  175. return il_send_add_sta(il, &sta_cmd, CMD_SYNC);
  176. }
  177. static int
  178. il3945_set_dynamic_key(struct il_priv *il, struct ieee80211_key_conf *keyconf,
  179. u8 sta_id)
  180. {
  181. int ret = 0;
  182. keyconf->hw_key_idx = HW_KEY_DYNAMIC;
  183. switch (keyconf->cipher) {
  184. case WLAN_CIPHER_SUITE_CCMP:
  185. ret = il3945_set_ccmp_dynamic_key_info(il, keyconf, sta_id);
  186. break;
  187. case WLAN_CIPHER_SUITE_TKIP:
  188. ret = il3945_set_tkip_dynamic_key_info(il, keyconf, sta_id);
  189. break;
  190. case WLAN_CIPHER_SUITE_WEP40:
  191. case WLAN_CIPHER_SUITE_WEP104:
  192. ret = il3945_set_wep_dynamic_key_info(il, keyconf, sta_id);
  193. break;
  194. default:
  195. IL_ERR("Unknown alg: %s alg=%x\n", __func__, keyconf->cipher);
  196. ret = -EINVAL;
  197. }
  198. D_WEP("Set dynamic key: alg=%x len=%d idx=%d sta=%d ret=%d\n",
  199. keyconf->cipher, keyconf->keylen, keyconf->keyidx, sta_id, ret);
  200. return ret;
  201. }
  202. static int
  203. il3945_remove_static_key(struct il_priv *il)
  204. {
  205. int ret = -EOPNOTSUPP;
  206. return ret;
  207. }
  208. static int
  209. il3945_set_static_key(struct il_priv *il, struct ieee80211_key_conf *key)
  210. {
  211. if (key->cipher == WLAN_CIPHER_SUITE_WEP40 ||
  212. key->cipher == WLAN_CIPHER_SUITE_WEP104)
  213. return -EOPNOTSUPP;
  214. IL_ERR("Static key invalid: cipher %x\n", key->cipher);
  215. return -EINVAL;
  216. }
  217. static void
  218. il3945_clear_free_frames(struct il_priv *il)
  219. {
  220. struct list_head *element;
  221. D_INFO("%d frames on pre-allocated heap on clear.\n", il->frames_count);
  222. while (!list_empty(&il->free_frames)) {
  223. element = il->free_frames.next;
  224. list_del(element);
  225. kfree(list_entry(element, struct il3945_frame, list));
  226. il->frames_count--;
  227. }
  228. if (il->frames_count) {
  229. IL_WARN("%d frames still in use. Did we lose one?\n",
  230. il->frames_count);
  231. il->frames_count = 0;
  232. }
  233. }
  234. static struct il3945_frame *
  235. il3945_get_free_frame(struct il_priv *il)
  236. {
  237. struct il3945_frame *frame;
  238. struct list_head *element;
  239. if (list_empty(&il->free_frames)) {
  240. frame = kzalloc(sizeof(*frame), GFP_KERNEL);
  241. if (!frame) {
  242. IL_ERR("Could not allocate frame!\n");
  243. return NULL;
  244. }
  245. il->frames_count++;
  246. return frame;
  247. }
  248. element = il->free_frames.next;
  249. list_del(element);
  250. return list_entry(element, struct il3945_frame, list);
  251. }
  252. static void
  253. il3945_free_frame(struct il_priv *il, struct il3945_frame *frame)
  254. {
  255. memset(frame, 0, sizeof(*frame));
  256. list_add(&frame->list, &il->free_frames);
  257. }
  258. unsigned int
  259. il3945_fill_beacon_frame(struct il_priv *il, struct ieee80211_hdr *hdr,
  260. int left)
  261. {
  262. if (!il_is_associated(il) || !il->beacon_skb)
  263. return 0;
  264. if (il->beacon_skb->len > left)
  265. return 0;
  266. memcpy(hdr, il->beacon_skb->data, il->beacon_skb->len);
  267. return il->beacon_skb->len;
  268. }
  269. static int
  270. il3945_send_beacon_cmd(struct il_priv *il)
  271. {
  272. struct il3945_frame *frame;
  273. unsigned int frame_size;
  274. int rc;
  275. u8 rate;
  276. frame = il3945_get_free_frame(il);
  277. if (!frame) {
  278. IL_ERR("Could not obtain free frame buffer for beacon "
  279. "command.\n");
  280. return -ENOMEM;
  281. }
  282. rate = il_get_lowest_plcp(il, &il->ctx);
  283. frame_size = il3945_hw_get_beacon_cmd(il, frame, rate);
  284. rc = il_send_cmd_pdu(il, C_TX_BEACON, frame_size, &frame->u.cmd[0]);
  285. il3945_free_frame(il, frame);
  286. return rc;
  287. }
  288. static void
  289. il3945_unset_hw_params(struct il_priv *il)
  290. {
  291. if (il->_3945.shared_virt)
  292. dma_free_coherent(&il->pci_dev->dev,
  293. sizeof(struct il3945_shared),
  294. il->_3945.shared_virt, il->_3945.shared_phys);
  295. }
  296. static void
  297. il3945_build_tx_cmd_hwcrypto(struct il_priv *il, struct ieee80211_tx_info *info,
  298. struct il_device_cmd *cmd,
  299. struct sk_buff *skb_frag, int sta_id)
  300. {
  301. struct il3945_tx_cmd *tx_cmd = (struct il3945_tx_cmd *)cmd->cmd.payload;
  302. struct il_hw_key *keyinfo = &il->stations[sta_id].keyinfo;
  303. tx_cmd->sec_ctl = 0;
  304. switch (keyinfo->cipher) {
  305. case WLAN_CIPHER_SUITE_CCMP:
  306. tx_cmd->sec_ctl = TX_CMD_SEC_CCM;
  307. memcpy(tx_cmd->key, keyinfo->key, keyinfo->keylen);
  308. D_TX("tx_cmd with AES hwcrypto\n");
  309. break;
  310. case WLAN_CIPHER_SUITE_TKIP:
  311. break;
  312. case WLAN_CIPHER_SUITE_WEP104:
  313. tx_cmd->sec_ctl |= TX_CMD_SEC_KEY128;
  314. /* fall through */
  315. case WLAN_CIPHER_SUITE_WEP40:
  316. tx_cmd->sec_ctl |=
  317. TX_CMD_SEC_WEP | (info->control.hw_key->
  318. hw_key_idx & TX_CMD_SEC_MSK) <<
  319. TX_CMD_SEC_SHIFT;
  320. memcpy(&tx_cmd->key[3], keyinfo->key, keyinfo->keylen);
  321. D_TX("Configuring packet for WEP encryption " "with key %d\n",
  322. info->control.hw_key->hw_key_idx);
  323. break;
  324. default:
  325. IL_ERR("Unknown encode cipher %x\n", keyinfo->cipher);
  326. break;
  327. }
  328. }
  329. /*
  330. * handle build C_TX command notification.
  331. */
  332. static void
  333. il3945_build_tx_cmd_basic(struct il_priv *il, struct il_device_cmd *cmd,
  334. struct ieee80211_tx_info *info,
  335. struct ieee80211_hdr *hdr, u8 std_id)
  336. {
  337. struct il3945_tx_cmd *tx_cmd = (struct il3945_tx_cmd *)cmd->cmd.payload;
  338. __le32 tx_flags = tx_cmd->tx_flags;
  339. __le16 fc = hdr->frame_control;
  340. tx_cmd->stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
  341. if (!(info->flags & IEEE80211_TX_CTL_NO_ACK)) {
  342. tx_flags |= TX_CMD_FLG_ACK_MSK;
  343. if (ieee80211_is_mgmt(fc))
  344. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  345. if (ieee80211_is_probe_resp(fc) &&
  346. !(le16_to_cpu(hdr->seq_ctrl) & 0xf))
  347. tx_flags |= TX_CMD_FLG_TSF_MSK;
  348. } else {
  349. tx_flags &= (~TX_CMD_FLG_ACK_MSK);
  350. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  351. }
  352. tx_cmd->sta_id = std_id;
  353. if (ieee80211_has_morefrags(fc))
  354. tx_flags |= TX_CMD_FLG_MORE_FRAG_MSK;
  355. if (ieee80211_is_data_qos(fc)) {
  356. u8 *qc = ieee80211_get_qos_ctl(hdr);
  357. tx_cmd->tid_tspec = qc[0] & 0xf;
  358. tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK;
  359. } else {
  360. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  361. }
  362. il_tx_cmd_protection(il, info, fc, &tx_flags);
  363. tx_flags &= ~(TX_CMD_FLG_ANT_SEL_MSK);
  364. if (ieee80211_is_mgmt(fc)) {
  365. if (ieee80211_is_assoc_req(fc) || ieee80211_is_reassoc_req(fc))
  366. tx_cmd->timeout.pm_frame_timeout = cpu_to_le16(3);
  367. else
  368. tx_cmd->timeout.pm_frame_timeout = cpu_to_le16(2);
  369. } else {
  370. tx_cmd->timeout.pm_frame_timeout = 0;
  371. }
  372. tx_cmd->driver_txop = 0;
  373. tx_cmd->tx_flags = tx_flags;
  374. tx_cmd->next_frame_len = 0;
  375. }
  376. /*
  377. * start C_TX command process
  378. */
  379. static int
  380. il3945_tx_skb(struct il_priv *il, struct sk_buff *skb)
  381. {
  382. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
  383. struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
  384. struct il3945_tx_cmd *tx_cmd;
  385. struct il_tx_queue *txq = NULL;
  386. struct il_queue *q = NULL;
  387. struct il_device_cmd *out_cmd;
  388. struct il_cmd_meta *out_meta;
  389. dma_addr_t phys_addr;
  390. dma_addr_t txcmd_phys;
  391. int txq_id = skb_get_queue_mapping(skb);
  392. u16 len, idx, hdr_len;
  393. u8 id;
  394. u8 unicast;
  395. u8 sta_id;
  396. u8 tid = 0;
  397. __le16 fc;
  398. u8 wait_write_ptr = 0;
  399. unsigned long flags;
  400. spin_lock_irqsave(&il->lock, flags);
  401. if (il_is_rfkill(il)) {
  402. D_DROP("Dropping - RF KILL\n");
  403. goto drop_unlock;
  404. }
  405. if ((ieee80211_get_tx_rate(il->hw, info)->hw_value & 0xFF) ==
  406. IL_INVALID_RATE) {
  407. IL_ERR("ERROR: No TX rate available.\n");
  408. goto drop_unlock;
  409. }
  410. unicast = !is_multicast_ether_addr(hdr->addr1);
  411. id = 0;
  412. fc = hdr->frame_control;
  413. #ifdef CONFIG_IWLEGACY_DEBUG
  414. if (ieee80211_is_auth(fc))
  415. D_TX("Sending AUTH frame\n");
  416. else if (ieee80211_is_assoc_req(fc))
  417. D_TX("Sending ASSOC frame\n");
  418. else if (ieee80211_is_reassoc_req(fc))
  419. D_TX("Sending REASSOC frame\n");
  420. #endif
  421. spin_unlock_irqrestore(&il->lock, flags);
  422. hdr_len = ieee80211_hdrlen(fc);
  423. /* Find idx into station table for destination station */
  424. sta_id = il_sta_id_or_broadcast(il, &il->ctx, info->control.sta);
  425. if (sta_id == IL_INVALID_STATION) {
  426. D_DROP("Dropping - INVALID STATION: %pM\n", hdr->addr1);
  427. goto drop;
  428. }
  429. D_RATE("station Id %d\n", sta_id);
  430. if (ieee80211_is_data_qos(fc)) {
  431. u8 *qc = ieee80211_get_qos_ctl(hdr);
  432. tid = qc[0] & IEEE80211_QOS_CTL_TID_MASK;
  433. if (unlikely(tid >= MAX_TID_COUNT))
  434. goto drop;
  435. }
  436. /* Descriptor for chosen Tx queue */
  437. txq = &il->txq[txq_id];
  438. q = &txq->q;
  439. if ((il_queue_space(q) < q->high_mark))
  440. goto drop;
  441. spin_lock_irqsave(&il->lock, flags);
  442. idx = il_get_cmd_idx(q, q->write_ptr, 0);
  443. /* Set up driver data for this TFD */
  444. memset(&(txq->txb[q->write_ptr]), 0, sizeof(struct il_tx_info));
  445. txq->txb[q->write_ptr].skb = skb;
  446. txq->txb[q->write_ptr].ctx = &il->ctx;
  447. /* Init first empty entry in queue's array of Tx/cmd buffers */
  448. out_cmd = txq->cmd[idx];
  449. out_meta = &txq->meta[idx];
  450. tx_cmd = (struct il3945_tx_cmd *)out_cmd->cmd.payload;
  451. memset(&out_cmd->hdr, 0, sizeof(out_cmd->hdr));
  452. memset(tx_cmd, 0, sizeof(*tx_cmd));
  453. /*
  454. * Set up the Tx-command (not MAC!) header.
  455. * Store the chosen Tx queue and TFD idx within the sequence field;
  456. * after Tx, uCode's Tx response will return this value so driver can
  457. * locate the frame within the tx queue and do post-tx processing.
  458. */
  459. out_cmd->hdr.cmd = C_TX;
  460. out_cmd->hdr.sequence =
  461. cpu_to_le16((u16)
  462. (QUEUE_TO_SEQ(txq_id) | IDX_TO_SEQ(q->write_ptr)));
  463. /* Copy MAC header from skb into command buffer */
  464. memcpy(tx_cmd->hdr, hdr, hdr_len);
  465. if (info->control.hw_key)
  466. il3945_build_tx_cmd_hwcrypto(il, info, out_cmd, skb, sta_id);
  467. /* TODO need this for burst mode later on */
  468. il3945_build_tx_cmd_basic(il, out_cmd, info, hdr, sta_id);
  469. il3945_hw_build_tx_cmd_rate(il, out_cmd, info, hdr, sta_id);
  470. /* Total # bytes to be transmitted */
  471. len = (u16) skb->len;
  472. tx_cmd->len = cpu_to_le16(len);
  473. il_dbg_log_tx_data_frame(il, len, hdr);
  474. il_update_stats(il, true, fc, len);
  475. tx_cmd->tx_flags &= ~TX_CMD_FLG_ANT_A_MSK;
  476. tx_cmd->tx_flags &= ~TX_CMD_FLG_ANT_B_MSK;
  477. if (!ieee80211_has_morefrags(hdr->frame_control)) {
  478. txq->need_update = 1;
  479. } else {
  480. wait_write_ptr = 1;
  481. txq->need_update = 0;
  482. }
  483. D_TX("sequence nr = 0X%x\n", le16_to_cpu(out_cmd->hdr.sequence));
  484. D_TX("tx_flags = 0X%x\n", le32_to_cpu(tx_cmd->tx_flags));
  485. il_print_hex_dump(il, IL_DL_TX, tx_cmd, sizeof(*tx_cmd));
  486. il_print_hex_dump(il, IL_DL_TX, (u8 *) tx_cmd->hdr,
  487. ieee80211_hdrlen(fc));
  488. /*
  489. * Use the first empty entry in this queue's command buffer array
  490. * to contain the Tx command and MAC header concatenated together
  491. * (payload data will be in another buffer).
  492. * Size of this varies, due to varying MAC header length.
  493. * If end is not dword aligned, we'll have 2 extra bytes at the end
  494. * of the MAC header (device reads on dword boundaries).
  495. * We'll tell device about this padding later.
  496. */
  497. len =
  498. sizeof(struct il3945_tx_cmd) + sizeof(struct il_cmd_header) +
  499. hdr_len;
  500. len = (len + 3) & ~3;
  501. /* Physical address of this Tx command's header (not MAC header!),
  502. * within command buffer array. */
  503. txcmd_phys =
  504. pci_map_single(il->pci_dev, &out_cmd->hdr, len, PCI_DMA_TODEVICE);
  505. /* we do not map meta data ... so we can safely access address to
  506. * provide to unmap command*/
  507. dma_unmap_addr_set(out_meta, mapping, txcmd_phys);
  508. dma_unmap_len_set(out_meta, len, len);
  509. /* Add buffer containing Tx command and MAC(!) header to TFD's
  510. * first entry */
  511. il->cfg->ops->lib->txq_attach_buf_to_tfd(il, txq, txcmd_phys, len, 1,
  512. 0);
  513. /* Set up TFD's 2nd entry to point directly to remainder of skb,
  514. * if any (802.11 null frames have no payload). */
  515. len = skb->len - hdr_len;
  516. if (len) {
  517. phys_addr =
  518. pci_map_single(il->pci_dev, skb->data + hdr_len, len,
  519. PCI_DMA_TODEVICE);
  520. il->cfg->ops->lib->txq_attach_buf_to_tfd(il, txq, phys_addr,
  521. len, 0, U32_PAD(len));
  522. }
  523. /* Tell device the write idx *just past* this latest filled TFD */
  524. q->write_ptr = il_queue_inc_wrap(q->write_ptr, q->n_bd);
  525. il_txq_update_write_ptr(il, txq);
  526. spin_unlock_irqrestore(&il->lock, flags);
  527. if (il_queue_space(q) < q->high_mark && il->mac80211_registered) {
  528. if (wait_write_ptr) {
  529. spin_lock_irqsave(&il->lock, flags);
  530. txq->need_update = 1;
  531. il_txq_update_write_ptr(il, txq);
  532. spin_unlock_irqrestore(&il->lock, flags);
  533. }
  534. il_stop_queue(il, txq);
  535. }
  536. return 0;
  537. drop_unlock:
  538. spin_unlock_irqrestore(&il->lock, flags);
  539. drop:
  540. return -1;
  541. }
  542. static int
  543. il3945_get_measurement(struct il_priv *il,
  544. struct ieee80211_measurement_params *params, u8 type)
  545. {
  546. struct il_spectrum_cmd spectrum;
  547. struct il_rx_pkt *pkt;
  548. struct il_host_cmd cmd = {
  549. .id = C_SPECTRUM_MEASUREMENT,
  550. .data = (void *)&spectrum,
  551. .flags = CMD_WANT_SKB,
  552. };
  553. u32 add_time = le64_to_cpu(params->start_time);
  554. int rc;
  555. int spectrum_resp_status;
  556. int duration = le16_to_cpu(params->duration);
  557. struct il_rxon_context *ctx = &il->ctx;
  558. if (il_is_associated(il))
  559. add_time =
  560. il_usecs_to_beacons(il,
  561. le64_to_cpu(params->start_time) -
  562. il->_3945.last_tsf,
  563. le16_to_cpu(ctx->timing.
  564. beacon_interval));
  565. memset(&spectrum, 0, sizeof(spectrum));
  566. spectrum.channel_count = cpu_to_le16(1);
  567. spectrum.flags =
  568. RXON_FLG_TSF2HOST_MSK | RXON_FLG_ANT_A_MSK | RXON_FLG_DIS_DIV_MSK;
  569. spectrum.filter_flags = MEASUREMENT_FILTER_FLAG;
  570. cmd.len = sizeof(spectrum);
  571. spectrum.len = cpu_to_le16(cmd.len - sizeof(spectrum.len));
  572. if (il_is_associated(il))
  573. spectrum.start_time =
  574. il_add_beacon_time(il, il->_3945.last_beacon_time, add_time,
  575. le16_to_cpu(ctx->timing.
  576. beacon_interval));
  577. else
  578. spectrum.start_time = 0;
  579. spectrum.channels[0].duration = cpu_to_le32(duration * TIME_UNIT);
  580. spectrum.channels[0].channel = params->channel;
  581. spectrum.channels[0].type = type;
  582. if (ctx->active.flags & RXON_FLG_BAND_24G_MSK)
  583. spectrum.flags |=
  584. RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK |
  585. RXON_FLG_TGG_PROTECT_MSK;
  586. rc = il_send_cmd_sync(il, &cmd);
  587. if (rc)
  588. return rc;
  589. pkt = (struct il_rx_pkt *)cmd.reply_page;
  590. if (pkt->hdr.flags & IL_CMD_FAILED_MSK) {
  591. IL_ERR("Bad return from N_RX_ON_ASSOC command\n");
  592. rc = -EIO;
  593. }
  594. spectrum_resp_status = le16_to_cpu(pkt->u.spectrum.status);
  595. switch (spectrum_resp_status) {
  596. case 0: /* Command will be handled */
  597. if (pkt->u.spectrum.id != 0xff) {
  598. D_INFO("Replaced existing measurement: %d\n",
  599. pkt->u.spectrum.id);
  600. il->measurement_status &= ~MEASUREMENT_READY;
  601. }
  602. il->measurement_status |= MEASUREMENT_ACTIVE;
  603. rc = 0;
  604. break;
  605. case 1: /* Command will not be handled */
  606. rc = -EAGAIN;
  607. break;
  608. }
  609. il_free_pages(il, cmd.reply_page);
  610. return rc;
  611. }
  612. static void
  613. il3945_hdl_alive(struct il_priv *il, struct il_rx_buf *rxb)
  614. {
  615. struct il_rx_pkt *pkt = rxb_addr(rxb);
  616. struct il_alive_resp *palive;
  617. struct delayed_work *pwork;
  618. palive = &pkt->u.alive_frame;
  619. D_INFO("Alive ucode status 0x%08X revision " "0x%01X 0x%01X\n",
  620. palive->is_valid, palive->ver_type, palive->ver_subtype);
  621. if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
  622. D_INFO("Initialization Alive received.\n");
  623. memcpy(&il->card_alive_init, &pkt->u.alive_frame,
  624. sizeof(struct il_alive_resp));
  625. pwork = &il->init_alive_start;
  626. } else {
  627. D_INFO("Runtime Alive received.\n");
  628. memcpy(&il->card_alive, &pkt->u.alive_frame,
  629. sizeof(struct il_alive_resp));
  630. pwork = &il->alive_start;
  631. il3945_disable_events(il);
  632. }
  633. /* We delay the ALIVE response by 5ms to
  634. * give the HW RF Kill time to activate... */
  635. if (palive->is_valid == UCODE_VALID_OK)
  636. queue_delayed_work(il->workqueue, pwork, msecs_to_jiffies(5));
  637. else
  638. IL_WARN("uCode did not respond OK.\n");
  639. }
  640. static void
  641. il3945_hdl_add_sta(struct il_priv *il, struct il_rx_buf *rxb)
  642. {
  643. #ifdef CONFIG_IWLEGACY_DEBUG
  644. struct il_rx_pkt *pkt = rxb_addr(rxb);
  645. #endif
  646. D_RX("Received C_ADD_STA: 0x%02X\n", pkt->u.status);
  647. }
  648. static void
  649. il3945_hdl_beacon(struct il_priv *il, struct il_rx_buf *rxb)
  650. {
  651. struct il_rx_pkt *pkt = rxb_addr(rxb);
  652. struct il3945_beacon_notif *beacon = &(pkt->u.beacon_status);
  653. #ifdef CONFIG_IWLEGACY_DEBUG
  654. u8 rate = beacon->beacon_notify_hdr.rate;
  655. D_RX("beacon status %x retries %d iss %d " "tsf %d %d rate %d\n",
  656. le32_to_cpu(beacon->beacon_notify_hdr.status) & TX_STATUS_MSK,
  657. beacon->beacon_notify_hdr.failure_frame,
  658. le32_to_cpu(beacon->ibss_mgr_status),
  659. le32_to_cpu(beacon->high_tsf), le32_to_cpu(beacon->low_tsf), rate);
  660. #endif
  661. il->ibss_manager = le32_to_cpu(beacon->ibss_mgr_status);
  662. }
  663. /* Handle notification from uCode that card's power state is changing
  664. * due to software, hardware, or critical temperature RFKILL */
  665. static void
  666. il3945_hdl_card_state(struct il_priv *il, struct il_rx_buf *rxb)
  667. {
  668. struct il_rx_pkt *pkt = rxb_addr(rxb);
  669. u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
  670. unsigned long status = il->status;
  671. IL_WARN("Card state received: HW:%s SW:%s\n",
  672. (flags & HW_CARD_DISABLED) ? "Kill" : "On",
  673. (flags & SW_CARD_DISABLED) ? "Kill" : "On");
  674. _il_wr(il, CSR_UCODE_DRV_GP1_SET, CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  675. if (flags & HW_CARD_DISABLED)
  676. set_bit(S_RF_KILL_HW, &il->status);
  677. else
  678. clear_bit(S_RF_KILL_HW, &il->status);
  679. il_scan_cancel(il);
  680. if ((test_bit(S_RF_KILL_HW, &status) !=
  681. test_bit(S_RF_KILL_HW, &il->status)))
  682. wiphy_rfkill_set_hw_state(il->hw->wiphy,
  683. test_bit(S_RF_KILL_HW, &il->status));
  684. else
  685. wake_up(&il->wait_command_queue);
  686. }
  687. /**
  688. * il3945_setup_handlers - Initialize Rx handler callbacks
  689. *
  690. * Setup the RX handlers for each of the reply types sent from the uCode
  691. * to the host.
  692. *
  693. * This function chains into the hardware specific files for them to setup
  694. * any hardware specific handlers as well.
  695. */
  696. static void
  697. il3945_setup_handlers(struct il_priv *il)
  698. {
  699. il->handlers[N_ALIVE] = il3945_hdl_alive;
  700. il->handlers[C_ADD_STA] = il3945_hdl_add_sta;
  701. il->handlers[N_ERROR] = il_hdl_error;
  702. il->handlers[N_CHANNEL_SWITCH] = il_hdl_csa;
  703. il->handlers[N_SPECTRUM_MEASUREMENT] = il_hdl_spectrum_measurement;
  704. il->handlers[N_PM_SLEEP] = il_hdl_pm_sleep;
  705. il->handlers[N_PM_DEBUG_STATS] = il_hdl_pm_debug_stats;
  706. il->handlers[N_BEACON] = il3945_hdl_beacon;
  707. /*
  708. * The same handler is used for both the REPLY to a discrete
  709. * stats request from the host as well as for the periodic
  710. * stats notifications (after received beacons) from the uCode.
  711. */
  712. il->handlers[C_STATS] = il3945_hdl_c_stats;
  713. il->handlers[N_STATS] = il3945_hdl_stats;
  714. il_setup_rx_scan_handlers(il);
  715. il->handlers[N_CARD_STATE] = il3945_hdl_card_state;
  716. /* Set up hardware specific Rx handlers */
  717. il3945_hw_handler_setup(il);
  718. }
  719. /************************** RX-FUNCTIONS ****************************/
  720. /*
  721. * Rx theory of operation
  722. *
  723. * The host allocates 32 DMA target addresses and passes the host address
  724. * to the firmware at register IL_RFDS_TBL_LOWER + N * RFD_SIZE where N is
  725. * 0 to 31
  726. *
  727. * Rx Queue Indexes
  728. * The host/firmware share two idx registers for managing the Rx buffers.
  729. *
  730. * The READ idx maps to the first position that the firmware may be writing
  731. * to -- the driver can read up to (but not including) this position and get
  732. * good data.
  733. * The READ idx is managed by the firmware once the card is enabled.
  734. *
  735. * The WRITE idx maps to the last position the driver has read from -- the
  736. * position preceding WRITE is the last slot the firmware can place a packet.
  737. *
  738. * The queue is empty (no good data) if WRITE = READ - 1, and is full if
  739. * WRITE = READ.
  740. *
  741. * During initialization, the host sets up the READ queue position to the first
  742. * IDX position, and WRITE to the last (READ - 1 wrapped)
  743. *
  744. * When the firmware places a packet in a buffer, it will advance the READ idx
  745. * and fire the RX interrupt. The driver can then query the READ idx and
  746. * process as many packets as possible, moving the WRITE idx forward as it
  747. * resets the Rx queue buffers with new memory.
  748. *
  749. * The management in the driver is as follows:
  750. * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When
  751. * iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
  752. * to replenish the iwl->rxq->rx_free.
  753. * + In il3945_rx_replenish (scheduled) if 'processed' != 'read' then the
  754. * iwl->rxq is replenished and the READ IDX is updated (updating the
  755. * 'processed' and 'read' driver idxes as well)
  756. * + A received packet is processed and handed to the kernel network stack,
  757. * detached from the iwl->rxq. The driver 'processed' idx is updated.
  758. * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
  759. * list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
  760. * IDX is not incremented and iwl->status(RX_STALLED) is set. If there
  761. * were enough free buffers and RX_STALLED is set it is cleared.
  762. *
  763. *
  764. * Driver sequence:
  765. *
  766. * il3945_rx_replenish() Replenishes rx_free list from rx_used, and calls
  767. * il3945_rx_queue_restock
  768. * il3945_rx_queue_restock() Moves available buffers from rx_free into Rx
  769. * queue, updates firmware pointers, and updates
  770. * the WRITE idx. If insufficient rx_free buffers
  771. * are available, schedules il3945_rx_replenish
  772. *
  773. * -- enable interrupts --
  774. * ISR - il3945_rx() Detach il_rx_bufs from pool up to the
  775. * READ IDX, detaching the SKB from the pool.
  776. * Moves the packet buffer from queue to rx_used.
  777. * Calls il3945_rx_queue_restock to refill any empty
  778. * slots.
  779. * ...
  780. *
  781. */
  782. /**
  783. * il3945_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr
  784. */
  785. static inline __le32
  786. il3945_dma_addr2rbd_ptr(struct il_priv *il, dma_addr_t dma_addr)
  787. {
  788. return cpu_to_le32((u32) dma_addr);
  789. }
  790. /**
  791. * il3945_rx_queue_restock - refill RX queue from pre-allocated pool
  792. *
  793. * If there are slots in the RX queue that need to be restocked,
  794. * and we have free pre-allocated buffers, fill the ranks as much
  795. * as we can, pulling from rx_free.
  796. *
  797. * This moves the 'write' idx forward to catch up with 'processed', and
  798. * also updates the memory address in the firmware to reference the new
  799. * target buffer.
  800. */
  801. static void
  802. il3945_rx_queue_restock(struct il_priv *il)
  803. {
  804. struct il_rx_queue *rxq = &il->rxq;
  805. struct list_head *element;
  806. struct il_rx_buf *rxb;
  807. unsigned long flags;
  808. int write;
  809. spin_lock_irqsave(&rxq->lock, flags);
  810. write = rxq->write & ~0x7;
  811. while (il_rx_queue_space(rxq) > 0 && rxq->free_count) {
  812. /* Get next free Rx buffer, remove from free list */
  813. element = rxq->rx_free.next;
  814. rxb = list_entry(element, struct il_rx_buf, list);
  815. list_del(element);
  816. /* Point to Rx buffer via next RBD in circular buffer */
  817. rxq->bd[rxq->write] =
  818. il3945_dma_addr2rbd_ptr(il, rxb->page_dma);
  819. rxq->queue[rxq->write] = rxb;
  820. rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
  821. rxq->free_count--;
  822. }
  823. spin_unlock_irqrestore(&rxq->lock, flags);
  824. /* If the pre-allocated buffer pool is dropping low, schedule to
  825. * refill it */
  826. if (rxq->free_count <= RX_LOW_WATERMARK)
  827. queue_work(il->workqueue, &il->rx_replenish);
  828. /* If we've added more space for the firmware to place data, tell it.
  829. * Increment device's write pointer in multiples of 8. */
  830. if (rxq->write_actual != (rxq->write & ~0x7) ||
  831. abs(rxq->write - rxq->read) > 7) {
  832. spin_lock_irqsave(&rxq->lock, flags);
  833. rxq->need_update = 1;
  834. spin_unlock_irqrestore(&rxq->lock, flags);
  835. il_rx_queue_update_write_ptr(il, rxq);
  836. }
  837. }
  838. /**
  839. * il3945_rx_replenish - Move all used packet from rx_used to rx_free
  840. *
  841. * When moving to rx_free an SKB is allocated for the slot.
  842. *
  843. * Also restock the Rx queue via il3945_rx_queue_restock.
  844. * This is called as a scheduled work item (except for during initialization)
  845. */
  846. static void
  847. il3945_rx_allocate(struct il_priv *il, gfp_t priority)
  848. {
  849. struct il_rx_queue *rxq = &il->rxq;
  850. struct list_head *element;
  851. struct il_rx_buf *rxb;
  852. struct page *page;
  853. unsigned long flags;
  854. gfp_t gfp_mask = priority;
  855. while (1) {
  856. spin_lock_irqsave(&rxq->lock, flags);
  857. if (list_empty(&rxq->rx_used)) {
  858. spin_unlock_irqrestore(&rxq->lock, flags);
  859. return;
  860. }
  861. spin_unlock_irqrestore(&rxq->lock, flags);
  862. if (rxq->free_count > RX_LOW_WATERMARK)
  863. gfp_mask |= __GFP_NOWARN;
  864. if (il->hw_params.rx_page_order > 0)
  865. gfp_mask |= __GFP_COMP;
  866. /* Alloc a new receive buffer */
  867. page = alloc_pages(gfp_mask, il->hw_params.rx_page_order);
  868. if (!page) {
  869. if (net_ratelimit())
  870. D_INFO("Failed to allocate SKB buffer.\n");
  871. if (rxq->free_count <= RX_LOW_WATERMARK &&
  872. net_ratelimit())
  873. IL_ERR("Failed to allocate SKB buffer with %0x."
  874. "Only %u free buffers remaining.\n",
  875. priority, rxq->free_count);
  876. /* We don't reschedule replenish work here -- we will
  877. * call the restock method and if it still needs
  878. * more buffers it will schedule replenish */
  879. break;
  880. }
  881. spin_lock_irqsave(&rxq->lock, flags);
  882. if (list_empty(&rxq->rx_used)) {
  883. spin_unlock_irqrestore(&rxq->lock, flags);
  884. __free_pages(page, il->hw_params.rx_page_order);
  885. return;
  886. }
  887. element = rxq->rx_used.next;
  888. rxb = list_entry(element, struct il_rx_buf, list);
  889. list_del(element);
  890. spin_unlock_irqrestore(&rxq->lock, flags);
  891. rxb->page = page;
  892. /* Get physical address of RB/SKB */
  893. rxb->page_dma =
  894. pci_map_page(il->pci_dev, page, 0,
  895. PAGE_SIZE << il->hw_params.rx_page_order,
  896. PCI_DMA_FROMDEVICE);
  897. spin_lock_irqsave(&rxq->lock, flags);
  898. list_add_tail(&rxb->list, &rxq->rx_free);
  899. rxq->free_count++;
  900. il->alloc_rxb_page++;
  901. spin_unlock_irqrestore(&rxq->lock, flags);
  902. }
  903. }
  904. void
  905. il3945_rx_queue_reset(struct il_priv *il, struct il_rx_queue *rxq)
  906. {
  907. unsigned long flags;
  908. int i;
  909. spin_lock_irqsave(&rxq->lock, flags);
  910. INIT_LIST_HEAD(&rxq->rx_free);
  911. INIT_LIST_HEAD(&rxq->rx_used);
  912. /* Fill the rx_used queue with _all_ of the Rx buffers */
  913. for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) {
  914. /* In the reset function, these buffers may have been allocated
  915. * to an SKB, so we need to unmap and free potential storage */
  916. if (rxq->pool[i].page != NULL) {
  917. pci_unmap_page(il->pci_dev, rxq->pool[i].page_dma,
  918. PAGE_SIZE << il->hw_params.rx_page_order,
  919. PCI_DMA_FROMDEVICE);
  920. __il_free_pages(il, rxq->pool[i].page);
  921. rxq->pool[i].page = NULL;
  922. }
  923. list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
  924. }
  925. /* Set us so that we have processed and used all buffers, but have
  926. * not restocked the Rx queue with fresh buffers */
  927. rxq->read = rxq->write = 0;
  928. rxq->write_actual = 0;
  929. rxq->free_count = 0;
  930. spin_unlock_irqrestore(&rxq->lock, flags);
  931. }
  932. void
  933. il3945_rx_replenish(void *data)
  934. {
  935. struct il_priv *il = data;
  936. unsigned long flags;
  937. il3945_rx_allocate(il, GFP_KERNEL);
  938. spin_lock_irqsave(&il->lock, flags);
  939. il3945_rx_queue_restock(il);
  940. spin_unlock_irqrestore(&il->lock, flags);
  941. }
  942. static void
  943. il3945_rx_replenish_now(struct il_priv *il)
  944. {
  945. il3945_rx_allocate(il, GFP_ATOMIC);
  946. il3945_rx_queue_restock(il);
  947. }
  948. /* Assumes that the skb field of the buffers in 'pool' is kept accurate.
  949. * If an SKB has been detached, the POOL needs to have its SKB set to NULL
  950. * This free routine walks the list of POOL entries and if SKB is set to
  951. * non NULL it is unmapped and freed
  952. */
  953. static void
  954. il3945_rx_queue_free(struct il_priv *il, struct il_rx_queue *rxq)
  955. {
  956. int i;
  957. for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) {
  958. if (rxq->pool[i].page != NULL) {
  959. pci_unmap_page(il->pci_dev, rxq->pool[i].page_dma,
  960. PAGE_SIZE << il->hw_params.rx_page_order,
  961. PCI_DMA_FROMDEVICE);
  962. __il_free_pages(il, rxq->pool[i].page);
  963. rxq->pool[i].page = NULL;
  964. }
  965. }
  966. dma_free_coherent(&il->pci_dev->dev, 4 * RX_QUEUE_SIZE, rxq->bd,
  967. rxq->bd_dma);
  968. dma_free_coherent(&il->pci_dev->dev, sizeof(struct il_rb_status),
  969. rxq->rb_stts, rxq->rb_stts_dma);
  970. rxq->bd = NULL;
  971. rxq->rb_stts = NULL;
  972. }
  973. /* Convert linear signal-to-noise ratio into dB */
  974. static u8 ratio2dB[100] = {
  975. /* 0 1 2 3 4 5 6 7 8 9 */
  976. 0, 0, 6, 10, 12, 14, 16, 17, 18, 19, /* 00 - 09 */
  977. 20, 21, 22, 22, 23, 23, 24, 25, 26, 26, /* 10 - 19 */
  978. 26, 26, 26, 27, 27, 28, 28, 28, 29, 29, /* 20 - 29 */
  979. 29, 30, 30, 30, 31, 31, 31, 31, 32, 32, /* 30 - 39 */
  980. 32, 32, 32, 33, 33, 33, 33, 33, 34, 34, /* 40 - 49 */
  981. 34, 34, 34, 34, 35, 35, 35, 35, 35, 35, /* 50 - 59 */
  982. 36, 36, 36, 36, 36, 36, 36, 37, 37, 37, /* 60 - 69 */
  983. 37, 37, 37, 37, 37, 38, 38, 38, 38, 38, /* 70 - 79 */
  984. 38, 38, 38, 38, 38, 39, 39, 39, 39, 39, /* 80 - 89 */
  985. 39, 39, 39, 39, 39, 40, 40, 40, 40, 40 /* 90 - 99 */
  986. };
  987. /* Calculates a relative dB value from a ratio of linear
  988. * (i.e. not dB) signal levels.
  989. * Conversion assumes that levels are voltages (20*log), not powers (10*log). */
  990. int
  991. il3945_calc_db_from_ratio(int sig_ratio)
  992. {
  993. /* 1000:1 or higher just report as 60 dB */
  994. if (sig_ratio >= 1000)
  995. return 60;
  996. /* 100:1 or higher, divide by 10 and use table,
  997. * add 20 dB to make up for divide by 10 */
  998. if (sig_ratio >= 100)
  999. return 20 + (int)ratio2dB[sig_ratio / 10];
  1000. /* We shouldn't see this */
  1001. if (sig_ratio < 1)
  1002. return 0;
  1003. /* Use table for ratios 1:1 - 99:1 */
  1004. return (int)ratio2dB[sig_ratio];
  1005. }
  1006. /**
  1007. * il3945_rx_handle - Main entry function for receiving responses from uCode
  1008. *
  1009. * Uses the il->handlers callback function array to invoke
  1010. * the appropriate handlers, including command responses,
  1011. * frame-received notifications, and other notifications.
  1012. */
  1013. static void
  1014. il3945_rx_handle(struct il_priv *il)
  1015. {
  1016. struct il_rx_buf *rxb;
  1017. struct il_rx_pkt *pkt;
  1018. struct il_rx_queue *rxq = &il->rxq;
  1019. u32 r, i;
  1020. int reclaim;
  1021. unsigned long flags;
  1022. u8 fill_rx = 0;
  1023. u32 count = 8;
  1024. int total_empty = 0;
  1025. /* uCode's read idx (stored in shared DRAM) indicates the last Rx
  1026. * buffer that the driver may process (last buffer filled by ucode). */
  1027. r = le16_to_cpu(rxq->rb_stts->closed_rb_num) & 0x0FFF;
  1028. i = rxq->read;
  1029. /* calculate total frames need to be restock after handling RX */
  1030. total_empty = r - rxq->write_actual;
  1031. if (total_empty < 0)
  1032. total_empty += RX_QUEUE_SIZE;
  1033. if (total_empty > (RX_QUEUE_SIZE / 2))
  1034. fill_rx = 1;
  1035. /* Rx interrupt, but nothing sent from uCode */
  1036. if (i == r)
  1037. D_RX("r = %d, i = %d\n", r, i);
  1038. while (i != r) {
  1039. int len;
  1040. rxb = rxq->queue[i];
  1041. /* If an RXB doesn't have a Rx queue slot associated with it,
  1042. * then a bug has been introduced in the queue refilling
  1043. * routines -- catch it here */
  1044. BUG_ON(rxb == NULL);
  1045. rxq->queue[i] = NULL;
  1046. pci_unmap_page(il->pci_dev, rxb->page_dma,
  1047. PAGE_SIZE << il->hw_params.rx_page_order,
  1048. PCI_DMA_FROMDEVICE);
  1049. pkt = rxb_addr(rxb);
  1050. len = le32_to_cpu(pkt->len_n_flags) & IL_RX_FRAME_SIZE_MSK;
  1051. len += sizeof(u32); /* account for status word */
  1052. /* Reclaim a command buffer only if this packet is a response
  1053. * to a (driver-originated) command.
  1054. * If the packet (e.g. Rx frame) originated from uCode,
  1055. * there is no command buffer to reclaim.
  1056. * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
  1057. * but apparently a few don't get set; catch them here. */
  1058. reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
  1059. pkt->hdr.cmd != N_STATS && pkt->hdr.cmd != C_TX;
  1060. /* Based on type of command response or notification,
  1061. * handle those that need handling via function in
  1062. * handlers table. See il3945_setup_handlers() */
  1063. if (il->handlers[pkt->hdr.cmd]) {
  1064. D_RX("r = %d, i = %d, %s, 0x%02x\n", r, i,
  1065. il_get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
  1066. il->isr_stats.handlers[pkt->hdr.cmd]++;
  1067. il->handlers[pkt->hdr.cmd] (il, rxb);
  1068. } else {
  1069. /* No handling needed */
  1070. D_RX("r %d i %d No handler needed for %s, 0x%02x\n", r,
  1071. i, il_get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
  1072. }
  1073. /*
  1074. * XXX: After here, we should always check rxb->page
  1075. * against NULL before touching it or its virtual
  1076. * memory (pkt). Because some handler might have
  1077. * already taken or freed the pages.
  1078. */
  1079. if (reclaim) {
  1080. /* Invoke any callbacks, transfer the buffer to caller,
  1081. * and fire off the (possibly) blocking il_send_cmd()
  1082. * as we reclaim the driver command queue */
  1083. if (rxb->page)
  1084. il_tx_cmd_complete(il, rxb);
  1085. else
  1086. IL_WARN("Claim null rxb?\n");
  1087. }
  1088. /* Reuse the page if possible. For notification packets and
  1089. * SKBs that fail to Rx correctly, add them back into the
  1090. * rx_free list for reuse later. */
  1091. spin_lock_irqsave(&rxq->lock, flags);
  1092. if (rxb->page != NULL) {
  1093. rxb->page_dma =
  1094. pci_map_page(il->pci_dev, rxb->page, 0,
  1095. PAGE_SIZE << il->hw_params.
  1096. rx_page_order, PCI_DMA_FROMDEVICE);
  1097. list_add_tail(&rxb->list, &rxq->rx_free);
  1098. rxq->free_count++;
  1099. } else
  1100. list_add_tail(&rxb->list, &rxq->rx_used);
  1101. spin_unlock_irqrestore(&rxq->lock, flags);
  1102. i = (i + 1) & RX_QUEUE_MASK;
  1103. /* If there are a lot of unused frames,
  1104. * restock the Rx queue so ucode won't assert. */
  1105. if (fill_rx) {
  1106. count++;
  1107. if (count >= 8) {
  1108. rxq->read = i;
  1109. il3945_rx_replenish_now(il);
  1110. count = 0;
  1111. }
  1112. }
  1113. }
  1114. /* Backtrack one entry */
  1115. rxq->read = i;
  1116. if (fill_rx)
  1117. il3945_rx_replenish_now(il);
  1118. else
  1119. il3945_rx_queue_restock(il);
  1120. }
  1121. /* call this function to flush any scheduled tasklet */
  1122. static inline void
  1123. il3945_synchronize_irq(struct il_priv *il)
  1124. {
  1125. /* wait to make sure we flush pending tasklet */
  1126. synchronize_irq(il->pci_dev->irq);
  1127. tasklet_kill(&il->irq_tasklet);
  1128. }
  1129. static const char *
  1130. il3945_desc_lookup(int i)
  1131. {
  1132. switch (i) {
  1133. case 1:
  1134. return "FAIL";
  1135. case 2:
  1136. return "BAD_PARAM";
  1137. case 3:
  1138. return "BAD_CHECKSUM";
  1139. case 4:
  1140. return "NMI_INTERRUPT";
  1141. case 5:
  1142. return "SYSASSERT";
  1143. case 6:
  1144. return "FATAL_ERROR";
  1145. }
  1146. return "UNKNOWN";
  1147. }
  1148. #define ERROR_START_OFFSET (1 * sizeof(u32))
  1149. #define ERROR_ELEM_SIZE (7 * sizeof(u32))
  1150. void
  1151. il3945_dump_nic_error_log(struct il_priv *il)
  1152. {
  1153. u32 i;
  1154. u32 desc, time, count, base, data1;
  1155. u32 blink1, blink2, ilink1, ilink2;
  1156. base = le32_to_cpu(il->card_alive.error_event_table_ptr);
  1157. if (!il3945_hw_valid_rtc_data_addr(base)) {
  1158. IL_ERR("Not valid error log pointer 0x%08X\n", base);
  1159. return;
  1160. }
  1161. count = il_read_targ_mem(il, base);
  1162. if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
  1163. IL_ERR("Start IWL Error Log Dump:\n");
  1164. IL_ERR("Status: 0x%08lX, count: %d\n", il->status, count);
  1165. }
  1166. IL_ERR("Desc Time asrtPC blink2 "
  1167. "ilink1 nmiPC Line\n");
  1168. for (i = ERROR_START_OFFSET;
  1169. i < (count * ERROR_ELEM_SIZE) + ERROR_START_OFFSET;
  1170. i += ERROR_ELEM_SIZE) {
  1171. desc = il_read_targ_mem(il, base + i);
  1172. time = il_read_targ_mem(il, base + i + 1 * sizeof(u32));
  1173. blink1 = il_read_targ_mem(il, base + i + 2 * sizeof(u32));
  1174. blink2 = il_read_targ_mem(il, base + i + 3 * sizeof(u32));
  1175. ilink1 = il_read_targ_mem(il, base + i + 4 * sizeof(u32));
  1176. ilink2 = il_read_targ_mem(il, base + i + 5 * sizeof(u32));
  1177. data1 = il_read_targ_mem(il, base + i + 6 * sizeof(u32));
  1178. IL_ERR("%-13s (0x%X) %010u 0x%05X 0x%05X 0x%05X 0x%05X %u\n\n",
  1179. il3945_desc_lookup(desc), desc, time, blink1, blink2,
  1180. ilink1, ilink2, data1);
  1181. }
  1182. }
  1183. static void
  1184. il3945_irq_tasklet(struct il_priv *il)
  1185. {
  1186. u32 inta, handled = 0;
  1187. u32 inta_fh;
  1188. unsigned long flags;
  1189. #ifdef CONFIG_IWLEGACY_DEBUG
  1190. u32 inta_mask;
  1191. #endif
  1192. spin_lock_irqsave(&il->lock, flags);
  1193. /* Ack/clear/reset pending uCode interrupts.
  1194. * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
  1195. * and will clear only when CSR_FH_INT_STATUS gets cleared. */
  1196. inta = _il_rd(il, CSR_INT);
  1197. _il_wr(il, CSR_INT, inta);
  1198. /* Ack/clear/reset pending flow-handler (DMA) interrupts.
  1199. * Any new interrupts that happen after this, either while we're
  1200. * in this tasklet, or later, will show up in next ISR/tasklet. */
  1201. inta_fh = _il_rd(il, CSR_FH_INT_STATUS);
  1202. _il_wr(il, CSR_FH_INT_STATUS, inta_fh);
  1203. #ifdef CONFIG_IWLEGACY_DEBUG
  1204. if (il_get_debug_level(il) & IL_DL_ISR) {
  1205. /* just for debug */
  1206. inta_mask = _il_rd(il, CSR_INT_MASK);
  1207. D_ISR("inta 0x%08x, enabled 0x%08x, fh 0x%08x\n", inta,
  1208. inta_mask, inta_fh);
  1209. }
  1210. #endif
  1211. spin_unlock_irqrestore(&il->lock, flags);
  1212. /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
  1213. * atomic, make sure that inta covers all the interrupts that
  1214. * we've discovered, even if FH interrupt came in just after
  1215. * reading CSR_INT. */
  1216. if (inta_fh & CSR39_FH_INT_RX_MASK)
  1217. inta |= CSR_INT_BIT_FH_RX;
  1218. if (inta_fh & CSR39_FH_INT_TX_MASK)
  1219. inta |= CSR_INT_BIT_FH_TX;
  1220. /* Now service all interrupt bits discovered above. */
  1221. if (inta & CSR_INT_BIT_HW_ERR) {
  1222. IL_ERR("Hardware error detected. Restarting.\n");
  1223. /* Tell the device to stop sending interrupts */
  1224. il_disable_interrupts(il);
  1225. il->isr_stats.hw++;
  1226. il_irq_handle_error(il);
  1227. handled |= CSR_INT_BIT_HW_ERR;
  1228. return;
  1229. }
  1230. #ifdef CONFIG_IWLEGACY_DEBUG
  1231. if (il_get_debug_level(il) & (IL_DL_ISR)) {
  1232. /* NIC fires this, but we don't use it, redundant with WAKEUP */
  1233. if (inta & CSR_INT_BIT_SCD) {
  1234. D_ISR("Scheduler finished to transmit "
  1235. "the frame/frames.\n");
  1236. il->isr_stats.sch++;
  1237. }
  1238. /* Alive notification via Rx interrupt will do the real work */
  1239. if (inta & CSR_INT_BIT_ALIVE) {
  1240. D_ISR("Alive interrupt\n");
  1241. il->isr_stats.alive++;
  1242. }
  1243. }
  1244. #endif
  1245. /* Safely ignore these bits for debug checks below */
  1246. inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
  1247. /* Error detected by uCode */
  1248. if (inta & CSR_INT_BIT_SW_ERR) {
  1249. IL_ERR("Microcode SW error detected. " "Restarting 0x%X.\n",
  1250. inta);
  1251. il->isr_stats.sw++;
  1252. il_irq_handle_error(il);
  1253. handled |= CSR_INT_BIT_SW_ERR;
  1254. }
  1255. /* uCode wakes up after power-down sleep */
  1256. if (inta & CSR_INT_BIT_WAKEUP) {
  1257. D_ISR("Wakeup interrupt\n");
  1258. il_rx_queue_update_write_ptr(il, &il->rxq);
  1259. il_txq_update_write_ptr(il, &il->txq[0]);
  1260. il_txq_update_write_ptr(il, &il->txq[1]);
  1261. il_txq_update_write_ptr(il, &il->txq[2]);
  1262. il_txq_update_write_ptr(il, &il->txq[3]);
  1263. il_txq_update_write_ptr(il, &il->txq[4]);
  1264. il_txq_update_write_ptr(il, &il->txq[5]);
  1265. il->isr_stats.wakeup++;
  1266. handled |= CSR_INT_BIT_WAKEUP;
  1267. }
  1268. /* All uCode command responses, including Tx command responses,
  1269. * Rx "responses" (frame-received notification), and other
  1270. * notifications from uCode come through here*/
  1271. if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
  1272. il3945_rx_handle(il);
  1273. il->isr_stats.rx++;
  1274. handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
  1275. }
  1276. if (inta & CSR_INT_BIT_FH_TX) {
  1277. D_ISR("Tx interrupt\n");
  1278. il->isr_stats.tx++;
  1279. _il_wr(il, CSR_FH_INT_STATUS, (1 << 6));
  1280. il_wr(il, FH39_TCSR_CREDIT(FH39_SRVC_CHNL), 0x0);
  1281. handled |= CSR_INT_BIT_FH_TX;
  1282. }
  1283. if (inta & ~handled) {
  1284. IL_ERR("Unhandled INTA bits 0x%08x\n", inta & ~handled);
  1285. il->isr_stats.unhandled++;
  1286. }
  1287. if (inta & ~il->inta_mask) {
  1288. IL_WARN("Disabled INTA bits 0x%08x were pending\n",
  1289. inta & ~il->inta_mask);
  1290. IL_WARN(" with inta_fh = 0x%08x\n", inta_fh);
  1291. }
  1292. /* Re-enable all interrupts */
  1293. /* only Re-enable if disabled by irq */
  1294. if (test_bit(S_INT_ENABLED, &il->status))
  1295. il_enable_interrupts(il);
  1296. #ifdef CONFIG_IWLEGACY_DEBUG
  1297. if (il_get_debug_level(il) & (IL_DL_ISR)) {
  1298. inta = _il_rd(il, CSR_INT);
  1299. inta_mask = _il_rd(il, CSR_INT_MASK);
  1300. inta_fh = _il_rd(il, CSR_FH_INT_STATUS);
  1301. D_ISR("End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
  1302. "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
  1303. }
  1304. #endif
  1305. }
  1306. static int
  1307. il3945_get_channels_for_scan(struct il_priv *il, enum ieee80211_band band,
  1308. u8 is_active, u8 n_probes,
  1309. struct il3945_scan_channel *scan_ch,
  1310. struct ieee80211_vif *vif)
  1311. {
  1312. struct ieee80211_channel *chan;
  1313. const struct ieee80211_supported_band *sband;
  1314. const struct il_channel_info *ch_info;
  1315. u16 passive_dwell = 0;
  1316. u16 active_dwell = 0;
  1317. int added, i;
  1318. sband = il_get_hw_mode(il, band);
  1319. if (!sband)
  1320. return 0;
  1321. active_dwell = il_get_active_dwell_time(il, band, n_probes);
  1322. passive_dwell = il_get_passive_dwell_time(il, band, vif);
  1323. if (passive_dwell <= active_dwell)
  1324. passive_dwell = active_dwell + 1;
  1325. for (i = 0, added = 0; i < il->scan_request->n_channels; i++) {
  1326. chan = il->scan_request->channels[i];
  1327. if (chan->band != band)
  1328. continue;
  1329. scan_ch->channel = chan->hw_value;
  1330. ch_info = il_get_channel_info(il, band, scan_ch->channel);
  1331. if (!il_is_channel_valid(ch_info)) {
  1332. D_SCAN("Channel %d is INVALID for this band.\n",
  1333. scan_ch->channel);
  1334. continue;
  1335. }
  1336. scan_ch->active_dwell = cpu_to_le16(active_dwell);
  1337. scan_ch->passive_dwell = cpu_to_le16(passive_dwell);
  1338. /* If passive , set up for auto-switch
  1339. * and use long active_dwell time.
  1340. */
  1341. if (!is_active || il_is_channel_passive(ch_info) ||
  1342. (chan->flags & IEEE80211_CHAN_PASSIVE_SCAN)) {
  1343. scan_ch->type = 0; /* passive */
  1344. if (IL_UCODE_API(il->ucode_ver) == 1)
  1345. scan_ch->active_dwell =
  1346. cpu_to_le16(passive_dwell - 1);
  1347. } else {
  1348. scan_ch->type = 1; /* active */
  1349. }
  1350. /* Set direct probe bits. These may be used both for active
  1351. * scan channels (probes gets sent right away),
  1352. * or for passive channels (probes get se sent only after
  1353. * hearing clear Rx packet).*/
  1354. if (IL_UCODE_API(il->ucode_ver) >= 2) {
  1355. if (n_probes)
  1356. scan_ch->type |= IL39_SCAN_PROBE_MASK(n_probes);
  1357. } else {
  1358. /* uCode v1 does not allow setting direct probe bits on
  1359. * passive channel. */
  1360. if ((scan_ch->type & 1) && n_probes)
  1361. scan_ch->type |= IL39_SCAN_PROBE_MASK(n_probes);
  1362. }
  1363. /* Set txpower levels to defaults */
  1364. scan_ch->tpc.dsp_atten = 110;
  1365. /* scan_pwr_info->tpc.dsp_atten; */
  1366. /*scan_pwr_info->tpc.tx_gain; */
  1367. if (band == IEEE80211_BAND_5GHZ)
  1368. scan_ch->tpc.tx_gain = ((1 << 5) | (3 << 3)) | 3;
  1369. else {
  1370. scan_ch->tpc.tx_gain = ((1 << 5) | (5 << 3));
  1371. /* NOTE: if we were doing 6Mb OFDM for scans we'd use
  1372. * power level:
  1373. * scan_ch->tpc.tx_gain = ((1 << 5) | (2 << 3)) | 3;
  1374. */
  1375. }
  1376. D_SCAN("Scanning %d [%s %d]\n", scan_ch->channel,
  1377. (scan_ch->type & 1) ? "ACTIVE" : "PASSIVE",
  1378. (scan_ch->type & 1) ? active_dwell : passive_dwell);
  1379. scan_ch++;
  1380. added++;
  1381. }
  1382. D_SCAN("total channels to scan %d\n", added);
  1383. return added;
  1384. }
  1385. static void
  1386. il3945_init_hw_rates(struct il_priv *il, struct ieee80211_rate *rates)
  1387. {
  1388. int i;
  1389. for (i = 0; i < RATE_COUNT_LEGACY; i++) {
  1390. rates[i].bitrate = il3945_rates[i].ieee * 5;
  1391. rates[i].hw_value = i; /* Rate scaling will work on idxes */
  1392. rates[i].hw_value_short = i;
  1393. rates[i].flags = 0;
  1394. if (i > IL39_LAST_OFDM_RATE || i < IL_FIRST_OFDM_RATE) {
  1395. /*
  1396. * If CCK != 1M then set short preamble rate flag.
  1397. */
  1398. rates[i].flags |=
  1399. (il3945_rates[i].plcp ==
  1400. 10) ? 0 : IEEE80211_RATE_SHORT_PREAMBLE;
  1401. }
  1402. }
  1403. }
  1404. /******************************************************************************
  1405. *
  1406. * uCode download functions
  1407. *
  1408. ******************************************************************************/
  1409. static void
  1410. il3945_dealloc_ucode_pci(struct il_priv *il)
  1411. {
  1412. il_free_fw_desc(il->pci_dev, &il->ucode_code);
  1413. il_free_fw_desc(il->pci_dev, &il->ucode_data);
  1414. il_free_fw_desc(il->pci_dev, &il->ucode_data_backup);
  1415. il_free_fw_desc(il->pci_dev, &il->ucode_init);
  1416. il_free_fw_desc(il->pci_dev, &il->ucode_init_data);
  1417. il_free_fw_desc(il->pci_dev, &il->ucode_boot);
  1418. }
  1419. /**
  1420. * il3945_verify_inst_full - verify runtime uCode image in card vs. host,
  1421. * looking at all data.
  1422. */
  1423. static int
  1424. il3945_verify_inst_full(struct il_priv *il, __le32 * image, u32 len)
  1425. {
  1426. u32 val;
  1427. u32 save_len = len;
  1428. int rc = 0;
  1429. u32 errcnt;
  1430. D_INFO("ucode inst image size is %u\n", len);
  1431. il_wr(il, HBUS_TARG_MEM_RADDR, IL39_RTC_INST_LOWER_BOUND);
  1432. errcnt = 0;
  1433. for (; len > 0; len -= sizeof(u32), image++) {
  1434. /* read data comes through single port, auto-incr addr */
  1435. /* NOTE: Use the debugless read so we don't flood kernel log
  1436. * if IL_DL_IO is set */
  1437. val = _il_rd(il, HBUS_TARG_MEM_RDAT);
  1438. if (val != le32_to_cpu(*image)) {
  1439. IL_ERR("uCode INST section is invalid at "
  1440. "offset 0x%x, is 0x%x, s/b 0x%x\n",
  1441. save_len - len, val, le32_to_cpu(*image));
  1442. rc = -EIO;
  1443. errcnt++;
  1444. if (errcnt >= 20)
  1445. break;
  1446. }
  1447. }
  1448. if (!errcnt)
  1449. D_INFO("ucode image in INSTRUCTION memory is good\n");
  1450. return rc;
  1451. }
  1452. /**
  1453. * il3945_verify_inst_sparse - verify runtime uCode image in card vs. host,
  1454. * using sample data 100 bytes apart. If these sample points are good,
  1455. * it's a pretty good bet that everything between them is good, too.
  1456. */
  1457. static int
  1458. il3945_verify_inst_sparse(struct il_priv *il, __le32 * image, u32 len)
  1459. {
  1460. u32 val;
  1461. int rc = 0;
  1462. u32 errcnt = 0;
  1463. u32 i;
  1464. D_INFO("ucode inst image size is %u\n", len);
  1465. for (i = 0; i < len; i += 100, image += 100 / sizeof(u32)) {
  1466. /* read data comes through single port, auto-incr addr */
  1467. /* NOTE: Use the debugless read so we don't flood kernel log
  1468. * if IL_DL_IO is set */
  1469. il_wr(il, HBUS_TARG_MEM_RADDR, i + IL39_RTC_INST_LOWER_BOUND);
  1470. val = _il_rd(il, HBUS_TARG_MEM_RDAT);
  1471. if (val != le32_to_cpu(*image)) {
  1472. #if 0 /* Enable this if you want to see details */
  1473. IL_ERR("uCode INST section is invalid at "
  1474. "offset 0x%x, is 0x%x, s/b 0x%x\n", i, val,
  1475. *image);
  1476. #endif
  1477. rc = -EIO;
  1478. errcnt++;
  1479. if (errcnt >= 3)
  1480. break;
  1481. }
  1482. }
  1483. return rc;
  1484. }
  1485. /**
  1486. * il3945_verify_ucode - determine which instruction image is in SRAM,
  1487. * and verify its contents
  1488. */
  1489. static int
  1490. il3945_verify_ucode(struct il_priv *il)
  1491. {
  1492. __le32 *image;
  1493. u32 len;
  1494. int rc = 0;
  1495. /* Try bootstrap */
  1496. image = (__le32 *) il->ucode_boot.v_addr;
  1497. len = il->ucode_boot.len;
  1498. rc = il3945_verify_inst_sparse(il, image, len);
  1499. if (rc == 0) {
  1500. D_INFO("Bootstrap uCode is good in inst SRAM\n");
  1501. return 0;
  1502. }
  1503. /* Try initialize */
  1504. image = (__le32 *) il->ucode_init.v_addr;
  1505. len = il->ucode_init.len;
  1506. rc = il3945_verify_inst_sparse(il, image, len);
  1507. if (rc == 0) {
  1508. D_INFO("Initialize uCode is good in inst SRAM\n");
  1509. return 0;
  1510. }
  1511. /* Try runtime/protocol */
  1512. image = (__le32 *) il->ucode_code.v_addr;
  1513. len = il->ucode_code.len;
  1514. rc = il3945_verify_inst_sparse(il, image, len);
  1515. if (rc == 0) {
  1516. D_INFO("Runtime uCode is good in inst SRAM\n");
  1517. return 0;
  1518. }
  1519. IL_ERR("NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
  1520. /* Since nothing seems to match, show first several data entries in
  1521. * instruction SRAM, so maybe visual inspection will give a clue.
  1522. * Selection of bootstrap image (vs. other images) is arbitrary. */
  1523. image = (__le32 *) il->ucode_boot.v_addr;
  1524. len = il->ucode_boot.len;
  1525. rc = il3945_verify_inst_full(il, image, len);
  1526. return rc;
  1527. }
  1528. static void
  1529. il3945_nic_start(struct il_priv *il)
  1530. {
  1531. /* Remove all resets to allow NIC to operate */
  1532. _il_wr(il, CSR_RESET, 0);
  1533. }
  1534. #define IL3945_UCODE_GET(item) \
  1535. static u32 il3945_ucode_get_##item(const struct il_ucode_header *ucode)\
  1536. { \
  1537. return le32_to_cpu(ucode->v1.item); \
  1538. }
  1539. static u32
  1540. il3945_ucode_get_header_size(u32 api_ver)
  1541. {
  1542. return 24;
  1543. }
  1544. static u8 *
  1545. il3945_ucode_get_data(const struct il_ucode_header *ucode)
  1546. {
  1547. return (u8 *) ucode->v1.data;
  1548. }
  1549. IL3945_UCODE_GET(inst_size);
  1550. IL3945_UCODE_GET(data_size);
  1551. IL3945_UCODE_GET(init_size);
  1552. IL3945_UCODE_GET(init_data_size);
  1553. IL3945_UCODE_GET(boot_size);
  1554. /**
  1555. * il3945_read_ucode - Read uCode images from disk file.
  1556. *
  1557. * Copy into buffers for card to fetch via bus-mastering
  1558. */
  1559. static int
  1560. il3945_read_ucode(struct il_priv *il)
  1561. {
  1562. const struct il_ucode_header *ucode;
  1563. int ret = -EINVAL, idx;
  1564. const struct firmware *ucode_raw;
  1565. /* firmware file name contains uCode/driver compatibility version */
  1566. const char *name_pre = il->cfg->fw_name_pre;
  1567. const unsigned int api_max = il->cfg->ucode_api_max;
  1568. const unsigned int api_min = il->cfg->ucode_api_min;
  1569. char buf[25];
  1570. u8 *src;
  1571. size_t len;
  1572. u32 api_ver, inst_size, data_size, init_size, init_data_size, boot_size;
  1573. /* Ask kernel firmware_class module to get the boot firmware off disk.
  1574. * request_firmware() is synchronous, file is in memory on return. */
  1575. for (idx = api_max; idx >= api_min; idx--) {
  1576. sprintf(buf, "%s%u%s", name_pre, idx, ".ucode");
  1577. ret = request_firmware(&ucode_raw, buf, &il->pci_dev->dev);
  1578. if (ret < 0) {
  1579. IL_ERR("%s firmware file req failed: %d\n", buf, ret);
  1580. if (ret == -ENOENT)
  1581. continue;
  1582. else
  1583. goto error;
  1584. } else {
  1585. if (idx < api_max)
  1586. IL_ERR("Loaded firmware %s, "
  1587. "which is deprecated. "
  1588. " Please use API v%u instead.\n", buf,
  1589. api_max);
  1590. D_INFO("Got firmware '%s' file "
  1591. "(%zd bytes) from disk\n", buf, ucode_raw->size);
  1592. break;
  1593. }
  1594. }
  1595. if (ret < 0)
  1596. goto error;
  1597. /* Make sure that we got at least our header! */
  1598. if (ucode_raw->size < il3945_ucode_get_header_size(1)) {
  1599. IL_ERR("File size way too small!\n");
  1600. ret = -EINVAL;
  1601. goto err_release;
  1602. }
  1603. /* Data from ucode file: header followed by uCode images */
  1604. ucode = (struct il_ucode_header *)ucode_raw->data;
  1605. il->ucode_ver = le32_to_cpu(ucode->ver);
  1606. api_ver = IL_UCODE_API(il->ucode_ver);
  1607. inst_size = il3945_ucode_get_inst_size(ucode);
  1608. data_size = il3945_ucode_get_data_size(ucode);
  1609. init_size = il3945_ucode_get_init_size(ucode);
  1610. init_data_size = il3945_ucode_get_init_data_size(ucode);
  1611. boot_size = il3945_ucode_get_boot_size(ucode);
  1612. src = il3945_ucode_get_data(ucode);
  1613. /* api_ver should match the api version forming part of the
  1614. * firmware filename ... but we don't check for that and only rely
  1615. * on the API version read from firmware header from here on forward */
  1616. if (api_ver < api_min || api_ver > api_max) {
  1617. IL_ERR("Driver unable to support your firmware API. "
  1618. "Driver supports v%u, firmware is v%u.\n", api_max,
  1619. api_ver);
  1620. il->ucode_ver = 0;
  1621. ret = -EINVAL;
  1622. goto err_release;
  1623. }
  1624. if (api_ver != api_max)
  1625. IL_ERR("Firmware has old API version. Expected %u, "
  1626. "got %u. New firmware can be obtained "
  1627. "from http://www.intellinuxwireless.org.\n", api_max,
  1628. api_ver);
  1629. IL_INFO("loaded firmware version %u.%u.%u.%u\n",
  1630. IL_UCODE_MAJOR(il->ucode_ver), IL_UCODE_MINOR(il->ucode_ver),
  1631. IL_UCODE_API(il->ucode_ver), IL_UCODE_SERIAL(il->ucode_ver));
  1632. snprintf(il->hw->wiphy->fw_version, sizeof(il->hw->wiphy->fw_version),
  1633. "%u.%u.%u.%u", IL_UCODE_MAJOR(il->ucode_ver),
  1634. IL_UCODE_MINOR(il->ucode_ver), IL_UCODE_API(il->ucode_ver),
  1635. IL_UCODE_SERIAL(il->ucode_ver));
  1636. D_INFO("f/w package hdr ucode version raw = 0x%x\n", il->ucode_ver);
  1637. D_INFO("f/w package hdr runtime inst size = %u\n", inst_size);
  1638. D_INFO("f/w package hdr runtime data size = %u\n", data_size);
  1639. D_INFO("f/w package hdr init inst size = %u\n", init_size);
  1640. D_INFO("f/w package hdr init data size = %u\n", init_data_size);
  1641. D_INFO("f/w package hdr boot inst size = %u\n", boot_size);
  1642. /* Verify size of file vs. image size info in file's header */
  1643. if (ucode_raw->size !=
  1644. il3945_ucode_get_header_size(api_ver) + inst_size + data_size +
  1645. init_size + init_data_size + boot_size) {
  1646. D_INFO("uCode file size %zd does not match expected size\n",
  1647. ucode_raw->size);
  1648. ret = -EINVAL;
  1649. goto err_release;
  1650. }
  1651. /* Verify that uCode images will fit in card's SRAM */
  1652. if (inst_size > IL39_MAX_INST_SIZE) {
  1653. D_INFO("uCode instr len %d too large to fit in\n", inst_size);
  1654. ret = -EINVAL;
  1655. goto err_release;
  1656. }
  1657. if (data_size > IL39_MAX_DATA_SIZE) {
  1658. D_INFO("uCode data len %d too large to fit in\n", data_size);
  1659. ret = -EINVAL;
  1660. goto err_release;
  1661. }
  1662. if (init_size > IL39_MAX_INST_SIZE) {
  1663. D_INFO("uCode init instr len %d too large to fit in\n",
  1664. init_size);
  1665. ret = -EINVAL;
  1666. goto err_release;
  1667. }
  1668. if (init_data_size > IL39_MAX_DATA_SIZE) {
  1669. D_INFO("uCode init data len %d too large to fit in\n",
  1670. init_data_size);
  1671. ret = -EINVAL;
  1672. goto err_release;
  1673. }
  1674. if (boot_size > IL39_MAX_BSM_SIZE) {
  1675. D_INFO("uCode boot instr len %d too large to fit in\n",
  1676. boot_size);
  1677. ret = -EINVAL;
  1678. goto err_release;
  1679. }
  1680. /* Allocate ucode buffers for card's bus-master loading ... */
  1681. /* Runtime instructions and 2 copies of data:
  1682. * 1) unmodified from disk
  1683. * 2) backup cache for save/restore during power-downs */
  1684. il->ucode_code.len = inst_size;
  1685. il_alloc_fw_desc(il->pci_dev, &il->ucode_code);
  1686. il->ucode_data.len = data_size;
  1687. il_alloc_fw_desc(il->pci_dev, &il->ucode_data);
  1688. il->ucode_data_backup.len = data_size;
  1689. il_alloc_fw_desc(il->pci_dev, &il->ucode_data_backup);
  1690. if (!il->ucode_code.v_addr || !il->ucode_data.v_addr ||
  1691. !il->ucode_data_backup.v_addr)
  1692. goto err_pci_alloc;
  1693. /* Initialization instructions and data */
  1694. if (init_size && init_data_size) {
  1695. il->ucode_init.len = init_size;
  1696. il_alloc_fw_desc(il->pci_dev, &il->ucode_init);
  1697. il->ucode_init_data.len = init_data_size;
  1698. il_alloc_fw_desc(il->pci_dev, &il->ucode_init_data);
  1699. if (!il->ucode_init.v_addr || !il->ucode_init_data.v_addr)
  1700. goto err_pci_alloc;
  1701. }
  1702. /* Bootstrap (instructions only, no data) */
  1703. if (boot_size) {
  1704. il->ucode_boot.len = boot_size;
  1705. il_alloc_fw_desc(il->pci_dev, &il->ucode_boot);
  1706. if (!il->ucode_boot.v_addr)
  1707. goto err_pci_alloc;
  1708. }
  1709. /* Copy images into buffers for card's bus-master reads ... */
  1710. /* Runtime instructions (first block of data in file) */
  1711. len = inst_size;
  1712. D_INFO("Copying (but not loading) uCode instr len %zd\n", len);
  1713. memcpy(il->ucode_code.v_addr, src, len);
  1714. src += len;
  1715. D_INFO("uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
  1716. il->ucode_code.v_addr, (u32) il->ucode_code.p_addr);
  1717. /* Runtime data (2nd block)
  1718. * NOTE: Copy into backup buffer will be done in il3945_up() */
  1719. len = data_size;
  1720. D_INFO("Copying (but not loading) uCode data len %zd\n", len);
  1721. memcpy(il->ucode_data.v_addr, src, len);
  1722. memcpy(il->ucode_data_backup.v_addr, src, len);
  1723. src += len;
  1724. /* Initialization instructions (3rd block) */
  1725. if (init_size) {
  1726. len = init_size;
  1727. D_INFO("Copying (but not loading) init instr len %zd\n", len);
  1728. memcpy(il->ucode_init.v_addr, src, len);
  1729. src += len;
  1730. }
  1731. /* Initialization data (4th block) */
  1732. if (init_data_size) {
  1733. len = init_data_size;
  1734. D_INFO("Copying (but not loading) init data len %zd\n", len);
  1735. memcpy(il->ucode_init_data.v_addr, src, len);
  1736. src += len;
  1737. }
  1738. /* Bootstrap instructions (5th block) */
  1739. len = boot_size;
  1740. D_INFO("Copying (but not loading) boot instr len %zd\n", len);
  1741. memcpy(il->ucode_boot.v_addr, src, len);
  1742. /* We have our copies now, allow OS release its copies */
  1743. release_firmware(ucode_raw);
  1744. return 0;
  1745. err_pci_alloc:
  1746. IL_ERR("failed to allocate pci memory\n");
  1747. ret = -ENOMEM;
  1748. il3945_dealloc_ucode_pci(il);
  1749. err_release:
  1750. release_firmware(ucode_raw);
  1751. error:
  1752. return ret;
  1753. }
  1754. /**
  1755. * il3945_set_ucode_ptrs - Set uCode address location
  1756. *
  1757. * Tell initialization uCode where to find runtime uCode.
  1758. *
  1759. * BSM registers initially contain pointers to initialization uCode.
  1760. * We need to replace them to load runtime uCode inst and data,
  1761. * and to save runtime data when powering down.
  1762. */
  1763. static int
  1764. il3945_set_ucode_ptrs(struct il_priv *il)
  1765. {
  1766. dma_addr_t pinst;
  1767. dma_addr_t pdata;
  1768. /* bits 31:0 for 3945 */
  1769. pinst = il->ucode_code.p_addr;
  1770. pdata = il->ucode_data_backup.p_addr;
  1771. /* Tell bootstrap uCode where to find image to load */
  1772. il_wr_prph(il, BSM_DRAM_INST_PTR_REG, pinst);
  1773. il_wr_prph(il, BSM_DRAM_DATA_PTR_REG, pdata);
  1774. il_wr_prph(il, BSM_DRAM_DATA_BYTECOUNT_REG, il->ucode_data.len);
  1775. /* Inst byte count must be last to set up, bit 31 signals uCode
  1776. * that all new ptr/size info is in place */
  1777. il_wr_prph(il, BSM_DRAM_INST_BYTECOUNT_REG,
  1778. il->ucode_code.len | BSM_DRAM_INST_LOAD);
  1779. D_INFO("Runtime uCode pointers are set.\n");
  1780. return 0;
  1781. }
  1782. /**
  1783. * il3945_init_alive_start - Called after N_ALIVE notification received
  1784. *
  1785. * Called after N_ALIVE notification received from "initialize" uCode.
  1786. *
  1787. * Tell "initialize" uCode to go ahead and load the runtime uCode.
  1788. */
  1789. static void
  1790. il3945_init_alive_start(struct il_priv *il)
  1791. {
  1792. /* Check alive response for "valid" sign from uCode */
  1793. if (il->card_alive_init.is_valid != UCODE_VALID_OK) {
  1794. /* We had an error bringing up the hardware, so take it
  1795. * all the way back down so we can try again */
  1796. D_INFO("Initialize Alive failed.\n");
  1797. goto restart;
  1798. }
  1799. /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
  1800. * This is a paranoid check, because we would not have gotten the
  1801. * "initialize" alive if code weren't properly loaded. */
  1802. if (il3945_verify_ucode(il)) {
  1803. /* Runtime instruction load was bad;
  1804. * take it all the way back down so we can try again */
  1805. D_INFO("Bad \"initialize\" uCode load.\n");
  1806. goto restart;
  1807. }
  1808. /* Send pointers to protocol/runtime uCode image ... init code will
  1809. * load and launch runtime uCode, which will send us another "Alive"
  1810. * notification. */
  1811. D_INFO("Initialization Alive received.\n");
  1812. if (il3945_set_ucode_ptrs(il)) {
  1813. /* Runtime instruction load won't happen;
  1814. * take it all the way back down so we can try again */
  1815. D_INFO("Couldn't set up uCode pointers.\n");
  1816. goto restart;
  1817. }
  1818. return;
  1819. restart:
  1820. queue_work(il->workqueue, &il->restart);
  1821. }
  1822. /**
  1823. * il3945_alive_start - called after N_ALIVE notification received
  1824. * from protocol/runtime uCode (initialization uCode's
  1825. * Alive gets handled by il3945_init_alive_start()).
  1826. */
  1827. static void
  1828. il3945_alive_start(struct il_priv *il)
  1829. {
  1830. int thermal_spin = 0;
  1831. u32 rfkill;
  1832. struct il_rxon_context *ctx = &il->ctx;
  1833. D_INFO("Runtime Alive received.\n");
  1834. if (il->card_alive.is_valid != UCODE_VALID_OK) {
  1835. /* We had an error bringing up the hardware, so take it
  1836. * all the way back down so we can try again */
  1837. D_INFO("Alive failed.\n");
  1838. goto restart;
  1839. }
  1840. /* Initialize uCode has loaded Runtime uCode ... verify inst image.
  1841. * This is a paranoid check, because we would not have gotten the
  1842. * "runtime" alive if code weren't properly loaded. */
  1843. if (il3945_verify_ucode(il)) {
  1844. /* Runtime instruction load was bad;
  1845. * take it all the way back down so we can try again */
  1846. D_INFO("Bad runtime uCode load.\n");
  1847. goto restart;
  1848. }
  1849. rfkill = il_rd_prph(il, APMG_RFKILL_REG);
  1850. D_INFO("RFKILL status: 0x%x\n", rfkill);
  1851. if (rfkill & 0x1) {
  1852. clear_bit(S_RF_KILL_HW, &il->status);
  1853. /* if RFKILL is not on, then wait for thermal
  1854. * sensor in adapter to kick in */
  1855. while (il3945_hw_get_temperature(il) == 0) {
  1856. thermal_spin++;
  1857. udelay(10);
  1858. }
  1859. if (thermal_spin)
  1860. D_INFO("Thermal calibration took %dus\n",
  1861. thermal_spin * 10);
  1862. } else
  1863. set_bit(S_RF_KILL_HW, &il->status);
  1864. /* After the ALIVE response, we can send commands to 3945 uCode */
  1865. set_bit(S_ALIVE, &il->status);
  1866. /* Enable watchdog to monitor the driver tx queues */
  1867. il_setup_watchdog(il);
  1868. if (il_is_rfkill(il))
  1869. return;
  1870. ieee80211_wake_queues(il->hw);
  1871. il->active_rate = RATES_MASK_3945;
  1872. il_power_update_mode(il, true);
  1873. if (il_is_associated(il)) {
  1874. struct il3945_rxon_cmd *active_rxon =
  1875. (struct il3945_rxon_cmd *)(&ctx->active);
  1876. ctx->staging.filter_flags |= RXON_FILTER_ASSOC_MSK;
  1877. active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  1878. } else {
  1879. /* Initialize our rx_config data */
  1880. il_connection_init_rx_config(il, ctx);
  1881. }
  1882. /* Configure Bluetooth device coexistence support */
  1883. il_send_bt_config(il);
  1884. set_bit(S_READY, &il->status);
  1885. /* Configure the adapter for unassociated operation */
  1886. il3945_commit_rxon(il, ctx);
  1887. il3945_reg_txpower_periodic(il);
  1888. D_INFO("ALIVE processing complete.\n");
  1889. wake_up(&il->wait_command_queue);
  1890. return;
  1891. restart:
  1892. queue_work(il->workqueue, &il->restart);
  1893. }
  1894. static void il3945_cancel_deferred_work(struct il_priv *il);
  1895. static void
  1896. __il3945_down(struct il_priv *il)
  1897. {
  1898. unsigned long flags;
  1899. int exit_pending;
  1900. D_INFO(DRV_NAME " is going down\n");
  1901. il_scan_cancel_timeout(il, 200);
  1902. exit_pending = test_and_set_bit(S_EXIT_PENDING, &il->status);
  1903. /* Stop TX queues watchdog. We need to have S_EXIT_PENDING bit set
  1904. * to prevent rearm timer */
  1905. del_timer_sync(&il->watchdog);
  1906. /* Station information will now be cleared in device */
  1907. il_clear_ucode_stations(il, NULL);
  1908. il_dealloc_bcast_stations(il);
  1909. il_clear_driver_stations(il);
  1910. /* Unblock any waiting calls */
  1911. wake_up_all(&il->wait_command_queue);
  1912. /* Wipe out the EXIT_PENDING status bit if we are not actually
  1913. * exiting the module */
  1914. if (!exit_pending)
  1915. clear_bit(S_EXIT_PENDING, &il->status);
  1916. /* stop and reset the on-board processor */
  1917. _il_wr(il, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
  1918. /* tell the device to stop sending interrupts */
  1919. spin_lock_irqsave(&il->lock, flags);
  1920. il_disable_interrupts(il);
  1921. spin_unlock_irqrestore(&il->lock, flags);
  1922. il3945_synchronize_irq(il);
  1923. if (il->mac80211_registered)
  1924. ieee80211_stop_queues(il->hw);
  1925. /* If we have not previously called il3945_init() then
  1926. * clear all bits but the RF Kill bits and return */
  1927. if (!il_is_init(il)) {
  1928. il->status =
  1929. test_bit(S_RF_KILL_HW,
  1930. &il->
  1931. status) << S_RF_KILL_HW |
  1932. test_bit(S_GEO_CONFIGURED,
  1933. &il->
  1934. status) << S_GEO_CONFIGURED |
  1935. test_bit(S_EXIT_PENDING, &il->status) << S_EXIT_PENDING;
  1936. goto exit;
  1937. }
  1938. /* ...otherwise clear out all the status bits but the RF Kill
  1939. * bit and continue taking the NIC down. */
  1940. il->status &=
  1941. test_bit(S_RF_KILL_HW,
  1942. &il->status) << S_RF_KILL_HW | test_bit(S_GEO_CONFIGURED,
  1943. &il->
  1944. status) <<
  1945. S_GEO_CONFIGURED | test_bit(S_FW_ERROR,
  1946. &il->
  1947. status) << S_FW_ERROR |
  1948. test_bit(S_EXIT_PENDING, &il->status) << S_EXIT_PENDING;
  1949. il3945_hw_txq_ctx_stop(il);
  1950. il3945_hw_rxq_stop(il);
  1951. /* Power-down device's busmaster DMA clocks */
  1952. il_wr_prph(il, APMG_CLK_DIS_REG, APMG_CLK_VAL_DMA_CLK_RQT);
  1953. udelay(5);
  1954. /* Stop the device, and put it in low power state */
  1955. il_apm_stop(il);
  1956. exit:
  1957. memset(&il->card_alive, 0, sizeof(struct il_alive_resp));
  1958. if (il->beacon_skb)
  1959. dev_kfree_skb(il->beacon_skb);
  1960. il->beacon_skb = NULL;
  1961. /* clear out any free frames */
  1962. il3945_clear_free_frames(il);
  1963. }
  1964. static void
  1965. il3945_down(struct il_priv *il)
  1966. {
  1967. mutex_lock(&il->mutex);
  1968. __il3945_down(il);
  1969. mutex_unlock(&il->mutex);
  1970. il3945_cancel_deferred_work(il);
  1971. }
  1972. #define MAX_HW_RESTARTS 5
  1973. static int
  1974. il3945_alloc_bcast_station(struct il_priv *il)
  1975. {
  1976. struct il_rxon_context *ctx = &il->ctx;
  1977. unsigned long flags;
  1978. u8 sta_id;
  1979. spin_lock_irqsave(&il->sta_lock, flags);
  1980. sta_id = il_prep_station(il, ctx, il_bcast_addr, false, NULL);
  1981. if (sta_id == IL_INVALID_STATION) {
  1982. IL_ERR("Unable to prepare broadcast station\n");
  1983. spin_unlock_irqrestore(&il->sta_lock, flags);
  1984. return -EINVAL;
  1985. }
  1986. il->stations[sta_id].used |= IL_STA_DRIVER_ACTIVE;
  1987. il->stations[sta_id].used |= IL_STA_BCAST;
  1988. spin_unlock_irqrestore(&il->sta_lock, flags);
  1989. return 0;
  1990. }
  1991. static int
  1992. __il3945_up(struct il_priv *il)
  1993. {
  1994. int rc, i;
  1995. rc = il3945_alloc_bcast_station(il);
  1996. if (rc)
  1997. return rc;
  1998. if (test_bit(S_EXIT_PENDING, &il->status)) {
  1999. IL_WARN("Exit pending; will not bring the NIC up\n");
  2000. return -EIO;
  2001. }
  2002. if (!il->ucode_data_backup.v_addr || !il->ucode_data.v_addr) {
  2003. IL_ERR("ucode not available for device bring up\n");
  2004. return -EIO;
  2005. }
  2006. /* If platform's RF_KILL switch is NOT set to KILL */
  2007. if (_il_rd(il, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
  2008. clear_bit(S_RF_KILL_HW, &il->status);
  2009. else {
  2010. set_bit(S_RF_KILL_HW, &il->status);
  2011. IL_WARN("Radio disabled by HW RF Kill switch\n");
  2012. return -ENODEV;
  2013. }
  2014. _il_wr(il, CSR_INT, 0xFFFFFFFF);
  2015. rc = il3945_hw_nic_init(il);
  2016. if (rc) {
  2017. IL_ERR("Unable to int nic\n");
  2018. return rc;
  2019. }
  2020. /* make sure rfkill handshake bits are cleared */
  2021. _il_wr(il, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  2022. _il_wr(il, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  2023. /* clear (again), then enable host interrupts */
  2024. _il_wr(il, CSR_INT, 0xFFFFFFFF);
  2025. il_enable_interrupts(il);
  2026. /* really make sure rfkill handshake bits are cleared */
  2027. _il_wr(il, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  2028. _il_wr(il, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  2029. /* Copy original ucode data image from disk into backup cache.
  2030. * This will be used to initialize the on-board processor's
  2031. * data SRAM for a clean start when the runtime program first loads. */
  2032. memcpy(il->ucode_data_backup.v_addr, il->ucode_data.v_addr,
  2033. il->ucode_data.len);
  2034. /* We return success when we resume from suspend and rf_kill is on. */
  2035. if (test_bit(S_RF_KILL_HW, &il->status))
  2036. return 0;
  2037. for (i = 0; i < MAX_HW_RESTARTS; i++) {
  2038. /* load bootstrap state machine,
  2039. * load bootstrap program into processor's memory,
  2040. * prepare to load the "initialize" uCode */
  2041. rc = il->cfg->ops->lib->load_ucode(il);
  2042. if (rc) {
  2043. IL_ERR("Unable to set up bootstrap uCode: %d\n", rc);
  2044. continue;
  2045. }
  2046. /* start card; "initialize" will load runtime ucode */
  2047. il3945_nic_start(il);
  2048. D_INFO(DRV_NAME " is coming up\n");
  2049. return 0;
  2050. }
  2051. set_bit(S_EXIT_PENDING, &il->status);
  2052. __il3945_down(il);
  2053. clear_bit(S_EXIT_PENDING, &il->status);
  2054. /* tried to restart and config the device for as long as our
  2055. * patience could withstand */
  2056. IL_ERR("Unable to initialize device after %d attempts.\n", i);
  2057. return -EIO;
  2058. }
  2059. /*****************************************************************************
  2060. *
  2061. * Workqueue callbacks
  2062. *
  2063. *****************************************************************************/
  2064. static void
  2065. il3945_bg_init_alive_start(struct work_struct *data)
  2066. {
  2067. struct il_priv *il =
  2068. container_of(data, struct il_priv, init_alive_start.work);
  2069. mutex_lock(&il->mutex);
  2070. if (test_bit(S_EXIT_PENDING, &il->status))
  2071. goto out;
  2072. il3945_init_alive_start(il);
  2073. out:
  2074. mutex_unlock(&il->mutex);
  2075. }
  2076. static void
  2077. il3945_bg_alive_start(struct work_struct *data)
  2078. {
  2079. struct il_priv *il =
  2080. container_of(data, struct il_priv, alive_start.work);
  2081. mutex_lock(&il->mutex);
  2082. if (test_bit(S_EXIT_PENDING, &il->status))
  2083. goto out;
  2084. il3945_alive_start(il);
  2085. out:
  2086. mutex_unlock(&il->mutex);
  2087. }
  2088. /*
  2089. * 3945 cannot interrupt driver when hardware rf kill switch toggles;
  2090. * driver must poll CSR_GP_CNTRL_REG register for change. This register
  2091. * *is* readable even when device has been SW_RESET into low power mode
  2092. * (e.g. during RF KILL).
  2093. */
  2094. static void
  2095. il3945_rfkill_poll(struct work_struct *data)
  2096. {
  2097. struct il_priv *il =
  2098. container_of(data, struct il_priv, _3945.rfkill_poll.work);
  2099. bool old_rfkill = test_bit(S_RF_KILL_HW, &il->status);
  2100. bool new_rfkill =
  2101. !(_il_rd(il, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW);
  2102. if (new_rfkill != old_rfkill) {
  2103. if (new_rfkill)
  2104. set_bit(S_RF_KILL_HW, &il->status);
  2105. else
  2106. clear_bit(S_RF_KILL_HW, &il->status);
  2107. wiphy_rfkill_set_hw_state(il->hw->wiphy, new_rfkill);
  2108. D_RF_KILL("RF_KILL bit toggled to %s.\n",
  2109. new_rfkill ? "disable radio" : "enable radio");
  2110. }
  2111. /* Keep this running, even if radio now enabled. This will be
  2112. * cancelled in mac_start() if system decides to start again */
  2113. queue_delayed_work(il->workqueue, &il->_3945.rfkill_poll,
  2114. round_jiffies_relative(2 * HZ));
  2115. }
  2116. int
  2117. il3945_request_scan(struct il_priv *il, struct ieee80211_vif *vif)
  2118. {
  2119. struct il_host_cmd cmd = {
  2120. .id = C_SCAN,
  2121. .len = sizeof(struct il3945_scan_cmd),
  2122. .flags = CMD_SIZE_HUGE,
  2123. };
  2124. struct il3945_scan_cmd *scan;
  2125. u8 n_probes = 0;
  2126. enum ieee80211_band band;
  2127. bool is_active = false;
  2128. int ret;
  2129. u16 len;
  2130. lockdep_assert_held(&il->mutex);
  2131. if (!il->scan_cmd) {
  2132. il->scan_cmd =
  2133. kmalloc(sizeof(struct il3945_scan_cmd) + IL_MAX_SCAN_SIZE,
  2134. GFP_KERNEL);
  2135. if (!il->scan_cmd) {
  2136. D_SCAN("Fail to allocate scan memory\n");
  2137. return -ENOMEM;
  2138. }
  2139. }
  2140. scan = il->scan_cmd;
  2141. memset(scan, 0, sizeof(struct il3945_scan_cmd) + IL_MAX_SCAN_SIZE);
  2142. scan->quiet_plcp_th = IL_PLCP_QUIET_THRESH;
  2143. scan->quiet_time = IL_ACTIVE_QUIET_TIME;
  2144. if (il_is_associated(il)) {
  2145. u16 interval;
  2146. u32 extra;
  2147. u32 suspend_time = 100;
  2148. u32 scan_suspend_time = 100;
  2149. D_INFO("Scanning while associated...\n");
  2150. interval = vif->bss_conf.beacon_int;
  2151. scan->suspend_time = 0;
  2152. scan->max_out_time = cpu_to_le32(200 * 1024);
  2153. if (!interval)
  2154. interval = suspend_time;
  2155. /*
  2156. * suspend time format:
  2157. * 0-19: beacon interval in usec (time before exec.)
  2158. * 20-23: 0
  2159. * 24-31: number of beacons (suspend between channels)
  2160. */
  2161. extra = (suspend_time / interval) << 24;
  2162. scan_suspend_time =
  2163. 0xFF0FFFFF & (extra | ((suspend_time % interval) * 1024));
  2164. scan->suspend_time = cpu_to_le32(scan_suspend_time);
  2165. D_SCAN("suspend_time 0x%X beacon interval %d\n",
  2166. scan_suspend_time, interval);
  2167. }
  2168. if (il->scan_request->n_ssids) {
  2169. int i, p = 0;
  2170. D_SCAN("Kicking off active scan\n");
  2171. for (i = 0; i < il->scan_request->n_ssids; i++) {
  2172. /* always does wildcard anyway */
  2173. if (!il->scan_request->ssids[i].ssid_len)
  2174. continue;
  2175. scan->direct_scan[p].id = WLAN_EID_SSID;
  2176. scan->direct_scan[p].len =
  2177. il->scan_request->ssids[i].ssid_len;
  2178. memcpy(scan->direct_scan[p].ssid,
  2179. il->scan_request->ssids[i].ssid,
  2180. il->scan_request->ssids[i].ssid_len);
  2181. n_probes++;
  2182. p++;
  2183. }
  2184. is_active = true;
  2185. } else
  2186. D_SCAN("Kicking off passive scan.\n");
  2187. /* We don't build a direct scan probe request; the uCode will do
  2188. * that based on the direct_mask added to each channel entry */
  2189. scan->tx_cmd.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK;
  2190. scan->tx_cmd.sta_id = il->ctx.bcast_sta_id;
  2191. scan->tx_cmd.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
  2192. /* flags + rate selection */
  2193. switch (il->scan_band) {
  2194. case IEEE80211_BAND_2GHZ:
  2195. scan->flags = RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK;
  2196. scan->tx_cmd.rate = RATE_1M_PLCP;
  2197. band = IEEE80211_BAND_2GHZ;
  2198. break;
  2199. case IEEE80211_BAND_5GHZ:
  2200. scan->tx_cmd.rate = RATE_6M_PLCP;
  2201. band = IEEE80211_BAND_5GHZ;
  2202. break;
  2203. default:
  2204. IL_WARN("Invalid scan band\n");
  2205. return -EIO;
  2206. }
  2207. /*
  2208. * If active scaning is requested but a certain channel is marked
  2209. * passive, we can do active scanning if we detect transmissions. For
  2210. * passive only scanning disable switching to active on any channel.
  2211. */
  2212. scan->good_CRC_th =
  2213. is_active ? IL_GOOD_CRC_TH_DEFAULT : IL_GOOD_CRC_TH_NEVER;
  2214. len =
  2215. il_fill_probe_req(il, (struct ieee80211_mgmt *)scan->data,
  2216. vif->addr, il->scan_request->ie,
  2217. il->scan_request->ie_len,
  2218. IL_MAX_SCAN_SIZE - sizeof(*scan));
  2219. scan->tx_cmd.len = cpu_to_le16(len);
  2220. /* select Rx antennas */
  2221. scan->flags |= il3945_get_antenna_flags(il);
  2222. scan->channel_count =
  2223. il3945_get_channels_for_scan(il, band, is_active, n_probes,
  2224. (void *)&scan->data[len], vif);
  2225. if (scan->channel_count == 0) {
  2226. D_SCAN("channel count %d\n", scan->channel_count);
  2227. return -EIO;
  2228. }
  2229. cmd.len +=
  2230. le16_to_cpu(scan->tx_cmd.len) +
  2231. scan->channel_count * sizeof(struct il3945_scan_channel);
  2232. cmd.data = scan;
  2233. scan->len = cpu_to_le16(cmd.len);
  2234. set_bit(S_SCAN_HW, &il->status);
  2235. ret = il_send_cmd_sync(il, &cmd);
  2236. if (ret)
  2237. clear_bit(S_SCAN_HW, &il->status);
  2238. return ret;
  2239. }
  2240. void
  2241. il3945_post_scan(struct il_priv *il)
  2242. {
  2243. struct il_rxon_context *ctx = &il->ctx;
  2244. /*
  2245. * Since setting the RXON may have been deferred while
  2246. * performing the scan, fire one off if needed
  2247. */
  2248. if (memcmp(&ctx->staging, &ctx->active, sizeof(ctx->staging)))
  2249. il3945_commit_rxon(il, ctx);
  2250. }
  2251. static void
  2252. il3945_bg_restart(struct work_struct *data)
  2253. {
  2254. struct il_priv *il = container_of(data, struct il_priv, restart);
  2255. if (test_bit(S_EXIT_PENDING, &il->status))
  2256. return;
  2257. if (test_and_clear_bit(S_FW_ERROR, &il->status)) {
  2258. mutex_lock(&il->mutex);
  2259. il->ctx.vif = NULL;
  2260. il->is_open = 0;
  2261. mutex_unlock(&il->mutex);
  2262. il3945_down(il);
  2263. ieee80211_restart_hw(il->hw);
  2264. } else {
  2265. il3945_down(il);
  2266. mutex_lock(&il->mutex);
  2267. if (test_bit(S_EXIT_PENDING, &il->status)) {
  2268. mutex_unlock(&il->mutex);
  2269. return;
  2270. }
  2271. __il3945_up(il);
  2272. mutex_unlock(&il->mutex);
  2273. }
  2274. }
  2275. static void
  2276. il3945_bg_rx_replenish(struct work_struct *data)
  2277. {
  2278. struct il_priv *il = container_of(data, struct il_priv, rx_replenish);
  2279. mutex_lock(&il->mutex);
  2280. if (test_bit(S_EXIT_PENDING, &il->status))
  2281. goto out;
  2282. il3945_rx_replenish(il);
  2283. out:
  2284. mutex_unlock(&il->mutex);
  2285. }
  2286. void
  2287. il3945_post_associate(struct il_priv *il)
  2288. {
  2289. int rc = 0;
  2290. struct ieee80211_conf *conf = NULL;
  2291. struct il_rxon_context *ctx = &il->ctx;
  2292. if (!ctx->vif || !il->is_open)
  2293. return;
  2294. D_ASSOC("Associated as %d to: %pM\n", ctx->vif->bss_conf.aid,
  2295. ctx->active.bssid_addr);
  2296. if (test_bit(S_EXIT_PENDING, &il->status))
  2297. return;
  2298. il_scan_cancel_timeout(il, 200);
  2299. conf = &il->hw->conf;
  2300. ctx->staging.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  2301. il3945_commit_rxon(il, ctx);
  2302. rc = il_send_rxon_timing(il, ctx);
  2303. if (rc)
  2304. IL_WARN("C_RXON_TIMING failed - " "Attempting to continue.\n");
  2305. ctx->staging.filter_flags |= RXON_FILTER_ASSOC_MSK;
  2306. ctx->staging.assoc_id = cpu_to_le16(ctx->vif->bss_conf.aid);
  2307. D_ASSOC("assoc id %d beacon interval %d\n", ctx->vif->bss_conf.aid,
  2308. ctx->vif->bss_conf.beacon_int);
  2309. if (ctx->vif->bss_conf.use_short_preamble)
  2310. ctx->staging.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  2311. else
  2312. ctx->staging.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  2313. if (ctx->staging.flags & RXON_FLG_BAND_24G_MSK) {
  2314. if (ctx->vif->bss_conf.use_short_slot)
  2315. ctx->staging.flags |= RXON_FLG_SHORT_SLOT_MSK;
  2316. else
  2317. ctx->staging.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  2318. }
  2319. il3945_commit_rxon(il, ctx);
  2320. switch (ctx->vif->type) {
  2321. case NL80211_IFTYPE_STATION:
  2322. il3945_rate_scale_init(il->hw, IL_AP_ID);
  2323. break;
  2324. case NL80211_IFTYPE_ADHOC:
  2325. il3945_send_beacon_cmd(il);
  2326. break;
  2327. default:
  2328. IL_ERR("%s Should not be called in %d mode\n", __func__,
  2329. ctx->vif->type);
  2330. break;
  2331. }
  2332. }
  2333. /*****************************************************************************
  2334. *
  2335. * mac80211 entry point functions
  2336. *
  2337. *****************************************************************************/
  2338. #define UCODE_READY_TIMEOUT (2 * HZ)
  2339. static int
  2340. il3945_mac_start(struct ieee80211_hw *hw)
  2341. {
  2342. struct il_priv *il = hw->priv;
  2343. int ret;
  2344. D_MAC80211("enter\n");
  2345. /* we should be verifying the device is ready to be opened */
  2346. mutex_lock(&il->mutex);
  2347. /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
  2348. * ucode filename and max sizes are card-specific. */
  2349. if (!il->ucode_code.len) {
  2350. ret = il3945_read_ucode(il);
  2351. if (ret) {
  2352. IL_ERR("Could not read microcode: %d\n", ret);
  2353. mutex_unlock(&il->mutex);
  2354. goto out_release_irq;
  2355. }
  2356. }
  2357. ret = __il3945_up(il);
  2358. mutex_unlock(&il->mutex);
  2359. if (ret)
  2360. goto out_release_irq;
  2361. D_INFO("Start UP work.\n");
  2362. /* Wait for START_ALIVE from ucode. Otherwise callbacks from
  2363. * mac80211 will not be run successfully. */
  2364. ret = wait_event_timeout(il->wait_command_queue,
  2365. test_bit(S_READY, &il->status),
  2366. UCODE_READY_TIMEOUT);
  2367. if (!ret) {
  2368. if (!test_bit(S_READY, &il->status)) {
  2369. IL_ERR("Wait for START_ALIVE timeout after %dms.\n",
  2370. jiffies_to_msecs(UCODE_READY_TIMEOUT));
  2371. ret = -ETIMEDOUT;
  2372. goto out_release_irq;
  2373. }
  2374. }
  2375. /* ucode is running and will send rfkill notifications,
  2376. * no need to poll the killswitch state anymore */
  2377. cancel_delayed_work(&il->_3945.rfkill_poll);
  2378. il->is_open = 1;
  2379. D_MAC80211("leave\n");
  2380. return 0;
  2381. out_release_irq:
  2382. il->is_open = 0;
  2383. D_MAC80211("leave - failed\n");
  2384. return ret;
  2385. }
  2386. static void
  2387. il3945_mac_stop(struct ieee80211_hw *hw)
  2388. {
  2389. struct il_priv *il = hw->priv;
  2390. D_MAC80211("enter\n");
  2391. if (!il->is_open) {
  2392. D_MAC80211("leave - skip\n");
  2393. return;
  2394. }
  2395. il->is_open = 0;
  2396. il3945_down(il);
  2397. flush_workqueue(il->workqueue);
  2398. /* start polling the killswitch state again */
  2399. queue_delayed_work(il->workqueue, &il->_3945.rfkill_poll,
  2400. round_jiffies_relative(2 * HZ));
  2401. D_MAC80211("leave\n");
  2402. }
  2403. static void
  2404. il3945_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
  2405. {
  2406. struct il_priv *il = hw->priv;
  2407. D_MAC80211("enter\n");
  2408. D_TX("dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
  2409. ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate);
  2410. if (il3945_tx_skb(il, skb))
  2411. dev_kfree_skb_any(skb);
  2412. D_MAC80211("leave\n");
  2413. }
  2414. void
  2415. il3945_config_ap(struct il_priv *il)
  2416. {
  2417. struct il_rxon_context *ctx = &il->ctx;
  2418. struct ieee80211_vif *vif = ctx->vif;
  2419. int rc = 0;
  2420. if (test_bit(S_EXIT_PENDING, &il->status))
  2421. return;
  2422. /* The following should be done only at AP bring up */
  2423. if (!(il_is_associated(il))) {
  2424. /* RXON - unassoc (to set timing command) */
  2425. ctx->staging.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  2426. il3945_commit_rxon(il, ctx);
  2427. /* RXON Timing */
  2428. rc = il_send_rxon_timing(il, ctx);
  2429. if (rc)
  2430. IL_WARN("C_RXON_TIMING failed - "
  2431. "Attempting to continue.\n");
  2432. ctx->staging.assoc_id = 0;
  2433. if (vif->bss_conf.use_short_preamble)
  2434. ctx->staging.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  2435. else
  2436. ctx->staging.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  2437. if (ctx->staging.flags & RXON_FLG_BAND_24G_MSK) {
  2438. if (vif->bss_conf.use_short_slot)
  2439. ctx->staging.flags |= RXON_FLG_SHORT_SLOT_MSK;
  2440. else
  2441. ctx->staging.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  2442. }
  2443. /* restore RXON assoc */
  2444. ctx->staging.filter_flags |= RXON_FILTER_ASSOC_MSK;
  2445. il3945_commit_rxon(il, ctx);
  2446. }
  2447. il3945_send_beacon_cmd(il);
  2448. }
  2449. static int
  2450. il3945_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
  2451. struct ieee80211_vif *vif, struct ieee80211_sta *sta,
  2452. struct ieee80211_key_conf *key)
  2453. {
  2454. struct il_priv *il = hw->priv;
  2455. int ret = 0;
  2456. u8 sta_id = IL_INVALID_STATION;
  2457. u8 static_key;
  2458. D_MAC80211("enter\n");
  2459. if (il3945_mod_params.sw_crypto) {
  2460. D_MAC80211("leave - hwcrypto disabled\n");
  2461. return -EOPNOTSUPP;
  2462. }
  2463. /*
  2464. * To support IBSS RSN, don't program group keys in IBSS, the
  2465. * hardware will then not attempt to decrypt the frames.
  2466. */
  2467. if (vif->type == NL80211_IFTYPE_ADHOC &&
  2468. !(key->flags & IEEE80211_KEY_FLAG_PAIRWISE))
  2469. return -EOPNOTSUPP;
  2470. static_key = !il_is_associated(il);
  2471. if (!static_key) {
  2472. sta_id = il_sta_id_or_broadcast(il, &il->ctx, sta);
  2473. if (sta_id == IL_INVALID_STATION)
  2474. return -EINVAL;
  2475. }
  2476. mutex_lock(&il->mutex);
  2477. il_scan_cancel_timeout(il, 100);
  2478. switch (cmd) {
  2479. case SET_KEY:
  2480. if (static_key)
  2481. ret = il3945_set_static_key(il, key);
  2482. else
  2483. ret = il3945_set_dynamic_key(il, key, sta_id);
  2484. D_MAC80211("enable hwcrypto key\n");
  2485. break;
  2486. case DISABLE_KEY:
  2487. if (static_key)
  2488. ret = il3945_remove_static_key(il);
  2489. else
  2490. ret = il3945_clear_sta_key_info(il, sta_id);
  2491. D_MAC80211("disable hwcrypto key\n");
  2492. break;
  2493. default:
  2494. ret = -EINVAL;
  2495. }
  2496. mutex_unlock(&il->mutex);
  2497. D_MAC80211("leave\n");
  2498. return ret;
  2499. }
  2500. static int
  2501. il3945_mac_sta_add(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
  2502. struct ieee80211_sta *sta)
  2503. {
  2504. struct il_priv *il = hw->priv;
  2505. struct il3945_sta_priv *sta_priv = (void *)sta->drv_priv;
  2506. int ret;
  2507. bool is_ap = vif->type == NL80211_IFTYPE_STATION;
  2508. u8 sta_id;
  2509. D_INFO("received request to add station %pM\n", sta->addr);
  2510. mutex_lock(&il->mutex);
  2511. D_INFO("proceeding to add station %pM\n", sta->addr);
  2512. sta_priv->common.sta_id = IL_INVALID_STATION;
  2513. ret =
  2514. il_add_station_common(il, &il->ctx, sta->addr, is_ap, sta, &sta_id);
  2515. if (ret) {
  2516. IL_ERR("Unable to add station %pM (%d)\n", sta->addr, ret);
  2517. /* Should we return success if return code is EEXIST ? */
  2518. mutex_unlock(&il->mutex);
  2519. return ret;
  2520. }
  2521. sta_priv->common.sta_id = sta_id;
  2522. /* Initialize rate scaling */
  2523. D_INFO("Initializing rate scaling for station %pM\n", sta->addr);
  2524. il3945_rs_rate_init(il, sta, sta_id);
  2525. mutex_unlock(&il->mutex);
  2526. return 0;
  2527. }
  2528. static void
  2529. il3945_configure_filter(struct ieee80211_hw *hw, unsigned int changed_flags,
  2530. unsigned int *total_flags, u64 multicast)
  2531. {
  2532. struct il_priv *il = hw->priv;
  2533. __le32 filter_or = 0, filter_nand = 0;
  2534. struct il_rxon_context *ctx = &il->ctx;
  2535. #define CHK(test, flag) do { \
  2536. if (*total_flags & (test)) \
  2537. filter_or |= (flag); \
  2538. else \
  2539. filter_nand |= (flag); \
  2540. } while (0)
  2541. D_MAC80211("Enter: changed: 0x%x, total: 0x%x\n", changed_flags,
  2542. *total_flags);
  2543. CHK(FIF_OTHER_BSS | FIF_PROMISC_IN_BSS, RXON_FILTER_PROMISC_MSK);
  2544. CHK(FIF_CONTROL, RXON_FILTER_CTL2HOST_MSK);
  2545. CHK(FIF_BCN_PRBRESP_PROMISC, RXON_FILTER_BCON_AWARE_MSK);
  2546. #undef CHK
  2547. mutex_lock(&il->mutex);
  2548. ctx->staging.filter_flags &= ~filter_nand;
  2549. ctx->staging.filter_flags |= filter_or;
  2550. /*
  2551. * Not committing directly because hardware can perform a scan,
  2552. * but even if hw is ready, committing here breaks for some reason,
  2553. * we'll eventually commit the filter flags change anyway.
  2554. */
  2555. mutex_unlock(&il->mutex);
  2556. /*
  2557. * Receiving all multicast frames is always enabled by the
  2558. * default flags setup in il_connection_init_rx_config()
  2559. * since we currently do not support programming multicast
  2560. * filters into the device.
  2561. */
  2562. *total_flags &=
  2563. FIF_OTHER_BSS | FIF_ALLMULTI | FIF_PROMISC_IN_BSS |
  2564. FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL;
  2565. }
  2566. /*****************************************************************************
  2567. *
  2568. * sysfs attributes
  2569. *
  2570. *****************************************************************************/
  2571. #ifdef CONFIG_IWLEGACY_DEBUG
  2572. /*
  2573. * The following adds a new attribute to the sysfs representation
  2574. * of this device driver (i.e. a new file in /sys/bus/pci/drivers/iwl/)
  2575. * used for controlling the debug level.
  2576. *
  2577. * See the level definitions in iwl for details.
  2578. *
  2579. * The debug_level being managed using sysfs below is a per device debug
  2580. * level that is used instead of the global debug level if it (the per
  2581. * device debug level) is set.
  2582. */
  2583. static ssize_t
  2584. il3945_show_debug_level(struct device *d, struct device_attribute *attr,
  2585. char *buf)
  2586. {
  2587. struct il_priv *il = dev_get_drvdata(d);
  2588. return sprintf(buf, "0x%08X\n", il_get_debug_level(il));
  2589. }
  2590. static ssize_t
  2591. il3945_store_debug_level(struct device *d, struct device_attribute *attr,
  2592. const char *buf, size_t count)
  2593. {
  2594. struct il_priv *il = dev_get_drvdata(d);
  2595. unsigned long val;
  2596. int ret;
  2597. ret = strict_strtoul(buf, 0, &val);
  2598. if (ret)
  2599. IL_INFO("%s is not in hex or decimal form.\n", buf);
  2600. else {
  2601. il->debug_level = val;
  2602. if (il_alloc_traffic_mem(il))
  2603. IL_ERR("Not enough memory to generate traffic log\n");
  2604. }
  2605. return strnlen(buf, count);
  2606. }
  2607. static DEVICE_ATTR(debug_level, S_IWUSR | S_IRUGO, il3945_show_debug_level,
  2608. il3945_store_debug_level);
  2609. #endif /* CONFIG_IWLEGACY_DEBUG */
  2610. static ssize_t
  2611. il3945_show_temperature(struct device *d, struct device_attribute *attr,
  2612. char *buf)
  2613. {
  2614. struct il_priv *il = dev_get_drvdata(d);
  2615. if (!il_is_alive(il))
  2616. return -EAGAIN;
  2617. return sprintf(buf, "%d\n", il3945_hw_get_temperature(il));
  2618. }
  2619. static DEVICE_ATTR(temperature, S_IRUGO, il3945_show_temperature, NULL);
  2620. static ssize_t
  2621. il3945_show_tx_power(struct device *d, struct device_attribute *attr, char *buf)
  2622. {
  2623. struct il_priv *il = dev_get_drvdata(d);
  2624. return sprintf(buf, "%d\n", il->tx_power_user_lmt);
  2625. }
  2626. static ssize_t
  2627. il3945_store_tx_power(struct device *d, struct device_attribute *attr,
  2628. const char *buf, size_t count)
  2629. {
  2630. struct il_priv *il = dev_get_drvdata(d);
  2631. char *p = (char *)buf;
  2632. u32 val;
  2633. val = simple_strtoul(p, &p, 10);
  2634. if (p == buf)
  2635. IL_INFO(": %s is not in decimal form.\n", buf);
  2636. else
  2637. il3945_hw_reg_set_txpower(il, val);
  2638. return count;
  2639. }
  2640. static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, il3945_show_tx_power,
  2641. il3945_store_tx_power);
  2642. static ssize_t
  2643. il3945_show_flags(struct device *d, struct device_attribute *attr, char *buf)
  2644. {
  2645. struct il_priv *il = dev_get_drvdata(d);
  2646. struct il_rxon_context *ctx = &il->ctx;
  2647. return sprintf(buf, "0x%04X\n", ctx->active.flags);
  2648. }
  2649. static ssize_t
  2650. il3945_store_flags(struct device *d, struct device_attribute *attr,
  2651. const char *buf, size_t count)
  2652. {
  2653. struct il_priv *il = dev_get_drvdata(d);
  2654. u32 flags = simple_strtoul(buf, NULL, 0);
  2655. struct il_rxon_context *ctx = &il->ctx;
  2656. mutex_lock(&il->mutex);
  2657. if (le32_to_cpu(ctx->staging.flags) != flags) {
  2658. /* Cancel any currently running scans... */
  2659. if (il_scan_cancel_timeout(il, 100))
  2660. IL_WARN("Could not cancel scan.\n");
  2661. else {
  2662. D_INFO("Committing rxon.flags = 0x%04X\n", flags);
  2663. ctx->staging.flags = cpu_to_le32(flags);
  2664. il3945_commit_rxon(il, ctx);
  2665. }
  2666. }
  2667. mutex_unlock(&il->mutex);
  2668. return count;
  2669. }
  2670. static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, il3945_show_flags,
  2671. il3945_store_flags);
  2672. static ssize_t
  2673. il3945_show_filter_flags(struct device *d, struct device_attribute *attr,
  2674. char *buf)
  2675. {
  2676. struct il_priv *il = dev_get_drvdata(d);
  2677. struct il_rxon_context *ctx = &il->ctx;
  2678. return sprintf(buf, "0x%04X\n", le32_to_cpu(ctx->active.filter_flags));
  2679. }
  2680. static ssize_t
  2681. il3945_store_filter_flags(struct device *d, struct device_attribute *attr,
  2682. const char *buf, size_t count)
  2683. {
  2684. struct il_priv *il = dev_get_drvdata(d);
  2685. struct il_rxon_context *ctx = &il->ctx;
  2686. u32 filter_flags = simple_strtoul(buf, NULL, 0);
  2687. mutex_lock(&il->mutex);
  2688. if (le32_to_cpu(ctx->staging.filter_flags) != filter_flags) {
  2689. /* Cancel any currently running scans... */
  2690. if (il_scan_cancel_timeout(il, 100))
  2691. IL_WARN("Could not cancel scan.\n");
  2692. else {
  2693. D_INFO("Committing rxon.filter_flags = " "0x%04X\n",
  2694. filter_flags);
  2695. ctx->staging.filter_flags = cpu_to_le32(filter_flags);
  2696. il3945_commit_rxon(il, ctx);
  2697. }
  2698. }
  2699. mutex_unlock(&il->mutex);
  2700. return count;
  2701. }
  2702. static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, il3945_show_filter_flags,
  2703. il3945_store_filter_flags);
  2704. static ssize_t
  2705. il3945_show_measurement(struct device *d, struct device_attribute *attr,
  2706. char *buf)
  2707. {
  2708. struct il_priv *il = dev_get_drvdata(d);
  2709. struct il_spectrum_notification measure_report;
  2710. u32 size = sizeof(measure_report), len = 0, ofs = 0;
  2711. u8 *data = (u8 *) &measure_report;
  2712. unsigned long flags;
  2713. spin_lock_irqsave(&il->lock, flags);
  2714. if (!(il->measurement_status & MEASUREMENT_READY)) {
  2715. spin_unlock_irqrestore(&il->lock, flags);
  2716. return 0;
  2717. }
  2718. memcpy(&measure_report, &il->measure_report, size);
  2719. il->measurement_status = 0;
  2720. spin_unlock_irqrestore(&il->lock, flags);
  2721. while (size && PAGE_SIZE - len) {
  2722. hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
  2723. PAGE_SIZE - len, 1);
  2724. len = strlen(buf);
  2725. if (PAGE_SIZE - len)
  2726. buf[len++] = '\n';
  2727. ofs += 16;
  2728. size -= min(size, 16U);
  2729. }
  2730. return len;
  2731. }
  2732. static ssize_t
  2733. il3945_store_measurement(struct device *d, struct device_attribute *attr,
  2734. const char *buf, size_t count)
  2735. {
  2736. struct il_priv *il = dev_get_drvdata(d);
  2737. struct il_rxon_context *ctx = &il->ctx;
  2738. struct ieee80211_measurement_params params = {
  2739. .channel = le16_to_cpu(ctx->active.channel),
  2740. .start_time = cpu_to_le64(il->_3945.last_tsf),
  2741. .duration = cpu_to_le16(1),
  2742. };
  2743. u8 type = IL_MEASURE_BASIC;
  2744. u8 buffer[32];
  2745. u8 channel;
  2746. if (count) {
  2747. char *p = buffer;
  2748. strncpy(buffer, buf, min(sizeof(buffer), count));
  2749. channel = simple_strtoul(p, NULL, 0);
  2750. if (channel)
  2751. params.channel = channel;
  2752. p = buffer;
  2753. while (*p && *p != ' ')
  2754. p++;
  2755. if (*p)
  2756. type = simple_strtoul(p + 1, NULL, 0);
  2757. }
  2758. D_INFO("Invoking measurement of type %d on " "channel %d (for '%s')\n",
  2759. type, params.channel, buf);
  2760. il3945_get_measurement(il, &params, type);
  2761. return count;
  2762. }
  2763. static DEVICE_ATTR(measurement, S_IRUSR | S_IWUSR, il3945_show_measurement,
  2764. il3945_store_measurement);
  2765. static ssize_t
  2766. il3945_store_retry_rate(struct device *d, struct device_attribute *attr,
  2767. const char *buf, size_t count)
  2768. {
  2769. struct il_priv *il = dev_get_drvdata(d);
  2770. il->retry_rate = simple_strtoul(buf, NULL, 0);
  2771. if (il->retry_rate <= 0)
  2772. il->retry_rate = 1;
  2773. return count;
  2774. }
  2775. static ssize_t
  2776. il3945_show_retry_rate(struct device *d, struct device_attribute *attr,
  2777. char *buf)
  2778. {
  2779. struct il_priv *il = dev_get_drvdata(d);
  2780. return sprintf(buf, "%d", il->retry_rate);
  2781. }
  2782. static DEVICE_ATTR(retry_rate, S_IWUSR | S_IRUSR, il3945_show_retry_rate,
  2783. il3945_store_retry_rate);
  2784. static ssize_t
  2785. il3945_show_channels(struct device *d, struct device_attribute *attr, char *buf)
  2786. {
  2787. /* all this shit doesn't belong into sysfs anyway */
  2788. return 0;
  2789. }
  2790. static DEVICE_ATTR(channels, S_IRUSR, il3945_show_channels, NULL);
  2791. static ssize_t
  2792. il3945_show_antenna(struct device *d, struct device_attribute *attr, char *buf)
  2793. {
  2794. struct il_priv *il = dev_get_drvdata(d);
  2795. if (!il_is_alive(il))
  2796. return -EAGAIN;
  2797. return sprintf(buf, "%d\n", il3945_mod_params.antenna);
  2798. }
  2799. static ssize_t
  2800. il3945_store_antenna(struct device *d, struct device_attribute *attr,
  2801. const char *buf, size_t count)
  2802. {
  2803. struct il_priv *il __maybe_unused = dev_get_drvdata(d);
  2804. int ant;
  2805. if (count == 0)
  2806. return 0;
  2807. if (sscanf(buf, "%1i", &ant) != 1) {
  2808. D_INFO("not in hex or decimal form.\n");
  2809. return count;
  2810. }
  2811. if (ant >= 0 && ant <= 2) {
  2812. D_INFO("Setting antenna select to %d.\n", ant);
  2813. il3945_mod_params.antenna = (enum il3945_antenna)ant;
  2814. } else
  2815. D_INFO("Bad antenna select value %d.\n", ant);
  2816. return count;
  2817. }
  2818. static DEVICE_ATTR(antenna, S_IWUSR | S_IRUGO, il3945_show_antenna,
  2819. il3945_store_antenna);
  2820. static ssize_t
  2821. il3945_show_status(struct device *d, struct device_attribute *attr, char *buf)
  2822. {
  2823. struct il_priv *il = dev_get_drvdata(d);
  2824. if (!il_is_alive(il))
  2825. return -EAGAIN;
  2826. return sprintf(buf, "0x%08x\n", (int)il->status);
  2827. }
  2828. static DEVICE_ATTR(status, S_IRUGO, il3945_show_status, NULL);
  2829. static ssize_t
  2830. il3945_dump_error_log(struct device *d, struct device_attribute *attr,
  2831. const char *buf, size_t count)
  2832. {
  2833. struct il_priv *il = dev_get_drvdata(d);
  2834. char *p = (char *)buf;
  2835. if (p[0] == '1')
  2836. il3945_dump_nic_error_log(il);
  2837. return strnlen(buf, count);
  2838. }
  2839. static DEVICE_ATTR(dump_errors, S_IWUSR, NULL, il3945_dump_error_log);
  2840. /*****************************************************************************
  2841. *
  2842. * driver setup and tear down
  2843. *
  2844. *****************************************************************************/
  2845. static void
  2846. il3945_setup_deferred_work(struct il_priv *il)
  2847. {
  2848. il->workqueue = create_singlethread_workqueue(DRV_NAME);
  2849. init_waitqueue_head(&il->wait_command_queue);
  2850. INIT_WORK(&il->restart, il3945_bg_restart);
  2851. INIT_WORK(&il->rx_replenish, il3945_bg_rx_replenish);
  2852. INIT_DELAYED_WORK(&il->init_alive_start, il3945_bg_init_alive_start);
  2853. INIT_DELAYED_WORK(&il->alive_start, il3945_bg_alive_start);
  2854. INIT_DELAYED_WORK(&il->_3945.rfkill_poll, il3945_rfkill_poll);
  2855. il_setup_scan_deferred_work(il);
  2856. il3945_hw_setup_deferred_work(il);
  2857. init_timer(&il->watchdog);
  2858. il->watchdog.data = (unsigned long)il;
  2859. il->watchdog.function = il_bg_watchdog;
  2860. tasklet_init(&il->irq_tasklet,
  2861. (void (*)(unsigned long))il3945_irq_tasklet,
  2862. (unsigned long)il);
  2863. }
  2864. static void
  2865. il3945_cancel_deferred_work(struct il_priv *il)
  2866. {
  2867. il3945_hw_cancel_deferred_work(il);
  2868. cancel_delayed_work_sync(&il->init_alive_start);
  2869. cancel_delayed_work(&il->alive_start);
  2870. il_cancel_scan_deferred_work(il);
  2871. }
  2872. static struct attribute *il3945_sysfs_entries[] = {
  2873. &dev_attr_antenna.attr,
  2874. &dev_attr_channels.attr,
  2875. &dev_attr_dump_errors.attr,
  2876. &dev_attr_flags.attr,
  2877. &dev_attr_filter_flags.attr,
  2878. &dev_attr_measurement.attr,
  2879. &dev_attr_retry_rate.attr,
  2880. &dev_attr_status.attr,
  2881. &dev_attr_temperature.attr,
  2882. &dev_attr_tx_power.attr,
  2883. #ifdef CONFIG_IWLEGACY_DEBUG
  2884. &dev_attr_debug_level.attr,
  2885. #endif
  2886. NULL
  2887. };
  2888. static struct attribute_group il3945_attribute_group = {
  2889. .name = NULL, /* put in device directory */
  2890. .attrs = il3945_sysfs_entries,
  2891. };
  2892. struct ieee80211_ops il3945_hw_ops = {
  2893. .tx = il3945_mac_tx,
  2894. .start = il3945_mac_start,
  2895. .stop = il3945_mac_stop,
  2896. .add_interface = il_mac_add_interface,
  2897. .remove_interface = il_mac_remove_interface,
  2898. .change_interface = il_mac_change_interface,
  2899. .config = il_mac_config,
  2900. .configure_filter = il3945_configure_filter,
  2901. .set_key = il3945_mac_set_key,
  2902. .conf_tx = il_mac_conf_tx,
  2903. .reset_tsf = il_mac_reset_tsf,
  2904. .bss_info_changed = il_mac_bss_info_changed,
  2905. .hw_scan = il_mac_hw_scan,
  2906. .sta_add = il3945_mac_sta_add,
  2907. .sta_remove = il_mac_sta_remove,
  2908. .tx_last_beacon = il_mac_tx_last_beacon,
  2909. };
  2910. static int
  2911. il3945_init_drv(struct il_priv *il)
  2912. {
  2913. int ret;
  2914. struct il3945_eeprom *eeprom = (struct il3945_eeprom *)il->eeprom;
  2915. il->retry_rate = 1;
  2916. il->beacon_skb = NULL;
  2917. spin_lock_init(&il->sta_lock);
  2918. spin_lock_init(&il->hcmd_lock);
  2919. INIT_LIST_HEAD(&il->free_frames);
  2920. mutex_init(&il->mutex);
  2921. il->ieee_channels = NULL;
  2922. il->ieee_rates = NULL;
  2923. il->band = IEEE80211_BAND_2GHZ;
  2924. il->iw_mode = NL80211_IFTYPE_STATION;
  2925. il->missed_beacon_threshold = IL_MISSED_BEACON_THRESHOLD_DEF;
  2926. /* initialize force reset */
  2927. il->force_reset.reset_duration = IL_DELAY_NEXT_FORCE_FW_RELOAD;
  2928. if (eeprom->version < EEPROM_3945_EEPROM_VERSION) {
  2929. IL_WARN("Unsupported EEPROM version: 0x%04X\n",
  2930. eeprom->version);
  2931. ret = -EINVAL;
  2932. goto err;
  2933. }
  2934. ret = il_init_channel_map(il);
  2935. if (ret) {
  2936. IL_ERR("initializing regulatory failed: %d\n", ret);
  2937. goto err;
  2938. }
  2939. /* Set up txpower settings in driver for all channels */
  2940. if (il3945_txpower_set_from_eeprom(il)) {
  2941. ret = -EIO;
  2942. goto err_free_channel_map;
  2943. }
  2944. ret = il_init_geos(il);
  2945. if (ret) {
  2946. IL_ERR("initializing geos failed: %d\n", ret);
  2947. goto err_free_channel_map;
  2948. }
  2949. il3945_init_hw_rates(il, il->ieee_rates);
  2950. return 0;
  2951. err_free_channel_map:
  2952. il_free_channel_map(il);
  2953. err:
  2954. return ret;
  2955. }
  2956. #define IL3945_MAX_PROBE_REQUEST 200
  2957. static int
  2958. il3945_setup_mac(struct il_priv *il)
  2959. {
  2960. int ret;
  2961. struct ieee80211_hw *hw = il->hw;
  2962. hw->rate_control_algorithm = "iwl-3945-rs";
  2963. hw->sta_data_size = sizeof(struct il3945_sta_priv);
  2964. hw->vif_data_size = sizeof(struct il_vif_priv);
  2965. /* Tell mac80211 our characteristics */
  2966. hw->flags = IEEE80211_HW_SIGNAL_DBM | IEEE80211_HW_SPECTRUM_MGMT;
  2967. hw->wiphy->interface_modes = il->ctx.interface_modes;
  2968. hw->wiphy->flags |=
  2969. WIPHY_FLAG_CUSTOM_REGULATORY | WIPHY_FLAG_DISABLE_BEACON_HINTS |
  2970. WIPHY_FLAG_IBSS_RSN;
  2971. hw->wiphy->max_scan_ssids = PROBE_OPTION_MAX_3945;
  2972. /* we create the 802.11 header and a zero-length SSID element */
  2973. hw->wiphy->max_scan_ie_len = IL3945_MAX_PROBE_REQUEST - 24 - 2;
  2974. /* Default value; 4 EDCA QOS priorities */
  2975. hw->queues = 4;
  2976. if (il->bands[IEEE80211_BAND_2GHZ].n_channels)
  2977. il->hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
  2978. &il->bands[IEEE80211_BAND_2GHZ];
  2979. if (il->bands[IEEE80211_BAND_5GHZ].n_channels)
  2980. il->hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
  2981. &il->bands[IEEE80211_BAND_5GHZ];
  2982. il_leds_init(il);
  2983. ret = ieee80211_register_hw(il->hw);
  2984. if (ret) {
  2985. IL_ERR("Failed to register hw (error %d)\n", ret);
  2986. return ret;
  2987. }
  2988. il->mac80211_registered = 1;
  2989. return 0;
  2990. }
  2991. static int
  2992. il3945_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
  2993. {
  2994. int err = 0;
  2995. struct il_priv *il;
  2996. struct ieee80211_hw *hw;
  2997. struct il_cfg *cfg = (struct il_cfg *)(ent->driver_data);
  2998. struct il3945_eeprom *eeprom;
  2999. unsigned long flags;
  3000. /***********************
  3001. * 1. Allocating HW data
  3002. * ********************/
  3003. /* mac80211 allocates memory for this device instance, including
  3004. * space for this driver's ilate structure */
  3005. hw = il_alloc_all(cfg);
  3006. if (hw == NULL) {
  3007. pr_err("Can not allocate network device\n");
  3008. err = -ENOMEM;
  3009. goto out;
  3010. }
  3011. il = hw->priv;
  3012. SET_IEEE80211_DEV(hw, &pdev->dev);
  3013. il->cmd_queue = IL39_CMD_QUEUE_NUM;
  3014. il->ctx.ctxid = 0;
  3015. il->ctx.rxon_cmd = C_RXON;
  3016. il->ctx.rxon_timing_cmd = C_RXON_TIMING;
  3017. il->ctx.rxon_assoc_cmd = C_RXON_ASSOC;
  3018. il->ctx.qos_cmd = C_QOS_PARAM;
  3019. il->ctx.ap_sta_id = IL_AP_ID;
  3020. il->ctx.wep_key_cmd = C_WEPKEY;
  3021. il->ctx.interface_modes =
  3022. BIT(NL80211_IFTYPE_STATION) | BIT(NL80211_IFTYPE_ADHOC);
  3023. il->ctx.ibss_devtype = RXON_DEV_TYPE_IBSS;
  3024. il->ctx.station_devtype = RXON_DEV_TYPE_ESS;
  3025. il->ctx.unused_devtype = RXON_DEV_TYPE_ESS;
  3026. /*
  3027. * Disabling hardware scan means that mac80211 will perform scans
  3028. * "the hard way", rather than using device's scan.
  3029. */
  3030. if (il3945_mod_params.disable_hw_scan) {
  3031. D_INFO("Disabling hw_scan\n");
  3032. il3945_hw_ops.hw_scan = NULL;
  3033. }
  3034. D_INFO("*** LOAD DRIVER ***\n");
  3035. il->cfg = cfg;
  3036. il->pci_dev = pdev;
  3037. il->inta_mask = CSR_INI_SET_MASK;
  3038. if (il_alloc_traffic_mem(il))
  3039. IL_ERR("Not enough memory to generate traffic log\n");
  3040. /***************************
  3041. * 2. Initializing PCI bus
  3042. * *************************/
  3043. pci_disable_link_state(pdev,
  3044. PCIE_LINK_STATE_L0S | PCIE_LINK_STATE_L1 |
  3045. PCIE_LINK_STATE_CLKPM);
  3046. if (pci_enable_device(pdev)) {
  3047. err = -ENODEV;
  3048. goto out_ieee80211_free_hw;
  3049. }
  3050. pci_set_master(pdev);
  3051. err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
  3052. if (!err)
  3053. err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
  3054. if (err) {
  3055. IL_WARN("No suitable DMA available.\n");
  3056. goto out_pci_disable_device;
  3057. }
  3058. pci_set_drvdata(pdev, il);
  3059. err = pci_request_regions(pdev, DRV_NAME);
  3060. if (err)
  3061. goto out_pci_disable_device;
  3062. /***********************
  3063. * 3. Read REV Register
  3064. * ********************/
  3065. il->hw_base = pci_iomap(pdev, 0, 0);
  3066. if (!il->hw_base) {
  3067. err = -ENODEV;
  3068. goto out_pci_release_regions;
  3069. }
  3070. D_INFO("pci_resource_len = 0x%08llx\n",
  3071. (unsigned long long)pci_resource_len(pdev, 0));
  3072. D_INFO("pci_resource_base = %p\n", il->hw_base);
  3073. /* We disable the RETRY_TIMEOUT register (0x41) to keep
  3074. * PCI Tx retries from interfering with C3 CPU state */
  3075. pci_write_config_byte(pdev, 0x41, 0x00);
  3076. /* these spin locks will be used in apm_ops.init and EEPROM access
  3077. * we should init now
  3078. */
  3079. spin_lock_init(&il->reg_lock);
  3080. spin_lock_init(&il->lock);
  3081. /*
  3082. * stop and reset the on-board processor just in case it is in a
  3083. * strange state ... like being left stranded by a primary kernel
  3084. * and this is now the kdump kernel trying to start up
  3085. */
  3086. _il_wr(il, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
  3087. /***********************
  3088. * 4. Read EEPROM
  3089. * ********************/
  3090. /* Read the EEPROM */
  3091. err = il_eeprom_init(il);
  3092. if (err) {
  3093. IL_ERR("Unable to init EEPROM\n");
  3094. goto out_iounmap;
  3095. }
  3096. /* MAC Address location in EEPROM same for 3945/4965 */
  3097. eeprom = (struct il3945_eeprom *)il->eeprom;
  3098. D_INFO("MAC address: %pM\n", eeprom->mac_address);
  3099. SET_IEEE80211_PERM_ADDR(il->hw, eeprom->mac_address);
  3100. /***********************
  3101. * 5. Setup HW Constants
  3102. * ********************/
  3103. /* Device-specific setup */
  3104. if (il3945_hw_set_hw_params(il)) {
  3105. IL_ERR("failed to set hw settings\n");
  3106. goto out_eeprom_free;
  3107. }
  3108. /***********************
  3109. * 6. Setup il
  3110. * ********************/
  3111. err = il3945_init_drv(il);
  3112. if (err) {
  3113. IL_ERR("initializing driver failed\n");
  3114. goto out_unset_hw_params;
  3115. }
  3116. IL_INFO("Detected Intel Wireless WiFi Link %s\n", il->cfg->name);
  3117. /***********************
  3118. * 7. Setup Services
  3119. * ********************/
  3120. spin_lock_irqsave(&il->lock, flags);
  3121. il_disable_interrupts(il);
  3122. spin_unlock_irqrestore(&il->lock, flags);
  3123. pci_enable_msi(il->pci_dev);
  3124. err = request_irq(il->pci_dev->irq, il_isr, IRQF_SHARED, DRV_NAME, il);
  3125. if (err) {
  3126. IL_ERR("Error allocating IRQ %d\n", il->pci_dev->irq);
  3127. goto out_disable_msi;
  3128. }
  3129. err = sysfs_create_group(&pdev->dev.kobj, &il3945_attribute_group);
  3130. if (err) {
  3131. IL_ERR("failed to create sysfs device attributes\n");
  3132. goto out_release_irq;
  3133. }
  3134. il_set_rxon_channel(il, &il->bands[IEEE80211_BAND_2GHZ].channels[5],
  3135. &il->ctx);
  3136. il3945_setup_deferred_work(il);
  3137. il3945_setup_handlers(il);
  3138. il_power_initialize(il);
  3139. /*********************************
  3140. * 8. Setup and Register mac80211
  3141. * *******************************/
  3142. il_enable_interrupts(il);
  3143. err = il3945_setup_mac(il);
  3144. if (err)
  3145. goto out_remove_sysfs;
  3146. err = il_dbgfs_register(il, DRV_NAME);
  3147. if (err)
  3148. IL_ERR("failed to create debugfs files. Ignoring error: %d\n",
  3149. err);
  3150. /* Start monitoring the killswitch */
  3151. queue_delayed_work(il->workqueue, &il->_3945.rfkill_poll, 2 * HZ);
  3152. return 0;
  3153. out_remove_sysfs:
  3154. destroy_workqueue(il->workqueue);
  3155. il->workqueue = NULL;
  3156. sysfs_remove_group(&pdev->dev.kobj, &il3945_attribute_group);
  3157. out_release_irq:
  3158. free_irq(il->pci_dev->irq, il);
  3159. out_disable_msi:
  3160. pci_disable_msi(il->pci_dev);
  3161. il_free_geos(il);
  3162. il_free_channel_map(il);
  3163. out_unset_hw_params:
  3164. il3945_unset_hw_params(il);
  3165. out_eeprom_free:
  3166. il_eeprom_free(il);
  3167. out_iounmap:
  3168. pci_iounmap(pdev, il->hw_base);
  3169. out_pci_release_regions:
  3170. pci_release_regions(pdev);
  3171. out_pci_disable_device:
  3172. pci_set_drvdata(pdev, NULL);
  3173. pci_disable_device(pdev);
  3174. out_ieee80211_free_hw:
  3175. il_free_traffic_mem(il);
  3176. ieee80211_free_hw(il->hw);
  3177. out:
  3178. return err;
  3179. }
  3180. static void __devexit
  3181. il3945_pci_remove(struct pci_dev *pdev)
  3182. {
  3183. struct il_priv *il = pci_get_drvdata(pdev);
  3184. unsigned long flags;
  3185. if (!il)
  3186. return;
  3187. D_INFO("*** UNLOAD DRIVER ***\n");
  3188. il_dbgfs_unregister(il);
  3189. set_bit(S_EXIT_PENDING, &il->status);
  3190. il_leds_exit(il);
  3191. if (il->mac80211_registered) {
  3192. ieee80211_unregister_hw(il->hw);
  3193. il->mac80211_registered = 0;
  3194. } else {
  3195. il3945_down(il);
  3196. }
  3197. /*
  3198. * Make sure device is reset to low power before unloading driver.
  3199. * This may be redundant with il_down(), but there are paths to
  3200. * run il_down() without calling apm_ops.stop(), and there are
  3201. * paths to avoid running il_down() at all before leaving driver.
  3202. * This (inexpensive) call *makes sure* device is reset.
  3203. */
  3204. il_apm_stop(il);
  3205. /* make sure we flush any pending irq or
  3206. * tasklet for the driver
  3207. */
  3208. spin_lock_irqsave(&il->lock, flags);
  3209. il_disable_interrupts(il);
  3210. spin_unlock_irqrestore(&il->lock, flags);
  3211. il3945_synchronize_irq(il);
  3212. sysfs_remove_group(&pdev->dev.kobj, &il3945_attribute_group);
  3213. cancel_delayed_work_sync(&il->_3945.rfkill_poll);
  3214. il3945_dealloc_ucode_pci(il);
  3215. if (il->rxq.bd)
  3216. il3945_rx_queue_free(il, &il->rxq);
  3217. il3945_hw_txq_ctx_free(il);
  3218. il3945_unset_hw_params(il);
  3219. /*netif_stop_queue(dev); */
  3220. flush_workqueue(il->workqueue);
  3221. /* ieee80211_unregister_hw calls il3945_mac_stop, which flushes
  3222. * il->workqueue... so we can't take down the workqueue
  3223. * until now... */
  3224. destroy_workqueue(il->workqueue);
  3225. il->workqueue = NULL;
  3226. il_free_traffic_mem(il);
  3227. free_irq(pdev->irq, il);
  3228. pci_disable_msi(pdev);
  3229. pci_iounmap(pdev, il->hw_base);
  3230. pci_release_regions(pdev);
  3231. pci_disable_device(pdev);
  3232. pci_set_drvdata(pdev, NULL);
  3233. il_free_channel_map(il);
  3234. il_free_geos(il);
  3235. kfree(il->scan_cmd);
  3236. if (il->beacon_skb)
  3237. dev_kfree_skb(il->beacon_skb);
  3238. ieee80211_free_hw(il->hw);
  3239. }
  3240. /*****************************************************************************
  3241. *
  3242. * driver and module entry point
  3243. *
  3244. *****************************************************************************/
  3245. static struct pci_driver il3945_driver = {
  3246. .name = DRV_NAME,
  3247. .id_table = il3945_hw_card_ids,
  3248. .probe = il3945_pci_probe,
  3249. .remove = __devexit_p(il3945_pci_remove),
  3250. .driver.pm = IL_LEGACY_PM_OPS,
  3251. };
  3252. static int __init
  3253. il3945_init(void)
  3254. {
  3255. int ret;
  3256. pr_info(DRV_DESCRIPTION ", " DRV_VERSION "\n");
  3257. pr_info(DRV_COPYRIGHT "\n");
  3258. ret = il3945_rate_control_register();
  3259. if (ret) {
  3260. pr_err("Unable to register rate control algorithm: %d\n", ret);
  3261. return ret;
  3262. }
  3263. ret = pci_register_driver(&il3945_driver);
  3264. if (ret) {
  3265. pr_err("Unable to initialize PCI module\n");
  3266. goto error_register;
  3267. }
  3268. return ret;
  3269. error_register:
  3270. il3945_rate_control_unregister();
  3271. return ret;
  3272. }
  3273. static void __exit
  3274. il3945_exit(void)
  3275. {
  3276. pci_unregister_driver(&il3945_driver);
  3277. il3945_rate_control_unregister();
  3278. }
  3279. MODULE_FIRMWARE(IL3945_MODULE_FIRMWARE(IL3945_UCODE_API_MAX));
  3280. module_param_named(antenna, il3945_mod_params.antenna, int, S_IRUGO);
  3281. MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])");
  3282. module_param_named(swcrypto, il3945_mod_params.sw_crypto, int, S_IRUGO);
  3283. MODULE_PARM_DESC(swcrypto, "using software crypto (default 1 [software])");
  3284. module_param_named(disable_hw_scan, il3945_mod_params.disable_hw_scan, int,
  3285. S_IRUGO);
  3286. MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 1)");
  3287. #ifdef CONFIG_IWLEGACY_DEBUG
  3288. module_param_named(debug, il_debug_level, uint, S_IRUGO | S_IWUSR);
  3289. MODULE_PARM_DESC(debug, "debug output mask");
  3290. #endif
  3291. module_param_named(fw_restart, il3945_mod_params.restart_fw, int, S_IRUGO);
  3292. MODULE_PARM_DESC(fw_restart, "restart firmware in case of error");
  3293. module_exit(il3945_exit);
  3294. module_init(il3945_init);