mci.c 18 KB

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  1. /*
  2. * Copyright (c) 2010-2011 Atheros Communications Inc.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for any
  5. * purpose with or without fee is hereby granted, provided that the above
  6. * copyright notice and this permission notice appear in all copies.
  7. *
  8. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  9. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15. */
  16. #include <linux/dma-mapping.h>
  17. #include <linux/slab.h>
  18. #include "ath9k.h"
  19. #include "mci.h"
  20. static const u8 ath_mci_duty_cycle[] = { 0, 50, 60, 70, 80, 85, 90, 95, 98 };
  21. static struct ath_mci_profile_info*
  22. ath_mci_find_profile(struct ath_mci_profile *mci,
  23. struct ath_mci_profile_info *info)
  24. {
  25. struct ath_mci_profile_info *entry;
  26. list_for_each_entry(entry, &mci->info, list) {
  27. if (entry->conn_handle == info->conn_handle)
  28. break;
  29. }
  30. return entry;
  31. }
  32. static bool ath_mci_add_profile(struct ath_common *common,
  33. struct ath_mci_profile *mci,
  34. struct ath_mci_profile_info *info)
  35. {
  36. struct ath_mci_profile_info *entry;
  37. if ((mci->num_sco == ATH_MCI_MAX_SCO_PROFILE) &&
  38. (info->type == MCI_GPM_COEX_PROFILE_VOICE)) {
  39. ath_dbg(common, MCI,
  40. "Too many SCO profile, failed to add new profile\n");
  41. return false;
  42. }
  43. if (((NUM_PROF(mci) - mci->num_sco) == ATH_MCI_MAX_ACL_PROFILE) &&
  44. (info->type != MCI_GPM_COEX_PROFILE_VOICE)) {
  45. ath_dbg(common, MCI,
  46. "Too many ACL profile, failed to add new profile\n");
  47. return false;
  48. }
  49. entry = ath_mci_find_profile(mci, info);
  50. if (entry)
  51. memcpy(entry, info, 10);
  52. else {
  53. entry = kzalloc(sizeof(*entry), GFP_KERNEL);
  54. if (!entry)
  55. return false;
  56. memcpy(entry, info, 10);
  57. INC_PROF(mci, info);
  58. list_add_tail(&info->list, &mci->info);
  59. }
  60. return true;
  61. }
  62. static void ath_mci_del_profile(struct ath_common *common,
  63. struct ath_mci_profile *mci,
  64. struct ath_mci_profile_info *info)
  65. {
  66. struct ath_mci_profile_info *entry;
  67. entry = ath_mci_find_profile(mci, info);
  68. if (!entry) {
  69. ath_dbg(common, MCI, "Profile to be deleted not found\n");
  70. return;
  71. }
  72. DEC_PROF(mci, entry);
  73. list_del(&entry->list);
  74. kfree(entry);
  75. }
  76. void ath_mci_flush_profile(struct ath_mci_profile *mci)
  77. {
  78. struct ath_mci_profile_info *info, *tinfo;
  79. list_for_each_entry_safe(info, tinfo, &mci->info, list) {
  80. list_del(&info->list);
  81. DEC_PROF(mci, info);
  82. kfree(info);
  83. }
  84. mci->aggr_limit = 0;
  85. }
  86. static void ath_mci_adjust_aggr_limit(struct ath_btcoex *btcoex)
  87. {
  88. struct ath_mci_profile *mci = &btcoex->mci;
  89. u32 wlan_airtime = btcoex->btcoex_period *
  90. (100 - btcoex->duty_cycle) / 100;
  91. /*
  92. * Scale: wlan_airtime is in ms, aggr_limit is in 0.25 ms.
  93. * When wlan_airtime is less than 4ms, aggregation limit has to be
  94. * adjusted half of wlan_airtime to ensure that the aggregation can fit
  95. * without collision with BT traffic.
  96. */
  97. if ((wlan_airtime <= 4) &&
  98. (!mci->aggr_limit || (mci->aggr_limit > (2 * wlan_airtime))))
  99. mci->aggr_limit = 2 * wlan_airtime;
  100. }
  101. static void ath_mci_update_scheme(struct ath_softc *sc)
  102. {
  103. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  104. struct ath_btcoex *btcoex = &sc->btcoex;
  105. struct ath_mci_profile *mci = &btcoex->mci;
  106. struct ath_mci_profile_info *info;
  107. u32 num_profile = NUM_PROF(mci);
  108. if (num_profile == 1) {
  109. info = list_first_entry(&mci->info,
  110. struct ath_mci_profile_info,
  111. list);
  112. if (mci->num_sco && info->T == 12) {
  113. mci->aggr_limit = 8;
  114. ath_dbg(common, MCI,
  115. "Single SCO, aggregation limit 2 ms\n");
  116. } else if ((info->type == MCI_GPM_COEX_PROFILE_BNEP) &&
  117. !info->master) {
  118. btcoex->btcoex_period = 60;
  119. ath_dbg(common, MCI,
  120. "Single slave PAN/FTP, bt period 60 ms\n");
  121. } else if ((info->type == MCI_GPM_COEX_PROFILE_HID) &&
  122. (info->T > 0 && info->T < 50) &&
  123. (info->A > 1 || info->W > 1)) {
  124. btcoex->duty_cycle = 30;
  125. mci->aggr_limit = 8;
  126. ath_dbg(common, MCI,
  127. "Multiple attempt/timeout single HID "
  128. "aggregation limit 2 ms dutycycle 30%%\n");
  129. }
  130. } else if ((num_profile == 2) && (mci->num_hid == 2)) {
  131. btcoex->duty_cycle = 30;
  132. mci->aggr_limit = 8;
  133. ath_dbg(common, MCI,
  134. "Two HIDs aggregation limit 2 ms dutycycle 30%%\n");
  135. } else if (num_profile > 3) {
  136. mci->aggr_limit = 6;
  137. ath_dbg(common, MCI,
  138. "Three or more profiles aggregation limit 1.5 ms\n");
  139. }
  140. if (IS_CHAN_2GHZ(sc->sc_ah->curchan)) {
  141. if (IS_CHAN_HT(sc->sc_ah->curchan))
  142. ath_mci_adjust_aggr_limit(btcoex);
  143. else
  144. btcoex->btcoex_period >>= 1;
  145. }
  146. ath9k_hw_btcoex_disable(sc->sc_ah);
  147. ath9k_btcoex_timer_pause(sc);
  148. if (IS_CHAN_5GHZ(sc->sc_ah->curchan))
  149. return;
  150. btcoex->duty_cycle += (mci->num_bdr ? ATH_MCI_MAX_DUTY_CYCLE : 0);
  151. if (btcoex->duty_cycle > ATH_MCI_MAX_DUTY_CYCLE)
  152. btcoex->duty_cycle = ATH_MCI_MAX_DUTY_CYCLE;
  153. btcoex->btcoex_period *= 1000;
  154. btcoex->btcoex_no_stomp = btcoex->btcoex_period *
  155. (100 - btcoex->duty_cycle) / 100;
  156. ath9k_hw_btcoex_enable(sc->sc_ah);
  157. ath9k_btcoex_timer_resume(sc);
  158. }
  159. static void ath_mci_cal_msg(struct ath_softc *sc, u8 opcode, u8 *rx_payload)
  160. {
  161. struct ath_hw *ah = sc->sc_ah;
  162. struct ath_common *common = ath9k_hw_common(ah);
  163. u32 payload[4] = {0, 0, 0, 0};
  164. switch (opcode) {
  165. case MCI_GPM_BT_CAL_REQ:
  166. ath_dbg(common, MCI, "MCI received BT_CAL_REQ\n");
  167. if (ar9003_mci_state(ah, MCI_STATE_BT, NULL) == MCI_BT_AWAKE) {
  168. ar9003_mci_state(ah, MCI_STATE_SET_BT_CAL_START, NULL);
  169. ieee80211_queue_work(sc->hw, &sc->hw_reset_work);
  170. } else
  171. ath_dbg(common, MCI, "MCI State mismatches: %d\n",
  172. ar9003_mci_state(ah, MCI_STATE_BT, NULL));
  173. break;
  174. case MCI_GPM_BT_CAL_DONE:
  175. ath_dbg(common, MCI, "MCI received BT_CAL_DONE\n");
  176. if (ar9003_mci_state(ah, MCI_STATE_BT, NULL) == MCI_BT_CAL)
  177. ath_dbg(common, MCI, "MCI error illegal!\n");
  178. else
  179. ath_dbg(common, MCI, "MCI BT not in CAL state\n");
  180. break;
  181. case MCI_GPM_BT_CAL_GRANT:
  182. ath_dbg(common, MCI, "MCI received BT_CAL_GRANT\n");
  183. /* Send WLAN_CAL_DONE for now */
  184. ath_dbg(common, MCI, "MCI send WLAN_CAL_DONE\n");
  185. MCI_GPM_SET_CAL_TYPE(payload, MCI_GPM_WLAN_CAL_DONE);
  186. ar9003_mci_send_message(sc->sc_ah, MCI_GPM, 0, payload,
  187. 16, false, true);
  188. break;
  189. default:
  190. ath_dbg(common, MCI, "MCI Unknown GPM CAL message\n");
  191. break;
  192. }
  193. }
  194. static void ath_mci_process_profile(struct ath_softc *sc,
  195. struct ath_mci_profile_info *info)
  196. {
  197. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  198. struct ath_btcoex *btcoex = &sc->btcoex;
  199. struct ath_mci_profile *mci = &btcoex->mci;
  200. if (info->start) {
  201. if (!ath_mci_add_profile(common, mci, info))
  202. return;
  203. } else
  204. ath_mci_del_profile(common, mci, info);
  205. btcoex->btcoex_period = ATH_MCI_DEF_BT_PERIOD;
  206. mci->aggr_limit = mci->num_sco ? 6 : 0;
  207. if (NUM_PROF(mci)) {
  208. btcoex->bt_stomp_type = ATH_BTCOEX_STOMP_LOW;
  209. btcoex->duty_cycle = ath_mci_duty_cycle[NUM_PROF(mci)];
  210. } else {
  211. btcoex->bt_stomp_type = mci->num_mgmt ? ATH_BTCOEX_STOMP_ALL :
  212. ATH_BTCOEX_STOMP_LOW;
  213. btcoex->duty_cycle = ATH_BTCOEX_DEF_DUTY_CYCLE;
  214. }
  215. ath_mci_update_scheme(sc);
  216. }
  217. static void ath_mci_process_status(struct ath_softc *sc,
  218. struct ath_mci_profile_status *status)
  219. {
  220. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  221. struct ath_btcoex *btcoex = &sc->btcoex;
  222. struct ath_mci_profile *mci = &btcoex->mci;
  223. struct ath_mci_profile_info info;
  224. int i = 0, old_num_mgmt = mci->num_mgmt;
  225. /* Link status type are not handled */
  226. if (status->is_link) {
  227. ath_dbg(common, MCI, "Skip link type status update\n");
  228. return;
  229. }
  230. memset(&info, 0, sizeof(struct ath_mci_profile_info));
  231. info.conn_handle = status->conn_handle;
  232. if (ath_mci_find_profile(mci, &info)) {
  233. ath_dbg(common, MCI,
  234. "Skip non link state update for existing profile %d\n",
  235. status->conn_handle);
  236. return;
  237. }
  238. if (status->conn_handle >= ATH_MCI_MAX_PROFILE) {
  239. ath_dbg(common, MCI, "Ignore too many non-link update\n");
  240. return;
  241. }
  242. if (status->is_critical)
  243. __set_bit(status->conn_handle, mci->status);
  244. else
  245. __clear_bit(status->conn_handle, mci->status);
  246. mci->num_mgmt = 0;
  247. do {
  248. if (test_bit(i, mci->status))
  249. mci->num_mgmt++;
  250. } while (++i < ATH_MCI_MAX_PROFILE);
  251. if (old_num_mgmt != mci->num_mgmt)
  252. ath_mci_update_scheme(sc);
  253. }
  254. static void ath_mci_msg(struct ath_softc *sc, u8 opcode, u8 *rx_payload)
  255. {
  256. struct ath_hw *ah = sc->sc_ah;
  257. struct ath_mci_profile_info profile_info;
  258. struct ath_mci_profile_status profile_status;
  259. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  260. u32 version;
  261. u8 major;
  262. u8 minor;
  263. u32 seq_num;
  264. switch (opcode) {
  265. case MCI_GPM_COEX_VERSION_QUERY:
  266. ath_dbg(common, MCI, "MCI Recv GPM COEX Version Query\n");
  267. version = ar9003_mci_state(ah,
  268. MCI_STATE_SEND_WLAN_COEX_VERSION, NULL);
  269. break;
  270. case MCI_GPM_COEX_VERSION_RESPONSE:
  271. ath_dbg(common, MCI, "MCI Recv GPM COEX Version Response\n");
  272. major = *(rx_payload + MCI_GPM_COEX_B_MAJOR_VERSION);
  273. minor = *(rx_payload + MCI_GPM_COEX_B_MINOR_VERSION);
  274. ath_dbg(common, MCI, "MCI BT Coex version: %d.%d\n",
  275. major, minor);
  276. version = (major << 8) + minor;
  277. version = ar9003_mci_state(ah,
  278. MCI_STATE_SET_BT_COEX_VERSION, &version);
  279. break;
  280. case MCI_GPM_COEX_STATUS_QUERY:
  281. ath_dbg(common, MCI,
  282. "MCI Recv GPM COEX Status Query = 0x%02x\n",
  283. *(rx_payload + MCI_GPM_COEX_B_WLAN_BITMAP));
  284. ar9003_mci_state(ah,
  285. MCI_STATE_SEND_WLAN_CHANNELS, NULL);
  286. break;
  287. case MCI_GPM_COEX_BT_PROFILE_INFO:
  288. ath_dbg(common, MCI, "MCI Recv GPM Coex BT profile info\n");
  289. memcpy(&profile_info,
  290. (rx_payload + MCI_GPM_COEX_B_PROFILE_TYPE), 10);
  291. if ((profile_info.type == MCI_GPM_COEX_PROFILE_UNKNOWN)
  292. || (profile_info.type >=
  293. MCI_GPM_COEX_PROFILE_MAX)) {
  294. ath_dbg(common, MCI,
  295. "illegal profile type = %d, state = %d\n",
  296. profile_info.type,
  297. profile_info.start);
  298. break;
  299. }
  300. ath_mci_process_profile(sc, &profile_info);
  301. break;
  302. case MCI_GPM_COEX_BT_STATUS_UPDATE:
  303. profile_status.is_link = *(rx_payload +
  304. MCI_GPM_COEX_B_STATUS_TYPE);
  305. profile_status.conn_handle = *(rx_payload +
  306. MCI_GPM_COEX_B_STATUS_LINKID);
  307. profile_status.is_critical = *(rx_payload +
  308. MCI_GPM_COEX_B_STATUS_STATE);
  309. seq_num = *((u32 *)(rx_payload + 12));
  310. ath_dbg(common, MCI,
  311. "MCI Recv GPM COEX BT_Status_Update: is_link=%d, linkId=%d, state=%d, SEQ=%d\n",
  312. profile_status.is_link, profile_status.conn_handle,
  313. profile_status.is_critical, seq_num);
  314. ath_mci_process_status(sc, &profile_status);
  315. break;
  316. default:
  317. ath_dbg(common, MCI, "MCI Unknown GPM COEX message = 0x%02x\n",
  318. opcode);
  319. break;
  320. }
  321. }
  322. static int ath_mci_buf_alloc(struct ath_softc *sc, struct ath_mci_buf *buf)
  323. {
  324. int error = 0;
  325. buf->bf_addr = dma_alloc_coherent(sc->dev, buf->bf_len,
  326. &buf->bf_paddr, GFP_KERNEL);
  327. if (buf->bf_addr == NULL) {
  328. error = -ENOMEM;
  329. goto fail;
  330. }
  331. return 0;
  332. fail:
  333. memset(buf, 0, sizeof(*buf));
  334. return error;
  335. }
  336. static void ath_mci_buf_free(struct ath_softc *sc, struct ath_mci_buf *buf)
  337. {
  338. if (buf->bf_addr) {
  339. dma_free_coherent(sc->dev, buf->bf_len, buf->bf_addr,
  340. buf->bf_paddr);
  341. memset(buf, 0, sizeof(*buf));
  342. }
  343. }
  344. int ath_mci_setup(struct ath_softc *sc)
  345. {
  346. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  347. struct ath_mci_coex *mci = &sc->mci_coex;
  348. int error = 0;
  349. if (!ATH9K_HW_CAP_MCI)
  350. return 0;
  351. mci->sched_buf.bf_len = ATH_MCI_SCHED_BUF_SIZE + ATH_MCI_GPM_BUF_SIZE;
  352. if (ath_mci_buf_alloc(sc, &mci->sched_buf)) {
  353. ath_dbg(common, FATAL, "MCI buffer alloc failed\n");
  354. error = -ENOMEM;
  355. goto fail;
  356. }
  357. mci->sched_buf.bf_len = ATH_MCI_SCHED_BUF_SIZE;
  358. memset(mci->sched_buf.bf_addr, MCI_GPM_RSVD_PATTERN,
  359. mci->sched_buf.bf_len);
  360. mci->gpm_buf.bf_len = ATH_MCI_GPM_BUF_SIZE;
  361. mci->gpm_buf.bf_addr = (u8 *)mci->sched_buf.bf_addr +
  362. mci->sched_buf.bf_len;
  363. mci->gpm_buf.bf_paddr = mci->sched_buf.bf_paddr + mci->sched_buf.bf_len;
  364. /* initialize the buffer */
  365. memset(mci->gpm_buf.bf_addr, MCI_GPM_RSVD_PATTERN, mci->gpm_buf.bf_len);
  366. ar9003_mci_setup(sc->sc_ah, mci->gpm_buf.bf_paddr,
  367. mci->gpm_buf.bf_addr, (mci->gpm_buf.bf_len >> 4),
  368. mci->sched_buf.bf_paddr);
  369. fail:
  370. return error;
  371. }
  372. void ath_mci_cleanup(struct ath_softc *sc)
  373. {
  374. struct ath_hw *ah = sc->sc_ah;
  375. struct ath_mci_coex *mci = &sc->mci_coex;
  376. if (!ATH9K_HW_CAP_MCI)
  377. return;
  378. /*
  379. * both schedule and gpm buffers will be released
  380. */
  381. ath_mci_buf_free(sc, &mci->sched_buf);
  382. ar9003_mci_cleanup(ah);
  383. }
  384. void ath_mci_intr(struct ath_softc *sc)
  385. {
  386. struct ath_mci_coex *mci = &sc->mci_coex;
  387. struct ath_hw *ah = sc->sc_ah;
  388. struct ath_common *common = ath9k_hw_common(ah);
  389. u32 mci_int, mci_int_rxmsg;
  390. u32 offset, subtype, opcode;
  391. u32 *pgpm;
  392. u32 more_data = MCI_GPM_MORE;
  393. bool skip_gpm = false;
  394. if (!ATH9K_HW_CAP_MCI)
  395. return;
  396. ar9003_mci_get_interrupt(sc->sc_ah, &mci_int, &mci_int_rxmsg);
  397. if (ar9003_mci_state(ah, MCI_STATE_ENABLE, NULL) == 0) {
  398. ar9003_mci_state(sc->sc_ah, MCI_STATE_INIT_GPM_OFFSET, NULL);
  399. ath_dbg(common, MCI, "MCI interrupt but MCI disabled\n");
  400. ath_dbg(common, MCI,
  401. "MCI interrupt: intr = 0x%x, intr_rxmsg = 0x%x\n",
  402. mci_int, mci_int_rxmsg);
  403. return;
  404. }
  405. if (mci_int_rxmsg & AR_MCI_INTERRUPT_RX_MSG_REQ_WAKE) {
  406. u32 payload[4] = { 0xffffffff, 0xffffffff,
  407. 0xffffffff, 0xffffff00};
  408. /*
  409. * The following REMOTE_RESET and SYS_WAKING used to sent
  410. * only when BT wake up. Now they are always sent, as a
  411. * recovery method to reset BT MCI's RX alignment.
  412. */
  413. ath_dbg(common, MCI, "MCI interrupt send REMOTE_RESET\n");
  414. ar9003_mci_send_message(ah, MCI_REMOTE_RESET, 0,
  415. payload, 16, true, false);
  416. ath_dbg(common, MCI, "MCI interrupt send SYS_WAKING\n");
  417. ar9003_mci_send_message(ah, MCI_SYS_WAKING, 0,
  418. NULL, 0, true, false);
  419. mci_int_rxmsg &= ~AR_MCI_INTERRUPT_RX_MSG_REQ_WAKE;
  420. ar9003_mci_state(ah, MCI_STATE_RESET_REQ_WAKE, NULL);
  421. /*
  422. * always do this for recovery and 2G/5G toggling and LNA_TRANS
  423. */
  424. ath_dbg(common, MCI, "MCI Set BT state to AWAKE\n");
  425. ar9003_mci_state(ah, MCI_STATE_SET_BT_AWAKE, NULL);
  426. }
  427. /* Processing SYS_WAKING/SYS_SLEEPING */
  428. if (mci_int_rxmsg & AR_MCI_INTERRUPT_RX_MSG_SYS_WAKING) {
  429. mci_int_rxmsg &= ~AR_MCI_INTERRUPT_RX_MSG_SYS_WAKING;
  430. if (ar9003_mci_state(ah, MCI_STATE_BT, NULL) == MCI_BT_SLEEP) {
  431. if (ar9003_mci_state(ah, MCI_STATE_REMOTE_SLEEP, NULL)
  432. == MCI_BT_SLEEP)
  433. ath_dbg(common, MCI,
  434. "MCI BT stays in sleep mode\n");
  435. else {
  436. ath_dbg(common, MCI,
  437. "MCI Set BT state to AWAKE\n");
  438. ar9003_mci_state(ah,
  439. MCI_STATE_SET_BT_AWAKE, NULL);
  440. }
  441. } else
  442. ath_dbg(common, MCI, "MCI BT stays in AWAKE mode\n");
  443. }
  444. if (mci_int_rxmsg & AR_MCI_INTERRUPT_RX_MSG_SYS_SLEEPING) {
  445. mci_int_rxmsg &= ~AR_MCI_INTERRUPT_RX_MSG_SYS_SLEEPING;
  446. if (ar9003_mci_state(ah, MCI_STATE_BT, NULL) == MCI_BT_AWAKE) {
  447. if (ar9003_mci_state(ah, MCI_STATE_REMOTE_SLEEP, NULL)
  448. == MCI_BT_AWAKE)
  449. ath_dbg(common, MCI,
  450. "MCI BT stays in AWAKE mode\n");
  451. else {
  452. ath_dbg(common, MCI,
  453. "MCI SetBT state to SLEEP\n");
  454. ar9003_mci_state(ah, MCI_STATE_SET_BT_SLEEP,
  455. NULL);
  456. }
  457. } else
  458. ath_dbg(common, MCI, "MCI BT stays in SLEEP mode\n");
  459. }
  460. if ((mci_int & AR_MCI_INTERRUPT_RX_INVALID_HDR) ||
  461. (mci_int & AR_MCI_INTERRUPT_CONT_INFO_TIMEOUT)) {
  462. ath_dbg(common, MCI, "MCI RX broken, skip GPM msgs\n");
  463. ar9003_mci_state(ah, MCI_STATE_RECOVER_RX, NULL);
  464. skip_gpm = true;
  465. }
  466. if (mci_int_rxmsg & AR_MCI_INTERRUPT_RX_MSG_SCHD_INFO) {
  467. mci_int_rxmsg &= ~AR_MCI_INTERRUPT_RX_MSG_SCHD_INFO;
  468. offset = ar9003_mci_state(ah, MCI_STATE_LAST_SCHD_MSG_OFFSET,
  469. NULL);
  470. }
  471. if (mci_int_rxmsg & AR_MCI_INTERRUPT_RX_MSG_GPM) {
  472. mci_int_rxmsg &= ~AR_MCI_INTERRUPT_RX_MSG_GPM;
  473. while (more_data == MCI_GPM_MORE) {
  474. pgpm = mci->gpm_buf.bf_addr;
  475. offset = ar9003_mci_state(ah,
  476. MCI_STATE_NEXT_GPM_OFFSET, &more_data);
  477. if (offset == MCI_GPM_INVALID)
  478. break;
  479. pgpm += (offset >> 2);
  480. /*
  481. * The first dword is timer.
  482. * The real data starts from 2nd dword.
  483. */
  484. subtype = MCI_GPM_TYPE(pgpm);
  485. opcode = MCI_GPM_OPCODE(pgpm);
  486. if (!skip_gpm) {
  487. if (MCI_GPM_IS_CAL_TYPE(subtype))
  488. ath_mci_cal_msg(sc, subtype,
  489. (u8 *) pgpm);
  490. else {
  491. switch (subtype) {
  492. case MCI_GPM_COEX_AGENT:
  493. ath_mci_msg(sc, opcode,
  494. (u8 *) pgpm);
  495. break;
  496. default:
  497. break;
  498. }
  499. }
  500. }
  501. MCI_GPM_RECYCLE(pgpm);
  502. }
  503. }
  504. if (mci_int_rxmsg & AR_MCI_INTERRUPT_RX_HW_MSG_MASK) {
  505. if (mci_int_rxmsg & AR_MCI_INTERRUPT_RX_MSG_LNA_CONTROL)
  506. mci_int_rxmsg &= ~AR_MCI_INTERRUPT_RX_MSG_LNA_CONTROL;
  507. if (mci_int_rxmsg & AR_MCI_INTERRUPT_RX_MSG_LNA_INFO) {
  508. mci_int_rxmsg &= ~AR_MCI_INTERRUPT_RX_MSG_LNA_INFO;
  509. ath_dbg(common, MCI, "MCI LNA_INFO\n");
  510. }
  511. if (mci_int_rxmsg & AR_MCI_INTERRUPT_RX_MSG_CONT_INFO) {
  512. int value_dbm = ar9003_mci_state(ah,
  513. MCI_STATE_CONT_RSSI_POWER, NULL);
  514. mci_int_rxmsg &= ~AR_MCI_INTERRUPT_RX_MSG_CONT_INFO;
  515. if (ar9003_mci_state(ah, MCI_STATE_CONT_TXRX, NULL))
  516. ath_dbg(common, MCI,
  517. "MCI CONT_INFO: (tx) pri = %d, pwr = %d dBm\n",
  518. ar9003_mci_state(ah,
  519. MCI_STATE_CONT_PRIORITY, NULL),
  520. value_dbm);
  521. else
  522. ath_dbg(common, MCI,
  523. "MCI CONT_INFO: (rx) pri = %d,pwr = %d dBm\n",
  524. ar9003_mci_state(ah,
  525. MCI_STATE_CONT_PRIORITY, NULL),
  526. value_dbm);
  527. }
  528. if (mci_int_rxmsg & AR_MCI_INTERRUPT_RX_MSG_CONT_NACK) {
  529. mci_int_rxmsg &= ~AR_MCI_INTERRUPT_RX_MSG_CONT_NACK;
  530. ath_dbg(common, MCI, "MCI CONT_NACK\n");
  531. }
  532. if (mci_int_rxmsg & AR_MCI_INTERRUPT_RX_MSG_CONT_RST) {
  533. mci_int_rxmsg &= ~AR_MCI_INTERRUPT_RX_MSG_CONT_RST;
  534. ath_dbg(common, MCI, "MCI CONT_RST\n");
  535. }
  536. }
  537. if ((mci_int & AR_MCI_INTERRUPT_RX_INVALID_HDR) ||
  538. (mci_int & AR_MCI_INTERRUPT_CONT_INFO_TIMEOUT))
  539. mci_int &= ~(AR_MCI_INTERRUPT_RX_INVALID_HDR |
  540. AR_MCI_INTERRUPT_CONT_INFO_TIMEOUT);
  541. if (mci_int_rxmsg & 0xfffffffe)
  542. ath_dbg(common, MCI, "MCI not processed mci_int_rxmsg = 0x%x\n",
  543. mci_int_rxmsg);
  544. }