main.c 60 KB

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  1. /*
  2. * Copyright (c) 2008-2011 Atheros Communications Inc.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for any
  5. * purpose with or without fee is hereby granted, provided that the above
  6. * copyright notice and this permission notice appear in all copies.
  7. *
  8. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  9. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15. */
  16. #include <linux/nl80211.h>
  17. #include <linux/delay.h>
  18. #include "ath9k.h"
  19. #include "btcoex.h"
  20. static u8 parse_mpdudensity(u8 mpdudensity)
  21. {
  22. /*
  23. * 802.11n D2.0 defined values for "Minimum MPDU Start Spacing":
  24. * 0 for no restriction
  25. * 1 for 1/4 us
  26. * 2 for 1/2 us
  27. * 3 for 1 us
  28. * 4 for 2 us
  29. * 5 for 4 us
  30. * 6 for 8 us
  31. * 7 for 16 us
  32. */
  33. switch (mpdudensity) {
  34. case 0:
  35. return 0;
  36. case 1:
  37. case 2:
  38. case 3:
  39. /* Our lower layer calculations limit our precision to
  40. 1 microsecond */
  41. return 1;
  42. case 4:
  43. return 2;
  44. case 5:
  45. return 4;
  46. case 6:
  47. return 8;
  48. case 7:
  49. return 16;
  50. default:
  51. return 0;
  52. }
  53. }
  54. static bool ath9k_has_pending_frames(struct ath_softc *sc, struct ath_txq *txq)
  55. {
  56. bool pending = false;
  57. spin_lock_bh(&txq->axq_lock);
  58. if (txq->axq_depth || !list_empty(&txq->axq_acq))
  59. pending = true;
  60. spin_unlock_bh(&txq->axq_lock);
  61. return pending;
  62. }
  63. static bool ath9k_setpower(struct ath_softc *sc, enum ath9k_power_mode mode)
  64. {
  65. unsigned long flags;
  66. bool ret;
  67. spin_lock_irqsave(&sc->sc_pm_lock, flags);
  68. ret = ath9k_hw_setpower(sc->sc_ah, mode);
  69. spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
  70. return ret;
  71. }
  72. void ath9k_ps_wakeup(struct ath_softc *sc)
  73. {
  74. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  75. unsigned long flags;
  76. enum ath9k_power_mode power_mode;
  77. spin_lock_irqsave(&sc->sc_pm_lock, flags);
  78. if (++sc->ps_usecount != 1)
  79. goto unlock;
  80. power_mode = sc->sc_ah->power_mode;
  81. ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE);
  82. /*
  83. * While the hardware is asleep, the cycle counters contain no
  84. * useful data. Better clear them now so that they don't mess up
  85. * survey data results.
  86. */
  87. if (power_mode != ATH9K_PM_AWAKE) {
  88. spin_lock(&common->cc_lock);
  89. ath_hw_cycle_counters_update(common);
  90. memset(&common->cc_survey, 0, sizeof(common->cc_survey));
  91. spin_unlock(&common->cc_lock);
  92. }
  93. unlock:
  94. spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
  95. }
  96. void ath9k_ps_restore(struct ath_softc *sc)
  97. {
  98. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  99. enum ath9k_power_mode mode;
  100. unsigned long flags;
  101. spin_lock_irqsave(&sc->sc_pm_lock, flags);
  102. if (--sc->ps_usecount != 0)
  103. goto unlock;
  104. if (sc->ps_idle && (sc->ps_flags & PS_WAIT_FOR_TX_ACK))
  105. mode = ATH9K_PM_FULL_SLEEP;
  106. else if (sc->ps_enabled &&
  107. !(sc->ps_flags & (PS_WAIT_FOR_BEACON |
  108. PS_WAIT_FOR_CAB |
  109. PS_WAIT_FOR_PSPOLL_DATA |
  110. PS_WAIT_FOR_TX_ACK)))
  111. mode = ATH9K_PM_NETWORK_SLEEP;
  112. else
  113. goto unlock;
  114. spin_lock(&common->cc_lock);
  115. ath_hw_cycle_counters_update(common);
  116. spin_unlock(&common->cc_lock);
  117. ath9k_hw_setpower(sc->sc_ah, mode);
  118. unlock:
  119. spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
  120. }
  121. void ath_start_ani(struct ath_common *common)
  122. {
  123. struct ath_hw *ah = common->ah;
  124. unsigned long timestamp = jiffies_to_msecs(jiffies);
  125. struct ath_softc *sc = (struct ath_softc *) common->priv;
  126. if (!(sc->sc_flags & SC_OP_ANI_RUN))
  127. return;
  128. if (sc->sc_flags & SC_OP_OFFCHANNEL)
  129. return;
  130. common->ani.longcal_timer = timestamp;
  131. common->ani.shortcal_timer = timestamp;
  132. common->ani.checkani_timer = timestamp;
  133. mod_timer(&common->ani.timer,
  134. jiffies +
  135. msecs_to_jiffies((u32)ah->config.ani_poll_interval));
  136. }
  137. static void ath_update_survey_nf(struct ath_softc *sc, int channel)
  138. {
  139. struct ath_hw *ah = sc->sc_ah;
  140. struct ath9k_channel *chan = &ah->channels[channel];
  141. struct survey_info *survey = &sc->survey[channel];
  142. if (chan->noisefloor) {
  143. survey->filled |= SURVEY_INFO_NOISE_DBM;
  144. survey->noise = ath9k_hw_getchan_noise(ah, chan);
  145. }
  146. }
  147. /*
  148. * Updates the survey statistics and returns the busy time since last
  149. * update in %, if the measurement duration was long enough for the
  150. * result to be useful, -1 otherwise.
  151. */
  152. static int ath_update_survey_stats(struct ath_softc *sc)
  153. {
  154. struct ath_hw *ah = sc->sc_ah;
  155. struct ath_common *common = ath9k_hw_common(ah);
  156. int pos = ah->curchan - &ah->channels[0];
  157. struct survey_info *survey = &sc->survey[pos];
  158. struct ath_cycle_counters *cc = &common->cc_survey;
  159. unsigned int div = common->clockrate * 1000;
  160. int ret = 0;
  161. if (!ah->curchan)
  162. return -1;
  163. if (ah->power_mode == ATH9K_PM_AWAKE)
  164. ath_hw_cycle_counters_update(common);
  165. if (cc->cycles > 0) {
  166. survey->filled |= SURVEY_INFO_CHANNEL_TIME |
  167. SURVEY_INFO_CHANNEL_TIME_BUSY |
  168. SURVEY_INFO_CHANNEL_TIME_RX |
  169. SURVEY_INFO_CHANNEL_TIME_TX;
  170. survey->channel_time += cc->cycles / div;
  171. survey->channel_time_busy += cc->rx_busy / div;
  172. survey->channel_time_rx += cc->rx_frame / div;
  173. survey->channel_time_tx += cc->tx_frame / div;
  174. }
  175. if (cc->cycles < div)
  176. return -1;
  177. if (cc->cycles > 0)
  178. ret = cc->rx_busy * 100 / cc->cycles;
  179. memset(cc, 0, sizeof(*cc));
  180. ath_update_survey_nf(sc, pos);
  181. return ret;
  182. }
  183. static void __ath_cancel_work(struct ath_softc *sc)
  184. {
  185. cancel_work_sync(&sc->paprd_work);
  186. cancel_work_sync(&sc->hw_check_work);
  187. cancel_delayed_work_sync(&sc->tx_complete_work);
  188. cancel_delayed_work_sync(&sc->hw_pll_work);
  189. }
  190. static void ath_cancel_work(struct ath_softc *sc)
  191. {
  192. __ath_cancel_work(sc);
  193. cancel_work_sync(&sc->hw_reset_work);
  194. }
  195. static bool ath_prepare_reset(struct ath_softc *sc, bool retry_tx, bool flush)
  196. {
  197. struct ath_hw *ah = sc->sc_ah;
  198. struct ath_common *common = ath9k_hw_common(ah);
  199. bool ret;
  200. ieee80211_stop_queues(sc->hw);
  201. sc->hw_busy_count = 0;
  202. del_timer_sync(&common->ani.timer);
  203. ath9k_debug_samp_bb_mac(sc);
  204. ath9k_hw_disable_interrupts(ah);
  205. ret = ath_drain_all_txq(sc, retry_tx);
  206. if (!ath_stoprecv(sc))
  207. ret = false;
  208. if (!flush) {
  209. if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
  210. ath_rx_tasklet(sc, 1, true);
  211. ath_rx_tasklet(sc, 1, false);
  212. } else {
  213. ath_flushrecv(sc);
  214. }
  215. return ret;
  216. }
  217. static bool ath_complete_reset(struct ath_softc *sc, bool start)
  218. {
  219. struct ath_hw *ah = sc->sc_ah;
  220. struct ath_common *common = ath9k_hw_common(ah);
  221. if (ath_startrecv(sc) != 0) {
  222. ath_err(common, "Unable to restart recv logic\n");
  223. return false;
  224. }
  225. ath9k_cmn_update_txpow(ah, sc->curtxpow,
  226. sc->config.txpowlimit, &sc->curtxpow);
  227. ath9k_hw_set_interrupts(ah);
  228. ath9k_hw_enable_interrupts(ah);
  229. if (!(sc->sc_flags & (SC_OP_OFFCHANNEL)) && start) {
  230. if (sc->sc_flags & SC_OP_BEACONS)
  231. ath_set_beacon(sc);
  232. ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
  233. ieee80211_queue_delayed_work(sc->hw, &sc->hw_pll_work, HZ/2);
  234. if (!common->disable_ani)
  235. ath_start_ani(common);
  236. }
  237. if ((ah->caps.hw_caps & ATH9K_HW_CAP_ANT_DIV_COMB) && sc->ant_rx != 3) {
  238. struct ath_hw_antcomb_conf div_ant_conf;
  239. u8 lna_conf;
  240. ath9k_hw_antdiv_comb_conf_get(ah, &div_ant_conf);
  241. if (sc->ant_rx == 1)
  242. lna_conf = ATH_ANT_DIV_COMB_LNA1;
  243. else
  244. lna_conf = ATH_ANT_DIV_COMB_LNA2;
  245. div_ant_conf.main_lna_conf = lna_conf;
  246. div_ant_conf.alt_lna_conf = lna_conf;
  247. ath9k_hw_antdiv_comb_conf_set(ah, &div_ant_conf);
  248. }
  249. ieee80211_wake_queues(sc->hw);
  250. return true;
  251. }
  252. static int ath_reset_internal(struct ath_softc *sc, struct ath9k_channel *hchan,
  253. bool retry_tx)
  254. {
  255. struct ath_hw *ah = sc->sc_ah;
  256. struct ath_common *common = ath9k_hw_common(ah);
  257. struct ath9k_hw_cal_data *caldata = NULL;
  258. bool fastcc = true;
  259. bool flush = false;
  260. int r;
  261. __ath_cancel_work(sc);
  262. spin_lock_bh(&sc->sc_pcu_lock);
  263. if (!(sc->sc_flags & SC_OP_OFFCHANNEL)) {
  264. fastcc = false;
  265. caldata = &sc->caldata;
  266. }
  267. if (!hchan) {
  268. fastcc = false;
  269. flush = true;
  270. hchan = ah->curchan;
  271. }
  272. if (fastcc && (ah->chip_fullsleep ||
  273. !ath9k_hw_check_alive(ah)))
  274. fastcc = false;
  275. if (!ath_prepare_reset(sc, retry_tx, flush))
  276. fastcc = false;
  277. ath_dbg(common, CONFIG, "Reset to %u MHz, HT40: %d fastcc: %d\n",
  278. hchan->channel, !!(hchan->channelFlags & (CHANNEL_HT40MINUS |
  279. CHANNEL_HT40PLUS)),
  280. fastcc);
  281. r = ath9k_hw_reset(ah, hchan, caldata, fastcc);
  282. if (r) {
  283. ath_err(common,
  284. "Unable to reset channel, reset status %d\n", r);
  285. goto out;
  286. }
  287. if (!ath_complete_reset(sc, true))
  288. r = -EIO;
  289. out:
  290. spin_unlock_bh(&sc->sc_pcu_lock);
  291. return r;
  292. }
  293. /*
  294. * Set/change channels. If the channel is really being changed, it's done
  295. * by reseting the chip. To accomplish this we must first cleanup any pending
  296. * DMA, then restart stuff.
  297. */
  298. static int ath_set_channel(struct ath_softc *sc, struct ieee80211_hw *hw,
  299. struct ath9k_channel *hchan)
  300. {
  301. int r;
  302. if (sc->sc_flags & SC_OP_INVALID)
  303. return -EIO;
  304. ath9k_ps_wakeup(sc);
  305. r = ath_reset_internal(sc, hchan, false);
  306. ath9k_ps_restore(sc);
  307. return r;
  308. }
  309. static void ath_paprd_activate(struct ath_softc *sc)
  310. {
  311. struct ath_hw *ah = sc->sc_ah;
  312. struct ath9k_hw_cal_data *caldata = ah->caldata;
  313. int chain;
  314. if (!caldata || !caldata->paprd_done)
  315. return;
  316. ath9k_ps_wakeup(sc);
  317. ar9003_paprd_enable(ah, false);
  318. for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
  319. if (!(ah->txchainmask & BIT(chain)))
  320. continue;
  321. ar9003_paprd_populate_single_table(ah, caldata, chain);
  322. }
  323. ar9003_paprd_enable(ah, true);
  324. ath9k_ps_restore(sc);
  325. }
  326. static bool ath_paprd_send_frame(struct ath_softc *sc, struct sk_buff *skb, int chain)
  327. {
  328. struct ieee80211_hw *hw = sc->hw;
  329. struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
  330. struct ath_hw *ah = sc->sc_ah;
  331. struct ath_common *common = ath9k_hw_common(ah);
  332. struct ath_tx_control txctl;
  333. int time_left;
  334. memset(&txctl, 0, sizeof(txctl));
  335. txctl.txq = sc->tx.txq_map[WME_AC_BE];
  336. memset(tx_info, 0, sizeof(*tx_info));
  337. tx_info->band = hw->conf.channel->band;
  338. tx_info->flags |= IEEE80211_TX_CTL_NO_ACK;
  339. tx_info->control.rates[0].idx = 0;
  340. tx_info->control.rates[0].count = 1;
  341. tx_info->control.rates[0].flags = IEEE80211_TX_RC_MCS;
  342. tx_info->control.rates[1].idx = -1;
  343. init_completion(&sc->paprd_complete);
  344. txctl.paprd = BIT(chain);
  345. if (ath_tx_start(hw, skb, &txctl) != 0) {
  346. ath_dbg(common, CALIBRATE, "PAPRD TX failed\n");
  347. dev_kfree_skb_any(skb);
  348. return false;
  349. }
  350. time_left = wait_for_completion_timeout(&sc->paprd_complete,
  351. msecs_to_jiffies(ATH_PAPRD_TIMEOUT));
  352. if (!time_left)
  353. ath_dbg(common, CALIBRATE,
  354. "Timeout waiting for paprd training on TX chain %d\n",
  355. chain);
  356. return !!time_left;
  357. }
  358. void ath_paprd_calibrate(struct work_struct *work)
  359. {
  360. struct ath_softc *sc = container_of(work, struct ath_softc, paprd_work);
  361. struct ieee80211_hw *hw = sc->hw;
  362. struct ath_hw *ah = sc->sc_ah;
  363. struct ieee80211_hdr *hdr;
  364. struct sk_buff *skb = NULL;
  365. struct ath9k_hw_cal_data *caldata = ah->caldata;
  366. struct ath_common *common = ath9k_hw_common(ah);
  367. int ftype;
  368. int chain_ok = 0;
  369. int chain;
  370. int len = 1800;
  371. if (!caldata)
  372. return;
  373. ath9k_ps_wakeup(sc);
  374. if (ar9003_paprd_init_table(ah) < 0)
  375. goto fail_paprd;
  376. skb = alloc_skb(len, GFP_KERNEL);
  377. if (!skb)
  378. goto fail_paprd;
  379. skb_put(skb, len);
  380. memset(skb->data, 0, len);
  381. hdr = (struct ieee80211_hdr *)skb->data;
  382. ftype = IEEE80211_FTYPE_DATA | IEEE80211_STYPE_NULLFUNC;
  383. hdr->frame_control = cpu_to_le16(ftype);
  384. hdr->duration_id = cpu_to_le16(10);
  385. memcpy(hdr->addr1, hw->wiphy->perm_addr, ETH_ALEN);
  386. memcpy(hdr->addr2, hw->wiphy->perm_addr, ETH_ALEN);
  387. memcpy(hdr->addr3, hw->wiphy->perm_addr, ETH_ALEN);
  388. for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
  389. if (!(ah->txchainmask & BIT(chain)))
  390. continue;
  391. chain_ok = 0;
  392. ath_dbg(common, CALIBRATE,
  393. "Sending PAPRD frame for thermal measurement on chain %d\n",
  394. chain);
  395. if (!ath_paprd_send_frame(sc, skb, chain))
  396. goto fail_paprd;
  397. ar9003_paprd_setup_gain_table(ah, chain);
  398. ath_dbg(common, CALIBRATE,
  399. "Sending PAPRD training frame on chain %d\n", chain);
  400. if (!ath_paprd_send_frame(sc, skb, chain))
  401. goto fail_paprd;
  402. if (!ar9003_paprd_is_done(ah)) {
  403. ath_dbg(common, CALIBRATE,
  404. "PAPRD not yet done on chain %d\n", chain);
  405. break;
  406. }
  407. if (ar9003_paprd_create_curve(ah, caldata, chain)) {
  408. ath_dbg(common, CALIBRATE,
  409. "PAPRD create curve failed on chain %d\n",
  410. chain);
  411. break;
  412. }
  413. chain_ok = 1;
  414. }
  415. kfree_skb(skb);
  416. if (chain_ok) {
  417. caldata->paprd_done = true;
  418. ath_paprd_activate(sc);
  419. }
  420. fail_paprd:
  421. ath9k_ps_restore(sc);
  422. }
  423. /*
  424. * This routine performs the periodic noise floor calibration function
  425. * that is used to adjust and optimize the chip performance. This
  426. * takes environmental changes (location, temperature) into account.
  427. * When the task is complete, it reschedules itself depending on the
  428. * appropriate interval that was calculated.
  429. */
  430. void ath_ani_calibrate(unsigned long data)
  431. {
  432. struct ath_softc *sc = (struct ath_softc *)data;
  433. struct ath_hw *ah = sc->sc_ah;
  434. struct ath_common *common = ath9k_hw_common(ah);
  435. bool longcal = false;
  436. bool shortcal = false;
  437. bool aniflag = false;
  438. unsigned int timestamp = jiffies_to_msecs(jiffies);
  439. u32 cal_interval, short_cal_interval, long_cal_interval;
  440. unsigned long flags;
  441. if (ah->caldata && ah->caldata->nfcal_interference)
  442. long_cal_interval = ATH_LONG_CALINTERVAL_INT;
  443. else
  444. long_cal_interval = ATH_LONG_CALINTERVAL;
  445. short_cal_interval = (ah->opmode == NL80211_IFTYPE_AP) ?
  446. ATH_AP_SHORT_CALINTERVAL : ATH_STA_SHORT_CALINTERVAL;
  447. /* Only calibrate if awake */
  448. if (sc->sc_ah->power_mode != ATH9K_PM_AWAKE)
  449. goto set_timer;
  450. ath9k_ps_wakeup(sc);
  451. /* Long calibration runs independently of short calibration. */
  452. if ((timestamp - common->ani.longcal_timer) >= long_cal_interval) {
  453. longcal = true;
  454. common->ani.longcal_timer = timestamp;
  455. }
  456. /* Short calibration applies only while caldone is false */
  457. if (!common->ani.caldone) {
  458. if ((timestamp - common->ani.shortcal_timer) >= short_cal_interval) {
  459. shortcal = true;
  460. common->ani.shortcal_timer = timestamp;
  461. common->ani.resetcal_timer = timestamp;
  462. }
  463. } else {
  464. if ((timestamp - common->ani.resetcal_timer) >=
  465. ATH_RESTART_CALINTERVAL) {
  466. common->ani.caldone = ath9k_hw_reset_calvalid(ah);
  467. if (common->ani.caldone)
  468. common->ani.resetcal_timer = timestamp;
  469. }
  470. }
  471. /* Verify whether we must check ANI */
  472. if (sc->sc_ah->config.enable_ani
  473. && (timestamp - common->ani.checkani_timer) >=
  474. ah->config.ani_poll_interval) {
  475. aniflag = true;
  476. common->ani.checkani_timer = timestamp;
  477. }
  478. /* Call ANI routine if necessary */
  479. if (aniflag) {
  480. spin_lock_irqsave(&common->cc_lock, flags);
  481. ath9k_hw_ani_monitor(ah, ah->curchan);
  482. ath_update_survey_stats(sc);
  483. spin_unlock_irqrestore(&common->cc_lock, flags);
  484. }
  485. /* Perform calibration if necessary */
  486. if (longcal || shortcal) {
  487. common->ani.caldone =
  488. ath9k_hw_calibrate(ah, ah->curchan,
  489. ah->rxchainmask, longcal);
  490. }
  491. ath_dbg(common, ANI,
  492. "Calibration @%lu finished: %s %s %s, caldone: %s\n",
  493. jiffies,
  494. longcal ? "long" : "", shortcal ? "short" : "",
  495. aniflag ? "ani" : "", common->ani.caldone ? "true" : "false");
  496. ath9k_ps_restore(sc);
  497. set_timer:
  498. /*
  499. * Set timer interval based on previous results.
  500. * The interval must be the shortest necessary to satisfy ANI,
  501. * short calibration and long calibration.
  502. */
  503. ath9k_debug_samp_bb_mac(sc);
  504. cal_interval = ATH_LONG_CALINTERVAL;
  505. if (sc->sc_ah->config.enable_ani)
  506. cal_interval = min(cal_interval,
  507. (u32)ah->config.ani_poll_interval);
  508. if (!common->ani.caldone)
  509. cal_interval = min(cal_interval, (u32)short_cal_interval);
  510. mod_timer(&common->ani.timer, jiffies + msecs_to_jiffies(cal_interval));
  511. if ((sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_PAPRD) && ah->caldata) {
  512. if (!ah->caldata->paprd_done)
  513. ieee80211_queue_work(sc->hw, &sc->paprd_work);
  514. else if (!ah->paprd_table_write_done)
  515. ath_paprd_activate(sc);
  516. }
  517. }
  518. static void ath_node_attach(struct ath_softc *sc, struct ieee80211_sta *sta,
  519. struct ieee80211_vif *vif)
  520. {
  521. struct ath_node *an;
  522. an = (struct ath_node *)sta->drv_priv;
  523. #ifdef CONFIG_ATH9K_DEBUGFS
  524. spin_lock(&sc->nodes_lock);
  525. list_add(&an->list, &sc->nodes);
  526. spin_unlock(&sc->nodes_lock);
  527. #endif
  528. an->sta = sta;
  529. an->vif = vif;
  530. if (sc->sc_flags & SC_OP_TXAGGR) {
  531. ath_tx_node_init(sc, an);
  532. an->maxampdu = 1 << (IEEE80211_HT_MAX_AMPDU_FACTOR +
  533. sta->ht_cap.ampdu_factor);
  534. an->mpdudensity = parse_mpdudensity(sta->ht_cap.ampdu_density);
  535. }
  536. }
  537. static void ath_node_detach(struct ath_softc *sc, struct ieee80211_sta *sta)
  538. {
  539. struct ath_node *an = (struct ath_node *)sta->drv_priv;
  540. #ifdef CONFIG_ATH9K_DEBUGFS
  541. spin_lock(&sc->nodes_lock);
  542. list_del(&an->list);
  543. spin_unlock(&sc->nodes_lock);
  544. an->sta = NULL;
  545. #endif
  546. if (sc->sc_flags & SC_OP_TXAGGR)
  547. ath_tx_node_cleanup(sc, an);
  548. }
  549. void ath9k_tasklet(unsigned long data)
  550. {
  551. struct ath_softc *sc = (struct ath_softc *)data;
  552. struct ath_hw *ah = sc->sc_ah;
  553. struct ath_common *common = ath9k_hw_common(ah);
  554. u32 status = sc->intrstatus;
  555. u32 rxmask;
  556. ath9k_ps_wakeup(sc);
  557. spin_lock(&sc->sc_pcu_lock);
  558. if ((status & ATH9K_INT_FATAL) ||
  559. (status & ATH9K_INT_BB_WATCHDOG)) {
  560. #ifdef CONFIG_ATH9K_DEBUGFS
  561. enum ath_reset_type type;
  562. if (status & ATH9K_INT_FATAL)
  563. type = RESET_TYPE_FATAL_INT;
  564. else
  565. type = RESET_TYPE_BB_WATCHDOG;
  566. RESET_STAT_INC(sc, type);
  567. #endif
  568. ieee80211_queue_work(sc->hw, &sc->hw_reset_work);
  569. goto out;
  570. }
  571. /*
  572. * Only run the baseband hang check if beacons stop working in AP or
  573. * IBSS mode, because it has a high false positive rate. For station
  574. * mode it should not be necessary, since the upper layers will detect
  575. * this through a beacon miss automatically and the following channel
  576. * change will trigger a hardware reset anyway
  577. */
  578. if (ath9k_hw_numtxpending(ah, sc->beacon.beaconq) != 0 &&
  579. !ath9k_hw_check_alive(ah))
  580. ieee80211_queue_work(sc->hw, &sc->hw_check_work);
  581. if ((status & ATH9K_INT_TSFOOR) && sc->ps_enabled) {
  582. /*
  583. * TSF sync does not look correct; remain awake to sync with
  584. * the next Beacon.
  585. */
  586. ath_dbg(common, PS, "TSFOOR - Sync with next Beacon\n");
  587. sc->ps_flags |= PS_WAIT_FOR_BEACON | PS_BEACON_SYNC;
  588. }
  589. if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
  590. rxmask = (ATH9K_INT_RXHP | ATH9K_INT_RXLP | ATH9K_INT_RXEOL |
  591. ATH9K_INT_RXORN);
  592. else
  593. rxmask = (ATH9K_INT_RX | ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
  594. if (status & rxmask) {
  595. /* Check for high priority Rx first */
  596. if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
  597. (status & ATH9K_INT_RXHP))
  598. ath_rx_tasklet(sc, 0, true);
  599. ath_rx_tasklet(sc, 0, false);
  600. }
  601. if (status & ATH9K_INT_TX) {
  602. if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
  603. ath_tx_edma_tasklet(sc);
  604. else
  605. ath_tx_tasklet(sc);
  606. }
  607. if (ath9k_hw_get_btcoex_scheme(ah) == ATH_BTCOEX_CFG_3WIRE)
  608. if (status & ATH9K_INT_GENTIMER)
  609. ath_gen_timer_isr(sc->sc_ah);
  610. if ((status & ATH9K_INT_MCI) && ATH9K_HW_CAP_MCI)
  611. ath_mci_intr(sc);
  612. out:
  613. /* re-enable hardware interrupt */
  614. ath9k_hw_enable_interrupts(ah);
  615. spin_unlock(&sc->sc_pcu_lock);
  616. ath9k_ps_restore(sc);
  617. }
  618. irqreturn_t ath_isr(int irq, void *dev)
  619. {
  620. #define SCHED_INTR ( \
  621. ATH9K_INT_FATAL | \
  622. ATH9K_INT_BB_WATCHDOG | \
  623. ATH9K_INT_RXORN | \
  624. ATH9K_INT_RXEOL | \
  625. ATH9K_INT_RX | \
  626. ATH9K_INT_RXLP | \
  627. ATH9K_INT_RXHP | \
  628. ATH9K_INT_TX | \
  629. ATH9K_INT_BMISS | \
  630. ATH9K_INT_CST | \
  631. ATH9K_INT_TSFOOR | \
  632. ATH9K_INT_GENTIMER | \
  633. ATH9K_INT_MCI)
  634. struct ath_softc *sc = dev;
  635. struct ath_hw *ah = sc->sc_ah;
  636. struct ath_common *common = ath9k_hw_common(ah);
  637. enum ath9k_int status;
  638. bool sched = false;
  639. /*
  640. * The hardware is not ready/present, don't
  641. * touch anything. Note this can happen early
  642. * on if the IRQ is shared.
  643. */
  644. if (sc->sc_flags & SC_OP_INVALID)
  645. return IRQ_NONE;
  646. /* shared irq, not for us */
  647. if (!ath9k_hw_intrpend(ah))
  648. return IRQ_NONE;
  649. /*
  650. * Figure out the reason(s) for the interrupt. Note
  651. * that the hal returns a pseudo-ISR that may include
  652. * bits we haven't explicitly enabled so we mask the
  653. * value to insure we only process bits we requested.
  654. */
  655. ath9k_hw_getisr(ah, &status); /* NB: clears ISR too */
  656. status &= ah->imask; /* discard unasked-for bits */
  657. /*
  658. * If there are no status bits set, then this interrupt was not
  659. * for me (should have been caught above).
  660. */
  661. if (!status)
  662. return IRQ_NONE;
  663. /* Cache the status */
  664. sc->intrstatus = status;
  665. if (status & SCHED_INTR)
  666. sched = true;
  667. /*
  668. * If a FATAL or RXORN interrupt is received, we have to reset the
  669. * chip immediately.
  670. */
  671. if ((status & ATH9K_INT_FATAL) || ((status & ATH9K_INT_RXORN) &&
  672. !(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)))
  673. goto chip_reset;
  674. if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
  675. (status & ATH9K_INT_BB_WATCHDOG)) {
  676. spin_lock(&common->cc_lock);
  677. ath_hw_cycle_counters_update(common);
  678. ar9003_hw_bb_watchdog_dbg_info(ah);
  679. spin_unlock(&common->cc_lock);
  680. goto chip_reset;
  681. }
  682. if (status & ATH9K_INT_SWBA)
  683. tasklet_schedule(&sc->bcon_tasklet);
  684. if (status & ATH9K_INT_TXURN)
  685. ath9k_hw_updatetxtriglevel(ah, true);
  686. if (status & ATH9K_INT_RXEOL) {
  687. ah->imask &= ~(ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
  688. ath9k_hw_set_interrupts(ah);
  689. }
  690. if (status & ATH9K_INT_MIB) {
  691. /*
  692. * Disable interrupts until we service the MIB
  693. * interrupt; otherwise it will continue to
  694. * fire.
  695. */
  696. ath9k_hw_disable_interrupts(ah);
  697. /*
  698. * Let the hal handle the event. We assume
  699. * it will clear whatever condition caused
  700. * the interrupt.
  701. */
  702. spin_lock(&common->cc_lock);
  703. ath9k_hw_proc_mib_event(ah);
  704. spin_unlock(&common->cc_lock);
  705. ath9k_hw_enable_interrupts(ah);
  706. }
  707. if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
  708. if (status & ATH9K_INT_TIM_TIMER) {
  709. if (ATH_DBG_WARN_ON_ONCE(sc->ps_idle))
  710. goto chip_reset;
  711. /* Clear RxAbort bit so that we can
  712. * receive frames */
  713. ath9k_setpower(sc, ATH9K_PM_AWAKE);
  714. ath9k_hw_setrxabort(sc->sc_ah, 0);
  715. sc->ps_flags |= PS_WAIT_FOR_BEACON;
  716. }
  717. chip_reset:
  718. ath_debug_stat_interrupt(sc, status);
  719. if (sched) {
  720. /* turn off every interrupt */
  721. ath9k_hw_disable_interrupts(ah);
  722. tasklet_schedule(&sc->intr_tq);
  723. }
  724. return IRQ_HANDLED;
  725. #undef SCHED_INTR
  726. }
  727. static int ath_reset(struct ath_softc *sc, bool retry_tx)
  728. {
  729. int r;
  730. ath9k_ps_wakeup(sc);
  731. r = ath_reset_internal(sc, NULL, retry_tx);
  732. if (retry_tx) {
  733. int i;
  734. for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
  735. if (ATH_TXQ_SETUP(sc, i)) {
  736. spin_lock_bh(&sc->tx.txq[i].axq_lock);
  737. ath_txq_schedule(sc, &sc->tx.txq[i]);
  738. spin_unlock_bh(&sc->tx.txq[i].axq_lock);
  739. }
  740. }
  741. }
  742. ath9k_ps_restore(sc);
  743. return r;
  744. }
  745. void ath_reset_work(struct work_struct *work)
  746. {
  747. struct ath_softc *sc = container_of(work, struct ath_softc, hw_reset_work);
  748. ath_reset(sc, true);
  749. }
  750. void ath_hw_check(struct work_struct *work)
  751. {
  752. struct ath_softc *sc = container_of(work, struct ath_softc, hw_check_work);
  753. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  754. unsigned long flags;
  755. int busy;
  756. ath9k_ps_wakeup(sc);
  757. if (ath9k_hw_check_alive(sc->sc_ah))
  758. goto out;
  759. spin_lock_irqsave(&common->cc_lock, flags);
  760. busy = ath_update_survey_stats(sc);
  761. spin_unlock_irqrestore(&common->cc_lock, flags);
  762. ath_dbg(common, RESET, "Possible baseband hang, busy=%d (try %d)\n",
  763. busy, sc->hw_busy_count + 1);
  764. if (busy >= 99) {
  765. if (++sc->hw_busy_count >= 3) {
  766. RESET_STAT_INC(sc, RESET_TYPE_BB_HANG);
  767. ieee80211_queue_work(sc->hw, &sc->hw_reset_work);
  768. }
  769. } else if (busy >= 0)
  770. sc->hw_busy_count = 0;
  771. out:
  772. ath9k_ps_restore(sc);
  773. }
  774. static void ath_hw_pll_rx_hang_check(struct ath_softc *sc, u32 pll_sqsum)
  775. {
  776. static int count;
  777. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  778. if (pll_sqsum >= 0x40000) {
  779. count++;
  780. if (count == 3) {
  781. /* Rx is hung for more than 500ms. Reset it */
  782. ath_dbg(common, RESET, "Possible RX hang, resetting\n");
  783. RESET_STAT_INC(sc, RESET_TYPE_PLL_HANG);
  784. ieee80211_queue_work(sc->hw, &sc->hw_reset_work);
  785. count = 0;
  786. }
  787. } else
  788. count = 0;
  789. }
  790. void ath_hw_pll_work(struct work_struct *work)
  791. {
  792. struct ath_softc *sc = container_of(work, struct ath_softc,
  793. hw_pll_work.work);
  794. u32 pll_sqsum;
  795. if (AR_SREV_9485(sc->sc_ah)) {
  796. ath9k_ps_wakeup(sc);
  797. pll_sqsum = ar9003_get_pll_sqsum_dvc(sc->sc_ah);
  798. ath9k_ps_restore(sc);
  799. ath_hw_pll_rx_hang_check(sc, pll_sqsum);
  800. ieee80211_queue_delayed_work(sc->hw, &sc->hw_pll_work, HZ/5);
  801. }
  802. }
  803. /**********************/
  804. /* mac80211 callbacks */
  805. /**********************/
  806. static int ath9k_start(struct ieee80211_hw *hw)
  807. {
  808. struct ath_softc *sc = hw->priv;
  809. struct ath_hw *ah = sc->sc_ah;
  810. struct ath_common *common = ath9k_hw_common(ah);
  811. struct ieee80211_channel *curchan = hw->conf.channel;
  812. struct ath9k_channel *init_channel;
  813. int r;
  814. ath_dbg(common, CONFIG,
  815. "Starting driver with initial channel: %d MHz\n",
  816. curchan->center_freq);
  817. ath9k_ps_wakeup(sc);
  818. mutex_lock(&sc->mutex);
  819. /* setup initial channel */
  820. sc->chan_idx = curchan->hw_value;
  821. init_channel = ath9k_cmn_get_curchannel(hw, ah);
  822. /* Reset SERDES registers */
  823. ath9k_hw_configpcipowersave(ah, false);
  824. /*
  825. * The basic interface to setting the hardware in a good
  826. * state is ``reset''. On return the hardware is known to
  827. * be powered up and with interrupts disabled. This must
  828. * be followed by initialization of the appropriate bits
  829. * and then setup of the interrupt mask.
  830. */
  831. spin_lock_bh(&sc->sc_pcu_lock);
  832. atomic_set(&ah->intr_ref_cnt, -1);
  833. r = ath9k_hw_reset(ah, init_channel, ah->caldata, false);
  834. if (r) {
  835. ath_err(common,
  836. "Unable to reset hardware; reset status %d (freq %u MHz)\n",
  837. r, curchan->center_freq);
  838. spin_unlock_bh(&sc->sc_pcu_lock);
  839. goto mutex_unlock;
  840. }
  841. /* Setup our intr mask. */
  842. ah->imask = ATH9K_INT_TX | ATH9K_INT_RXEOL |
  843. ATH9K_INT_RXORN | ATH9K_INT_FATAL |
  844. ATH9K_INT_GLOBAL;
  845. if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
  846. ah->imask |= ATH9K_INT_RXHP |
  847. ATH9K_INT_RXLP |
  848. ATH9K_INT_BB_WATCHDOG;
  849. else
  850. ah->imask |= ATH9K_INT_RX;
  851. ah->imask |= ATH9K_INT_GTT;
  852. if (ah->caps.hw_caps & ATH9K_HW_CAP_HT)
  853. ah->imask |= ATH9K_INT_CST;
  854. if (ah->caps.hw_caps & ATH9K_HW_CAP_MCI)
  855. ah->imask |= ATH9K_INT_MCI;
  856. sc->sc_flags &= ~SC_OP_INVALID;
  857. sc->sc_ah->is_monitoring = false;
  858. /* Disable BMISS interrupt when we're not associated */
  859. ah->imask &= ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS);
  860. if (!ath_complete_reset(sc, false)) {
  861. r = -EIO;
  862. spin_unlock_bh(&sc->sc_pcu_lock);
  863. goto mutex_unlock;
  864. }
  865. if (ah->led_pin >= 0) {
  866. ath9k_hw_cfg_output(ah, ah->led_pin,
  867. AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
  868. ath9k_hw_set_gpio(ah, ah->led_pin, 0);
  869. }
  870. /*
  871. * Reset key cache to sane defaults (all entries cleared) instead of
  872. * semi-random values after suspend/resume.
  873. */
  874. ath9k_cmn_init_crypto(sc->sc_ah);
  875. spin_unlock_bh(&sc->sc_pcu_lock);
  876. if ((ath9k_hw_get_btcoex_scheme(ah) != ATH_BTCOEX_CFG_NONE) &&
  877. !ah->btcoex_hw.enabled) {
  878. if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_MCI))
  879. ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT,
  880. AR_STOMP_LOW_WLAN_WGHT);
  881. ath9k_hw_btcoex_enable(ah);
  882. if (ath9k_hw_get_btcoex_scheme(ah) == ATH_BTCOEX_CFG_3WIRE)
  883. ath9k_btcoex_timer_resume(sc);
  884. }
  885. if (ah->caps.pcie_lcr_extsync_en && common->bus_ops->extn_synch_en)
  886. common->bus_ops->extn_synch_en(common);
  887. mutex_unlock:
  888. mutex_unlock(&sc->mutex);
  889. ath9k_ps_restore(sc);
  890. return r;
  891. }
  892. static void ath9k_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
  893. {
  894. struct ath_softc *sc = hw->priv;
  895. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  896. struct ath_tx_control txctl;
  897. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
  898. if (sc->ps_enabled) {
  899. /*
  900. * mac80211 does not set PM field for normal data frames, so we
  901. * need to update that based on the current PS mode.
  902. */
  903. if (ieee80211_is_data(hdr->frame_control) &&
  904. !ieee80211_is_nullfunc(hdr->frame_control) &&
  905. !ieee80211_has_pm(hdr->frame_control)) {
  906. ath_dbg(common, PS,
  907. "Add PM=1 for a TX frame while in PS mode\n");
  908. hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM);
  909. }
  910. }
  911. /*
  912. * Cannot tx while the hardware is in full sleep, it first needs a full
  913. * chip reset to recover from that
  914. */
  915. if (unlikely(sc->sc_ah->power_mode == ATH9K_PM_FULL_SLEEP))
  916. goto exit;
  917. if (unlikely(sc->sc_ah->power_mode != ATH9K_PM_AWAKE)) {
  918. /*
  919. * We are using PS-Poll and mac80211 can request TX while in
  920. * power save mode. Need to wake up hardware for the TX to be
  921. * completed and if needed, also for RX of buffered frames.
  922. */
  923. ath9k_ps_wakeup(sc);
  924. if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
  925. ath9k_hw_setrxabort(sc->sc_ah, 0);
  926. if (ieee80211_is_pspoll(hdr->frame_control)) {
  927. ath_dbg(common, PS,
  928. "Sending PS-Poll to pick a buffered frame\n");
  929. sc->ps_flags |= PS_WAIT_FOR_PSPOLL_DATA;
  930. } else {
  931. ath_dbg(common, PS, "Wake up to complete TX\n");
  932. sc->ps_flags |= PS_WAIT_FOR_TX_ACK;
  933. }
  934. /*
  935. * The actual restore operation will happen only after
  936. * the sc_flags bit is cleared. We are just dropping
  937. * the ps_usecount here.
  938. */
  939. ath9k_ps_restore(sc);
  940. }
  941. memset(&txctl, 0, sizeof(struct ath_tx_control));
  942. txctl.txq = sc->tx.txq_map[skb_get_queue_mapping(skb)];
  943. ath_dbg(common, XMIT, "transmitting packet, skb: %p\n", skb);
  944. if (ath_tx_start(hw, skb, &txctl) != 0) {
  945. ath_dbg(common, XMIT, "TX failed\n");
  946. goto exit;
  947. }
  948. return;
  949. exit:
  950. dev_kfree_skb_any(skb);
  951. }
  952. static void ath9k_stop(struct ieee80211_hw *hw)
  953. {
  954. struct ath_softc *sc = hw->priv;
  955. struct ath_hw *ah = sc->sc_ah;
  956. struct ath_common *common = ath9k_hw_common(ah);
  957. bool prev_idle;
  958. mutex_lock(&sc->mutex);
  959. ath_cancel_work(sc);
  960. if (sc->sc_flags & SC_OP_INVALID) {
  961. ath_dbg(common, ANY, "Device not present\n");
  962. mutex_unlock(&sc->mutex);
  963. return;
  964. }
  965. /* Ensure HW is awake when we try to shut it down. */
  966. ath9k_ps_wakeup(sc);
  967. if (ah->btcoex_hw.enabled &&
  968. ath9k_hw_get_btcoex_scheme(ah) != ATH_BTCOEX_CFG_NONE) {
  969. ath9k_hw_btcoex_disable(ah);
  970. if (ath9k_hw_get_btcoex_scheme(ah) == ATH_BTCOEX_CFG_3WIRE)
  971. ath9k_btcoex_timer_pause(sc);
  972. ath_mci_flush_profile(&sc->btcoex.mci);
  973. }
  974. spin_lock_bh(&sc->sc_pcu_lock);
  975. /* prevent tasklets to enable interrupts once we disable them */
  976. ah->imask &= ~ATH9K_INT_GLOBAL;
  977. /* make sure h/w will not generate any interrupt
  978. * before setting the invalid flag. */
  979. ath9k_hw_disable_interrupts(ah);
  980. spin_unlock_bh(&sc->sc_pcu_lock);
  981. /* we can now sync irq and kill any running tasklets, since we already
  982. * disabled interrupts and not holding a spin lock */
  983. synchronize_irq(sc->irq);
  984. tasklet_kill(&sc->intr_tq);
  985. tasklet_kill(&sc->bcon_tasklet);
  986. prev_idle = sc->ps_idle;
  987. sc->ps_idle = true;
  988. spin_lock_bh(&sc->sc_pcu_lock);
  989. if (ah->led_pin >= 0) {
  990. ath9k_hw_set_gpio(ah, ah->led_pin, 1);
  991. ath9k_hw_cfg_gpio_input(ah, ah->led_pin);
  992. }
  993. ath_prepare_reset(sc, false, true);
  994. if (sc->rx.frag) {
  995. dev_kfree_skb_any(sc->rx.frag);
  996. sc->rx.frag = NULL;
  997. }
  998. if (!ah->curchan)
  999. ah->curchan = ath9k_cmn_get_curchannel(hw, ah);
  1000. ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
  1001. ath9k_hw_phy_disable(ah);
  1002. ath9k_hw_configpcipowersave(ah, true);
  1003. spin_unlock_bh(&sc->sc_pcu_lock);
  1004. ath9k_ps_restore(sc);
  1005. sc->sc_flags |= SC_OP_INVALID;
  1006. sc->ps_idle = prev_idle;
  1007. mutex_unlock(&sc->mutex);
  1008. ath_dbg(common, CONFIG, "Driver halt\n");
  1009. }
  1010. bool ath9k_uses_beacons(int type)
  1011. {
  1012. switch (type) {
  1013. case NL80211_IFTYPE_AP:
  1014. case NL80211_IFTYPE_ADHOC:
  1015. case NL80211_IFTYPE_MESH_POINT:
  1016. return true;
  1017. default:
  1018. return false;
  1019. }
  1020. }
  1021. static void ath9k_reclaim_beacon(struct ath_softc *sc,
  1022. struct ieee80211_vif *vif)
  1023. {
  1024. struct ath_vif *avp = (void *)vif->drv_priv;
  1025. ath9k_set_beaconing_status(sc, false);
  1026. ath_beacon_return(sc, avp);
  1027. ath9k_set_beaconing_status(sc, true);
  1028. sc->sc_flags &= ~SC_OP_BEACONS;
  1029. }
  1030. static void ath9k_vif_iter(void *data, u8 *mac, struct ieee80211_vif *vif)
  1031. {
  1032. struct ath9k_vif_iter_data *iter_data = data;
  1033. int i;
  1034. if (iter_data->hw_macaddr)
  1035. for (i = 0; i < ETH_ALEN; i++)
  1036. iter_data->mask[i] &=
  1037. ~(iter_data->hw_macaddr[i] ^ mac[i]);
  1038. switch (vif->type) {
  1039. case NL80211_IFTYPE_AP:
  1040. iter_data->naps++;
  1041. break;
  1042. case NL80211_IFTYPE_STATION:
  1043. iter_data->nstations++;
  1044. break;
  1045. case NL80211_IFTYPE_ADHOC:
  1046. iter_data->nadhocs++;
  1047. break;
  1048. case NL80211_IFTYPE_MESH_POINT:
  1049. iter_data->nmeshes++;
  1050. break;
  1051. case NL80211_IFTYPE_WDS:
  1052. iter_data->nwds++;
  1053. break;
  1054. default:
  1055. iter_data->nothers++;
  1056. break;
  1057. }
  1058. }
  1059. /* Called with sc->mutex held. */
  1060. void ath9k_calculate_iter_data(struct ieee80211_hw *hw,
  1061. struct ieee80211_vif *vif,
  1062. struct ath9k_vif_iter_data *iter_data)
  1063. {
  1064. struct ath_softc *sc = hw->priv;
  1065. struct ath_hw *ah = sc->sc_ah;
  1066. struct ath_common *common = ath9k_hw_common(ah);
  1067. /*
  1068. * Use the hardware MAC address as reference, the hardware uses it
  1069. * together with the BSSID mask when matching addresses.
  1070. */
  1071. memset(iter_data, 0, sizeof(*iter_data));
  1072. iter_data->hw_macaddr = common->macaddr;
  1073. memset(&iter_data->mask, 0xff, ETH_ALEN);
  1074. if (vif)
  1075. ath9k_vif_iter(iter_data, vif->addr, vif);
  1076. /* Get list of all active MAC addresses */
  1077. ieee80211_iterate_active_interfaces_atomic(sc->hw, ath9k_vif_iter,
  1078. iter_data);
  1079. }
  1080. /* Called with sc->mutex held. */
  1081. static void ath9k_calculate_summary_state(struct ieee80211_hw *hw,
  1082. struct ieee80211_vif *vif)
  1083. {
  1084. struct ath_softc *sc = hw->priv;
  1085. struct ath_hw *ah = sc->sc_ah;
  1086. struct ath_common *common = ath9k_hw_common(ah);
  1087. struct ath9k_vif_iter_data iter_data;
  1088. ath9k_calculate_iter_data(hw, vif, &iter_data);
  1089. /* Set BSSID mask. */
  1090. memcpy(common->bssidmask, iter_data.mask, ETH_ALEN);
  1091. ath_hw_setbssidmask(common);
  1092. /* Set op-mode & TSF */
  1093. if (iter_data.naps > 0) {
  1094. ath9k_hw_set_tsfadjust(ah, 1);
  1095. sc->sc_flags |= SC_OP_TSF_RESET;
  1096. ah->opmode = NL80211_IFTYPE_AP;
  1097. } else {
  1098. ath9k_hw_set_tsfadjust(ah, 0);
  1099. sc->sc_flags &= ~SC_OP_TSF_RESET;
  1100. if (iter_data.nmeshes)
  1101. ah->opmode = NL80211_IFTYPE_MESH_POINT;
  1102. else if (iter_data.nwds)
  1103. ah->opmode = NL80211_IFTYPE_AP;
  1104. else if (iter_data.nadhocs)
  1105. ah->opmode = NL80211_IFTYPE_ADHOC;
  1106. else
  1107. ah->opmode = NL80211_IFTYPE_STATION;
  1108. }
  1109. /*
  1110. * Enable MIB interrupts when there are hardware phy counters.
  1111. */
  1112. if ((iter_data.nstations + iter_data.nadhocs + iter_data.nmeshes) > 0) {
  1113. if (ah->config.enable_ani)
  1114. ah->imask |= ATH9K_INT_MIB;
  1115. ah->imask |= ATH9K_INT_TSFOOR;
  1116. } else {
  1117. ah->imask &= ~ATH9K_INT_MIB;
  1118. ah->imask &= ~ATH9K_INT_TSFOOR;
  1119. }
  1120. ath9k_hw_set_interrupts(ah);
  1121. /* Set up ANI */
  1122. if (iter_data.naps > 0) {
  1123. sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
  1124. if (!common->disable_ani) {
  1125. sc->sc_flags |= SC_OP_ANI_RUN;
  1126. ath_start_ani(common);
  1127. }
  1128. } else {
  1129. sc->sc_flags &= ~SC_OP_ANI_RUN;
  1130. del_timer_sync(&common->ani.timer);
  1131. }
  1132. }
  1133. /* Called with sc->mutex held, vif counts set up properly. */
  1134. static void ath9k_do_vif_add_setup(struct ieee80211_hw *hw,
  1135. struct ieee80211_vif *vif)
  1136. {
  1137. struct ath_softc *sc = hw->priv;
  1138. ath9k_calculate_summary_state(hw, vif);
  1139. if (ath9k_uses_beacons(vif->type)) {
  1140. int error;
  1141. /* This may fail because upper levels do not have beacons
  1142. * properly configured yet. That's OK, we assume it
  1143. * will be properly configured and then we will be notified
  1144. * in the info_changed method and set up beacons properly
  1145. * there.
  1146. */
  1147. ath9k_set_beaconing_status(sc, false);
  1148. error = ath_beacon_alloc(sc, vif);
  1149. if (!error)
  1150. ath_beacon_config(sc, vif);
  1151. ath9k_set_beaconing_status(sc, true);
  1152. }
  1153. }
  1154. static int ath9k_add_interface(struct ieee80211_hw *hw,
  1155. struct ieee80211_vif *vif)
  1156. {
  1157. struct ath_softc *sc = hw->priv;
  1158. struct ath_hw *ah = sc->sc_ah;
  1159. struct ath_common *common = ath9k_hw_common(ah);
  1160. int ret = 0;
  1161. ath9k_ps_wakeup(sc);
  1162. mutex_lock(&sc->mutex);
  1163. switch (vif->type) {
  1164. case NL80211_IFTYPE_STATION:
  1165. case NL80211_IFTYPE_WDS:
  1166. case NL80211_IFTYPE_ADHOC:
  1167. case NL80211_IFTYPE_AP:
  1168. case NL80211_IFTYPE_MESH_POINT:
  1169. break;
  1170. default:
  1171. ath_err(common, "Interface type %d not yet supported\n",
  1172. vif->type);
  1173. ret = -EOPNOTSUPP;
  1174. goto out;
  1175. }
  1176. if (ath9k_uses_beacons(vif->type)) {
  1177. if (sc->nbcnvifs >= ATH_BCBUF) {
  1178. ath_err(common, "Not enough beacon buffers when adding"
  1179. " new interface of type: %i\n",
  1180. vif->type);
  1181. ret = -ENOBUFS;
  1182. goto out;
  1183. }
  1184. }
  1185. if ((ah->opmode == NL80211_IFTYPE_ADHOC) ||
  1186. ((vif->type == NL80211_IFTYPE_ADHOC) &&
  1187. sc->nvifs > 0)) {
  1188. ath_err(common, "Cannot create ADHOC interface when other"
  1189. " interfaces already exist.\n");
  1190. ret = -EINVAL;
  1191. goto out;
  1192. }
  1193. ath_dbg(common, CONFIG, "Attach a VIF of type: %d\n", vif->type);
  1194. sc->nvifs++;
  1195. ath9k_do_vif_add_setup(hw, vif);
  1196. out:
  1197. mutex_unlock(&sc->mutex);
  1198. ath9k_ps_restore(sc);
  1199. return ret;
  1200. }
  1201. static int ath9k_change_interface(struct ieee80211_hw *hw,
  1202. struct ieee80211_vif *vif,
  1203. enum nl80211_iftype new_type,
  1204. bool p2p)
  1205. {
  1206. struct ath_softc *sc = hw->priv;
  1207. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1208. int ret = 0;
  1209. ath_dbg(common, CONFIG, "Change Interface\n");
  1210. mutex_lock(&sc->mutex);
  1211. ath9k_ps_wakeup(sc);
  1212. /* See if new interface type is valid. */
  1213. if ((new_type == NL80211_IFTYPE_ADHOC) &&
  1214. (sc->nvifs > 1)) {
  1215. ath_err(common, "When using ADHOC, it must be the only"
  1216. " interface.\n");
  1217. ret = -EINVAL;
  1218. goto out;
  1219. }
  1220. if (ath9k_uses_beacons(new_type) &&
  1221. !ath9k_uses_beacons(vif->type)) {
  1222. if (sc->nbcnvifs >= ATH_BCBUF) {
  1223. ath_err(common, "No beacon slot available\n");
  1224. ret = -ENOBUFS;
  1225. goto out;
  1226. }
  1227. }
  1228. /* Clean up old vif stuff */
  1229. if (ath9k_uses_beacons(vif->type))
  1230. ath9k_reclaim_beacon(sc, vif);
  1231. /* Add new settings */
  1232. vif->type = new_type;
  1233. vif->p2p = p2p;
  1234. ath9k_do_vif_add_setup(hw, vif);
  1235. out:
  1236. ath9k_ps_restore(sc);
  1237. mutex_unlock(&sc->mutex);
  1238. return ret;
  1239. }
  1240. static void ath9k_remove_interface(struct ieee80211_hw *hw,
  1241. struct ieee80211_vif *vif)
  1242. {
  1243. struct ath_softc *sc = hw->priv;
  1244. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1245. ath_dbg(common, CONFIG, "Detach Interface\n");
  1246. ath9k_ps_wakeup(sc);
  1247. mutex_lock(&sc->mutex);
  1248. sc->nvifs--;
  1249. /* Reclaim beacon resources */
  1250. if (ath9k_uses_beacons(vif->type))
  1251. ath9k_reclaim_beacon(sc, vif);
  1252. ath9k_calculate_summary_state(hw, NULL);
  1253. mutex_unlock(&sc->mutex);
  1254. ath9k_ps_restore(sc);
  1255. }
  1256. static void ath9k_enable_ps(struct ath_softc *sc)
  1257. {
  1258. struct ath_hw *ah = sc->sc_ah;
  1259. sc->ps_enabled = true;
  1260. if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
  1261. if ((ah->imask & ATH9K_INT_TIM_TIMER) == 0) {
  1262. ah->imask |= ATH9K_INT_TIM_TIMER;
  1263. ath9k_hw_set_interrupts(ah);
  1264. }
  1265. ath9k_hw_setrxabort(ah, 1);
  1266. }
  1267. }
  1268. static void ath9k_disable_ps(struct ath_softc *sc)
  1269. {
  1270. struct ath_hw *ah = sc->sc_ah;
  1271. sc->ps_enabled = false;
  1272. ath9k_hw_setpower(ah, ATH9K_PM_AWAKE);
  1273. if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
  1274. ath9k_hw_setrxabort(ah, 0);
  1275. sc->ps_flags &= ~(PS_WAIT_FOR_BEACON |
  1276. PS_WAIT_FOR_CAB |
  1277. PS_WAIT_FOR_PSPOLL_DATA |
  1278. PS_WAIT_FOR_TX_ACK);
  1279. if (ah->imask & ATH9K_INT_TIM_TIMER) {
  1280. ah->imask &= ~ATH9K_INT_TIM_TIMER;
  1281. ath9k_hw_set_interrupts(ah);
  1282. }
  1283. }
  1284. }
  1285. static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
  1286. {
  1287. struct ath_softc *sc = hw->priv;
  1288. struct ath_hw *ah = sc->sc_ah;
  1289. struct ath_common *common = ath9k_hw_common(ah);
  1290. struct ieee80211_conf *conf = &hw->conf;
  1291. ath9k_ps_wakeup(sc);
  1292. mutex_lock(&sc->mutex);
  1293. /*
  1294. * Leave this as the first check because we need to turn on the
  1295. * radio if it was disabled before prior to processing the rest
  1296. * of the changes. Likewise we must only disable the radio towards
  1297. * the end.
  1298. */
  1299. if (changed & IEEE80211_CONF_CHANGE_IDLE) {
  1300. sc->ps_idle = !!(conf->flags & IEEE80211_CONF_IDLE);
  1301. if (sc->ps_idle)
  1302. ath_cancel_work(sc);
  1303. }
  1304. /*
  1305. * We just prepare to enable PS. We have to wait until our AP has
  1306. * ACK'd our null data frame to disable RX otherwise we'll ignore
  1307. * those ACKs and end up retransmitting the same null data frames.
  1308. * IEEE80211_CONF_CHANGE_PS is only passed by mac80211 for STA mode.
  1309. */
  1310. if (changed & IEEE80211_CONF_CHANGE_PS) {
  1311. unsigned long flags;
  1312. spin_lock_irqsave(&sc->sc_pm_lock, flags);
  1313. if (conf->flags & IEEE80211_CONF_PS)
  1314. ath9k_enable_ps(sc);
  1315. else
  1316. ath9k_disable_ps(sc);
  1317. spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
  1318. }
  1319. if (changed & IEEE80211_CONF_CHANGE_MONITOR) {
  1320. if (conf->flags & IEEE80211_CONF_MONITOR) {
  1321. ath_dbg(common, CONFIG, "Monitor mode is enabled\n");
  1322. sc->sc_ah->is_monitoring = true;
  1323. } else {
  1324. ath_dbg(common, CONFIG, "Monitor mode is disabled\n");
  1325. sc->sc_ah->is_monitoring = false;
  1326. }
  1327. }
  1328. if (changed & IEEE80211_CONF_CHANGE_CHANNEL) {
  1329. struct ieee80211_channel *curchan = hw->conf.channel;
  1330. int pos = curchan->hw_value;
  1331. int old_pos = -1;
  1332. unsigned long flags;
  1333. if (ah->curchan)
  1334. old_pos = ah->curchan - &ah->channels[0];
  1335. if (hw->conf.flags & IEEE80211_CONF_OFFCHANNEL)
  1336. sc->sc_flags |= SC_OP_OFFCHANNEL;
  1337. else
  1338. sc->sc_flags &= ~SC_OP_OFFCHANNEL;
  1339. ath_dbg(common, CONFIG, "Set channel: %d MHz type: %d\n",
  1340. curchan->center_freq, conf->channel_type);
  1341. /* update survey stats for the old channel before switching */
  1342. spin_lock_irqsave(&common->cc_lock, flags);
  1343. ath_update_survey_stats(sc);
  1344. spin_unlock_irqrestore(&common->cc_lock, flags);
  1345. /*
  1346. * Preserve the current channel values, before updating
  1347. * the same channel
  1348. */
  1349. if (ah->curchan && (old_pos == pos))
  1350. ath9k_hw_getnf(ah, ah->curchan);
  1351. ath9k_cmn_update_ichannel(&sc->sc_ah->channels[pos],
  1352. curchan, conf->channel_type);
  1353. /*
  1354. * If the operating channel changes, change the survey in-use flags
  1355. * along with it.
  1356. * Reset the survey data for the new channel, unless we're switching
  1357. * back to the operating channel from an off-channel operation.
  1358. */
  1359. if (!(hw->conf.flags & IEEE80211_CONF_OFFCHANNEL) &&
  1360. sc->cur_survey != &sc->survey[pos]) {
  1361. if (sc->cur_survey)
  1362. sc->cur_survey->filled &= ~SURVEY_INFO_IN_USE;
  1363. sc->cur_survey = &sc->survey[pos];
  1364. memset(sc->cur_survey, 0, sizeof(struct survey_info));
  1365. sc->cur_survey->filled |= SURVEY_INFO_IN_USE;
  1366. } else if (!(sc->survey[pos].filled & SURVEY_INFO_IN_USE)) {
  1367. memset(&sc->survey[pos], 0, sizeof(struct survey_info));
  1368. }
  1369. if (ath_set_channel(sc, hw, &sc->sc_ah->channels[pos]) < 0) {
  1370. ath_err(common, "Unable to set channel\n");
  1371. mutex_unlock(&sc->mutex);
  1372. return -EINVAL;
  1373. }
  1374. /*
  1375. * The most recent snapshot of channel->noisefloor for the old
  1376. * channel is only available after the hardware reset. Copy it to
  1377. * the survey stats now.
  1378. */
  1379. if (old_pos >= 0)
  1380. ath_update_survey_nf(sc, old_pos);
  1381. }
  1382. if (changed & IEEE80211_CONF_CHANGE_POWER) {
  1383. ath_dbg(common, CONFIG, "Set power: %d\n", conf->power_level);
  1384. sc->config.txpowlimit = 2 * conf->power_level;
  1385. ath9k_cmn_update_txpow(ah, sc->curtxpow,
  1386. sc->config.txpowlimit, &sc->curtxpow);
  1387. }
  1388. mutex_unlock(&sc->mutex);
  1389. ath9k_ps_restore(sc);
  1390. return 0;
  1391. }
  1392. #define SUPPORTED_FILTERS \
  1393. (FIF_PROMISC_IN_BSS | \
  1394. FIF_ALLMULTI | \
  1395. FIF_CONTROL | \
  1396. FIF_PSPOLL | \
  1397. FIF_OTHER_BSS | \
  1398. FIF_BCN_PRBRESP_PROMISC | \
  1399. FIF_PROBE_REQ | \
  1400. FIF_FCSFAIL)
  1401. /* FIXME: sc->sc_full_reset ? */
  1402. static void ath9k_configure_filter(struct ieee80211_hw *hw,
  1403. unsigned int changed_flags,
  1404. unsigned int *total_flags,
  1405. u64 multicast)
  1406. {
  1407. struct ath_softc *sc = hw->priv;
  1408. u32 rfilt;
  1409. changed_flags &= SUPPORTED_FILTERS;
  1410. *total_flags &= SUPPORTED_FILTERS;
  1411. sc->rx.rxfilter = *total_flags;
  1412. ath9k_ps_wakeup(sc);
  1413. rfilt = ath_calcrxfilter(sc);
  1414. ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
  1415. ath9k_ps_restore(sc);
  1416. ath_dbg(ath9k_hw_common(sc->sc_ah), CONFIG, "Set HW RX filter: 0x%x\n",
  1417. rfilt);
  1418. }
  1419. static int ath9k_sta_add(struct ieee80211_hw *hw,
  1420. struct ieee80211_vif *vif,
  1421. struct ieee80211_sta *sta)
  1422. {
  1423. struct ath_softc *sc = hw->priv;
  1424. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1425. struct ath_node *an = (struct ath_node *) sta->drv_priv;
  1426. struct ieee80211_key_conf ps_key = { };
  1427. ath_node_attach(sc, sta, vif);
  1428. if (vif->type != NL80211_IFTYPE_AP &&
  1429. vif->type != NL80211_IFTYPE_AP_VLAN)
  1430. return 0;
  1431. an->ps_key = ath_key_config(common, vif, sta, &ps_key);
  1432. return 0;
  1433. }
  1434. static void ath9k_del_ps_key(struct ath_softc *sc,
  1435. struct ieee80211_vif *vif,
  1436. struct ieee80211_sta *sta)
  1437. {
  1438. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1439. struct ath_node *an = (struct ath_node *) sta->drv_priv;
  1440. struct ieee80211_key_conf ps_key = { .hw_key_idx = an->ps_key };
  1441. if (!an->ps_key)
  1442. return;
  1443. ath_key_delete(common, &ps_key);
  1444. }
  1445. static int ath9k_sta_remove(struct ieee80211_hw *hw,
  1446. struct ieee80211_vif *vif,
  1447. struct ieee80211_sta *sta)
  1448. {
  1449. struct ath_softc *sc = hw->priv;
  1450. ath9k_del_ps_key(sc, vif, sta);
  1451. ath_node_detach(sc, sta);
  1452. return 0;
  1453. }
  1454. static void ath9k_sta_notify(struct ieee80211_hw *hw,
  1455. struct ieee80211_vif *vif,
  1456. enum sta_notify_cmd cmd,
  1457. struct ieee80211_sta *sta)
  1458. {
  1459. struct ath_softc *sc = hw->priv;
  1460. struct ath_node *an = (struct ath_node *) sta->drv_priv;
  1461. if (!(sc->sc_flags & SC_OP_TXAGGR))
  1462. return;
  1463. switch (cmd) {
  1464. case STA_NOTIFY_SLEEP:
  1465. an->sleeping = true;
  1466. ath_tx_aggr_sleep(sta, sc, an);
  1467. break;
  1468. case STA_NOTIFY_AWAKE:
  1469. an->sleeping = false;
  1470. ath_tx_aggr_wakeup(sc, an);
  1471. break;
  1472. }
  1473. }
  1474. static int ath9k_conf_tx(struct ieee80211_hw *hw,
  1475. struct ieee80211_vif *vif, u16 queue,
  1476. const struct ieee80211_tx_queue_params *params)
  1477. {
  1478. struct ath_softc *sc = hw->priv;
  1479. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1480. struct ath_txq *txq;
  1481. struct ath9k_tx_queue_info qi;
  1482. int ret = 0;
  1483. if (queue >= WME_NUM_AC)
  1484. return 0;
  1485. txq = sc->tx.txq_map[queue];
  1486. ath9k_ps_wakeup(sc);
  1487. mutex_lock(&sc->mutex);
  1488. memset(&qi, 0, sizeof(struct ath9k_tx_queue_info));
  1489. qi.tqi_aifs = params->aifs;
  1490. qi.tqi_cwmin = params->cw_min;
  1491. qi.tqi_cwmax = params->cw_max;
  1492. qi.tqi_burstTime = params->txop;
  1493. ath_dbg(common, CONFIG,
  1494. "Configure tx [queue/halq] [%d/%d], aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
  1495. queue, txq->axq_qnum, params->aifs, params->cw_min,
  1496. params->cw_max, params->txop);
  1497. ret = ath_txq_update(sc, txq->axq_qnum, &qi);
  1498. if (ret)
  1499. ath_err(common, "TXQ Update failed\n");
  1500. if (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC)
  1501. if (queue == WME_AC_BE && !ret)
  1502. ath_beaconq_config(sc);
  1503. mutex_unlock(&sc->mutex);
  1504. ath9k_ps_restore(sc);
  1505. return ret;
  1506. }
  1507. static int ath9k_set_key(struct ieee80211_hw *hw,
  1508. enum set_key_cmd cmd,
  1509. struct ieee80211_vif *vif,
  1510. struct ieee80211_sta *sta,
  1511. struct ieee80211_key_conf *key)
  1512. {
  1513. struct ath_softc *sc = hw->priv;
  1514. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1515. int ret = 0;
  1516. if (ath9k_modparam_nohwcrypt)
  1517. return -ENOSPC;
  1518. if ((vif->type == NL80211_IFTYPE_ADHOC ||
  1519. vif->type == NL80211_IFTYPE_MESH_POINT) &&
  1520. (key->cipher == WLAN_CIPHER_SUITE_TKIP ||
  1521. key->cipher == WLAN_CIPHER_SUITE_CCMP) &&
  1522. !(key->flags & IEEE80211_KEY_FLAG_PAIRWISE)) {
  1523. /*
  1524. * For now, disable hw crypto for the RSN IBSS group keys. This
  1525. * could be optimized in the future to use a modified key cache
  1526. * design to support per-STA RX GTK, but until that gets
  1527. * implemented, use of software crypto for group addressed
  1528. * frames is a acceptable to allow RSN IBSS to be used.
  1529. */
  1530. return -EOPNOTSUPP;
  1531. }
  1532. mutex_lock(&sc->mutex);
  1533. ath9k_ps_wakeup(sc);
  1534. ath_dbg(common, CONFIG, "Set HW Key\n");
  1535. switch (cmd) {
  1536. case SET_KEY:
  1537. if (sta)
  1538. ath9k_del_ps_key(sc, vif, sta);
  1539. ret = ath_key_config(common, vif, sta, key);
  1540. if (ret >= 0) {
  1541. key->hw_key_idx = ret;
  1542. /* push IV and Michael MIC generation to stack */
  1543. key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
  1544. if (key->cipher == WLAN_CIPHER_SUITE_TKIP)
  1545. key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
  1546. if (sc->sc_ah->sw_mgmt_crypto &&
  1547. key->cipher == WLAN_CIPHER_SUITE_CCMP)
  1548. key->flags |= IEEE80211_KEY_FLAG_SW_MGMT;
  1549. ret = 0;
  1550. }
  1551. break;
  1552. case DISABLE_KEY:
  1553. ath_key_delete(common, key);
  1554. break;
  1555. default:
  1556. ret = -EINVAL;
  1557. }
  1558. ath9k_ps_restore(sc);
  1559. mutex_unlock(&sc->mutex);
  1560. return ret;
  1561. }
  1562. static void ath9k_bss_iter(void *data, u8 *mac, struct ieee80211_vif *vif)
  1563. {
  1564. struct ath_softc *sc = data;
  1565. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1566. struct ieee80211_bss_conf *bss_conf = &vif->bss_conf;
  1567. struct ath_vif *avp = (void *)vif->drv_priv;
  1568. /*
  1569. * Skip iteration if primary station vif's bss info
  1570. * was not changed
  1571. */
  1572. if (sc->sc_flags & SC_OP_PRIM_STA_VIF)
  1573. return;
  1574. if (bss_conf->assoc) {
  1575. sc->sc_flags |= SC_OP_PRIM_STA_VIF;
  1576. avp->primary_sta_vif = true;
  1577. memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
  1578. common->curaid = bss_conf->aid;
  1579. ath9k_hw_write_associd(sc->sc_ah);
  1580. ath_dbg(common, CONFIG, "Bss Info ASSOC %d, bssid: %pM\n",
  1581. bss_conf->aid, common->curbssid);
  1582. ath_beacon_config(sc, vif);
  1583. /*
  1584. * Request a re-configuration of Beacon related timers
  1585. * on the receipt of the first Beacon frame (i.e.,
  1586. * after time sync with the AP).
  1587. */
  1588. sc->ps_flags |= PS_BEACON_SYNC | PS_WAIT_FOR_BEACON;
  1589. /* Reset rssi stats */
  1590. sc->last_rssi = ATH_RSSI_DUMMY_MARKER;
  1591. sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
  1592. if (!common->disable_ani) {
  1593. sc->sc_flags |= SC_OP_ANI_RUN;
  1594. ath_start_ani(common);
  1595. }
  1596. }
  1597. }
  1598. static void ath9k_config_bss(struct ath_softc *sc, struct ieee80211_vif *vif)
  1599. {
  1600. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1601. struct ieee80211_bss_conf *bss_conf = &vif->bss_conf;
  1602. struct ath_vif *avp = (void *)vif->drv_priv;
  1603. if (sc->sc_ah->opmode != NL80211_IFTYPE_STATION)
  1604. return;
  1605. /* Reconfigure bss info */
  1606. if (avp->primary_sta_vif && !bss_conf->assoc) {
  1607. ath_dbg(common, CONFIG, "Bss Info DISASSOC %d, bssid %pM\n",
  1608. common->curaid, common->curbssid);
  1609. sc->sc_flags &= ~(SC_OP_PRIM_STA_VIF | SC_OP_BEACONS);
  1610. avp->primary_sta_vif = false;
  1611. memset(common->curbssid, 0, ETH_ALEN);
  1612. common->curaid = 0;
  1613. }
  1614. ieee80211_iterate_active_interfaces_atomic(
  1615. sc->hw, ath9k_bss_iter, sc);
  1616. /*
  1617. * None of station vifs are associated.
  1618. * Clear bssid & aid
  1619. */
  1620. if (!(sc->sc_flags & SC_OP_PRIM_STA_VIF)) {
  1621. ath9k_hw_write_associd(sc->sc_ah);
  1622. /* Stop ANI */
  1623. sc->sc_flags &= ~SC_OP_ANI_RUN;
  1624. del_timer_sync(&common->ani.timer);
  1625. memset(&sc->caldata, 0, sizeof(sc->caldata));
  1626. }
  1627. }
  1628. static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
  1629. struct ieee80211_vif *vif,
  1630. struct ieee80211_bss_conf *bss_conf,
  1631. u32 changed)
  1632. {
  1633. struct ath_softc *sc = hw->priv;
  1634. struct ath_hw *ah = sc->sc_ah;
  1635. struct ath_common *common = ath9k_hw_common(ah);
  1636. struct ath_vif *avp = (void *)vif->drv_priv;
  1637. int slottime;
  1638. int error;
  1639. ath9k_ps_wakeup(sc);
  1640. mutex_lock(&sc->mutex);
  1641. if (changed & BSS_CHANGED_BSSID) {
  1642. ath9k_config_bss(sc, vif);
  1643. ath_dbg(common, CONFIG, "BSSID: %pM aid: 0x%x\n",
  1644. common->curbssid, common->curaid);
  1645. }
  1646. if (changed & BSS_CHANGED_IBSS) {
  1647. /* There can be only one vif available */
  1648. memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
  1649. common->curaid = bss_conf->aid;
  1650. ath9k_hw_write_associd(sc->sc_ah);
  1651. if (bss_conf->ibss_joined) {
  1652. sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
  1653. if (!common->disable_ani) {
  1654. sc->sc_flags |= SC_OP_ANI_RUN;
  1655. ath_start_ani(common);
  1656. }
  1657. } else {
  1658. sc->sc_flags &= ~SC_OP_ANI_RUN;
  1659. del_timer_sync(&common->ani.timer);
  1660. }
  1661. }
  1662. /* Enable transmission of beacons (AP, IBSS, MESH) */
  1663. if ((changed & BSS_CHANGED_BEACON) ||
  1664. ((changed & BSS_CHANGED_BEACON_ENABLED) && bss_conf->enable_beacon)) {
  1665. ath9k_set_beaconing_status(sc, false);
  1666. error = ath_beacon_alloc(sc, vif);
  1667. if (!error)
  1668. ath_beacon_config(sc, vif);
  1669. ath9k_set_beaconing_status(sc, true);
  1670. }
  1671. if (changed & BSS_CHANGED_ERP_SLOT) {
  1672. if (bss_conf->use_short_slot)
  1673. slottime = 9;
  1674. else
  1675. slottime = 20;
  1676. if (vif->type == NL80211_IFTYPE_AP) {
  1677. /*
  1678. * Defer update, so that connected stations can adjust
  1679. * their settings at the same time.
  1680. * See beacon.c for more details
  1681. */
  1682. sc->beacon.slottime = slottime;
  1683. sc->beacon.updateslot = UPDATE;
  1684. } else {
  1685. ah->slottime = slottime;
  1686. ath9k_hw_init_global_settings(ah);
  1687. }
  1688. }
  1689. /* Disable transmission of beacons */
  1690. if ((changed & BSS_CHANGED_BEACON_ENABLED) &&
  1691. !bss_conf->enable_beacon) {
  1692. ath9k_set_beaconing_status(sc, false);
  1693. avp->is_bslot_active = false;
  1694. ath9k_set_beaconing_status(sc, true);
  1695. }
  1696. if (changed & BSS_CHANGED_BEACON_INT) {
  1697. /*
  1698. * In case of AP mode, the HW TSF has to be reset
  1699. * when the beacon interval changes.
  1700. */
  1701. if (vif->type == NL80211_IFTYPE_AP) {
  1702. sc->sc_flags |= SC_OP_TSF_RESET;
  1703. ath9k_set_beaconing_status(sc, false);
  1704. error = ath_beacon_alloc(sc, vif);
  1705. if (!error)
  1706. ath_beacon_config(sc, vif);
  1707. ath9k_set_beaconing_status(sc, true);
  1708. } else
  1709. ath_beacon_config(sc, vif);
  1710. }
  1711. if (changed & BSS_CHANGED_ERP_PREAMBLE) {
  1712. ath_dbg(common, CONFIG, "BSS Changed PREAMBLE %d\n",
  1713. bss_conf->use_short_preamble);
  1714. if (bss_conf->use_short_preamble)
  1715. sc->sc_flags |= SC_OP_PREAMBLE_SHORT;
  1716. else
  1717. sc->sc_flags &= ~SC_OP_PREAMBLE_SHORT;
  1718. }
  1719. if (changed & BSS_CHANGED_ERP_CTS_PROT) {
  1720. ath_dbg(common, CONFIG, "BSS Changed CTS PROT %d\n",
  1721. bss_conf->use_cts_prot);
  1722. if (bss_conf->use_cts_prot &&
  1723. hw->conf.channel->band != IEEE80211_BAND_5GHZ)
  1724. sc->sc_flags |= SC_OP_PROTECT_ENABLE;
  1725. else
  1726. sc->sc_flags &= ~SC_OP_PROTECT_ENABLE;
  1727. }
  1728. mutex_unlock(&sc->mutex);
  1729. ath9k_ps_restore(sc);
  1730. }
  1731. static u64 ath9k_get_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
  1732. {
  1733. struct ath_softc *sc = hw->priv;
  1734. u64 tsf;
  1735. mutex_lock(&sc->mutex);
  1736. ath9k_ps_wakeup(sc);
  1737. tsf = ath9k_hw_gettsf64(sc->sc_ah);
  1738. ath9k_ps_restore(sc);
  1739. mutex_unlock(&sc->mutex);
  1740. return tsf;
  1741. }
  1742. static void ath9k_set_tsf(struct ieee80211_hw *hw,
  1743. struct ieee80211_vif *vif,
  1744. u64 tsf)
  1745. {
  1746. struct ath_softc *sc = hw->priv;
  1747. mutex_lock(&sc->mutex);
  1748. ath9k_ps_wakeup(sc);
  1749. ath9k_hw_settsf64(sc->sc_ah, tsf);
  1750. ath9k_ps_restore(sc);
  1751. mutex_unlock(&sc->mutex);
  1752. }
  1753. static void ath9k_reset_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
  1754. {
  1755. struct ath_softc *sc = hw->priv;
  1756. mutex_lock(&sc->mutex);
  1757. ath9k_ps_wakeup(sc);
  1758. ath9k_hw_reset_tsf(sc->sc_ah);
  1759. ath9k_ps_restore(sc);
  1760. mutex_unlock(&sc->mutex);
  1761. }
  1762. static int ath9k_ampdu_action(struct ieee80211_hw *hw,
  1763. struct ieee80211_vif *vif,
  1764. enum ieee80211_ampdu_mlme_action action,
  1765. struct ieee80211_sta *sta,
  1766. u16 tid, u16 *ssn, u8 buf_size)
  1767. {
  1768. struct ath_softc *sc = hw->priv;
  1769. int ret = 0;
  1770. local_bh_disable();
  1771. switch (action) {
  1772. case IEEE80211_AMPDU_RX_START:
  1773. if (!(sc->sc_flags & SC_OP_RXAGGR))
  1774. ret = -ENOTSUPP;
  1775. break;
  1776. case IEEE80211_AMPDU_RX_STOP:
  1777. break;
  1778. case IEEE80211_AMPDU_TX_START:
  1779. if (!(sc->sc_flags & SC_OP_TXAGGR))
  1780. return -EOPNOTSUPP;
  1781. ath9k_ps_wakeup(sc);
  1782. ret = ath_tx_aggr_start(sc, sta, tid, ssn);
  1783. if (!ret)
  1784. ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid);
  1785. ath9k_ps_restore(sc);
  1786. break;
  1787. case IEEE80211_AMPDU_TX_STOP:
  1788. ath9k_ps_wakeup(sc);
  1789. ath_tx_aggr_stop(sc, sta, tid);
  1790. ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
  1791. ath9k_ps_restore(sc);
  1792. break;
  1793. case IEEE80211_AMPDU_TX_OPERATIONAL:
  1794. ath9k_ps_wakeup(sc);
  1795. ath_tx_aggr_resume(sc, sta, tid);
  1796. ath9k_ps_restore(sc);
  1797. break;
  1798. default:
  1799. ath_err(ath9k_hw_common(sc->sc_ah), "Unknown AMPDU action\n");
  1800. }
  1801. local_bh_enable();
  1802. return ret;
  1803. }
  1804. static int ath9k_get_survey(struct ieee80211_hw *hw, int idx,
  1805. struct survey_info *survey)
  1806. {
  1807. struct ath_softc *sc = hw->priv;
  1808. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1809. struct ieee80211_supported_band *sband;
  1810. struct ieee80211_channel *chan;
  1811. unsigned long flags;
  1812. int pos;
  1813. spin_lock_irqsave(&common->cc_lock, flags);
  1814. if (idx == 0)
  1815. ath_update_survey_stats(sc);
  1816. sband = hw->wiphy->bands[IEEE80211_BAND_2GHZ];
  1817. if (sband && idx >= sband->n_channels) {
  1818. idx -= sband->n_channels;
  1819. sband = NULL;
  1820. }
  1821. if (!sband)
  1822. sband = hw->wiphy->bands[IEEE80211_BAND_5GHZ];
  1823. if (!sband || idx >= sband->n_channels) {
  1824. spin_unlock_irqrestore(&common->cc_lock, flags);
  1825. return -ENOENT;
  1826. }
  1827. chan = &sband->channels[idx];
  1828. pos = chan->hw_value;
  1829. memcpy(survey, &sc->survey[pos], sizeof(*survey));
  1830. survey->channel = chan;
  1831. spin_unlock_irqrestore(&common->cc_lock, flags);
  1832. return 0;
  1833. }
  1834. static void ath9k_set_coverage_class(struct ieee80211_hw *hw, u8 coverage_class)
  1835. {
  1836. struct ath_softc *sc = hw->priv;
  1837. struct ath_hw *ah = sc->sc_ah;
  1838. mutex_lock(&sc->mutex);
  1839. ah->coverage_class = coverage_class;
  1840. ath9k_ps_wakeup(sc);
  1841. ath9k_hw_init_global_settings(ah);
  1842. ath9k_ps_restore(sc);
  1843. mutex_unlock(&sc->mutex);
  1844. }
  1845. static void ath9k_flush(struct ieee80211_hw *hw, bool drop)
  1846. {
  1847. struct ath_softc *sc = hw->priv;
  1848. struct ath_hw *ah = sc->sc_ah;
  1849. struct ath_common *common = ath9k_hw_common(ah);
  1850. int timeout = 200; /* ms */
  1851. int i, j;
  1852. bool drain_txq;
  1853. mutex_lock(&sc->mutex);
  1854. cancel_delayed_work_sync(&sc->tx_complete_work);
  1855. if (ah->ah_flags & AH_UNPLUGGED) {
  1856. ath_dbg(common, ANY, "Device has been unplugged!\n");
  1857. mutex_unlock(&sc->mutex);
  1858. return;
  1859. }
  1860. if (sc->sc_flags & SC_OP_INVALID) {
  1861. ath_dbg(common, ANY, "Device not present\n");
  1862. mutex_unlock(&sc->mutex);
  1863. return;
  1864. }
  1865. for (j = 0; j < timeout; j++) {
  1866. bool npend = false;
  1867. if (j)
  1868. usleep_range(1000, 2000);
  1869. for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
  1870. if (!ATH_TXQ_SETUP(sc, i))
  1871. continue;
  1872. npend = ath9k_has_pending_frames(sc, &sc->tx.txq[i]);
  1873. if (npend)
  1874. break;
  1875. }
  1876. if (!npend)
  1877. break;
  1878. }
  1879. if (drop) {
  1880. ath9k_ps_wakeup(sc);
  1881. spin_lock_bh(&sc->sc_pcu_lock);
  1882. drain_txq = ath_drain_all_txq(sc, false);
  1883. spin_unlock_bh(&sc->sc_pcu_lock);
  1884. if (!drain_txq)
  1885. ath_reset(sc, false);
  1886. ath9k_ps_restore(sc);
  1887. ieee80211_wake_queues(hw);
  1888. }
  1889. ieee80211_queue_delayed_work(hw, &sc->tx_complete_work, 0);
  1890. mutex_unlock(&sc->mutex);
  1891. }
  1892. static bool ath9k_tx_frames_pending(struct ieee80211_hw *hw)
  1893. {
  1894. struct ath_softc *sc = hw->priv;
  1895. int i;
  1896. for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
  1897. if (!ATH_TXQ_SETUP(sc, i))
  1898. continue;
  1899. if (ath9k_has_pending_frames(sc, &sc->tx.txq[i]))
  1900. return true;
  1901. }
  1902. return false;
  1903. }
  1904. static int ath9k_tx_last_beacon(struct ieee80211_hw *hw)
  1905. {
  1906. struct ath_softc *sc = hw->priv;
  1907. struct ath_hw *ah = sc->sc_ah;
  1908. struct ieee80211_vif *vif;
  1909. struct ath_vif *avp;
  1910. struct ath_buf *bf;
  1911. struct ath_tx_status ts;
  1912. int status;
  1913. vif = sc->beacon.bslot[0];
  1914. if (!vif)
  1915. return 0;
  1916. avp = (void *)vif->drv_priv;
  1917. if (!avp->is_bslot_active)
  1918. return 0;
  1919. if (!sc->beacon.tx_processed) {
  1920. tasklet_disable(&sc->bcon_tasklet);
  1921. bf = avp->av_bcbuf;
  1922. if (!bf || !bf->bf_mpdu)
  1923. goto skip;
  1924. status = ath9k_hw_txprocdesc(ah, bf->bf_desc, &ts);
  1925. if (status == -EINPROGRESS)
  1926. goto skip;
  1927. sc->beacon.tx_processed = true;
  1928. sc->beacon.tx_last = !(ts.ts_status & ATH9K_TXERR_MASK);
  1929. skip:
  1930. tasklet_enable(&sc->bcon_tasklet);
  1931. }
  1932. return sc->beacon.tx_last;
  1933. }
  1934. static int ath9k_get_stats(struct ieee80211_hw *hw,
  1935. struct ieee80211_low_level_stats *stats)
  1936. {
  1937. struct ath_softc *sc = hw->priv;
  1938. struct ath_hw *ah = sc->sc_ah;
  1939. struct ath9k_mib_stats *mib_stats = &ah->ah_mibStats;
  1940. stats->dot11ACKFailureCount = mib_stats->ackrcv_bad;
  1941. stats->dot11RTSFailureCount = mib_stats->rts_bad;
  1942. stats->dot11FCSErrorCount = mib_stats->fcs_bad;
  1943. stats->dot11RTSSuccessCount = mib_stats->rts_good;
  1944. return 0;
  1945. }
  1946. static u32 fill_chainmask(u32 cap, u32 new)
  1947. {
  1948. u32 filled = 0;
  1949. int i;
  1950. for (i = 0; cap && new; i++, cap >>= 1) {
  1951. if (!(cap & BIT(0)))
  1952. continue;
  1953. if (new & BIT(0))
  1954. filled |= BIT(i);
  1955. new >>= 1;
  1956. }
  1957. return filled;
  1958. }
  1959. static int ath9k_set_antenna(struct ieee80211_hw *hw, u32 tx_ant, u32 rx_ant)
  1960. {
  1961. struct ath_softc *sc = hw->priv;
  1962. struct ath_hw *ah = sc->sc_ah;
  1963. if (!rx_ant || !tx_ant)
  1964. return -EINVAL;
  1965. sc->ant_rx = rx_ant;
  1966. sc->ant_tx = tx_ant;
  1967. if (ah->caps.rx_chainmask == 1)
  1968. return 0;
  1969. /* AR9100 runs into calibration issues if not all rx chains are enabled */
  1970. if (AR_SREV_9100(ah))
  1971. ah->rxchainmask = 0x7;
  1972. else
  1973. ah->rxchainmask = fill_chainmask(ah->caps.rx_chainmask, rx_ant);
  1974. ah->txchainmask = fill_chainmask(ah->caps.tx_chainmask, tx_ant);
  1975. ath9k_reload_chainmask_settings(sc);
  1976. return 0;
  1977. }
  1978. static int ath9k_get_antenna(struct ieee80211_hw *hw, u32 *tx_ant, u32 *rx_ant)
  1979. {
  1980. struct ath_softc *sc = hw->priv;
  1981. *tx_ant = sc->ant_tx;
  1982. *rx_ant = sc->ant_rx;
  1983. return 0;
  1984. }
  1985. struct ieee80211_ops ath9k_ops = {
  1986. .tx = ath9k_tx,
  1987. .start = ath9k_start,
  1988. .stop = ath9k_stop,
  1989. .add_interface = ath9k_add_interface,
  1990. .change_interface = ath9k_change_interface,
  1991. .remove_interface = ath9k_remove_interface,
  1992. .config = ath9k_config,
  1993. .configure_filter = ath9k_configure_filter,
  1994. .sta_add = ath9k_sta_add,
  1995. .sta_remove = ath9k_sta_remove,
  1996. .sta_notify = ath9k_sta_notify,
  1997. .conf_tx = ath9k_conf_tx,
  1998. .bss_info_changed = ath9k_bss_info_changed,
  1999. .set_key = ath9k_set_key,
  2000. .get_tsf = ath9k_get_tsf,
  2001. .set_tsf = ath9k_set_tsf,
  2002. .reset_tsf = ath9k_reset_tsf,
  2003. .ampdu_action = ath9k_ampdu_action,
  2004. .get_survey = ath9k_get_survey,
  2005. .rfkill_poll = ath9k_rfkill_poll_state,
  2006. .set_coverage_class = ath9k_set_coverage_class,
  2007. .flush = ath9k_flush,
  2008. .tx_frames_pending = ath9k_tx_frames_pending,
  2009. .tx_last_beacon = ath9k_tx_last_beacon,
  2010. .get_stats = ath9k_get_stats,
  2011. .set_antenna = ath9k_set_antenna,
  2012. .get_antenna = ath9k_get_antenna,
  2013. };