init.c 43 KB

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  1. /*
  2. * Copyright (c) 2011 Atheros Communications Inc.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for any
  5. * purpose with or without fee is hereby granted, provided that the above
  6. * copyright notice and this permission notice appear in all copies.
  7. *
  8. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  9. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15. */
  16. #include <linux/moduleparam.h>
  17. #include <linux/errno.h>
  18. #include <linux/of.h>
  19. #include <linux/mmc/sdio_func.h>
  20. #include "core.h"
  21. #include "cfg80211.h"
  22. #include "target.h"
  23. #include "debug.h"
  24. #include "hif-ops.h"
  25. unsigned int debug_mask;
  26. static unsigned int testmode;
  27. static bool suspend_cutpower;
  28. module_param(debug_mask, uint, 0644);
  29. module_param(testmode, uint, 0644);
  30. module_param(suspend_cutpower, bool, 0444);
  31. static const struct ath6kl_hw hw_list[] = {
  32. {
  33. .id = AR6003_HW_2_0_VERSION,
  34. .name = "ar6003 hw 2.0",
  35. .dataset_patch_addr = 0x57e884,
  36. .app_load_addr = 0x543180,
  37. .board_ext_data_addr = 0x57e500,
  38. .reserved_ram_size = 6912,
  39. .refclk_hz = 26000000,
  40. .uarttx_pin = 8,
  41. /* hw2.0 needs override address hardcoded */
  42. .app_start_override_addr = 0x944C00,
  43. .fw_otp = AR6003_HW_2_0_OTP_FILE,
  44. .fw = AR6003_HW_2_0_FIRMWARE_FILE,
  45. .fw_tcmd = AR6003_HW_2_0_TCMD_FIRMWARE_FILE,
  46. .fw_patch = AR6003_HW_2_0_PATCH_FILE,
  47. .fw_api2 = AR6003_HW_2_0_FIRMWARE_2_FILE,
  48. .fw_board = AR6003_HW_2_0_BOARD_DATA_FILE,
  49. .fw_default_board = AR6003_HW_2_0_DEFAULT_BOARD_DATA_FILE,
  50. },
  51. {
  52. .id = AR6003_HW_2_1_1_VERSION,
  53. .name = "ar6003 hw 2.1.1",
  54. .dataset_patch_addr = 0x57ff74,
  55. .app_load_addr = 0x1234,
  56. .board_ext_data_addr = 0x542330,
  57. .reserved_ram_size = 512,
  58. .refclk_hz = 26000000,
  59. .uarttx_pin = 8,
  60. .fw_otp = AR6003_HW_2_1_1_OTP_FILE,
  61. .fw = AR6003_HW_2_1_1_FIRMWARE_FILE,
  62. .fw_tcmd = AR6003_HW_2_1_1_TCMD_FIRMWARE_FILE,
  63. .fw_patch = AR6003_HW_2_1_1_PATCH_FILE,
  64. .fw_api2 = AR6003_HW_2_1_1_FIRMWARE_2_FILE,
  65. .fw_board = AR6003_HW_2_1_1_BOARD_DATA_FILE,
  66. .fw_default_board = AR6003_HW_2_1_1_DEFAULT_BOARD_DATA_FILE,
  67. },
  68. {
  69. .id = AR6004_HW_1_0_VERSION,
  70. .name = "ar6004 hw 1.0",
  71. .dataset_patch_addr = 0x57e884,
  72. .app_load_addr = 0x1234,
  73. .board_ext_data_addr = 0x437000,
  74. .reserved_ram_size = 19456,
  75. .board_addr = 0x433900,
  76. .refclk_hz = 26000000,
  77. .uarttx_pin = 11,
  78. .fw = AR6004_HW_1_0_FIRMWARE_FILE,
  79. .fw_api2 = AR6004_HW_1_0_FIRMWARE_2_FILE,
  80. .fw_board = AR6004_HW_1_0_BOARD_DATA_FILE,
  81. .fw_default_board = AR6004_HW_1_0_DEFAULT_BOARD_DATA_FILE,
  82. },
  83. {
  84. .id = AR6004_HW_1_1_VERSION,
  85. .name = "ar6004 hw 1.1",
  86. .dataset_patch_addr = 0x57e884,
  87. .app_load_addr = 0x1234,
  88. .board_ext_data_addr = 0x437000,
  89. .reserved_ram_size = 11264,
  90. .board_addr = 0x43d400,
  91. .refclk_hz = 40000000,
  92. .uarttx_pin = 11,
  93. .fw = AR6004_HW_1_1_FIRMWARE_FILE,
  94. .fw_api2 = AR6004_HW_1_1_FIRMWARE_2_FILE,
  95. .fw_board = AR6004_HW_1_1_BOARD_DATA_FILE,
  96. .fw_default_board = AR6004_HW_1_1_DEFAULT_BOARD_DATA_FILE,
  97. },
  98. };
  99. /*
  100. * Include definitions here that can be used to tune the WLAN module
  101. * behavior. Different customers can tune the behavior as per their needs,
  102. * here.
  103. */
  104. /*
  105. * This configuration item enable/disable keepalive support.
  106. * Keepalive support: In the absence of any data traffic to AP, null
  107. * frames will be sent to the AP at periodic interval, to keep the association
  108. * active. This configuration item defines the periodic interval.
  109. * Use value of zero to disable keepalive support
  110. * Default: 60 seconds
  111. */
  112. #define WLAN_CONFIG_KEEP_ALIVE_INTERVAL 60
  113. /*
  114. * This configuration item sets the value of disconnect timeout
  115. * Firmware delays sending the disconnec event to the host for this
  116. * timeout after is gets disconnected from the current AP.
  117. * If the firmware successly roams within the disconnect timeout
  118. * it sends a new connect event
  119. */
  120. #define WLAN_CONFIG_DISCONNECT_TIMEOUT 10
  121. #define ATH6KL_DATA_OFFSET 64
  122. struct sk_buff *ath6kl_buf_alloc(int size)
  123. {
  124. struct sk_buff *skb;
  125. u16 reserved;
  126. /* Add chacheline space at front and back of buffer */
  127. reserved = (2 * L1_CACHE_BYTES) + ATH6KL_DATA_OFFSET +
  128. sizeof(struct htc_packet) + ATH6KL_HTC_ALIGN_BYTES;
  129. skb = dev_alloc_skb(size + reserved);
  130. if (skb)
  131. skb_reserve(skb, reserved - L1_CACHE_BYTES);
  132. return skb;
  133. }
  134. void ath6kl_init_profile_info(struct ath6kl_vif *vif)
  135. {
  136. vif->ssid_len = 0;
  137. memset(vif->ssid, 0, sizeof(vif->ssid));
  138. vif->dot11_auth_mode = OPEN_AUTH;
  139. vif->auth_mode = NONE_AUTH;
  140. vif->prwise_crypto = NONE_CRYPT;
  141. vif->prwise_crypto_len = 0;
  142. vif->grp_crypto = NONE_CRYPT;
  143. vif->grp_crypto_len = 0;
  144. memset(vif->wep_key_list, 0, sizeof(vif->wep_key_list));
  145. memset(vif->req_bssid, 0, sizeof(vif->req_bssid));
  146. memset(vif->bssid, 0, sizeof(vif->bssid));
  147. vif->bss_ch = 0;
  148. }
  149. static int ath6kl_set_host_app_area(struct ath6kl *ar)
  150. {
  151. u32 address, data;
  152. struct host_app_area host_app_area;
  153. /* Fetch the address of the host_app_area_s
  154. * instance in the host interest area */
  155. address = ath6kl_get_hi_item_addr(ar, HI_ITEM(hi_app_host_interest));
  156. address = TARG_VTOP(ar->target_type, address);
  157. if (ath6kl_diag_read32(ar, address, &data))
  158. return -EIO;
  159. address = TARG_VTOP(ar->target_type, data);
  160. host_app_area.wmi_protocol_ver = cpu_to_le32(WMI_PROTOCOL_VERSION);
  161. if (ath6kl_diag_write(ar, address, (u8 *) &host_app_area,
  162. sizeof(struct host_app_area)))
  163. return -EIO;
  164. return 0;
  165. }
  166. static inline void set_ac2_ep_map(struct ath6kl *ar,
  167. u8 ac,
  168. enum htc_endpoint_id ep)
  169. {
  170. ar->ac2ep_map[ac] = ep;
  171. ar->ep2ac_map[ep] = ac;
  172. }
  173. /* connect to a service */
  174. static int ath6kl_connectservice(struct ath6kl *ar,
  175. struct htc_service_connect_req *con_req,
  176. char *desc)
  177. {
  178. int status;
  179. struct htc_service_connect_resp response;
  180. memset(&response, 0, sizeof(response));
  181. status = ath6kl_htc_conn_service(ar->htc_target, con_req, &response);
  182. if (status) {
  183. ath6kl_err("failed to connect to %s service status:%d\n",
  184. desc, status);
  185. return status;
  186. }
  187. switch (con_req->svc_id) {
  188. case WMI_CONTROL_SVC:
  189. if (test_bit(WMI_ENABLED, &ar->flag))
  190. ath6kl_wmi_set_control_ep(ar->wmi, response.endpoint);
  191. ar->ctrl_ep = response.endpoint;
  192. break;
  193. case WMI_DATA_BE_SVC:
  194. set_ac2_ep_map(ar, WMM_AC_BE, response.endpoint);
  195. break;
  196. case WMI_DATA_BK_SVC:
  197. set_ac2_ep_map(ar, WMM_AC_BK, response.endpoint);
  198. break;
  199. case WMI_DATA_VI_SVC:
  200. set_ac2_ep_map(ar, WMM_AC_VI, response.endpoint);
  201. break;
  202. case WMI_DATA_VO_SVC:
  203. set_ac2_ep_map(ar, WMM_AC_VO, response.endpoint);
  204. break;
  205. default:
  206. ath6kl_err("service id is not mapped %d\n", con_req->svc_id);
  207. return -EINVAL;
  208. }
  209. return 0;
  210. }
  211. static int ath6kl_init_service_ep(struct ath6kl *ar)
  212. {
  213. struct htc_service_connect_req connect;
  214. memset(&connect, 0, sizeof(connect));
  215. /* these fields are the same for all service endpoints */
  216. connect.ep_cb.rx = ath6kl_rx;
  217. connect.ep_cb.rx_refill = ath6kl_rx_refill;
  218. connect.ep_cb.tx_full = ath6kl_tx_queue_full;
  219. /*
  220. * Set the max queue depth so that our ath6kl_tx_queue_full handler
  221. * gets called.
  222. */
  223. connect.max_txq_depth = MAX_DEFAULT_SEND_QUEUE_DEPTH;
  224. connect.ep_cb.rx_refill_thresh = ATH6KL_MAX_RX_BUFFERS / 4;
  225. if (!connect.ep_cb.rx_refill_thresh)
  226. connect.ep_cb.rx_refill_thresh++;
  227. /* connect to control service */
  228. connect.svc_id = WMI_CONTROL_SVC;
  229. if (ath6kl_connectservice(ar, &connect, "WMI CONTROL"))
  230. return -EIO;
  231. connect.flags |= HTC_FLGS_TX_BNDL_PAD_EN;
  232. /*
  233. * Limit the HTC message size on the send path, although e can
  234. * receive A-MSDU frames of 4K, we will only send ethernet-sized
  235. * (802.3) frames on the send path.
  236. */
  237. connect.max_rxmsg_sz = WMI_MAX_TX_DATA_FRAME_LENGTH;
  238. /*
  239. * To reduce the amount of committed memory for larger A_MSDU
  240. * frames, use the recv-alloc threshold mechanism for larger
  241. * packets.
  242. */
  243. connect.ep_cb.rx_alloc_thresh = ATH6KL_BUFFER_SIZE;
  244. connect.ep_cb.rx_allocthresh = ath6kl_alloc_amsdu_rxbuf;
  245. /*
  246. * For the remaining data services set the connection flag to
  247. * reduce dribbling, if configured to do so.
  248. */
  249. connect.conn_flags |= HTC_CONN_FLGS_REDUCE_CRED_DRIB;
  250. connect.conn_flags &= ~HTC_CONN_FLGS_THRESH_MASK;
  251. connect.conn_flags |= HTC_CONN_FLGS_THRESH_LVL_HALF;
  252. connect.svc_id = WMI_DATA_BE_SVC;
  253. if (ath6kl_connectservice(ar, &connect, "WMI DATA BE"))
  254. return -EIO;
  255. /* connect to back-ground map this to WMI LOW_PRI */
  256. connect.svc_id = WMI_DATA_BK_SVC;
  257. if (ath6kl_connectservice(ar, &connect, "WMI DATA BK"))
  258. return -EIO;
  259. /* connect to Video service, map this to to HI PRI */
  260. connect.svc_id = WMI_DATA_VI_SVC;
  261. if (ath6kl_connectservice(ar, &connect, "WMI DATA VI"))
  262. return -EIO;
  263. /*
  264. * Connect to VO service, this is currently not mapped to a WMI
  265. * priority stream due to historical reasons. WMI originally
  266. * defined 3 priorities over 3 mailboxes We can change this when
  267. * WMI is reworked so that priorities are not dependent on
  268. * mailboxes.
  269. */
  270. connect.svc_id = WMI_DATA_VO_SVC;
  271. if (ath6kl_connectservice(ar, &connect, "WMI DATA VO"))
  272. return -EIO;
  273. return 0;
  274. }
  275. void ath6kl_init_control_info(struct ath6kl_vif *vif)
  276. {
  277. ath6kl_init_profile_info(vif);
  278. vif->def_txkey_index = 0;
  279. memset(vif->wep_key_list, 0, sizeof(vif->wep_key_list));
  280. vif->ch_hint = 0;
  281. }
  282. /*
  283. * Set HTC/Mbox operational parameters, this can only be called when the
  284. * target is in the BMI phase.
  285. */
  286. static int ath6kl_set_htc_params(struct ath6kl *ar, u32 mbox_isr_yield_val,
  287. u8 htc_ctrl_buf)
  288. {
  289. int status;
  290. u32 blk_size;
  291. blk_size = ar->mbox_info.block_size;
  292. if (htc_ctrl_buf)
  293. blk_size |= ((u32)htc_ctrl_buf) << 16;
  294. /* set the host interest area for the block size */
  295. status = ath6kl_bmi_write(ar,
  296. ath6kl_get_hi_item_addr(ar,
  297. HI_ITEM(hi_mbox_io_block_sz)),
  298. (u8 *)&blk_size,
  299. 4);
  300. if (status) {
  301. ath6kl_err("bmi_write_memory for IO block size failed\n");
  302. goto out;
  303. }
  304. ath6kl_dbg(ATH6KL_DBG_TRC, "block size set: %d (target addr:0x%X)\n",
  305. blk_size,
  306. ath6kl_get_hi_item_addr(ar, HI_ITEM(hi_mbox_io_block_sz)));
  307. if (mbox_isr_yield_val) {
  308. /* set the host interest area for the mbox ISR yield limit */
  309. status = ath6kl_bmi_write(ar,
  310. ath6kl_get_hi_item_addr(ar,
  311. HI_ITEM(hi_mbox_isr_yield_limit)),
  312. (u8 *)&mbox_isr_yield_val,
  313. 4);
  314. if (status) {
  315. ath6kl_err("bmi_write_memory for yield limit failed\n");
  316. goto out;
  317. }
  318. }
  319. out:
  320. return status;
  321. }
  322. static int ath6kl_target_config_wlan_params(struct ath6kl *ar, int idx)
  323. {
  324. int status = 0;
  325. int ret;
  326. /*
  327. * Configure the device for rx dot11 header rules. "0,0" are the
  328. * default values. Required if checksum offload is needed. Set
  329. * RxMetaVersion to 2.
  330. */
  331. if (ath6kl_wmi_set_rx_frame_format_cmd(ar->wmi, idx,
  332. ar->rx_meta_ver, 0, 0)) {
  333. ath6kl_err("unable to set the rx frame format\n");
  334. status = -EIO;
  335. }
  336. if (ar->conf_flags & ATH6KL_CONF_IGNORE_PS_FAIL_EVT_IN_SCAN)
  337. if ((ath6kl_wmi_pmparams_cmd(ar->wmi, idx, 0, 1, 0, 0, 1,
  338. IGNORE_POWER_SAVE_FAIL_EVENT_DURING_SCAN)) != 0) {
  339. ath6kl_err("unable to set power save fail event policy\n");
  340. status = -EIO;
  341. }
  342. if (!(ar->conf_flags & ATH6KL_CONF_IGNORE_ERP_BARKER))
  343. if ((ath6kl_wmi_set_lpreamble_cmd(ar->wmi, idx, 0,
  344. WMI_DONOT_IGNORE_BARKER_IN_ERP)) != 0) {
  345. ath6kl_err("unable to set barker preamble policy\n");
  346. status = -EIO;
  347. }
  348. if (ath6kl_wmi_set_keepalive_cmd(ar->wmi, idx,
  349. WLAN_CONFIG_KEEP_ALIVE_INTERVAL)) {
  350. ath6kl_err("unable to set keep alive interval\n");
  351. status = -EIO;
  352. }
  353. if (ath6kl_wmi_disctimeout_cmd(ar->wmi, idx,
  354. WLAN_CONFIG_DISCONNECT_TIMEOUT)) {
  355. ath6kl_err("unable to set disconnect timeout\n");
  356. status = -EIO;
  357. }
  358. if (!(ar->conf_flags & ATH6KL_CONF_ENABLE_TX_BURST))
  359. if (ath6kl_wmi_set_wmm_txop(ar->wmi, idx, WMI_TXOP_DISABLED)) {
  360. ath6kl_err("unable to set txop bursting\n");
  361. status = -EIO;
  362. }
  363. if (ar->p2p && (ar->vif_max == 1 || idx)) {
  364. ret = ath6kl_wmi_info_req_cmd(ar->wmi, idx,
  365. P2P_FLAG_CAPABILITIES_REQ |
  366. P2P_FLAG_MACADDR_REQ |
  367. P2P_FLAG_HMODEL_REQ);
  368. if (ret) {
  369. ath6kl_dbg(ATH6KL_DBG_TRC, "failed to request P2P "
  370. "capabilities (%d) - assuming P2P not "
  371. "supported\n", ret);
  372. ar->p2p = false;
  373. }
  374. }
  375. if (ar->p2p && (ar->vif_max == 1 || idx)) {
  376. /* Enable Probe Request reporting for P2P */
  377. ret = ath6kl_wmi_probe_report_req_cmd(ar->wmi, idx, true);
  378. if (ret) {
  379. ath6kl_dbg(ATH6KL_DBG_TRC, "failed to enable Probe "
  380. "Request reporting (%d)\n", ret);
  381. }
  382. }
  383. return status;
  384. }
  385. int ath6kl_configure_target(struct ath6kl *ar)
  386. {
  387. u32 param, ram_reserved_size;
  388. u8 fw_iftype, fw_mode = 0, fw_submode = 0;
  389. int i, status;
  390. /*
  391. * Note: Even though the firmware interface type is
  392. * chosen as BSS_STA for all three interfaces, can
  393. * be configured to IBSS/AP as long as the fw submode
  394. * remains normal mode (0 - AP, STA and IBSS). But
  395. * due to an target assert in firmware only one interface is
  396. * configured for now.
  397. */
  398. fw_iftype = HI_OPTION_FW_MODE_BSS_STA;
  399. for (i = 0; i < ar->vif_max; i++)
  400. fw_mode |= fw_iftype << (i * HI_OPTION_FW_MODE_BITS);
  401. /*
  402. * By default, submodes :
  403. * vif[0] - AP/STA/IBSS
  404. * vif[1] - "P2P dev"/"P2P GO"/"P2P Client"
  405. * vif[2] - "P2P dev"/"P2P GO"/"P2P Client"
  406. */
  407. for (i = 0; i < ar->max_norm_iface; i++)
  408. fw_submode |= HI_OPTION_FW_SUBMODE_NONE <<
  409. (i * HI_OPTION_FW_SUBMODE_BITS);
  410. for (i = ar->max_norm_iface; i < ar->vif_max; i++)
  411. fw_submode |= HI_OPTION_FW_SUBMODE_P2PDEV <<
  412. (i * HI_OPTION_FW_SUBMODE_BITS);
  413. if (ar->p2p && ar->vif_max == 1)
  414. fw_submode = HI_OPTION_FW_SUBMODE_P2PDEV;
  415. param = HTC_PROTOCOL_VERSION;
  416. if (ath6kl_bmi_write(ar,
  417. ath6kl_get_hi_item_addr(ar,
  418. HI_ITEM(hi_app_host_interest)),
  419. (u8 *)&param, 4) != 0) {
  420. ath6kl_err("bmi_write_memory for htc version failed\n");
  421. return -EIO;
  422. }
  423. /* set the firmware mode to STA/IBSS/AP */
  424. param = 0;
  425. if (ath6kl_bmi_read(ar,
  426. ath6kl_get_hi_item_addr(ar,
  427. HI_ITEM(hi_option_flag)),
  428. (u8 *)&param, 4) != 0) {
  429. ath6kl_err("bmi_read_memory for setting fwmode failed\n");
  430. return -EIO;
  431. }
  432. param |= (ar->vif_max << HI_OPTION_NUM_DEV_SHIFT);
  433. param |= fw_mode << HI_OPTION_FW_MODE_SHIFT;
  434. param |= fw_submode << HI_OPTION_FW_SUBMODE_SHIFT;
  435. param |= (0 << HI_OPTION_MAC_ADDR_METHOD_SHIFT);
  436. param |= (0 << HI_OPTION_FW_BRIDGE_SHIFT);
  437. if (ath6kl_bmi_write(ar,
  438. ath6kl_get_hi_item_addr(ar,
  439. HI_ITEM(hi_option_flag)),
  440. (u8 *)&param,
  441. 4) != 0) {
  442. ath6kl_err("bmi_write_memory for setting fwmode failed\n");
  443. return -EIO;
  444. }
  445. ath6kl_dbg(ATH6KL_DBG_TRC, "firmware mode set\n");
  446. /*
  447. * Hardcode the address use for the extended board data
  448. * Ideally this should be pre-allocate by the OS at boot time
  449. * But since it is a new feature and board data is loaded
  450. * at init time, we have to workaround this from host.
  451. * It is difficult to patch the firmware boot code,
  452. * but possible in theory.
  453. */
  454. param = ar->hw.board_ext_data_addr;
  455. ram_reserved_size = ar->hw.reserved_ram_size;
  456. if (ath6kl_bmi_write(ar, ath6kl_get_hi_item_addr(ar,
  457. HI_ITEM(hi_board_ext_data)),
  458. (u8 *)&param, 4) != 0) {
  459. ath6kl_err("bmi_write_memory for hi_board_ext_data failed\n");
  460. return -EIO;
  461. }
  462. if (ath6kl_bmi_write(ar, ath6kl_get_hi_item_addr(ar,
  463. HI_ITEM(hi_end_ram_reserve_sz)),
  464. (u8 *)&ram_reserved_size, 4) != 0) {
  465. ath6kl_err("bmi_write_memory for hi_end_ram_reserve_sz failed\n");
  466. return -EIO;
  467. }
  468. /* set the block size for the target */
  469. if (ath6kl_set_htc_params(ar, MBOX_YIELD_LIMIT, 0))
  470. /* use default number of control buffers */
  471. return -EIO;
  472. /* Configure GPIO AR600x UART */
  473. param = ar->hw.uarttx_pin;
  474. status = ath6kl_bmi_write(ar,
  475. ath6kl_get_hi_item_addr(ar,
  476. HI_ITEM(hi_dbg_uart_txpin)),
  477. (u8 *)&param, 4);
  478. if (status)
  479. return status;
  480. /* Configure target refclk_hz */
  481. param = ar->hw.refclk_hz;
  482. status = ath6kl_bmi_write(ar,
  483. ath6kl_get_hi_item_addr(ar,
  484. HI_ITEM(hi_refclk_hz)),
  485. (u8 *)&param, 4);
  486. if (status)
  487. return status;
  488. return 0;
  489. }
  490. void ath6kl_core_free(struct ath6kl *ar)
  491. {
  492. wiphy_free(ar->wiphy);
  493. }
  494. void ath6kl_core_cleanup(struct ath6kl *ar)
  495. {
  496. ath6kl_hif_power_off(ar);
  497. destroy_workqueue(ar->ath6kl_wq);
  498. if (ar->htc_target)
  499. ath6kl_htc_cleanup(ar->htc_target);
  500. ath6kl_cookie_cleanup(ar);
  501. ath6kl_cleanup_amsdu_rxbufs(ar);
  502. ath6kl_bmi_cleanup(ar);
  503. ath6kl_debug_cleanup(ar);
  504. kfree(ar->fw_board);
  505. kfree(ar->fw_otp);
  506. kfree(ar->fw);
  507. kfree(ar->fw_patch);
  508. ath6kl_deinit_ieee80211_hw(ar);
  509. }
  510. /* firmware upload */
  511. static int ath6kl_get_fw(struct ath6kl *ar, const char *filename,
  512. u8 **fw, size_t *fw_len)
  513. {
  514. const struct firmware *fw_entry;
  515. int ret;
  516. ret = request_firmware(&fw_entry, filename, ar->dev);
  517. if (ret)
  518. return ret;
  519. *fw_len = fw_entry->size;
  520. *fw = kmemdup(fw_entry->data, fw_entry->size, GFP_KERNEL);
  521. if (*fw == NULL)
  522. ret = -ENOMEM;
  523. release_firmware(fw_entry);
  524. return ret;
  525. }
  526. #ifdef CONFIG_OF
  527. static const char *get_target_ver_dir(const struct ath6kl *ar)
  528. {
  529. switch (ar->version.target_ver) {
  530. case AR6003_HW_1_0_VERSION:
  531. return "ath6k/AR6003/hw1.0";
  532. case AR6003_HW_2_0_VERSION:
  533. return "ath6k/AR6003/hw2.0";
  534. case AR6003_HW_2_1_1_VERSION:
  535. return "ath6k/AR6003/hw2.1.1";
  536. }
  537. ath6kl_warn("%s: unsupported target version 0x%x.\n", __func__,
  538. ar->version.target_ver);
  539. return NULL;
  540. }
  541. /*
  542. * Check the device tree for a board-id and use it to construct
  543. * the pathname to the firmware file. Used (for now) to find a
  544. * fallback to the "bdata.bin" file--typically a symlink to the
  545. * appropriate board-specific file.
  546. */
  547. static bool check_device_tree(struct ath6kl *ar)
  548. {
  549. static const char *board_id_prop = "atheros,board-id";
  550. struct device_node *node;
  551. char board_filename[64];
  552. const char *board_id;
  553. int ret;
  554. for_each_compatible_node(node, NULL, "atheros,ath6kl") {
  555. board_id = of_get_property(node, board_id_prop, NULL);
  556. if (board_id == NULL) {
  557. ath6kl_warn("No \"%s\" property on %s node.\n",
  558. board_id_prop, node->name);
  559. continue;
  560. }
  561. snprintf(board_filename, sizeof(board_filename),
  562. "%s/bdata.%s.bin", get_target_ver_dir(ar), board_id);
  563. ret = ath6kl_get_fw(ar, board_filename, &ar->fw_board,
  564. &ar->fw_board_len);
  565. if (ret) {
  566. ath6kl_err("Failed to get DT board file %s: %d\n",
  567. board_filename, ret);
  568. continue;
  569. }
  570. return true;
  571. }
  572. return false;
  573. }
  574. #else
  575. static bool check_device_tree(struct ath6kl *ar)
  576. {
  577. return false;
  578. }
  579. #endif /* CONFIG_OF */
  580. static int ath6kl_fetch_board_file(struct ath6kl *ar)
  581. {
  582. const char *filename;
  583. int ret;
  584. if (ar->fw_board != NULL)
  585. return 0;
  586. if (WARN_ON(ar->hw.fw_board == NULL))
  587. return -EINVAL;
  588. filename = ar->hw.fw_board;
  589. ret = ath6kl_get_fw(ar, filename, &ar->fw_board,
  590. &ar->fw_board_len);
  591. if (ret == 0) {
  592. /* managed to get proper board file */
  593. return 0;
  594. }
  595. if (check_device_tree(ar)) {
  596. /* got board file from device tree */
  597. return 0;
  598. }
  599. /* there was no proper board file, try to use default instead */
  600. ath6kl_warn("Failed to get board file %s (%d), trying to find default board file.\n",
  601. filename, ret);
  602. filename = ar->hw.fw_default_board;
  603. ret = ath6kl_get_fw(ar, filename, &ar->fw_board,
  604. &ar->fw_board_len);
  605. if (ret) {
  606. ath6kl_err("Failed to get default board file %s: %d\n",
  607. filename, ret);
  608. return ret;
  609. }
  610. ath6kl_warn("WARNING! No proper board file was not found, instead using a default board file.\n");
  611. ath6kl_warn("Most likely your hardware won't work as specified. Install correct board file!\n");
  612. return 0;
  613. }
  614. static int ath6kl_fetch_otp_file(struct ath6kl *ar)
  615. {
  616. const char *filename;
  617. int ret;
  618. if (ar->fw_otp != NULL)
  619. return 0;
  620. if (ar->hw.fw_otp == NULL) {
  621. ath6kl_dbg(ATH6KL_DBG_BOOT,
  622. "no OTP file configured for this hw\n");
  623. return 0;
  624. }
  625. filename = ar->hw.fw_otp;
  626. ret = ath6kl_get_fw(ar, filename, &ar->fw_otp,
  627. &ar->fw_otp_len);
  628. if (ret) {
  629. ath6kl_err("Failed to get OTP file %s: %d\n",
  630. filename, ret);
  631. return ret;
  632. }
  633. return 0;
  634. }
  635. static int ath6kl_fetch_fw_file(struct ath6kl *ar)
  636. {
  637. const char *filename;
  638. int ret;
  639. if (ar->fw != NULL)
  640. return 0;
  641. if (testmode) {
  642. if (ar->hw.fw_tcmd == NULL) {
  643. ath6kl_warn("testmode not supported\n");
  644. return -EOPNOTSUPP;
  645. }
  646. filename = ar->hw.fw_tcmd;
  647. set_bit(TESTMODE, &ar->flag);
  648. goto get_fw;
  649. }
  650. if (WARN_ON(ar->hw.fw == NULL))
  651. return -EINVAL;
  652. filename = ar->hw.fw;
  653. get_fw:
  654. ret = ath6kl_get_fw(ar, filename, &ar->fw, &ar->fw_len);
  655. if (ret) {
  656. ath6kl_err("Failed to get firmware file %s: %d\n",
  657. filename, ret);
  658. return ret;
  659. }
  660. return 0;
  661. }
  662. static int ath6kl_fetch_patch_file(struct ath6kl *ar)
  663. {
  664. const char *filename;
  665. int ret;
  666. if (ar->fw_patch != NULL)
  667. return 0;
  668. if (ar->hw.fw_patch == NULL)
  669. return 0;
  670. filename = ar->hw.fw_patch;
  671. ret = ath6kl_get_fw(ar, filename, &ar->fw_patch,
  672. &ar->fw_patch_len);
  673. if (ret) {
  674. ath6kl_err("Failed to get patch file %s: %d\n",
  675. filename, ret);
  676. return ret;
  677. }
  678. return 0;
  679. }
  680. static int ath6kl_fetch_fw_api1(struct ath6kl *ar)
  681. {
  682. int ret;
  683. ret = ath6kl_fetch_otp_file(ar);
  684. if (ret)
  685. return ret;
  686. ret = ath6kl_fetch_fw_file(ar);
  687. if (ret)
  688. return ret;
  689. ret = ath6kl_fetch_patch_file(ar);
  690. if (ret)
  691. return ret;
  692. return 0;
  693. }
  694. static int ath6kl_fetch_fw_api2(struct ath6kl *ar)
  695. {
  696. size_t magic_len, len, ie_len;
  697. const struct firmware *fw;
  698. struct ath6kl_fw_ie *hdr;
  699. const char *filename;
  700. const u8 *data;
  701. int ret, ie_id, i, index, bit;
  702. __le32 *val;
  703. if (ar->hw.fw_api2 == NULL)
  704. return -EOPNOTSUPP;
  705. filename = ar->hw.fw_api2;
  706. ret = request_firmware(&fw, filename, ar->dev);
  707. if (ret)
  708. return ret;
  709. data = fw->data;
  710. len = fw->size;
  711. /* magic also includes the null byte, check that as well */
  712. magic_len = strlen(ATH6KL_FIRMWARE_MAGIC) + 1;
  713. if (len < magic_len) {
  714. ret = -EINVAL;
  715. goto out;
  716. }
  717. if (memcmp(data, ATH6KL_FIRMWARE_MAGIC, magic_len) != 0) {
  718. ret = -EINVAL;
  719. goto out;
  720. }
  721. len -= magic_len;
  722. data += magic_len;
  723. /* loop elements */
  724. while (len > sizeof(struct ath6kl_fw_ie)) {
  725. /* hdr is unaligned! */
  726. hdr = (struct ath6kl_fw_ie *) data;
  727. ie_id = le32_to_cpup(&hdr->id);
  728. ie_len = le32_to_cpup(&hdr->len);
  729. len -= sizeof(*hdr);
  730. data += sizeof(*hdr);
  731. if (len < ie_len) {
  732. ret = -EINVAL;
  733. goto out;
  734. }
  735. switch (ie_id) {
  736. case ATH6KL_FW_IE_OTP_IMAGE:
  737. ath6kl_dbg(ATH6KL_DBG_BOOT, "found otp image ie (%zd B)\n",
  738. ie_len);
  739. ar->fw_otp = kmemdup(data, ie_len, GFP_KERNEL);
  740. if (ar->fw_otp == NULL) {
  741. ret = -ENOMEM;
  742. goto out;
  743. }
  744. ar->fw_otp_len = ie_len;
  745. break;
  746. case ATH6KL_FW_IE_FW_IMAGE:
  747. ath6kl_dbg(ATH6KL_DBG_BOOT, "found fw image ie (%zd B)\n",
  748. ie_len);
  749. ar->fw = kmemdup(data, ie_len, GFP_KERNEL);
  750. if (ar->fw == NULL) {
  751. ret = -ENOMEM;
  752. goto out;
  753. }
  754. ar->fw_len = ie_len;
  755. break;
  756. case ATH6KL_FW_IE_PATCH_IMAGE:
  757. ath6kl_dbg(ATH6KL_DBG_BOOT, "found patch image ie (%zd B)\n",
  758. ie_len);
  759. ar->fw_patch = kmemdup(data, ie_len, GFP_KERNEL);
  760. if (ar->fw_patch == NULL) {
  761. ret = -ENOMEM;
  762. goto out;
  763. }
  764. ar->fw_patch_len = ie_len;
  765. break;
  766. case ATH6KL_FW_IE_RESERVED_RAM_SIZE:
  767. val = (__le32 *) data;
  768. ar->hw.reserved_ram_size = le32_to_cpup(val);
  769. ath6kl_dbg(ATH6KL_DBG_BOOT,
  770. "found reserved ram size ie 0x%d\n",
  771. ar->hw.reserved_ram_size);
  772. break;
  773. case ATH6KL_FW_IE_CAPABILITIES:
  774. if (ie_len < DIV_ROUND_UP(ATH6KL_FW_CAPABILITY_MAX, 8))
  775. break;
  776. ath6kl_dbg(ATH6KL_DBG_BOOT,
  777. "found firmware capabilities ie (%zd B)\n",
  778. ie_len);
  779. for (i = 0; i < ATH6KL_FW_CAPABILITY_MAX; i++) {
  780. index = i / 8;
  781. bit = i % 8;
  782. if (data[index] & (1 << bit))
  783. __set_bit(i, ar->fw_capabilities);
  784. }
  785. ath6kl_dbg_dump(ATH6KL_DBG_BOOT, "capabilities", "",
  786. ar->fw_capabilities,
  787. sizeof(ar->fw_capabilities));
  788. break;
  789. case ATH6KL_FW_IE_PATCH_ADDR:
  790. if (ie_len != sizeof(*val))
  791. break;
  792. val = (__le32 *) data;
  793. ar->hw.dataset_patch_addr = le32_to_cpup(val);
  794. ath6kl_dbg(ATH6KL_DBG_BOOT,
  795. "found patch address ie 0x%x\n",
  796. ar->hw.dataset_patch_addr);
  797. break;
  798. case ATH6KL_FW_IE_BOARD_ADDR:
  799. if (ie_len != sizeof(*val))
  800. break;
  801. val = (__le32 *) data;
  802. ar->hw.board_addr = le32_to_cpup(val);
  803. ath6kl_dbg(ATH6KL_DBG_BOOT,
  804. "found board address ie 0x%x\n",
  805. ar->hw.board_addr);
  806. break;
  807. case ATH6KL_FW_IE_VIF_MAX:
  808. if (ie_len != sizeof(*val))
  809. break;
  810. val = (__le32 *) data;
  811. ar->vif_max = min_t(unsigned int, le32_to_cpup(val),
  812. ATH6KL_VIF_MAX);
  813. if (ar->vif_max > 1 && !ar->p2p)
  814. ar->max_norm_iface = 2;
  815. ath6kl_dbg(ATH6KL_DBG_BOOT,
  816. "found vif max ie %d\n", ar->vif_max);
  817. break;
  818. default:
  819. ath6kl_dbg(ATH6KL_DBG_BOOT, "Unknown fw ie: %u\n",
  820. le32_to_cpup(&hdr->id));
  821. break;
  822. }
  823. len -= ie_len;
  824. data += ie_len;
  825. };
  826. ret = 0;
  827. out:
  828. release_firmware(fw);
  829. return ret;
  830. }
  831. static int ath6kl_fetch_firmwares(struct ath6kl *ar)
  832. {
  833. int ret;
  834. ret = ath6kl_fetch_board_file(ar);
  835. if (ret)
  836. return ret;
  837. ret = ath6kl_fetch_fw_api2(ar);
  838. if (ret == 0) {
  839. ath6kl_dbg(ATH6KL_DBG_BOOT, "using fw api 2\n");
  840. return 0;
  841. }
  842. ret = ath6kl_fetch_fw_api1(ar);
  843. if (ret)
  844. return ret;
  845. ath6kl_dbg(ATH6KL_DBG_BOOT, "using fw api 1\n");
  846. return 0;
  847. }
  848. static int ath6kl_upload_board_file(struct ath6kl *ar)
  849. {
  850. u32 board_address, board_ext_address, param;
  851. u32 board_data_size, board_ext_data_size;
  852. int ret;
  853. if (WARN_ON(ar->fw_board == NULL))
  854. return -ENOENT;
  855. /*
  856. * Determine where in Target RAM to write Board Data.
  857. * For AR6004, host determine Target RAM address for
  858. * writing board data.
  859. */
  860. if (ar->hw.board_addr != 0) {
  861. board_address = ar->hw.board_addr;
  862. ath6kl_bmi_write(ar,
  863. ath6kl_get_hi_item_addr(ar,
  864. HI_ITEM(hi_board_data)),
  865. (u8 *) &board_address, 4);
  866. } else {
  867. ath6kl_bmi_read(ar,
  868. ath6kl_get_hi_item_addr(ar,
  869. HI_ITEM(hi_board_data)),
  870. (u8 *) &board_address, 4);
  871. }
  872. /* determine where in target ram to write extended board data */
  873. ath6kl_bmi_read(ar,
  874. ath6kl_get_hi_item_addr(ar,
  875. HI_ITEM(hi_board_ext_data)),
  876. (u8 *) &board_ext_address, 4);
  877. if (ar->target_type == TARGET_TYPE_AR6003 &&
  878. board_ext_address == 0) {
  879. ath6kl_err("Failed to get board file target address.\n");
  880. return -EINVAL;
  881. }
  882. switch (ar->target_type) {
  883. case TARGET_TYPE_AR6003:
  884. board_data_size = AR6003_BOARD_DATA_SZ;
  885. board_ext_data_size = AR6003_BOARD_EXT_DATA_SZ;
  886. break;
  887. case TARGET_TYPE_AR6004:
  888. board_data_size = AR6004_BOARD_DATA_SZ;
  889. board_ext_data_size = AR6004_BOARD_EXT_DATA_SZ;
  890. break;
  891. default:
  892. WARN_ON(1);
  893. return -EINVAL;
  894. break;
  895. }
  896. if (board_ext_address &&
  897. ar->fw_board_len == (board_data_size + board_ext_data_size)) {
  898. /* write extended board data */
  899. ath6kl_dbg(ATH6KL_DBG_BOOT,
  900. "writing extended board data to 0x%x (%d B)\n",
  901. board_ext_address, board_ext_data_size);
  902. ret = ath6kl_bmi_write(ar, board_ext_address,
  903. ar->fw_board + board_data_size,
  904. board_ext_data_size);
  905. if (ret) {
  906. ath6kl_err("Failed to write extended board data: %d\n",
  907. ret);
  908. return ret;
  909. }
  910. /* record that extended board data is initialized */
  911. param = (board_ext_data_size << 16) | 1;
  912. ath6kl_bmi_write(ar,
  913. ath6kl_get_hi_item_addr(ar,
  914. HI_ITEM(hi_board_ext_data_config)),
  915. (unsigned char *) &param, 4);
  916. }
  917. if (ar->fw_board_len < board_data_size) {
  918. ath6kl_err("Too small board file: %zu\n", ar->fw_board_len);
  919. ret = -EINVAL;
  920. return ret;
  921. }
  922. ath6kl_dbg(ATH6KL_DBG_BOOT, "writing board file to 0x%x (%d B)\n",
  923. board_address, board_data_size);
  924. ret = ath6kl_bmi_write(ar, board_address, ar->fw_board,
  925. board_data_size);
  926. if (ret) {
  927. ath6kl_err("Board file bmi write failed: %d\n", ret);
  928. return ret;
  929. }
  930. /* record the fact that Board Data IS initialized */
  931. param = 1;
  932. ath6kl_bmi_write(ar,
  933. ath6kl_get_hi_item_addr(ar,
  934. HI_ITEM(hi_board_data_initialized)),
  935. (u8 *)&param, 4);
  936. return ret;
  937. }
  938. static int ath6kl_upload_otp(struct ath6kl *ar)
  939. {
  940. u32 address, param;
  941. bool from_hw = false;
  942. int ret;
  943. if (ar->fw_otp == NULL)
  944. return 0;
  945. address = ar->hw.app_load_addr;
  946. ath6kl_dbg(ATH6KL_DBG_BOOT, "writing otp to 0x%x (%zd B)\n", address,
  947. ar->fw_otp_len);
  948. ret = ath6kl_bmi_fast_download(ar, address, ar->fw_otp,
  949. ar->fw_otp_len);
  950. if (ret) {
  951. ath6kl_err("Failed to upload OTP file: %d\n", ret);
  952. return ret;
  953. }
  954. /* read firmware start address */
  955. ret = ath6kl_bmi_read(ar,
  956. ath6kl_get_hi_item_addr(ar,
  957. HI_ITEM(hi_app_start)),
  958. (u8 *) &address, sizeof(address));
  959. if (ret) {
  960. ath6kl_err("Failed to read hi_app_start: %d\n", ret);
  961. return ret;
  962. }
  963. if (ar->hw.app_start_override_addr == 0) {
  964. ar->hw.app_start_override_addr = address;
  965. from_hw = true;
  966. }
  967. ath6kl_dbg(ATH6KL_DBG_BOOT, "app_start_override_addr%s 0x%x\n",
  968. from_hw ? " (from hw)" : "",
  969. ar->hw.app_start_override_addr);
  970. /* execute the OTP code */
  971. ath6kl_dbg(ATH6KL_DBG_BOOT, "executing OTP at 0x%x\n",
  972. ar->hw.app_start_override_addr);
  973. param = 0;
  974. ath6kl_bmi_execute(ar, ar->hw.app_start_override_addr, &param);
  975. return ret;
  976. }
  977. static int ath6kl_upload_firmware(struct ath6kl *ar)
  978. {
  979. u32 address;
  980. int ret;
  981. if (WARN_ON(ar->fw == NULL))
  982. return 0;
  983. address = ar->hw.app_load_addr;
  984. ath6kl_dbg(ATH6KL_DBG_BOOT, "writing firmware to 0x%x (%zd B)\n",
  985. address, ar->fw_len);
  986. ret = ath6kl_bmi_fast_download(ar, address, ar->fw, ar->fw_len);
  987. if (ret) {
  988. ath6kl_err("Failed to write firmware: %d\n", ret);
  989. return ret;
  990. }
  991. /*
  992. * Set starting address for firmware
  993. * Don't need to setup app_start override addr on AR6004
  994. */
  995. if (ar->target_type != TARGET_TYPE_AR6004) {
  996. address = ar->hw.app_start_override_addr;
  997. ath6kl_bmi_set_app_start(ar, address);
  998. }
  999. return ret;
  1000. }
  1001. static int ath6kl_upload_patch(struct ath6kl *ar)
  1002. {
  1003. u32 address, param;
  1004. int ret;
  1005. if (ar->fw_patch == NULL)
  1006. return 0;
  1007. address = ar->hw.dataset_patch_addr;
  1008. ath6kl_dbg(ATH6KL_DBG_BOOT, "writing patch to 0x%x (%zd B)\n",
  1009. address, ar->fw_patch_len);
  1010. ret = ath6kl_bmi_write(ar, address, ar->fw_patch, ar->fw_patch_len);
  1011. if (ret) {
  1012. ath6kl_err("Failed to write patch file: %d\n", ret);
  1013. return ret;
  1014. }
  1015. param = address;
  1016. ath6kl_bmi_write(ar,
  1017. ath6kl_get_hi_item_addr(ar,
  1018. HI_ITEM(hi_dset_list_head)),
  1019. (unsigned char *) &param, 4);
  1020. return 0;
  1021. }
  1022. static int ath6kl_init_upload(struct ath6kl *ar)
  1023. {
  1024. u32 param, options, sleep, address;
  1025. int status = 0;
  1026. if (ar->target_type != TARGET_TYPE_AR6003 &&
  1027. ar->target_type != TARGET_TYPE_AR6004)
  1028. return -EINVAL;
  1029. /* temporarily disable system sleep */
  1030. address = MBOX_BASE_ADDRESS + LOCAL_SCRATCH_ADDRESS;
  1031. status = ath6kl_bmi_reg_read(ar, address, &param);
  1032. if (status)
  1033. return status;
  1034. options = param;
  1035. param |= ATH6KL_OPTION_SLEEP_DISABLE;
  1036. status = ath6kl_bmi_reg_write(ar, address, param);
  1037. if (status)
  1038. return status;
  1039. address = RTC_BASE_ADDRESS + SYSTEM_SLEEP_ADDRESS;
  1040. status = ath6kl_bmi_reg_read(ar, address, &param);
  1041. if (status)
  1042. return status;
  1043. sleep = param;
  1044. param |= SM(SYSTEM_SLEEP_DISABLE, 1);
  1045. status = ath6kl_bmi_reg_write(ar, address, param);
  1046. if (status)
  1047. return status;
  1048. ath6kl_dbg(ATH6KL_DBG_TRC, "old options: %d, old sleep: %d\n",
  1049. options, sleep);
  1050. /* program analog PLL register */
  1051. /* no need to control 40/44MHz clock on AR6004 */
  1052. if (ar->target_type != TARGET_TYPE_AR6004) {
  1053. status = ath6kl_bmi_reg_write(ar, ATH6KL_ANALOG_PLL_REGISTER,
  1054. 0xF9104001);
  1055. if (status)
  1056. return status;
  1057. /* Run at 80/88MHz by default */
  1058. param = SM(CPU_CLOCK_STANDARD, 1);
  1059. address = RTC_BASE_ADDRESS + CPU_CLOCK_ADDRESS;
  1060. status = ath6kl_bmi_reg_write(ar, address, param);
  1061. if (status)
  1062. return status;
  1063. }
  1064. param = 0;
  1065. address = RTC_BASE_ADDRESS + LPO_CAL_ADDRESS;
  1066. param = SM(LPO_CAL_ENABLE, 1);
  1067. status = ath6kl_bmi_reg_write(ar, address, param);
  1068. if (status)
  1069. return status;
  1070. /* WAR to avoid SDIO CRC err */
  1071. if (ar->version.target_ver == AR6003_HW_2_0_VERSION) {
  1072. ath6kl_err("temporary war to avoid sdio crc error\n");
  1073. param = 0x20;
  1074. address = GPIO_BASE_ADDRESS + GPIO_PIN10_ADDRESS;
  1075. status = ath6kl_bmi_reg_write(ar, address, param);
  1076. if (status)
  1077. return status;
  1078. address = GPIO_BASE_ADDRESS + GPIO_PIN11_ADDRESS;
  1079. status = ath6kl_bmi_reg_write(ar, address, param);
  1080. if (status)
  1081. return status;
  1082. address = GPIO_BASE_ADDRESS + GPIO_PIN12_ADDRESS;
  1083. status = ath6kl_bmi_reg_write(ar, address, param);
  1084. if (status)
  1085. return status;
  1086. address = GPIO_BASE_ADDRESS + GPIO_PIN13_ADDRESS;
  1087. status = ath6kl_bmi_reg_write(ar, address, param);
  1088. if (status)
  1089. return status;
  1090. }
  1091. /* write EEPROM data to Target RAM */
  1092. status = ath6kl_upload_board_file(ar);
  1093. if (status)
  1094. return status;
  1095. /* transfer One time Programmable data */
  1096. status = ath6kl_upload_otp(ar);
  1097. if (status)
  1098. return status;
  1099. /* Download Target firmware */
  1100. status = ath6kl_upload_firmware(ar);
  1101. if (status)
  1102. return status;
  1103. status = ath6kl_upload_patch(ar);
  1104. if (status)
  1105. return status;
  1106. /* Restore system sleep */
  1107. address = RTC_BASE_ADDRESS + SYSTEM_SLEEP_ADDRESS;
  1108. status = ath6kl_bmi_reg_write(ar, address, sleep);
  1109. if (status)
  1110. return status;
  1111. address = MBOX_BASE_ADDRESS + LOCAL_SCRATCH_ADDRESS;
  1112. param = options | 0x20;
  1113. status = ath6kl_bmi_reg_write(ar, address, param);
  1114. if (status)
  1115. return status;
  1116. return status;
  1117. }
  1118. static int ath6kl_init_hw_params(struct ath6kl *ar)
  1119. {
  1120. const struct ath6kl_hw *hw;
  1121. int i;
  1122. for (i = 0; i < ARRAY_SIZE(hw_list); i++) {
  1123. hw = &hw_list[i];
  1124. if (hw->id == ar->version.target_ver)
  1125. break;
  1126. }
  1127. if (i == ARRAY_SIZE(hw_list)) {
  1128. ath6kl_err("Unsupported hardware version: 0x%x\n",
  1129. ar->version.target_ver);
  1130. return -EINVAL;
  1131. }
  1132. ar->hw = *hw;
  1133. ath6kl_dbg(ATH6KL_DBG_BOOT,
  1134. "target_ver 0x%x target_type 0x%x dataset_patch 0x%x app_load_addr 0x%x\n",
  1135. ar->version.target_ver, ar->target_type,
  1136. ar->hw.dataset_patch_addr, ar->hw.app_load_addr);
  1137. ath6kl_dbg(ATH6KL_DBG_BOOT,
  1138. "app_start_override_addr 0x%x board_ext_data_addr 0x%x reserved_ram_size 0x%x",
  1139. ar->hw.app_start_override_addr, ar->hw.board_ext_data_addr,
  1140. ar->hw.reserved_ram_size);
  1141. ath6kl_dbg(ATH6KL_DBG_BOOT,
  1142. "refclk_hz %d uarttx_pin %d",
  1143. ar->hw.refclk_hz, ar->hw.uarttx_pin);
  1144. return 0;
  1145. }
  1146. static const char *ath6kl_init_get_hif_name(enum ath6kl_hif_type type)
  1147. {
  1148. switch (type) {
  1149. case ATH6KL_HIF_TYPE_SDIO:
  1150. return "sdio";
  1151. case ATH6KL_HIF_TYPE_USB:
  1152. return "usb";
  1153. }
  1154. return NULL;
  1155. }
  1156. int ath6kl_init_hw_start(struct ath6kl *ar)
  1157. {
  1158. long timeleft;
  1159. int ret, i;
  1160. ath6kl_dbg(ATH6KL_DBG_BOOT, "hw start\n");
  1161. ret = ath6kl_hif_power_on(ar);
  1162. if (ret)
  1163. return ret;
  1164. ret = ath6kl_configure_target(ar);
  1165. if (ret)
  1166. goto err_power_off;
  1167. ret = ath6kl_init_upload(ar);
  1168. if (ret)
  1169. goto err_power_off;
  1170. /* Do we need to finish the BMI phase */
  1171. /* FIXME: return error from ath6kl_bmi_done() */
  1172. if (ath6kl_bmi_done(ar)) {
  1173. ret = -EIO;
  1174. goto err_power_off;
  1175. }
  1176. /*
  1177. * The reason we have to wait for the target here is that the
  1178. * driver layer has to init BMI in order to set the host block
  1179. * size.
  1180. */
  1181. if (ath6kl_htc_wait_target(ar->htc_target)) {
  1182. ret = -EIO;
  1183. goto err_power_off;
  1184. }
  1185. if (ath6kl_init_service_ep(ar)) {
  1186. ret = -EIO;
  1187. goto err_cleanup_scatter;
  1188. }
  1189. /* setup credit distribution */
  1190. ath6kl_credit_setup(ar->htc_target, &ar->credit_state_info);
  1191. /* start HTC */
  1192. ret = ath6kl_htc_start(ar->htc_target);
  1193. if (ret) {
  1194. /* FIXME: call this */
  1195. ath6kl_cookie_cleanup(ar);
  1196. goto err_cleanup_scatter;
  1197. }
  1198. /* Wait for Wmi event to be ready */
  1199. timeleft = wait_event_interruptible_timeout(ar->event_wq,
  1200. test_bit(WMI_READY,
  1201. &ar->flag),
  1202. WMI_TIMEOUT);
  1203. ath6kl_dbg(ATH6KL_DBG_BOOT, "firmware booted\n");
  1204. if (test_and_clear_bit(FIRST_BOOT, &ar->flag)) {
  1205. ath6kl_info("%s %s fw %s%s\n",
  1206. ar->hw.name,
  1207. ath6kl_init_get_hif_name(ar->hif_type),
  1208. ar->wiphy->fw_version,
  1209. test_bit(TESTMODE, &ar->flag) ? " testmode" : "");
  1210. }
  1211. if (ar->version.abi_ver != ATH6KL_ABI_VERSION) {
  1212. ath6kl_err("abi version mismatch: host(0x%x), target(0x%x)\n",
  1213. ATH6KL_ABI_VERSION, ar->version.abi_ver);
  1214. ret = -EIO;
  1215. goto err_htc_stop;
  1216. }
  1217. if (!timeleft || signal_pending(current)) {
  1218. ath6kl_err("wmi is not ready or wait was interrupted\n");
  1219. ret = -EIO;
  1220. goto err_htc_stop;
  1221. }
  1222. ath6kl_dbg(ATH6KL_DBG_TRC, "%s: wmi is ready\n", __func__);
  1223. /* communicate the wmi protocol verision to the target */
  1224. /* FIXME: return error */
  1225. if ((ath6kl_set_host_app_area(ar)) != 0)
  1226. ath6kl_err("unable to set the host app area\n");
  1227. for (i = 0; i < ar->vif_max; i++) {
  1228. ret = ath6kl_target_config_wlan_params(ar, i);
  1229. if (ret)
  1230. goto err_htc_stop;
  1231. }
  1232. ar->state = ATH6KL_STATE_ON;
  1233. return 0;
  1234. err_htc_stop:
  1235. ath6kl_htc_stop(ar->htc_target);
  1236. err_cleanup_scatter:
  1237. ath6kl_hif_cleanup_scatter(ar);
  1238. err_power_off:
  1239. ath6kl_hif_power_off(ar);
  1240. return ret;
  1241. }
  1242. int ath6kl_init_hw_stop(struct ath6kl *ar)
  1243. {
  1244. int ret;
  1245. ath6kl_dbg(ATH6KL_DBG_BOOT, "hw stop\n");
  1246. ath6kl_htc_stop(ar->htc_target);
  1247. ath6kl_hif_stop(ar);
  1248. ath6kl_bmi_reset(ar);
  1249. ret = ath6kl_hif_power_off(ar);
  1250. if (ret)
  1251. ath6kl_warn("failed to power off hif: %d\n", ret);
  1252. ar->state = ATH6KL_STATE_OFF;
  1253. return 0;
  1254. }
  1255. int ath6kl_core_init(struct ath6kl *ar)
  1256. {
  1257. struct ath6kl_bmi_target_info targ_info;
  1258. struct net_device *ndev;
  1259. int ret = 0, i;
  1260. ar->ath6kl_wq = create_singlethread_workqueue("ath6kl");
  1261. if (!ar->ath6kl_wq)
  1262. return -ENOMEM;
  1263. ret = ath6kl_bmi_init(ar);
  1264. if (ret)
  1265. goto err_wq;
  1266. /*
  1267. * Turn on power to get hardware (target) version and leave power
  1268. * on delibrately as we will boot the hardware anyway within few
  1269. * seconds.
  1270. */
  1271. ret = ath6kl_hif_power_on(ar);
  1272. if (ret)
  1273. goto err_bmi_cleanup;
  1274. ret = ath6kl_bmi_get_target_info(ar, &targ_info);
  1275. if (ret)
  1276. goto err_power_off;
  1277. ar->version.target_ver = le32_to_cpu(targ_info.version);
  1278. ar->target_type = le32_to_cpu(targ_info.type);
  1279. ar->wiphy->hw_version = le32_to_cpu(targ_info.version);
  1280. ret = ath6kl_init_hw_params(ar);
  1281. if (ret)
  1282. goto err_power_off;
  1283. ar->htc_target = ath6kl_htc_create(ar);
  1284. if (!ar->htc_target) {
  1285. ret = -ENOMEM;
  1286. goto err_power_off;
  1287. }
  1288. ret = ath6kl_fetch_firmwares(ar);
  1289. if (ret)
  1290. goto err_htc_cleanup;
  1291. /* FIXME: we should free all firmwares in the error cases below */
  1292. /* Indicate that WMI is enabled (although not ready yet) */
  1293. set_bit(WMI_ENABLED, &ar->flag);
  1294. ar->wmi = ath6kl_wmi_init(ar);
  1295. if (!ar->wmi) {
  1296. ath6kl_err("failed to initialize wmi\n");
  1297. ret = -EIO;
  1298. goto err_htc_cleanup;
  1299. }
  1300. ath6kl_dbg(ATH6KL_DBG_TRC, "%s: got wmi @ 0x%p.\n", __func__, ar->wmi);
  1301. ret = ath6kl_register_ieee80211_hw(ar);
  1302. if (ret)
  1303. goto err_node_cleanup;
  1304. ret = ath6kl_debug_init(ar);
  1305. if (ret) {
  1306. wiphy_unregister(ar->wiphy);
  1307. goto err_node_cleanup;
  1308. }
  1309. for (i = 0; i < ar->vif_max; i++)
  1310. ar->avail_idx_map |= BIT(i);
  1311. rtnl_lock();
  1312. /* Add an initial station interface */
  1313. ndev = ath6kl_interface_add(ar, "wlan%d", NL80211_IFTYPE_STATION, 0,
  1314. INFRA_NETWORK);
  1315. rtnl_unlock();
  1316. if (!ndev) {
  1317. ath6kl_err("Failed to instantiate a network device\n");
  1318. ret = -ENOMEM;
  1319. wiphy_unregister(ar->wiphy);
  1320. goto err_debug_init;
  1321. }
  1322. ath6kl_dbg(ATH6KL_DBG_TRC, "%s: name=%s dev=0x%p, ar=0x%p\n",
  1323. __func__, ndev->name, ndev, ar);
  1324. /* setup access class priority mappings */
  1325. ar->ac_stream_pri_map[WMM_AC_BK] = 0; /* lowest */
  1326. ar->ac_stream_pri_map[WMM_AC_BE] = 1;
  1327. ar->ac_stream_pri_map[WMM_AC_VI] = 2;
  1328. ar->ac_stream_pri_map[WMM_AC_VO] = 3; /* highest */
  1329. /* give our connected endpoints some buffers */
  1330. ath6kl_rx_refill(ar->htc_target, ar->ctrl_ep);
  1331. ath6kl_rx_refill(ar->htc_target, ar->ac2ep_map[WMM_AC_BE]);
  1332. /* allocate some buffers that handle larger AMSDU frames */
  1333. ath6kl_refill_amsdu_rxbufs(ar, ATH6KL_MAX_AMSDU_RX_BUFFERS);
  1334. ath6kl_cookie_init(ar);
  1335. ar->conf_flags = ATH6KL_CONF_IGNORE_ERP_BARKER |
  1336. ATH6KL_CONF_ENABLE_11N | ATH6KL_CONF_ENABLE_TX_BURST;
  1337. if (suspend_cutpower)
  1338. ar->conf_flags |= ATH6KL_CONF_SUSPEND_CUTPOWER;
  1339. ar->wiphy->flags |= WIPHY_FLAG_SUPPORTS_FW_ROAM |
  1340. WIPHY_FLAG_HAVE_AP_SME |
  1341. WIPHY_FLAG_HAS_REMAIN_ON_CHANNEL |
  1342. WIPHY_FLAG_AP_PROBE_RESP_OFFLOAD;
  1343. if (test_bit(ATH6KL_FW_CAPABILITY_SCHED_SCAN, ar->fw_capabilities))
  1344. ar->wiphy->flags |= WIPHY_FLAG_SUPPORTS_SCHED_SCAN;
  1345. ar->wiphy->probe_resp_offload =
  1346. NL80211_PROBE_RESP_OFFLOAD_SUPPORT_WPS |
  1347. NL80211_PROBE_RESP_OFFLOAD_SUPPORT_WPS2 |
  1348. NL80211_PROBE_RESP_OFFLOAD_SUPPORT_P2P |
  1349. NL80211_PROBE_RESP_OFFLOAD_SUPPORT_80211U;
  1350. set_bit(FIRST_BOOT, &ar->flag);
  1351. ret = ath6kl_init_hw_start(ar);
  1352. if (ret) {
  1353. ath6kl_err("Failed to start hardware: %d\n", ret);
  1354. goto err_rxbuf_cleanup;
  1355. }
  1356. /*
  1357. * Set mac address which is received in ready event
  1358. * FIXME: Move to ath6kl_interface_add()
  1359. */
  1360. memcpy(ndev->dev_addr, ar->mac_addr, ETH_ALEN);
  1361. return ret;
  1362. err_rxbuf_cleanup:
  1363. ath6kl_htc_flush_rx_buf(ar->htc_target);
  1364. ath6kl_cleanup_amsdu_rxbufs(ar);
  1365. rtnl_lock();
  1366. ath6kl_deinit_if_data(netdev_priv(ndev));
  1367. rtnl_unlock();
  1368. wiphy_unregister(ar->wiphy);
  1369. err_debug_init:
  1370. ath6kl_debug_cleanup(ar);
  1371. err_node_cleanup:
  1372. ath6kl_wmi_shutdown(ar->wmi);
  1373. clear_bit(WMI_ENABLED, &ar->flag);
  1374. ar->wmi = NULL;
  1375. err_htc_cleanup:
  1376. ath6kl_htc_cleanup(ar->htc_target);
  1377. err_power_off:
  1378. ath6kl_hif_power_off(ar);
  1379. err_bmi_cleanup:
  1380. ath6kl_bmi_cleanup(ar);
  1381. err_wq:
  1382. destroy_workqueue(ar->ath6kl_wq);
  1383. return ret;
  1384. }
  1385. void ath6kl_cleanup_vif(struct ath6kl_vif *vif, bool wmi_ready)
  1386. {
  1387. static u8 bcast_mac[] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
  1388. bool discon_issued;
  1389. netif_stop_queue(vif->ndev);
  1390. clear_bit(WLAN_ENABLED, &vif->flags);
  1391. if (wmi_ready) {
  1392. discon_issued = test_bit(CONNECTED, &vif->flags) ||
  1393. test_bit(CONNECT_PEND, &vif->flags);
  1394. ath6kl_disconnect(vif);
  1395. del_timer(&vif->disconnect_timer);
  1396. if (discon_issued)
  1397. ath6kl_disconnect_event(vif, DISCONNECT_CMD,
  1398. (vif->nw_type & AP_NETWORK) ?
  1399. bcast_mac : vif->bssid,
  1400. 0, NULL, 0);
  1401. }
  1402. if (vif->scan_req) {
  1403. cfg80211_scan_done(vif->scan_req, true);
  1404. vif->scan_req = NULL;
  1405. }
  1406. }
  1407. void ath6kl_stop_txrx(struct ath6kl *ar)
  1408. {
  1409. struct ath6kl_vif *vif, *tmp_vif;
  1410. set_bit(DESTROY_IN_PROGRESS, &ar->flag);
  1411. if (down_interruptible(&ar->sem)) {
  1412. ath6kl_err("down_interruptible failed\n");
  1413. return;
  1414. }
  1415. spin_lock_bh(&ar->list_lock);
  1416. list_for_each_entry_safe(vif, tmp_vif, &ar->vif_list, list) {
  1417. list_del(&vif->list);
  1418. spin_unlock_bh(&ar->list_lock);
  1419. ath6kl_cleanup_vif(vif, test_bit(WMI_READY, &ar->flag));
  1420. rtnl_lock();
  1421. ath6kl_deinit_if_data(vif);
  1422. rtnl_unlock();
  1423. spin_lock_bh(&ar->list_lock);
  1424. }
  1425. spin_unlock_bh(&ar->list_lock);
  1426. clear_bit(WMI_READY, &ar->flag);
  1427. /*
  1428. * After wmi_shudown all WMI events will be dropped. We
  1429. * need to cleanup the buffers allocated in AP mode and
  1430. * give disconnect notification to stack, which usually
  1431. * happens in the disconnect_event. Simulate the disconnect
  1432. * event by calling the function directly. Sometimes
  1433. * disconnect_event will be received when the debug logs
  1434. * are collected.
  1435. */
  1436. ath6kl_wmi_shutdown(ar->wmi);
  1437. clear_bit(WMI_ENABLED, &ar->flag);
  1438. if (ar->htc_target) {
  1439. ath6kl_dbg(ATH6KL_DBG_TRC, "%s: shut down htc\n", __func__);
  1440. ath6kl_htc_stop(ar->htc_target);
  1441. }
  1442. /*
  1443. * Try to reset the device if we can. The driver may have been
  1444. * configure NOT to reset the target during a debug session.
  1445. */
  1446. ath6kl_dbg(ATH6KL_DBG_TRC,
  1447. "attempting to reset target on instance destroy\n");
  1448. ath6kl_reset_device(ar, ar->target_type, true, true);
  1449. clear_bit(WLAN_ENABLED, &ar->flag);
  1450. }