ezkit.c 30 KB

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  1. /*
  2. * Copyright 2004-2009 Analog Devices Inc.
  3. * 2005 National ICT Australia (NICTA)
  4. * Aidan Williams <aidan@nicta.com.au>
  5. *
  6. * Licensed under the GPL-2 or later.
  7. */
  8. #include <linux/device.h>
  9. #include <linux/platform_device.h>
  10. #include <linux/mtd/mtd.h>
  11. #include <linux/mtd/partitions.h>
  12. #include <linux/mtd/physmap.h>
  13. #include <linux/spi/spi.h>
  14. #include <linux/spi/flash.h>
  15. #include <linux/i2c.h>
  16. #include <linux/irq.h>
  17. #include <linux/interrupt.h>
  18. #include <linux/usb/musb.h>
  19. #include <linux/leds.h>
  20. #include <linux/input.h>
  21. #include <asm/dma.h>
  22. #include <asm/bfin5xx_spi.h>
  23. #include <asm/reboot.h>
  24. #include <asm/nand.h>
  25. #include <asm/portmux.h>
  26. #include <asm/dpmc.h>
  27. #include <linux/spi/ad7877.h>
  28. /*
  29. * Name the Board for the /proc/cpuinfo
  30. */
  31. #ifdef CONFIG_BFIN527_EZKIT_V2
  32. const char bfin_board_name[] = "ADI BF527-EZKIT V2";
  33. #else
  34. const char bfin_board_name[] = "ADI BF527-EZKIT";
  35. #endif
  36. /*
  37. * Driver needs to know address, irq and flag pin.
  38. */
  39. #if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE)
  40. #include <linux/usb/isp1760.h>
  41. static struct resource bfin_isp1760_resources[] = {
  42. [0] = {
  43. .start = 0x203C0000,
  44. .end = 0x203C0000 + 0x000fffff,
  45. .flags = IORESOURCE_MEM,
  46. },
  47. [1] = {
  48. .start = IRQ_PF7,
  49. .end = IRQ_PF7,
  50. .flags = IORESOURCE_IRQ,
  51. },
  52. };
  53. static struct isp1760_platform_data isp1760_priv = {
  54. .is_isp1761 = 0,
  55. .bus_width_16 = 1,
  56. .port1_otg = 0,
  57. .analog_oc = 0,
  58. .dack_polarity_high = 0,
  59. .dreq_polarity_high = 0,
  60. };
  61. static struct platform_device bfin_isp1760_device = {
  62. .name = "isp1760",
  63. .id = 0,
  64. .dev = {
  65. .platform_data = &isp1760_priv,
  66. },
  67. .num_resources = ARRAY_SIZE(bfin_isp1760_resources),
  68. .resource = bfin_isp1760_resources,
  69. };
  70. #endif
  71. #if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
  72. static struct resource musb_resources[] = {
  73. [0] = {
  74. .start = 0xffc03800,
  75. .end = 0xffc03cff,
  76. .flags = IORESOURCE_MEM,
  77. },
  78. [1] = { /* general IRQ */
  79. .start = IRQ_USB_INT0,
  80. .end = IRQ_USB_INT0,
  81. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  82. .name = "mc"
  83. },
  84. [2] = { /* DMA IRQ */
  85. .start = IRQ_USB_DMA,
  86. .end = IRQ_USB_DMA,
  87. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  88. .name = "dma"
  89. },
  90. };
  91. static struct musb_hdrc_config musb_config = {
  92. .multipoint = 0,
  93. .dyn_fifo = 0,
  94. .soft_con = 1,
  95. .dma = 1,
  96. .num_eps = 8,
  97. .dma_channels = 8,
  98. .gpio_vrsel = GPIO_PG13,
  99. /* Some custom boards need to be active low, just set it to "0"
  100. * if it is the case.
  101. */
  102. .gpio_vrsel_active = 1,
  103. };
  104. static struct musb_hdrc_platform_data musb_plat = {
  105. #if defined(CONFIG_USB_MUSB_OTG)
  106. .mode = MUSB_OTG,
  107. #elif defined(CONFIG_USB_MUSB_HDRC_HCD)
  108. .mode = MUSB_HOST,
  109. #elif defined(CONFIG_USB_GADGET_MUSB_HDRC)
  110. .mode = MUSB_PERIPHERAL,
  111. #endif
  112. .config = &musb_config,
  113. };
  114. static u64 musb_dmamask = ~(u32)0;
  115. static struct platform_device musb_device = {
  116. .name = "musb-blackfin",
  117. .id = 0,
  118. .dev = {
  119. .dma_mask = &musb_dmamask,
  120. .coherent_dma_mask = 0xffffffff,
  121. .platform_data = &musb_plat,
  122. },
  123. .num_resources = ARRAY_SIZE(musb_resources),
  124. .resource = musb_resources,
  125. };
  126. #endif
  127. #if defined(CONFIG_FB_BFIN_T350MCQB) || defined(CONFIG_FB_BFIN_T350MCQB_MODULE)
  128. static struct resource bf52x_t350mcqb_resources[] = {
  129. {
  130. .start = IRQ_PPI_ERROR,
  131. .end = IRQ_PPI_ERROR,
  132. .flags = IORESOURCE_IRQ,
  133. },
  134. };
  135. static struct platform_device bf52x_t350mcqb_device = {
  136. .name = "bfin-t350mcqb",
  137. .id = -1,
  138. .num_resources = ARRAY_SIZE(bf52x_t350mcqb_resources),
  139. .resource = bf52x_t350mcqb_resources,
  140. };
  141. #endif
  142. #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
  143. #include <asm/bfin-lq035q1.h>
  144. static struct bfin_lq035q1fb_disp_info bfin_lq035q1_data = {
  145. .mode = LQ035_NORM | LQ035_RGB | LQ035_RL | LQ035_TB,
  146. .ppi_mode = USE_RGB565_8_BIT_PPI,
  147. };
  148. static struct resource bfin_lq035q1_resources[] = {
  149. {
  150. .start = IRQ_PPI_ERROR,
  151. .end = IRQ_PPI_ERROR,
  152. .flags = IORESOURCE_IRQ,
  153. },
  154. };
  155. static struct platform_device bfin_lq035q1_device = {
  156. .name = "bfin-lq035q1",
  157. .id = -1,
  158. .num_resources = ARRAY_SIZE(bfin_lq035q1_resources),
  159. .resource = bfin_lq035q1_resources,
  160. .dev = {
  161. .platform_data = &bfin_lq035q1_data,
  162. },
  163. };
  164. #endif
  165. #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
  166. static struct mtd_partition ezkit_partitions[] = {
  167. {
  168. .name = "bootloader(nor)",
  169. .size = 0x40000,
  170. .offset = 0,
  171. }, {
  172. .name = "linux kernel(nor)",
  173. .size = 0x1C0000,
  174. .offset = MTDPART_OFS_APPEND,
  175. }, {
  176. .name = "file system(nor)",
  177. .size = MTDPART_SIZ_FULL,
  178. .offset = MTDPART_OFS_APPEND,
  179. }
  180. };
  181. static struct physmap_flash_data ezkit_flash_data = {
  182. .width = 2,
  183. .parts = ezkit_partitions,
  184. .nr_parts = ARRAY_SIZE(ezkit_partitions),
  185. };
  186. static struct resource ezkit_flash_resource = {
  187. .start = 0x20000000,
  188. .end = 0x203fffff,
  189. .flags = IORESOURCE_MEM,
  190. };
  191. static struct platform_device ezkit_flash_device = {
  192. .name = "physmap-flash",
  193. .id = 0,
  194. .dev = {
  195. .platform_data = &ezkit_flash_data,
  196. },
  197. .num_resources = 1,
  198. .resource = &ezkit_flash_resource,
  199. };
  200. #endif
  201. #if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
  202. static struct mtd_partition partition_info[] = {
  203. {
  204. .name = "bootloader(nand)",
  205. .offset = 0,
  206. .size = 0x40000,
  207. }, {
  208. .name = "linux kernel(nand)",
  209. .offset = MTDPART_OFS_APPEND,
  210. .size = 4 * 1024 * 1024,
  211. },
  212. {
  213. .name = "file system(nand)",
  214. .offset = MTDPART_OFS_APPEND,
  215. .size = MTDPART_SIZ_FULL,
  216. },
  217. };
  218. static struct bf5xx_nand_platform bf5xx_nand_platform = {
  219. .data_width = NFC_NWIDTH_8,
  220. .partitions = partition_info,
  221. .nr_partitions = ARRAY_SIZE(partition_info),
  222. .rd_dly = 3,
  223. .wr_dly = 3,
  224. };
  225. static struct resource bf5xx_nand_resources[] = {
  226. {
  227. .start = NFC_CTL,
  228. .end = NFC_DATA_RD + 2,
  229. .flags = IORESOURCE_MEM,
  230. },
  231. {
  232. .start = CH_NFC,
  233. .end = CH_NFC,
  234. .flags = IORESOURCE_IRQ,
  235. },
  236. };
  237. static struct platform_device bf5xx_nand_device = {
  238. .name = "bf5xx-nand",
  239. .id = 0,
  240. .num_resources = ARRAY_SIZE(bf5xx_nand_resources),
  241. .resource = bf5xx_nand_resources,
  242. .dev = {
  243. .platform_data = &bf5xx_nand_platform,
  244. },
  245. };
  246. #endif
  247. #if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
  248. static struct resource bfin_pcmcia_cf_resources[] = {
  249. {
  250. .start = 0x20310000, /* IO PORT */
  251. .end = 0x20312000,
  252. .flags = IORESOURCE_MEM,
  253. }, {
  254. .start = 0x20311000, /* Attribute Memory */
  255. .end = 0x20311FFF,
  256. .flags = IORESOURCE_MEM,
  257. }, {
  258. .start = IRQ_PF4,
  259. .end = IRQ_PF4,
  260. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
  261. }, {
  262. .start = 6, /* Card Detect PF6 */
  263. .end = 6,
  264. .flags = IORESOURCE_IRQ,
  265. },
  266. };
  267. static struct platform_device bfin_pcmcia_cf_device = {
  268. .name = "bfin_cf_pcmcia",
  269. .id = -1,
  270. .num_resources = ARRAY_SIZE(bfin_pcmcia_cf_resources),
  271. .resource = bfin_pcmcia_cf_resources,
  272. };
  273. #endif
  274. #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
  275. static struct platform_device rtc_device = {
  276. .name = "rtc-bfin",
  277. .id = -1,
  278. };
  279. #endif
  280. #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
  281. #include <linux/smc91x.h>
  282. static struct smc91x_platdata smc91x_info = {
  283. .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
  284. .leda = RPC_LED_100_10,
  285. .ledb = RPC_LED_TX_RX,
  286. };
  287. static struct resource smc91x_resources[] = {
  288. {
  289. .name = "smc91x-regs",
  290. .start = 0x20300300,
  291. .end = 0x20300300 + 16,
  292. .flags = IORESOURCE_MEM,
  293. }, {
  294. .start = IRQ_PF7,
  295. .end = IRQ_PF7,
  296. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  297. },
  298. };
  299. static struct platform_device smc91x_device = {
  300. .name = "smc91x",
  301. .id = 0,
  302. .num_resources = ARRAY_SIZE(smc91x_resources),
  303. .resource = smc91x_resources,
  304. .dev = {
  305. .platform_data = &smc91x_info,
  306. },
  307. };
  308. #endif
  309. #if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
  310. static struct resource dm9000_resources[] = {
  311. [0] = {
  312. .start = 0x203FB800,
  313. .end = 0x203FB800 + 1,
  314. .flags = IORESOURCE_MEM,
  315. },
  316. [1] = {
  317. .start = 0x203FB800 + 4,
  318. .end = 0x203FB800 + 5,
  319. .flags = IORESOURCE_MEM,
  320. },
  321. [2] = {
  322. .start = IRQ_PF9,
  323. .end = IRQ_PF9,
  324. .flags = (IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE),
  325. },
  326. };
  327. static struct platform_device dm9000_device = {
  328. .name = "dm9000",
  329. .id = -1,
  330. .num_resources = ARRAY_SIZE(dm9000_resources),
  331. .resource = dm9000_resources,
  332. };
  333. #endif
  334. #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
  335. #include <linux/bfin_mac.h>
  336. static const unsigned short bfin_mac_peripherals[] = P_RMII0;
  337. static struct bfin_phydev_platform_data bfin_phydev_data[] = {
  338. {
  339. .addr = 1,
  340. .irq = IRQ_MAC_PHYINT,
  341. },
  342. };
  343. static struct bfin_mii_bus_platform_data bfin_mii_bus_data = {
  344. .phydev_number = 1,
  345. .phydev_data = bfin_phydev_data,
  346. .phy_mode = PHY_INTERFACE_MODE_RMII,
  347. .mac_peripherals = bfin_mac_peripherals,
  348. };
  349. static struct platform_device bfin_mii_bus = {
  350. .name = "bfin_mii_bus",
  351. .dev = {
  352. .platform_data = &bfin_mii_bus_data,
  353. }
  354. };
  355. static struct platform_device bfin_mac_device = {
  356. .name = "bfin_mac",
  357. .dev = {
  358. .platform_data = &bfin_mii_bus,
  359. }
  360. };
  361. #endif
  362. #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
  363. static struct resource net2272_bfin_resources[] = {
  364. {
  365. .start = 0x20300000,
  366. .end = 0x20300000 + 0x100,
  367. .flags = IORESOURCE_MEM,
  368. }, {
  369. .start = IRQ_PF7,
  370. .end = IRQ_PF7,
  371. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  372. },
  373. };
  374. static struct platform_device net2272_bfin_device = {
  375. .name = "net2272",
  376. .id = -1,
  377. .num_resources = ARRAY_SIZE(net2272_bfin_resources),
  378. .resource = net2272_bfin_resources,
  379. };
  380. #endif
  381. #if defined(CONFIG_MTD_M25P80) \
  382. || defined(CONFIG_MTD_M25P80_MODULE)
  383. static struct mtd_partition bfin_spi_flash_partitions[] = {
  384. {
  385. .name = "bootloader(spi)",
  386. .size = 0x00040000,
  387. .offset = 0,
  388. .mask_flags = MTD_CAP_ROM
  389. }, {
  390. .name = "linux kernel(spi)",
  391. .size = MTDPART_SIZ_FULL,
  392. .offset = MTDPART_OFS_APPEND,
  393. }
  394. };
  395. static struct flash_platform_data bfin_spi_flash_data = {
  396. .name = "m25p80",
  397. .parts = bfin_spi_flash_partitions,
  398. .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
  399. .type = "m25p16",
  400. };
  401. /* SPI flash chip (m25p64) */
  402. static struct bfin5xx_spi_chip spi_flash_chip_info = {
  403. .enable_dma = 0, /* use dma transfer with this chip*/
  404. .bits_per_word = 8,
  405. };
  406. #endif
  407. #if defined(CONFIG_BFIN_SPI_ADC) \
  408. || defined(CONFIG_BFIN_SPI_ADC_MODULE)
  409. /* SPI ADC chip */
  410. static struct bfin5xx_spi_chip spi_adc_chip_info = {
  411. .enable_dma = 1, /* use dma transfer with this chip*/
  412. .bits_per_word = 16,
  413. };
  414. #endif
  415. #if defined(CONFIG_SND_BF5XX_SOC_AD183X) \
  416. || defined(CONFIG_SND_BF5XX_SOC_AD183X_MODULE)
  417. static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
  418. .enable_dma = 0,
  419. .bits_per_word = 16,
  420. };
  421. #endif
  422. #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
  423. static struct bfin5xx_spi_chip mmc_spi_chip_info = {
  424. .enable_dma = 0,
  425. .bits_per_word = 8,
  426. };
  427. #endif
  428. #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
  429. static struct bfin5xx_spi_chip spi_ad7877_chip_info = {
  430. .enable_dma = 0,
  431. .bits_per_word = 16,
  432. };
  433. static const struct ad7877_platform_data bfin_ad7877_ts_info = {
  434. .model = 7877,
  435. .vref_delay_usecs = 50, /* internal, no capacitor */
  436. .x_plate_ohms = 419,
  437. .y_plate_ohms = 486,
  438. .pressure_max = 1000,
  439. .pressure_min = 0,
  440. .stopacq_polarity = 1,
  441. .first_conversion_delay = 3,
  442. .acquisition_time = 1,
  443. .averaging = 1,
  444. .pen_down_acc_interval = 1,
  445. };
  446. #endif
  447. #if defined(CONFIG_TOUCHSCREEN_AD7879) || defined(CONFIG_TOUCHSCREEN_AD7879_MODULE)
  448. #include <linux/spi/ad7879.h>
  449. static const struct ad7879_platform_data bfin_ad7879_ts_info = {
  450. .model = 7879, /* Model = AD7879 */
  451. .x_plate_ohms = 620, /* 620 Ohm from the touch datasheet */
  452. .pressure_max = 10000,
  453. .pressure_min = 0,
  454. .first_conversion_delay = 3, /* wait 512us before do a first conversion */
  455. .acquisition_time = 1, /* 4us acquisition time per sample */
  456. .median = 2, /* do 8 measurements */
  457. .averaging = 1, /* take the average of 4 middle samples */
  458. .pen_down_acc_interval = 255, /* 9.4 ms */
  459. .gpio_export = 0, /* Export GPIO to gpiolib */
  460. };
  461. #endif
  462. #if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) || defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE)
  463. static struct bfin5xx_spi_chip spi_ad7879_chip_info = {
  464. .enable_dma = 0,
  465. .bits_per_word = 16,
  466. };
  467. #endif
  468. #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
  469. static struct bfin5xx_spi_chip spidev_chip_info = {
  470. .enable_dma = 0,
  471. .bits_per_word = 8,
  472. };
  473. #endif
  474. #if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE)
  475. static struct platform_device bfin_i2s = {
  476. .name = "bfin-i2s",
  477. .id = CONFIG_SND_BF5XX_SPORT_NUM,
  478. /* TODO: add platform data here */
  479. };
  480. #endif
  481. #if defined(CONFIG_SND_BF5XX_TDM) || defined(CONFIG_SND_BF5XX_TDM_MODULE)
  482. static struct platform_device bfin_tdm = {
  483. .name = "bfin-tdm",
  484. .id = CONFIG_SND_BF5XX_SPORT_NUM,
  485. /* TODO: add platform data here */
  486. };
  487. #endif
  488. #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
  489. static struct bfin5xx_spi_chip lq035q1_spi_chip_info = {
  490. .enable_dma = 0,
  491. .bits_per_word = 8,
  492. };
  493. #endif
  494. static struct spi_board_info bfin_spi_board_info[] __initdata = {
  495. #if defined(CONFIG_MTD_M25P80) \
  496. || defined(CONFIG_MTD_M25P80_MODULE)
  497. {
  498. /* the modalias must be the same as spi device driver name */
  499. .modalias = "m25p80", /* Name of spi_driver for this device */
  500. .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
  501. .bus_num = 0, /* Framework bus number */
  502. .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
  503. .platform_data = &bfin_spi_flash_data,
  504. .controller_data = &spi_flash_chip_info,
  505. .mode = SPI_MODE_3,
  506. },
  507. #endif
  508. #if defined(CONFIG_BFIN_SPI_ADC) \
  509. || defined(CONFIG_BFIN_SPI_ADC_MODULE)
  510. {
  511. .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
  512. .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */
  513. .bus_num = 0, /* Framework bus number */
  514. .chip_select = 1, /* Framework chip select. */
  515. .platform_data = NULL, /* No spi_driver specific config */
  516. .controller_data = &spi_adc_chip_info,
  517. },
  518. #endif
  519. #if defined(CONFIG_SND_BF5XX_SOC_AD183X) \
  520. || defined(CONFIG_SND_BF5XX_SOC_AD183X_MODULE)
  521. {
  522. .modalias = "ad183x",
  523. .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
  524. .bus_num = 0,
  525. .chip_select = 4,
  526. .controller_data = &ad1836_spi_chip_info,
  527. },
  528. #endif
  529. #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
  530. {
  531. .modalias = "mmc_spi",
  532. .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
  533. .bus_num = 0,
  534. .chip_select = 3,
  535. .controller_data = &mmc_spi_chip_info,
  536. .mode = SPI_MODE_0,
  537. },
  538. #endif
  539. #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
  540. {
  541. .modalias = "ad7877",
  542. .platform_data = &bfin_ad7877_ts_info,
  543. .irq = IRQ_PF8,
  544. .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
  545. .bus_num = 0,
  546. .chip_select = 2,
  547. .controller_data = &spi_ad7877_chip_info,
  548. },
  549. #endif
  550. #if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) || defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE)
  551. {
  552. .modalias = "ad7879",
  553. .platform_data = &bfin_ad7879_ts_info,
  554. .irq = IRQ_PF8,
  555. .max_speed_hz = 5000000, /* max spi clock (SCK) speed in HZ */
  556. .bus_num = 0,
  557. .chip_select = 3,
  558. .controller_data = &spi_ad7879_chip_info,
  559. .mode = SPI_CPHA | SPI_CPOL,
  560. },
  561. #endif
  562. #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
  563. {
  564. .modalias = "spidev",
  565. .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
  566. .bus_num = 0,
  567. .chip_select = 1,
  568. .controller_data = &spidev_chip_info,
  569. },
  570. #endif
  571. #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
  572. {
  573. .modalias = "bfin-lq035q1-spi",
  574. .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
  575. .bus_num = 0,
  576. .chip_select = 7,
  577. .controller_data = &lq035q1_spi_chip_info,
  578. .mode = SPI_CPHA | SPI_CPOL,
  579. },
  580. #endif
  581. };
  582. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  583. /* SPI controller data */
  584. static struct bfin5xx_spi_master bfin_spi0_info = {
  585. .num_chipselect = 8,
  586. .enable_dma = 1, /* master has the ability to do dma transfer */
  587. .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
  588. };
  589. /* SPI (0) */
  590. static struct resource bfin_spi0_resource[] = {
  591. [0] = {
  592. .start = SPI0_REGBASE,
  593. .end = SPI0_REGBASE + 0xFF,
  594. .flags = IORESOURCE_MEM,
  595. },
  596. [1] = {
  597. .start = CH_SPI,
  598. .end = CH_SPI,
  599. .flags = IORESOURCE_DMA,
  600. },
  601. [2] = {
  602. .start = IRQ_SPI,
  603. .end = IRQ_SPI,
  604. .flags = IORESOURCE_IRQ,
  605. },
  606. };
  607. static struct platform_device bfin_spi0_device = {
  608. .name = "bfin-spi",
  609. .id = 0, /* Bus number */
  610. .num_resources = ARRAY_SIZE(bfin_spi0_resource),
  611. .resource = bfin_spi0_resource,
  612. .dev = {
  613. .platform_data = &bfin_spi0_info, /* Passed to driver */
  614. },
  615. };
  616. #endif /* spi master and devices */
  617. #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
  618. #ifdef CONFIG_SERIAL_BFIN_UART0
  619. static struct resource bfin_uart0_resources[] = {
  620. {
  621. .start = UART0_THR,
  622. .end = UART0_GCTL+2,
  623. .flags = IORESOURCE_MEM,
  624. },
  625. {
  626. .start = IRQ_UART0_RX,
  627. .end = IRQ_UART0_RX+1,
  628. .flags = IORESOURCE_IRQ,
  629. },
  630. {
  631. .start = IRQ_UART0_ERROR,
  632. .end = IRQ_UART0_ERROR,
  633. .flags = IORESOURCE_IRQ,
  634. },
  635. {
  636. .start = CH_UART0_TX,
  637. .end = CH_UART0_TX,
  638. .flags = IORESOURCE_DMA,
  639. },
  640. {
  641. .start = CH_UART0_RX,
  642. .end = CH_UART0_RX,
  643. .flags = IORESOURCE_DMA,
  644. },
  645. };
  646. unsigned short bfin_uart0_peripherals[] = {
  647. P_UART0_TX, P_UART0_RX, 0
  648. };
  649. static struct platform_device bfin_uart0_device = {
  650. .name = "bfin-uart",
  651. .id = 0,
  652. .num_resources = ARRAY_SIZE(bfin_uart0_resources),
  653. .resource = bfin_uart0_resources,
  654. .dev = {
  655. .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
  656. },
  657. };
  658. #endif
  659. #ifdef CONFIG_SERIAL_BFIN_UART1
  660. static struct resource bfin_uart1_resources[] = {
  661. {
  662. .start = UART1_THR,
  663. .end = UART1_GCTL+2,
  664. .flags = IORESOURCE_MEM,
  665. },
  666. {
  667. .start = IRQ_UART1_RX,
  668. .end = IRQ_UART1_RX+1,
  669. .flags = IORESOURCE_IRQ,
  670. },
  671. {
  672. .start = IRQ_UART1_ERROR,
  673. .end = IRQ_UART1_ERROR,
  674. .flags = IORESOURCE_IRQ,
  675. },
  676. {
  677. .start = CH_UART1_TX,
  678. .end = CH_UART1_TX,
  679. .flags = IORESOURCE_DMA,
  680. },
  681. {
  682. .start = CH_UART1_RX,
  683. .end = CH_UART1_RX,
  684. .flags = IORESOURCE_DMA,
  685. },
  686. #ifdef CONFIG_BFIN_UART1_CTSRTS
  687. { /* CTS pin */
  688. .start = GPIO_PF9,
  689. .end = GPIO_PF9,
  690. .flags = IORESOURCE_IO,
  691. },
  692. { /* RTS pin */
  693. .start = GPIO_PF10,
  694. .end = GPIO_PF10,
  695. .flags = IORESOURCE_IO,
  696. },
  697. #endif
  698. };
  699. unsigned short bfin_uart1_peripherals[] = {
  700. P_UART1_TX, P_UART1_RX, 0
  701. };
  702. static struct platform_device bfin_uart1_device = {
  703. .name = "bfin-uart",
  704. .id = 1,
  705. .num_resources = ARRAY_SIZE(bfin_uart1_resources),
  706. .resource = bfin_uart1_resources,
  707. .dev = {
  708. .platform_data = &bfin_uart1_peripherals, /* Passed to driver */
  709. },
  710. };
  711. #endif
  712. #endif
  713. #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
  714. #ifdef CONFIG_BFIN_SIR0
  715. static struct resource bfin_sir0_resources[] = {
  716. {
  717. .start = 0xFFC00400,
  718. .end = 0xFFC004FF,
  719. .flags = IORESOURCE_MEM,
  720. },
  721. {
  722. .start = IRQ_UART0_RX,
  723. .end = IRQ_UART0_RX+1,
  724. .flags = IORESOURCE_IRQ,
  725. },
  726. {
  727. .start = CH_UART0_RX,
  728. .end = CH_UART0_RX+1,
  729. .flags = IORESOURCE_DMA,
  730. },
  731. };
  732. static struct platform_device bfin_sir0_device = {
  733. .name = "bfin_sir",
  734. .id = 0,
  735. .num_resources = ARRAY_SIZE(bfin_sir0_resources),
  736. .resource = bfin_sir0_resources,
  737. };
  738. #endif
  739. #ifdef CONFIG_BFIN_SIR1
  740. static struct resource bfin_sir1_resources[] = {
  741. {
  742. .start = 0xFFC02000,
  743. .end = 0xFFC020FF,
  744. .flags = IORESOURCE_MEM,
  745. },
  746. {
  747. .start = IRQ_UART1_RX,
  748. .end = IRQ_UART1_RX+1,
  749. .flags = IORESOURCE_IRQ,
  750. },
  751. {
  752. .start = CH_UART1_RX,
  753. .end = CH_UART1_RX+1,
  754. .flags = IORESOURCE_DMA,
  755. },
  756. };
  757. static struct platform_device bfin_sir1_device = {
  758. .name = "bfin_sir",
  759. .id = 1,
  760. .num_resources = ARRAY_SIZE(bfin_sir1_resources),
  761. .resource = bfin_sir1_resources,
  762. };
  763. #endif
  764. #endif
  765. #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
  766. static struct resource bfin_twi0_resource[] = {
  767. [0] = {
  768. .start = TWI0_REGBASE,
  769. .end = TWI0_REGBASE,
  770. .flags = IORESOURCE_MEM,
  771. },
  772. [1] = {
  773. .start = IRQ_TWI,
  774. .end = IRQ_TWI,
  775. .flags = IORESOURCE_IRQ,
  776. },
  777. };
  778. static struct platform_device i2c_bfin_twi_device = {
  779. .name = "i2c-bfin-twi",
  780. .id = 0,
  781. .num_resources = ARRAY_SIZE(bfin_twi0_resource),
  782. .resource = bfin_twi0_resource,
  783. };
  784. #endif
  785. #if defined(CONFIG_PMIC_ADP5520) || defined(CONFIG_PMIC_ADP5520_MODULE)
  786. #include <linux/mfd/adp5520.h>
  787. /*
  788. * ADP5520/5501 LEDs Data
  789. */
  790. static struct led_info adp5520_leds[] = {
  791. {
  792. .name = "adp5520-led1",
  793. .default_trigger = "none",
  794. .flags = FLAG_ID_ADP5520_LED1_ADP5501_LED0 | ADP5520_LED_OFFT_600ms,
  795. },
  796. };
  797. static struct adp5520_leds_platform_data adp5520_leds_data = {
  798. .num_leds = ARRAY_SIZE(adp5520_leds),
  799. .leds = adp5520_leds,
  800. .fade_in = ADP5520_FADE_T_600ms,
  801. .fade_out = ADP5520_FADE_T_600ms,
  802. .led_on_time = ADP5520_LED_ONT_600ms,
  803. };
  804. /*
  805. * ADP5520 Keypad Data
  806. */
  807. static const unsigned short adp5520_keymap[ADP5520_KEYMAPSIZE] = {
  808. [ADP5520_KEY(3, 3)] = KEY_1,
  809. [ADP5520_KEY(2, 3)] = KEY_2,
  810. [ADP5520_KEY(1, 3)] = KEY_3,
  811. [ADP5520_KEY(0, 3)] = KEY_UP,
  812. [ADP5520_KEY(3, 2)] = KEY_4,
  813. [ADP5520_KEY(2, 2)] = KEY_5,
  814. [ADP5520_KEY(1, 2)] = KEY_6,
  815. [ADP5520_KEY(0, 2)] = KEY_DOWN,
  816. [ADP5520_KEY(3, 1)] = KEY_7,
  817. [ADP5520_KEY(2, 1)] = KEY_8,
  818. [ADP5520_KEY(1, 1)] = KEY_9,
  819. [ADP5520_KEY(0, 1)] = KEY_DOT,
  820. [ADP5520_KEY(3, 0)] = KEY_BACKSPACE,
  821. [ADP5520_KEY(2, 0)] = KEY_0,
  822. [ADP5520_KEY(1, 0)] = KEY_HELP,
  823. [ADP5520_KEY(0, 0)] = KEY_ENTER,
  824. };
  825. static struct adp5520_keys_platform_data adp5520_keys_data = {
  826. .rows_en_mask = ADP5520_ROW_R3 | ADP5520_ROW_R2 | ADP5520_ROW_R1 | ADP5520_ROW_R0,
  827. .cols_en_mask = ADP5520_COL_C3 | ADP5520_COL_C2 | ADP5520_COL_C1 | ADP5520_COL_C0,
  828. .keymap = adp5520_keymap,
  829. .keymapsize = ARRAY_SIZE(adp5520_keymap),
  830. .repeat = 0,
  831. };
  832. /*
  833. * ADP5520/5501 Multifunction Device Init Data
  834. */
  835. static struct adp5520_platform_data adp5520_pdev_data = {
  836. .leds = &adp5520_leds_data,
  837. .keys = &adp5520_keys_data,
  838. };
  839. #endif
  840. static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
  841. #if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_BFIN_TWI_LCD_MODULE)
  842. {
  843. I2C_BOARD_INFO("pcf8574_lcd", 0x22),
  844. },
  845. #endif
  846. #if defined(CONFIG_INPUT_PCF8574) || defined(CONFIG_INPUT_PCF8574_MODULE)
  847. {
  848. I2C_BOARD_INFO("pcf8574_keypad", 0x27),
  849. .irq = IRQ_PF8,
  850. },
  851. #endif
  852. #if defined(CONFIG_FB_BFIN_7393) || defined(CONFIG_FB_BFIN_7393_MODULE)
  853. {
  854. I2C_BOARD_INFO("bfin-adv7393", 0x2B),
  855. },
  856. #endif
  857. #if defined(CONFIG_TOUCHSCREEN_AD7879_I2C) || defined(CONFIG_TOUCHSCREEN_AD7879_I2C_MODULE)
  858. {
  859. I2C_BOARD_INFO("ad7879", 0x2C),
  860. .irq = IRQ_PF8,
  861. .platform_data = (void *)&bfin_ad7879_ts_info,
  862. },
  863. #endif
  864. #if defined(CONFIG_PMIC_ADP5520) || defined(CONFIG_PMIC_ADP5520_MODULE)
  865. {
  866. I2C_BOARD_INFO("pmic-adp5520", 0x32),
  867. .irq = IRQ_PF9,
  868. .platform_data = (void *)&adp5520_pdev_data,
  869. },
  870. #endif
  871. #if defined(CONFIG_SND_SOC_SSM2602) || defined(CONFIG_SND_SOC_SSM2602_MODULE)
  872. {
  873. I2C_BOARD_INFO("ssm2602", 0x1b),
  874. },
  875. #endif
  876. #if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_BFIN_TWI_LCD_MODULE)
  877. {
  878. I2C_BOARD_INFO("ad5252", 0x2f),
  879. },
  880. #endif
  881. };
  882. #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
  883. #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
  884. static struct resource bfin_sport0_uart_resources[] = {
  885. {
  886. .start = SPORT0_TCR1,
  887. .end = SPORT0_MRCS3+4,
  888. .flags = IORESOURCE_MEM,
  889. },
  890. {
  891. .start = IRQ_SPORT0_RX,
  892. .end = IRQ_SPORT0_RX+1,
  893. .flags = IORESOURCE_IRQ,
  894. },
  895. {
  896. .start = IRQ_SPORT0_ERROR,
  897. .end = IRQ_SPORT0_ERROR,
  898. .flags = IORESOURCE_IRQ,
  899. },
  900. };
  901. unsigned short bfin_sport0_peripherals[] = {
  902. P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
  903. P_SPORT0_DRPRI, P_SPORT0_RSCLK, P_SPORT0_DRSEC, P_SPORT0_DTSEC, 0
  904. };
  905. static struct platform_device bfin_sport0_uart_device = {
  906. .name = "bfin-sport-uart",
  907. .id = 0,
  908. .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
  909. .resource = bfin_sport0_uart_resources,
  910. .dev = {
  911. .platform_data = &bfin_sport0_peripherals, /* Passed to driver */
  912. },
  913. };
  914. #endif
  915. #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
  916. static struct resource bfin_sport1_uart_resources[] = {
  917. {
  918. .start = SPORT1_TCR1,
  919. .end = SPORT1_MRCS3+4,
  920. .flags = IORESOURCE_MEM,
  921. },
  922. {
  923. .start = IRQ_SPORT1_RX,
  924. .end = IRQ_SPORT1_RX+1,
  925. .flags = IORESOURCE_IRQ,
  926. },
  927. {
  928. .start = IRQ_SPORT1_ERROR,
  929. .end = IRQ_SPORT1_ERROR,
  930. .flags = IORESOURCE_IRQ,
  931. },
  932. };
  933. unsigned short bfin_sport1_peripherals[] = {
  934. P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
  935. P_SPORT1_DRPRI, P_SPORT1_RSCLK, P_SPORT1_DRSEC, P_SPORT1_DTSEC, 0
  936. };
  937. static struct platform_device bfin_sport1_uart_device = {
  938. .name = "bfin-sport-uart",
  939. .id = 1,
  940. .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
  941. .resource = bfin_sport1_uart_resources,
  942. .dev = {
  943. .platform_data = &bfin_sport1_peripherals, /* Passed to driver */
  944. },
  945. };
  946. #endif
  947. #endif
  948. #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
  949. #include <linux/gpio_keys.h>
  950. static struct gpio_keys_button bfin_gpio_keys_table[] = {
  951. {BTN_0, GPIO_PG0, 1, "gpio-keys: BTN0"},
  952. {BTN_1, GPIO_PG13, 1, "gpio-keys: BTN1"},
  953. };
  954. static struct gpio_keys_platform_data bfin_gpio_keys_data = {
  955. .buttons = bfin_gpio_keys_table,
  956. .nbuttons = ARRAY_SIZE(bfin_gpio_keys_table),
  957. };
  958. static struct platform_device bfin_device_gpiokeys = {
  959. .name = "gpio-keys",
  960. .dev = {
  961. .platform_data = &bfin_gpio_keys_data,
  962. },
  963. };
  964. #endif
  965. #if defined(CONFIG_INPUT_BFIN_ROTARY) || defined(CONFIG_INPUT_BFIN_ROTARY_MODULE)
  966. #include <asm/bfin_rotary.h>
  967. static struct bfin_rotary_platform_data bfin_rotary_data = {
  968. /*.rotary_up_key = KEY_UP,*/
  969. /*.rotary_down_key = KEY_DOWN,*/
  970. .rotary_rel_code = REL_WHEEL,
  971. .rotary_button_key = KEY_ENTER,
  972. .debounce = 10, /* 0..17 */
  973. .mode = ROT_QUAD_ENC | ROT_DEBE,
  974. };
  975. static struct resource bfin_rotary_resources[] = {
  976. {
  977. .start = IRQ_CNT,
  978. .end = IRQ_CNT,
  979. .flags = IORESOURCE_IRQ,
  980. },
  981. };
  982. static struct platform_device bfin_rotary_device = {
  983. .name = "bfin-rotary",
  984. .id = -1,
  985. .num_resources = ARRAY_SIZE(bfin_rotary_resources),
  986. .resource = bfin_rotary_resources,
  987. .dev = {
  988. .platform_data = &bfin_rotary_data,
  989. },
  990. };
  991. #endif
  992. static const unsigned int cclk_vlev_datasheet[] =
  993. {
  994. VRPAIR(VLEV_100, 400000000),
  995. VRPAIR(VLEV_105, 426000000),
  996. VRPAIR(VLEV_110, 500000000),
  997. VRPAIR(VLEV_115, 533000000),
  998. VRPAIR(VLEV_120, 600000000),
  999. };
  1000. static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
  1001. .tuple_tab = cclk_vlev_datasheet,
  1002. .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
  1003. .vr_settling_time = 25 /* us */,
  1004. };
  1005. static struct platform_device bfin_dpmc = {
  1006. .name = "bfin dpmc",
  1007. .dev = {
  1008. .platform_data = &bfin_dmpc_vreg_data,
  1009. },
  1010. };
  1011. static struct platform_device *stamp_devices[] __initdata = {
  1012. &bfin_dpmc,
  1013. #if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
  1014. &bf5xx_nand_device,
  1015. #endif
  1016. #if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
  1017. &bfin_pcmcia_cf_device,
  1018. #endif
  1019. #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
  1020. &rtc_device,
  1021. #endif
  1022. #if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE)
  1023. &bfin_isp1760_device,
  1024. #endif
  1025. #if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
  1026. &musb_device,
  1027. #endif
  1028. #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
  1029. &smc91x_device,
  1030. #endif
  1031. #if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
  1032. &dm9000_device,
  1033. #endif
  1034. #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
  1035. &bfin_mii_bus,
  1036. &bfin_mac_device,
  1037. #endif
  1038. #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
  1039. &net2272_bfin_device,
  1040. #endif
  1041. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  1042. &bfin_spi0_device,
  1043. #endif
  1044. #if defined(CONFIG_FB_BFIN_T350MCQB) || defined(CONFIG_FB_BFIN_T350MCQB_MODULE)
  1045. &bf52x_t350mcqb_device,
  1046. #endif
  1047. #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
  1048. &bfin_lq035q1_device,
  1049. #endif
  1050. #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
  1051. #ifdef CONFIG_SERIAL_BFIN_UART0
  1052. &bfin_uart0_device,
  1053. #endif
  1054. #ifdef CONFIG_SERIAL_BFIN_UART1
  1055. &bfin_uart1_device,
  1056. #endif
  1057. #endif
  1058. #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
  1059. #ifdef CONFIG_BFIN_SIR0
  1060. &bfin_sir0_device,
  1061. #endif
  1062. #ifdef CONFIG_BFIN_SIR1
  1063. &bfin_sir1_device,
  1064. #endif
  1065. #endif
  1066. #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
  1067. &i2c_bfin_twi_device,
  1068. #endif
  1069. #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
  1070. #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
  1071. &bfin_sport0_uart_device,
  1072. #endif
  1073. #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
  1074. &bfin_sport1_uart_device,
  1075. #endif
  1076. #endif
  1077. #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
  1078. &bfin_device_gpiokeys,
  1079. #endif
  1080. #if defined(CONFIG_INPUT_BFIN_ROTARY) || defined(CONFIG_INPUT_BFIN_ROTARY_MODULE)
  1081. &bfin_rotary_device,
  1082. #endif
  1083. #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
  1084. &ezkit_flash_device,
  1085. #endif
  1086. #if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE)
  1087. &bfin_i2s,
  1088. #endif
  1089. #if defined(CONFIG_SND_BF5XX_TDM) || defined(CONFIG_SND_BF5XX_TDM_MODULE)
  1090. &bfin_tdm,
  1091. #endif
  1092. };
  1093. static int __init ezkit_init(void)
  1094. {
  1095. printk(KERN_INFO "%s(): registering device resources\n", __func__);
  1096. i2c_register_board_info(0, bfin_i2c_board_info,
  1097. ARRAY_SIZE(bfin_i2c_board_info));
  1098. platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
  1099. spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
  1100. return 0;
  1101. }
  1102. arch_initcall(ezkit_init);
  1103. static struct platform_device *ezkit_early_devices[] __initdata = {
  1104. #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
  1105. #ifdef CONFIG_SERIAL_BFIN_UART0
  1106. &bfin_uart0_device,
  1107. #endif
  1108. #ifdef CONFIG_SERIAL_BFIN_UART1
  1109. &bfin_uart1_device,
  1110. #endif
  1111. #endif
  1112. #if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
  1113. #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
  1114. &bfin_sport0_uart_device,
  1115. #endif
  1116. #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
  1117. &bfin_sport1_uart_device,
  1118. #endif
  1119. #endif
  1120. };
  1121. void __init native_machine_early_platform_add_devices(void)
  1122. {
  1123. printk(KERN_INFO "register early platform devices\n");
  1124. early_platform_add_devices(ezkit_early_devices,
  1125. ARRAY_SIZE(ezkit_early_devices));
  1126. }
  1127. void native_machine_restart(char *cmd)
  1128. {
  1129. /* workaround reboot hang when booting from SPI */
  1130. if ((bfin_read_SYSCR() & 0x7) == 0x3)
  1131. bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS);
  1132. }
  1133. void bfin_get_ether_addr(char *addr)
  1134. {
  1135. /* the MAC is stored in OTP memory page 0xDF */
  1136. u32 ret;
  1137. u64 otp_mac;
  1138. u32 (*otp_read)(u32 page, u32 flags, u64 *page_content) = (void *)0xEF00001A;
  1139. ret = otp_read(0xDF, 0x00, &otp_mac);
  1140. if (!(ret & 0x1)) {
  1141. char *otp_mac_p = (char *)&otp_mac;
  1142. for (ret = 0; ret < 6; ++ret)
  1143. addr[ret] = otp_mac_p[5 - ret];
  1144. }
  1145. }
  1146. EXPORT_SYMBOL(bfin_get_ether_addr);