ad7160eval.c 20 KB

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  1. /*
  2. * Copyright 2004-20010 Analog Devices Inc.
  3. * 2005 National ICT Australia (NICTA)
  4. * Aidan Williams <aidan@nicta.com.au>
  5. *
  6. * Licensed under the GPL-2 or later.
  7. */
  8. #include <linux/device.h>
  9. #include <linux/platform_device.h>
  10. #include <linux/mtd/mtd.h>
  11. #include <linux/mtd/partitions.h>
  12. #include <linux/mtd/physmap.h>
  13. #include <linux/spi/spi.h>
  14. #include <linux/spi/flash.h>
  15. #include <linux/i2c.h>
  16. #include <linux/irq.h>
  17. #include <linux/interrupt.h>
  18. #include <linux/usb/musb.h>
  19. #include <linux/leds.h>
  20. #include <linux/input.h>
  21. #include <asm/dma.h>
  22. #include <asm/bfin5xx_spi.h>
  23. #include <asm/reboot.h>
  24. #include <asm/nand.h>
  25. #include <asm/portmux.h>
  26. #include <asm/dpmc.h>
  27. /*
  28. * Name the Board for the /proc/cpuinfo
  29. */
  30. const char bfin_board_name[] = "ADI BF527-AD7160EVAL";
  31. /*
  32. * Driver needs to know address, irq and flag pin.
  33. */
  34. #if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
  35. static struct resource musb_resources[] = {
  36. [0] = {
  37. .start = 0xffc03800,
  38. .end = 0xffc03cff,
  39. .flags = IORESOURCE_MEM,
  40. },
  41. [1] = { /* general IRQ */
  42. .start = IRQ_USB_INT0,
  43. .end = IRQ_USB_INT0,
  44. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  45. },
  46. [2] = { /* DMA IRQ */
  47. .start = IRQ_USB_DMA,
  48. .end = IRQ_USB_DMA,
  49. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  50. },
  51. };
  52. static struct musb_hdrc_config musb_config = {
  53. .multipoint = 0,
  54. .dyn_fifo = 0,
  55. .soft_con = 1,
  56. .dma = 1,
  57. .num_eps = 8,
  58. .dma_channels = 8,
  59. .gpio_vrsel = GPIO_PG13,
  60. /* Some custom boards need to be active low, just set it to "0"
  61. * if it is the case.
  62. */
  63. .gpio_vrsel_active = 1,
  64. };
  65. static struct musb_hdrc_platform_data musb_plat = {
  66. #if defined(CONFIG_USB_MUSB_OTG)
  67. .mode = MUSB_OTG,
  68. #elif defined(CONFIG_USB_MUSB_HDRC_HCD)
  69. .mode = MUSB_HOST,
  70. #elif defined(CONFIG_USB_GADGET_MUSB_HDRC)
  71. .mode = MUSB_PERIPHERAL,
  72. #endif
  73. .config = &musb_config,
  74. };
  75. static u64 musb_dmamask = ~(u32)0;
  76. static struct platform_device musb_device = {
  77. .name = "musb-blackfin",
  78. .id = 0,
  79. .dev = {
  80. .dma_mask = &musb_dmamask,
  81. .coherent_dma_mask = 0xffffffff,
  82. .platform_data = &musb_plat,
  83. },
  84. .num_resources = ARRAY_SIZE(musb_resources),
  85. .resource = musb_resources,
  86. };
  87. #endif
  88. #if defined(CONFIG_FB_BFIN_RA158Z) || defined(CONFIG_FB_BFIN_RA158Z_MODULE)
  89. static struct resource bf52x_ra158z_resources[] = {
  90. {
  91. .start = IRQ_PPI_ERROR,
  92. .end = IRQ_PPI_ERROR,
  93. .flags = IORESOURCE_IRQ,
  94. },
  95. };
  96. static struct platform_device bf52x_ra158z_device = {
  97. .name = "bfin-ra158z",
  98. .id = -1,
  99. .num_resources = ARRAY_SIZE(bf52x_ra158z_resources),
  100. .resource = bf52x_ra158z_resources,
  101. };
  102. #endif
  103. #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
  104. static struct mtd_partition ad7160eval_partitions[] = {
  105. {
  106. .name = "bootloader(nor)",
  107. .size = 0x40000,
  108. .offset = 0,
  109. }, {
  110. .name = "linux kernel(nor)",
  111. .size = 0x1C0000,
  112. .offset = MTDPART_OFS_APPEND,
  113. }, {
  114. .name = "file system(nor)",
  115. .size = MTDPART_SIZ_FULL,
  116. .offset = MTDPART_OFS_APPEND,
  117. }
  118. };
  119. static struct physmap_flash_data ad7160eval_flash_data = {
  120. .width = 2,
  121. .parts = ad7160eval_partitions,
  122. .nr_parts = ARRAY_SIZE(ad7160eval_partitions),
  123. };
  124. static struct resource ad7160eval_flash_resource = {
  125. .start = 0x20000000,
  126. .end = 0x203fffff,
  127. .flags = IORESOURCE_MEM,
  128. };
  129. static struct platform_device ad7160eval_flash_device = {
  130. .name = "physmap-flash",
  131. .id = 0,
  132. .dev = {
  133. .platform_data = &ad7160eval_flash_data,
  134. },
  135. .num_resources = 1,
  136. .resource = &ad7160eval_flash_resource,
  137. };
  138. #endif
  139. #if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
  140. static struct mtd_partition partition_info[] = {
  141. {
  142. .name = "linux kernel(nand)",
  143. .offset = 0,
  144. .size = 4 * 1024 * 1024,
  145. },
  146. {
  147. .name = "file system(nand)",
  148. .offset = MTDPART_OFS_APPEND,
  149. .size = MTDPART_SIZ_FULL,
  150. },
  151. };
  152. static struct bf5xx_nand_platform bf5xx_nand_platform = {
  153. .data_width = NFC_NWIDTH_8,
  154. .partitions = partition_info,
  155. .nr_partitions = ARRAY_SIZE(partition_info),
  156. .rd_dly = 3,
  157. .wr_dly = 3,
  158. };
  159. static struct resource bf5xx_nand_resources[] = {
  160. {
  161. .start = NFC_CTL,
  162. .end = NFC_DATA_RD + 2,
  163. .flags = IORESOURCE_MEM,
  164. },
  165. {
  166. .start = CH_NFC,
  167. .end = CH_NFC,
  168. .flags = IORESOURCE_IRQ,
  169. },
  170. };
  171. static struct platform_device bf5xx_nand_device = {
  172. .name = "bf5xx-nand",
  173. .id = 0,
  174. .num_resources = ARRAY_SIZE(bf5xx_nand_resources),
  175. .resource = bf5xx_nand_resources,
  176. .dev = {
  177. .platform_data = &bf5xx_nand_platform,
  178. },
  179. };
  180. #endif
  181. #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
  182. static struct platform_device rtc_device = {
  183. .name = "rtc-bfin",
  184. .id = -1,
  185. };
  186. #endif
  187. #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
  188. #include <linux/bfin_mac.h>
  189. static const unsigned short bfin_mac_peripherals[] = P_RMII0;
  190. static struct bfin_phydev_platform_data bfin_phydev_data[] = {
  191. {
  192. .addr = 1,
  193. .irq = IRQ_MAC_PHYINT,
  194. },
  195. };
  196. static struct bfin_mii_bus_platform_data bfin_mii_bus_data = {
  197. .phydev_number = 1,
  198. .phydev_data = bfin_phydev_data,
  199. .phy_mode = PHY_INTERFACE_MODE_RMII,
  200. .mac_peripherals = bfin_mac_peripherals,
  201. };
  202. static struct platform_device bfin_mii_bus = {
  203. .name = "bfin_mii_bus",
  204. .dev = {
  205. .platform_data = &bfin_mii_bus_data,
  206. }
  207. };
  208. static struct platform_device bfin_mac_device = {
  209. .name = "bfin_mac",
  210. .dev = {
  211. .platform_data = &bfin_mii_bus,
  212. }
  213. };
  214. #endif
  215. #if defined(CONFIG_MTD_M25P80) \
  216. || defined(CONFIG_MTD_M25P80_MODULE)
  217. static struct mtd_partition bfin_spi_flash_partitions[] = {
  218. {
  219. .name = "bootloader(spi)",
  220. .size = 0x00040000,
  221. .offset = 0,
  222. .mask_flags = MTD_CAP_ROM
  223. }, {
  224. .name = "linux kernel(spi)",
  225. .size = MTDPART_SIZ_FULL,
  226. .offset = MTDPART_OFS_APPEND,
  227. }
  228. };
  229. static struct flash_platform_data bfin_spi_flash_data = {
  230. .name = "m25p80",
  231. .parts = bfin_spi_flash_partitions,
  232. .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
  233. .type = "m25p16",
  234. };
  235. /* SPI flash chip (m25p64) */
  236. static struct bfin5xx_spi_chip spi_flash_chip_info = {
  237. .enable_dma = 0, /* use dma transfer with this chip*/
  238. .bits_per_word = 8,
  239. };
  240. #endif
  241. #if defined(CONFIG_SND_BF5XX_SOC_AD183X) \
  242. || defined(CONFIG_SND_BF5XX_SOC_AD183X_MODULE)
  243. static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
  244. .enable_dma = 0,
  245. .bits_per_word = 16,
  246. };
  247. #endif
  248. #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
  249. static struct bfin5xx_spi_chip mmc_spi_chip_info = {
  250. .enable_dma = 0,
  251. .bits_per_word = 8,
  252. };
  253. #endif
  254. #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
  255. static struct bfin5xx_spi_chip spidev_chip_info = {
  256. .enable_dma = 0,
  257. .bits_per_word = 8,
  258. };
  259. #endif
  260. #if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE)
  261. static struct platform_device bfin_i2s = {
  262. .name = "bfin-i2s",
  263. .id = CONFIG_SND_BF5XX_SPORT_NUM,
  264. /* TODO: add platform data here */
  265. };
  266. #endif
  267. #if defined(CONFIG_SND_BF5XX_TDM) || defined(CONFIG_SND_BF5XX_TDM_MODULE)
  268. static struct platform_device bfin_tdm = {
  269. .name = "bfin-tdm",
  270. .id = CONFIG_SND_BF5XX_SPORT_NUM,
  271. /* TODO: add platform data here */
  272. };
  273. #endif
  274. static struct spi_board_info bfin_spi_board_info[] __initdata = {
  275. #if defined(CONFIG_MTD_M25P80) \
  276. || defined(CONFIG_MTD_M25P80_MODULE)
  277. {
  278. /* the modalias must be the same as spi device driver name */
  279. .modalias = "m25p80", /* Name of spi_driver for this device */
  280. .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
  281. .bus_num = 0, /* Framework bus number */
  282. .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
  283. .platform_data = &bfin_spi_flash_data,
  284. .controller_data = &spi_flash_chip_info,
  285. .mode = SPI_MODE_3,
  286. },
  287. #endif
  288. #if defined(CONFIG_SND_BF5XX_SOC_AD183X) \
  289. || defined(CONFIG_SND_BF5XX_SOC_AD183X_MODULE)
  290. {
  291. .modalias = "ad183x",
  292. .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
  293. .bus_num = 0,
  294. .chip_select = 4,
  295. .controller_data = &ad1836_spi_chip_info,
  296. },
  297. #endif
  298. #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
  299. {
  300. .modalias = "mmc_spi",
  301. .max_speed_hz = 30000000, /* max spi clock (SCK) speed in HZ */
  302. .bus_num = 0,
  303. .chip_select = GPIO_PH3 + MAX_CTRL_CS,
  304. .controller_data = &mmc_spi_chip_info,
  305. .mode = SPI_MODE_3,
  306. },
  307. #endif
  308. #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
  309. {
  310. .modalias = "spidev",
  311. .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
  312. .bus_num = 0,
  313. .chip_select = 1,
  314. .controller_data = &spidev_chip_info,
  315. },
  316. #endif
  317. };
  318. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  319. /* SPI controller data */
  320. static struct bfin5xx_spi_master bfin_spi0_info = {
  321. .num_chipselect = MAX_CTRL_CS + MAX_BLACKFIN_GPIOS,
  322. .enable_dma = 1, /* master has the ability to do dma transfer */
  323. .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
  324. };
  325. /* SPI (0) */
  326. static struct resource bfin_spi0_resource[] = {
  327. [0] = {
  328. .start = SPI0_REGBASE,
  329. .end = SPI0_REGBASE + 0xFF,
  330. .flags = IORESOURCE_MEM,
  331. },
  332. [1] = {
  333. .start = CH_SPI,
  334. .end = CH_SPI,
  335. .flags = IORESOURCE_DMA,
  336. },
  337. [2] = {
  338. .start = IRQ_SPI,
  339. .end = IRQ_SPI,
  340. .flags = IORESOURCE_IRQ,
  341. },
  342. };
  343. static struct platform_device bfin_spi0_device = {
  344. .name = "bfin-spi",
  345. .id = 0, /* Bus number */
  346. .num_resources = ARRAY_SIZE(bfin_spi0_resource),
  347. .resource = bfin_spi0_resource,
  348. .dev = {
  349. .platform_data = &bfin_spi0_info, /* Passed to driver */
  350. },
  351. };
  352. #endif /* spi master and devices */
  353. #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
  354. #ifdef CONFIG_SERIAL_BFIN_UART0
  355. static struct resource bfin_uart0_resources[] = {
  356. {
  357. .start = UART0_THR,
  358. .end = UART0_GCTL+2,
  359. .flags = IORESOURCE_MEM,
  360. },
  361. {
  362. .start = IRQ_UART0_RX,
  363. .end = IRQ_UART0_RX+1,
  364. .flags = IORESOURCE_IRQ,
  365. },
  366. {
  367. .start = IRQ_UART0_ERROR,
  368. .end = IRQ_UART0_ERROR,
  369. .flags = IORESOURCE_IRQ,
  370. },
  371. {
  372. .start = CH_UART0_TX,
  373. .end = CH_UART0_TX,
  374. .flags = IORESOURCE_DMA,
  375. },
  376. {
  377. .start = CH_UART0_RX,
  378. .end = CH_UART0_RX,
  379. .flags = IORESOURCE_DMA,
  380. },
  381. };
  382. unsigned short bfin_uart0_peripherals[] = {
  383. P_UART0_TX, P_UART0_RX, 0
  384. };
  385. static struct platform_device bfin_uart0_device = {
  386. .name = "bfin-uart",
  387. .id = 0,
  388. .num_resources = ARRAY_SIZE(bfin_uart0_resources),
  389. .resource = bfin_uart0_resources,
  390. .dev = {
  391. .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
  392. },
  393. };
  394. #endif
  395. #ifdef CONFIG_SERIAL_BFIN_UART1
  396. static struct resource bfin_uart1_resources[] = {
  397. {
  398. .start = UART1_THR,
  399. .end = UART1_GCTL+2,
  400. .flags = IORESOURCE_MEM,
  401. },
  402. {
  403. .start = IRQ_UART1_RX,
  404. .end = IRQ_UART1_RX+1,
  405. .flags = IORESOURCE_IRQ,
  406. },
  407. {
  408. .start = IRQ_UART1_ERROR,
  409. .end = IRQ_UART1_ERROR,
  410. .flags = IORESOURCE_IRQ,
  411. },
  412. {
  413. .start = CH_UART1_TX,
  414. .end = CH_UART1_TX,
  415. .flags = IORESOURCE_DMA,
  416. },
  417. {
  418. .start = CH_UART1_RX,
  419. .end = CH_UART1_RX,
  420. .flags = IORESOURCE_DMA,
  421. },
  422. #ifdef CONFIG_BFIN_UART1_CTSRTS
  423. { /* CTS pin */
  424. .start = GPIO_PF9,
  425. .end = GPIO_PF9,
  426. .flags = IORESOURCE_IO,
  427. },
  428. { /* RTS pin */
  429. .start = GPIO_PF10,
  430. .end = GPIO_PF10,
  431. .flags = IORESOURCE_IO,
  432. },
  433. #endif
  434. };
  435. unsigned short bfin_uart1_peripherals[] = {
  436. P_UART1_TX, P_UART1_RX, 0
  437. };
  438. static struct platform_device bfin_uart1_device = {
  439. .name = "bfin-uart",
  440. .id = 1,
  441. .num_resources = ARRAY_SIZE(bfin_uart1_resources),
  442. .resource = bfin_uart1_resources,
  443. .dev = {
  444. .platform_data = &bfin_uart1_peripherals, /* Passed to driver */
  445. },
  446. };
  447. #endif
  448. #endif
  449. #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
  450. #ifdef CONFIG_BFIN_SIR0
  451. static struct resource bfin_sir0_resources[] = {
  452. {
  453. .start = 0xFFC00400,
  454. .end = 0xFFC004FF,
  455. .flags = IORESOURCE_MEM,
  456. },
  457. {
  458. .start = IRQ_UART0_RX,
  459. .end = IRQ_UART0_RX+1,
  460. .flags = IORESOURCE_IRQ,
  461. },
  462. {
  463. .start = CH_UART0_RX,
  464. .end = CH_UART0_RX+1,
  465. .flags = IORESOURCE_DMA,
  466. },
  467. };
  468. static struct platform_device bfin_sir0_device = {
  469. .name = "bfin_sir",
  470. .id = 0,
  471. .num_resources = ARRAY_SIZE(bfin_sir0_resources),
  472. .resource = bfin_sir0_resources,
  473. };
  474. #endif
  475. #ifdef CONFIG_BFIN_SIR1
  476. static struct resource bfin_sir1_resources[] = {
  477. {
  478. .start = 0xFFC02000,
  479. .end = 0xFFC020FF,
  480. .flags = IORESOURCE_MEM,
  481. },
  482. {
  483. .start = IRQ_UART1_RX,
  484. .end = IRQ_UART1_RX+1,
  485. .flags = IORESOURCE_IRQ,
  486. },
  487. {
  488. .start = CH_UART1_RX,
  489. .end = CH_UART1_RX+1,
  490. .flags = IORESOURCE_DMA,
  491. },
  492. };
  493. static struct platform_device bfin_sir1_device = {
  494. .name = "bfin_sir",
  495. .id = 1,
  496. .num_resources = ARRAY_SIZE(bfin_sir1_resources),
  497. .resource = bfin_sir1_resources,
  498. };
  499. #endif
  500. #endif
  501. #if defined(CONFIG_TOUCHSCREEN_AD7160) || defined(CONFIG_TOUCHSCREEN_AD7160_MODULE)
  502. #include <linux/input/ad7160.h>
  503. static const struct ad7160_platform_data bfin_ad7160_ts_info = {
  504. .sensor_x_res = 854,
  505. .sensor_y_res = 480,
  506. .pressure = 100,
  507. .filter_coef = 3,
  508. .coord_pref = AD7160_ORIG_TOP_LEFT,
  509. .first_touch_window = 5,
  510. .move_window = 3,
  511. .event_cabs = AD7160_EMIT_ABS_MT_TRACKING_ID |
  512. AD7160_EMIT_ABS_MT_PRESSURE |
  513. AD7160_TRACKING_ID_ASCENDING,
  514. .finger_act_ctrl = 0x64,
  515. .haptic_effect1_ctrl = AD7160_HAPTIC_SLOT_A(60) |
  516. AD7160_HAPTIC_SLOT_A_LVL_HIGH |
  517. AD7160_HAPTIC_SLOT_B(60) |
  518. AD7160_HAPTIC_SLOT_B_LVL_LOW,
  519. .haptic_effect2_ctrl = AD7160_HAPTIC_SLOT_A(20) |
  520. AD7160_HAPTIC_SLOT_A_LVL_HIGH |
  521. AD7160_HAPTIC_SLOT_B(80) |
  522. AD7160_HAPTIC_SLOT_B_LVL_LOW |
  523. AD7160_HAPTIC_SLOT_C(120) |
  524. AD7160_HAPTIC_SLOT_C_LVL_HIGH |
  525. AD7160_HAPTIC_SLOT_D(30) |
  526. AD7160_HAPTIC_SLOT_D_LVL_LOW,
  527. };
  528. #endif
  529. #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
  530. static struct resource bfin_twi0_resource[] = {
  531. [0] = {
  532. .start = TWI0_REGBASE,
  533. .end = TWI0_REGBASE,
  534. .flags = IORESOURCE_MEM,
  535. },
  536. [1] = {
  537. .start = IRQ_TWI,
  538. .end = IRQ_TWI,
  539. .flags = IORESOURCE_IRQ,
  540. },
  541. };
  542. static struct platform_device i2c_bfin_twi_device = {
  543. .name = "i2c-bfin-twi",
  544. .id = 0,
  545. .num_resources = ARRAY_SIZE(bfin_twi0_resource),
  546. .resource = bfin_twi0_resource,
  547. };
  548. #endif
  549. static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
  550. #if defined(CONFIG_TOUCHSCREEN_AD7160) || defined(CONFIG_TOUCHSCREEN_AD7160_MODULE)
  551. {
  552. I2C_BOARD_INFO("ad7160", 0x33),
  553. .irq = IRQ_PH1,
  554. .platform_data = (void *)&bfin_ad7160_ts_info,
  555. },
  556. #endif
  557. };
  558. #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
  559. #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
  560. static struct resource bfin_sport0_uart_resources[] = {
  561. {
  562. .start = SPORT0_TCR1,
  563. .end = SPORT0_MRCS3+4,
  564. .flags = IORESOURCE_MEM,
  565. },
  566. {
  567. .start = IRQ_SPORT0_RX,
  568. .end = IRQ_SPORT0_RX+1,
  569. .flags = IORESOURCE_IRQ,
  570. },
  571. {
  572. .start = IRQ_SPORT0_ERROR,
  573. .end = IRQ_SPORT0_ERROR,
  574. .flags = IORESOURCE_IRQ,
  575. },
  576. };
  577. unsigned short bfin_sport0_peripherals[] = {
  578. P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
  579. P_SPORT0_DRPRI, P_SPORT0_RSCLK, P_SPORT0_DRSEC, P_SPORT0_DTSEC, 0
  580. };
  581. static struct platform_device bfin_sport0_uart_device = {
  582. .name = "bfin-sport-uart",
  583. .id = 0,
  584. .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
  585. .resource = bfin_sport0_uart_resources,
  586. .dev = {
  587. .platform_data = &bfin_sport0_peripherals, /* Passed to driver */
  588. },
  589. };
  590. #endif
  591. #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
  592. static struct resource bfin_sport1_uart_resources[] = {
  593. {
  594. .start = SPORT1_TCR1,
  595. .end = SPORT1_MRCS3+4,
  596. .flags = IORESOURCE_MEM,
  597. },
  598. {
  599. .start = IRQ_SPORT1_RX,
  600. .end = IRQ_SPORT1_RX+1,
  601. .flags = IORESOURCE_IRQ,
  602. },
  603. {
  604. .start = IRQ_SPORT1_ERROR,
  605. .end = IRQ_SPORT1_ERROR,
  606. .flags = IORESOURCE_IRQ,
  607. },
  608. };
  609. unsigned short bfin_sport1_peripherals[] = {
  610. P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
  611. P_SPORT1_DRPRI, P_SPORT1_RSCLK, P_SPORT1_DRSEC, P_SPORT1_DTSEC, 0
  612. };
  613. static struct platform_device bfin_sport1_uart_device = {
  614. .name = "bfin-sport-uart",
  615. .id = 1,
  616. .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
  617. .resource = bfin_sport1_uart_resources,
  618. .dev = {
  619. .platform_data = &bfin_sport1_peripherals, /* Passed to driver */
  620. },
  621. };
  622. #endif
  623. #endif
  624. #if defined(CONFIG_INPUT_BFIN_ROTARY) || defined(CONFIG_INPUT_BFIN_ROTARY_MODULE)
  625. #include <asm/bfin_rotary.h>
  626. static struct bfin_rotary_platform_data bfin_rotary_data = {
  627. /*.rotary_up_key = KEY_UP,*/
  628. /*.rotary_down_key = KEY_DOWN,*/
  629. .rotary_rel_code = REL_WHEEL,
  630. .rotary_button_key = KEY_ENTER,
  631. .debounce = 10, /* 0..17 */
  632. .mode = ROT_QUAD_ENC | ROT_DEBE,
  633. };
  634. static struct resource bfin_rotary_resources[] = {
  635. {
  636. .start = IRQ_CNT,
  637. .end = IRQ_CNT,
  638. .flags = IORESOURCE_IRQ,
  639. },
  640. };
  641. static struct platform_device bfin_rotary_device = {
  642. .name = "bfin-rotary",
  643. .id = -1,
  644. .num_resources = ARRAY_SIZE(bfin_rotary_resources),
  645. .resource = bfin_rotary_resources,
  646. .dev = {
  647. .platform_data = &bfin_rotary_data,
  648. },
  649. };
  650. #endif
  651. static const unsigned int cclk_vlev_datasheet[] = {
  652. VRPAIR(VLEV_100, 400000000),
  653. VRPAIR(VLEV_105, 426000000),
  654. VRPAIR(VLEV_110, 500000000),
  655. VRPAIR(VLEV_115, 533000000),
  656. VRPAIR(VLEV_120, 600000000),
  657. };
  658. static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
  659. .tuple_tab = cclk_vlev_datasheet,
  660. .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
  661. .vr_settling_time = 25 /* us */,
  662. };
  663. static struct platform_device bfin_dpmc = {
  664. .name = "bfin dpmc",
  665. .dev = {
  666. .platform_data = &bfin_dmpc_vreg_data,
  667. },
  668. };
  669. static struct platform_device *stamp_devices[] __initdata = {
  670. &bfin_dpmc,
  671. #if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
  672. &bf5xx_nand_device,
  673. #endif
  674. #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
  675. &rtc_device,
  676. #endif
  677. #if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
  678. &musb_device,
  679. #endif
  680. #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
  681. &bfin_mii_bus,
  682. &bfin_mac_device,
  683. #endif
  684. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  685. &bfin_spi0_device,
  686. #endif
  687. #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
  688. #ifdef CONFIG_SERIAL_BFIN_UART0
  689. &bfin_uart0_device,
  690. #endif
  691. #ifdef CONFIG_SERIAL_BFIN_UART1
  692. &bfin_uart1_device,
  693. #endif
  694. #endif
  695. #if defined(CONFIG_FB_BFIN_RA158Z) || defined(CONFIG_FB_BFIN_RA158Z_MODULE)
  696. &bf52x_ra158z_device,
  697. #endif
  698. #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
  699. #ifdef CONFIG_BFIN_SIR0
  700. &bfin_sir0_device,
  701. #endif
  702. #ifdef CONFIG_BFIN_SIR1
  703. &bfin_sir1_device,
  704. #endif
  705. #endif
  706. #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
  707. &i2c_bfin_twi_device,
  708. #endif
  709. #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
  710. #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
  711. &bfin_sport0_uart_device,
  712. #endif
  713. #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
  714. &bfin_sport1_uart_device,
  715. #endif
  716. #endif
  717. #if defined(CONFIG_INPUT_BFIN_ROTARY) || defined(CONFIG_INPUT_BFIN_ROTARY_MODULE)
  718. &bfin_rotary_device,
  719. #endif
  720. #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
  721. &ad7160eval_flash_device,
  722. #endif
  723. #if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE)
  724. &bfin_i2s,
  725. #endif
  726. #if defined(CONFIG_SND_BF5XX_TDM) || defined(CONFIG_SND_BF5XX_TDM_MODULE)
  727. &bfin_tdm,
  728. #endif
  729. };
  730. static int __init ad7160eval_init(void)
  731. {
  732. printk(KERN_INFO "%s(): registering device resources\n", __func__);
  733. i2c_register_board_info(0, bfin_i2c_board_info,
  734. ARRAY_SIZE(bfin_i2c_board_info));
  735. platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
  736. spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
  737. return 0;
  738. }
  739. arch_initcall(ad7160eval_init);
  740. static struct platform_device *ad7160eval_early_devices[] __initdata = {
  741. #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
  742. #ifdef CONFIG_SERIAL_BFIN_UART0
  743. &bfin_uart0_device,
  744. #endif
  745. #ifdef CONFIG_SERIAL_BFIN_UART1
  746. &bfin_uart1_device,
  747. #endif
  748. #endif
  749. #if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
  750. #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
  751. &bfin_sport0_uart_device,
  752. #endif
  753. #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
  754. &bfin_sport1_uart_device,
  755. #endif
  756. #endif
  757. };
  758. void __init native_machine_early_platform_add_devices(void)
  759. {
  760. printk(KERN_INFO "register early platform devices\n");
  761. early_platform_add_devices(ad7160eval_early_devices,
  762. ARRAY_SIZE(ad7160eval_early_devices));
  763. }
  764. void native_machine_restart(char *cmd)
  765. {
  766. /* workaround reboot hang when booting from SPI */
  767. if ((bfin_read_SYSCR() & 0x7) == 0x3)
  768. bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS);
  769. }
  770. void bfin_get_ether_addr(char *addr)
  771. {
  772. /* the MAC is stored in OTP memory page 0xDF */
  773. u32 ret;
  774. u64 otp_mac;
  775. u32 (*otp_read)(u32 page, u32 flags, u64 *page_content) = (void *)0xEF00001A;
  776. ret = otp_read(0xDF, 0x00, &otp_mac);
  777. if (!(ret & 0x1)) {
  778. char *otp_mac_p = (char *)&otp_mac;
  779. for (ret = 0; ret < 6; ++ret)
  780. addr[ret] = otp_mac_p[5 - ret];
  781. }
  782. }
  783. EXPORT_SYMBOL(bfin_get_ether_addr);