mantis_hif.c 6.0 KB

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  1. /*
  2. Mantis PCI bridge driver
  3. Copyright (C) 2005, 2006 Manu Abraham (abraham.manu@gmail.com)
  4. This program is free software; you can redistribute it and/or modify
  5. it under the terms of the GNU General Public License as published by
  6. the Free Software Foundation; either version 2 of the License, or
  7. (at your option) any later version.
  8. This program is distributed in the hope that it will be useful,
  9. but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. GNU General Public License for more details.
  12. You should have received a copy of the GNU General Public License
  13. along with this program; if not, write to the Free Software
  14. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  15. */
  16. #include "mantis_common.h"
  17. #include "mantis_hif.h"
  18. #include "mantis_link.h" /* temporary due to physical layer stuff */
  19. static int mantis_hif_data_available(struct mantis_ca *ca)
  20. {
  21. struct mantis_pci *mantis = ca->ca_priv;
  22. int rc = 0;
  23. if (wait_event_interruptible_timeout(ca->hif_data_wq,
  24. ca->sbuf_status & MANTIS_SBUF_DATA_AVAIL,
  25. msecs_to_jiffies(500)) == -ERESTARTSYS) {
  26. dprintk(verbose, MANTIS_ERROR, 1, "Adapter(%d) Slot(0): HIF Read wait event timeout !", mantis->num);
  27. rc = -EREMOTEIO;
  28. }
  29. ca->sbuf_status &= ~MANTIS_SBUF_DATA_AVAIL;
  30. udelay(2);
  31. return rc;
  32. }
  33. static int mantis_hif_sbuf_opdone_wait(struct mantis_ca *ca)
  34. {
  35. struct mantis_pci *mantis = ca->ca_priv;
  36. int rc = 0;
  37. if (wait_event_interruptible_timeout(ca->hif_opdone_wq,
  38. ca->hif_event & MANTIS_SBUF_OPDONE,
  39. msecs_to_jiffies(500)) == -ERESTARTSYS) {
  40. dprintk(verbose, MANTIS_ERROR, 1, "Adapter(%d) Slot(0): Smart buffer operation timeout !", mantis->num);
  41. rc = -EREMOTEIO;
  42. }
  43. ca->hif_event &= ~MANTIS_SBUF_OPDONE;
  44. udelay(5);
  45. return rc;
  46. }
  47. int mantis_hif_read_mem(struct mantis_ca *ca, u32 addr)
  48. {
  49. struct mantis_pci *mantis = ca->ca_priv;
  50. u32 hif_addr = 0, data, count = 4;
  51. dprintk(verbose, MANTIS_DEBUG, 1, "Adapter(%d) Slot(0): Request HIF Mem Read", mantis->num);
  52. hif_addr |= MANTIS_GPIF_HIFRDWRN;
  53. hif_addr &= ~MANTIS_GPIF_PCMCIAREG;
  54. hif_addr &= ~MANTIS_GPIF_PCMCIAIOM;
  55. hif_addr |= addr;
  56. mmwrite(hif_addr | MANTIS_HIF_STATUS, MANTIS_GPIF_BRADDR);
  57. mmwrite(count, MANTIS_GPIF_BRBYTES);
  58. udelay(20);
  59. mmwrite(hif_addr, MANTIS_GPIF_ADDR);
  60. if (mantis_hif_data_available(ca) != 0) {
  61. dprintk(verbose, MANTIS_ERROR, 1, "Adapter(%d) Slot(0): GPIF Smart Buffer burst read failed", mantis->num);
  62. return -EREMOTEIO;
  63. }
  64. if (mantis_hif_sbuf_opdone_wait(ca) != 0) {
  65. dprintk(verbose, MANTIS_ERROR, 1, "Adapter(%d) Slot(0): GPIF Smart Buffer operation failed", mantis->num);
  66. return -EREMOTEIO;
  67. }
  68. data = mmread(MANTIS_GPIF_DIN);
  69. return (data >> 24) & 0xff;
  70. }
  71. int mantis_hif_write_mem(struct mantis_ca *ca, u32 addr, u8 data)
  72. {
  73. struct mantis_slot *slot = ca->slot;
  74. struct mantis_pci *mantis = ca->ca_priv;
  75. u32 hif_addr = 0;
  76. dprintk(verbose, MANTIS_DEBUG, 1, "Adapter(%d) Slot(0): Request HIF Mem Write", mantis->num);
  77. hif_addr &= ~MANTIS_GPIF_HIFRDWRN;
  78. hif_addr &= ~MANTIS_GPIF_PCMCIAREG;
  79. hif_addr &= ~MANTIS_GPIF_PCMCIAIOM;
  80. hif_addr |= addr;
  81. mmwrite(slot->slave_cfg, MANTIS_GPIF_CFGSLA); /* Slot0 alone for now */
  82. mmwrite(hif_addr | MANTIS_HIF_STATUS, MANTIS_GPIF_ADDR);
  83. mmwrite(data, MANTIS_GPIF_DOUT);
  84. ca->hif_job_queue = MANTIS_HIF_MEMWR;
  85. if (mantis_hif_sbuf_opdone_wait(ca) != 0) {
  86. ca->hif_job_queue &= ~MANTIS_HIF_MEMWR;
  87. dprintk(verbose, MANTIS_ERROR, 1, "Adapter(%d) Slot(0): HIF Smart Buffer operation failed", mantis->num);
  88. return -EREMOTEIO;
  89. }
  90. ca->hif_job_queue &= ~MANTIS_HIF_MEMWR;
  91. return 0;
  92. }
  93. int mantis_hif_read_iom(struct mantis_ca *ca, u32 addr)
  94. {
  95. struct mantis_pci *mantis = ca->ca_priv;
  96. u32 data, hif_addr = 0;
  97. dprintk(verbose, MANTIS_DEBUG, 1, "Adapter(%d) Slot(0): Request HIF I/O Read", mantis->num);
  98. hif_addr &= ~MANTIS_GPIF_PCMCIAREG;
  99. hif_addr |= MANTIS_GPIF_HIFRDWRN;
  100. hif_addr |= MANTIS_GPIF_PCMCIAIOM;
  101. hif_addr |= addr;
  102. mmwrite(hif_addr | MANTIS_HIF_STATUS, MANTIS_GPIF_ADDR);
  103. ca->hif_job_queue = MANTIS_HIF_IOMRD;
  104. if (mantis_hif_sbuf_opdone_wait(ca) != 0) {
  105. ca->hif_job_queue &= ~MANTIS_HIF_IOMRD;
  106. dprintk(verbose, MANTIS_ERROR, 1, "Adapter(%d) Slot(0): HIF Smart Buffer operation failed", mantis->num);
  107. return -EREMOTEIO;
  108. }
  109. udelay(50);
  110. ca->hif_job_queue &= ~MANTIS_HIF_IOMRD;
  111. data = mmread(MANTIS_GPIF_DIN);
  112. hif_addr |= MANTIS_GPIF_PCMCIAREG;
  113. mmwrite(hif_addr, MANTIS_GPIF_ADDR);
  114. return (u8) data;
  115. }
  116. int mantis_hif_write_iom(struct mantis_ca *ca, u32 addr, u8 data)
  117. {
  118. struct mantis_pci *mantis = ca->ca_priv;
  119. u32 hif_addr = 0;
  120. dprintk(verbose, MANTIS_DEBUG, 1, "Adapter(%d) Slot(0): Request HIF I/O Write", mantis->num);
  121. hif_addr &= ~MANTIS_GPIF_PCMCIAREG;
  122. hif_addr &= ~MANTIS_GPIF_HIFRDWRN;
  123. hif_addr |= MANTIS_GPIF_PCMCIAIOM;
  124. hif_addr |= addr;
  125. mmwrite(hif_addr | MANTIS_HIF_STATUS, MANTIS_GPIF_ADDR);
  126. mmwrite(data, MANTIS_GPIF_DOUT);
  127. ca->hif_job_queue = MANTIS_HIF_IOMWR;
  128. if (mantis_hif_sbuf_opdone_wait(ca) != 0) {
  129. ca->hif_job_queue &= ~MANTIS_HIF_IOMWR;
  130. dprintk(verbose, MANTIS_ERROR, 1, "Adapter(%d) Slot(0): HIF Smart Buffer operation failed", mantis->num);
  131. return -EREMOTEIO;
  132. }
  133. udelay(50);
  134. ca->hif_job_queue &= ~MANTIS_HIF_IOMWR;
  135. hif_addr |= MANTIS_GPIF_PCMCIAREG;
  136. mmwrite(hif_addr, MANTIS_GPIF_ADDR);
  137. return 0;
  138. }
  139. int mantis_hif_init(struct mantis_ca *ca)
  140. {
  141. struct mantis_slot *slot = ca->slot;
  142. struct mantis_pci *mantis = ca->ca_priv;
  143. u32 irqcfg;
  144. slot[0].slave_cfg = 0x70773028;
  145. dprintk(verbose, MANTIS_ERROR, 1, "Adapter(%d) Initializing Mantis Host Interface", mantis->num);
  146. init_waitqueue_head(&ca->hif_data_wq);
  147. init_waitqueue_head(&ca->hif_opdone_wq);
  148. irqcfg = mmread(MANTIS_GPIF_IRQCFG);
  149. irqcfg |= MANTIS_MASK_BRRDY;
  150. mmwrite(irqcfg, MANTIS_GPIF_IRQCFG);
  151. return 0;
  152. }
  153. void mantis_hif_exit(struct mantis_ca *ca)
  154. {
  155. struct mantis_pci *mantis = ca->ca_priv;
  156. u32 irqcfg;
  157. dprintk(verbose, MANTIS_ERROR, 1, "Adapter(%d) Exiting Mantis Host Interface", mantis->num);
  158. irqcfg = mmread(MANTIS_GPIF_IRQCFG);
  159. irqcfg &= ~MANTIS_MASK_BRRDY;
  160. mmwrite(irqcfg, MANTIS_GPIF_IRQCFG);
  161. }