fimc-lite.c 42 KB

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  1. /*
  2. * Samsung EXYNOS FIMC-LITE (camera host interface) driver
  3. *
  4. * Copyright (C) 2012 Samsung Electronics Co., Ltd.
  5. * Sylwester Nawrocki <s.nawrocki@samsung.com>
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License version 2 as
  9. * published by the Free Software Foundation.
  10. */
  11. #define pr_fmt(fmt) "%s:%d " fmt, __func__, __LINE__
  12. #include <linux/bug.h>
  13. #include <linux/device.h>
  14. #include <linux/errno.h>
  15. #include <linux/interrupt.h>
  16. #include <linux/kernel.h>
  17. #include <linux/list.h>
  18. #include <linux/module.h>
  19. #include <linux/of.h>
  20. #include <linux/types.h>
  21. #include <linux/platform_device.h>
  22. #include <linux/pm_runtime.h>
  23. #include <linux/slab.h>
  24. #include <linux/videodev2.h>
  25. #include <media/v4l2-device.h>
  26. #include <media/v4l2-ioctl.h>
  27. #include <media/v4l2-mem2mem.h>
  28. #include <media/videobuf2-core.h>
  29. #include <media/videobuf2-dma-contig.h>
  30. #include <media/s5p_fimc.h>
  31. #include "media-dev.h"
  32. #include "fimc-lite.h"
  33. #include "fimc-lite-reg.h"
  34. static int debug;
  35. module_param(debug, int, 0644);
  36. static const struct fimc_fmt fimc_lite_formats[] = {
  37. {
  38. .name = "YUV 4:2:2 packed, YCbYCr",
  39. .fourcc = V4L2_PIX_FMT_YUYV,
  40. .depth = { 16 },
  41. .color = FIMC_FMT_YCBYCR422,
  42. .memplanes = 1,
  43. .mbus_code = V4L2_MBUS_FMT_YUYV8_2X8,
  44. }, {
  45. .name = "YUV 4:2:2 packed, CbYCrY",
  46. .fourcc = V4L2_PIX_FMT_UYVY,
  47. .depth = { 16 },
  48. .color = FIMC_FMT_CBYCRY422,
  49. .memplanes = 1,
  50. .mbus_code = V4L2_MBUS_FMT_UYVY8_2X8,
  51. }, {
  52. .name = "YUV 4:2:2 packed, CrYCbY",
  53. .fourcc = V4L2_PIX_FMT_VYUY,
  54. .depth = { 16 },
  55. .color = FIMC_FMT_CRYCBY422,
  56. .memplanes = 1,
  57. .mbus_code = V4L2_MBUS_FMT_VYUY8_2X8,
  58. }, {
  59. .name = "YUV 4:2:2 packed, YCrYCb",
  60. .fourcc = V4L2_PIX_FMT_YVYU,
  61. .depth = { 16 },
  62. .color = FIMC_FMT_YCRYCB422,
  63. .memplanes = 1,
  64. .mbus_code = V4L2_MBUS_FMT_YVYU8_2X8,
  65. }, {
  66. .name = "RAW8 (GRBG)",
  67. .fourcc = V4L2_PIX_FMT_SGRBG8,
  68. .depth = { 8 },
  69. .color = FIMC_FMT_RAW8,
  70. .memplanes = 1,
  71. .mbus_code = V4L2_MBUS_FMT_SGRBG8_1X8,
  72. }, {
  73. .name = "RAW10 (GRBG)",
  74. .fourcc = V4L2_PIX_FMT_SGRBG10,
  75. .depth = { 10 },
  76. .color = FIMC_FMT_RAW10,
  77. .memplanes = 1,
  78. .mbus_code = V4L2_MBUS_FMT_SGRBG10_1X10,
  79. }, {
  80. .name = "RAW12 (GRBG)",
  81. .fourcc = V4L2_PIX_FMT_SGRBG12,
  82. .depth = { 12 },
  83. .color = FIMC_FMT_RAW12,
  84. .memplanes = 1,
  85. .mbus_code = V4L2_MBUS_FMT_SGRBG12_1X12,
  86. },
  87. };
  88. /**
  89. * fimc_lite_find_format - lookup fimc color format by fourcc or media bus code
  90. * @pixelformat: fourcc to match, ignored if null
  91. * @mbus_code: media bus code to match, ignored if null
  92. * @index: index to the fimc_lite_formats array, ignored if negative
  93. */
  94. static const struct fimc_fmt *fimc_lite_find_format(const u32 *pixelformat,
  95. const u32 *mbus_code, int index)
  96. {
  97. const struct fimc_fmt *fmt, *def_fmt = NULL;
  98. unsigned int i;
  99. int id = 0;
  100. if (index >= (int)ARRAY_SIZE(fimc_lite_formats))
  101. return NULL;
  102. for (i = 0; i < ARRAY_SIZE(fimc_lite_formats); ++i) {
  103. fmt = &fimc_lite_formats[i];
  104. if (pixelformat && fmt->fourcc == *pixelformat)
  105. return fmt;
  106. if (mbus_code && fmt->mbus_code == *mbus_code)
  107. return fmt;
  108. if (index == id)
  109. def_fmt = fmt;
  110. id++;
  111. }
  112. return def_fmt;
  113. }
  114. static int fimc_lite_hw_init(struct fimc_lite *fimc, bool isp_output)
  115. {
  116. struct fimc_pipeline *pipeline = &fimc->pipeline;
  117. struct v4l2_subdev *sensor;
  118. struct fimc_sensor_info *si;
  119. unsigned long flags;
  120. sensor = isp_output ? fimc->sensor : pipeline->subdevs[IDX_SENSOR];
  121. if (sensor == NULL)
  122. return -ENXIO;
  123. if (fimc->fmt == NULL)
  124. return -EINVAL;
  125. /* Get sensor configuration data from the sensor subdev */
  126. si = v4l2_get_subdev_hostdata(sensor);
  127. spin_lock_irqsave(&fimc->slock, flags);
  128. flite_hw_set_camera_bus(fimc, &si->pdata);
  129. flite_hw_set_source_format(fimc, &fimc->inp_frame);
  130. flite_hw_set_window_offset(fimc, &fimc->inp_frame);
  131. flite_hw_set_output_dma(fimc, &fimc->out_frame, !isp_output);
  132. flite_hw_set_interrupt_mask(fimc);
  133. flite_hw_set_test_pattern(fimc, fimc->test_pattern->val);
  134. if (debug > 0)
  135. flite_hw_dump_regs(fimc, __func__);
  136. spin_unlock_irqrestore(&fimc->slock, flags);
  137. return 0;
  138. }
  139. /*
  140. * Reinitialize the driver so it is ready to start the streaming again.
  141. * Set fimc->state to indicate stream off and the hardware shut down state.
  142. * If not suspending (@suspend is false), return any buffers to videobuf2.
  143. * Otherwise put any owned buffers onto the pending buffers queue, so they
  144. * can be re-spun when the device is being resumed. Also perform FIMC
  145. * software reset and disable streaming on the whole pipeline if required.
  146. */
  147. static int fimc_lite_reinit(struct fimc_lite *fimc, bool suspend)
  148. {
  149. struct flite_buffer *buf;
  150. unsigned long flags;
  151. bool streaming;
  152. spin_lock_irqsave(&fimc->slock, flags);
  153. streaming = fimc->state & (1 << ST_SENSOR_STREAM);
  154. fimc->state &= ~(1 << ST_FLITE_RUN | 1 << ST_FLITE_OFF |
  155. 1 << ST_FLITE_STREAM | 1 << ST_SENSOR_STREAM);
  156. if (suspend)
  157. fimc->state |= (1 << ST_FLITE_SUSPENDED);
  158. else
  159. fimc->state &= ~(1 << ST_FLITE_PENDING |
  160. 1 << ST_FLITE_SUSPENDED);
  161. /* Release unused buffers */
  162. while (!suspend && !list_empty(&fimc->pending_buf_q)) {
  163. buf = fimc_lite_pending_queue_pop(fimc);
  164. vb2_buffer_done(&buf->vb, VB2_BUF_STATE_ERROR);
  165. }
  166. /* If suspending put unused buffers onto pending queue */
  167. while (!list_empty(&fimc->active_buf_q)) {
  168. buf = fimc_lite_active_queue_pop(fimc);
  169. if (suspend)
  170. fimc_lite_pending_queue_add(fimc, buf);
  171. else
  172. vb2_buffer_done(&buf->vb, VB2_BUF_STATE_ERROR);
  173. }
  174. spin_unlock_irqrestore(&fimc->slock, flags);
  175. flite_hw_reset(fimc);
  176. if (!streaming)
  177. return 0;
  178. return fimc_pipeline_call(fimc, set_stream, &fimc->pipeline, 0);
  179. }
  180. static int fimc_lite_stop_capture(struct fimc_lite *fimc, bool suspend)
  181. {
  182. unsigned long flags;
  183. if (!fimc_lite_active(fimc))
  184. return 0;
  185. spin_lock_irqsave(&fimc->slock, flags);
  186. set_bit(ST_FLITE_OFF, &fimc->state);
  187. flite_hw_capture_stop(fimc);
  188. spin_unlock_irqrestore(&fimc->slock, flags);
  189. wait_event_timeout(fimc->irq_queue,
  190. !test_bit(ST_FLITE_OFF, &fimc->state),
  191. (2*HZ/10)); /* 200 ms */
  192. return fimc_lite_reinit(fimc, suspend);
  193. }
  194. /* Must be called with fimc.slock spinlock held. */
  195. static void fimc_lite_config_update(struct fimc_lite *fimc)
  196. {
  197. flite_hw_set_window_offset(fimc, &fimc->inp_frame);
  198. flite_hw_set_dma_window(fimc, &fimc->out_frame);
  199. flite_hw_set_test_pattern(fimc, fimc->test_pattern->val);
  200. clear_bit(ST_FLITE_CONFIG, &fimc->state);
  201. }
  202. static irqreturn_t flite_irq_handler(int irq, void *priv)
  203. {
  204. struct fimc_lite *fimc = priv;
  205. struct flite_buffer *vbuf;
  206. unsigned long flags;
  207. struct timeval *tv;
  208. struct timespec ts;
  209. u32 intsrc;
  210. spin_lock_irqsave(&fimc->slock, flags);
  211. intsrc = flite_hw_get_interrupt_source(fimc);
  212. flite_hw_clear_pending_irq(fimc);
  213. if (test_and_clear_bit(ST_FLITE_OFF, &fimc->state)) {
  214. wake_up(&fimc->irq_queue);
  215. goto done;
  216. }
  217. if (intsrc & FLITE_REG_CISTATUS_IRQ_SRC_OVERFLOW) {
  218. clear_bit(ST_FLITE_RUN, &fimc->state);
  219. fimc->events.data_overflow++;
  220. }
  221. if (intsrc & FLITE_REG_CISTATUS_IRQ_SRC_LASTCAPEND) {
  222. flite_hw_clear_last_capture_end(fimc);
  223. clear_bit(ST_FLITE_STREAM, &fimc->state);
  224. wake_up(&fimc->irq_queue);
  225. }
  226. if (atomic_read(&fimc->out_path) != FIMC_IO_DMA)
  227. goto done;
  228. if ((intsrc & FLITE_REG_CISTATUS_IRQ_SRC_FRMSTART) &&
  229. test_bit(ST_FLITE_RUN, &fimc->state) &&
  230. !list_empty(&fimc->active_buf_q) &&
  231. !list_empty(&fimc->pending_buf_q)) {
  232. vbuf = fimc_lite_active_queue_pop(fimc);
  233. ktime_get_ts(&ts);
  234. tv = &vbuf->vb.v4l2_buf.timestamp;
  235. tv->tv_sec = ts.tv_sec;
  236. tv->tv_usec = ts.tv_nsec / NSEC_PER_USEC;
  237. vbuf->vb.v4l2_buf.sequence = fimc->frame_count++;
  238. vb2_buffer_done(&vbuf->vb, VB2_BUF_STATE_DONE);
  239. vbuf = fimc_lite_pending_queue_pop(fimc);
  240. flite_hw_set_output_addr(fimc, vbuf->paddr);
  241. fimc_lite_active_queue_add(fimc, vbuf);
  242. }
  243. if (test_bit(ST_FLITE_CONFIG, &fimc->state))
  244. fimc_lite_config_update(fimc);
  245. if (list_empty(&fimc->pending_buf_q)) {
  246. flite_hw_capture_stop(fimc);
  247. clear_bit(ST_FLITE_STREAM, &fimc->state);
  248. }
  249. done:
  250. set_bit(ST_FLITE_RUN, &fimc->state);
  251. spin_unlock_irqrestore(&fimc->slock, flags);
  252. return IRQ_HANDLED;
  253. }
  254. static int start_streaming(struct vb2_queue *q, unsigned int count)
  255. {
  256. struct fimc_lite *fimc = q->drv_priv;
  257. int ret;
  258. fimc->frame_count = 0;
  259. ret = fimc_lite_hw_init(fimc, false);
  260. if (ret) {
  261. fimc_lite_reinit(fimc, false);
  262. return ret;
  263. }
  264. set_bit(ST_FLITE_PENDING, &fimc->state);
  265. if (!list_empty(&fimc->active_buf_q) &&
  266. !test_and_set_bit(ST_FLITE_STREAM, &fimc->state)) {
  267. flite_hw_capture_start(fimc);
  268. if (!test_and_set_bit(ST_SENSOR_STREAM, &fimc->state))
  269. fimc_pipeline_call(fimc, set_stream,
  270. &fimc->pipeline, 1);
  271. }
  272. if (debug > 0)
  273. flite_hw_dump_regs(fimc, __func__);
  274. return 0;
  275. }
  276. static int stop_streaming(struct vb2_queue *q)
  277. {
  278. struct fimc_lite *fimc = q->drv_priv;
  279. if (!fimc_lite_active(fimc))
  280. return -EINVAL;
  281. return fimc_lite_stop_capture(fimc, false);
  282. }
  283. static int queue_setup(struct vb2_queue *vq, const struct v4l2_format *pfmt,
  284. unsigned int *num_buffers, unsigned int *num_planes,
  285. unsigned int sizes[], void *allocators[])
  286. {
  287. const struct v4l2_pix_format_mplane *pixm = NULL;
  288. struct fimc_lite *fimc = vq->drv_priv;
  289. struct flite_frame *frame = &fimc->out_frame;
  290. const struct fimc_fmt *fmt = fimc->fmt;
  291. unsigned long wh;
  292. int i;
  293. if (pfmt) {
  294. pixm = &pfmt->fmt.pix_mp;
  295. fmt = fimc_lite_find_format(&pixm->pixelformat, NULL, -1);
  296. wh = pixm->width * pixm->height;
  297. } else {
  298. wh = frame->f_width * frame->f_height;
  299. }
  300. if (fmt == NULL)
  301. return -EINVAL;
  302. *num_planes = fmt->memplanes;
  303. for (i = 0; i < fmt->memplanes; i++) {
  304. unsigned int size = (wh * fmt->depth[i]) / 8;
  305. if (pixm)
  306. sizes[i] = max(size, pixm->plane_fmt[i].sizeimage);
  307. else
  308. sizes[i] = size;
  309. allocators[i] = fimc->alloc_ctx;
  310. }
  311. return 0;
  312. }
  313. static int buffer_prepare(struct vb2_buffer *vb)
  314. {
  315. struct vb2_queue *vq = vb->vb2_queue;
  316. struct fimc_lite *fimc = vq->drv_priv;
  317. int i;
  318. if (fimc->fmt == NULL)
  319. return -EINVAL;
  320. for (i = 0; i < fimc->fmt->memplanes; i++) {
  321. unsigned long size = fimc->payload[i];
  322. if (vb2_plane_size(vb, i) < size) {
  323. v4l2_err(&fimc->vfd,
  324. "User buffer too small (%ld < %ld)\n",
  325. vb2_plane_size(vb, i), size);
  326. return -EINVAL;
  327. }
  328. vb2_set_plane_payload(vb, i, size);
  329. }
  330. return 0;
  331. }
  332. static void buffer_queue(struct vb2_buffer *vb)
  333. {
  334. struct flite_buffer *buf
  335. = container_of(vb, struct flite_buffer, vb);
  336. struct fimc_lite *fimc = vb2_get_drv_priv(vb->vb2_queue);
  337. unsigned long flags;
  338. spin_lock_irqsave(&fimc->slock, flags);
  339. buf->paddr = vb2_dma_contig_plane_dma_addr(vb, 0);
  340. if (!test_bit(ST_FLITE_SUSPENDED, &fimc->state) &&
  341. !test_bit(ST_FLITE_STREAM, &fimc->state) &&
  342. list_empty(&fimc->active_buf_q)) {
  343. flite_hw_set_output_addr(fimc, buf->paddr);
  344. fimc_lite_active_queue_add(fimc, buf);
  345. } else {
  346. fimc_lite_pending_queue_add(fimc, buf);
  347. }
  348. if (vb2_is_streaming(&fimc->vb_queue) &&
  349. !list_empty(&fimc->pending_buf_q) &&
  350. !test_and_set_bit(ST_FLITE_STREAM, &fimc->state)) {
  351. flite_hw_capture_start(fimc);
  352. spin_unlock_irqrestore(&fimc->slock, flags);
  353. if (!test_and_set_bit(ST_SENSOR_STREAM, &fimc->state))
  354. fimc_pipeline_call(fimc, set_stream,
  355. &fimc->pipeline, 1);
  356. return;
  357. }
  358. spin_unlock_irqrestore(&fimc->slock, flags);
  359. }
  360. static const struct vb2_ops fimc_lite_qops = {
  361. .queue_setup = queue_setup,
  362. .buf_prepare = buffer_prepare,
  363. .buf_queue = buffer_queue,
  364. .wait_prepare = vb2_ops_wait_prepare,
  365. .wait_finish = vb2_ops_wait_finish,
  366. .start_streaming = start_streaming,
  367. .stop_streaming = stop_streaming,
  368. };
  369. static void fimc_lite_clear_event_counters(struct fimc_lite *fimc)
  370. {
  371. unsigned long flags;
  372. spin_lock_irqsave(&fimc->slock, flags);
  373. memset(&fimc->events, 0, sizeof(fimc->events));
  374. spin_unlock_irqrestore(&fimc->slock, flags);
  375. }
  376. static int fimc_lite_open(struct file *file)
  377. {
  378. struct fimc_lite *fimc = video_drvdata(file);
  379. struct media_entity *me = &fimc->vfd.entity;
  380. int ret;
  381. mutex_lock(&me->parent->graph_mutex);
  382. mutex_lock(&fimc->lock);
  383. if (atomic_read(&fimc->out_path) != FIMC_IO_DMA) {
  384. ret = -EBUSY;
  385. goto unlock;
  386. }
  387. set_bit(ST_FLITE_IN_USE, &fimc->state);
  388. ret = pm_runtime_get_sync(&fimc->pdev->dev);
  389. if (ret < 0)
  390. goto unlock;
  391. ret = v4l2_fh_open(file);
  392. if (ret < 0)
  393. goto err_pm;
  394. if (!v4l2_fh_is_singular_file(file) ||
  395. atomic_read(&fimc->out_path) != FIMC_IO_DMA)
  396. goto unlock;
  397. ret = fimc_pipeline_call(fimc, open, &fimc->pipeline,
  398. me, true);
  399. if (!ret) {
  400. fimc_lite_clear_event_counters(fimc);
  401. fimc->ref_count++;
  402. goto unlock;
  403. }
  404. v4l2_fh_release(file);
  405. err_pm:
  406. pm_runtime_put_sync(&fimc->pdev->dev);
  407. clear_bit(ST_FLITE_IN_USE, &fimc->state);
  408. unlock:
  409. mutex_unlock(&fimc->lock);
  410. mutex_unlock(&me->parent->graph_mutex);
  411. return ret;
  412. }
  413. static int fimc_lite_release(struct file *file)
  414. {
  415. struct fimc_lite *fimc = video_drvdata(file);
  416. mutex_lock(&fimc->lock);
  417. if (v4l2_fh_is_singular_file(file) &&
  418. atomic_read(&fimc->out_path) == FIMC_IO_DMA) {
  419. clear_bit(ST_FLITE_IN_USE, &fimc->state);
  420. fimc_lite_stop_capture(fimc, false);
  421. fimc_pipeline_call(fimc, close, &fimc->pipeline);
  422. fimc->ref_count--;
  423. }
  424. vb2_fop_release(file);
  425. pm_runtime_put(&fimc->pdev->dev);
  426. clear_bit(ST_FLITE_SUSPENDED, &fimc->state);
  427. mutex_unlock(&fimc->lock);
  428. return 0;
  429. }
  430. static const struct v4l2_file_operations fimc_lite_fops = {
  431. .owner = THIS_MODULE,
  432. .open = fimc_lite_open,
  433. .release = fimc_lite_release,
  434. .poll = vb2_fop_poll,
  435. .unlocked_ioctl = video_ioctl2,
  436. .mmap = vb2_fop_mmap,
  437. };
  438. /*
  439. * Format and crop negotiation helpers
  440. */
  441. static const struct fimc_fmt *fimc_lite_try_format(struct fimc_lite *fimc,
  442. u32 *width, u32 *height,
  443. u32 *code, u32 *fourcc, int pad)
  444. {
  445. struct flite_drvdata *dd = fimc->dd;
  446. const struct fimc_fmt *fmt;
  447. fmt = fimc_lite_find_format(fourcc, code, 0);
  448. if (WARN_ON(!fmt))
  449. return NULL;
  450. if (code)
  451. *code = fmt->mbus_code;
  452. if (fourcc)
  453. *fourcc = fmt->fourcc;
  454. if (pad == FLITE_SD_PAD_SINK) {
  455. v4l_bound_align_image(width, 8, dd->max_width,
  456. ffs(dd->out_width_align) - 1,
  457. height, 0, dd->max_height, 0, 0);
  458. } else {
  459. v4l_bound_align_image(width, 8, fimc->inp_frame.rect.width,
  460. ffs(dd->out_width_align) - 1,
  461. height, 0, fimc->inp_frame.rect.height,
  462. 0, 0);
  463. }
  464. v4l2_dbg(1, debug, &fimc->subdev, "code: 0x%x, %dx%d\n",
  465. code ? *code : 0, *width, *height);
  466. return fmt;
  467. }
  468. static void fimc_lite_try_crop(struct fimc_lite *fimc, struct v4l2_rect *r)
  469. {
  470. struct flite_frame *frame = &fimc->inp_frame;
  471. v4l_bound_align_image(&r->width, 0, frame->f_width, 0,
  472. &r->height, 0, frame->f_height, 0, 0);
  473. /* Adjust left/top if cropping rectangle got out of bounds */
  474. r->left = clamp_t(u32, r->left, 0, frame->f_width - r->width);
  475. r->left = round_down(r->left, fimc->dd->win_hor_offs_align);
  476. r->top = clamp_t(u32, r->top, 0, frame->f_height - r->height);
  477. v4l2_dbg(1, debug, &fimc->subdev, "(%d,%d)/%dx%d, sink fmt: %dx%d\n",
  478. r->left, r->top, r->width, r->height,
  479. frame->f_width, frame->f_height);
  480. }
  481. static void fimc_lite_try_compose(struct fimc_lite *fimc, struct v4l2_rect *r)
  482. {
  483. struct flite_frame *frame = &fimc->out_frame;
  484. struct v4l2_rect *crop_rect = &fimc->inp_frame.rect;
  485. /* Scaling is not supported so we enforce compose rectangle size
  486. same as size of the sink crop rectangle. */
  487. r->width = crop_rect->width;
  488. r->height = crop_rect->height;
  489. /* Adjust left/top if the composing rectangle got out of bounds */
  490. r->left = clamp_t(u32, r->left, 0, frame->f_width - r->width);
  491. r->left = round_down(r->left, fimc->dd->out_hor_offs_align);
  492. r->top = clamp_t(u32, r->top, 0, fimc->out_frame.f_height - r->height);
  493. v4l2_dbg(1, debug, &fimc->subdev, "(%d,%d)/%dx%d, source fmt: %dx%d\n",
  494. r->left, r->top, r->width, r->height,
  495. frame->f_width, frame->f_height);
  496. }
  497. /*
  498. * Video node ioctl operations
  499. */
  500. static int fimc_vidioc_querycap_capture(struct file *file, void *priv,
  501. struct v4l2_capability *cap)
  502. {
  503. strlcpy(cap->driver, FIMC_LITE_DRV_NAME, sizeof(cap->driver));
  504. cap->bus_info[0] = 0;
  505. cap->card[0] = 0;
  506. cap->capabilities = V4L2_CAP_STREAMING;
  507. return 0;
  508. }
  509. static int fimc_lite_enum_fmt_mplane(struct file *file, void *priv,
  510. struct v4l2_fmtdesc *f)
  511. {
  512. const struct fimc_fmt *fmt;
  513. if (f->index >= ARRAY_SIZE(fimc_lite_formats))
  514. return -EINVAL;
  515. fmt = &fimc_lite_formats[f->index];
  516. strlcpy(f->description, fmt->name, sizeof(f->description));
  517. f->pixelformat = fmt->fourcc;
  518. return 0;
  519. }
  520. static int fimc_lite_g_fmt_mplane(struct file *file, void *fh,
  521. struct v4l2_format *f)
  522. {
  523. struct fimc_lite *fimc = video_drvdata(file);
  524. struct v4l2_pix_format_mplane *pixm = &f->fmt.pix_mp;
  525. struct v4l2_plane_pix_format *plane_fmt = &pixm->plane_fmt[0];
  526. struct flite_frame *frame = &fimc->out_frame;
  527. const struct fimc_fmt *fmt = fimc->fmt;
  528. plane_fmt->bytesperline = (frame->f_width * fmt->depth[0]) / 8;
  529. plane_fmt->sizeimage = plane_fmt->bytesperline * frame->f_height;
  530. pixm->num_planes = fmt->memplanes;
  531. pixm->pixelformat = fmt->fourcc;
  532. pixm->width = frame->f_width;
  533. pixm->height = frame->f_height;
  534. pixm->field = V4L2_FIELD_NONE;
  535. pixm->colorspace = V4L2_COLORSPACE_JPEG;
  536. return 0;
  537. }
  538. static int fimc_lite_try_fmt(struct fimc_lite *fimc,
  539. struct v4l2_pix_format_mplane *pixm,
  540. const struct fimc_fmt **ffmt)
  541. {
  542. u32 bpl = pixm->plane_fmt[0].bytesperline;
  543. struct flite_drvdata *dd = fimc->dd;
  544. const struct fimc_fmt *fmt;
  545. fmt = fimc_lite_find_format(&pixm->pixelformat, NULL, 0);
  546. if (WARN_ON(fmt == NULL))
  547. return -EINVAL;
  548. if (ffmt)
  549. *ffmt = fmt;
  550. v4l_bound_align_image(&pixm->width, 8, dd->max_width,
  551. ffs(dd->out_width_align) - 1,
  552. &pixm->height, 0, dd->max_height, 0, 0);
  553. if ((bpl == 0 || ((bpl * 8) / fmt->depth[0]) < pixm->width))
  554. pixm->plane_fmt[0].bytesperline = (pixm->width *
  555. fmt->depth[0]) / 8;
  556. if (pixm->plane_fmt[0].sizeimage == 0)
  557. pixm->plane_fmt[0].sizeimage = (pixm->width * pixm->height *
  558. fmt->depth[0]) / 8;
  559. pixm->num_planes = fmt->memplanes;
  560. pixm->pixelformat = fmt->fourcc;
  561. pixm->colorspace = V4L2_COLORSPACE_JPEG;
  562. pixm->field = V4L2_FIELD_NONE;
  563. return 0;
  564. }
  565. static int fimc_lite_try_fmt_mplane(struct file *file, void *fh,
  566. struct v4l2_format *f)
  567. {
  568. struct fimc_lite *fimc = video_drvdata(file);
  569. return fimc_lite_try_fmt(fimc, &f->fmt.pix_mp, NULL);
  570. }
  571. static int fimc_lite_s_fmt_mplane(struct file *file, void *priv,
  572. struct v4l2_format *f)
  573. {
  574. struct v4l2_pix_format_mplane *pixm = &f->fmt.pix_mp;
  575. struct fimc_lite *fimc = video_drvdata(file);
  576. struct flite_frame *frame = &fimc->out_frame;
  577. const struct fimc_fmt *fmt = NULL;
  578. int ret;
  579. if (vb2_is_busy(&fimc->vb_queue))
  580. return -EBUSY;
  581. ret = fimc_lite_try_fmt(fimc, &f->fmt.pix_mp, &fmt);
  582. if (ret < 0)
  583. return ret;
  584. fimc->fmt = fmt;
  585. fimc->payload[0] = max((pixm->width * pixm->height * fmt->depth[0]) / 8,
  586. pixm->plane_fmt[0].sizeimage);
  587. frame->f_width = pixm->width;
  588. frame->f_height = pixm->height;
  589. return 0;
  590. }
  591. static int fimc_pipeline_validate(struct fimc_lite *fimc)
  592. {
  593. struct v4l2_subdev *sd = &fimc->subdev;
  594. struct v4l2_subdev_format sink_fmt, src_fmt;
  595. struct media_pad *pad;
  596. int ret;
  597. while (1) {
  598. /* Retrieve format at the sink pad */
  599. pad = &sd->entity.pads[0];
  600. if (!(pad->flags & MEDIA_PAD_FL_SINK))
  601. break;
  602. /* Don't call FIMC subdev operation to avoid nested locking */
  603. if (sd == &fimc->subdev) {
  604. struct flite_frame *ff = &fimc->out_frame;
  605. sink_fmt.format.width = ff->f_width;
  606. sink_fmt.format.height = ff->f_height;
  607. sink_fmt.format.code = fimc->fmt->mbus_code;
  608. } else {
  609. sink_fmt.pad = pad->index;
  610. sink_fmt.which = V4L2_SUBDEV_FORMAT_ACTIVE;
  611. ret = v4l2_subdev_call(sd, pad, get_fmt, NULL,
  612. &sink_fmt);
  613. if (ret < 0 && ret != -ENOIOCTLCMD)
  614. return -EPIPE;
  615. }
  616. /* Retrieve format at the source pad */
  617. pad = media_entity_remote_source(pad);
  618. if (pad == NULL ||
  619. media_entity_type(pad->entity) != MEDIA_ENT_T_V4L2_SUBDEV)
  620. break;
  621. sd = media_entity_to_v4l2_subdev(pad->entity);
  622. src_fmt.pad = pad->index;
  623. src_fmt.which = V4L2_SUBDEV_FORMAT_ACTIVE;
  624. ret = v4l2_subdev_call(sd, pad, get_fmt, NULL, &src_fmt);
  625. if (ret < 0 && ret != -ENOIOCTLCMD)
  626. return -EPIPE;
  627. if (src_fmt.format.width != sink_fmt.format.width ||
  628. src_fmt.format.height != sink_fmt.format.height ||
  629. src_fmt.format.code != sink_fmt.format.code)
  630. return -EPIPE;
  631. }
  632. return 0;
  633. }
  634. static int fimc_lite_streamon(struct file *file, void *priv,
  635. enum v4l2_buf_type type)
  636. {
  637. struct fimc_lite *fimc = video_drvdata(file);
  638. struct media_entity *entity = &fimc->vfd.entity;
  639. struct fimc_pipeline *p = &fimc->pipeline;
  640. int ret;
  641. if (fimc_lite_active(fimc))
  642. return -EBUSY;
  643. ret = media_entity_pipeline_start(entity, p->m_pipeline);
  644. if (ret < 0)
  645. return ret;
  646. ret = fimc_pipeline_validate(fimc);
  647. if (ret < 0)
  648. goto err_p_stop;
  649. ret = vb2_ioctl_streamon(file, priv, type);
  650. if (!ret)
  651. return ret;
  652. err_p_stop:
  653. media_entity_pipeline_stop(entity);
  654. return 0;
  655. }
  656. static int fimc_lite_streamoff(struct file *file, void *priv,
  657. enum v4l2_buf_type type)
  658. {
  659. struct fimc_lite *fimc = video_drvdata(file);
  660. int ret;
  661. ret = vb2_ioctl_streamoff(file, priv, type);
  662. if (ret == 0)
  663. media_entity_pipeline_stop(&fimc->vfd.entity);
  664. return ret;
  665. }
  666. static int fimc_lite_reqbufs(struct file *file, void *priv,
  667. struct v4l2_requestbuffers *reqbufs)
  668. {
  669. struct fimc_lite *fimc = video_drvdata(file);
  670. int ret;
  671. reqbufs->count = max_t(u32, FLITE_REQ_BUFS_MIN, reqbufs->count);
  672. ret = vb2_ioctl_reqbufs(file, priv, reqbufs);
  673. if (!ret)
  674. fimc->reqbufs_count = reqbufs->count;
  675. return ret;
  676. }
  677. /* Return 1 if rectangle a is enclosed in rectangle b, or 0 otherwise. */
  678. static int enclosed_rectangle(struct v4l2_rect *a, struct v4l2_rect *b)
  679. {
  680. if (a->left < b->left || a->top < b->top)
  681. return 0;
  682. if (a->left + a->width > b->left + b->width)
  683. return 0;
  684. if (a->top + a->height > b->top + b->height)
  685. return 0;
  686. return 1;
  687. }
  688. static int fimc_lite_g_selection(struct file *file, void *fh,
  689. struct v4l2_selection *sel)
  690. {
  691. struct fimc_lite *fimc = video_drvdata(file);
  692. struct flite_frame *f = &fimc->out_frame;
  693. if (sel->type != V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE)
  694. return -EINVAL;
  695. switch (sel->target) {
  696. case V4L2_SEL_TGT_COMPOSE_BOUNDS:
  697. case V4L2_SEL_TGT_COMPOSE_DEFAULT:
  698. sel->r.left = 0;
  699. sel->r.top = 0;
  700. sel->r.width = f->f_width;
  701. sel->r.height = f->f_height;
  702. return 0;
  703. case V4L2_SEL_TGT_COMPOSE:
  704. sel->r = f->rect;
  705. return 0;
  706. }
  707. return -EINVAL;
  708. }
  709. static int fimc_lite_s_selection(struct file *file, void *fh,
  710. struct v4l2_selection *sel)
  711. {
  712. struct fimc_lite *fimc = video_drvdata(file);
  713. struct flite_frame *f = &fimc->out_frame;
  714. struct v4l2_rect rect = sel->r;
  715. unsigned long flags;
  716. if (sel->type != V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE ||
  717. sel->target != V4L2_SEL_TGT_COMPOSE)
  718. return -EINVAL;
  719. fimc_lite_try_compose(fimc, &rect);
  720. if ((sel->flags & V4L2_SEL_FLAG_LE) &&
  721. !enclosed_rectangle(&rect, &sel->r))
  722. return -ERANGE;
  723. if ((sel->flags & V4L2_SEL_FLAG_GE) &&
  724. !enclosed_rectangle(&sel->r, &rect))
  725. return -ERANGE;
  726. sel->r = rect;
  727. spin_lock_irqsave(&fimc->slock, flags);
  728. f->rect = rect;
  729. set_bit(ST_FLITE_CONFIG, &fimc->state);
  730. spin_unlock_irqrestore(&fimc->slock, flags);
  731. return 0;
  732. }
  733. static const struct v4l2_ioctl_ops fimc_lite_ioctl_ops = {
  734. .vidioc_querycap = fimc_vidioc_querycap_capture,
  735. .vidioc_enum_fmt_vid_cap_mplane = fimc_lite_enum_fmt_mplane,
  736. .vidioc_try_fmt_vid_cap_mplane = fimc_lite_try_fmt_mplane,
  737. .vidioc_s_fmt_vid_cap_mplane = fimc_lite_s_fmt_mplane,
  738. .vidioc_g_fmt_vid_cap_mplane = fimc_lite_g_fmt_mplane,
  739. .vidioc_g_selection = fimc_lite_g_selection,
  740. .vidioc_s_selection = fimc_lite_s_selection,
  741. .vidioc_reqbufs = fimc_lite_reqbufs,
  742. .vidioc_querybuf = vb2_ioctl_querybuf,
  743. .vidioc_prepare_buf = vb2_ioctl_prepare_buf,
  744. .vidioc_create_bufs = vb2_ioctl_create_bufs,
  745. .vidioc_qbuf = vb2_ioctl_qbuf,
  746. .vidioc_dqbuf = vb2_ioctl_dqbuf,
  747. .vidioc_streamon = fimc_lite_streamon,
  748. .vidioc_streamoff = fimc_lite_streamoff,
  749. };
  750. /* Called with the media graph mutex held */
  751. static struct v4l2_subdev *__find_remote_sensor(struct media_entity *me)
  752. {
  753. struct media_pad *pad = &me->pads[0];
  754. struct v4l2_subdev *sd;
  755. while (pad->flags & MEDIA_PAD_FL_SINK) {
  756. /* source pad */
  757. pad = media_entity_remote_source(pad);
  758. if (pad == NULL ||
  759. media_entity_type(pad->entity) != MEDIA_ENT_T_V4L2_SUBDEV)
  760. break;
  761. sd = media_entity_to_v4l2_subdev(pad->entity);
  762. if (sd->grp_id == GRP_ID_FIMC_IS_SENSOR)
  763. return sd;
  764. /* sink pad */
  765. pad = &sd->entity.pads[0];
  766. }
  767. return NULL;
  768. }
  769. /* Capture subdev media entity operations */
  770. static int fimc_lite_link_setup(struct media_entity *entity,
  771. const struct media_pad *local,
  772. const struct media_pad *remote, u32 flags)
  773. {
  774. struct v4l2_subdev *sd = media_entity_to_v4l2_subdev(entity);
  775. struct fimc_lite *fimc = v4l2_get_subdevdata(sd);
  776. unsigned int remote_ent_type = media_entity_type(remote->entity);
  777. int ret = 0;
  778. if (WARN_ON(fimc == NULL))
  779. return 0;
  780. v4l2_dbg(1, debug, sd, "%s: %s --> %s, flags: 0x%x. source_id: 0x%x\n",
  781. __func__, remote->entity->name, local->entity->name,
  782. flags, fimc->source_subdev_grp_id);
  783. mutex_lock(&fimc->lock);
  784. switch (local->index) {
  785. case FLITE_SD_PAD_SINK:
  786. if (remote_ent_type != MEDIA_ENT_T_V4L2_SUBDEV) {
  787. ret = -EINVAL;
  788. break;
  789. }
  790. if (flags & MEDIA_LNK_FL_ENABLED) {
  791. if (fimc->source_subdev_grp_id == 0)
  792. fimc->source_subdev_grp_id = sd->grp_id;
  793. else
  794. ret = -EBUSY;
  795. } else {
  796. fimc->source_subdev_grp_id = 0;
  797. fimc->sensor = NULL;
  798. }
  799. break;
  800. case FLITE_SD_PAD_SOURCE_DMA:
  801. if (!(flags & MEDIA_LNK_FL_ENABLED))
  802. atomic_set(&fimc->out_path, FIMC_IO_NONE);
  803. else if (remote_ent_type == MEDIA_ENT_T_DEVNODE)
  804. atomic_set(&fimc->out_path, FIMC_IO_DMA);
  805. else
  806. ret = -EINVAL;
  807. break;
  808. case FLITE_SD_PAD_SOURCE_ISP:
  809. if (!(flags & MEDIA_LNK_FL_ENABLED))
  810. atomic_set(&fimc->out_path, FIMC_IO_NONE);
  811. else if (remote_ent_type == MEDIA_ENT_T_V4L2_SUBDEV)
  812. atomic_set(&fimc->out_path, FIMC_IO_ISP);
  813. else
  814. ret = -EINVAL;
  815. break;
  816. default:
  817. v4l2_err(sd, "Invalid pad index\n");
  818. ret = -EINVAL;
  819. }
  820. mb();
  821. mutex_unlock(&fimc->lock);
  822. return ret;
  823. }
  824. static const struct media_entity_operations fimc_lite_subdev_media_ops = {
  825. .link_setup = fimc_lite_link_setup,
  826. };
  827. static int fimc_lite_subdev_enum_mbus_code(struct v4l2_subdev *sd,
  828. struct v4l2_subdev_fh *fh,
  829. struct v4l2_subdev_mbus_code_enum *code)
  830. {
  831. const struct fimc_fmt *fmt;
  832. fmt = fimc_lite_find_format(NULL, NULL, code->index);
  833. if (!fmt)
  834. return -EINVAL;
  835. code->code = fmt->mbus_code;
  836. return 0;
  837. }
  838. static int fimc_lite_subdev_get_fmt(struct v4l2_subdev *sd,
  839. struct v4l2_subdev_fh *fh,
  840. struct v4l2_subdev_format *fmt)
  841. {
  842. struct fimc_lite *fimc = v4l2_get_subdevdata(sd);
  843. struct v4l2_mbus_framefmt *mf = &fmt->format;
  844. struct flite_frame *f = &fimc->out_frame;
  845. if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
  846. mf = v4l2_subdev_get_try_format(fh, fmt->pad);
  847. fmt->format = *mf;
  848. return 0;
  849. }
  850. mf->colorspace = V4L2_COLORSPACE_JPEG;
  851. mutex_lock(&fimc->lock);
  852. mf->code = fimc->fmt->mbus_code;
  853. if (fmt->pad == FLITE_SD_PAD_SINK) {
  854. /* full camera input frame size */
  855. mf->width = f->f_width;
  856. mf->height = f->f_height;
  857. } else {
  858. /* crop size */
  859. mf->width = f->rect.width;
  860. mf->height = f->rect.height;
  861. }
  862. mutex_unlock(&fimc->lock);
  863. return 0;
  864. }
  865. static int fimc_lite_subdev_set_fmt(struct v4l2_subdev *sd,
  866. struct v4l2_subdev_fh *fh,
  867. struct v4l2_subdev_format *fmt)
  868. {
  869. struct fimc_lite *fimc = v4l2_get_subdevdata(sd);
  870. struct v4l2_mbus_framefmt *mf = &fmt->format;
  871. struct flite_frame *sink = &fimc->inp_frame;
  872. struct flite_frame *source = &fimc->out_frame;
  873. const struct fimc_fmt *ffmt;
  874. v4l2_dbg(1, debug, sd, "pad%d: code: 0x%x, %dx%d\n",
  875. fmt->pad, mf->code, mf->width, mf->height);
  876. mf->colorspace = V4L2_COLORSPACE_JPEG;
  877. mutex_lock(&fimc->lock);
  878. if ((atomic_read(&fimc->out_path) == FIMC_IO_ISP &&
  879. sd->entity.stream_count > 0) ||
  880. (atomic_read(&fimc->out_path) == FIMC_IO_DMA &&
  881. vb2_is_busy(&fimc->vb_queue))) {
  882. mutex_unlock(&fimc->lock);
  883. return -EBUSY;
  884. }
  885. ffmt = fimc_lite_try_format(fimc, &mf->width, &mf->height,
  886. &mf->code, NULL, fmt->pad);
  887. if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
  888. mf = v4l2_subdev_get_try_format(fh, fmt->pad);
  889. *mf = fmt->format;
  890. mutex_unlock(&fimc->lock);
  891. return 0;
  892. }
  893. if (fmt->pad == FLITE_SD_PAD_SINK) {
  894. sink->f_width = mf->width;
  895. sink->f_height = mf->height;
  896. fimc->fmt = ffmt;
  897. /* Set sink crop rectangle */
  898. sink->rect.width = mf->width;
  899. sink->rect.height = mf->height;
  900. sink->rect.left = 0;
  901. sink->rect.top = 0;
  902. /* Reset source format and crop rectangle */
  903. source->rect = sink->rect;
  904. source->f_width = mf->width;
  905. source->f_height = mf->height;
  906. } else {
  907. /* Allow changing format only on sink pad */
  908. mf->code = fimc->fmt->mbus_code;
  909. mf->width = sink->rect.width;
  910. mf->height = sink->rect.height;
  911. }
  912. mutex_unlock(&fimc->lock);
  913. return 0;
  914. }
  915. static int fimc_lite_subdev_get_selection(struct v4l2_subdev *sd,
  916. struct v4l2_subdev_fh *fh,
  917. struct v4l2_subdev_selection *sel)
  918. {
  919. struct fimc_lite *fimc = v4l2_get_subdevdata(sd);
  920. struct flite_frame *f = &fimc->inp_frame;
  921. if ((sel->target != V4L2_SEL_TGT_CROP &&
  922. sel->target != V4L2_SEL_TGT_CROP_BOUNDS) ||
  923. sel->pad != FLITE_SD_PAD_SINK)
  924. return -EINVAL;
  925. if (sel->which == V4L2_SUBDEV_FORMAT_TRY) {
  926. sel->r = *v4l2_subdev_get_try_crop(fh, sel->pad);
  927. return 0;
  928. }
  929. mutex_lock(&fimc->lock);
  930. if (sel->target == V4L2_SEL_TGT_CROP) {
  931. sel->r = f->rect;
  932. } else {
  933. sel->r.left = 0;
  934. sel->r.top = 0;
  935. sel->r.width = f->f_width;
  936. sel->r.height = f->f_height;
  937. }
  938. mutex_unlock(&fimc->lock);
  939. v4l2_dbg(1, debug, sd, "%s: (%d,%d) %dx%d, f_w: %d, f_h: %d\n",
  940. __func__, f->rect.left, f->rect.top, f->rect.width,
  941. f->rect.height, f->f_width, f->f_height);
  942. return 0;
  943. }
  944. static int fimc_lite_subdev_set_selection(struct v4l2_subdev *sd,
  945. struct v4l2_subdev_fh *fh,
  946. struct v4l2_subdev_selection *sel)
  947. {
  948. struct fimc_lite *fimc = v4l2_get_subdevdata(sd);
  949. struct flite_frame *f = &fimc->inp_frame;
  950. int ret = 0;
  951. if (sel->target != V4L2_SEL_TGT_CROP || sel->pad != FLITE_SD_PAD_SINK)
  952. return -EINVAL;
  953. mutex_lock(&fimc->lock);
  954. fimc_lite_try_crop(fimc, &sel->r);
  955. if (sel->which == V4L2_SUBDEV_FORMAT_TRY) {
  956. *v4l2_subdev_get_try_crop(fh, sel->pad) = sel->r;
  957. } else {
  958. unsigned long flags;
  959. spin_lock_irqsave(&fimc->slock, flags);
  960. f->rect = sel->r;
  961. /* Same crop rectangle on the source pad */
  962. fimc->out_frame.rect = sel->r;
  963. set_bit(ST_FLITE_CONFIG, &fimc->state);
  964. spin_unlock_irqrestore(&fimc->slock, flags);
  965. }
  966. mutex_unlock(&fimc->lock);
  967. v4l2_dbg(1, debug, sd, "%s: (%d,%d) %dx%d, f_w: %d, f_h: %d\n",
  968. __func__, f->rect.left, f->rect.top, f->rect.width,
  969. f->rect.height, f->f_width, f->f_height);
  970. return ret;
  971. }
  972. static int fimc_lite_subdev_s_stream(struct v4l2_subdev *sd, int on)
  973. {
  974. struct fimc_lite *fimc = v4l2_get_subdevdata(sd);
  975. unsigned long flags;
  976. int ret;
  977. /*
  978. * Find sensor subdev linked to FIMC-LITE directly or through
  979. * MIPI-CSIS. This is required for configuration where FIMC-LITE
  980. * is used as a subdev only and feeds data internally to FIMC-IS.
  981. * The pipeline links are protected through entity.stream_count
  982. * so there is no need to take the media graph mutex here.
  983. */
  984. fimc->sensor = __find_remote_sensor(&sd->entity);
  985. if (atomic_read(&fimc->out_path) != FIMC_IO_ISP)
  986. return -ENOIOCTLCMD;
  987. mutex_lock(&fimc->lock);
  988. if (on) {
  989. flite_hw_reset(fimc);
  990. ret = fimc_lite_hw_init(fimc, true);
  991. if (!ret) {
  992. spin_lock_irqsave(&fimc->slock, flags);
  993. flite_hw_capture_start(fimc);
  994. spin_unlock_irqrestore(&fimc->slock, flags);
  995. }
  996. } else {
  997. set_bit(ST_FLITE_OFF, &fimc->state);
  998. spin_lock_irqsave(&fimc->slock, flags);
  999. flite_hw_capture_stop(fimc);
  1000. spin_unlock_irqrestore(&fimc->slock, flags);
  1001. ret = wait_event_timeout(fimc->irq_queue,
  1002. !test_bit(ST_FLITE_OFF, &fimc->state),
  1003. msecs_to_jiffies(200));
  1004. if (ret == 0)
  1005. v4l2_err(sd, "s_stream(0) timeout\n");
  1006. clear_bit(ST_FLITE_RUN, &fimc->state);
  1007. }
  1008. mutex_unlock(&fimc->lock);
  1009. return ret;
  1010. }
  1011. static int fimc_lite_log_status(struct v4l2_subdev *sd)
  1012. {
  1013. struct fimc_lite *fimc = v4l2_get_subdevdata(sd);
  1014. flite_hw_dump_regs(fimc, __func__);
  1015. return 0;
  1016. }
  1017. static int fimc_lite_subdev_registered(struct v4l2_subdev *sd)
  1018. {
  1019. struct fimc_lite *fimc = v4l2_get_subdevdata(sd);
  1020. struct vb2_queue *q = &fimc->vb_queue;
  1021. struct video_device *vfd = &fimc->vfd;
  1022. int ret;
  1023. memset(vfd, 0, sizeof(*vfd));
  1024. fimc->fmt = &fimc_lite_formats[0];
  1025. atomic_set(&fimc->out_path, FIMC_IO_DMA);
  1026. snprintf(vfd->name, sizeof(vfd->name), "fimc-lite.%d.capture",
  1027. fimc->index);
  1028. vfd->fops = &fimc_lite_fops;
  1029. vfd->ioctl_ops = &fimc_lite_ioctl_ops;
  1030. vfd->v4l2_dev = sd->v4l2_dev;
  1031. vfd->minor = -1;
  1032. vfd->release = video_device_release_empty;
  1033. vfd->queue = q;
  1034. fimc->reqbufs_count = 0;
  1035. INIT_LIST_HEAD(&fimc->pending_buf_q);
  1036. INIT_LIST_HEAD(&fimc->active_buf_q);
  1037. memset(q, 0, sizeof(*q));
  1038. q->type = V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE;
  1039. q->io_modes = VB2_MMAP | VB2_USERPTR;
  1040. q->ops = &fimc_lite_qops;
  1041. q->mem_ops = &vb2_dma_contig_memops;
  1042. q->buf_struct_size = sizeof(struct flite_buffer);
  1043. q->drv_priv = fimc;
  1044. q->timestamp_type = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC;
  1045. q->lock = &fimc->lock;
  1046. ret = vb2_queue_init(q);
  1047. if (ret < 0)
  1048. return ret;
  1049. fimc->vd_pad.flags = MEDIA_PAD_FL_SINK;
  1050. ret = media_entity_init(&vfd->entity, 1, &fimc->vd_pad, 0);
  1051. if (ret < 0)
  1052. return ret;
  1053. video_set_drvdata(vfd, fimc);
  1054. fimc->pipeline_ops = v4l2_get_subdev_hostdata(sd);
  1055. ret = video_register_device(vfd, VFL_TYPE_GRABBER, -1);
  1056. if (ret < 0) {
  1057. media_entity_cleanup(&vfd->entity);
  1058. fimc->pipeline_ops = NULL;
  1059. return ret;
  1060. }
  1061. v4l2_info(sd->v4l2_dev, "Registered %s as /dev/%s\n",
  1062. vfd->name, video_device_node_name(vfd));
  1063. return 0;
  1064. }
  1065. static void fimc_lite_subdev_unregistered(struct v4l2_subdev *sd)
  1066. {
  1067. struct fimc_lite *fimc = v4l2_get_subdevdata(sd);
  1068. if (fimc == NULL)
  1069. return;
  1070. if (video_is_registered(&fimc->vfd)) {
  1071. video_unregister_device(&fimc->vfd);
  1072. media_entity_cleanup(&fimc->vfd.entity);
  1073. fimc->pipeline_ops = NULL;
  1074. }
  1075. }
  1076. static const struct v4l2_subdev_internal_ops fimc_lite_subdev_internal_ops = {
  1077. .registered = fimc_lite_subdev_registered,
  1078. .unregistered = fimc_lite_subdev_unregistered,
  1079. };
  1080. static const struct v4l2_subdev_pad_ops fimc_lite_subdev_pad_ops = {
  1081. .enum_mbus_code = fimc_lite_subdev_enum_mbus_code,
  1082. .get_selection = fimc_lite_subdev_get_selection,
  1083. .set_selection = fimc_lite_subdev_set_selection,
  1084. .get_fmt = fimc_lite_subdev_get_fmt,
  1085. .set_fmt = fimc_lite_subdev_set_fmt,
  1086. };
  1087. static const struct v4l2_subdev_video_ops fimc_lite_subdev_video_ops = {
  1088. .s_stream = fimc_lite_subdev_s_stream,
  1089. };
  1090. static const struct v4l2_subdev_core_ops fimc_lite_core_ops = {
  1091. .log_status = fimc_lite_log_status,
  1092. };
  1093. static struct v4l2_subdev_ops fimc_lite_subdev_ops = {
  1094. .core = &fimc_lite_core_ops,
  1095. .video = &fimc_lite_subdev_video_ops,
  1096. .pad = &fimc_lite_subdev_pad_ops,
  1097. };
  1098. static int fimc_lite_s_ctrl(struct v4l2_ctrl *ctrl)
  1099. {
  1100. struct fimc_lite *fimc = container_of(ctrl->handler, struct fimc_lite,
  1101. ctrl_handler);
  1102. set_bit(ST_FLITE_CONFIG, &fimc->state);
  1103. return 0;
  1104. }
  1105. static const struct v4l2_ctrl_ops fimc_lite_ctrl_ops = {
  1106. .s_ctrl = fimc_lite_s_ctrl,
  1107. };
  1108. static const struct v4l2_ctrl_config fimc_lite_ctrl = {
  1109. .ops = &fimc_lite_ctrl_ops,
  1110. .id = V4L2_CTRL_CLASS_USER | 0x1001,
  1111. .type = V4L2_CTRL_TYPE_BOOLEAN,
  1112. .name = "Test Pattern 640x480",
  1113. .step = 1,
  1114. };
  1115. static int fimc_lite_create_capture_subdev(struct fimc_lite *fimc)
  1116. {
  1117. struct v4l2_ctrl_handler *handler = &fimc->ctrl_handler;
  1118. struct v4l2_subdev *sd = &fimc->subdev;
  1119. int ret;
  1120. v4l2_subdev_init(sd, &fimc_lite_subdev_ops);
  1121. sd->flags = V4L2_SUBDEV_FL_HAS_DEVNODE;
  1122. snprintf(sd->name, sizeof(sd->name), "FIMC-LITE.%d", fimc->index);
  1123. fimc->subdev_pads[FLITE_SD_PAD_SINK].flags = MEDIA_PAD_FL_SINK;
  1124. fimc->subdev_pads[FLITE_SD_PAD_SOURCE_DMA].flags = MEDIA_PAD_FL_SOURCE;
  1125. fimc->subdev_pads[FLITE_SD_PAD_SOURCE_ISP].flags = MEDIA_PAD_FL_SOURCE;
  1126. ret = media_entity_init(&sd->entity, FLITE_SD_PADS_NUM,
  1127. fimc->subdev_pads, 0);
  1128. if (ret)
  1129. return ret;
  1130. v4l2_ctrl_handler_init(handler, 1);
  1131. fimc->test_pattern = v4l2_ctrl_new_custom(handler, &fimc_lite_ctrl,
  1132. NULL);
  1133. if (handler->error) {
  1134. media_entity_cleanup(&sd->entity);
  1135. return handler->error;
  1136. }
  1137. sd->ctrl_handler = handler;
  1138. sd->internal_ops = &fimc_lite_subdev_internal_ops;
  1139. sd->entity.ops = &fimc_lite_subdev_media_ops;
  1140. v4l2_set_subdevdata(sd, fimc);
  1141. return 0;
  1142. }
  1143. static void fimc_lite_unregister_capture_subdev(struct fimc_lite *fimc)
  1144. {
  1145. struct v4l2_subdev *sd = &fimc->subdev;
  1146. v4l2_device_unregister_subdev(sd);
  1147. media_entity_cleanup(&sd->entity);
  1148. v4l2_ctrl_handler_free(&fimc->ctrl_handler);
  1149. v4l2_set_subdevdata(sd, NULL);
  1150. }
  1151. static void fimc_lite_clk_put(struct fimc_lite *fimc)
  1152. {
  1153. if (IS_ERR_OR_NULL(fimc->clock))
  1154. return;
  1155. clk_unprepare(fimc->clock);
  1156. clk_put(fimc->clock);
  1157. fimc->clock = NULL;
  1158. }
  1159. static int fimc_lite_clk_get(struct fimc_lite *fimc)
  1160. {
  1161. int ret;
  1162. fimc->clock = clk_get(&fimc->pdev->dev, FLITE_CLK_NAME);
  1163. if (IS_ERR(fimc->clock))
  1164. return PTR_ERR(fimc->clock);
  1165. ret = clk_prepare(fimc->clock);
  1166. if (ret < 0) {
  1167. clk_put(fimc->clock);
  1168. fimc->clock = NULL;
  1169. }
  1170. return ret;
  1171. }
  1172. static const struct of_device_id flite_of_match[];
  1173. static int fimc_lite_probe(struct platform_device *pdev)
  1174. {
  1175. struct flite_drvdata *drv_data = NULL;
  1176. struct device *dev = &pdev->dev;
  1177. const struct of_device_id *of_id;
  1178. struct fimc_lite *fimc;
  1179. struct resource *res;
  1180. int ret;
  1181. fimc = devm_kzalloc(dev, sizeof(*fimc), GFP_KERNEL);
  1182. if (!fimc)
  1183. return -ENOMEM;
  1184. if (dev->of_node) {
  1185. of_id = of_match_node(flite_of_match, dev->of_node);
  1186. if (of_id)
  1187. drv_data = (struct flite_drvdata *)of_id->data;
  1188. fimc->index = of_alias_get_id(dev->of_node, "fimc-lite");
  1189. } else {
  1190. drv_data = fimc_lite_get_drvdata(pdev);
  1191. fimc->index = pdev->id;
  1192. }
  1193. if (!drv_data || fimc->index < 0 || fimc->index >= FIMC_LITE_MAX_DEVS)
  1194. return -EINVAL;
  1195. fimc->dd = drv_data;
  1196. fimc->pdev = pdev;
  1197. init_waitqueue_head(&fimc->irq_queue);
  1198. spin_lock_init(&fimc->slock);
  1199. mutex_init(&fimc->lock);
  1200. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  1201. fimc->regs = devm_ioremap_resource(dev, res);
  1202. if (IS_ERR(fimc->regs))
  1203. return PTR_ERR(fimc->regs);
  1204. res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
  1205. if (res == NULL) {
  1206. dev_err(dev, "Failed to get IRQ resource\n");
  1207. return -ENXIO;
  1208. }
  1209. ret = fimc_lite_clk_get(fimc);
  1210. if (ret)
  1211. return ret;
  1212. ret = devm_request_irq(dev, res->start, flite_irq_handler,
  1213. 0, dev_name(dev), fimc);
  1214. if (ret) {
  1215. dev_err(dev, "Failed to install irq (%d)\n", ret);
  1216. goto err_clk;
  1217. }
  1218. /* The video node will be created within the subdev's registered() op */
  1219. ret = fimc_lite_create_capture_subdev(fimc);
  1220. if (ret)
  1221. goto err_clk;
  1222. platform_set_drvdata(pdev, fimc);
  1223. pm_runtime_enable(dev);
  1224. ret = pm_runtime_get_sync(dev);
  1225. if (ret < 0)
  1226. goto err_sd;
  1227. fimc->alloc_ctx = vb2_dma_contig_init_ctx(dev);
  1228. if (IS_ERR(fimc->alloc_ctx)) {
  1229. ret = PTR_ERR(fimc->alloc_ctx);
  1230. goto err_pm;
  1231. }
  1232. pm_runtime_put(dev);
  1233. dev_dbg(dev, "FIMC-LITE.%d registered successfully\n",
  1234. fimc->index);
  1235. return 0;
  1236. err_pm:
  1237. pm_runtime_put(dev);
  1238. err_sd:
  1239. fimc_lite_unregister_capture_subdev(fimc);
  1240. err_clk:
  1241. fimc_lite_clk_put(fimc);
  1242. return ret;
  1243. }
  1244. static int fimc_lite_runtime_resume(struct device *dev)
  1245. {
  1246. struct fimc_lite *fimc = dev_get_drvdata(dev);
  1247. clk_enable(fimc->clock);
  1248. return 0;
  1249. }
  1250. static int fimc_lite_runtime_suspend(struct device *dev)
  1251. {
  1252. struct fimc_lite *fimc = dev_get_drvdata(dev);
  1253. clk_disable(fimc->clock);
  1254. return 0;
  1255. }
  1256. #ifdef CONFIG_PM_SLEEP
  1257. static int fimc_lite_resume(struct device *dev)
  1258. {
  1259. struct fimc_lite *fimc = dev_get_drvdata(dev);
  1260. struct flite_buffer *buf;
  1261. unsigned long flags;
  1262. int i;
  1263. spin_lock_irqsave(&fimc->slock, flags);
  1264. if (!test_and_clear_bit(ST_LPM, &fimc->state) ||
  1265. !test_bit(ST_FLITE_IN_USE, &fimc->state)) {
  1266. spin_unlock_irqrestore(&fimc->slock, flags);
  1267. return 0;
  1268. }
  1269. flite_hw_reset(fimc);
  1270. spin_unlock_irqrestore(&fimc->slock, flags);
  1271. if (!test_and_clear_bit(ST_FLITE_SUSPENDED, &fimc->state))
  1272. return 0;
  1273. INIT_LIST_HEAD(&fimc->active_buf_q);
  1274. fimc_pipeline_call(fimc, open, &fimc->pipeline,
  1275. &fimc->vfd.entity, false);
  1276. fimc_lite_hw_init(fimc, atomic_read(&fimc->out_path) == FIMC_IO_ISP);
  1277. clear_bit(ST_FLITE_SUSPENDED, &fimc->state);
  1278. for (i = 0; i < fimc->reqbufs_count; i++) {
  1279. if (list_empty(&fimc->pending_buf_q))
  1280. break;
  1281. buf = fimc_lite_pending_queue_pop(fimc);
  1282. buffer_queue(&buf->vb);
  1283. }
  1284. return 0;
  1285. }
  1286. static int fimc_lite_suspend(struct device *dev)
  1287. {
  1288. struct fimc_lite *fimc = dev_get_drvdata(dev);
  1289. bool suspend = test_bit(ST_FLITE_IN_USE, &fimc->state);
  1290. int ret;
  1291. if (test_and_set_bit(ST_LPM, &fimc->state))
  1292. return 0;
  1293. ret = fimc_lite_stop_capture(fimc, suspend);
  1294. if (ret < 0 || !fimc_lite_active(fimc))
  1295. return ret;
  1296. return fimc_pipeline_call(fimc, close, &fimc->pipeline);
  1297. }
  1298. #endif /* CONFIG_PM_SLEEP */
  1299. static int fimc_lite_remove(struct platform_device *pdev)
  1300. {
  1301. struct fimc_lite *fimc = platform_get_drvdata(pdev);
  1302. struct device *dev = &pdev->dev;
  1303. pm_runtime_disable(dev);
  1304. pm_runtime_set_suspended(dev);
  1305. fimc_lite_unregister_capture_subdev(fimc);
  1306. vb2_dma_contig_cleanup_ctx(fimc->alloc_ctx);
  1307. fimc_lite_clk_put(fimc);
  1308. dev_info(dev, "Driver unloaded\n");
  1309. return 0;
  1310. }
  1311. static const struct dev_pm_ops fimc_lite_pm_ops = {
  1312. SET_SYSTEM_SLEEP_PM_OPS(fimc_lite_suspend, fimc_lite_resume)
  1313. SET_RUNTIME_PM_OPS(fimc_lite_runtime_suspend, fimc_lite_runtime_resume,
  1314. NULL)
  1315. };
  1316. /* EXYNOS4212, EXYNOS4412 */
  1317. static struct flite_drvdata fimc_lite_drvdata_exynos4 = {
  1318. .max_width = 8192,
  1319. .max_height = 8192,
  1320. .out_width_align = 8,
  1321. .win_hor_offs_align = 2,
  1322. .out_hor_offs_align = 8,
  1323. };
  1324. static struct platform_device_id fimc_lite_driver_ids[] = {
  1325. {
  1326. .name = "exynos-fimc-lite",
  1327. .driver_data = (unsigned long)&fimc_lite_drvdata_exynos4,
  1328. },
  1329. { /* sentinel */ },
  1330. };
  1331. MODULE_DEVICE_TABLE(platform, fimc_lite_driver_ids);
  1332. static const struct of_device_id flite_of_match[] = {
  1333. {
  1334. .compatible = "samsung,exynos4212-fimc-lite",
  1335. .data = &fimc_lite_drvdata_exynos4,
  1336. },
  1337. { /* sentinel */ },
  1338. };
  1339. MODULE_DEVICE_TABLE(of, flite_of_match);
  1340. static struct platform_driver fimc_lite_driver = {
  1341. .probe = fimc_lite_probe,
  1342. .remove = fimc_lite_remove,
  1343. .id_table = fimc_lite_driver_ids,
  1344. .driver = {
  1345. .of_match_table = flite_of_match,
  1346. .name = FIMC_LITE_DRV_NAME,
  1347. .owner = THIS_MODULE,
  1348. .pm = &fimc_lite_pm_ops,
  1349. }
  1350. };
  1351. module_platform_driver(fimc_lite_driver);
  1352. MODULE_LICENSE("GPL");
  1353. MODULE_ALIAS("platform:" FIMC_LITE_DRV_NAME);