ice1724.c 72 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933934935936937938939940941942943944945946947948949950951952953954955956957958959960961962963964965966967968969970971972973974975976977978979980981982983984985986987988989990991992993994995996997998999100010011002100310041005100610071008100910101011101210131014101510161017101810191020102110221023102410251026102710281029103010311032103310341035103610371038103910401041104210431044104510461047104810491050105110521053105410551056105710581059106010611062106310641065106610671068106910701071107210731074107510761077107810791080108110821083108410851086108710881089109010911092109310941095109610971098109911001101110211031104110511061107110811091110111111121113111411151116111711181119112011211122112311241125112611271128112911301131113211331134113511361137113811391140114111421143114411451146114711481149115011511152115311541155115611571158115911601161116211631164116511661167116811691170117111721173117411751176117711781179118011811182118311841185118611871188118911901191119211931194119511961197119811991200120112021203120412051206120712081209121012111212121312141215121612171218121912201221122212231224122512261227122812291230123112321233123412351236123712381239124012411242124312441245124612471248124912501251125212531254125512561257125812591260126112621263126412651266126712681269127012711272127312741275127612771278127912801281128212831284128512861287128812891290129112921293129412951296129712981299130013011302130313041305130613071308130913101311131213131314131513161317131813191320132113221323132413251326132713281329133013311332133313341335133613371338133913401341134213431344134513461347134813491350135113521353135413551356135713581359136013611362136313641365136613671368136913701371137213731374137513761377137813791380138113821383138413851386138713881389139013911392139313941395139613971398139914001401140214031404140514061407140814091410141114121413141414151416141714181419142014211422142314241425142614271428142914301431143214331434143514361437143814391440144114421443144414451446144714481449145014511452145314541455145614571458145914601461146214631464146514661467146814691470147114721473147414751476147714781479148014811482148314841485148614871488148914901491149214931494149514961497149814991500150115021503150415051506150715081509151015111512151315141515151615171518151915201521152215231524152515261527152815291530153115321533153415351536153715381539154015411542154315441545154615471548154915501551155215531554155515561557155815591560156115621563156415651566156715681569157015711572157315741575157615771578157915801581158215831584158515861587158815891590159115921593159415951596159715981599160016011602160316041605160616071608160916101611161216131614161516161617161816191620162116221623162416251626162716281629163016311632163316341635163616371638163916401641164216431644164516461647164816491650165116521653165416551656165716581659166016611662166316641665166616671668166916701671167216731674167516761677167816791680168116821683168416851686168716881689169016911692169316941695169616971698169917001701170217031704170517061707170817091710171117121713171417151716171717181719172017211722172317241725172617271728172917301731173217331734173517361737173817391740174117421743174417451746174717481749175017511752175317541755175617571758175917601761176217631764176517661767176817691770177117721773177417751776177717781779178017811782178317841785178617871788178917901791179217931794179517961797179817991800180118021803180418051806180718081809181018111812181318141815181618171818181918201821182218231824182518261827182818291830183118321833183418351836183718381839184018411842184318441845184618471848184918501851185218531854185518561857185818591860186118621863186418651866186718681869187018711872187318741875187618771878187918801881188218831884188518861887188818891890189118921893189418951896189718981899190019011902190319041905190619071908190919101911191219131914191519161917191819191920192119221923192419251926192719281929193019311932193319341935193619371938193919401941194219431944194519461947194819491950195119521953195419551956195719581959196019611962196319641965196619671968196919701971197219731974197519761977197819791980198119821983198419851986198719881989199019911992199319941995199619971998199920002001200220032004200520062007200820092010201120122013201420152016201720182019202020212022202320242025202620272028202920302031203220332034203520362037203820392040204120422043204420452046204720482049205020512052205320542055205620572058205920602061206220632064206520662067206820692070207120722073207420752076207720782079208020812082208320842085208620872088208920902091209220932094209520962097209820992100210121022103210421052106210721082109211021112112211321142115211621172118211921202121212221232124212521262127212821292130213121322133213421352136213721382139214021412142214321442145214621472148214921502151215221532154215521562157215821592160216121622163216421652166216721682169217021712172217321742175217621772178217921802181218221832184218521862187218821892190219121922193219421952196219721982199220022012202220322042205220622072208220922102211221222132214221522162217221822192220222122222223222422252226222722282229223022312232223322342235223622372238223922402241224222432244224522462247224822492250225122522253225422552256225722582259226022612262226322642265226622672268226922702271227222732274227522762277227822792280228122822283228422852286228722882289229022912292229322942295229622972298229923002301230223032304230523062307230823092310231123122313231423152316231723182319232023212322232323242325232623272328232923302331233223332334233523362337233823392340234123422343234423452346234723482349235023512352235323542355235623572358235923602361236223632364236523662367236823692370237123722373237423752376237723782379238023812382238323842385238623872388238923902391239223932394239523962397239823992400240124022403240424052406240724082409241024112412241324142415241624172418241924202421242224232424242524262427242824292430243124322433243424352436243724382439244024412442244324442445244624472448244924502451245224532454245524562457245824592460246124622463246424652466246724682469247024712472247324742475247624772478247924802481248224832484248524862487248824892490249124922493249424952496249724982499250025012502250325042505250625072508250925102511251225132514251525162517251825192520252125222523252425252526252725282529253025312532253325342535253625372538253925402541254225432544254525462547254825492550255125522553255425552556255725582559256025612562256325642565256625672568256925702571257225732574257525762577257825792580258125822583258425852586258725882589259025912592259325942595259625972598259926002601260226032604260526062607260826092610261126122613261426152616261726182619262026212622262326242625
  1. /*
  2. * ALSA driver for VT1724 ICEnsemble ICE1724 / VIA VT1724 (Envy24HT)
  3. * VIA VT1720 (Envy24PT)
  4. *
  5. * Copyright (c) 2000 Jaroslav Kysela <perex@perex.cz>
  6. * 2002 James Stafford <jstafford@ampltd.com>
  7. * 2003 Takashi Iwai <tiwai@suse.de>
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License as published by
  11. * the Free Software Foundation; either version 2 of the License, or
  12. * (at your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License
  20. * along with this program; if not, write to the Free Software
  21. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  22. *
  23. */
  24. #include <linux/io.h>
  25. #include <linux/delay.h>
  26. #include <linux/interrupt.h>
  27. #include <linux/init.h>
  28. #include <linux/pci.h>
  29. #include <linux/slab.h>
  30. #include <linux/moduleparam.h>
  31. #include <linux/mutex.h>
  32. #include <sound/core.h>
  33. #include <sound/info.h>
  34. #include <sound/rawmidi.h>
  35. #include <sound/initval.h>
  36. #include <sound/asoundef.h>
  37. #include "ice1712.h"
  38. #include "envy24ht.h"
  39. /* lowlevel routines */
  40. #include "amp.h"
  41. #include "revo.h"
  42. #include "aureon.h"
  43. #include "vt1720_mobo.h"
  44. #include "pontis.h"
  45. #include "prodigy192.h"
  46. #include "prodigy_hifi.h"
  47. #include "juli.h"
  48. #include "phase.h"
  49. #include "wtm.h"
  50. #include "se.h"
  51. MODULE_AUTHOR("Jaroslav Kysela <perex@perex.cz>");
  52. MODULE_DESCRIPTION("VIA ICEnsemble ICE1724/1720 (Envy24HT/PT)");
  53. MODULE_LICENSE("GPL");
  54. MODULE_SUPPORTED_DEVICE("{"
  55. REVO_DEVICE_DESC
  56. AMP_AUDIO2000_DEVICE_DESC
  57. AUREON_DEVICE_DESC
  58. VT1720_MOBO_DEVICE_DESC
  59. PONTIS_DEVICE_DESC
  60. PRODIGY192_DEVICE_DESC
  61. PRODIGY_HIFI_DEVICE_DESC
  62. JULI_DEVICE_DESC
  63. PHASE_DEVICE_DESC
  64. WTM_DEVICE_DESC
  65. SE_DEVICE_DESC
  66. "{VIA,VT1720},"
  67. "{VIA,VT1724},"
  68. "{ICEnsemble,Generic ICE1724},"
  69. "{ICEnsemble,Generic Envy24HT}"
  70. "{ICEnsemble,Generic Envy24PT}}");
  71. static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */
  72. static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */
  73. static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; /* Enable this card */
  74. static char *model[SNDRV_CARDS];
  75. module_param_array(index, int, NULL, 0444);
  76. MODULE_PARM_DESC(index, "Index value for ICE1724 soundcard.");
  77. module_param_array(id, charp, NULL, 0444);
  78. MODULE_PARM_DESC(id, "ID string for ICE1724 soundcard.");
  79. module_param_array(enable, bool, NULL, 0444);
  80. MODULE_PARM_DESC(enable, "Enable ICE1724 soundcard.");
  81. module_param_array(model, charp, NULL, 0444);
  82. MODULE_PARM_DESC(model, "Use the given board model.");
  83. /* Both VT1720 and VT1724 have the same PCI IDs */
  84. static const struct pci_device_id snd_vt1724_ids[] = {
  85. { PCI_VENDOR_ID_ICE, PCI_DEVICE_ID_VT1724, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
  86. { 0, }
  87. };
  88. MODULE_DEVICE_TABLE(pci, snd_vt1724_ids);
  89. static int PRO_RATE_LOCKED;
  90. static int PRO_RATE_RESET = 1;
  91. static unsigned int PRO_RATE_DEFAULT = 44100;
  92. /*
  93. * Basic I/O
  94. */
  95. /*
  96. * default rates, default clock routines
  97. */
  98. /* check whether the clock mode is spdif-in */
  99. static inline int stdclock_is_spdif_master(struct snd_ice1712 *ice)
  100. {
  101. return (inb(ICEMT1724(ice, RATE)) & VT1724_SPDIF_MASTER) ? 1 : 0;
  102. }
  103. static inline int is_pro_rate_locked(struct snd_ice1712 *ice)
  104. {
  105. return ice->is_spdif_master(ice) || PRO_RATE_LOCKED;
  106. }
  107. /*
  108. * ac97 section
  109. */
  110. static unsigned char snd_vt1724_ac97_ready(struct snd_ice1712 *ice)
  111. {
  112. unsigned char old_cmd;
  113. int tm;
  114. for (tm = 0; tm < 0x10000; tm++) {
  115. old_cmd = inb(ICEMT1724(ice, AC97_CMD));
  116. if (old_cmd & (VT1724_AC97_WRITE | VT1724_AC97_READ))
  117. continue;
  118. if (!(old_cmd & VT1724_AC97_READY))
  119. continue;
  120. return old_cmd;
  121. }
  122. snd_printd(KERN_ERR "snd_vt1724_ac97_ready: timeout\n");
  123. return old_cmd;
  124. }
  125. static int snd_vt1724_ac97_wait_bit(struct snd_ice1712 *ice, unsigned char bit)
  126. {
  127. int tm;
  128. for (tm = 0; tm < 0x10000; tm++)
  129. if ((inb(ICEMT1724(ice, AC97_CMD)) & bit) == 0)
  130. return 0;
  131. snd_printd(KERN_ERR "snd_vt1724_ac97_wait_bit: timeout\n");
  132. return -EIO;
  133. }
  134. static void snd_vt1724_ac97_write(struct snd_ac97 *ac97,
  135. unsigned short reg,
  136. unsigned short val)
  137. {
  138. struct snd_ice1712 *ice = ac97->private_data;
  139. unsigned char old_cmd;
  140. old_cmd = snd_vt1724_ac97_ready(ice);
  141. old_cmd &= ~VT1724_AC97_ID_MASK;
  142. old_cmd |= ac97->num;
  143. outb(reg, ICEMT1724(ice, AC97_INDEX));
  144. outw(val, ICEMT1724(ice, AC97_DATA));
  145. outb(old_cmd | VT1724_AC97_WRITE, ICEMT1724(ice, AC97_CMD));
  146. snd_vt1724_ac97_wait_bit(ice, VT1724_AC97_WRITE);
  147. }
  148. static unsigned short snd_vt1724_ac97_read(struct snd_ac97 *ac97, unsigned short reg)
  149. {
  150. struct snd_ice1712 *ice = ac97->private_data;
  151. unsigned char old_cmd;
  152. old_cmd = snd_vt1724_ac97_ready(ice);
  153. old_cmd &= ~VT1724_AC97_ID_MASK;
  154. old_cmd |= ac97->num;
  155. outb(reg, ICEMT1724(ice, AC97_INDEX));
  156. outb(old_cmd | VT1724_AC97_READ, ICEMT1724(ice, AC97_CMD));
  157. if (snd_vt1724_ac97_wait_bit(ice, VT1724_AC97_READ) < 0)
  158. return ~0;
  159. return inw(ICEMT1724(ice, AC97_DATA));
  160. }
  161. /*
  162. * GPIO operations
  163. */
  164. /* set gpio direction 0 = read, 1 = write */
  165. static void snd_vt1724_set_gpio_dir(struct snd_ice1712 *ice, unsigned int data)
  166. {
  167. outl(data, ICEREG1724(ice, GPIO_DIRECTION));
  168. inw(ICEREG1724(ice, GPIO_DIRECTION)); /* dummy read for pci-posting */
  169. }
  170. /* set the gpio mask (0 = writable) */
  171. static void snd_vt1724_set_gpio_mask(struct snd_ice1712 *ice, unsigned int data)
  172. {
  173. outw(data, ICEREG1724(ice, GPIO_WRITE_MASK));
  174. if (!ice->vt1720) /* VT1720 supports only 16 GPIO bits */
  175. outb((data >> 16) & 0xff, ICEREG1724(ice, GPIO_WRITE_MASK_22));
  176. inw(ICEREG1724(ice, GPIO_WRITE_MASK)); /* dummy read for pci-posting */
  177. }
  178. static void snd_vt1724_set_gpio_data(struct snd_ice1712 *ice, unsigned int data)
  179. {
  180. outw(data, ICEREG1724(ice, GPIO_DATA));
  181. if (!ice->vt1720)
  182. outb(data >> 16, ICEREG1724(ice, GPIO_DATA_22));
  183. inw(ICEREG1724(ice, GPIO_DATA)); /* dummy read for pci-posting */
  184. }
  185. static unsigned int snd_vt1724_get_gpio_data(struct snd_ice1712 *ice)
  186. {
  187. unsigned int data;
  188. if (!ice->vt1720)
  189. data = (unsigned int)inb(ICEREG1724(ice, GPIO_DATA_22));
  190. else
  191. data = 0;
  192. data = (data << 16) | inw(ICEREG1724(ice, GPIO_DATA));
  193. return data;
  194. }
  195. /*
  196. * MIDI
  197. */
  198. static void vt1724_midi_clear_rx(struct snd_ice1712 *ice)
  199. {
  200. unsigned int count;
  201. for (count = inb(ICEREG1724(ice, MPU_RXFIFO)); count > 0; --count)
  202. inb(ICEREG1724(ice, MPU_DATA));
  203. }
  204. static inline struct snd_rawmidi_substream *
  205. get_rawmidi_substream(struct snd_ice1712 *ice, unsigned int stream)
  206. {
  207. return list_first_entry(&ice->rmidi[0]->streams[stream].substreams,
  208. struct snd_rawmidi_substream, list);
  209. }
  210. static void vt1724_midi_write(struct snd_ice1712 *ice)
  211. {
  212. struct snd_rawmidi_substream *s;
  213. int count, i;
  214. u8 buffer[32];
  215. s = get_rawmidi_substream(ice, SNDRV_RAWMIDI_STREAM_OUTPUT);
  216. count = 31 - inb(ICEREG1724(ice, MPU_TXFIFO));
  217. if (count > 0) {
  218. count = snd_rawmidi_transmit(s, buffer, count);
  219. for (i = 0; i < count; ++i)
  220. outb(buffer[i], ICEREG1724(ice, MPU_DATA));
  221. }
  222. }
  223. static void vt1724_midi_read(struct snd_ice1712 *ice)
  224. {
  225. struct snd_rawmidi_substream *s;
  226. int count, i;
  227. u8 buffer[32];
  228. s = get_rawmidi_substream(ice, SNDRV_RAWMIDI_STREAM_INPUT);
  229. count = inb(ICEREG1724(ice, MPU_RXFIFO));
  230. if (count > 0) {
  231. count = min(count, 32);
  232. for (i = 0; i < count; ++i)
  233. buffer[i] = inb(ICEREG1724(ice, MPU_DATA));
  234. snd_rawmidi_receive(s, buffer, count);
  235. }
  236. }
  237. static void vt1724_enable_midi_irq(struct snd_rawmidi_substream *substream,
  238. u8 flag, int enable)
  239. {
  240. struct snd_ice1712 *ice = substream->rmidi->private_data;
  241. u8 mask;
  242. spin_lock_irq(&ice->reg_lock);
  243. mask = inb(ICEREG1724(ice, IRQMASK));
  244. if (enable)
  245. mask &= ~flag;
  246. else
  247. mask |= flag;
  248. outb(mask, ICEREG1724(ice, IRQMASK));
  249. spin_unlock_irq(&ice->reg_lock);
  250. }
  251. static int vt1724_midi_output_open(struct snd_rawmidi_substream *s)
  252. {
  253. vt1724_enable_midi_irq(s, VT1724_IRQ_MPU_TX, 1);
  254. return 0;
  255. }
  256. static int vt1724_midi_output_close(struct snd_rawmidi_substream *s)
  257. {
  258. vt1724_enable_midi_irq(s, VT1724_IRQ_MPU_TX, 0);
  259. return 0;
  260. }
  261. static void vt1724_midi_output_trigger(struct snd_rawmidi_substream *s, int up)
  262. {
  263. struct snd_ice1712 *ice = s->rmidi->private_data;
  264. unsigned long flags;
  265. spin_lock_irqsave(&ice->reg_lock, flags);
  266. if (up) {
  267. ice->midi_output = 1;
  268. vt1724_midi_write(ice);
  269. } else {
  270. ice->midi_output = 0;
  271. }
  272. spin_unlock_irqrestore(&ice->reg_lock, flags);
  273. }
  274. static void vt1724_midi_output_drain(struct snd_rawmidi_substream *s)
  275. {
  276. struct snd_ice1712 *ice = s->rmidi->private_data;
  277. unsigned long timeout;
  278. /* 32 bytes should be transmitted in less than about 12 ms */
  279. timeout = jiffies + msecs_to_jiffies(15);
  280. do {
  281. if (inb(ICEREG1724(ice, MPU_CTRL)) & VT1724_MPU_TX_EMPTY)
  282. break;
  283. schedule_timeout_uninterruptible(1);
  284. } while (time_after(timeout, jiffies));
  285. }
  286. static struct snd_rawmidi_ops vt1724_midi_output_ops = {
  287. .open = vt1724_midi_output_open,
  288. .close = vt1724_midi_output_close,
  289. .trigger = vt1724_midi_output_trigger,
  290. .drain = vt1724_midi_output_drain,
  291. };
  292. static int vt1724_midi_input_open(struct snd_rawmidi_substream *s)
  293. {
  294. vt1724_midi_clear_rx(s->rmidi->private_data);
  295. vt1724_enable_midi_irq(s, VT1724_IRQ_MPU_RX, 1);
  296. return 0;
  297. }
  298. static int vt1724_midi_input_close(struct snd_rawmidi_substream *s)
  299. {
  300. vt1724_enable_midi_irq(s, VT1724_IRQ_MPU_RX, 0);
  301. return 0;
  302. }
  303. static void vt1724_midi_input_trigger(struct snd_rawmidi_substream *s, int up)
  304. {
  305. struct snd_ice1712 *ice = s->rmidi->private_data;
  306. unsigned long flags;
  307. spin_lock_irqsave(&ice->reg_lock, flags);
  308. if (up) {
  309. ice->midi_input = 1;
  310. vt1724_midi_read(ice);
  311. } else {
  312. ice->midi_input = 0;
  313. }
  314. spin_unlock_irqrestore(&ice->reg_lock, flags);
  315. }
  316. static struct snd_rawmidi_ops vt1724_midi_input_ops = {
  317. .open = vt1724_midi_input_open,
  318. .close = vt1724_midi_input_close,
  319. .trigger = vt1724_midi_input_trigger,
  320. };
  321. /*
  322. * Interrupt handler
  323. */
  324. static irqreturn_t snd_vt1724_interrupt(int irq, void *dev_id)
  325. {
  326. struct snd_ice1712 *ice = dev_id;
  327. unsigned char status;
  328. unsigned char status_mask =
  329. VT1724_IRQ_MPU_RX | VT1724_IRQ_MPU_TX | VT1724_IRQ_MTPCM;
  330. int handled = 0;
  331. int timeout = 0;
  332. while (1) {
  333. status = inb(ICEREG1724(ice, IRQSTAT));
  334. status &= status_mask;
  335. if (status == 0)
  336. break;
  337. if (++timeout > 10) {
  338. status = inb(ICEREG1724(ice, IRQSTAT));
  339. printk(KERN_ERR "ice1724: Too long irq loop, "
  340. "status = 0x%x\n", status);
  341. if (status & VT1724_IRQ_MPU_TX) {
  342. printk(KERN_ERR "ice1724: Disabling MPU_TX\n");
  343. outb(inb(ICEREG1724(ice, IRQMASK)) |
  344. VT1724_IRQ_MPU_TX,
  345. ICEREG1724(ice, IRQMASK));
  346. }
  347. break;
  348. }
  349. handled = 1;
  350. if (status & VT1724_IRQ_MPU_TX) {
  351. spin_lock(&ice->reg_lock);
  352. if (ice->midi_output)
  353. vt1724_midi_write(ice);
  354. spin_unlock(&ice->reg_lock);
  355. /* Due to mysterical reasons, MPU_TX is always
  356. * generated (and can't be cleared) when a PCM
  357. * playback is going. So let's ignore at the
  358. * next loop.
  359. */
  360. status_mask &= ~VT1724_IRQ_MPU_TX;
  361. }
  362. if (status & VT1724_IRQ_MPU_RX) {
  363. spin_lock(&ice->reg_lock);
  364. if (ice->midi_input)
  365. vt1724_midi_read(ice);
  366. else
  367. vt1724_midi_clear_rx(ice);
  368. spin_unlock(&ice->reg_lock);
  369. }
  370. /* ack MPU irq */
  371. outb(status, ICEREG1724(ice, IRQSTAT));
  372. if (status & VT1724_IRQ_MTPCM) {
  373. /*
  374. * Multi-track PCM
  375. * PCM assignment are:
  376. * Playback DMA0 (M/C) = playback_pro_substream
  377. * Playback DMA1 = playback_con_substream_ds[0]
  378. * Playback DMA2 = playback_con_substream_ds[1]
  379. * Playback DMA3 = playback_con_substream_ds[2]
  380. * Playback DMA4 (SPDIF) = playback_con_substream
  381. * Record DMA0 = capture_pro_substream
  382. * Record DMA1 = capture_con_substream
  383. */
  384. unsigned char mtstat = inb(ICEMT1724(ice, IRQ));
  385. if (mtstat & VT1724_MULTI_PDMA0) {
  386. if (ice->playback_pro_substream)
  387. snd_pcm_period_elapsed(ice->playback_pro_substream);
  388. }
  389. if (mtstat & VT1724_MULTI_RDMA0) {
  390. if (ice->capture_pro_substream)
  391. snd_pcm_period_elapsed(ice->capture_pro_substream);
  392. }
  393. if (mtstat & VT1724_MULTI_PDMA1) {
  394. if (ice->playback_con_substream_ds[0])
  395. snd_pcm_period_elapsed(ice->playback_con_substream_ds[0]);
  396. }
  397. if (mtstat & VT1724_MULTI_PDMA2) {
  398. if (ice->playback_con_substream_ds[1])
  399. snd_pcm_period_elapsed(ice->playback_con_substream_ds[1]);
  400. }
  401. if (mtstat & VT1724_MULTI_PDMA3) {
  402. if (ice->playback_con_substream_ds[2])
  403. snd_pcm_period_elapsed(ice->playback_con_substream_ds[2]);
  404. }
  405. if (mtstat & VT1724_MULTI_PDMA4) {
  406. if (ice->playback_con_substream)
  407. snd_pcm_period_elapsed(ice->playback_con_substream);
  408. }
  409. if (mtstat & VT1724_MULTI_RDMA1) {
  410. if (ice->capture_con_substream)
  411. snd_pcm_period_elapsed(ice->capture_con_substream);
  412. }
  413. /* ack anyway to avoid freeze */
  414. outb(mtstat, ICEMT1724(ice, IRQ));
  415. /* ought to really handle this properly */
  416. if (mtstat & VT1724_MULTI_FIFO_ERR) {
  417. unsigned char fstat = inb(ICEMT1724(ice, DMA_FIFO_ERR));
  418. outb(fstat, ICEMT1724(ice, DMA_FIFO_ERR));
  419. outb(VT1724_MULTI_FIFO_ERR | inb(ICEMT1724(ice, DMA_INT_MASK)), ICEMT1724(ice, DMA_INT_MASK));
  420. /* If I don't do this, I get machine lockup due to continual interrupts */
  421. }
  422. }
  423. }
  424. return IRQ_RETVAL(handled);
  425. }
  426. /*
  427. * PCM code - professional part (multitrack)
  428. */
  429. static unsigned int rates[] = {
  430. 8000, 9600, 11025, 12000, 16000, 22050, 24000,
  431. 32000, 44100, 48000, 64000, 88200, 96000,
  432. 176400, 192000,
  433. };
  434. static struct snd_pcm_hw_constraint_list hw_constraints_rates_96 = {
  435. .count = ARRAY_SIZE(rates) - 2, /* up to 96000 */
  436. .list = rates,
  437. .mask = 0,
  438. };
  439. static struct snd_pcm_hw_constraint_list hw_constraints_rates_48 = {
  440. .count = ARRAY_SIZE(rates) - 5, /* up to 48000 */
  441. .list = rates,
  442. .mask = 0,
  443. };
  444. static struct snd_pcm_hw_constraint_list hw_constraints_rates_192 = {
  445. .count = ARRAY_SIZE(rates),
  446. .list = rates,
  447. .mask = 0,
  448. };
  449. struct vt1724_pcm_reg {
  450. unsigned int addr; /* ADDR register offset */
  451. unsigned int size; /* SIZE register offset */
  452. unsigned int count; /* COUNT register offset */
  453. unsigned int start; /* start & pause bit */
  454. };
  455. static int snd_vt1724_pcm_trigger(struct snd_pcm_substream *substream, int cmd)
  456. {
  457. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  458. unsigned char what;
  459. unsigned char old;
  460. struct snd_pcm_substream *s;
  461. what = 0;
  462. snd_pcm_group_for_each_entry(s, substream) {
  463. if (snd_pcm_substream_chip(s) == ice) {
  464. const struct vt1724_pcm_reg *reg;
  465. reg = s->runtime->private_data;
  466. what |= reg->start;
  467. snd_pcm_trigger_done(s, substream);
  468. }
  469. }
  470. switch (cmd) {
  471. case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
  472. case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
  473. spin_lock(&ice->reg_lock);
  474. old = inb(ICEMT1724(ice, DMA_PAUSE));
  475. if (cmd == SNDRV_PCM_TRIGGER_PAUSE_PUSH)
  476. old |= what;
  477. else
  478. old &= ~what;
  479. outb(old, ICEMT1724(ice, DMA_PAUSE));
  480. spin_unlock(&ice->reg_lock);
  481. break;
  482. case SNDRV_PCM_TRIGGER_START:
  483. case SNDRV_PCM_TRIGGER_STOP:
  484. spin_lock(&ice->reg_lock);
  485. old = inb(ICEMT1724(ice, DMA_CONTROL));
  486. if (cmd == SNDRV_PCM_TRIGGER_START)
  487. old |= what;
  488. else
  489. old &= ~what;
  490. outb(old, ICEMT1724(ice, DMA_CONTROL));
  491. spin_unlock(&ice->reg_lock);
  492. break;
  493. default:
  494. return -EINVAL;
  495. }
  496. return 0;
  497. }
  498. /*
  499. */
  500. #define DMA_STARTS (VT1724_RDMA0_START|VT1724_PDMA0_START|VT1724_RDMA1_START|\
  501. VT1724_PDMA1_START|VT1724_PDMA2_START|VT1724_PDMA3_START|VT1724_PDMA4_START)
  502. #define DMA_PAUSES (VT1724_RDMA0_PAUSE|VT1724_PDMA0_PAUSE|VT1724_RDMA1_PAUSE|\
  503. VT1724_PDMA1_PAUSE|VT1724_PDMA2_PAUSE|VT1724_PDMA3_PAUSE|VT1724_PDMA4_PAUSE)
  504. static const unsigned int stdclock_rate_list[16] = {
  505. 48000, 24000, 12000, 9600, 32000, 16000, 8000, 96000, 44100,
  506. 22050, 11025, 88200, 176400, 0, 192000, 64000
  507. };
  508. static unsigned int stdclock_get_rate(struct snd_ice1712 *ice)
  509. {
  510. unsigned int rate;
  511. rate = stdclock_rate_list[inb(ICEMT1724(ice, RATE)) & 15];
  512. return rate;
  513. }
  514. static void stdclock_set_rate(struct snd_ice1712 *ice, unsigned int rate)
  515. {
  516. int i;
  517. for (i = 0; i < ARRAY_SIZE(stdclock_rate_list); i++) {
  518. if (stdclock_rate_list[i] == rate) {
  519. outb(i, ICEMT1724(ice, RATE));
  520. return;
  521. }
  522. }
  523. }
  524. static unsigned char stdclock_set_mclk(struct snd_ice1712 *ice,
  525. unsigned int rate)
  526. {
  527. unsigned char val, old;
  528. /* check MT02 */
  529. if (ice->eeprom.data[ICE_EEP2_ACLINK] & VT1724_CFG_PRO_I2S) {
  530. val = old = inb(ICEMT1724(ice, I2S_FORMAT));
  531. if (rate > 96000)
  532. val |= VT1724_MT_I2S_MCLK_128X; /* 128x MCLK */
  533. else
  534. val &= ~VT1724_MT_I2S_MCLK_128X; /* 256x MCLK */
  535. if (val != old) {
  536. outb(val, ICEMT1724(ice, I2S_FORMAT));
  537. /* master clock changed */
  538. return 1;
  539. }
  540. }
  541. /* no change in master clock */
  542. return 0;
  543. }
  544. static void snd_vt1724_set_pro_rate(struct snd_ice1712 *ice, unsigned int rate,
  545. int force)
  546. {
  547. unsigned long flags;
  548. unsigned char mclk_change;
  549. unsigned int i, old_rate;
  550. if (rate > ice->hw_rates->list[ice->hw_rates->count - 1])
  551. return;
  552. spin_lock_irqsave(&ice->reg_lock, flags);
  553. if ((inb(ICEMT1724(ice, DMA_CONTROL)) & DMA_STARTS) ||
  554. (inb(ICEMT1724(ice, DMA_PAUSE)) & DMA_PAUSES)) {
  555. /* running? we cannot change the rate now... */
  556. spin_unlock_irqrestore(&ice->reg_lock, flags);
  557. return;
  558. }
  559. if (!force && is_pro_rate_locked(ice)) {
  560. spin_unlock_irqrestore(&ice->reg_lock, flags);
  561. return;
  562. }
  563. old_rate = ice->get_rate(ice);
  564. if (force || (old_rate != rate))
  565. ice->set_rate(ice, rate);
  566. else if (rate == ice->cur_rate) {
  567. spin_unlock_irqrestore(&ice->reg_lock, flags);
  568. return;
  569. }
  570. ice->cur_rate = rate;
  571. /* setting master clock */
  572. mclk_change = ice->set_mclk(ice, rate);
  573. spin_unlock_irqrestore(&ice->reg_lock, flags);
  574. if (mclk_change && ice->gpio.i2s_mclk_changed)
  575. ice->gpio.i2s_mclk_changed(ice);
  576. if (ice->gpio.set_pro_rate)
  577. ice->gpio.set_pro_rate(ice, rate);
  578. /* set up codecs */
  579. for (i = 0; i < ice->akm_codecs; i++) {
  580. if (ice->akm[i].ops.set_rate_val)
  581. ice->akm[i].ops.set_rate_val(&ice->akm[i], rate);
  582. }
  583. if (ice->spdif.ops.setup_rate)
  584. ice->spdif.ops.setup_rate(ice, rate);
  585. }
  586. static int snd_vt1724_pcm_hw_params(struct snd_pcm_substream *substream,
  587. struct snd_pcm_hw_params *hw_params)
  588. {
  589. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  590. int i, chs;
  591. chs = params_channels(hw_params);
  592. mutex_lock(&ice->open_mutex);
  593. /* mark surround channels */
  594. if (substream == ice->playback_pro_substream) {
  595. /* PDMA0 can be multi-channel up to 8 */
  596. chs = chs / 2 - 1;
  597. for (i = 0; i < chs; i++) {
  598. if (ice->pcm_reserved[i] &&
  599. ice->pcm_reserved[i] != substream) {
  600. mutex_unlock(&ice->open_mutex);
  601. return -EBUSY;
  602. }
  603. ice->pcm_reserved[i] = substream;
  604. }
  605. for (; i < 3; i++) {
  606. if (ice->pcm_reserved[i] == substream)
  607. ice->pcm_reserved[i] = NULL;
  608. }
  609. } else {
  610. for (i = 0; i < 3; i++) {
  611. /* check individual playback stream */
  612. if (ice->playback_con_substream_ds[i] == substream) {
  613. if (ice->pcm_reserved[i] &&
  614. ice->pcm_reserved[i] != substream) {
  615. mutex_unlock(&ice->open_mutex);
  616. return -EBUSY;
  617. }
  618. ice->pcm_reserved[i] = substream;
  619. break;
  620. }
  621. }
  622. }
  623. mutex_unlock(&ice->open_mutex);
  624. snd_vt1724_set_pro_rate(ice, params_rate(hw_params), 0);
  625. return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
  626. }
  627. static int snd_vt1724_pcm_hw_free(struct snd_pcm_substream *substream)
  628. {
  629. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  630. int i;
  631. mutex_lock(&ice->open_mutex);
  632. /* unmark surround channels */
  633. for (i = 0; i < 3; i++)
  634. if (ice->pcm_reserved[i] == substream)
  635. ice->pcm_reserved[i] = NULL;
  636. mutex_unlock(&ice->open_mutex);
  637. return snd_pcm_lib_free_pages(substream);
  638. }
  639. static int snd_vt1724_playback_pro_prepare(struct snd_pcm_substream *substream)
  640. {
  641. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  642. unsigned char val;
  643. unsigned int size;
  644. spin_lock_irq(&ice->reg_lock);
  645. val = (8 - substream->runtime->channels) >> 1;
  646. outb(val, ICEMT1724(ice, BURST));
  647. outl(substream->runtime->dma_addr, ICEMT1724(ice, PLAYBACK_ADDR));
  648. size = (snd_pcm_lib_buffer_bytes(substream) >> 2) - 1;
  649. /* outl(size, ICEMT1724(ice, PLAYBACK_SIZE)); */
  650. outw(size, ICEMT1724(ice, PLAYBACK_SIZE));
  651. outb(size >> 16, ICEMT1724(ice, PLAYBACK_SIZE) + 2);
  652. size = (snd_pcm_lib_period_bytes(substream) >> 2) - 1;
  653. /* outl(size, ICEMT1724(ice, PLAYBACK_COUNT)); */
  654. outw(size, ICEMT1724(ice, PLAYBACK_COUNT));
  655. outb(size >> 16, ICEMT1724(ice, PLAYBACK_COUNT) + 2);
  656. spin_unlock_irq(&ice->reg_lock);
  657. /* printk("pro prepare: ch = %d, addr = 0x%x, buffer = 0x%x, period = 0x%x\n", substream->runtime->channels, (unsigned int)substream->runtime->dma_addr, snd_pcm_lib_buffer_bytes(substream), snd_pcm_lib_period_bytes(substream)); */
  658. return 0;
  659. }
  660. static snd_pcm_uframes_t snd_vt1724_playback_pro_pointer(struct snd_pcm_substream *substream)
  661. {
  662. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  663. size_t ptr;
  664. if (!(inl(ICEMT1724(ice, DMA_CONTROL)) & VT1724_PDMA0_START))
  665. return 0;
  666. #if 0 /* read PLAYBACK_ADDR */
  667. ptr = inl(ICEMT1724(ice, PLAYBACK_ADDR));
  668. if (ptr < substream->runtime->dma_addr) {
  669. snd_printd("ice1724: invalid negative ptr\n");
  670. return 0;
  671. }
  672. ptr -= substream->runtime->dma_addr;
  673. ptr = bytes_to_frames(substream->runtime, ptr);
  674. if (ptr >= substream->runtime->buffer_size) {
  675. snd_printd("ice1724: invalid ptr %d (size=%d)\n",
  676. (int)ptr, (int)substream->runtime->period_size);
  677. return 0;
  678. }
  679. #else /* read PLAYBACK_SIZE */
  680. ptr = inl(ICEMT1724(ice, PLAYBACK_SIZE)) & 0xffffff;
  681. ptr = (ptr + 1) << 2;
  682. ptr = bytes_to_frames(substream->runtime, ptr);
  683. if (!ptr)
  684. ;
  685. else if (ptr <= substream->runtime->buffer_size)
  686. ptr = substream->runtime->buffer_size - ptr;
  687. else {
  688. snd_printd("ice1724: invalid ptr %d (size=%d)\n",
  689. (int)ptr, (int)substream->runtime->buffer_size);
  690. ptr = 0;
  691. }
  692. #endif
  693. return ptr;
  694. }
  695. static int snd_vt1724_pcm_prepare(struct snd_pcm_substream *substream)
  696. {
  697. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  698. const struct vt1724_pcm_reg *reg = substream->runtime->private_data;
  699. spin_lock_irq(&ice->reg_lock);
  700. outl(substream->runtime->dma_addr, ice->profi_port + reg->addr);
  701. outw((snd_pcm_lib_buffer_bytes(substream) >> 2) - 1,
  702. ice->profi_port + reg->size);
  703. outw((snd_pcm_lib_period_bytes(substream) >> 2) - 1,
  704. ice->profi_port + reg->count);
  705. spin_unlock_irq(&ice->reg_lock);
  706. return 0;
  707. }
  708. static snd_pcm_uframes_t snd_vt1724_pcm_pointer(struct snd_pcm_substream *substream)
  709. {
  710. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  711. const struct vt1724_pcm_reg *reg = substream->runtime->private_data;
  712. size_t ptr;
  713. if (!(inl(ICEMT1724(ice, DMA_CONTROL)) & reg->start))
  714. return 0;
  715. #if 0 /* use ADDR register */
  716. ptr = inl(ice->profi_port + reg->addr);
  717. ptr -= substream->runtime->dma_addr;
  718. return bytes_to_frames(substream->runtime, ptr);
  719. #else /* use SIZE register */
  720. ptr = inw(ice->profi_port + reg->size);
  721. ptr = (ptr + 1) << 2;
  722. ptr = bytes_to_frames(substream->runtime, ptr);
  723. if (!ptr)
  724. ;
  725. else if (ptr <= substream->runtime->buffer_size)
  726. ptr = substream->runtime->buffer_size - ptr;
  727. else {
  728. snd_printd("ice1724: invalid ptr %d (size=%d)\n",
  729. (int)ptr, (int)substream->runtime->buffer_size);
  730. ptr = 0;
  731. }
  732. return ptr;
  733. #endif
  734. }
  735. static const struct vt1724_pcm_reg vt1724_playback_pro_reg = {
  736. .addr = VT1724_MT_PLAYBACK_ADDR,
  737. .size = VT1724_MT_PLAYBACK_SIZE,
  738. .count = VT1724_MT_PLAYBACK_COUNT,
  739. .start = VT1724_PDMA0_START,
  740. };
  741. static const struct vt1724_pcm_reg vt1724_capture_pro_reg = {
  742. .addr = VT1724_MT_CAPTURE_ADDR,
  743. .size = VT1724_MT_CAPTURE_SIZE,
  744. .count = VT1724_MT_CAPTURE_COUNT,
  745. .start = VT1724_RDMA0_START,
  746. };
  747. static const struct snd_pcm_hardware snd_vt1724_playback_pro = {
  748. .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
  749. SNDRV_PCM_INFO_BLOCK_TRANSFER |
  750. SNDRV_PCM_INFO_MMAP_VALID |
  751. SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_SYNC_START),
  752. .formats = SNDRV_PCM_FMTBIT_S32_LE,
  753. .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_192000,
  754. .rate_min = 8000,
  755. .rate_max = 192000,
  756. .channels_min = 2,
  757. .channels_max = 8,
  758. .buffer_bytes_max = (1UL << 21), /* 19bits dword */
  759. .period_bytes_min = 8 * 4 * 2, /* FIXME: constraints needed */
  760. .period_bytes_max = (1UL << 21),
  761. .periods_min = 2,
  762. .periods_max = 1024,
  763. };
  764. static const struct snd_pcm_hardware snd_vt1724_spdif = {
  765. .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
  766. SNDRV_PCM_INFO_BLOCK_TRANSFER |
  767. SNDRV_PCM_INFO_MMAP_VALID |
  768. SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_SYNC_START),
  769. .formats = SNDRV_PCM_FMTBIT_S32_LE,
  770. .rates = (SNDRV_PCM_RATE_32000|SNDRV_PCM_RATE_44100|
  771. SNDRV_PCM_RATE_48000|SNDRV_PCM_RATE_88200|
  772. SNDRV_PCM_RATE_96000|SNDRV_PCM_RATE_176400|
  773. SNDRV_PCM_RATE_192000),
  774. .rate_min = 32000,
  775. .rate_max = 192000,
  776. .channels_min = 2,
  777. .channels_max = 2,
  778. .buffer_bytes_max = (1UL << 18), /* 16bits dword */
  779. .period_bytes_min = 2 * 4 * 2,
  780. .period_bytes_max = (1UL << 18),
  781. .periods_min = 2,
  782. .periods_max = 1024,
  783. };
  784. static const struct snd_pcm_hardware snd_vt1724_2ch_stereo = {
  785. .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
  786. SNDRV_PCM_INFO_BLOCK_TRANSFER |
  787. SNDRV_PCM_INFO_MMAP_VALID |
  788. SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_SYNC_START),
  789. .formats = SNDRV_PCM_FMTBIT_S32_LE,
  790. .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_192000,
  791. .rate_min = 8000,
  792. .rate_max = 192000,
  793. .channels_min = 2,
  794. .channels_max = 2,
  795. .buffer_bytes_max = (1UL << 18), /* 16bits dword */
  796. .period_bytes_min = 2 * 4 * 2,
  797. .period_bytes_max = (1UL << 18),
  798. .periods_min = 2,
  799. .periods_max = 1024,
  800. };
  801. /*
  802. * set rate constraints
  803. */
  804. static void set_std_hw_rates(struct snd_ice1712 *ice)
  805. {
  806. if (ice->eeprom.data[ICE_EEP2_ACLINK] & VT1724_CFG_PRO_I2S) {
  807. /* I2S */
  808. /* VT1720 doesn't support more than 96kHz */
  809. if ((ice->eeprom.data[ICE_EEP2_I2S] & 0x08) && !ice->vt1720)
  810. ice->hw_rates = &hw_constraints_rates_192;
  811. else
  812. ice->hw_rates = &hw_constraints_rates_96;
  813. } else {
  814. /* ACLINK */
  815. ice->hw_rates = &hw_constraints_rates_48;
  816. }
  817. }
  818. static int set_rate_constraints(struct snd_ice1712 *ice,
  819. struct snd_pcm_substream *substream)
  820. {
  821. struct snd_pcm_runtime *runtime = substream->runtime;
  822. runtime->hw.rate_min = ice->hw_rates->list[0];
  823. runtime->hw.rate_max = ice->hw_rates->list[ice->hw_rates->count - 1];
  824. runtime->hw.rates = SNDRV_PCM_RATE_KNOT;
  825. return snd_pcm_hw_constraint_list(runtime, 0,
  826. SNDRV_PCM_HW_PARAM_RATE,
  827. ice->hw_rates);
  828. }
  829. /* multi-channel playback needs alignment 8x32bit regardless of the channels
  830. * actually used
  831. */
  832. #define VT1724_BUFFER_ALIGN 0x20
  833. static int snd_vt1724_playback_pro_open(struct snd_pcm_substream *substream)
  834. {
  835. struct snd_pcm_runtime *runtime = substream->runtime;
  836. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  837. int chs, num_indeps;
  838. runtime->private_data = (void *)&vt1724_playback_pro_reg;
  839. ice->playback_pro_substream = substream;
  840. runtime->hw = snd_vt1724_playback_pro;
  841. snd_pcm_set_sync(substream);
  842. snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
  843. set_rate_constraints(ice, substream);
  844. mutex_lock(&ice->open_mutex);
  845. /* calculate the currently available channels */
  846. num_indeps = ice->num_total_dacs / 2 - 1;
  847. for (chs = 0; chs < num_indeps; chs++) {
  848. if (ice->pcm_reserved[chs])
  849. break;
  850. }
  851. chs = (chs + 1) * 2;
  852. runtime->hw.channels_max = chs;
  853. if (chs > 2) /* channels must be even */
  854. snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS, 2);
  855. mutex_unlock(&ice->open_mutex);
  856. snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES,
  857. VT1724_BUFFER_ALIGN);
  858. snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES,
  859. VT1724_BUFFER_ALIGN);
  860. return 0;
  861. }
  862. static int snd_vt1724_capture_pro_open(struct snd_pcm_substream *substream)
  863. {
  864. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  865. struct snd_pcm_runtime *runtime = substream->runtime;
  866. runtime->private_data = (void *)&vt1724_capture_pro_reg;
  867. ice->capture_pro_substream = substream;
  868. runtime->hw = snd_vt1724_2ch_stereo;
  869. snd_pcm_set_sync(substream);
  870. snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
  871. set_rate_constraints(ice, substream);
  872. snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES,
  873. VT1724_BUFFER_ALIGN);
  874. snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES,
  875. VT1724_BUFFER_ALIGN);
  876. return 0;
  877. }
  878. static int snd_vt1724_playback_pro_close(struct snd_pcm_substream *substream)
  879. {
  880. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  881. if (PRO_RATE_RESET)
  882. snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 0);
  883. ice->playback_pro_substream = NULL;
  884. return 0;
  885. }
  886. static int snd_vt1724_capture_pro_close(struct snd_pcm_substream *substream)
  887. {
  888. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  889. if (PRO_RATE_RESET)
  890. snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 0);
  891. ice->capture_pro_substream = NULL;
  892. return 0;
  893. }
  894. static struct snd_pcm_ops snd_vt1724_playback_pro_ops = {
  895. .open = snd_vt1724_playback_pro_open,
  896. .close = snd_vt1724_playback_pro_close,
  897. .ioctl = snd_pcm_lib_ioctl,
  898. .hw_params = snd_vt1724_pcm_hw_params,
  899. .hw_free = snd_vt1724_pcm_hw_free,
  900. .prepare = snd_vt1724_playback_pro_prepare,
  901. .trigger = snd_vt1724_pcm_trigger,
  902. .pointer = snd_vt1724_playback_pro_pointer,
  903. };
  904. static struct snd_pcm_ops snd_vt1724_capture_pro_ops = {
  905. .open = snd_vt1724_capture_pro_open,
  906. .close = snd_vt1724_capture_pro_close,
  907. .ioctl = snd_pcm_lib_ioctl,
  908. .hw_params = snd_vt1724_pcm_hw_params,
  909. .hw_free = snd_vt1724_pcm_hw_free,
  910. .prepare = snd_vt1724_pcm_prepare,
  911. .trigger = snd_vt1724_pcm_trigger,
  912. .pointer = snd_vt1724_pcm_pointer,
  913. };
  914. static int __devinit snd_vt1724_pcm_profi(struct snd_ice1712 *ice, int device)
  915. {
  916. struct snd_pcm *pcm;
  917. int err;
  918. err = snd_pcm_new(ice->card, "ICE1724", device, 1, 1, &pcm);
  919. if (err < 0)
  920. return err;
  921. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_vt1724_playback_pro_ops);
  922. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_vt1724_capture_pro_ops);
  923. pcm->private_data = ice;
  924. pcm->info_flags = 0;
  925. strcpy(pcm->name, "ICE1724");
  926. snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
  927. snd_dma_pci_data(ice->pci),
  928. 256*1024, 256*1024);
  929. ice->pcm_pro = pcm;
  930. return 0;
  931. }
  932. /*
  933. * SPDIF PCM
  934. */
  935. static const struct vt1724_pcm_reg vt1724_playback_spdif_reg = {
  936. .addr = VT1724_MT_PDMA4_ADDR,
  937. .size = VT1724_MT_PDMA4_SIZE,
  938. .count = VT1724_MT_PDMA4_COUNT,
  939. .start = VT1724_PDMA4_START,
  940. };
  941. static const struct vt1724_pcm_reg vt1724_capture_spdif_reg = {
  942. .addr = VT1724_MT_RDMA1_ADDR,
  943. .size = VT1724_MT_RDMA1_SIZE,
  944. .count = VT1724_MT_RDMA1_COUNT,
  945. .start = VT1724_RDMA1_START,
  946. };
  947. /* update spdif control bits; call with reg_lock */
  948. static void update_spdif_bits(struct snd_ice1712 *ice, unsigned int val)
  949. {
  950. unsigned char cbit, disabled;
  951. cbit = inb(ICEREG1724(ice, SPDIF_CFG));
  952. disabled = cbit & ~VT1724_CFG_SPDIF_OUT_EN;
  953. if (cbit != disabled)
  954. outb(disabled, ICEREG1724(ice, SPDIF_CFG));
  955. outw(val, ICEMT1724(ice, SPDIF_CTRL));
  956. if (cbit != disabled)
  957. outb(cbit, ICEREG1724(ice, SPDIF_CFG));
  958. outw(val, ICEMT1724(ice, SPDIF_CTRL));
  959. }
  960. /* update SPDIF control bits according to the given rate */
  961. static void update_spdif_rate(struct snd_ice1712 *ice, unsigned int rate)
  962. {
  963. unsigned int val, nval;
  964. unsigned long flags;
  965. spin_lock_irqsave(&ice->reg_lock, flags);
  966. nval = val = inw(ICEMT1724(ice, SPDIF_CTRL));
  967. nval &= ~(7 << 12);
  968. switch (rate) {
  969. case 44100: break;
  970. case 48000: nval |= 2 << 12; break;
  971. case 32000: nval |= 3 << 12; break;
  972. case 88200: nval |= 4 << 12; break;
  973. case 96000: nval |= 5 << 12; break;
  974. case 192000: nval |= 6 << 12; break;
  975. case 176400: nval |= 7 << 12; break;
  976. }
  977. if (val != nval)
  978. update_spdif_bits(ice, nval);
  979. spin_unlock_irqrestore(&ice->reg_lock, flags);
  980. }
  981. static int snd_vt1724_playback_spdif_prepare(struct snd_pcm_substream *substream)
  982. {
  983. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  984. if (!ice->force_pdma4)
  985. update_spdif_rate(ice, substream->runtime->rate);
  986. return snd_vt1724_pcm_prepare(substream);
  987. }
  988. static int snd_vt1724_playback_spdif_open(struct snd_pcm_substream *substream)
  989. {
  990. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  991. struct snd_pcm_runtime *runtime = substream->runtime;
  992. runtime->private_data = (void *)&vt1724_playback_spdif_reg;
  993. ice->playback_con_substream = substream;
  994. if (ice->force_pdma4) {
  995. runtime->hw = snd_vt1724_2ch_stereo;
  996. set_rate_constraints(ice, substream);
  997. } else
  998. runtime->hw = snd_vt1724_spdif;
  999. snd_pcm_set_sync(substream);
  1000. snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
  1001. snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES,
  1002. VT1724_BUFFER_ALIGN);
  1003. snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES,
  1004. VT1724_BUFFER_ALIGN);
  1005. if (ice->spdif.ops.open)
  1006. ice->spdif.ops.open(ice, substream);
  1007. return 0;
  1008. }
  1009. static int snd_vt1724_playback_spdif_close(struct snd_pcm_substream *substream)
  1010. {
  1011. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  1012. if (PRO_RATE_RESET)
  1013. snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 0);
  1014. ice->playback_con_substream = NULL;
  1015. if (ice->spdif.ops.close)
  1016. ice->spdif.ops.close(ice, substream);
  1017. return 0;
  1018. }
  1019. static int snd_vt1724_capture_spdif_open(struct snd_pcm_substream *substream)
  1020. {
  1021. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  1022. struct snd_pcm_runtime *runtime = substream->runtime;
  1023. runtime->private_data = (void *)&vt1724_capture_spdif_reg;
  1024. ice->capture_con_substream = substream;
  1025. if (ice->force_rdma1) {
  1026. runtime->hw = snd_vt1724_2ch_stereo;
  1027. set_rate_constraints(ice, substream);
  1028. } else
  1029. runtime->hw = snd_vt1724_spdif;
  1030. snd_pcm_set_sync(substream);
  1031. snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
  1032. snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES,
  1033. VT1724_BUFFER_ALIGN);
  1034. snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES,
  1035. VT1724_BUFFER_ALIGN);
  1036. if (ice->spdif.ops.open)
  1037. ice->spdif.ops.open(ice, substream);
  1038. return 0;
  1039. }
  1040. static int snd_vt1724_capture_spdif_close(struct snd_pcm_substream *substream)
  1041. {
  1042. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  1043. if (PRO_RATE_RESET)
  1044. snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 0);
  1045. ice->capture_con_substream = NULL;
  1046. if (ice->spdif.ops.close)
  1047. ice->spdif.ops.close(ice, substream);
  1048. return 0;
  1049. }
  1050. static struct snd_pcm_ops snd_vt1724_playback_spdif_ops = {
  1051. .open = snd_vt1724_playback_spdif_open,
  1052. .close = snd_vt1724_playback_spdif_close,
  1053. .ioctl = snd_pcm_lib_ioctl,
  1054. .hw_params = snd_vt1724_pcm_hw_params,
  1055. .hw_free = snd_vt1724_pcm_hw_free,
  1056. .prepare = snd_vt1724_playback_spdif_prepare,
  1057. .trigger = snd_vt1724_pcm_trigger,
  1058. .pointer = snd_vt1724_pcm_pointer,
  1059. };
  1060. static struct snd_pcm_ops snd_vt1724_capture_spdif_ops = {
  1061. .open = snd_vt1724_capture_spdif_open,
  1062. .close = snd_vt1724_capture_spdif_close,
  1063. .ioctl = snd_pcm_lib_ioctl,
  1064. .hw_params = snd_vt1724_pcm_hw_params,
  1065. .hw_free = snd_vt1724_pcm_hw_free,
  1066. .prepare = snd_vt1724_pcm_prepare,
  1067. .trigger = snd_vt1724_pcm_trigger,
  1068. .pointer = snd_vt1724_pcm_pointer,
  1069. };
  1070. static int __devinit snd_vt1724_pcm_spdif(struct snd_ice1712 *ice, int device)
  1071. {
  1072. char *name;
  1073. struct snd_pcm *pcm;
  1074. int play, capt;
  1075. int err;
  1076. if (ice->force_pdma4 ||
  1077. (ice->eeprom.data[ICE_EEP2_SPDIF] & VT1724_CFG_SPDIF_OUT_INT)) {
  1078. play = 1;
  1079. ice->has_spdif = 1;
  1080. } else
  1081. play = 0;
  1082. if (ice->force_rdma1 ||
  1083. (ice->eeprom.data[ICE_EEP2_SPDIF] & VT1724_CFG_SPDIF_IN)) {
  1084. capt = 1;
  1085. ice->has_spdif = 1;
  1086. } else
  1087. capt = 0;
  1088. if (!play && !capt)
  1089. return 0; /* no spdif device */
  1090. if (ice->force_pdma4 || ice->force_rdma1)
  1091. name = "ICE1724 Secondary";
  1092. else
  1093. name = "ICE1724 IEC958";
  1094. err = snd_pcm_new(ice->card, name, device, play, capt, &pcm);
  1095. if (err < 0)
  1096. return err;
  1097. if (play)
  1098. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK,
  1099. &snd_vt1724_playback_spdif_ops);
  1100. if (capt)
  1101. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE,
  1102. &snd_vt1724_capture_spdif_ops);
  1103. pcm->private_data = ice;
  1104. pcm->info_flags = 0;
  1105. strcpy(pcm->name, name);
  1106. snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
  1107. snd_dma_pci_data(ice->pci),
  1108. 64*1024, 64*1024);
  1109. ice->pcm = pcm;
  1110. return 0;
  1111. }
  1112. /*
  1113. * independent surround PCMs
  1114. */
  1115. static const struct vt1724_pcm_reg vt1724_playback_dma_regs[3] = {
  1116. {
  1117. .addr = VT1724_MT_PDMA1_ADDR,
  1118. .size = VT1724_MT_PDMA1_SIZE,
  1119. .count = VT1724_MT_PDMA1_COUNT,
  1120. .start = VT1724_PDMA1_START,
  1121. },
  1122. {
  1123. .addr = VT1724_MT_PDMA2_ADDR,
  1124. .size = VT1724_MT_PDMA2_SIZE,
  1125. .count = VT1724_MT_PDMA2_COUNT,
  1126. .start = VT1724_PDMA2_START,
  1127. },
  1128. {
  1129. .addr = VT1724_MT_PDMA3_ADDR,
  1130. .size = VT1724_MT_PDMA3_SIZE,
  1131. .count = VT1724_MT_PDMA3_COUNT,
  1132. .start = VT1724_PDMA3_START,
  1133. },
  1134. };
  1135. static int snd_vt1724_playback_indep_prepare(struct snd_pcm_substream *substream)
  1136. {
  1137. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  1138. unsigned char val;
  1139. spin_lock_irq(&ice->reg_lock);
  1140. val = 3 - substream->number;
  1141. if (inb(ICEMT1724(ice, BURST)) < val)
  1142. outb(val, ICEMT1724(ice, BURST));
  1143. spin_unlock_irq(&ice->reg_lock);
  1144. return snd_vt1724_pcm_prepare(substream);
  1145. }
  1146. static int snd_vt1724_playback_indep_open(struct snd_pcm_substream *substream)
  1147. {
  1148. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  1149. struct snd_pcm_runtime *runtime = substream->runtime;
  1150. mutex_lock(&ice->open_mutex);
  1151. /* already used by PDMA0? */
  1152. if (ice->pcm_reserved[substream->number]) {
  1153. mutex_unlock(&ice->open_mutex);
  1154. return -EBUSY; /* FIXME: should handle blocking mode properly */
  1155. }
  1156. mutex_unlock(&ice->open_mutex);
  1157. runtime->private_data = (void *)&vt1724_playback_dma_regs[substream->number];
  1158. ice->playback_con_substream_ds[substream->number] = substream;
  1159. runtime->hw = snd_vt1724_2ch_stereo;
  1160. snd_pcm_set_sync(substream);
  1161. snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
  1162. set_rate_constraints(ice, substream);
  1163. return 0;
  1164. }
  1165. static int snd_vt1724_playback_indep_close(struct snd_pcm_substream *substream)
  1166. {
  1167. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  1168. if (PRO_RATE_RESET)
  1169. snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 0);
  1170. ice->playback_con_substream_ds[substream->number] = NULL;
  1171. ice->pcm_reserved[substream->number] = NULL;
  1172. return 0;
  1173. }
  1174. static struct snd_pcm_ops snd_vt1724_playback_indep_ops = {
  1175. .open = snd_vt1724_playback_indep_open,
  1176. .close = snd_vt1724_playback_indep_close,
  1177. .ioctl = snd_pcm_lib_ioctl,
  1178. .hw_params = snd_vt1724_pcm_hw_params,
  1179. .hw_free = snd_vt1724_pcm_hw_free,
  1180. .prepare = snd_vt1724_playback_indep_prepare,
  1181. .trigger = snd_vt1724_pcm_trigger,
  1182. .pointer = snd_vt1724_pcm_pointer,
  1183. };
  1184. static int __devinit snd_vt1724_pcm_indep(struct snd_ice1712 *ice, int device)
  1185. {
  1186. struct snd_pcm *pcm;
  1187. int play;
  1188. int err;
  1189. play = ice->num_total_dacs / 2 - 1;
  1190. if (play <= 0)
  1191. return 0;
  1192. err = snd_pcm_new(ice->card, "ICE1724 Surrounds", device, play, 0, &pcm);
  1193. if (err < 0)
  1194. return err;
  1195. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK,
  1196. &snd_vt1724_playback_indep_ops);
  1197. pcm->private_data = ice;
  1198. pcm->info_flags = 0;
  1199. strcpy(pcm->name, "ICE1724 Surround PCM");
  1200. snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
  1201. snd_dma_pci_data(ice->pci),
  1202. 64*1024, 64*1024);
  1203. ice->pcm_ds = pcm;
  1204. return 0;
  1205. }
  1206. /*
  1207. * Mixer section
  1208. */
  1209. static int __devinit snd_vt1724_ac97_mixer(struct snd_ice1712 *ice)
  1210. {
  1211. int err;
  1212. if (!(ice->eeprom.data[ICE_EEP2_ACLINK] & VT1724_CFG_PRO_I2S)) {
  1213. struct snd_ac97_bus *pbus;
  1214. struct snd_ac97_template ac97;
  1215. static struct snd_ac97_bus_ops ops = {
  1216. .write = snd_vt1724_ac97_write,
  1217. .read = snd_vt1724_ac97_read,
  1218. };
  1219. /* cold reset */
  1220. outb(inb(ICEMT1724(ice, AC97_CMD)) | 0x80, ICEMT1724(ice, AC97_CMD));
  1221. mdelay(5); /* FIXME */
  1222. outb(inb(ICEMT1724(ice, AC97_CMD)) & ~0x80, ICEMT1724(ice, AC97_CMD));
  1223. err = snd_ac97_bus(ice->card, 0, &ops, NULL, &pbus);
  1224. if (err < 0)
  1225. return err;
  1226. memset(&ac97, 0, sizeof(ac97));
  1227. ac97.private_data = ice;
  1228. err = snd_ac97_mixer(pbus, &ac97, &ice->ac97);
  1229. if (err < 0)
  1230. printk(KERN_WARNING "ice1712: cannot initialize pro ac97, skipped\n");
  1231. else
  1232. return 0;
  1233. }
  1234. /* I2S mixer only */
  1235. strcat(ice->card->mixername, "ICE1724 - multitrack");
  1236. return 0;
  1237. }
  1238. /*
  1239. *
  1240. */
  1241. static inline unsigned int eeprom_triple(struct snd_ice1712 *ice, int idx)
  1242. {
  1243. return (unsigned int)ice->eeprom.data[idx] | \
  1244. ((unsigned int)ice->eeprom.data[idx + 1] << 8) | \
  1245. ((unsigned int)ice->eeprom.data[idx + 2] << 16);
  1246. }
  1247. static void snd_vt1724_proc_read(struct snd_info_entry *entry,
  1248. struct snd_info_buffer *buffer)
  1249. {
  1250. struct snd_ice1712 *ice = entry->private_data;
  1251. unsigned int idx;
  1252. snd_iprintf(buffer, "%s\n\n", ice->card->longname);
  1253. snd_iprintf(buffer, "EEPROM:\n");
  1254. snd_iprintf(buffer, " Subvendor : 0x%x\n", ice->eeprom.subvendor);
  1255. snd_iprintf(buffer, " Size : %i bytes\n", ice->eeprom.size);
  1256. snd_iprintf(buffer, " Version : %i\n", ice->eeprom.version);
  1257. snd_iprintf(buffer, " System Config : 0x%x\n",
  1258. ice->eeprom.data[ICE_EEP2_SYSCONF]);
  1259. snd_iprintf(buffer, " ACLink : 0x%x\n",
  1260. ice->eeprom.data[ICE_EEP2_ACLINK]);
  1261. snd_iprintf(buffer, " I2S : 0x%x\n",
  1262. ice->eeprom.data[ICE_EEP2_I2S]);
  1263. snd_iprintf(buffer, " S/PDIF : 0x%x\n",
  1264. ice->eeprom.data[ICE_EEP2_SPDIF]);
  1265. snd_iprintf(buffer, " GPIO direction : 0x%x\n",
  1266. ice->eeprom.gpiodir);
  1267. snd_iprintf(buffer, " GPIO mask : 0x%x\n",
  1268. ice->eeprom.gpiomask);
  1269. snd_iprintf(buffer, " GPIO state : 0x%x\n",
  1270. ice->eeprom.gpiostate);
  1271. for (idx = 0x12; idx < ice->eeprom.size; idx++)
  1272. snd_iprintf(buffer, " Extra #%02i : 0x%x\n",
  1273. idx, ice->eeprom.data[idx]);
  1274. snd_iprintf(buffer, "\nRegisters:\n");
  1275. snd_iprintf(buffer, " PSDOUT03 : 0x%08x\n",
  1276. (unsigned)inl(ICEMT1724(ice, ROUTE_PLAYBACK)));
  1277. for (idx = 0x0; idx < 0x20 ; idx++)
  1278. snd_iprintf(buffer, " CCS%02x : 0x%02x\n",
  1279. idx, inb(ice->port+idx));
  1280. for (idx = 0x0; idx < 0x30 ; idx++)
  1281. snd_iprintf(buffer, " MT%02x : 0x%02x\n",
  1282. idx, inb(ice->profi_port+idx));
  1283. }
  1284. static void __devinit snd_vt1724_proc_init(struct snd_ice1712 *ice)
  1285. {
  1286. struct snd_info_entry *entry;
  1287. if (!snd_card_proc_new(ice->card, "ice1724", &entry))
  1288. snd_info_set_text_ops(entry, ice, snd_vt1724_proc_read);
  1289. }
  1290. /*
  1291. *
  1292. */
  1293. static int snd_vt1724_eeprom_info(struct snd_kcontrol *kcontrol,
  1294. struct snd_ctl_elem_info *uinfo)
  1295. {
  1296. uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
  1297. uinfo->count = sizeof(struct snd_ice1712_eeprom);
  1298. return 0;
  1299. }
  1300. static int snd_vt1724_eeprom_get(struct snd_kcontrol *kcontrol,
  1301. struct snd_ctl_elem_value *ucontrol)
  1302. {
  1303. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1304. memcpy(ucontrol->value.bytes.data, &ice->eeprom, sizeof(ice->eeprom));
  1305. return 0;
  1306. }
  1307. static struct snd_kcontrol_new snd_vt1724_eeprom __devinitdata = {
  1308. .iface = SNDRV_CTL_ELEM_IFACE_CARD,
  1309. .name = "ICE1724 EEPROM",
  1310. .access = SNDRV_CTL_ELEM_ACCESS_READ,
  1311. .info = snd_vt1724_eeprom_info,
  1312. .get = snd_vt1724_eeprom_get
  1313. };
  1314. /*
  1315. */
  1316. static int snd_vt1724_spdif_info(struct snd_kcontrol *kcontrol,
  1317. struct snd_ctl_elem_info *uinfo)
  1318. {
  1319. uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
  1320. uinfo->count = 1;
  1321. return 0;
  1322. }
  1323. static unsigned int encode_spdif_bits(struct snd_aes_iec958 *diga)
  1324. {
  1325. unsigned int val, rbits;
  1326. val = diga->status[0] & 0x03; /* professional, non-audio */
  1327. if (val & 0x01) {
  1328. /* professional */
  1329. if ((diga->status[0] & IEC958_AES0_PRO_EMPHASIS) ==
  1330. IEC958_AES0_PRO_EMPHASIS_5015)
  1331. val |= 1U << 3;
  1332. rbits = (diga->status[4] >> 3) & 0x0f;
  1333. if (rbits) {
  1334. switch (rbits) {
  1335. case 2: val |= 5 << 12; break; /* 96k */
  1336. case 3: val |= 6 << 12; break; /* 192k */
  1337. case 10: val |= 4 << 12; break; /* 88.2k */
  1338. case 11: val |= 7 << 12; break; /* 176.4k */
  1339. }
  1340. } else {
  1341. switch (diga->status[0] & IEC958_AES0_PRO_FS) {
  1342. case IEC958_AES0_PRO_FS_44100:
  1343. break;
  1344. case IEC958_AES0_PRO_FS_32000:
  1345. val |= 3U << 12;
  1346. break;
  1347. default:
  1348. val |= 2U << 12;
  1349. break;
  1350. }
  1351. }
  1352. } else {
  1353. /* consumer */
  1354. val |= diga->status[1] & 0x04; /* copyright */
  1355. if ((diga->status[0] & IEC958_AES0_CON_EMPHASIS) ==
  1356. IEC958_AES0_CON_EMPHASIS_5015)
  1357. val |= 1U << 3;
  1358. val |= (unsigned int)(diga->status[1] & 0x3f) << 4; /* category */
  1359. val |= (unsigned int)(diga->status[3] & IEC958_AES3_CON_FS) << 12; /* fs */
  1360. }
  1361. return val;
  1362. }
  1363. static void decode_spdif_bits(struct snd_aes_iec958 *diga, unsigned int val)
  1364. {
  1365. memset(diga->status, 0, sizeof(diga->status));
  1366. diga->status[0] = val & 0x03; /* professional, non-audio */
  1367. if (val & 0x01) {
  1368. /* professional */
  1369. if (val & (1U << 3))
  1370. diga->status[0] |= IEC958_AES0_PRO_EMPHASIS_5015;
  1371. switch ((val >> 12) & 0x7) {
  1372. case 0:
  1373. break;
  1374. case 2:
  1375. diga->status[0] |= IEC958_AES0_PRO_FS_32000;
  1376. break;
  1377. default:
  1378. diga->status[0] |= IEC958_AES0_PRO_FS_48000;
  1379. break;
  1380. }
  1381. } else {
  1382. /* consumer */
  1383. diga->status[0] |= val & (1U << 2); /* copyright */
  1384. if (val & (1U << 3))
  1385. diga->status[0] |= IEC958_AES0_CON_EMPHASIS_5015;
  1386. diga->status[1] |= (val >> 4) & 0x3f; /* category */
  1387. diga->status[3] |= (val >> 12) & 0x07; /* fs */
  1388. }
  1389. }
  1390. static int snd_vt1724_spdif_default_get(struct snd_kcontrol *kcontrol,
  1391. struct snd_ctl_elem_value *ucontrol)
  1392. {
  1393. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1394. unsigned int val;
  1395. val = inw(ICEMT1724(ice, SPDIF_CTRL));
  1396. decode_spdif_bits(&ucontrol->value.iec958, val);
  1397. return 0;
  1398. }
  1399. static int snd_vt1724_spdif_default_put(struct snd_kcontrol *kcontrol,
  1400. struct snd_ctl_elem_value *ucontrol)
  1401. {
  1402. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1403. unsigned int val, old;
  1404. val = encode_spdif_bits(&ucontrol->value.iec958);
  1405. spin_lock_irq(&ice->reg_lock);
  1406. old = inw(ICEMT1724(ice, SPDIF_CTRL));
  1407. if (val != old)
  1408. update_spdif_bits(ice, val);
  1409. spin_unlock_irq(&ice->reg_lock);
  1410. return val != old;
  1411. }
  1412. static struct snd_kcontrol_new snd_vt1724_spdif_default __devinitdata =
  1413. {
  1414. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  1415. .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, DEFAULT),
  1416. .info = snd_vt1724_spdif_info,
  1417. .get = snd_vt1724_spdif_default_get,
  1418. .put = snd_vt1724_spdif_default_put
  1419. };
  1420. static int snd_vt1724_spdif_maskc_get(struct snd_kcontrol *kcontrol,
  1421. struct snd_ctl_elem_value *ucontrol)
  1422. {
  1423. ucontrol->value.iec958.status[0] = IEC958_AES0_NONAUDIO |
  1424. IEC958_AES0_PROFESSIONAL |
  1425. IEC958_AES0_CON_NOT_COPYRIGHT |
  1426. IEC958_AES0_CON_EMPHASIS;
  1427. ucontrol->value.iec958.status[1] = IEC958_AES1_CON_ORIGINAL |
  1428. IEC958_AES1_CON_CATEGORY;
  1429. ucontrol->value.iec958.status[3] = IEC958_AES3_CON_FS;
  1430. return 0;
  1431. }
  1432. static int snd_vt1724_spdif_maskp_get(struct snd_kcontrol *kcontrol,
  1433. struct snd_ctl_elem_value *ucontrol)
  1434. {
  1435. ucontrol->value.iec958.status[0] = IEC958_AES0_NONAUDIO |
  1436. IEC958_AES0_PROFESSIONAL |
  1437. IEC958_AES0_PRO_FS |
  1438. IEC958_AES0_PRO_EMPHASIS;
  1439. return 0;
  1440. }
  1441. static struct snd_kcontrol_new snd_vt1724_spdif_maskc __devinitdata =
  1442. {
  1443. .access = SNDRV_CTL_ELEM_ACCESS_READ,
  1444. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  1445. .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, CON_MASK),
  1446. .info = snd_vt1724_spdif_info,
  1447. .get = snd_vt1724_spdif_maskc_get,
  1448. };
  1449. static struct snd_kcontrol_new snd_vt1724_spdif_maskp __devinitdata =
  1450. {
  1451. .access = SNDRV_CTL_ELEM_ACCESS_READ,
  1452. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  1453. .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, PRO_MASK),
  1454. .info = snd_vt1724_spdif_info,
  1455. .get = snd_vt1724_spdif_maskp_get,
  1456. };
  1457. #define snd_vt1724_spdif_sw_info snd_ctl_boolean_mono_info
  1458. static int snd_vt1724_spdif_sw_get(struct snd_kcontrol *kcontrol,
  1459. struct snd_ctl_elem_value *ucontrol)
  1460. {
  1461. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1462. ucontrol->value.integer.value[0] = inb(ICEREG1724(ice, SPDIF_CFG)) &
  1463. VT1724_CFG_SPDIF_OUT_EN ? 1 : 0;
  1464. return 0;
  1465. }
  1466. static int snd_vt1724_spdif_sw_put(struct snd_kcontrol *kcontrol,
  1467. struct snd_ctl_elem_value *ucontrol)
  1468. {
  1469. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1470. unsigned char old, val;
  1471. spin_lock_irq(&ice->reg_lock);
  1472. old = val = inb(ICEREG1724(ice, SPDIF_CFG));
  1473. val &= ~VT1724_CFG_SPDIF_OUT_EN;
  1474. if (ucontrol->value.integer.value[0])
  1475. val |= VT1724_CFG_SPDIF_OUT_EN;
  1476. if (old != val)
  1477. outb(val, ICEREG1724(ice, SPDIF_CFG));
  1478. spin_unlock_irq(&ice->reg_lock);
  1479. return old != val;
  1480. }
  1481. static struct snd_kcontrol_new snd_vt1724_spdif_switch __devinitdata =
  1482. {
  1483. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1484. /* FIXME: the following conflict with IEC958 Playback Route */
  1485. /* .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, SWITCH), */
  1486. .name = SNDRV_CTL_NAME_IEC958("Output ", NONE, SWITCH),
  1487. .info = snd_vt1724_spdif_sw_info,
  1488. .get = snd_vt1724_spdif_sw_get,
  1489. .put = snd_vt1724_spdif_sw_put
  1490. };
  1491. #if 0 /* NOT USED YET */
  1492. /*
  1493. * GPIO access from extern
  1494. */
  1495. #define snd_vt1724_gpio_info snd_ctl_boolean_mono_info
  1496. int snd_vt1724_gpio_get(struct snd_kcontrol *kcontrol,
  1497. struct snd_ctl_elem_value *ucontrol)
  1498. {
  1499. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1500. int shift = kcontrol->private_value & 0xff;
  1501. int invert = (kcontrol->private_value & (1<<24)) ? 1 : 0;
  1502. snd_ice1712_save_gpio_status(ice);
  1503. ucontrol->value.integer.value[0] =
  1504. (snd_ice1712_gpio_read(ice) & (1 << shift) ? 1 : 0) ^ invert;
  1505. snd_ice1712_restore_gpio_status(ice);
  1506. return 0;
  1507. }
  1508. int snd_ice1712_gpio_put(struct snd_kcontrol *kcontrol,
  1509. struct snd_ctl_elem_value *ucontrol)
  1510. {
  1511. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1512. int shift = kcontrol->private_value & 0xff;
  1513. int invert = (kcontrol->private_value & (1<<24)) ? mask : 0;
  1514. unsigned int val, nval;
  1515. if (kcontrol->private_value & (1 << 31))
  1516. return -EPERM;
  1517. nval = (ucontrol->value.integer.value[0] ? (1 << shift) : 0) ^ invert;
  1518. snd_ice1712_save_gpio_status(ice);
  1519. val = snd_ice1712_gpio_read(ice);
  1520. nval |= val & ~(1 << shift);
  1521. if (val != nval)
  1522. snd_ice1712_gpio_write(ice, nval);
  1523. snd_ice1712_restore_gpio_status(ice);
  1524. return val != nval;
  1525. }
  1526. #endif /* NOT USED YET */
  1527. /*
  1528. * rate
  1529. */
  1530. static int snd_vt1724_pro_internal_clock_info(struct snd_kcontrol *kcontrol,
  1531. struct snd_ctl_elem_info *uinfo)
  1532. {
  1533. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1534. uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
  1535. uinfo->count = 1;
  1536. uinfo->value.enumerated.items = ice->hw_rates->count + 1;
  1537. if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
  1538. uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
  1539. if (uinfo->value.enumerated.item == uinfo->value.enumerated.items - 1)
  1540. strcpy(uinfo->value.enumerated.name, "IEC958 Input");
  1541. else
  1542. sprintf(uinfo->value.enumerated.name, "%d",
  1543. ice->hw_rates->list[uinfo->value.enumerated.item]);
  1544. return 0;
  1545. }
  1546. static int snd_vt1724_pro_internal_clock_get(struct snd_kcontrol *kcontrol,
  1547. struct snd_ctl_elem_value *ucontrol)
  1548. {
  1549. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1550. unsigned int i, rate;
  1551. spin_lock_irq(&ice->reg_lock);
  1552. if (ice->is_spdif_master(ice)) {
  1553. ucontrol->value.enumerated.item[0] = ice->hw_rates->count;
  1554. } else {
  1555. rate = ice->get_rate(ice);
  1556. ucontrol->value.enumerated.item[0] = 0;
  1557. for (i = 0; i < ice->hw_rates->count; i++) {
  1558. if (ice->hw_rates->list[i] == rate) {
  1559. ucontrol->value.enumerated.item[0] = i;
  1560. break;
  1561. }
  1562. }
  1563. }
  1564. spin_unlock_irq(&ice->reg_lock);
  1565. return 0;
  1566. }
  1567. /* setting clock to external - SPDIF */
  1568. static void stdclock_set_spdif_clock(struct snd_ice1712 *ice)
  1569. {
  1570. unsigned char oval;
  1571. unsigned char i2s_oval;
  1572. oval = inb(ICEMT1724(ice, RATE));
  1573. outb(oval | VT1724_SPDIF_MASTER, ICEMT1724(ice, RATE));
  1574. /* setting 256fs */
  1575. i2s_oval = inb(ICEMT1724(ice, I2S_FORMAT));
  1576. outb(i2s_oval & ~VT1724_MT_I2S_MCLK_128X, ICEMT1724(ice, I2S_FORMAT));
  1577. }
  1578. static int snd_vt1724_pro_internal_clock_put(struct snd_kcontrol *kcontrol,
  1579. struct snd_ctl_elem_value *ucontrol)
  1580. {
  1581. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1582. unsigned int old_rate, new_rate;
  1583. unsigned int item = ucontrol->value.enumerated.item[0];
  1584. unsigned int spdif = ice->hw_rates->count;
  1585. if (item > spdif)
  1586. return -EINVAL;
  1587. spin_lock_irq(&ice->reg_lock);
  1588. if (ice->is_spdif_master(ice))
  1589. old_rate = 0;
  1590. else
  1591. old_rate = ice->get_rate(ice);
  1592. if (item == spdif) {
  1593. /* switching to external clock via SPDIF */
  1594. ice->set_spdif_clock(ice);
  1595. new_rate = 0;
  1596. } else {
  1597. /* internal on-card clock */
  1598. new_rate = ice->hw_rates->list[item];
  1599. ice->pro_rate_default = new_rate;
  1600. spin_unlock_irq(&ice->reg_lock);
  1601. snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 1);
  1602. spin_lock_irq(&ice->reg_lock);
  1603. }
  1604. spin_unlock_irq(&ice->reg_lock);
  1605. /* the first reset to the SPDIF master mode? */
  1606. if (old_rate != new_rate && !new_rate) {
  1607. /* notify akm chips as well */
  1608. unsigned int i;
  1609. if (ice->gpio.set_pro_rate)
  1610. ice->gpio.set_pro_rate(ice, 0);
  1611. for (i = 0; i < ice->akm_codecs; i++) {
  1612. if (ice->akm[i].ops.set_rate_val)
  1613. ice->akm[i].ops.set_rate_val(&ice->akm[i], 0);
  1614. }
  1615. }
  1616. return old_rate != new_rate;
  1617. }
  1618. static struct snd_kcontrol_new snd_vt1724_pro_internal_clock __devinitdata = {
  1619. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1620. .name = "Multi Track Internal Clock",
  1621. .info = snd_vt1724_pro_internal_clock_info,
  1622. .get = snd_vt1724_pro_internal_clock_get,
  1623. .put = snd_vt1724_pro_internal_clock_put
  1624. };
  1625. #define snd_vt1724_pro_rate_locking_info snd_ctl_boolean_mono_info
  1626. static int snd_vt1724_pro_rate_locking_get(struct snd_kcontrol *kcontrol,
  1627. struct snd_ctl_elem_value *ucontrol)
  1628. {
  1629. ucontrol->value.integer.value[0] = PRO_RATE_LOCKED;
  1630. return 0;
  1631. }
  1632. static int snd_vt1724_pro_rate_locking_put(struct snd_kcontrol *kcontrol,
  1633. struct snd_ctl_elem_value *ucontrol)
  1634. {
  1635. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1636. int change = 0, nval;
  1637. nval = ucontrol->value.integer.value[0] ? 1 : 0;
  1638. spin_lock_irq(&ice->reg_lock);
  1639. change = PRO_RATE_LOCKED != nval;
  1640. PRO_RATE_LOCKED = nval;
  1641. spin_unlock_irq(&ice->reg_lock);
  1642. return change;
  1643. }
  1644. static struct snd_kcontrol_new snd_vt1724_pro_rate_locking __devinitdata = {
  1645. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1646. .name = "Multi Track Rate Locking",
  1647. .info = snd_vt1724_pro_rate_locking_info,
  1648. .get = snd_vt1724_pro_rate_locking_get,
  1649. .put = snd_vt1724_pro_rate_locking_put
  1650. };
  1651. #define snd_vt1724_pro_rate_reset_info snd_ctl_boolean_mono_info
  1652. static int snd_vt1724_pro_rate_reset_get(struct snd_kcontrol *kcontrol,
  1653. struct snd_ctl_elem_value *ucontrol)
  1654. {
  1655. ucontrol->value.integer.value[0] = PRO_RATE_RESET ? 1 : 0;
  1656. return 0;
  1657. }
  1658. static int snd_vt1724_pro_rate_reset_put(struct snd_kcontrol *kcontrol,
  1659. struct snd_ctl_elem_value *ucontrol)
  1660. {
  1661. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1662. int change = 0, nval;
  1663. nval = ucontrol->value.integer.value[0] ? 1 : 0;
  1664. spin_lock_irq(&ice->reg_lock);
  1665. change = PRO_RATE_RESET != nval;
  1666. PRO_RATE_RESET = nval;
  1667. spin_unlock_irq(&ice->reg_lock);
  1668. return change;
  1669. }
  1670. static struct snd_kcontrol_new snd_vt1724_pro_rate_reset __devinitdata = {
  1671. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1672. .name = "Multi Track Rate Reset",
  1673. .info = snd_vt1724_pro_rate_reset_info,
  1674. .get = snd_vt1724_pro_rate_reset_get,
  1675. .put = snd_vt1724_pro_rate_reset_put
  1676. };
  1677. /*
  1678. * routing
  1679. */
  1680. static int snd_vt1724_pro_route_info(struct snd_kcontrol *kcontrol,
  1681. struct snd_ctl_elem_info *uinfo)
  1682. {
  1683. static char *texts[] = {
  1684. "PCM Out", /* 0 */
  1685. "H/W In 0", "H/W In 1", /* 1-2 */
  1686. "IEC958 In L", "IEC958 In R", /* 3-4 */
  1687. };
  1688. uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
  1689. uinfo->count = 1;
  1690. uinfo->value.enumerated.items = 5;
  1691. if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
  1692. uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
  1693. strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
  1694. return 0;
  1695. }
  1696. static inline int analog_route_shift(int idx)
  1697. {
  1698. return (idx % 2) * 12 + ((idx / 2) * 3) + 8;
  1699. }
  1700. static inline int digital_route_shift(int idx)
  1701. {
  1702. return idx * 3;
  1703. }
  1704. static int get_route_val(struct snd_ice1712 *ice, int shift)
  1705. {
  1706. unsigned long val;
  1707. unsigned char eitem;
  1708. static const unsigned char xlate[8] = {
  1709. 0, 255, 1, 2, 255, 255, 3, 4,
  1710. };
  1711. val = inl(ICEMT1724(ice, ROUTE_PLAYBACK));
  1712. val >>= shift;
  1713. val &= 7; /* we now have 3 bits per output */
  1714. eitem = xlate[val];
  1715. if (eitem == 255) {
  1716. snd_BUG();
  1717. return 0;
  1718. }
  1719. return eitem;
  1720. }
  1721. static int put_route_val(struct snd_ice1712 *ice, unsigned int val, int shift)
  1722. {
  1723. unsigned int old_val, nval;
  1724. int change;
  1725. static const unsigned char xroute[8] = {
  1726. 0, /* PCM */
  1727. 2, /* PSDIN0 Left */
  1728. 3, /* PSDIN0 Right */
  1729. 6, /* SPDIN Left */
  1730. 7, /* SPDIN Right */
  1731. };
  1732. nval = xroute[val % 5];
  1733. val = old_val = inl(ICEMT1724(ice, ROUTE_PLAYBACK));
  1734. val &= ~(0x07 << shift);
  1735. val |= nval << shift;
  1736. change = val != old_val;
  1737. if (change)
  1738. outl(val, ICEMT1724(ice, ROUTE_PLAYBACK));
  1739. return change;
  1740. }
  1741. static int snd_vt1724_pro_route_analog_get(struct snd_kcontrol *kcontrol,
  1742. struct snd_ctl_elem_value *ucontrol)
  1743. {
  1744. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1745. int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
  1746. ucontrol->value.enumerated.item[0] =
  1747. get_route_val(ice, analog_route_shift(idx));
  1748. return 0;
  1749. }
  1750. static int snd_vt1724_pro_route_analog_put(struct snd_kcontrol *kcontrol,
  1751. struct snd_ctl_elem_value *ucontrol)
  1752. {
  1753. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1754. int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
  1755. return put_route_val(ice, ucontrol->value.enumerated.item[0],
  1756. analog_route_shift(idx));
  1757. }
  1758. static int snd_vt1724_pro_route_spdif_get(struct snd_kcontrol *kcontrol,
  1759. struct snd_ctl_elem_value *ucontrol)
  1760. {
  1761. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1762. int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
  1763. ucontrol->value.enumerated.item[0] =
  1764. get_route_val(ice, digital_route_shift(idx));
  1765. return 0;
  1766. }
  1767. static int snd_vt1724_pro_route_spdif_put(struct snd_kcontrol *kcontrol,
  1768. struct snd_ctl_elem_value *ucontrol)
  1769. {
  1770. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1771. int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
  1772. return put_route_val(ice, ucontrol->value.enumerated.item[0],
  1773. digital_route_shift(idx));
  1774. }
  1775. static struct snd_kcontrol_new snd_vt1724_mixer_pro_analog_route __devinitdata = {
  1776. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1777. .name = "H/W Playback Route",
  1778. .info = snd_vt1724_pro_route_info,
  1779. .get = snd_vt1724_pro_route_analog_get,
  1780. .put = snd_vt1724_pro_route_analog_put,
  1781. };
  1782. static struct snd_kcontrol_new snd_vt1724_mixer_pro_spdif_route __devinitdata = {
  1783. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1784. .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, NONE) "Route",
  1785. .info = snd_vt1724_pro_route_info,
  1786. .get = snd_vt1724_pro_route_spdif_get,
  1787. .put = snd_vt1724_pro_route_spdif_put,
  1788. .count = 2,
  1789. };
  1790. static int snd_vt1724_pro_peak_info(struct snd_kcontrol *kcontrol,
  1791. struct snd_ctl_elem_info *uinfo)
  1792. {
  1793. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  1794. uinfo->count = 22; /* FIXME: for compatibility with ice1712... */
  1795. uinfo->value.integer.min = 0;
  1796. uinfo->value.integer.max = 255;
  1797. return 0;
  1798. }
  1799. static int snd_vt1724_pro_peak_get(struct snd_kcontrol *kcontrol,
  1800. struct snd_ctl_elem_value *ucontrol)
  1801. {
  1802. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1803. int idx;
  1804. spin_lock_irq(&ice->reg_lock);
  1805. for (idx = 0; idx < 22; idx++) {
  1806. outb(idx, ICEMT1724(ice, MONITOR_PEAKINDEX));
  1807. ucontrol->value.integer.value[idx] =
  1808. inb(ICEMT1724(ice, MONITOR_PEAKDATA));
  1809. }
  1810. spin_unlock_irq(&ice->reg_lock);
  1811. return 0;
  1812. }
  1813. static struct snd_kcontrol_new snd_vt1724_mixer_pro_peak __devinitdata = {
  1814. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1815. .name = "Multi Track Peak",
  1816. .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
  1817. .info = snd_vt1724_pro_peak_info,
  1818. .get = snd_vt1724_pro_peak_get
  1819. };
  1820. /*
  1821. *
  1822. */
  1823. static struct snd_ice1712_card_info no_matched __devinitdata;
  1824. static struct snd_ice1712_card_info *card_tables[] __devinitdata = {
  1825. snd_vt1724_revo_cards,
  1826. snd_vt1724_amp_cards,
  1827. snd_vt1724_aureon_cards,
  1828. snd_vt1720_mobo_cards,
  1829. snd_vt1720_pontis_cards,
  1830. snd_vt1724_prodigy_hifi_cards,
  1831. snd_vt1724_prodigy192_cards,
  1832. snd_vt1724_juli_cards,
  1833. snd_vt1724_phase_cards,
  1834. snd_vt1724_wtm_cards,
  1835. snd_vt1724_se_cards,
  1836. NULL,
  1837. };
  1838. /*
  1839. */
  1840. static void wait_i2c_busy(struct snd_ice1712 *ice)
  1841. {
  1842. int t = 0x10000;
  1843. while ((inb(ICEREG1724(ice, I2C_CTRL)) & VT1724_I2C_BUSY) && t--)
  1844. ;
  1845. if (t == -1)
  1846. printk(KERN_ERR "ice1724: i2c busy timeout\n");
  1847. }
  1848. unsigned char snd_vt1724_read_i2c(struct snd_ice1712 *ice,
  1849. unsigned char dev, unsigned char addr)
  1850. {
  1851. unsigned char val;
  1852. mutex_lock(&ice->i2c_mutex);
  1853. wait_i2c_busy(ice);
  1854. outb(addr, ICEREG1724(ice, I2C_BYTE_ADDR));
  1855. outb(dev & ~VT1724_I2C_WRITE, ICEREG1724(ice, I2C_DEV_ADDR));
  1856. wait_i2c_busy(ice);
  1857. val = inb(ICEREG1724(ice, I2C_DATA));
  1858. mutex_unlock(&ice->i2c_mutex);
  1859. /* printk("i2c_read: [0x%x,0x%x] = 0x%x\n", dev, addr, val); */
  1860. return val;
  1861. }
  1862. void snd_vt1724_write_i2c(struct snd_ice1712 *ice,
  1863. unsigned char dev, unsigned char addr, unsigned char data)
  1864. {
  1865. mutex_lock(&ice->i2c_mutex);
  1866. wait_i2c_busy(ice);
  1867. /* printk("i2c_write: [0x%x,0x%x] = 0x%x\n", dev, addr, data); */
  1868. outb(addr, ICEREG1724(ice, I2C_BYTE_ADDR));
  1869. outb(data, ICEREG1724(ice, I2C_DATA));
  1870. outb(dev | VT1724_I2C_WRITE, ICEREG1724(ice, I2C_DEV_ADDR));
  1871. wait_i2c_busy(ice);
  1872. mutex_unlock(&ice->i2c_mutex);
  1873. }
  1874. static int __devinit snd_vt1724_read_eeprom(struct snd_ice1712 *ice,
  1875. const char *modelname)
  1876. {
  1877. const int dev = 0xa0; /* EEPROM device address */
  1878. unsigned int i, size;
  1879. struct snd_ice1712_card_info * const *tbl, *c;
  1880. if (!modelname || !*modelname) {
  1881. ice->eeprom.subvendor = 0;
  1882. if ((inb(ICEREG1724(ice, I2C_CTRL)) & VT1724_I2C_EEPROM) != 0)
  1883. ice->eeprom.subvendor =
  1884. (snd_vt1724_read_i2c(ice, dev, 0x00) << 0) |
  1885. (snd_vt1724_read_i2c(ice, dev, 0x01) << 8) |
  1886. (snd_vt1724_read_i2c(ice, dev, 0x02) << 16) |
  1887. (snd_vt1724_read_i2c(ice, dev, 0x03) << 24);
  1888. if (ice->eeprom.subvendor == 0 ||
  1889. ice->eeprom.subvendor == (unsigned int)-1) {
  1890. /* invalid subvendor from EEPROM, try the PCI
  1891. * subststem ID instead
  1892. */
  1893. u16 vendor, device;
  1894. pci_read_config_word(ice->pci, PCI_SUBSYSTEM_VENDOR_ID,
  1895. &vendor);
  1896. pci_read_config_word(ice->pci, PCI_SUBSYSTEM_ID, &device);
  1897. ice->eeprom.subvendor =
  1898. ((unsigned int)swab16(vendor) << 16) | swab16(device);
  1899. if (ice->eeprom.subvendor == 0 ||
  1900. ice->eeprom.subvendor == (unsigned int)-1) {
  1901. printk(KERN_ERR "ice1724: No valid ID is found\n");
  1902. return -ENXIO;
  1903. }
  1904. }
  1905. }
  1906. for (tbl = card_tables; *tbl; tbl++) {
  1907. for (c = *tbl; c->subvendor; c++) {
  1908. if (modelname && c->model &&
  1909. !strcmp(modelname, c->model)) {
  1910. printk(KERN_INFO "ice1724: Using board model %s\n",
  1911. c->name);
  1912. ice->eeprom.subvendor = c->subvendor;
  1913. } else if (c->subvendor != ice->eeprom.subvendor)
  1914. continue;
  1915. if (!c->eeprom_size || !c->eeprom_data)
  1916. goto found;
  1917. /* if the EEPROM is given by the driver, use it */
  1918. snd_printdd("using the defined eeprom..\n");
  1919. ice->eeprom.version = 2;
  1920. ice->eeprom.size = c->eeprom_size + 6;
  1921. memcpy(ice->eeprom.data, c->eeprom_data, c->eeprom_size);
  1922. goto read_skipped;
  1923. }
  1924. }
  1925. printk(KERN_WARNING "ice1724: No matching model found for ID 0x%x\n",
  1926. ice->eeprom.subvendor);
  1927. found:
  1928. ice->eeprom.size = snd_vt1724_read_i2c(ice, dev, 0x04);
  1929. if (ice->eeprom.size < 6)
  1930. ice->eeprom.size = 32;
  1931. else if (ice->eeprom.size > 32) {
  1932. printk(KERN_ERR "ice1724: Invalid EEPROM (size = %i)\n",
  1933. ice->eeprom.size);
  1934. return -EIO;
  1935. }
  1936. ice->eeprom.version = snd_vt1724_read_i2c(ice, dev, 0x05);
  1937. if (ice->eeprom.version != 2)
  1938. printk(KERN_WARNING "ice1724: Invalid EEPROM version %i\n",
  1939. ice->eeprom.version);
  1940. size = ice->eeprom.size - 6;
  1941. for (i = 0; i < size; i++)
  1942. ice->eeprom.data[i] = snd_vt1724_read_i2c(ice, dev, i + 6);
  1943. read_skipped:
  1944. ice->eeprom.gpiomask = eeprom_triple(ice, ICE_EEP2_GPIO_MASK);
  1945. ice->eeprom.gpiostate = eeprom_triple(ice, ICE_EEP2_GPIO_STATE);
  1946. ice->eeprom.gpiodir = eeprom_triple(ice, ICE_EEP2_GPIO_DIR);
  1947. return 0;
  1948. }
  1949. static void __devinit snd_vt1724_chip_reset(struct snd_ice1712 *ice)
  1950. {
  1951. outb(VT1724_RESET , ICEREG1724(ice, CONTROL));
  1952. msleep(10);
  1953. outb(0, ICEREG1724(ice, CONTROL));
  1954. msleep(10);
  1955. }
  1956. static int __devinit snd_vt1724_chip_init(struct snd_ice1712 *ice)
  1957. {
  1958. outb(ice->eeprom.data[ICE_EEP2_SYSCONF], ICEREG1724(ice, SYS_CFG));
  1959. outb(ice->eeprom.data[ICE_EEP2_ACLINK], ICEREG1724(ice, AC97_CFG));
  1960. outb(ice->eeprom.data[ICE_EEP2_I2S], ICEREG1724(ice, I2S_FEATURES));
  1961. outb(ice->eeprom.data[ICE_EEP2_SPDIF], ICEREG1724(ice, SPDIF_CFG));
  1962. ice->gpio.write_mask = ice->eeprom.gpiomask;
  1963. ice->gpio.direction = ice->eeprom.gpiodir;
  1964. snd_vt1724_set_gpio_mask(ice, ice->eeprom.gpiomask);
  1965. snd_vt1724_set_gpio_dir(ice, ice->eeprom.gpiodir);
  1966. snd_vt1724_set_gpio_data(ice, ice->eeprom.gpiostate);
  1967. outb(0, ICEREG1724(ice, POWERDOWN));
  1968. return 0;
  1969. }
  1970. static int __devinit snd_vt1724_spdif_build_controls(struct snd_ice1712 *ice)
  1971. {
  1972. int err;
  1973. struct snd_kcontrol *kctl;
  1974. if (snd_BUG_ON(!ice->pcm))
  1975. return -EIO;
  1976. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_mixer_pro_spdif_route, ice));
  1977. if (err < 0)
  1978. return err;
  1979. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_spdif_switch, ice));
  1980. if (err < 0)
  1981. return err;
  1982. err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_vt1724_spdif_default, ice));
  1983. if (err < 0)
  1984. return err;
  1985. kctl->id.device = ice->pcm->device;
  1986. err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_vt1724_spdif_maskc, ice));
  1987. if (err < 0)
  1988. return err;
  1989. kctl->id.device = ice->pcm->device;
  1990. err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_vt1724_spdif_maskp, ice));
  1991. if (err < 0)
  1992. return err;
  1993. kctl->id.device = ice->pcm->device;
  1994. #if 0 /* use default only */
  1995. err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_vt1724_spdif_stream, ice));
  1996. if (err < 0)
  1997. return err;
  1998. kctl->id.device = ice->pcm->device;
  1999. ice->spdif.stream_ctl = kctl;
  2000. #endif
  2001. return 0;
  2002. }
  2003. static int __devinit snd_vt1724_build_controls(struct snd_ice1712 *ice)
  2004. {
  2005. int err;
  2006. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_eeprom, ice));
  2007. if (err < 0)
  2008. return err;
  2009. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_pro_internal_clock, ice));
  2010. if (err < 0)
  2011. return err;
  2012. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_pro_rate_locking, ice));
  2013. if (err < 0)
  2014. return err;
  2015. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_pro_rate_reset, ice));
  2016. if (err < 0)
  2017. return err;
  2018. if (ice->num_total_dacs > 0) {
  2019. struct snd_kcontrol_new tmp = snd_vt1724_mixer_pro_analog_route;
  2020. tmp.count = ice->num_total_dacs;
  2021. if (ice->vt1720 && tmp.count > 2)
  2022. tmp.count = 2;
  2023. err = snd_ctl_add(ice->card, snd_ctl_new1(&tmp, ice));
  2024. if (err < 0)
  2025. return err;
  2026. }
  2027. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_mixer_pro_peak, ice));
  2028. if (err < 0)
  2029. return err;
  2030. return 0;
  2031. }
  2032. static int snd_vt1724_free(struct snd_ice1712 *ice)
  2033. {
  2034. if (!ice->port)
  2035. goto __hw_end;
  2036. /* mask all interrupts */
  2037. outb(0xff, ICEMT1724(ice, DMA_INT_MASK));
  2038. outb(0xff, ICEREG1724(ice, IRQMASK));
  2039. /* --- */
  2040. __hw_end:
  2041. if (ice->irq >= 0)
  2042. free_irq(ice->irq, ice);
  2043. pci_release_regions(ice->pci);
  2044. snd_ice1712_akm4xxx_free(ice);
  2045. pci_disable_device(ice->pci);
  2046. kfree(ice->spec);
  2047. kfree(ice);
  2048. return 0;
  2049. }
  2050. static int snd_vt1724_dev_free(struct snd_device *device)
  2051. {
  2052. struct snd_ice1712 *ice = device->device_data;
  2053. return snd_vt1724_free(ice);
  2054. }
  2055. static int __devinit snd_vt1724_create(struct snd_card *card,
  2056. struct pci_dev *pci,
  2057. const char *modelname,
  2058. struct snd_ice1712 **r_ice1712)
  2059. {
  2060. struct snd_ice1712 *ice;
  2061. int err;
  2062. static struct snd_device_ops ops = {
  2063. .dev_free = snd_vt1724_dev_free,
  2064. };
  2065. *r_ice1712 = NULL;
  2066. /* enable PCI device */
  2067. err = pci_enable_device(pci);
  2068. if (err < 0)
  2069. return err;
  2070. ice = kzalloc(sizeof(*ice), GFP_KERNEL);
  2071. if (ice == NULL) {
  2072. pci_disable_device(pci);
  2073. return -ENOMEM;
  2074. }
  2075. ice->vt1724 = 1;
  2076. spin_lock_init(&ice->reg_lock);
  2077. mutex_init(&ice->gpio_mutex);
  2078. mutex_init(&ice->open_mutex);
  2079. mutex_init(&ice->i2c_mutex);
  2080. ice->gpio.set_mask = snd_vt1724_set_gpio_mask;
  2081. ice->gpio.set_dir = snd_vt1724_set_gpio_dir;
  2082. ice->gpio.set_data = snd_vt1724_set_gpio_data;
  2083. ice->gpio.get_data = snd_vt1724_get_gpio_data;
  2084. ice->card = card;
  2085. ice->pci = pci;
  2086. ice->irq = -1;
  2087. pci_set_master(pci);
  2088. snd_vt1724_proc_init(ice);
  2089. synchronize_irq(pci->irq);
  2090. err = pci_request_regions(pci, "ICE1724");
  2091. if (err < 0) {
  2092. kfree(ice);
  2093. pci_disable_device(pci);
  2094. return err;
  2095. }
  2096. ice->port = pci_resource_start(pci, 0);
  2097. ice->profi_port = pci_resource_start(pci, 1);
  2098. if (request_irq(pci->irq, snd_vt1724_interrupt,
  2099. IRQF_SHARED, "ICE1724", ice)) {
  2100. snd_printk(KERN_ERR "unable to grab IRQ %d\n", pci->irq);
  2101. snd_vt1724_free(ice);
  2102. return -EIO;
  2103. }
  2104. ice->irq = pci->irq;
  2105. snd_vt1724_chip_reset(ice);
  2106. if (snd_vt1724_read_eeprom(ice, modelname) < 0) {
  2107. snd_vt1724_free(ice);
  2108. return -EIO;
  2109. }
  2110. if (snd_vt1724_chip_init(ice) < 0) {
  2111. snd_vt1724_free(ice);
  2112. return -EIO;
  2113. }
  2114. /* MPU_RX and TX irq masks are cleared later dynamically */
  2115. outb(VT1724_IRQ_MPU_RX | VT1724_IRQ_MPU_TX , ICEREG1724(ice, IRQMASK));
  2116. /* don't handle FIFO overrun/underruns (just yet),
  2117. * since they cause machine lockups
  2118. */
  2119. outb(VT1724_MULTI_FIFO_ERR, ICEMT1724(ice, DMA_INT_MASK));
  2120. err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, ice, &ops);
  2121. if (err < 0) {
  2122. snd_vt1724_free(ice);
  2123. return err;
  2124. }
  2125. snd_card_set_dev(card, &pci->dev);
  2126. *r_ice1712 = ice;
  2127. return 0;
  2128. }
  2129. /*
  2130. *
  2131. * Registration
  2132. *
  2133. */
  2134. static int __devinit snd_vt1724_probe(struct pci_dev *pci,
  2135. const struct pci_device_id *pci_id)
  2136. {
  2137. static int dev;
  2138. struct snd_card *card;
  2139. struct snd_ice1712 *ice;
  2140. int pcm_dev = 0, err;
  2141. struct snd_ice1712_card_info * const *tbl, *c;
  2142. if (dev >= SNDRV_CARDS)
  2143. return -ENODEV;
  2144. if (!enable[dev]) {
  2145. dev++;
  2146. return -ENOENT;
  2147. }
  2148. card = snd_card_new(index[dev], id[dev], THIS_MODULE, 0);
  2149. if (card == NULL)
  2150. return -ENOMEM;
  2151. strcpy(card->driver, "ICE1724");
  2152. strcpy(card->shortname, "ICEnsemble ICE1724");
  2153. err = snd_vt1724_create(card, pci, model[dev], &ice);
  2154. if (err < 0) {
  2155. snd_card_free(card);
  2156. return err;
  2157. }
  2158. for (tbl = card_tables; *tbl; tbl++) {
  2159. for (c = *tbl; c->subvendor; c++) {
  2160. if (c->subvendor == ice->eeprom.subvendor) {
  2161. strcpy(card->shortname, c->name);
  2162. if (c->driver) /* specific driver? */
  2163. strcpy(card->driver, c->driver);
  2164. if (c->chip_init) {
  2165. err = c->chip_init(ice);
  2166. if (err < 0) {
  2167. snd_card_free(card);
  2168. return err;
  2169. }
  2170. }
  2171. goto __found;
  2172. }
  2173. }
  2174. }
  2175. c = &no_matched;
  2176. __found:
  2177. /*
  2178. * VT1724 has separate DMAs for the analog and the SPDIF streams while
  2179. * ICE1712 has only one for both (mixed up).
  2180. *
  2181. * Confusingly the analog PCM is named "professional" here because it
  2182. * was called so in ice1712 driver, and vt1724 driver is derived from
  2183. * ice1712 driver.
  2184. */
  2185. ice->pro_rate_default = PRO_RATE_DEFAULT;
  2186. if (!ice->is_spdif_master)
  2187. ice->is_spdif_master = stdclock_is_spdif_master;
  2188. if (!ice->get_rate)
  2189. ice->get_rate = stdclock_get_rate;
  2190. if (!ice->set_rate)
  2191. ice->set_rate = stdclock_set_rate;
  2192. if (!ice->set_mclk)
  2193. ice->set_mclk = stdclock_set_mclk;
  2194. if (!ice->set_spdif_clock)
  2195. ice->set_spdif_clock = stdclock_set_spdif_clock;
  2196. if (!ice->hw_rates)
  2197. set_std_hw_rates(ice);
  2198. err = snd_vt1724_pcm_profi(ice, pcm_dev++);
  2199. if (err < 0) {
  2200. snd_card_free(card);
  2201. return err;
  2202. }
  2203. err = snd_vt1724_pcm_spdif(ice, pcm_dev++);
  2204. if (err < 0) {
  2205. snd_card_free(card);
  2206. return err;
  2207. }
  2208. err = snd_vt1724_pcm_indep(ice, pcm_dev++);
  2209. if (err < 0) {
  2210. snd_card_free(card);
  2211. return err;
  2212. }
  2213. err = snd_vt1724_ac97_mixer(ice);
  2214. if (err < 0) {
  2215. snd_card_free(card);
  2216. return err;
  2217. }
  2218. err = snd_vt1724_build_controls(ice);
  2219. if (err < 0) {
  2220. snd_card_free(card);
  2221. return err;
  2222. }
  2223. if (ice->pcm && ice->has_spdif) { /* has SPDIF I/O */
  2224. err = snd_vt1724_spdif_build_controls(ice);
  2225. if (err < 0) {
  2226. snd_card_free(card);
  2227. return err;
  2228. }
  2229. }
  2230. if (c->build_controls) {
  2231. err = c->build_controls(ice);
  2232. if (err < 0) {
  2233. snd_card_free(card);
  2234. return err;
  2235. }
  2236. }
  2237. if (!c->no_mpu401) {
  2238. if (ice->eeprom.data[ICE_EEP2_SYSCONF] & VT1724_CFG_MPU401) {
  2239. struct snd_rawmidi *rmidi;
  2240. err = snd_rawmidi_new(card, "MIDI", 0, 1, 1, &rmidi);
  2241. if (err < 0) {
  2242. snd_card_free(card);
  2243. return err;
  2244. }
  2245. ice->rmidi[0] = rmidi;
  2246. rmidi->private_data = ice;
  2247. strcpy(rmidi->name, "ICE1724 MIDI");
  2248. rmidi->info_flags = SNDRV_RAWMIDI_INFO_OUTPUT |
  2249. SNDRV_RAWMIDI_INFO_INPUT |
  2250. SNDRV_RAWMIDI_INFO_DUPLEX;
  2251. snd_rawmidi_set_ops(rmidi, SNDRV_RAWMIDI_STREAM_OUTPUT,
  2252. &vt1724_midi_output_ops);
  2253. snd_rawmidi_set_ops(rmidi, SNDRV_RAWMIDI_STREAM_INPUT,
  2254. &vt1724_midi_input_ops);
  2255. /* set watermarks */
  2256. outb(VT1724_MPU_RX_FIFO | 0x1,
  2257. ICEREG1724(ice, MPU_FIFO_WM));
  2258. outb(0x1, ICEREG1724(ice, MPU_FIFO_WM));
  2259. /* set UART mode */
  2260. outb(VT1724_MPU_UART, ICEREG1724(ice, MPU_CTRL));
  2261. }
  2262. }
  2263. sprintf(card->longname, "%s at 0x%lx, irq %i",
  2264. card->shortname, ice->port, ice->irq);
  2265. err = snd_card_register(card);
  2266. if (err < 0) {
  2267. snd_card_free(card);
  2268. return err;
  2269. }
  2270. pci_set_drvdata(pci, card);
  2271. dev++;
  2272. return 0;
  2273. }
  2274. static void __devexit snd_vt1724_remove(struct pci_dev *pci)
  2275. {
  2276. snd_card_free(pci_get_drvdata(pci));
  2277. pci_set_drvdata(pci, NULL);
  2278. }
  2279. static struct pci_driver driver = {
  2280. .name = "ICE1724",
  2281. .id_table = snd_vt1724_ids,
  2282. .probe = snd_vt1724_probe,
  2283. .remove = __devexit_p(snd_vt1724_remove),
  2284. };
  2285. static int __init alsa_card_ice1724_init(void)
  2286. {
  2287. return pci_register_driver(&driver);
  2288. }
  2289. static void __exit alsa_card_ice1724_exit(void)
  2290. {
  2291. pci_unregister_driver(&driver);
  2292. }
  2293. module_init(alsa_card_ice1724_init)
  2294. module_exit(alsa_card_ice1724_exit)