qla_init.c 120 KB

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  1. /*
  2. * QLogic Fibre Channel HBA Driver
  3. * Copyright (c) 2003-2008 QLogic Corporation
  4. *
  5. * See LICENSE.qla2xxx for copyright and licensing details.
  6. */
  7. #include "qla_def.h"
  8. #include "qla_gbl.h"
  9. #include <linux/delay.h>
  10. #include <linux/vmalloc.h>
  11. #include "qla_devtbl.h"
  12. #ifdef CONFIG_SPARC
  13. #include <asm/prom.h>
  14. #endif
  15. /*
  16. * QLogic ISP2x00 Hardware Support Function Prototypes.
  17. */
  18. static int qla2x00_isp_firmware(scsi_qla_host_t *);
  19. static void qla2x00_resize_request_q(scsi_qla_host_t *);
  20. static int qla2x00_setup_chip(scsi_qla_host_t *);
  21. static int qla2x00_init_rings(scsi_qla_host_t *);
  22. static int qla2x00_fw_ready(scsi_qla_host_t *);
  23. static int qla2x00_configure_hba(scsi_qla_host_t *);
  24. static int qla2x00_configure_loop(scsi_qla_host_t *);
  25. static int qla2x00_configure_local_loop(scsi_qla_host_t *);
  26. static int qla2x00_configure_fabric(scsi_qla_host_t *);
  27. static int qla2x00_find_all_fabric_devs(scsi_qla_host_t *, struct list_head *);
  28. static int qla2x00_device_resync(scsi_qla_host_t *);
  29. static int qla2x00_fabric_dev_login(scsi_qla_host_t *, fc_port_t *,
  30. uint16_t *);
  31. static int qla2x00_restart_isp(scsi_qla_host_t *);
  32. static int qla2x00_find_new_loop_id(scsi_qla_host_t *, fc_port_t *);
  33. static struct qla_chip_state_84xx *qla84xx_get_chip(struct scsi_qla_host *);
  34. static int qla84xx_init_chip(scsi_qla_host_t *);
  35. static int qla25xx_init_queues(struct qla_hw_data *);
  36. /****************************************************************************/
  37. /* QLogic ISP2x00 Hardware Support Functions. */
  38. /****************************************************************************/
  39. /*
  40. * qla2x00_initialize_adapter
  41. * Initialize board.
  42. *
  43. * Input:
  44. * ha = adapter block pointer.
  45. *
  46. * Returns:
  47. * 0 = success
  48. */
  49. int
  50. qla2x00_initialize_adapter(scsi_qla_host_t *vha)
  51. {
  52. int rval;
  53. struct qla_hw_data *ha = vha->hw;
  54. struct req_que *req = ha->req_q_map[0];
  55. /* Clear adapter flags. */
  56. vha->flags.online = 0;
  57. vha->flags.reset_active = 0;
  58. atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
  59. atomic_set(&vha->loop_state, LOOP_DOWN);
  60. vha->device_flags = DFLG_NO_CABLE;
  61. vha->dpc_flags = 0;
  62. vha->flags.management_server_logged_in = 0;
  63. vha->marker_needed = 0;
  64. ha->mbx_flags = 0;
  65. ha->isp_abort_cnt = 0;
  66. ha->beacon_blink_led = 0;
  67. set_bit(REGISTER_FDMI_NEEDED, &vha->dpc_flags);
  68. set_bit(0, ha->req_qid_map);
  69. set_bit(0, ha->rsp_qid_map);
  70. qla_printk(KERN_INFO, ha, "Configuring PCI space...\n");
  71. rval = ha->isp_ops->pci_config(vha);
  72. if (rval) {
  73. DEBUG2(printk("scsi(%ld): Unable to configure PCI space.\n",
  74. vha->host_no));
  75. return (rval);
  76. }
  77. ha->isp_ops->reset_chip(vha);
  78. rval = qla2xxx_get_flash_info(vha);
  79. if (rval) {
  80. DEBUG2(printk("scsi(%ld): Unable to validate FLASH data.\n",
  81. vha->host_no));
  82. return (rval);
  83. }
  84. ha->isp_ops->get_flash_version(vha, req->ring);
  85. qla_printk(KERN_INFO, ha, "Configure NVRAM parameters...\n");
  86. ha->isp_ops->nvram_config(vha);
  87. if (ha->flags.disable_serdes) {
  88. /* Mask HBA via NVRAM settings? */
  89. qla_printk(KERN_INFO, ha, "Masking HBA WWPN "
  90. "%02x%02x%02x%02x%02x%02x%02x%02x (via NVRAM).\n",
  91. vha->port_name[0], vha->port_name[1],
  92. vha->port_name[2], vha->port_name[3],
  93. vha->port_name[4], vha->port_name[5],
  94. vha->port_name[6], vha->port_name[7]);
  95. return QLA_FUNCTION_FAILED;
  96. }
  97. qla_printk(KERN_INFO, ha, "Verifying loaded RISC code...\n");
  98. if (qla2x00_isp_firmware(vha) != QLA_SUCCESS) {
  99. rval = ha->isp_ops->chip_diag(vha);
  100. if (rval)
  101. return (rval);
  102. rval = qla2x00_setup_chip(vha);
  103. if (rval)
  104. return (rval);
  105. }
  106. if (IS_QLA84XX(ha)) {
  107. ha->cs84xx = qla84xx_get_chip(vha);
  108. if (!ha->cs84xx) {
  109. qla_printk(KERN_ERR, ha,
  110. "Unable to configure ISP84XX.\n");
  111. return QLA_FUNCTION_FAILED;
  112. }
  113. }
  114. rval = qla2x00_init_rings(vha);
  115. return (rval);
  116. }
  117. /**
  118. * qla2100_pci_config() - Setup ISP21xx PCI configuration registers.
  119. * @ha: HA context
  120. *
  121. * Returns 0 on success.
  122. */
  123. int
  124. qla2100_pci_config(scsi_qla_host_t *vha)
  125. {
  126. uint16_t w;
  127. unsigned long flags;
  128. struct qla_hw_data *ha = vha->hw;
  129. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  130. pci_set_master(ha->pdev);
  131. pci_try_set_mwi(ha->pdev);
  132. pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
  133. w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
  134. pci_write_config_word(ha->pdev, PCI_COMMAND, w);
  135. pci_disable_rom(ha->pdev);
  136. /* Get PCI bus information. */
  137. spin_lock_irqsave(&ha->hardware_lock, flags);
  138. ha->pci_attr = RD_REG_WORD(&reg->ctrl_status);
  139. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  140. return QLA_SUCCESS;
  141. }
  142. /**
  143. * qla2300_pci_config() - Setup ISP23xx PCI configuration registers.
  144. * @ha: HA context
  145. *
  146. * Returns 0 on success.
  147. */
  148. int
  149. qla2300_pci_config(scsi_qla_host_t *vha)
  150. {
  151. uint16_t w;
  152. unsigned long flags = 0;
  153. uint32_t cnt;
  154. struct qla_hw_data *ha = vha->hw;
  155. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  156. pci_set_master(ha->pdev);
  157. pci_try_set_mwi(ha->pdev);
  158. pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
  159. w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
  160. if (IS_QLA2322(ha) || IS_QLA6322(ha))
  161. w &= ~PCI_COMMAND_INTX_DISABLE;
  162. pci_write_config_word(ha->pdev, PCI_COMMAND, w);
  163. /*
  164. * If this is a 2300 card and not 2312, reset the
  165. * COMMAND_INVALIDATE due to a bug in the 2300. Unfortunately,
  166. * the 2310 also reports itself as a 2300 so we need to get the
  167. * fb revision level -- a 6 indicates it really is a 2300 and
  168. * not a 2310.
  169. */
  170. if (IS_QLA2300(ha)) {
  171. spin_lock_irqsave(&ha->hardware_lock, flags);
  172. /* Pause RISC. */
  173. WRT_REG_WORD(&reg->hccr, HCCR_PAUSE_RISC);
  174. for (cnt = 0; cnt < 30000; cnt++) {
  175. if ((RD_REG_WORD(&reg->hccr) & HCCR_RISC_PAUSE) != 0)
  176. break;
  177. udelay(10);
  178. }
  179. /* Select FPM registers. */
  180. WRT_REG_WORD(&reg->ctrl_status, 0x20);
  181. RD_REG_WORD(&reg->ctrl_status);
  182. /* Get the fb rev level */
  183. ha->fb_rev = RD_FB_CMD_REG(ha, reg);
  184. if (ha->fb_rev == FPM_2300)
  185. pci_clear_mwi(ha->pdev);
  186. /* Deselect FPM registers. */
  187. WRT_REG_WORD(&reg->ctrl_status, 0x0);
  188. RD_REG_WORD(&reg->ctrl_status);
  189. /* Release RISC module. */
  190. WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
  191. for (cnt = 0; cnt < 30000; cnt++) {
  192. if ((RD_REG_WORD(&reg->hccr) & HCCR_RISC_PAUSE) == 0)
  193. break;
  194. udelay(10);
  195. }
  196. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  197. }
  198. pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80);
  199. pci_disable_rom(ha->pdev);
  200. /* Get PCI bus information. */
  201. spin_lock_irqsave(&ha->hardware_lock, flags);
  202. ha->pci_attr = RD_REG_WORD(&reg->ctrl_status);
  203. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  204. return QLA_SUCCESS;
  205. }
  206. /**
  207. * qla24xx_pci_config() - Setup ISP24xx PCI configuration registers.
  208. * @ha: HA context
  209. *
  210. * Returns 0 on success.
  211. */
  212. int
  213. qla24xx_pci_config(scsi_qla_host_t *vha)
  214. {
  215. uint16_t w;
  216. unsigned long flags = 0;
  217. struct qla_hw_data *ha = vha->hw;
  218. struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
  219. pci_set_master(ha->pdev);
  220. pci_try_set_mwi(ha->pdev);
  221. pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
  222. w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
  223. w &= ~PCI_COMMAND_INTX_DISABLE;
  224. pci_write_config_word(ha->pdev, PCI_COMMAND, w);
  225. pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80);
  226. /* PCI-X -- adjust Maximum Memory Read Byte Count (2048). */
  227. if (pci_find_capability(ha->pdev, PCI_CAP_ID_PCIX))
  228. pcix_set_mmrbc(ha->pdev, 2048);
  229. /* PCIe -- adjust Maximum Read Request Size (2048). */
  230. if (pci_find_capability(ha->pdev, PCI_CAP_ID_EXP))
  231. pcie_set_readrq(ha->pdev, 2048);
  232. pci_disable_rom(ha->pdev);
  233. ha->chip_revision = ha->pdev->revision;
  234. /* Get PCI bus information. */
  235. spin_lock_irqsave(&ha->hardware_lock, flags);
  236. ha->pci_attr = RD_REG_DWORD(&reg->ctrl_status);
  237. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  238. return QLA_SUCCESS;
  239. }
  240. /**
  241. * qla25xx_pci_config() - Setup ISP25xx PCI configuration registers.
  242. * @ha: HA context
  243. *
  244. * Returns 0 on success.
  245. */
  246. int
  247. qla25xx_pci_config(scsi_qla_host_t *vha)
  248. {
  249. uint16_t w;
  250. struct qla_hw_data *ha = vha->hw;
  251. pci_set_master(ha->pdev);
  252. pci_try_set_mwi(ha->pdev);
  253. pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
  254. w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
  255. w &= ~PCI_COMMAND_INTX_DISABLE;
  256. pci_write_config_word(ha->pdev, PCI_COMMAND, w);
  257. /* PCIe -- adjust Maximum Read Request Size (2048). */
  258. if (pci_find_capability(ha->pdev, PCI_CAP_ID_EXP))
  259. pcie_set_readrq(ha->pdev, 2048);
  260. pci_disable_rom(ha->pdev);
  261. ha->chip_revision = ha->pdev->revision;
  262. return QLA_SUCCESS;
  263. }
  264. /**
  265. * qla2x00_isp_firmware() - Choose firmware image.
  266. * @ha: HA context
  267. *
  268. * Returns 0 on success.
  269. */
  270. static int
  271. qla2x00_isp_firmware(scsi_qla_host_t *vha)
  272. {
  273. int rval;
  274. uint16_t loop_id, topo, sw_cap;
  275. uint8_t domain, area, al_pa;
  276. struct qla_hw_data *ha = vha->hw;
  277. /* Assume loading risc code */
  278. rval = QLA_FUNCTION_FAILED;
  279. if (ha->flags.disable_risc_code_load) {
  280. DEBUG2(printk("scsi(%ld): RISC CODE NOT loaded\n",
  281. vha->host_no));
  282. qla_printk(KERN_INFO, ha, "RISC CODE NOT loaded\n");
  283. /* Verify checksum of loaded RISC code. */
  284. rval = qla2x00_verify_checksum(vha, ha->fw_srisc_address);
  285. if (rval == QLA_SUCCESS) {
  286. /* And, verify we are not in ROM code. */
  287. rval = qla2x00_get_adapter_id(vha, &loop_id, &al_pa,
  288. &area, &domain, &topo, &sw_cap);
  289. }
  290. }
  291. if (rval) {
  292. DEBUG2_3(printk("scsi(%ld): **** Load RISC code ****\n",
  293. vha->host_no));
  294. }
  295. return (rval);
  296. }
  297. /**
  298. * qla2x00_reset_chip() - Reset ISP chip.
  299. * @ha: HA context
  300. *
  301. * Returns 0 on success.
  302. */
  303. void
  304. qla2x00_reset_chip(scsi_qla_host_t *vha)
  305. {
  306. unsigned long flags = 0;
  307. struct qla_hw_data *ha = vha->hw;
  308. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  309. uint32_t cnt;
  310. uint16_t cmd;
  311. ha->isp_ops->disable_intrs(ha);
  312. spin_lock_irqsave(&ha->hardware_lock, flags);
  313. /* Turn off master enable */
  314. cmd = 0;
  315. pci_read_config_word(ha->pdev, PCI_COMMAND, &cmd);
  316. cmd &= ~PCI_COMMAND_MASTER;
  317. pci_write_config_word(ha->pdev, PCI_COMMAND, cmd);
  318. if (!IS_QLA2100(ha)) {
  319. /* Pause RISC. */
  320. WRT_REG_WORD(&reg->hccr, HCCR_PAUSE_RISC);
  321. if (IS_QLA2200(ha) || IS_QLA2300(ha)) {
  322. for (cnt = 0; cnt < 30000; cnt++) {
  323. if ((RD_REG_WORD(&reg->hccr) &
  324. HCCR_RISC_PAUSE) != 0)
  325. break;
  326. udelay(100);
  327. }
  328. } else {
  329. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  330. udelay(10);
  331. }
  332. /* Select FPM registers. */
  333. WRT_REG_WORD(&reg->ctrl_status, 0x20);
  334. RD_REG_WORD(&reg->ctrl_status); /* PCI Posting. */
  335. /* FPM Soft Reset. */
  336. WRT_REG_WORD(&reg->fpm_diag_config, 0x100);
  337. RD_REG_WORD(&reg->fpm_diag_config); /* PCI Posting. */
  338. /* Toggle Fpm Reset. */
  339. if (!IS_QLA2200(ha)) {
  340. WRT_REG_WORD(&reg->fpm_diag_config, 0x0);
  341. RD_REG_WORD(&reg->fpm_diag_config); /* PCI Posting. */
  342. }
  343. /* Select frame buffer registers. */
  344. WRT_REG_WORD(&reg->ctrl_status, 0x10);
  345. RD_REG_WORD(&reg->ctrl_status); /* PCI Posting. */
  346. /* Reset frame buffer FIFOs. */
  347. if (IS_QLA2200(ha)) {
  348. WRT_FB_CMD_REG(ha, reg, 0xa000);
  349. RD_FB_CMD_REG(ha, reg); /* PCI Posting. */
  350. } else {
  351. WRT_FB_CMD_REG(ha, reg, 0x00fc);
  352. /* Read back fb_cmd until zero or 3 seconds max */
  353. for (cnt = 0; cnt < 3000; cnt++) {
  354. if ((RD_FB_CMD_REG(ha, reg) & 0xff) == 0)
  355. break;
  356. udelay(100);
  357. }
  358. }
  359. /* Select RISC module registers. */
  360. WRT_REG_WORD(&reg->ctrl_status, 0);
  361. RD_REG_WORD(&reg->ctrl_status); /* PCI Posting. */
  362. /* Reset RISC processor. */
  363. WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
  364. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  365. /* Release RISC processor. */
  366. WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
  367. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  368. }
  369. WRT_REG_WORD(&reg->hccr, HCCR_CLR_RISC_INT);
  370. WRT_REG_WORD(&reg->hccr, HCCR_CLR_HOST_INT);
  371. /* Reset ISP chip. */
  372. WRT_REG_WORD(&reg->ctrl_status, CSR_ISP_SOFT_RESET);
  373. /* Wait for RISC to recover from reset. */
  374. if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
  375. /*
  376. * It is necessary to for a delay here since the card doesn't
  377. * respond to PCI reads during a reset. On some architectures
  378. * this will result in an MCA.
  379. */
  380. udelay(20);
  381. for (cnt = 30000; cnt; cnt--) {
  382. if ((RD_REG_WORD(&reg->ctrl_status) &
  383. CSR_ISP_SOFT_RESET) == 0)
  384. break;
  385. udelay(100);
  386. }
  387. } else
  388. udelay(10);
  389. /* Reset RISC processor. */
  390. WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
  391. WRT_REG_WORD(&reg->semaphore, 0);
  392. /* Release RISC processor. */
  393. WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
  394. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  395. if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
  396. for (cnt = 0; cnt < 30000; cnt++) {
  397. if (RD_MAILBOX_REG(ha, reg, 0) != MBS_BUSY)
  398. break;
  399. udelay(100);
  400. }
  401. } else
  402. udelay(100);
  403. /* Turn on master enable */
  404. cmd |= PCI_COMMAND_MASTER;
  405. pci_write_config_word(ha->pdev, PCI_COMMAND, cmd);
  406. /* Disable RISC pause on FPM parity error. */
  407. if (!IS_QLA2100(ha)) {
  408. WRT_REG_WORD(&reg->hccr, HCCR_DISABLE_PARITY_PAUSE);
  409. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  410. }
  411. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  412. }
  413. /**
  414. * qla24xx_reset_risc() - Perform full reset of ISP24xx RISC.
  415. * @ha: HA context
  416. *
  417. * Returns 0 on success.
  418. */
  419. static inline void
  420. qla24xx_reset_risc(scsi_qla_host_t *vha)
  421. {
  422. int hw_evt = 0;
  423. unsigned long flags = 0;
  424. struct qla_hw_data *ha = vha->hw;
  425. struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
  426. uint32_t cnt, d2;
  427. uint16_t wd;
  428. spin_lock_irqsave(&ha->hardware_lock, flags);
  429. /* Reset RISC. */
  430. WRT_REG_DWORD(&reg->ctrl_status, CSRX_DMA_SHUTDOWN|MWB_4096_BYTES);
  431. for (cnt = 0; cnt < 30000; cnt++) {
  432. if ((RD_REG_DWORD(&reg->ctrl_status) & CSRX_DMA_ACTIVE) == 0)
  433. break;
  434. udelay(10);
  435. }
  436. WRT_REG_DWORD(&reg->ctrl_status,
  437. CSRX_ISP_SOFT_RESET|CSRX_DMA_SHUTDOWN|MWB_4096_BYTES);
  438. pci_read_config_word(ha->pdev, PCI_COMMAND, &wd);
  439. udelay(100);
  440. /* Wait for firmware to complete NVRAM accesses. */
  441. d2 = (uint32_t) RD_REG_WORD(&reg->mailbox0);
  442. for (cnt = 10000 ; cnt && d2; cnt--) {
  443. udelay(5);
  444. d2 = (uint32_t) RD_REG_WORD(&reg->mailbox0);
  445. barrier();
  446. }
  447. if (cnt == 0)
  448. hw_evt = 1;
  449. /* Wait for soft-reset to complete. */
  450. d2 = RD_REG_DWORD(&reg->ctrl_status);
  451. for (cnt = 6000000 ; cnt && (d2 & CSRX_ISP_SOFT_RESET); cnt--) {
  452. udelay(5);
  453. d2 = RD_REG_DWORD(&reg->ctrl_status);
  454. barrier();
  455. }
  456. WRT_REG_DWORD(&reg->hccr, HCCRX_SET_RISC_RESET);
  457. RD_REG_DWORD(&reg->hccr);
  458. WRT_REG_DWORD(&reg->hccr, HCCRX_REL_RISC_PAUSE);
  459. RD_REG_DWORD(&reg->hccr);
  460. WRT_REG_DWORD(&reg->hccr, HCCRX_CLR_RISC_RESET);
  461. RD_REG_DWORD(&reg->hccr);
  462. d2 = (uint32_t) RD_REG_WORD(&reg->mailbox0);
  463. for (cnt = 6000000 ; cnt && d2; cnt--) {
  464. udelay(5);
  465. d2 = (uint32_t) RD_REG_WORD(&reg->mailbox0);
  466. barrier();
  467. }
  468. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  469. if (IS_NOPOLLING_TYPE(ha))
  470. ha->isp_ops->enable_intrs(ha);
  471. }
  472. /**
  473. * qla24xx_reset_chip() - Reset ISP24xx chip.
  474. * @ha: HA context
  475. *
  476. * Returns 0 on success.
  477. */
  478. void
  479. qla24xx_reset_chip(scsi_qla_host_t *vha)
  480. {
  481. struct qla_hw_data *ha = vha->hw;
  482. ha->isp_ops->disable_intrs(ha);
  483. /* Perform RISC reset. */
  484. qla24xx_reset_risc(vha);
  485. }
  486. /**
  487. * qla2x00_chip_diag() - Test chip for proper operation.
  488. * @ha: HA context
  489. *
  490. * Returns 0 on success.
  491. */
  492. int
  493. qla2x00_chip_diag(scsi_qla_host_t *vha)
  494. {
  495. int rval;
  496. struct qla_hw_data *ha = vha->hw;
  497. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  498. unsigned long flags = 0;
  499. uint16_t data;
  500. uint32_t cnt;
  501. uint16_t mb[5];
  502. struct req_que *req = ha->req_q_map[0];
  503. /* Assume a failed state */
  504. rval = QLA_FUNCTION_FAILED;
  505. DEBUG3(printk("scsi(%ld): Testing device at %lx.\n",
  506. vha->host_no, (u_long)&reg->flash_address));
  507. spin_lock_irqsave(&ha->hardware_lock, flags);
  508. /* Reset ISP chip. */
  509. WRT_REG_WORD(&reg->ctrl_status, CSR_ISP_SOFT_RESET);
  510. /*
  511. * We need to have a delay here since the card will not respond while
  512. * in reset causing an MCA on some architectures.
  513. */
  514. udelay(20);
  515. data = qla2x00_debounce_register(&reg->ctrl_status);
  516. for (cnt = 6000000 ; cnt && (data & CSR_ISP_SOFT_RESET); cnt--) {
  517. udelay(5);
  518. data = RD_REG_WORD(&reg->ctrl_status);
  519. barrier();
  520. }
  521. if (!cnt)
  522. goto chip_diag_failed;
  523. DEBUG3(printk("scsi(%ld): Reset register cleared by chip reset\n",
  524. ha->host_no));
  525. /* Reset RISC processor. */
  526. WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
  527. WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
  528. /* Workaround for QLA2312 PCI parity error */
  529. if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
  530. data = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 0));
  531. for (cnt = 6000000; cnt && (data == MBS_BUSY); cnt--) {
  532. udelay(5);
  533. data = RD_MAILBOX_REG(ha, reg, 0);
  534. barrier();
  535. }
  536. } else
  537. udelay(10);
  538. if (!cnt)
  539. goto chip_diag_failed;
  540. /* Check product ID of chip */
  541. DEBUG3(printk("scsi(%ld): Checking product ID of chip\n", ha->host_no));
  542. mb[1] = RD_MAILBOX_REG(ha, reg, 1);
  543. mb[2] = RD_MAILBOX_REG(ha, reg, 2);
  544. mb[3] = RD_MAILBOX_REG(ha, reg, 3);
  545. mb[4] = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 4));
  546. if (mb[1] != PROD_ID_1 || (mb[2] != PROD_ID_2 && mb[2] != PROD_ID_2a) ||
  547. mb[3] != PROD_ID_3) {
  548. qla_printk(KERN_WARNING, ha,
  549. "Wrong product ID = 0x%x,0x%x,0x%x\n", mb[1], mb[2], mb[3]);
  550. goto chip_diag_failed;
  551. }
  552. ha->product_id[0] = mb[1];
  553. ha->product_id[1] = mb[2];
  554. ha->product_id[2] = mb[3];
  555. ha->product_id[3] = mb[4];
  556. /* Adjust fw RISC transfer size */
  557. if (req->length > 1024)
  558. ha->fw_transfer_size = REQUEST_ENTRY_SIZE * 1024;
  559. else
  560. ha->fw_transfer_size = REQUEST_ENTRY_SIZE *
  561. req->length;
  562. if (IS_QLA2200(ha) &&
  563. RD_MAILBOX_REG(ha, reg, 7) == QLA2200A_RISC_ROM_VER) {
  564. /* Limit firmware transfer size with a 2200A */
  565. DEBUG3(printk("scsi(%ld): Found QLA2200A chip.\n",
  566. vha->host_no));
  567. ha->device_type |= DT_ISP2200A;
  568. ha->fw_transfer_size = 128;
  569. }
  570. /* Wrap Incoming Mailboxes Test. */
  571. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  572. DEBUG3(printk("scsi(%ld): Checking mailboxes.\n", vha->host_no));
  573. rval = qla2x00_mbx_reg_test(vha);
  574. if (rval) {
  575. DEBUG(printk("scsi(%ld): Failed mailbox send register test\n",
  576. vha->host_no));
  577. qla_printk(KERN_WARNING, ha,
  578. "Failed mailbox send register test\n");
  579. }
  580. else {
  581. /* Flag a successful rval */
  582. rval = QLA_SUCCESS;
  583. }
  584. spin_lock_irqsave(&ha->hardware_lock, flags);
  585. chip_diag_failed:
  586. if (rval)
  587. DEBUG2_3(printk("scsi(%ld): Chip diagnostics **** FAILED "
  588. "****\n", vha->host_no));
  589. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  590. return (rval);
  591. }
  592. /**
  593. * qla24xx_chip_diag() - Test ISP24xx for proper operation.
  594. * @ha: HA context
  595. *
  596. * Returns 0 on success.
  597. */
  598. int
  599. qla24xx_chip_diag(scsi_qla_host_t *vha)
  600. {
  601. int rval;
  602. struct qla_hw_data *ha = vha->hw;
  603. struct req_que *req = ha->req_q_map[0];
  604. /* Perform RISC reset. */
  605. qla24xx_reset_risc(vha);
  606. ha->fw_transfer_size = REQUEST_ENTRY_SIZE * req->length;
  607. rval = qla2x00_mbx_reg_test(vha);
  608. if (rval) {
  609. DEBUG(printk("scsi(%ld): Failed mailbox send register test\n",
  610. vha->host_no));
  611. qla_printk(KERN_WARNING, ha,
  612. "Failed mailbox send register test\n");
  613. } else {
  614. /* Flag a successful rval */
  615. rval = QLA_SUCCESS;
  616. }
  617. return rval;
  618. }
  619. void
  620. qla2x00_alloc_fw_dump(scsi_qla_host_t *vha)
  621. {
  622. int rval;
  623. uint32_t dump_size, fixed_size, mem_size, req_q_size, rsp_q_size,
  624. eft_size, fce_size, mq_size;
  625. dma_addr_t tc_dma;
  626. void *tc;
  627. struct qla_hw_data *ha = vha->hw;
  628. struct req_que *req = ha->req_q_map[0];
  629. struct rsp_que *rsp = ha->rsp_q_map[0];
  630. if (ha->fw_dump) {
  631. qla_printk(KERN_WARNING, ha,
  632. "Firmware dump previously allocated.\n");
  633. return;
  634. }
  635. ha->fw_dumped = 0;
  636. fixed_size = mem_size = eft_size = fce_size = mq_size = 0;
  637. if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
  638. fixed_size = sizeof(struct qla2100_fw_dump);
  639. } else if (IS_QLA23XX(ha)) {
  640. fixed_size = offsetof(struct qla2300_fw_dump, data_ram);
  641. mem_size = (ha->fw_memory_size - 0x11000 + 1) *
  642. sizeof(uint16_t);
  643. } else if (IS_FWI2_CAPABLE(ha)) {
  644. if (IS_QLA81XX(ha))
  645. fixed_size = offsetof(struct qla81xx_fw_dump, ext_mem);
  646. else if (IS_QLA25XX(ha))
  647. fixed_size = offsetof(struct qla25xx_fw_dump, ext_mem);
  648. else
  649. fixed_size = offsetof(struct qla24xx_fw_dump, ext_mem);
  650. mem_size = (ha->fw_memory_size - 0x100000 + 1) *
  651. sizeof(uint32_t);
  652. if (ha->mqenable)
  653. mq_size = sizeof(struct qla2xxx_mq_chain);
  654. /* Allocate memory for Fibre Channel Event Buffer. */
  655. if (!IS_QLA25XX(ha) && !IS_QLA81XX(ha))
  656. goto try_eft;
  657. tc = dma_alloc_coherent(&ha->pdev->dev, FCE_SIZE, &tc_dma,
  658. GFP_KERNEL);
  659. if (!tc) {
  660. qla_printk(KERN_WARNING, ha, "Unable to allocate "
  661. "(%d KB) for FCE.\n", FCE_SIZE / 1024);
  662. goto try_eft;
  663. }
  664. memset(tc, 0, FCE_SIZE);
  665. rval = qla2x00_enable_fce_trace(vha, tc_dma, FCE_NUM_BUFFERS,
  666. ha->fce_mb, &ha->fce_bufs);
  667. if (rval) {
  668. qla_printk(KERN_WARNING, ha, "Unable to initialize "
  669. "FCE (%d).\n", rval);
  670. dma_free_coherent(&ha->pdev->dev, FCE_SIZE, tc,
  671. tc_dma);
  672. ha->flags.fce_enabled = 0;
  673. goto try_eft;
  674. }
  675. qla_printk(KERN_INFO, ha, "Allocated (%d KB) for FCE...\n",
  676. FCE_SIZE / 1024);
  677. fce_size = sizeof(struct qla2xxx_fce_chain) + EFT_SIZE;
  678. ha->flags.fce_enabled = 1;
  679. ha->fce_dma = tc_dma;
  680. ha->fce = tc;
  681. try_eft:
  682. /* Allocate memory for Extended Trace Buffer. */
  683. tc = dma_alloc_coherent(&ha->pdev->dev, EFT_SIZE, &tc_dma,
  684. GFP_KERNEL);
  685. if (!tc) {
  686. qla_printk(KERN_WARNING, ha, "Unable to allocate "
  687. "(%d KB) for EFT.\n", EFT_SIZE / 1024);
  688. goto cont_alloc;
  689. }
  690. memset(tc, 0, EFT_SIZE);
  691. rval = qla2x00_enable_eft_trace(vha, tc_dma, EFT_NUM_BUFFERS);
  692. if (rval) {
  693. qla_printk(KERN_WARNING, ha, "Unable to initialize "
  694. "EFT (%d).\n", rval);
  695. dma_free_coherent(&ha->pdev->dev, EFT_SIZE, tc,
  696. tc_dma);
  697. goto cont_alloc;
  698. }
  699. qla_printk(KERN_INFO, ha, "Allocated (%d KB) for EFT...\n",
  700. EFT_SIZE / 1024);
  701. eft_size = EFT_SIZE;
  702. ha->eft_dma = tc_dma;
  703. ha->eft = tc;
  704. }
  705. cont_alloc:
  706. req_q_size = req->length * sizeof(request_t);
  707. rsp_q_size = rsp->length * sizeof(response_t);
  708. dump_size = offsetof(struct qla2xxx_fw_dump, isp);
  709. dump_size += fixed_size + mem_size + req_q_size + rsp_q_size +
  710. eft_size;
  711. ha->chain_offset = dump_size;
  712. dump_size += mq_size + fce_size;
  713. ha->fw_dump = vmalloc(dump_size);
  714. if (!ha->fw_dump) {
  715. qla_printk(KERN_WARNING, ha, "Unable to allocate (%d KB) for "
  716. "firmware dump!!!\n", dump_size / 1024);
  717. if (ha->eft) {
  718. dma_free_coherent(&ha->pdev->dev, eft_size, ha->eft,
  719. ha->eft_dma);
  720. ha->eft = NULL;
  721. ha->eft_dma = 0;
  722. }
  723. return;
  724. }
  725. qla_printk(KERN_INFO, ha, "Allocated (%d KB) for firmware dump...\n",
  726. dump_size / 1024);
  727. ha->fw_dump_len = dump_size;
  728. ha->fw_dump->signature[0] = 'Q';
  729. ha->fw_dump->signature[1] = 'L';
  730. ha->fw_dump->signature[2] = 'G';
  731. ha->fw_dump->signature[3] = 'C';
  732. ha->fw_dump->version = __constant_htonl(1);
  733. ha->fw_dump->fixed_size = htonl(fixed_size);
  734. ha->fw_dump->mem_size = htonl(mem_size);
  735. ha->fw_dump->req_q_size = htonl(req_q_size);
  736. ha->fw_dump->rsp_q_size = htonl(rsp_q_size);
  737. ha->fw_dump->eft_size = htonl(eft_size);
  738. ha->fw_dump->eft_addr_l = htonl(LSD(ha->eft_dma));
  739. ha->fw_dump->eft_addr_h = htonl(MSD(ha->eft_dma));
  740. ha->fw_dump->header_size =
  741. htonl(offsetof(struct qla2xxx_fw_dump, isp));
  742. }
  743. /**
  744. * qla2x00_resize_request_q() - Resize request queue given available ISP memory.
  745. * @ha: HA context
  746. *
  747. * Returns 0 on success.
  748. */
  749. static void
  750. qla2x00_resize_request_q(scsi_qla_host_t *vha)
  751. {
  752. int rval;
  753. uint16_t fw_iocb_cnt = 0;
  754. uint16_t request_q_length = REQUEST_ENTRY_CNT_2XXX_EXT_MEM;
  755. dma_addr_t request_dma;
  756. request_t *request_ring;
  757. struct qla_hw_data *ha = vha->hw;
  758. struct req_que *req = ha->req_q_map[0];
  759. /* Valid only on recent ISPs. */
  760. if (IS_QLA2100(ha) || IS_QLA2200(ha))
  761. return;
  762. /* Retrieve IOCB counts available to the firmware. */
  763. rval = qla2x00_get_resource_cnts(vha, NULL, NULL, NULL, &fw_iocb_cnt,
  764. &ha->max_npiv_vports);
  765. if (rval)
  766. return;
  767. /* No point in continuing if current settings are sufficient. */
  768. if (fw_iocb_cnt < 1024)
  769. return;
  770. if (req->length >= request_q_length)
  771. return;
  772. /* Attempt to claim larger area for request queue. */
  773. request_ring = dma_alloc_coherent(&ha->pdev->dev,
  774. (request_q_length + 1) * sizeof(request_t), &request_dma,
  775. GFP_KERNEL);
  776. if (request_ring == NULL)
  777. return;
  778. /* Resize successful, report extensions. */
  779. qla_printk(KERN_INFO, ha, "Extended memory detected (%d KB)...\n",
  780. (ha->fw_memory_size + 1) / 1024);
  781. qla_printk(KERN_INFO, ha, "Resizing request queue depth "
  782. "(%d -> %d)...\n", req->length, request_q_length);
  783. /* Clear old allocations. */
  784. dma_free_coherent(&ha->pdev->dev,
  785. (req->length + 1) * sizeof(request_t), req->ring,
  786. req->dma);
  787. /* Begin using larger queue. */
  788. req->length = request_q_length;
  789. req->ring = request_ring;
  790. req->dma = request_dma;
  791. }
  792. /**
  793. * qla2x00_setup_chip() - Load and start RISC firmware.
  794. * @ha: HA context
  795. *
  796. * Returns 0 on success.
  797. */
  798. static int
  799. qla2x00_setup_chip(scsi_qla_host_t *vha)
  800. {
  801. int rval;
  802. uint32_t srisc_address = 0;
  803. struct qla_hw_data *ha = vha->hw;
  804. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  805. unsigned long flags;
  806. if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) {
  807. /* Disable SRAM, Instruction RAM and GP RAM parity. */
  808. spin_lock_irqsave(&ha->hardware_lock, flags);
  809. WRT_REG_WORD(&reg->hccr, (HCCR_ENABLE_PARITY + 0x0));
  810. RD_REG_WORD(&reg->hccr);
  811. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  812. }
  813. /* Load firmware sequences */
  814. rval = ha->isp_ops->load_risc(vha, &srisc_address);
  815. if (rval == QLA_SUCCESS) {
  816. DEBUG(printk("scsi(%ld): Verifying Checksum of loaded RISC "
  817. "code.\n", vha->host_no));
  818. rval = qla2x00_verify_checksum(vha, srisc_address);
  819. if (rval == QLA_SUCCESS) {
  820. /* Start firmware execution. */
  821. DEBUG(printk("scsi(%ld): Checksum OK, start "
  822. "firmware.\n", vha->host_no));
  823. rval = qla2x00_execute_fw(vha, srisc_address);
  824. /* Retrieve firmware information. */
  825. if (rval == QLA_SUCCESS && ha->fw_major_version == 0) {
  826. qla2x00_get_fw_version(vha,
  827. &ha->fw_major_version,
  828. &ha->fw_minor_version,
  829. &ha->fw_subminor_version,
  830. &ha->fw_attributes, &ha->fw_memory_size,
  831. ha->mpi_version, &ha->mpi_capabilities);
  832. ha->flags.npiv_supported = 0;
  833. if (IS_QLA2XXX_MIDTYPE(ha) &&
  834. (ha->fw_attributes & BIT_2)) {
  835. ha->flags.npiv_supported = 1;
  836. if ((!ha->max_npiv_vports) ||
  837. ((ha->max_npiv_vports + 1) %
  838. MIN_MULTI_ID_FABRIC))
  839. ha->max_npiv_vports =
  840. MIN_MULTI_ID_FABRIC - 1;
  841. }
  842. qla2x00_resize_request_q(vha);
  843. if (ql2xallocfwdump)
  844. qla2x00_alloc_fw_dump(vha);
  845. }
  846. } else {
  847. DEBUG2(printk(KERN_INFO
  848. "scsi(%ld): ISP Firmware failed checksum.\n",
  849. vha->host_no));
  850. }
  851. }
  852. if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) {
  853. /* Enable proper parity. */
  854. spin_lock_irqsave(&ha->hardware_lock, flags);
  855. if (IS_QLA2300(ha))
  856. /* SRAM parity */
  857. WRT_REG_WORD(&reg->hccr, HCCR_ENABLE_PARITY + 0x1);
  858. else
  859. /* SRAM, Instruction RAM and GP RAM parity */
  860. WRT_REG_WORD(&reg->hccr, HCCR_ENABLE_PARITY + 0x7);
  861. RD_REG_WORD(&reg->hccr);
  862. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  863. }
  864. if (rval) {
  865. DEBUG2_3(printk("scsi(%ld): Setup chip **** FAILED ****.\n",
  866. vha->host_no));
  867. }
  868. return (rval);
  869. }
  870. /**
  871. * qla2x00_init_response_q_entries() - Initializes response queue entries.
  872. * @ha: HA context
  873. *
  874. * Beginning of request ring has initialization control block already built
  875. * by nvram config routine.
  876. *
  877. * Returns 0 on success.
  878. */
  879. void
  880. qla2x00_init_response_q_entries(struct rsp_que *rsp)
  881. {
  882. uint16_t cnt;
  883. response_t *pkt;
  884. pkt = rsp->ring_ptr;
  885. for (cnt = 0; cnt < rsp->length; cnt++) {
  886. pkt->signature = RESPONSE_PROCESSED;
  887. pkt++;
  888. }
  889. }
  890. /**
  891. * qla2x00_update_fw_options() - Read and process firmware options.
  892. * @ha: HA context
  893. *
  894. * Returns 0 on success.
  895. */
  896. void
  897. qla2x00_update_fw_options(scsi_qla_host_t *vha)
  898. {
  899. uint16_t swing, emphasis, tx_sens, rx_sens;
  900. struct qla_hw_data *ha = vha->hw;
  901. memset(ha->fw_options, 0, sizeof(ha->fw_options));
  902. qla2x00_get_fw_options(vha, ha->fw_options);
  903. if (IS_QLA2100(ha) || IS_QLA2200(ha))
  904. return;
  905. /* Serial Link options. */
  906. DEBUG3(printk("scsi(%ld): Serial link options:\n",
  907. vha->host_no));
  908. DEBUG3(qla2x00_dump_buffer((uint8_t *)&ha->fw_seriallink_options,
  909. sizeof(ha->fw_seriallink_options)));
  910. ha->fw_options[1] &= ~FO1_SET_EMPHASIS_SWING;
  911. if (ha->fw_seriallink_options[3] & BIT_2) {
  912. ha->fw_options[1] |= FO1_SET_EMPHASIS_SWING;
  913. /* 1G settings */
  914. swing = ha->fw_seriallink_options[2] & (BIT_2 | BIT_1 | BIT_0);
  915. emphasis = (ha->fw_seriallink_options[2] &
  916. (BIT_4 | BIT_3)) >> 3;
  917. tx_sens = ha->fw_seriallink_options[0] &
  918. (BIT_3 | BIT_2 | BIT_1 | BIT_0);
  919. rx_sens = (ha->fw_seriallink_options[0] &
  920. (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4;
  921. ha->fw_options[10] = (emphasis << 14) | (swing << 8);
  922. if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
  923. if (rx_sens == 0x0)
  924. rx_sens = 0x3;
  925. ha->fw_options[10] |= (tx_sens << 4) | rx_sens;
  926. } else if (IS_QLA2322(ha) || IS_QLA6322(ha))
  927. ha->fw_options[10] |= BIT_5 |
  928. ((rx_sens & (BIT_1 | BIT_0)) << 2) |
  929. (tx_sens & (BIT_1 | BIT_0));
  930. /* 2G settings */
  931. swing = (ha->fw_seriallink_options[2] &
  932. (BIT_7 | BIT_6 | BIT_5)) >> 5;
  933. emphasis = ha->fw_seriallink_options[3] & (BIT_1 | BIT_0);
  934. tx_sens = ha->fw_seriallink_options[1] &
  935. (BIT_3 | BIT_2 | BIT_1 | BIT_0);
  936. rx_sens = (ha->fw_seriallink_options[1] &
  937. (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4;
  938. ha->fw_options[11] = (emphasis << 14) | (swing << 8);
  939. if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
  940. if (rx_sens == 0x0)
  941. rx_sens = 0x3;
  942. ha->fw_options[11] |= (tx_sens << 4) | rx_sens;
  943. } else if (IS_QLA2322(ha) || IS_QLA6322(ha))
  944. ha->fw_options[11] |= BIT_5 |
  945. ((rx_sens & (BIT_1 | BIT_0)) << 2) |
  946. (tx_sens & (BIT_1 | BIT_0));
  947. }
  948. /* FCP2 options. */
  949. /* Return command IOCBs without waiting for an ABTS to complete. */
  950. ha->fw_options[3] |= BIT_13;
  951. /* LED scheme. */
  952. if (ha->flags.enable_led_scheme)
  953. ha->fw_options[2] |= BIT_12;
  954. /* Detect ISP6312. */
  955. if (IS_QLA6312(ha))
  956. ha->fw_options[2] |= BIT_13;
  957. /* Update firmware options. */
  958. qla2x00_set_fw_options(vha, ha->fw_options);
  959. }
  960. void
  961. qla24xx_update_fw_options(scsi_qla_host_t *vha)
  962. {
  963. int rval;
  964. struct qla_hw_data *ha = vha->hw;
  965. /* Update Serial Link options. */
  966. if ((le16_to_cpu(ha->fw_seriallink_options24[0]) & BIT_0) == 0)
  967. return;
  968. rval = qla2x00_set_serdes_params(vha,
  969. le16_to_cpu(ha->fw_seriallink_options24[1]),
  970. le16_to_cpu(ha->fw_seriallink_options24[2]),
  971. le16_to_cpu(ha->fw_seriallink_options24[3]));
  972. if (rval != QLA_SUCCESS) {
  973. qla_printk(KERN_WARNING, ha,
  974. "Unable to update Serial Link options (%x).\n", rval);
  975. }
  976. }
  977. void
  978. qla2x00_config_rings(struct scsi_qla_host *vha)
  979. {
  980. struct qla_hw_data *ha = vha->hw;
  981. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  982. struct req_que *req = ha->req_q_map[0];
  983. struct rsp_que *rsp = ha->rsp_q_map[0];
  984. /* Setup ring parameters in initialization control block. */
  985. ha->init_cb->request_q_outpointer = __constant_cpu_to_le16(0);
  986. ha->init_cb->response_q_inpointer = __constant_cpu_to_le16(0);
  987. ha->init_cb->request_q_length = cpu_to_le16(req->length);
  988. ha->init_cb->response_q_length = cpu_to_le16(rsp->length);
  989. ha->init_cb->request_q_address[0] = cpu_to_le32(LSD(req->dma));
  990. ha->init_cb->request_q_address[1] = cpu_to_le32(MSD(req->dma));
  991. ha->init_cb->response_q_address[0] = cpu_to_le32(LSD(rsp->dma));
  992. ha->init_cb->response_q_address[1] = cpu_to_le32(MSD(rsp->dma));
  993. WRT_REG_WORD(ISP_REQ_Q_IN(ha, reg), 0);
  994. WRT_REG_WORD(ISP_REQ_Q_OUT(ha, reg), 0);
  995. WRT_REG_WORD(ISP_RSP_Q_IN(ha, reg), 0);
  996. WRT_REG_WORD(ISP_RSP_Q_OUT(ha, reg), 0);
  997. RD_REG_WORD(ISP_RSP_Q_OUT(ha, reg)); /* PCI Posting. */
  998. }
  999. void
  1000. qla24xx_config_rings(struct scsi_qla_host *vha)
  1001. {
  1002. struct qla_hw_data *ha = vha->hw;
  1003. device_reg_t __iomem *reg = ISP_QUE_REG(ha, 0);
  1004. struct device_reg_2xxx __iomem *ioreg = &ha->iobase->isp;
  1005. struct qla_msix_entry *msix;
  1006. struct init_cb_24xx *icb;
  1007. uint16_t rid = 0;
  1008. struct req_que *req = ha->req_q_map[0];
  1009. struct rsp_que *rsp = ha->rsp_q_map[0];
  1010. /* Setup ring parameters in initialization control block. */
  1011. icb = (struct init_cb_24xx *)ha->init_cb;
  1012. icb->request_q_outpointer = __constant_cpu_to_le16(0);
  1013. icb->response_q_inpointer = __constant_cpu_to_le16(0);
  1014. icb->request_q_length = cpu_to_le16(req->length);
  1015. icb->response_q_length = cpu_to_le16(rsp->length);
  1016. icb->request_q_address[0] = cpu_to_le32(LSD(req->dma));
  1017. icb->request_q_address[1] = cpu_to_le32(MSD(req->dma));
  1018. icb->response_q_address[0] = cpu_to_le32(LSD(rsp->dma));
  1019. icb->response_q_address[1] = cpu_to_le32(MSD(rsp->dma));
  1020. if (ha->mqenable) {
  1021. icb->qos = __constant_cpu_to_le16(QLA_DEFAULT_QUE_QOS);
  1022. icb->rid = __constant_cpu_to_le16(rid);
  1023. if (ha->flags.msix_enabled) {
  1024. msix = &ha->msix_entries[1];
  1025. DEBUG2_17(printk(KERN_INFO
  1026. "Reistering vector 0x%x for base que\n", msix->entry));
  1027. icb->msix = cpu_to_le16(msix->entry);
  1028. }
  1029. /* Use alternate PCI bus number */
  1030. if (MSB(rid))
  1031. icb->firmware_options_2 |=
  1032. __constant_cpu_to_le32(BIT_19);
  1033. /* Use alternate PCI devfn */
  1034. if (LSB(rid))
  1035. icb->firmware_options_2 |=
  1036. __constant_cpu_to_le32(BIT_18);
  1037. icb->firmware_options_2 |= __constant_cpu_to_le32(BIT_22);
  1038. icb->firmware_options_2 |= __constant_cpu_to_le32(BIT_23);
  1039. ha->rsp_q_map[0]->options = icb->firmware_options_2;
  1040. WRT_REG_DWORD(&reg->isp25mq.req_q_in, 0);
  1041. WRT_REG_DWORD(&reg->isp25mq.req_q_out, 0);
  1042. WRT_REG_DWORD(&reg->isp25mq.rsp_q_in, 0);
  1043. WRT_REG_DWORD(&reg->isp25mq.rsp_q_out, 0);
  1044. } else {
  1045. WRT_REG_DWORD(&reg->isp24.req_q_in, 0);
  1046. WRT_REG_DWORD(&reg->isp24.req_q_out, 0);
  1047. WRT_REG_DWORD(&reg->isp24.rsp_q_in, 0);
  1048. WRT_REG_DWORD(&reg->isp24.rsp_q_out, 0);
  1049. }
  1050. /* PCI posting */
  1051. RD_REG_DWORD(&ioreg->hccr);
  1052. }
  1053. /**
  1054. * qla2x00_init_rings() - Initializes firmware.
  1055. * @ha: HA context
  1056. *
  1057. * Beginning of request ring has initialization control block already built
  1058. * by nvram config routine.
  1059. *
  1060. * Returns 0 on success.
  1061. */
  1062. static int
  1063. qla2x00_init_rings(scsi_qla_host_t *vha)
  1064. {
  1065. int rval;
  1066. unsigned long flags = 0;
  1067. int cnt, que;
  1068. struct qla_hw_data *ha = vha->hw;
  1069. struct req_que *req;
  1070. struct rsp_que *rsp;
  1071. struct scsi_qla_host *vp;
  1072. struct mid_init_cb_24xx *mid_init_cb =
  1073. (struct mid_init_cb_24xx *) ha->init_cb;
  1074. spin_lock_irqsave(&ha->hardware_lock, flags);
  1075. /* Clear outstanding commands array. */
  1076. for (que = 0; que < ha->max_queues; que++) {
  1077. req = ha->req_q_map[que];
  1078. if (!req)
  1079. continue;
  1080. for (cnt = 0; cnt < MAX_OUTSTANDING_COMMANDS; cnt++)
  1081. req->outstanding_cmds[cnt] = NULL;
  1082. req->current_outstanding_cmd = 0;
  1083. /* Initialize firmware. */
  1084. req->ring_ptr = req->ring;
  1085. req->ring_index = 0;
  1086. req->cnt = req->length;
  1087. }
  1088. for (que = 0; que < ha->max_queues; que++) {
  1089. rsp = ha->rsp_q_map[que];
  1090. if (!rsp)
  1091. continue;
  1092. rsp->ring_ptr = rsp->ring;
  1093. rsp->ring_index = 0;
  1094. /* Initialize response queue entries */
  1095. qla2x00_init_response_q_entries(rsp);
  1096. }
  1097. /* Clear RSCN queue. */
  1098. list_for_each_entry(vp, &ha->vp_list, list) {
  1099. vp->rscn_in_ptr = 0;
  1100. vp->rscn_out_ptr = 0;
  1101. }
  1102. ha->isp_ops->config_rings(vha);
  1103. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  1104. /* Update any ISP specific firmware options before initialization. */
  1105. ha->isp_ops->update_fw_options(vha);
  1106. DEBUG(printk("scsi(%ld): Issue init firmware.\n", vha->host_no));
  1107. if (ha->flags.npiv_supported)
  1108. mid_init_cb->count = cpu_to_le16(ha->max_npiv_vports);
  1109. mid_init_cb->options = __constant_cpu_to_le16(BIT_1);
  1110. rval = qla2x00_init_firmware(vha, ha->init_cb_size);
  1111. if (rval) {
  1112. DEBUG2_3(printk("scsi(%ld): Init firmware **** FAILED ****.\n",
  1113. vha->host_no));
  1114. } else {
  1115. DEBUG3(printk("scsi(%ld): Init firmware -- success.\n",
  1116. vha->host_no));
  1117. }
  1118. return (rval);
  1119. }
  1120. /**
  1121. * qla2x00_fw_ready() - Waits for firmware ready.
  1122. * @ha: HA context
  1123. *
  1124. * Returns 0 on success.
  1125. */
  1126. static int
  1127. qla2x00_fw_ready(scsi_qla_host_t *vha)
  1128. {
  1129. int rval;
  1130. unsigned long wtime, mtime, cs84xx_time;
  1131. uint16_t min_wait; /* Minimum wait time if loop is down */
  1132. uint16_t wait_time; /* Wait time if loop is coming ready */
  1133. uint16_t state[3];
  1134. struct qla_hw_data *ha = vha->hw;
  1135. rval = QLA_SUCCESS;
  1136. /* 20 seconds for loop down. */
  1137. min_wait = 20;
  1138. /*
  1139. * Firmware should take at most one RATOV to login, plus 5 seconds for
  1140. * our own processing.
  1141. */
  1142. if ((wait_time = (ha->retry_count*ha->login_timeout) + 5) < min_wait) {
  1143. wait_time = min_wait;
  1144. }
  1145. /* Min wait time if loop down */
  1146. mtime = jiffies + (min_wait * HZ);
  1147. /* wait time before firmware ready */
  1148. wtime = jiffies + (wait_time * HZ);
  1149. /* Wait for ISP to finish LIP */
  1150. if (!vha->flags.init_done)
  1151. qla_printk(KERN_INFO, ha, "Waiting for LIP to complete...\n");
  1152. DEBUG3(printk("scsi(%ld): Waiting for LIP to complete...\n",
  1153. vha->host_no));
  1154. do {
  1155. rval = qla2x00_get_firmware_state(vha, state);
  1156. if (rval == QLA_SUCCESS) {
  1157. if (state[0] < FSTATE_LOSS_OF_SYNC) {
  1158. vha->device_flags &= ~DFLG_NO_CABLE;
  1159. }
  1160. if (IS_QLA84XX(ha) && state[0] != FSTATE_READY) {
  1161. DEBUG16(printk("scsi(%ld): fw_state=%x "
  1162. "84xx=%x.\n", vha->host_no, state[0],
  1163. state[2]));
  1164. if ((state[2] & FSTATE_LOGGED_IN) &&
  1165. (state[2] & FSTATE_WAITING_FOR_VERIFY)) {
  1166. DEBUG16(printk("scsi(%ld): Sending "
  1167. "verify iocb.\n", vha->host_no));
  1168. cs84xx_time = jiffies;
  1169. rval = qla84xx_init_chip(vha);
  1170. if (rval != QLA_SUCCESS)
  1171. break;
  1172. /* Add time taken to initialize. */
  1173. cs84xx_time = jiffies - cs84xx_time;
  1174. wtime += cs84xx_time;
  1175. mtime += cs84xx_time;
  1176. DEBUG16(printk("scsi(%ld): Increasing "
  1177. "wait time by %ld. New time %ld\n",
  1178. vha->host_no, cs84xx_time, wtime));
  1179. }
  1180. } else if (state[0] == FSTATE_READY) {
  1181. DEBUG(printk("scsi(%ld): F/W Ready - OK \n",
  1182. vha->host_no));
  1183. qla2x00_get_retry_cnt(vha, &ha->retry_count,
  1184. &ha->login_timeout, &ha->r_a_tov);
  1185. rval = QLA_SUCCESS;
  1186. break;
  1187. }
  1188. rval = QLA_FUNCTION_FAILED;
  1189. if (atomic_read(&vha->loop_down_timer) &&
  1190. state[0] != FSTATE_READY) {
  1191. /* Loop down. Timeout on min_wait for states
  1192. * other than Wait for Login.
  1193. */
  1194. if (time_after_eq(jiffies, mtime)) {
  1195. qla_printk(KERN_INFO, ha,
  1196. "Cable is unplugged...\n");
  1197. vha->device_flags |= DFLG_NO_CABLE;
  1198. break;
  1199. }
  1200. }
  1201. } else {
  1202. /* Mailbox cmd failed. Timeout on min_wait. */
  1203. if (time_after_eq(jiffies, mtime))
  1204. break;
  1205. }
  1206. if (time_after_eq(jiffies, wtime))
  1207. break;
  1208. /* Delay for a while */
  1209. msleep(500);
  1210. DEBUG3(printk("scsi(%ld): fw_state=%x curr time=%lx.\n",
  1211. vha->host_no, state[0], jiffies));
  1212. } while (1);
  1213. DEBUG(printk("scsi(%ld): fw_state=%x curr time=%lx.\n",
  1214. vha->host_no, state[0], jiffies));
  1215. if (rval) {
  1216. DEBUG2_3(printk("scsi(%ld): Firmware ready **** FAILED ****.\n",
  1217. vha->host_no));
  1218. }
  1219. return (rval);
  1220. }
  1221. /*
  1222. * qla2x00_configure_hba
  1223. * Setup adapter context.
  1224. *
  1225. * Input:
  1226. * ha = adapter state pointer.
  1227. *
  1228. * Returns:
  1229. * 0 = success
  1230. *
  1231. * Context:
  1232. * Kernel context.
  1233. */
  1234. static int
  1235. qla2x00_configure_hba(scsi_qla_host_t *vha)
  1236. {
  1237. int rval;
  1238. uint16_t loop_id;
  1239. uint16_t topo;
  1240. uint16_t sw_cap;
  1241. uint8_t al_pa;
  1242. uint8_t area;
  1243. uint8_t domain;
  1244. char connect_type[22];
  1245. struct qla_hw_data *ha = vha->hw;
  1246. /* Get host addresses. */
  1247. rval = qla2x00_get_adapter_id(vha,
  1248. &loop_id, &al_pa, &area, &domain, &topo, &sw_cap);
  1249. if (rval != QLA_SUCCESS) {
  1250. if (LOOP_TRANSITION(vha) || atomic_read(&ha->loop_down_timer) ||
  1251. (rval == QLA_COMMAND_ERROR && loop_id == 0x7)) {
  1252. DEBUG2(printk("%s(%ld) Loop is in a transition state\n",
  1253. __func__, vha->host_no));
  1254. } else {
  1255. qla_printk(KERN_WARNING, ha,
  1256. "ERROR -- Unable to get host loop ID.\n");
  1257. set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
  1258. }
  1259. return (rval);
  1260. }
  1261. if (topo == 4) {
  1262. qla_printk(KERN_INFO, ha,
  1263. "Cannot get topology - retrying.\n");
  1264. return (QLA_FUNCTION_FAILED);
  1265. }
  1266. vha->loop_id = loop_id;
  1267. /* initialize */
  1268. ha->min_external_loopid = SNS_FIRST_LOOP_ID;
  1269. ha->operating_mode = LOOP;
  1270. ha->switch_cap = 0;
  1271. switch (topo) {
  1272. case 0:
  1273. DEBUG3(printk("scsi(%ld): HBA in NL topology.\n",
  1274. vha->host_no));
  1275. ha->current_topology = ISP_CFG_NL;
  1276. strcpy(connect_type, "(Loop)");
  1277. break;
  1278. case 1:
  1279. DEBUG3(printk("scsi(%ld): HBA in FL topology.\n",
  1280. vha->host_no));
  1281. ha->switch_cap = sw_cap;
  1282. ha->current_topology = ISP_CFG_FL;
  1283. strcpy(connect_type, "(FL_Port)");
  1284. break;
  1285. case 2:
  1286. DEBUG3(printk("scsi(%ld): HBA in N P2P topology.\n",
  1287. vha->host_no));
  1288. ha->operating_mode = P2P;
  1289. ha->current_topology = ISP_CFG_N;
  1290. strcpy(connect_type, "(N_Port-to-N_Port)");
  1291. break;
  1292. case 3:
  1293. DEBUG3(printk("scsi(%ld): HBA in F P2P topology.\n",
  1294. vha->host_no));
  1295. ha->switch_cap = sw_cap;
  1296. ha->operating_mode = P2P;
  1297. ha->current_topology = ISP_CFG_F;
  1298. strcpy(connect_type, "(F_Port)");
  1299. break;
  1300. default:
  1301. DEBUG3(printk("scsi(%ld): HBA in unknown topology %x. "
  1302. "Using NL.\n",
  1303. vha->host_no, topo));
  1304. ha->current_topology = ISP_CFG_NL;
  1305. strcpy(connect_type, "(Loop)");
  1306. break;
  1307. }
  1308. /* Save Host port and loop ID. */
  1309. /* byte order - Big Endian */
  1310. vha->d_id.b.domain = domain;
  1311. vha->d_id.b.area = area;
  1312. vha->d_id.b.al_pa = al_pa;
  1313. if (!vha->flags.init_done)
  1314. qla_printk(KERN_INFO, ha,
  1315. "Topology - %s, Host Loop address 0x%x\n",
  1316. connect_type, vha->loop_id);
  1317. if (rval) {
  1318. DEBUG2_3(printk("scsi(%ld): FAILED.\n", vha->host_no));
  1319. } else {
  1320. DEBUG3(printk("scsi(%ld): exiting normally.\n", vha->host_no));
  1321. }
  1322. return(rval);
  1323. }
  1324. static inline void
  1325. qla2x00_set_model_info(scsi_qla_host_t *vha, uint8_t *model, size_t len,
  1326. char *def)
  1327. {
  1328. char *st, *en;
  1329. uint16_t index;
  1330. struct qla_hw_data *ha = vha->hw;
  1331. if (memcmp(model, BINZERO, len) != 0) {
  1332. strncpy(ha->model_number, model, len);
  1333. st = en = ha->model_number;
  1334. en += len - 1;
  1335. while (en > st) {
  1336. if (*en != 0x20 && *en != 0x00)
  1337. break;
  1338. *en-- = '\0';
  1339. }
  1340. index = (ha->pdev->subsystem_device & 0xff);
  1341. if (ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC &&
  1342. index < QLA_MODEL_NAMES)
  1343. strncpy(ha->model_desc,
  1344. qla2x00_model_name[index * 2 + 1],
  1345. sizeof(ha->model_desc) - 1);
  1346. } else {
  1347. index = (ha->pdev->subsystem_device & 0xff);
  1348. if (ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC &&
  1349. index < QLA_MODEL_NAMES) {
  1350. strcpy(ha->model_number,
  1351. qla2x00_model_name[index * 2]);
  1352. strncpy(ha->model_desc,
  1353. qla2x00_model_name[index * 2 + 1],
  1354. sizeof(ha->model_desc) - 1);
  1355. } else {
  1356. strcpy(ha->model_number, def);
  1357. }
  1358. }
  1359. if (IS_FWI2_CAPABLE(ha))
  1360. qla2xxx_get_vpd_field(vha, "\x82", ha->model_desc,
  1361. sizeof(ha->model_desc));
  1362. }
  1363. /* On sparc systems, obtain port and node WWN from firmware
  1364. * properties.
  1365. */
  1366. static void qla2xxx_nvram_wwn_from_ofw(scsi_qla_host_t *vha, nvram_t *nv)
  1367. {
  1368. #ifdef CONFIG_SPARC
  1369. struct qla_hw_data *ha = vha->hw;
  1370. struct pci_dev *pdev = ha->pdev;
  1371. struct device_node *dp = pci_device_to_OF_node(pdev);
  1372. const u8 *val;
  1373. int len;
  1374. val = of_get_property(dp, "port-wwn", &len);
  1375. if (val && len >= WWN_SIZE)
  1376. memcpy(nv->port_name, val, WWN_SIZE);
  1377. val = of_get_property(dp, "node-wwn", &len);
  1378. if (val && len >= WWN_SIZE)
  1379. memcpy(nv->node_name, val, WWN_SIZE);
  1380. #endif
  1381. }
  1382. /*
  1383. * NVRAM configuration for ISP 2xxx
  1384. *
  1385. * Input:
  1386. * ha = adapter block pointer.
  1387. *
  1388. * Output:
  1389. * initialization control block in response_ring
  1390. * host adapters parameters in host adapter block
  1391. *
  1392. * Returns:
  1393. * 0 = success.
  1394. */
  1395. int
  1396. qla2x00_nvram_config(scsi_qla_host_t *vha)
  1397. {
  1398. int rval;
  1399. uint8_t chksum = 0;
  1400. uint16_t cnt;
  1401. uint8_t *dptr1, *dptr2;
  1402. struct qla_hw_data *ha = vha->hw;
  1403. init_cb_t *icb = ha->init_cb;
  1404. nvram_t *nv = ha->nvram;
  1405. uint8_t *ptr = ha->nvram;
  1406. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  1407. rval = QLA_SUCCESS;
  1408. /* Determine NVRAM starting address. */
  1409. ha->nvram_size = sizeof(nvram_t);
  1410. ha->nvram_base = 0;
  1411. if (!IS_QLA2100(ha) && !IS_QLA2200(ha) && !IS_QLA2300(ha))
  1412. if ((RD_REG_WORD(&reg->ctrl_status) >> 14) == 1)
  1413. ha->nvram_base = 0x80;
  1414. /* Get NVRAM data and calculate checksum. */
  1415. ha->isp_ops->read_nvram(vha, ptr, ha->nvram_base, ha->nvram_size);
  1416. for (cnt = 0, chksum = 0; cnt < ha->nvram_size; cnt++)
  1417. chksum += *ptr++;
  1418. DEBUG5(printk("scsi(%ld): Contents of NVRAM\n", vha->host_no));
  1419. DEBUG5(qla2x00_dump_buffer((uint8_t *)nv, ha->nvram_size));
  1420. /* Bad NVRAM data, set defaults parameters. */
  1421. if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' ||
  1422. nv->id[2] != 'P' || nv->id[3] != ' ' || nv->nvram_version < 1) {
  1423. /* Reset NVRAM data. */
  1424. qla_printk(KERN_WARNING, ha, "Inconsistent NVRAM detected: "
  1425. "checksum=0x%x id=%c version=0x%x.\n", chksum, nv->id[0],
  1426. nv->nvram_version);
  1427. qla_printk(KERN_WARNING, ha, "Falling back to functioning (yet "
  1428. "invalid -- WWPN) defaults.\n");
  1429. /*
  1430. * Set default initialization control block.
  1431. */
  1432. memset(nv, 0, ha->nvram_size);
  1433. nv->parameter_block_version = ICB_VERSION;
  1434. if (IS_QLA23XX(ha)) {
  1435. nv->firmware_options[0] = BIT_2 | BIT_1;
  1436. nv->firmware_options[1] = BIT_7 | BIT_5;
  1437. nv->add_firmware_options[0] = BIT_5;
  1438. nv->add_firmware_options[1] = BIT_5 | BIT_4;
  1439. nv->frame_payload_size = __constant_cpu_to_le16(2048);
  1440. nv->special_options[1] = BIT_7;
  1441. } else if (IS_QLA2200(ha)) {
  1442. nv->firmware_options[0] = BIT_2 | BIT_1;
  1443. nv->firmware_options[1] = BIT_7 | BIT_5;
  1444. nv->add_firmware_options[0] = BIT_5;
  1445. nv->add_firmware_options[1] = BIT_5 | BIT_4;
  1446. nv->frame_payload_size = __constant_cpu_to_le16(1024);
  1447. } else if (IS_QLA2100(ha)) {
  1448. nv->firmware_options[0] = BIT_3 | BIT_1;
  1449. nv->firmware_options[1] = BIT_5;
  1450. nv->frame_payload_size = __constant_cpu_to_le16(1024);
  1451. }
  1452. nv->max_iocb_allocation = __constant_cpu_to_le16(256);
  1453. nv->execution_throttle = __constant_cpu_to_le16(16);
  1454. nv->retry_count = 8;
  1455. nv->retry_delay = 1;
  1456. nv->port_name[0] = 33;
  1457. nv->port_name[3] = 224;
  1458. nv->port_name[4] = 139;
  1459. qla2xxx_nvram_wwn_from_ofw(vha, nv);
  1460. nv->login_timeout = 4;
  1461. /*
  1462. * Set default host adapter parameters
  1463. */
  1464. nv->host_p[1] = BIT_2;
  1465. nv->reset_delay = 5;
  1466. nv->port_down_retry_count = 8;
  1467. nv->max_luns_per_target = __constant_cpu_to_le16(8);
  1468. nv->link_down_timeout = 60;
  1469. rval = 1;
  1470. }
  1471. #if defined(CONFIG_IA64_GENERIC) || defined(CONFIG_IA64_SGI_SN2)
  1472. /*
  1473. * The SN2 does not provide BIOS emulation which means you can't change
  1474. * potentially bogus BIOS settings. Force the use of default settings
  1475. * for link rate and frame size. Hope that the rest of the settings
  1476. * are valid.
  1477. */
  1478. if (ia64_platform_is("sn2")) {
  1479. nv->frame_payload_size = __constant_cpu_to_le16(2048);
  1480. if (IS_QLA23XX(ha))
  1481. nv->special_options[1] = BIT_7;
  1482. }
  1483. #endif
  1484. /* Reset Initialization control block */
  1485. memset(icb, 0, ha->init_cb_size);
  1486. /*
  1487. * Setup driver NVRAM options.
  1488. */
  1489. nv->firmware_options[0] |= (BIT_6 | BIT_1);
  1490. nv->firmware_options[0] &= ~(BIT_5 | BIT_4);
  1491. nv->firmware_options[1] |= (BIT_5 | BIT_0);
  1492. nv->firmware_options[1] &= ~BIT_4;
  1493. if (IS_QLA23XX(ha)) {
  1494. nv->firmware_options[0] |= BIT_2;
  1495. nv->firmware_options[0] &= ~BIT_3;
  1496. nv->add_firmware_options[1] |= BIT_5 | BIT_4;
  1497. if (IS_QLA2300(ha)) {
  1498. if (ha->fb_rev == FPM_2310) {
  1499. strcpy(ha->model_number, "QLA2310");
  1500. } else {
  1501. strcpy(ha->model_number, "QLA2300");
  1502. }
  1503. } else {
  1504. qla2x00_set_model_info(vha, nv->model_number,
  1505. sizeof(nv->model_number), "QLA23xx");
  1506. }
  1507. } else if (IS_QLA2200(ha)) {
  1508. nv->firmware_options[0] |= BIT_2;
  1509. /*
  1510. * 'Point-to-point preferred, else loop' is not a safe
  1511. * connection mode setting.
  1512. */
  1513. if ((nv->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) ==
  1514. (BIT_5 | BIT_4)) {
  1515. /* Force 'loop preferred, else point-to-point'. */
  1516. nv->add_firmware_options[0] &= ~(BIT_6 | BIT_5 | BIT_4);
  1517. nv->add_firmware_options[0] |= BIT_5;
  1518. }
  1519. strcpy(ha->model_number, "QLA22xx");
  1520. } else /*if (IS_QLA2100(ha))*/ {
  1521. strcpy(ha->model_number, "QLA2100");
  1522. }
  1523. /*
  1524. * Copy over NVRAM RISC parameter block to initialization control block.
  1525. */
  1526. dptr1 = (uint8_t *)icb;
  1527. dptr2 = (uint8_t *)&nv->parameter_block_version;
  1528. cnt = (uint8_t *)&icb->request_q_outpointer - (uint8_t *)&icb->version;
  1529. while (cnt--)
  1530. *dptr1++ = *dptr2++;
  1531. /* Copy 2nd half. */
  1532. dptr1 = (uint8_t *)icb->add_firmware_options;
  1533. cnt = (uint8_t *)icb->reserved_3 - (uint8_t *)icb->add_firmware_options;
  1534. while (cnt--)
  1535. *dptr1++ = *dptr2++;
  1536. /* Use alternate WWN? */
  1537. if (nv->host_p[1] & BIT_7) {
  1538. memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
  1539. memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
  1540. }
  1541. /* Prepare nodename */
  1542. if ((icb->firmware_options[1] & BIT_6) == 0) {
  1543. /*
  1544. * Firmware will apply the following mask if the nodename was
  1545. * not provided.
  1546. */
  1547. memcpy(icb->node_name, icb->port_name, WWN_SIZE);
  1548. icb->node_name[0] &= 0xF0;
  1549. }
  1550. /*
  1551. * Set host adapter parameters.
  1552. */
  1553. if (nv->host_p[0] & BIT_7)
  1554. ql2xextended_error_logging = 1;
  1555. ha->flags.disable_risc_code_load = ((nv->host_p[0] & BIT_4) ? 1 : 0);
  1556. /* Always load RISC code on non ISP2[12]00 chips. */
  1557. if (!IS_QLA2100(ha) && !IS_QLA2200(ha))
  1558. ha->flags.disable_risc_code_load = 0;
  1559. ha->flags.enable_lip_reset = ((nv->host_p[1] & BIT_1) ? 1 : 0);
  1560. ha->flags.enable_lip_full_login = ((nv->host_p[1] & BIT_2) ? 1 : 0);
  1561. ha->flags.enable_target_reset = ((nv->host_p[1] & BIT_3) ? 1 : 0);
  1562. ha->flags.enable_led_scheme = (nv->special_options[1] & BIT_4) ? 1 : 0;
  1563. ha->flags.disable_serdes = 0;
  1564. ha->operating_mode =
  1565. (icb->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) >> 4;
  1566. memcpy(ha->fw_seriallink_options, nv->seriallink_options,
  1567. sizeof(ha->fw_seriallink_options));
  1568. /* save HBA serial number */
  1569. ha->serial0 = icb->port_name[5];
  1570. ha->serial1 = icb->port_name[6];
  1571. ha->serial2 = icb->port_name[7];
  1572. memcpy(vha->node_name, icb->node_name, WWN_SIZE);
  1573. memcpy(vha->port_name, icb->port_name, WWN_SIZE);
  1574. icb->execution_throttle = __constant_cpu_to_le16(0xFFFF);
  1575. ha->retry_count = nv->retry_count;
  1576. /* Set minimum login_timeout to 4 seconds. */
  1577. if (nv->login_timeout < ql2xlogintimeout)
  1578. nv->login_timeout = ql2xlogintimeout;
  1579. if (nv->login_timeout < 4)
  1580. nv->login_timeout = 4;
  1581. ha->login_timeout = nv->login_timeout;
  1582. icb->login_timeout = nv->login_timeout;
  1583. /* Set minimum RATOV to 100 tenths of a second. */
  1584. ha->r_a_tov = 100;
  1585. ha->loop_reset_delay = nv->reset_delay;
  1586. /* Link Down Timeout = 0:
  1587. *
  1588. * When Port Down timer expires we will start returning
  1589. * I/O's to OS with "DID_NO_CONNECT".
  1590. *
  1591. * Link Down Timeout != 0:
  1592. *
  1593. * The driver waits for the link to come up after link down
  1594. * before returning I/Os to OS with "DID_NO_CONNECT".
  1595. */
  1596. if (nv->link_down_timeout == 0) {
  1597. ha->loop_down_abort_time =
  1598. (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
  1599. } else {
  1600. ha->link_down_timeout = nv->link_down_timeout;
  1601. ha->loop_down_abort_time =
  1602. (LOOP_DOWN_TIME - ha->link_down_timeout);
  1603. }
  1604. /*
  1605. * Need enough time to try and get the port back.
  1606. */
  1607. ha->port_down_retry_count = nv->port_down_retry_count;
  1608. if (qlport_down_retry)
  1609. ha->port_down_retry_count = qlport_down_retry;
  1610. /* Set login_retry_count */
  1611. ha->login_retry_count = nv->retry_count;
  1612. if (ha->port_down_retry_count == nv->port_down_retry_count &&
  1613. ha->port_down_retry_count > 3)
  1614. ha->login_retry_count = ha->port_down_retry_count;
  1615. else if (ha->port_down_retry_count > (int)ha->login_retry_count)
  1616. ha->login_retry_count = ha->port_down_retry_count;
  1617. if (ql2xloginretrycount)
  1618. ha->login_retry_count = ql2xloginretrycount;
  1619. icb->lun_enables = __constant_cpu_to_le16(0);
  1620. icb->command_resource_count = 0;
  1621. icb->immediate_notify_resource_count = 0;
  1622. icb->timeout = __constant_cpu_to_le16(0);
  1623. if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
  1624. /* Enable RIO */
  1625. icb->firmware_options[0] &= ~BIT_3;
  1626. icb->add_firmware_options[0] &=
  1627. ~(BIT_3 | BIT_2 | BIT_1 | BIT_0);
  1628. icb->add_firmware_options[0] |= BIT_2;
  1629. icb->response_accumulation_timer = 3;
  1630. icb->interrupt_delay_timer = 5;
  1631. vha->flags.process_response_queue = 1;
  1632. } else {
  1633. /* Enable ZIO. */
  1634. if (!vha->flags.init_done) {
  1635. ha->zio_mode = icb->add_firmware_options[0] &
  1636. (BIT_3 | BIT_2 | BIT_1 | BIT_0);
  1637. ha->zio_timer = icb->interrupt_delay_timer ?
  1638. icb->interrupt_delay_timer: 2;
  1639. }
  1640. icb->add_firmware_options[0] &=
  1641. ~(BIT_3 | BIT_2 | BIT_1 | BIT_0);
  1642. vha->flags.process_response_queue = 0;
  1643. if (ha->zio_mode != QLA_ZIO_DISABLED) {
  1644. ha->zio_mode = QLA_ZIO_MODE_6;
  1645. DEBUG2(printk("scsi(%ld): ZIO mode %d enabled; timer "
  1646. "delay (%d us).\n", vha->host_no, ha->zio_mode,
  1647. ha->zio_timer * 100));
  1648. qla_printk(KERN_INFO, ha,
  1649. "ZIO mode %d enabled; timer delay (%d us).\n",
  1650. ha->zio_mode, ha->zio_timer * 100);
  1651. icb->add_firmware_options[0] |= (uint8_t)ha->zio_mode;
  1652. icb->interrupt_delay_timer = (uint8_t)ha->zio_timer;
  1653. vha->flags.process_response_queue = 1;
  1654. }
  1655. }
  1656. if (rval) {
  1657. DEBUG2_3(printk(KERN_WARNING
  1658. "scsi(%ld): NVRAM configuration failed!\n", vha->host_no));
  1659. }
  1660. return (rval);
  1661. }
  1662. static void
  1663. qla2x00_rport_del(void *data)
  1664. {
  1665. fc_port_t *fcport = data;
  1666. struct fc_rport *rport;
  1667. spin_lock_irq(fcport->vha->host->host_lock);
  1668. rport = fcport->drport;
  1669. fcport->drport = NULL;
  1670. spin_unlock_irq(fcport->vha->host->host_lock);
  1671. if (rport)
  1672. fc_remote_port_delete(rport);
  1673. }
  1674. /**
  1675. * qla2x00_alloc_fcport() - Allocate a generic fcport.
  1676. * @ha: HA context
  1677. * @flags: allocation flags
  1678. *
  1679. * Returns a pointer to the allocated fcport, or NULL, if none available.
  1680. */
  1681. static fc_port_t *
  1682. qla2x00_alloc_fcport(scsi_qla_host_t *vha, gfp_t flags)
  1683. {
  1684. fc_port_t *fcport;
  1685. fcport = kzalloc(sizeof(fc_port_t), flags);
  1686. if (!fcport)
  1687. return NULL;
  1688. /* Setup fcport template structure. */
  1689. fcport->vha = vha;
  1690. fcport->vp_idx = vha->vp_idx;
  1691. fcport->port_type = FCT_UNKNOWN;
  1692. fcport->loop_id = FC_NO_LOOP_ID;
  1693. atomic_set(&fcport->state, FCS_UNCONFIGURED);
  1694. fcport->flags = FCF_RLC_SUPPORT;
  1695. fcport->supported_classes = FC_COS_UNSPECIFIED;
  1696. return fcport;
  1697. }
  1698. /*
  1699. * qla2x00_configure_loop
  1700. * Updates Fibre Channel Device Database with what is actually on loop.
  1701. *
  1702. * Input:
  1703. * ha = adapter block pointer.
  1704. *
  1705. * Returns:
  1706. * 0 = success.
  1707. * 1 = error.
  1708. * 2 = database was full and device was not configured.
  1709. */
  1710. static int
  1711. qla2x00_configure_loop(scsi_qla_host_t *vha)
  1712. {
  1713. int rval;
  1714. unsigned long flags, save_flags;
  1715. struct qla_hw_data *ha = vha->hw;
  1716. rval = QLA_SUCCESS;
  1717. /* Get Initiator ID */
  1718. if (test_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags)) {
  1719. rval = qla2x00_configure_hba(vha);
  1720. if (rval != QLA_SUCCESS) {
  1721. DEBUG(printk("scsi(%ld): Unable to configure HBA.\n",
  1722. vha->host_no));
  1723. return (rval);
  1724. }
  1725. }
  1726. save_flags = flags = vha->dpc_flags;
  1727. DEBUG(printk("scsi(%ld): Configure loop -- dpc flags =0x%lx\n",
  1728. vha->host_no, flags));
  1729. /*
  1730. * If we have both an RSCN and PORT UPDATE pending then handle them
  1731. * both at the same time.
  1732. */
  1733. clear_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
  1734. clear_bit(RSCN_UPDATE, &vha->dpc_flags);
  1735. /* Determine what we need to do */
  1736. if (ha->current_topology == ISP_CFG_FL &&
  1737. (test_bit(LOCAL_LOOP_UPDATE, &flags))) {
  1738. vha->flags.rscn_queue_overflow = 1;
  1739. set_bit(RSCN_UPDATE, &flags);
  1740. } else if (ha->current_topology == ISP_CFG_F &&
  1741. (test_bit(LOCAL_LOOP_UPDATE, &flags))) {
  1742. vha->flags.rscn_queue_overflow = 1;
  1743. set_bit(RSCN_UPDATE, &flags);
  1744. clear_bit(LOCAL_LOOP_UPDATE, &flags);
  1745. } else if (ha->current_topology == ISP_CFG_N) {
  1746. clear_bit(RSCN_UPDATE, &flags);
  1747. } else if (!vha->flags.online ||
  1748. (test_bit(ABORT_ISP_ACTIVE, &flags))) {
  1749. vha->flags.rscn_queue_overflow = 1;
  1750. set_bit(RSCN_UPDATE, &flags);
  1751. set_bit(LOCAL_LOOP_UPDATE, &flags);
  1752. }
  1753. if (test_bit(LOCAL_LOOP_UPDATE, &flags)) {
  1754. if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
  1755. rval = QLA_FUNCTION_FAILED;
  1756. else
  1757. rval = qla2x00_configure_local_loop(vha);
  1758. }
  1759. if (rval == QLA_SUCCESS && test_bit(RSCN_UPDATE, &flags)) {
  1760. if (LOOP_TRANSITION(vha))
  1761. rval = QLA_FUNCTION_FAILED;
  1762. else
  1763. rval = qla2x00_configure_fabric(vha);
  1764. }
  1765. if (rval == QLA_SUCCESS) {
  1766. if (atomic_read(&vha->loop_down_timer) ||
  1767. test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) {
  1768. rval = QLA_FUNCTION_FAILED;
  1769. } else {
  1770. atomic_set(&vha->loop_state, LOOP_READY);
  1771. DEBUG(printk("scsi(%ld): LOOP READY\n", vha->host_no));
  1772. }
  1773. }
  1774. if (rval) {
  1775. DEBUG2_3(printk("%s(%ld): *** FAILED ***\n",
  1776. __func__, vha->host_no));
  1777. } else {
  1778. DEBUG3(printk("%s: exiting normally\n", __func__));
  1779. }
  1780. /* Restore state if a resync event occurred during processing */
  1781. if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) {
  1782. if (test_bit(LOCAL_LOOP_UPDATE, &save_flags))
  1783. set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
  1784. if (test_bit(RSCN_UPDATE, &save_flags))
  1785. set_bit(RSCN_UPDATE, &vha->dpc_flags);
  1786. }
  1787. return (rval);
  1788. }
  1789. /*
  1790. * qla2x00_configure_local_loop
  1791. * Updates Fibre Channel Device Database with local loop devices.
  1792. *
  1793. * Input:
  1794. * ha = adapter block pointer.
  1795. *
  1796. * Returns:
  1797. * 0 = success.
  1798. */
  1799. static int
  1800. qla2x00_configure_local_loop(scsi_qla_host_t *vha)
  1801. {
  1802. int rval, rval2;
  1803. int found_devs;
  1804. int found;
  1805. fc_port_t *fcport, *new_fcport;
  1806. uint16_t index;
  1807. uint16_t entries;
  1808. char *id_iter;
  1809. uint16_t loop_id;
  1810. uint8_t domain, area, al_pa;
  1811. struct qla_hw_data *ha = vha->hw;
  1812. found_devs = 0;
  1813. new_fcport = NULL;
  1814. entries = MAX_FIBRE_DEVICES;
  1815. DEBUG3(printk("scsi(%ld): Getting FCAL position map\n", vha->host_no));
  1816. DEBUG3(qla2x00_get_fcal_position_map(vha, NULL));
  1817. /* Get list of logged in devices. */
  1818. memset(ha->gid_list, 0, GID_LIST_SIZE);
  1819. rval = qla2x00_get_id_list(vha, ha->gid_list, ha->gid_list_dma,
  1820. &entries);
  1821. if (rval != QLA_SUCCESS)
  1822. goto cleanup_allocation;
  1823. DEBUG3(printk("scsi(%ld): Entries in ID list (%d)\n",
  1824. ha->host_no, entries));
  1825. DEBUG3(qla2x00_dump_buffer((uint8_t *)ha->gid_list,
  1826. entries * sizeof(struct gid_list_info)));
  1827. /* Allocate temporary fcport for any new fcports discovered. */
  1828. new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
  1829. if (new_fcport == NULL) {
  1830. rval = QLA_MEMORY_ALLOC_FAILED;
  1831. goto cleanup_allocation;
  1832. }
  1833. new_fcport->flags &= ~FCF_FABRIC_DEVICE;
  1834. /*
  1835. * Mark local devices that were present with FCF_DEVICE_LOST for now.
  1836. */
  1837. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  1838. if (atomic_read(&fcport->state) == FCS_ONLINE &&
  1839. fcport->port_type != FCT_BROADCAST &&
  1840. (fcport->flags & FCF_FABRIC_DEVICE) == 0) {
  1841. DEBUG(printk("scsi(%ld): Marking port lost, "
  1842. "loop_id=0x%04x\n",
  1843. vha->host_no, fcport->loop_id));
  1844. atomic_set(&fcport->state, FCS_DEVICE_LOST);
  1845. fcport->flags &= ~FCF_FARP_DONE;
  1846. }
  1847. }
  1848. /* Add devices to port list. */
  1849. id_iter = (char *)ha->gid_list;
  1850. for (index = 0; index < entries; index++) {
  1851. domain = ((struct gid_list_info *)id_iter)->domain;
  1852. area = ((struct gid_list_info *)id_iter)->area;
  1853. al_pa = ((struct gid_list_info *)id_iter)->al_pa;
  1854. if (IS_QLA2100(ha) || IS_QLA2200(ha))
  1855. loop_id = (uint16_t)
  1856. ((struct gid_list_info *)id_iter)->loop_id_2100;
  1857. else
  1858. loop_id = le16_to_cpu(
  1859. ((struct gid_list_info *)id_iter)->loop_id);
  1860. id_iter += ha->gid_list_info_size;
  1861. /* Bypass reserved domain fields. */
  1862. if ((domain & 0xf0) == 0xf0)
  1863. continue;
  1864. /* Bypass if not same domain and area of adapter. */
  1865. if (area && domain &&
  1866. (area != vha->d_id.b.area || domain != vha->d_id.b.domain))
  1867. continue;
  1868. /* Bypass invalid local loop ID. */
  1869. if (loop_id > LAST_LOCAL_LOOP_ID)
  1870. continue;
  1871. /* Fill in member data. */
  1872. new_fcport->d_id.b.domain = domain;
  1873. new_fcport->d_id.b.area = area;
  1874. new_fcport->d_id.b.al_pa = al_pa;
  1875. new_fcport->loop_id = loop_id;
  1876. new_fcport->vp_idx = vha->vp_idx;
  1877. rval2 = qla2x00_get_port_database(vha, new_fcport, 0);
  1878. if (rval2 != QLA_SUCCESS) {
  1879. DEBUG2(printk("scsi(%ld): Failed to retrieve fcport "
  1880. "information -- get_port_database=%x, "
  1881. "loop_id=0x%04x\n",
  1882. vha->host_no, rval2, new_fcport->loop_id));
  1883. DEBUG2(printk("scsi(%ld): Scheduling resync...\n",
  1884. vha->host_no));
  1885. set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
  1886. continue;
  1887. }
  1888. /* Check for matching device in port list. */
  1889. found = 0;
  1890. fcport = NULL;
  1891. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  1892. if (memcmp(new_fcport->port_name, fcport->port_name,
  1893. WWN_SIZE))
  1894. continue;
  1895. fcport->flags &= ~(FCF_FABRIC_DEVICE |
  1896. FCF_PERSISTENT_BOUND);
  1897. fcport->loop_id = new_fcport->loop_id;
  1898. fcport->port_type = new_fcport->port_type;
  1899. fcport->d_id.b24 = new_fcport->d_id.b24;
  1900. memcpy(fcport->node_name, new_fcport->node_name,
  1901. WWN_SIZE);
  1902. found++;
  1903. break;
  1904. }
  1905. if (!found) {
  1906. /* New device, add to fcports list. */
  1907. new_fcport->flags &= ~FCF_PERSISTENT_BOUND;
  1908. if (vha->vp_idx) {
  1909. new_fcport->vha = vha;
  1910. new_fcport->vp_idx = vha->vp_idx;
  1911. }
  1912. list_add_tail(&new_fcport->list, &vha->vp_fcports);
  1913. /* Allocate a new replacement fcport. */
  1914. fcport = new_fcport;
  1915. new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
  1916. if (new_fcport == NULL) {
  1917. rval = QLA_MEMORY_ALLOC_FAILED;
  1918. goto cleanup_allocation;
  1919. }
  1920. new_fcport->flags &= ~FCF_FABRIC_DEVICE;
  1921. }
  1922. /* Base iIDMA settings on HBA port speed. */
  1923. fcport->fp_speed = ha->link_data_rate;
  1924. qla2x00_update_fcport(vha, fcport);
  1925. found_devs++;
  1926. }
  1927. cleanup_allocation:
  1928. kfree(new_fcport);
  1929. if (rval != QLA_SUCCESS) {
  1930. DEBUG2(printk("scsi(%ld): Configure local loop error exit: "
  1931. "rval=%x\n", vha->host_no, rval));
  1932. }
  1933. if (found_devs) {
  1934. vha->device_flags |= DFLG_LOCAL_DEVICES;
  1935. vha->device_flags &= ~DFLG_RETRY_LOCAL_DEVICES;
  1936. }
  1937. return (rval);
  1938. }
  1939. static void
  1940. qla2x00_iidma_fcport(scsi_qla_host_t *vha, fc_port_t *fcport)
  1941. {
  1942. #define LS_UNKNOWN 2
  1943. static char *link_speeds[5] = { "1", "2", "?", "4", "8" };
  1944. int rval;
  1945. uint16_t mb[6];
  1946. struct qla_hw_data *ha = vha->hw;
  1947. if (!IS_IIDMA_CAPABLE(ha))
  1948. return;
  1949. if (fcport->fp_speed == PORT_SPEED_UNKNOWN ||
  1950. fcport->fp_speed > ha->link_data_rate)
  1951. return;
  1952. rval = qla2x00_set_idma_speed(vha, fcport->loop_id, fcport->fp_speed,
  1953. mb);
  1954. if (rval != QLA_SUCCESS) {
  1955. DEBUG2(printk("scsi(%ld): Unable to adjust iIDMA "
  1956. "%02x%02x%02x%02x%02x%02x%02x%02x -- %04x %x %04x %04x.\n",
  1957. vha->host_no, fcport->port_name[0], fcport->port_name[1],
  1958. fcport->port_name[2], fcport->port_name[3],
  1959. fcport->port_name[4], fcport->port_name[5],
  1960. fcport->port_name[6], fcport->port_name[7], rval,
  1961. fcport->fp_speed, mb[0], mb[1]));
  1962. } else {
  1963. DEBUG2(qla_printk(KERN_INFO, ha,
  1964. "iIDMA adjusted to %s GB/s on "
  1965. "%02x%02x%02x%02x%02x%02x%02x%02x.\n",
  1966. link_speeds[fcport->fp_speed], fcport->port_name[0],
  1967. fcport->port_name[1], fcport->port_name[2],
  1968. fcport->port_name[3], fcport->port_name[4],
  1969. fcport->port_name[5], fcport->port_name[6],
  1970. fcport->port_name[7]));
  1971. }
  1972. }
  1973. static void
  1974. qla2x00_reg_remote_port(scsi_qla_host_t *vha, fc_port_t *fcport)
  1975. {
  1976. struct fc_rport_identifiers rport_ids;
  1977. struct fc_rport *rport;
  1978. struct qla_hw_data *ha = vha->hw;
  1979. if (fcport->drport)
  1980. qla2x00_rport_del(fcport);
  1981. rport_ids.node_name = wwn_to_u64(fcport->node_name);
  1982. rport_ids.port_name = wwn_to_u64(fcport->port_name);
  1983. rport_ids.port_id = fcport->d_id.b.domain << 16 |
  1984. fcport->d_id.b.area << 8 | fcport->d_id.b.al_pa;
  1985. rport_ids.roles = FC_RPORT_ROLE_UNKNOWN;
  1986. fcport->rport = rport = fc_remote_port_add(vha->host, 0, &rport_ids);
  1987. if (!rport) {
  1988. qla_printk(KERN_WARNING, ha,
  1989. "Unable to allocate fc remote port!\n");
  1990. return;
  1991. }
  1992. spin_lock_irq(fcport->vha->host->host_lock);
  1993. *((fc_port_t **)rport->dd_data) = fcport;
  1994. spin_unlock_irq(fcport->vha->host->host_lock);
  1995. rport->supported_classes = fcport->supported_classes;
  1996. rport_ids.roles = FC_RPORT_ROLE_UNKNOWN;
  1997. if (fcport->port_type == FCT_INITIATOR)
  1998. rport_ids.roles |= FC_RPORT_ROLE_FCP_INITIATOR;
  1999. if (fcport->port_type == FCT_TARGET)
  2000. rport_ids.roles |= FC_RPORT_ROLE_FCP_TARGET;
  2001. fc_remote_port_rolechg(rport, rport_ids.roles);
  2002. }
  2003. /*
  2004. * qla2x00_update_fcport
  2005. * Updates device on list.
  2006. *
  2007. * Input:
  2008. * ha = adapter block pointer.
  2009. * fcport = port structure pointer.
  2010. *
  2011. * Return:
  2012. * 0 - Success
  2013. * BIT_0 - error
  2014. *
  2015. * Context:
  2016. * Kernel context.
  2017. */
  2018. void
  2019. qla2x00_update_fcport(scsi_qla_host_t *vha, fc_port_t *fcport)
  2020. {
  2021. struct qla_hw_data *ha = vha->hw;
  2022. fcport->vha = vha;
  2023. fcport->login_retry = 0;
  2024. fcport->port_login_retry_count = ha->port_down_retry_count *
  2025. PORT_RETRY_TIME;
  2026. atomic_set(&fcport->port_down_timer, ha->port_down_retry_count *
  2027. PORT_RETRY_TIME);
  2028. fcport->flags &= ~FCF_LOGIN_NEEDED;
  2029. qla2x00_iidma_fcport(vha, fcport);
  2030. atomic_set(&fcport->state, FCS_ONLINE);
  2031. qla2x00_reg_remote_port(vha, fcport);
  2032. }
  2033. /*
  2034. * qla2x00_configure_fabric
  2035. * Setup SNS devices with loop ID's.
  2036. *
  2037. * Input:
  2038. * ha = adapter block pointer.
  2039. *
  2040. * Returns:
  2041. * 0 = success.
  2042. * BIT_0 = error
  2043. */
  2044. static int
  2045. qla2x00_configure_fabric(scsi_qla_host_t *vha)
  2046. {
  2047. int rval, rval2;
  2048. fc_port_t *fcport, *fcptemp;
  2049. uint16_t next_loopid;
  2050. uint16_t mb[MAILBOX_REGISTER_COUNT];
  2051. uint16_t loop_id;
  2052. LIST_HEAD(new_fcports);
  2053. struct qla_hw_data *ha = vha->hw;
  2054. struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
  2055. /* If FL port exists, then SNS is present */
  2056. if (IS_FWI2_CAPABLE(ha))
  2057. loop_id = NPH_F_PORT;
  2058. else
  2059. loop_id = SNS_FL_PORT;
  2060. rval = qla2x00_get_port_name(vha, loop_id, vha->fabric_node_name, 1);
  2061. if (rval != QLA_SUCCESS) {
  2062. DEBUG2(printk("scsi(%ld): MBC_GET_PORT_NAME Failed, No FL "
  2063. "Port\n", vha->host_no));
  2064. vha->device_flags &= ~SWITCH_FOUND;
  2065. return (QLA_SUCCESS);
  2066. }
  2067. vha->device_flags |= SWITCH_FOUND;
  2068. /* Mark devices that need re-synchronization. */
  2069. rval2 = qla2x00_device_resync(vha);
  2070. if (rval2 == QLA_RSCNS_HANDLED) {
  2071. /* No point doing the scan, just continue. */
  2072. return (QLA_SUCCESS);
  2073. }
  2074. do {
  2075. /* FDMI support. */
  2076. if (ql2xfdmienable &&
  2077. test_and_clear_bit(REGISTER_FDMI_NEEDED, &vha->dpc_flags))
  2078. qla2x00_fdmi_register(vha);
  2079. /* Ensure we are logged into the SNS. */
  2080. if (IS_FWI2_CAPABLE(ha))
  2081. loop_id = NPH_SNS;
  2082. else
  2083. loop_id = SIMPLE_NAME_SERVER;
  2084. ha->isp_ops->fabric_login(vha, loop_id, 0xff, 0xff,
  2085. 0xfc, mb, BIT_1 | BIT_0);
  2086. if (mb[0] != MBS_COMMAND_COMPLETE) {
  2087. DEBUG2(qla_printk(KERN_INFO, ha,
  2088. "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x "
  2089. "mb[2]=%x mb[6]=%x mb[7]=%x\n", loop_id,
  2090. mb[0], mb[1], mb[2], mb[6], mb[7]));
  2091. return (QLA_SUCCESS);
  2092. }
  2093. if (test_and_clear_bit(REGISTER_FC4_NEEDED, &vha->dpc_flags)) {
  2094. if (qla2x00_rft_id(vha)) {
  2095. /* EMPTY */
  2096. DEBUG2(printk("scsi(%ld): Register FC-4 "
  2097. "TYPE failed.\n", vha->host_no));
  2098. }
  2099. if (qla2x00_rff_id(vha)) {
  2100. /* EMPTY */
  2101. DEBUG2(printk("scsi(%ld): Register FC-4 "
  2102. "Features failed.\n", vha->host_no));
  2103. }
  2104. if (qla2x00_rnn_id(vha)) {
  2105. /* EMPTY */
  2106. DEBUG2(printk("scsi(%ld): Register Node Name "
  2107. "failed.\n", vha->host_no));
  2108. } else if (qla2x00_rsnn_nn(vha)) {
  2109. /* EMPTY */
  2110. DEBUG2(printk("scsi(%ld): Register Symbolic "
  2111. "Node Name failed.\n", vha->host_no));
  2112. }
  2113. }
  2114. rval = qla2x00_find_all_fabric_devs(vha, &new_fcports);
  2115. if (rval != QLA_SUCCESS)
  2116. break;
  2117. /*
  2118. * Logout all previous fabric devices marked lost, except
  2119. * tape devices.
  2120. */
  2121. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  2122. if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
  2123. break;
  2124. if ((fcport->flags & FCF_FABRIC_DEVICE) == 0)
  2125. continue;
  2126. if (atomic_read(&fcport->state) == FCS_DEVICE_LOST) {
  2127. qla2x00_mark_device_lost(vha, fcport,
  2128. ql2xplogiabsentdevice, 0);
  2129. if (fcport->loop_id != FC_NO_LOOP_ID &&
  2130. (fcport->flags & FCF_TAPE_PRESENT) == 0 &&
  2131. fcport->port_type != FCT_INITIATOR &&
  2132. fcport->port_type != FCT_BROADCAST) {
  2133. ha->isp_ops->fabric_logout(vha,
  2134. fcport->loop_id,
  2135. fcport->d_id.b.domain,
  2136. fcport->d_id.b.area,
  2137. fcport->d_id.b.al_pa);
  2138. fcport->loop_id = FC_NO_LOOP_ID;
  2139. }
  2140. }
  2141. }
  2142. /* Starting free loop ID. */
  2143. next_loopid = ha->min_external_loopid;
  2144. /*
  2145. * Scan through our port list and login entries that need to be
  2146. * logged in.
  2147. */
  2148. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  2149. if (atomic_read(&vha->loop_down_timer) ||
  2150. test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
  2151. break;
  2152. if ((fcport->flags & FCF_FABRIC_DEVICE) == 0 ||
  2153. (fcport->flags & FCF_LOGIN_NEEDED) == 0)
  2154. continue;
  2155. if (fcport->loop_id == FC_NO_LOOP_ID) {
  2156. fcport->loop_id = next_loopid;
  2157. rval = qla2x00_find_new_loop_id(
  2158. base_vha, fcport);
  2159. if (rval != QLA_SUCCESS) {
  2160. /* Ran out of IDs to use */
  2161. break;
  2162. }
  2163. }
  2164. /* Login and update database */
  2165. qla2x00_fabric_dev_login(vha, fcport, &next_loopid);
  2166. }
  2167. /* Exit if out of loop IDs. */
  2168. if (rval != QLA_SUCCESS) {
  2169. break;
  2170. }
  2171. /*
  2172. * Login and add the new devices to our port list.
  2173. */
  2174. list_for_each_entry_safe(fcport, fcptemp, &new_fcports, list) {
  2175. if (atomic_read(&vha->loop_down_timer) ||
  2176. test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
  2177. break;
  2178. /* Find a new loop ID to use. */
  2179. fcport->loop_id = next_loopid;
  2180. rval = qla2x00_find_new_loop_id(base_vha, fcport);
  2181. if (rval != QLA_SUCCESS) {
  2182. /* Ran out of IDs to use */
  2183. break;
  2184. }
  2185. /* Login and update database */
  2186. qla2x00_fabric_dev_login(vha, fcport, &next_loopid);
  2187. if (vha->vp_idx) {
  2188. fcport->vha = vha;
  2189. fcport->vp_idx = vha->vp_idx;
  2190. }
  2191. list_move_tail(&fcport->list, &vha->vp_fcports);
  2192. }
  2193. } while (0);
  2194. /* Free all new device structures not processed. */
  2195. list_for_each_entry_safe(fcport, fcptemp, &new_fcports, list) {
  2196. list_del(&fcport->list);
  2197. kfree(fcport);
  2198. }
  2199. if (rval) {
  2200. DEBUG2(printk("scsi(%ld): Configure fabric error exit: "
  2201. "rval=%d\n", vha->host_no, rval));
  2202. }
  2203. return (rval);
  2204. }
  2205. /*
  2206. * qla2x00_find_all_fabric_devs
  2207. *
  2208. * Input:
  2209. * ha = adapter block pointer.
  2210. * dev = database device entry pointer.
  2211. *
  2212. * Returns:
  2213. * 0 = success.
  2214. *
  2215. * Context:
  2216. * Kernel context.
  2217. */
  2218. static int
  2219. qla2x00_find_all_fabric_devs(scsi_qla_host_t *vha,
  2220. struct list_head *new_fcports)
  2221. {
  2222. int rval;
  2223. uint16_t loop_id;
  2224. fc_port_t *fcport, *new_fcport, *fcptemp;
  2225. int found;
  2226. sw_info_t *swl;
  2227. int swl_idx;
  2228. int first_dev, last_dev;
  2229. port_id_t wrap, nxt_d_id;
  2230. struct qla_hw_data *ha = vha->hw;
  2231. struct scsi_qla_host *vp, *base_vha = pci_get_drvdata(ha->pdev);
  2232. rval = QLA_SUCCESS;
  2233. /* Try GID_PT to get device list, else GAN. */
  2234. swl = kcalloc(MAX_FIBRE_DEVICES, sizeof(sw_info_t), GFP_KERNEL);
  2235. if (!swl) {
  2236. /*EMPTY*/
  2237. DEBUG2(printk("scsi(%ld): GID_PT allocations failed, fallback "
  2238. "on GA_NXT\n", vha->host_no));
  2239. } else {
  2240. if (qla2x00_gid_pt(vha, swl) != QLA_SUCCESS) {
  2241. kfree(swl);
  2242. swl = NULL;
  2243. } else if (qla2x00_gpn_id(vha, swl) != QLA_SUCCESS) {
  2244. kfree(swl);
  2245. swl = NULL;
  2246. } else if (qla2x00_gnn_id(vha, swl) != QLA_SUCCESS) {
  2247. kfree(swl);
  2248. swl = NULL;
  2249. } else if (ql2xiidmaenable &&
  2250. qla2x00_gfpn_id(vha, swl) == QLA_SUCCESS) {
  2251. qla2x00_gpsc(vha, swl);
  2252. }
  2253. }
  2254. swl_idx = 0;
  2255. /* Allocate temporary fcport for any new fcports discovered. */
  2256. new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
  2257. if (new_fcport == NULL) {
  2258. kfree(swl);
  2259. return (QLA_MEMORY_ALLOC_FAILED);
  2260. }
  2261. new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED);
  2262. /* Set start port ID scan at adapter ID. */
  2263. first_dev = 1;
  2264. last_dev = 0;
  2265. /* Starting free loop ID. */
  2266. loop_id = ha->min_external_loopid;
  2267. for (; loop_id <= ha->max_loop_id; loop_id++) {
  2268. if (qla2x00_is_reserved_id(vha, loop_id))
  2269. continue;
  2270. if (atomic_read(&vha->loop_down_timer) || LOOP_TRANSITION(vha))
  2271. break;
  2272. if (swl != NULL) {
  2273. if (last_dev) {
  2274. wrap.b24 = new_fcport->d_id.b24;
  2275. } else {
  2276. new_fcport->d_id.b24 = swl[swl_idx].d_id.b24;
  2277. memcpy(new_fcport->node_name,
  2278. swl[swl_idx].node_name, WWN_SIZE);
  2279. memcpy(new_fcport->port_name,
  2280. swl[swl_idx].port_name, WWN_SIZE);
  2281. memcpy(new_fcport->fabric_port_name,
  2282. swl[swl_idx].fabric_port_name, WWN_SIZE);
  2283. new_fcport->fp_speed = swl[swl_idx].fp_speed;
  2284. if (swl[swl_idx].d_id.b.rsvd_1 != 0) {
  2285. last_dev = 1;
  2286. }
  2287. swl_idx++;
  2288. }
  2289. } else {
  2290. /* Send GA_NXT to the switch */
  2291. rval = qla2x00_ga_nxt(vha, new_fcport);
  2292. if (rval != QLA_SUCCESS) {
  2293. qla_printk(KERN_WARNING, ha,
  2294. "SNS scan failed -- assuming zero-entry "
  2295. "result...\n");
  2296. list_for_each_entry_safe(fcport, fcptemp,
  2297. new_fcports, list) {
  2298. list_del(&fcport->list);
  2299. kfree(fcport);
  2300. }
  2301. rval = QLA_SUCCESS;
  2302. break;
  2303. }
  2304. }
  2305. /* If wrap on switch device list, exit. */
  2306. if (first_dev) {
  2307. wrap.b24 = new_fcport->d_id.b24;
  2308. first_dev = 0;
  2309. } else if (new_fcport->d_id.b24 == wrap.b24) {
  2310. DEBUG2(printk("scsi(%ld): device wrap (%02x%02x%02x)\n",
  2311. vha->host_no, new_fcport->d_id.b.domain,
  2312. new_fcport->d_id.b.area, new_fcport->d_id.b.al_pa));
  2313. break;
  2314. }
  2315. /* Bypass if same physical adapter. */
  2316. if (new_fcport->d_id.b24 == base_vha->d_id.b24)
  2317. continue;
  2318. /* Bypass virtual ports of the same host. */
  2319. found = 0;
  2320. if (ha->num_vhosts) {
  2321. list_for_each_entry(vp, &ha->vp_list, list) {
  2322. if (new_fcport->d_id.b24 == vp->d_id.b24) {
  2323. found = 1;
  2324. break;
  2325. }
  2326. }
  2327. if (found)
  2328. continue;
  2329. }
  2330. /* Bypass if same domain and area of adapter. */
  2331. if (((new_fcport->d_id.b24 & 0xffff00) ==
  2332. (vha->d_id.b24 & 0xffff00)) && ha->current_topology ==
  2333. ISP_CFG_FL)
  2334. continue;
  2335. /* Bypass reserved domain fields. */
  2336. if ((new_fcport->d_id.b.domain & 0xf0) == 0xf0)
  2337. continue;
  2338. /* Locate matching device in database. */
  2339. found = 0;
  2340. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  2341. if (memcmp(new_fcport->port_name, fcport->port_name,
  2342. WWN_SIZE))
  2343. continue;
  2344. found++;
  2345. /* Update port state. */
  2346. memcpy(fcport->fabric_port_name,
  2347. new_fcport->fabric_port_name, WWN_SIZE);
  2348. fcport->fp_speed = new_fcport->fp_speed;
  2349. /*
  2350. * If address the same and state FCS_ONLINE, nothing
  2351. * changed.
  2352. */
  2353. if (fcport->d_id.b24 == new_fcport->d_id.b24 &&
  2354. atomic_read(&fcport->state) == FCS_ONLINE) {
  2355. break;
  2356. }
  2357. /*
  2358. * If device was not a fabric device before.
  2359. */
  2360. if ((fcport->flags & FCF_FABRIC_DEVICE) == 0) {
  2361. fcport->d_id.b24 = new_fcport->d_id.b24;
  2362. fcport->loop_id = FC_NO_LOOP_ID;
  2363. fcport->flags |= (FCF_FABRIC_DEVICE |
  2364. FCF_LOGIN_NEEDED);
  2365. fcport->flags &= ~FCF_PERSISTENT_BOUND;
  2366. break;
  2367. }
  2368. /*
  2369. * Port ID changed or device was marked to be updated;
  2370. * Log it out if still logged in and mark it for
  2371. * relogin later.
  2372. */
  2373. fcport->d_id.b24 = new_fcport->d_id.b24;
  2374. fcport->flags |= FCF_LOGIN_NEEDED;
  2375. if (fcport->loop_id != FC_NO_LOOP_ID &&
  2376. (fcport->flags & FCF_TAPE_PRESENT) == 0 &&
  2377. fcport->port_type != FCT_INITIATOR &&
  2378. fcport->port_type != FCT_BROADCAST) {
  2379. ha->isp_ops->fabric_logout(vha, fcport->loop_id,
  2380. fcport->d_id.b.domain, fcport->d_id.b.area,
  2381. fcport->d_id.b.al_pa);
  2382. fcport->loop_id = FC_NO_LOOP_ID;
  2383. }
  2384. break;
  2385. }
  2386. if (found)
  2387. continue;
  2388. /* If device was not in our fcports list, then add it. */
  2389. list_add_tail(&new_fcport->list, new_fcports);
  2390. /* Allocate a new replacement fcport. */
  2391. nxt_d_id.b24 = new_fcport->d_id.b24;
  2392. new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
  2393. if (new_fcport == NULL) {
  2394. kfree(swl);
  2395. return (QLA_MEMORY_ALLOC_FAILED);
  2396. }
  2397. new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED);
  2398. new_fcport->d_id.b24 = nxt_d_id.b24;
  2399. }
  2400. kfree(swl);
  2401. kfree(new_fcport);
  2402. if (!list_empty(new_fcports))
  2403. vha->device_flags |= DFLG_FABRIC_DEVICES;
  2404. return (rval);
  2405. }
  2406. /*
  2407. * qla2x00_find_new_loop_id
  2408. * Scan through our port list and find a new usable loop ID.
  2409. *
  2410. * Input:
  2411. * ha: adapter state pointer.
  2412. * dev: port structure pointer.
  2413. *
  2414. * Returns:
  2415. * qla2x00 local function return status code.
  2416. *
  2417. * Context:
  2418. * Kernel context.
  2419. */
  2420. static int
  2421. qla2x00_find_new_loop_id(scsi_qla_host_t *vha, fc_port_t *dev)
  2422. {
  2423. int rval;
  2424. int found;
  2425. fc_port_t *fcport;
  2426. uint16_t first_loop_id;
  2427. struct qla_hw_data *ha = vha->hw;
  2428. struct scsi_qla_host *vp;
  2429. rval = QLA_SUCCESS;
  2430. /* Save starting loop ID. */
  2431. first_loop_id = dev->loop_id;
  2432. for (;;) {
  2433. /* Skip loop ID if already used by adapter. */
  2434. if (dev->loop_id == vha->loop_id)
  2435. dev->loop_id++;
  2436. /* Skip reserved loop IDs. */
  2437. while (qla2x00_is_reserved_id(vha, dev->loop_id))
  2438. dev->loop_id++;
  2439. /* Reset loop ID if passed the end. */
  2440. if (dev->loop_id > ha->max_loop_id) {
  2441. /* first loop ID. */
  2442. dev->loop_id = ha->min_external_loopid;
  2443. }
  2444. /* Check for loop ID being already in use. */
  2445. found = 0;
  2446. fcport = NULL;
  2447. list_for_each_entry(vp, &ha->vp_list, list) {
  2448. list_for_each_entry(fcport, &vp->vp_fcports, list) {
  2449. if (fcport->loop_id == dev->loop_id &&
  2450. fcport != dev) {
  2451. /* ID possibly in use */
  2452. found++;
  2453. break;
  2454. }
  2455. }
  2456. if (found)
  2457. break;
  2458. }
  2459. /* If not in use then it is free to use. */
  2460. if (!found) {
  2461. break;
  2462. }
  2463. /* ID in use. Try next value. */
  2464. dev->loop_id++;
  2465. /* If wrap around. No free ID to use. */
  2466. if (dev->loop_id == first_loop_id) {
  2467. dev->loop_id = FC_NO_LOOP_ID;
  2468. rval = QLA_FUNCTION_FAILED;
  2469. break;
  2470. }
  2471. }
  2472. return (rval);
  2473. }
  2474. /*
  2475. * qla2x00_device_resync
  2476. * Marks devices in the database that needs resynchronization.
  2477. *
  2478. * Input:
  2479. * ha = adapter block pointer.
  2480. *
  2481. * Context:
  2482. * Kernel context.
  2483. */
  2484. static int
  2485. qla2x00_device_resync(scsi_qla_host_t *vha)
  2486. {
  2487. int rval;
  2488. uint32_t mask;
  2489. fc_port_t *fcport;
  2490. uint32_t rscn_entry;
  2491. uint8_t rscn_out_iter;
  2492. uint8_t format;
  2493. port_id_t d_id;
  2494. rval = QLA_RSCNS_HANDLED;
  2495. while (vha->rscn_out_ptr != vha->rscn_in_ptr ||
  2496. vha->flags.rscn_queue_overflow) {
  2497. rscn_entry = vha->rscn_queue[vha->rscn_out_ptr];
  2498. format = MSB(MSW(rscn_entry));
  2499. d_id.b.domain = LSB(MSW(rscn_entry));
  2500. d_id.b.area = MSB(LSW(rscn_entry));
  2501. d_id.b.al_pa = LSB(LSW(rscn_entry));
  2502. DEBUG(printk("scsi(%ld): RSCN queue entry[%d] = "
  2503. "[%02x/%02x%02x%02x].\n",
  2504. vha->host_no, vha->rscn_out_ptr, format, d_id.b.domain,
  2505. d_id.b.area, d_id.b.al_pa));
  2506. vha->rscn_out_ptr++;
  2507. if (vha->rscn_out_ptr == MAX_RSCN_COUNT)
  2508. vha->rscn_out_ptr = 0;
  2509. /* Skip duplicate entries. */
  2510. for (rscn_out_iter = vha->rscn_out_ptr;
  2511. !vha->flags.rscn_queue_overflow &&
  2512. rscn_out_iter != vha->rscn_in_ptr;
  2513. rscn_out_iter = (rscn_out_iter ==
  2514. (MAX_RSCN_COUNT - 1)) ? 0: rscn_out_iter + 1) {
  2515. if (rscn_entry != vha->rscn_queue[rscn_out_iter])
  2516. break;
  2517. DEBUG(printk("scsi(%ld): Skipping duplicate RSCN queue "
  2518. "entry found at [%d].\n", vha->host_no,
  2519. rscn_out_iter));
  2520. vha->rscn_out_ptr = rscn_out_iter;
  2521. }
  2522. /* Queue overflow, set switch default case. */
  2523. if (vha->flags.rscn_queue_overflow) {
  2524. DEBUG(printk("scsi(%ld): device_resync: rscn "
  2525. "overflow.\n", vha->host_no));
  2526. format = 3;
  2527. vha->flags.rscn_queue_overflow = 0;
  2528. }
  2529. switch (format) {
  2530. case 0:
  2531. mask = 0xffffff;
  2532. break;
  2533. case 1:
  2534. mask = 0xffff00;
  2535. break;
  2536. case 2:
  2537. mask = 0xff0000;
  2538. break;
  2539. default:
  2540. mask = 0x0;
  2541. d_id.b24 = 0;
  2542. vha->rscn_out_ptr = vha->rscn_in_ptr;
  2543. break;
  2544. }
  2545. rval = QLA_SUCCESS;
  2546. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  2547. if ((fcport->flags & FCF_FABRIC_DEVICE) == 0 ||
  2548. (fcport->d_id.b24 & mask) != d_id.b24 ||
  2549. fcport->port_type == FCT_BROADCAST)
  2550. continue;
  2551. if (atomic_read(&fcport->state) == FCS_ONLINE) {
  2552. if (format != 3 ||
  2553. fcport->port_type != FCT_INITIATOR) {
  2554. qla2x00_mark_device_lost(vha, fcport,
  2555. 0, 0);
  2556. }
  2557. }
  2558. fcport->flags &= ~FCF_FARP_DONE;
  2559. }
  2560. }
  2561. return (rval);
  2562. }
  2563. /*
  2564. * qla2x00_fabric_dev_login
  2565. * Login fabric target device and update FC port database.
  2566. *
  2567. * Input:
  2568. * ha: adapter state pointer.
  2569. * fcport: port structure list pointer.
  2570. * next_loopid: contains value of a new loop ID that can be used
  2571. * by the next login attempt.
  2572. *
  2573. * Returns:
  2574. * qla2x00 local function return status code.
  2575. *
  2576. * Context:
  2577. * Kernel context.
  2578. */
  2579. static int
  2580. qla2x00_fabric_dev_login(scsi_qla_host_t *vha, fc_port_t *fcport,
  2581. uint16_t *next_loopid)
  2582. {
  2583. int rval;
  2584. int retry;
  2585. uint8_t opts;
  2586. struct qla_hw_data *ha = vha->hw;
  2587. rval = QLA_SUCCESS;
  2588. retry = 0;
  2589. rval = qla2x00_fabric_login(vha, fcport, next_loopid);
  2590. if (rval == QLA_SUCCESS) {
  2591. /* Send an ADISC to tape devices.*/
  2592. opts = 0;
  2593. if (fcport->flags & FCF_TAPE_PRESENT)
  2594. opts |= BIT_1;
  2595. rval = qla2x00_get_port_database(vha, fcport, opts);
  2596. if (rval != QLA_SUCCESS) {
  2597. ha->isp_ops->fabric_logout(vha, fcport->loop_id,
  2598. fcport->d_id.b.domain, fcport->d_id.b.area,
  2599. fcport->d_id.b.al_pa);
  2600. qla2x00_mark_device_lost(vha, fcport, 1, 0);
  2601. } else {
  2602. qla2x00_update_fcport(vha, fcport);
  2603. }
  2604. }
  2605. return (rval);
  2606. }
  2607. /*
  2608. * qla2x00_fabric_login
  2609. * Issue fabric login command.
  2610. *
  2611. * Input:
  2612. * ha = adapter block pointer.
  2613. * device = pointer to FC device type structure.
  2614. *
  2615. * Returns:
  2616. * 0 - Login successfully
  2617. * 1 - Login failed
  2618. * 2 - Initiator device
  2619. * 3 - Fatal error
  2620. */
  2621. int
  2622. qla2x00_fabric_login(scsi_qla_host_t *vha, fc_port_t *fcport,
  2623. uint16_t *next_loopid)
  2624. {
  2625. int rval;
  2626. int retry;
  2627. uint16_t tmp_loopid;
  2628. uint16_t mb[MAILBOX_REGISTER_COUNT];
  2629. struct qla_hw_data *ha = vha->hw;
  2630. retry = 0;
  2631. tmp_loopid = 0;
  2632. for (;;) {
  2633. DEBUG(printk("scsi(%ld): Trying Fabric Login w/loop id 0x%04x "
  2634. "for port %02x%02x%02x.\n",
  2635. vha->host_no, fcport->loop_id, fcport->d_id.b.domain,
  2636. fcport->d_id.b.area, fcport->d_id.b.al_pa));
  2637. /* Login fcport on switch. */
  2638. ha->isp_ops->fabric_login(vha, fcport->loop_id,
  2639. fcport->d_id.b.domain, fcport->d_id.b.area,
  2640. fcport->d_id.b.al_pa, mb, BIT_0);
  2641. if (mb[0] == MBS_PORT_ID_USED) {
  2642. /*
  2643. * Device has another loop ID. The firmware team
  2644. * recommends the driver perform an implicit login with
  2645. * the specified ID again. The ID we just used is save
  2646. * here so we return with an ID that can be tried by
  2647. * the next login.
  2648. */
  2649. retry++;
  2650. tmp_loopid = fcport->loop_id;
  2651. fcport->loop_id = mb[1];
  2652. DEBUG(printk("Fabric Login: port in use - next "
  2653. "loop id=0x%04x, port Id=%02x%02x%02x.\n",
  2654. fcport->loop_id, fcport->d_id.b.domain,
  2655. fcport->d_id.b.area, fcport->d_id.b.al_pa));
  2656. } else if (mb[0] == MBS_COMMAND_COMPLETE) {
  2657. /*
  2658. * Login succeeded.
  2659. */
  2660. if (retry) {
  2661. /* A retry occurred before. */
  2662. *next_loopid = tmp_loopid;
  2663. } else {
  2664. /*
  2665. * No retry occurred before. Just increment the
  2666. * ID value for next login.
  2667. */
  2668. *next_loopid = (fcport->loop_id + 1);
  2669. }
  2670. if (mb[1] & BIT_0) {
  2671. fcport->port_type = FCT_INITIATOR;
  2672. } else {
  2673. fcport->port_type = FCT_TARGET;
  2674. if (mb[1] & BIT_1) {
  2675. fcport->flags |= FCF_TAPE_PRESENT;
  2676. }
  2677. }
  2678. if (mb[10] & BIT_0)
  2679. fcport->supported_classes |= FC_COS_CLASS2;
  2680. if (mb[10] & BIT_1)
  2681. fcport->supported_classes |= FC_COS_CLASS3;
  2682. rval = QLA_SUCCESS;
  2683. break;
  2684. } else if (mb[0] == MBS_LOOP_ID_USED) {
  2685. /*
  2686. * Loop ID already used, try next loop ID.
  2687. */
  2688. fcport->loop_id++;
  2689. rval = qla2x00_find_new_loop_id(vha, fcport);
  2690. if (rval != QLA_SUCCESS) {
  2691. /* Ran out of loop IDs to use */
  2692. break;
  2693. }
  2694. } else if (mb[0] == MBS_COMMAND_ERROR) {
  2695. /*
  2696. * Firmware possibly timed out during login. If NO
  2697. * retries are left to do then the device is declared
  2698. * dead.
  2699. */
  2700. *next_loopid = fcport->loop_id;
  2701. ha->isp_ops->fabric_logout(vha, fcport->loop_id,
  2702. fcport->d_id.b.domain, fcport->d_id.b.area,
  2703. fcport->d_id.b.al_pa);
  2704. qla2x00_mark_device_lost(vha, fcport, 1, 0);
  2705. rval = 1;
  2706. break;
  2707. } else {
  2708. /*
  2709. * unrecoverable / not handled error
  2710. */
  2711. DEBUG2(printk("%s(%ld): failed=%x port_id=%02x%02x%02x "
  2712. "loop_id=%x jiffies=%lx.\n",
  2713. __func__, vha->host_no, mb[0],
  2714. fcport->d_id.b.domain, fcport->d_id.b.area,
  2715. fcport->d_id.b.al_pa, fcport->loop_id, jiffies));
  2716. *next_loopid = fcport->loop_id;
  2717. ha->isp_ops->fabric_logout(vha, fcport->loop_id,
  2718. fcport->d_id.b.domain, fcport->d_id.b.area,
  2719. fcport->d_id.b.al_pa);
  2720. fcport->loop_id = FC_NO_LOOP_ID;
  2721. fcport->login_retry = 0;
  2722. rval = 3;
  2723. break;
  2724. }
  2725. }
  2726. return (rval);
  2727. }
  2728. /*
  2729. * qla2x00_local_device_login
  2730. * Issue local device login command.
  2731. *
  2732. * Input:
  2733. * ha = adapter block pointer.
  2734. * loop_id = loop id of device to login to.
  2735. *
  2736. * Returns (Where's the #define!!!!):
  2737. * 0 - Login successfully
  2738. * 1 - Login failed
  2739. * 3 - Fatal error
  2740. */
  2741. int
  2742. qla2x00_local_device_login(scsi_qla_host_t *vha, fc_port_t *fcport)
  2743. {
  2744. int rval;
  2745. uint16_t mb[MAILBOX_REGISTER_COUNT];
  2746. memset(mb, 0, sizeof(mb));
  2747. rval = qla2x00_login_local_device(vha, fcport, mb, BIT_0);
  2748. if (rval == QLA_SUCCESS) {
  2749. /* Interrogate mailbox registers for any errors */
  2750. if (mb[0] == MBS_COMMAND_ERROR)
  2751. rval = 1;
  2752. else if (mb[0] == MBS_COMMAND_PARAMETER_ERROR)
  2753. /* device not in PCB table */
  2754. rval = 3;
  2755. }
  2756. return (rval);
  2757. }
  2758. /*
  2759. * qla2x00_loop_resync
  2760. * Resync with fibre channel devices.
  2761. *
  2762. * Input:
  2763. * ha = adapter block pointer.
  2764. *
  2765. * Returns:
  2766. * 0 = success
  2767. */
  2768. int
  2769. qla2x00_loop_resync(scsi_qla_host_t *vha)
  2770. {
  2771. int rval = QLA_SUCCESS;
  2772. uint32_t wait_time;
  2773. struct qla_hw_data *ha = vha->hw;
  2774. struct req_que *req = ha->req_q_map[vha->req_ques[0]];
  2775. struct rsp_que *rsp = req->rsp;
  2776. atomic_set(&vha->loop_state, LOOP_UPDATE);
  2777. clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
  2778. if (vha->flags.online) {
  2779. if (!(rval = qla2x00_fw_ready(vha))) {
  2780. /* Wait at most MAX_TARGET RSCNs for a stable link. */
  2781. wait_time = 256;
  2782. do {
  2783. atomic_set(&vha->loop_state, LOOP_UPDATE);
  2784. /* Issue a marker after FW becomes ready. */
  2785. qla2x00_marker(vha, req, rsp, 0, 0,
  2786. MK_SYNC_ALL);
  2787. vha->marker_needed = 0;
  2788. /* Remap devices on Loop. */
  2789. clear_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
  2790. qla2x00_configure_loop(vha);
  2791. wait_time--;
  2792. } while (!atomic_read(&vha->loop_down_timer) &&
  2793. !(test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags))
  2794. && wait_time && (test_bit(LOOP_RESYNC_NEEDED,
  2795. &vha->dpc_flags)));
  2796. }
  2797. }
  2798. if (test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags))
  2799. return (QLA_FUNCTION_FAILED);
  2800. if (rval)
  2801. DEBUG2_3(printk("%s(): **** FAILED ****\n", __func__));
  2802. return (rval);
  2803. }
  2804. void
  2805. qla2x00_update_fcports(scsi_qla_host_t *vha)
  2806. {
  2807. fc_port_t *fcport;
  2808. /* Go with deferred removal of rport references. */
  2809. list_for_each_entry(fcport, &vha->vp_fcports, list)
  2810. if (fcport && fcport->drport &&
  2811. atomic_read(&fcport->state) != FCS_UNCONFIGURED)
  2812. qla2x00_rport_del(fcport);
  2813. }
  2814. /*
  2815. * qla2x00_abort_isp
  2816. * Resets ISP and aborts all outstanding commands.
  2817. *
  2818. * Input:
  2819. * ha = adapter block pointer.
  2820. *
  2821. * Returns:
  2822. * 0 = success
  2823. */
  2824. int
  2825. qla2x00_abort_isp(scsi_qla_host_t *vha)
  2826. {
  2827. int rval;
  2828. uint8_t status = 0;
  2829. struct qla_hw_data *ha = vha->hw;
  2830. struct scsi_qla_host *vp;
  2831. struct req_que *req = ha->req_q_map[0];
  2832. if (vha->flags.online) {
  2833. vha->flags.online = 0;
  2834. clear_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
  2835. ha->qla_stats.total_isp_aborts++;
  2836. qla_printk(KERN_INFO, ha,
  2837. "Performing ISP error recovery - ha= %p.\n", ha);
  2838. ha->isp_ops->reset_chip(vha);
  2839. atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
  2840. if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
  2841. atomic_set(&vha->loop_state, LOOP_DOWN);
  2842. qla2x00_mark_all_devices_lost(vha, 0);
  2843. list_for_each_entry(vp, &ha->vp_list, list)
  2844. qla2x00_mark_all_devices_lost(vp, 0);
  2845. } else {
  2846. if (!atomic_read(&vha->loop_down_timer))
  2847. atomic_set(&vha->loop_down_timer,
  2848. LOOP_DOWN_TIME);
  2849. }
  2850. /* Requeue all commands in outstanding command list. */
  2851. qla2x00_abort_all_cmds(vha, DID_RESET << 16);
  2852. ha->isp_ops->get_flash_version(vha, req->ring);
  2853. ha->isp_ops->nvram_config(vha);
  2854. if (!qla2x00_restart_isp(vha)) {
  2855. clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
  2856. if (!atomic_read(&vha->loop_down_timer)) {
  2857. /*
  2858. * Issue marker command only when we are going
  2859. * to start the I/O .
  2860. */
  2861. vha->marker_needed = 1;
  2862. }
  2863. vha->flags.online = 1;
  2864. ha->isp_ops->enable_intrs(ha);
  2865. ha->isp_abort_cnt = 0;
  2866. clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
  2867. if (ha->fce) {
  2868. ha->flags.fce_enabled = 1;
  2869. memset(ha->fce, 0,
  2870. fce_calc_size(ha->fce_bufs));
  2871. rval = qla2x00_enable_fce_trace(vha,
  2872. ha->fce_dma, ha->fce_bufs, ha->fce_mb,
  2873. &ha->fce_bufs);
  2874. if (rval) {
  2875. qla_printk(KERN_WARNING, ha,
  2876. "Unable to reinitialize FCE "
  2877. "(%d).\n", rval);
  2878. ha->flags.fce_enabled = 0;
  2879. }
  2880. }
  2881. if (ha->eft) {
  2882. memset(ha->eft, 0, EFT_SIZE);
  2883. rval = qla2x00_enable_eft_trace(vha,
  2884. ha->eft_dma, EFT_NUM_BUFFERS);
  2885. if (rval) {
  2886. qla_printk(KERN_WARNING, ha,
  2887. "Unable to reinitialize EFT "
  2888. "(%d).\n", rval);
  2889. }
  2890. }
  2891. } else { /* failed the ISP abort */
  2892. vha->flags.online = 1;
  2893. if (test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) {
  2894. if (ha->isp_abort_cnt == 0) {
  2895. qla_printk(KERN_WARNING, ha,
  2896. "ISP error recovery failed - "
  2897. "board disabled\n");
  2898. /*
  2899. * The next call disables the board
  2900. * completely.
  2901. */
  2902. ha->isp_ops->reset_adapter(vha);
  2903. vha->flags.online = 0;
  2904. clear_bit(ISP_ABORT_RETRY,
  2905. &vha->dpc_flags);
  2906. status = 0;
  2907. } else { /* schedule another ISP abort */
  2908. ha->isp_abort_cnt--;
  2909. DEBUG(printk("qla%ld: ISP abort - "
  2910. "retry remaining %d\n",
  2911. vha->host_no, ha->isp_abort_cnt));
  2912. status = 1;
  2913. }
  2914. } else {
  2915. ha->isp_abort_cnt = MAX_RETRIES_OF_ISP_ABORT;
  2916. DEBUG(printk("qla2x00(%ld): ISP error recovery "
  2917. "- retrying (%d) more times\n",
  2918. vha->host_no, ha->isp_abort_cnt));
  2919. set_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
  2920. status = 1;
  2921. }
  2922. }
  2923. }
  2924. if (!status) {
  2925. DEBUG(printk(KERN_INFO
  2926. "qla2x00_abort_isp(%ld): succeeded.\n",
  2927. vha->host_no));
  2928. list_for_each_entry(vp, &ha->vp_list, list) {
  2929. if (vp->vp_idx)
  2930. qla2x00_vp_abort_isp(vp);
  2931. }
  2932. } else {
  2933. qla_printk(KERN_INFO, ha,
  2934. "qla2x00_abort_isp: **** FAILED ****\n");
  2935. }
  2936. return(status);
  2937. }
  2938. /*
  2939. * qla2x00_restart_isp
  2940. * restarts the ISP after a reset
  2941. *
  2942. * Input:
  2943. * ha = adapter block pointer.
  2944. *
  2945. * Returns:
  2946. * 0 = success
  2947. */
  2948. static int
  2949. qla2x00_restart_isp(scsi_qla_host_t *vha)
  2950. {
  2951. uint8_t status = 0;
  2952. uint32_t wait_time;
  2953. struct qla_hw_data *ha = vha->hw;
  2954. struct req_que *req = ha->req_q_map[0];
  2955. struct rsp_que *rsp = ha->rsp_q_map[0];
  2956. /* If firmware needs to be loaded */
  2957. if (qla2x00_isp_firmware(vha)) {
  2958. vha->flags.online = 0;
  2959. status = ha->isp_ops->chip_diag(vha);
  2960. if (!status)
  2961. status = qla2x00_setup_chip(vha);
  2962. }
  2963. if (!status && !(status = qla2x00_init_rings(vha))) {
  2964. clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
  2965. /* Initialize the queues in use */
  2966. qla25xx_init_queues(ha);
  2967. status = qla2x00_fw_ready(vha);
  2968. if (!status) {
  2969. DEBUG(printk("%s(): Start configure loop, "
  2970. "status = %d\n", __func__, status));
  2971. /* Issue a marker after FW becomes ready. */
  2972. qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL);
  2973. vha->flags.online = 1;
  2974. /* Wait at most MAX_TARGET RSCNs for a stable link. */
  2975. wait_time = 256;
  2976. do {
  2977. clear_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
  2978. qla2x00_configure_loop(vha);
  2979. wait_time--;
  2980. } while (!atomic_read(&vha->loop_down_timer) &&
  2981. !(test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags))
  2982. && wait_time && (test_bit(LOOP_RESYNC_NEEDED,
  2983. &vha->dpc_flags)));
  2984. }
  2985. /* if no cable then assume it's good */
  2986. if ((vha->device_flags & DFLG_NO_CABLE))
  2987. status = 0;
  2988. DEBUG(printk("%s(): Configure loop done, status = 0x%x\n",
  2989. __func__,
  2990. status));
  2991. }
  2992. return (status);
  2993. }
  2994. static int
  2995. qla25xx_init_queues(struct qla_hw_data *ha)
  2996. {
  2997. struct rsp_que *rsp = NULL;
  2998. struct req_que *req = NULL;
  2999. struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
  3000. int ret = -1;
  3001. int i;
  3002. for (i = 1; i < ha->max_queues; i++) {
  3003. rsp = ha->rsp_q_map[i];
  3004. if (rsp) {
  3005. rsp->options &= ~BIT_0;
  3006. ret = qla25xx_init_rsp_que(base_vha, rsp, rsp->options);
  3007. if (ret != QLA_SUCCESS)
  3008. DEBUG2_17(printk(KERN_WARNING
  3009. "%s Rsp que:%d init failed\n", __func__,
  3010. rsp->id));
  3011. else
  3012. DEBUG2_17(printk(KERN_INFO
  3013. "%s Rsp que:%d inited\n", __func__,
  3014. rsp->id));
  3015. }
  3016. req = ha->req_q_map[i];
  3017. if (req) {
  3018. /* Clear outstanding commands array. */
  3019. req->options &= ~BIT_0;
  3020. ret = qla25xx_init_req_que(base_vha, req, req->options);
  3021. if (ret != QLA_SUCCESS)
  3022. DEBUG2_17(printk(KERN_WARNING
  3023. "%s Req que:%d init failed\n", __func__,
  3024. req->id));
  3025. else
  3026. DEBUG2_17(printk(KERN_WARNING
  3027. "%s Req que:%d inited\n", __func__,
  3028. req->id));
  3029. }
  3030. }
  3031. return ret;
  3032. }
  3033. /*
  3034. * qla2x00_reset_adapter
  3035. * Reset adapter.
  3036. *
  3037. * Input:
  3038. * ha = adapter block pointer.
  3039. */
  3040. void
  3041. qla2x00_reset_adapter(scsi_qla_host_t *vha)
  3042. {
  3043. unsigned long flags = 0;
  3044. struct qla_hw_data *ha = vha->hw;
  3045. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  3046. vha->flags.online = 0;
  3047. ha->isp_ops->disable_intrs(ha);
  3048. spin_lock_irqsave(&ha->hardware_lock, flags);
  3049. WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
  3050. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  3051. WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
  3052. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  3053. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  3054. }
  3055. void
  3056. qla24xx_reset_adapter(scsi_qla_host_t *vha)
  3057. {
  3058. unsigned long flags = 0;
  3059. struct qla_hw_data *ha = vha->hw;
  3060. struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
  3061. vha->flags.online = 0;
  3062. ha->isp_ops->disable_intrs(ha);
  3063. spin_lock_irqsave(&ha->hardware_lock, flags);
  3064. WRT_REG_DWORD(&reg->hccr, HCCRX_SET_RISC_RESET);
  3065. RD_REG_DWORD(&reg->hccr);
  3066. WRT_REG_DWORD(&reg->hccr, HCCRX_REL_RISC_PAUSE);
  3067. RD_REG_DWORD(&reg->hccr);
  3068. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  3069. }
  3070. /* On sparc systems, obtain port and node WWN from firmware
  3071. * properties.
  3072. */
  3073. static void qla24xx_nvram_wwn_from_ofw(scsi_qla_host_t *vha,
  3074. struct nvram_24xx *nv)
  3075. {
  3076. #ifdef CONFIG_SPARC
  3077. struct qla_hw_data *ha = vha->hw;
  3078. struct pci_dev *pdev = ha->pdev;
  3079. struct device_node *dp = pci_device_to_OF_node(pdev);
  3080. const u8 *val;
  3081. int len;
  3082. val = of_get_property(dp, "port-wwn", &len);
  3083. if (val && len >= WWN_SIZE)
  3084. memcpy(nv->port_name, val, WWN_SIZE);
  3085. val = of_get_property(dp, "node-wwn", &len);
  3086. if (val && len >= WWN_SIZE)
  3087. memcpy(nv->node_name, val, WWN_SIZE);
  3088. #endif
  3089. }
  3090. int
  3091. qla24xx_nvram_config(scsi_qla_host_t *vha)
  3092. {
  3093. int rval;
  3094. struct init_cb_24xx *icb;
  3095. struct nvram_24xx *nv;
  3096. uint32_t *dptr;
  3097. uint8_t *dptr1, *dptr2;
  3098. uint32_t chksum;
  3099. uint16_t cnt;
  3100. struct qla_hw_data *ha = vha->hw;
  3101. rval = QLA_SUCCESS;
  3102. icb = (struct init_cb_24xx *)ha->init_cb;
  3103. nv = ha->nvram;
  3104. /* Determine NVRAM starting address. */
  3105. ha->nvram_size = sizeof(struct nvram_24xx);
  3106. ha->nvram_base = FA_NVRAM_FUNC0_ADDR;
  3107. ha->vpd_size = FA_NVRAM_VPD_SIZE;
  3108. ha->vpd_base = FA_NVRAM_VPD0_ADDR;
  3109. if (PCI_FUNC(ha->pdev->devfn)) {
  3110. ha->nvram_base = FA_NVRAM_FUNC1_ADDR;
  3111. ha->vpd_base = FA_NVRAM_VPD1_ADDR;
  3112. }
  3113. /* Get VPD data into cache */
  3114. ha->vpd = ha->nvram + VPD_OFFSET;
  3115. ha->isp_ops->read_nvram(vha, (uint8_t *)ha->vpd,
  3116. ha->nvram_base - FA_NVRAM_FUNC0_ADDR, FA_NVRAM_VPD_SIZE * 4);
  3117. /* Get NVRAM data into cache and calculate checksum. */
  3118. dptr = (uint32_t *)nv;
  3119. ha->isp_ops->read_nvram(vha, (uint8_t *)dptr, ha->nvram_base,
  3120. ha->nvram_size);
  3121. for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++)
  3122. chksum += le32_to_cpu(*dptr++);
  3123. DEBUG5(printk("scsi(%ld): Contents of NVRAM\n", ha->host_no));
  3124. DEBUG5(qla2x00_dump_buffer((uint8_t *)nv, ha->nvram_size));
  3125. /* Bad NVRAM data, set defaults parameters. */
  3126. if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || nv->id[2] != 'P'
  3127. || nv->id[3] != ' ' ||
  3128. nv->nvram_version < __constant_cpu_to_le16(ICB_VERSION)) {
  3129. /* Reset NVRAM data. */
  3130. qla_printk(KERN_WARNING, ha, "Inconsistent NVRAM detected: "
  3131. "checksum=0x%x id=%c version=0x%x.\n", chksum, nv->id[0],
  3132. le16_to_cpu(nv->nvram_version));
  3133. qla_printk(KERN_WARNING, ha, "Falling back to functioning (yet "
  3134. "invalid -- WWPN) defaults.\n");
  3135. /*
  3136. * Set default initialization control block.
  3137. */
  3138. memset(nv, 0, ha->nvram_size);
  3139. nv->nvram_version = __constant_cpu_to_le16(ICB_VERSION);
  3140. nv->version = __constant_cpu_to_le16(ICB_VERSION);
  3141. nv->frame_payload_size = __constant_cpu_to_le16(2048);
  3142. nv->execution_throttle = __constant_cpu_to_le16(0xFFFF);
  3143. nv->exchange_count = __constant_cpu_to_le16(0);
  3144. nv->hard_address = __constant_cpu_to_le16(124);
  3145. nv->port_name[0] = 0x21;
  3146. nv->port_name[1] = 0x00 + PCI_FUNC(ha->pdev->devfn);
  3147. nv->port_name[2] = 0x00;
  3148. nv->port_name[3] = 0xe0;
  3149. nv->port_name[4] = 0x8b;
  3150. nv->port_name[5] = 0x1c;
  3151. nv->port_name[6] = 0x55;
  3152. nv->port_name[7] = 0x86;
  3153. nv->node_name[0] = 0x20;
  3154. nv->node_name[1] = 0x00;
  3155. nv->node_name[2] = 0x00;
  3156. nv->node_name[3] = 0xe0;
  3157. nv->node_name[4] = 0x8b;
  3158. nv->node_name[5] = 0x1c;
  3159. nv->node_name[6] = 0x55;
  3160. nv->node_name[7] = 0x86;
  3161. qla24xx_nvram_wwn_from_ofw(vha, nv);
  3162. nv->login_retry_count = __constant_cpu_to_le16(8);
  3163. nv->interrupt_delay_timer = __constant_cpu_to_le16(0);
  3164. nv->login_timeout = __constant_cpu_to_le16(0);
  3165. nv->firmware_options_1 =
  3166. __constant_cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1);
  3167. nv->firmware_options_2 = __constant_cpu_to_le32(2 << 4);
  3168. nv->firmware_options_2 |= __constant_cpu_to_le32(BIT_12);
  3169. nv->firmware_options_3 = __constant_cpu_to_le32(2 << 13);
  3170. nv->host_p = __constant_cpu_to_le32(BIT_11|BIT_10);
  3171. nv->efi_parameters = __constant_cpu_to_le32(0);
  3172. nv->reset_delay = 5;
  3173. nv->max_luns_per_target = __constant_cpu_to_le16(128);
  3174. nv->port_down_retry_count = __constant_cpu_to_le16(30);
  3175. nv->link_down_timeout = __constant_cpu_to_le16(30);
  3176. rval = 1;
  3177. }
  3178. /* Reset Initialization control block */
  3179. memset(icb, 0, ha->init_cb_size);
  3180. /* Copy 1st segment. */
  3181. dptr1 = (uint8_t *)icb;
  3182. dptr2 = (uint8_t *)&nv->version;
  3183. cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version;
  3184. while (cnt--)
  3185. *dptr1++ = *dptr2++;
  3186. icb->login_retry_count = nv->login_retry_count;
  3187. icb->link_down_on_nos = nv->link_down_on_nos;
  3188. /* Copy 2nd segment. */
  3189. dptr1 = (uint8_t *)&icb->interrupt_delay_timer;
  3190. dptr2 = (uint8_t *)&nv->interrupt_delay_timer;
  3191. cnt = (uint8_t *)&icb->reserved_3 -
  3192. (uint8_t *)&icb->interrupt_delay_timer;
  3193. while (cnt--)
  3194. *dptr1++ = *dptr2++;
  3195. /*
  3196. * Setup driver NVRAM options.
  3197. */
  3198. qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name),
  3199. "QLA2462");
  3200. /* Use alternate WWN? */
  3201. if (nv->host_p & __constant_cpu_to_le32(BIT_15)) {
  3202. memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
  3203. memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
  3204. }
  3205. /* Prepare nodename */
  3206. if ((icb->firmware_options_1 & __constant_cpu_to_le32(BIT_14)) == 0) {
  3207. /*
  3208. * Firmware will apply the following mask if the nodename was
  3209. * not provided.
  3210. */
  3211. memcpy(icb->node_name, icb->port_name, WWN_SIZE);
  3212. icb->node_name[0] &= 0xF0;
  3213. }
  3214. /* Set host adapter parameters. */
  3215. ha->flags.disable_risc_code_load = 0;
  3216. ha->flags.enable_lip_reset = 0;
  3217. ha->flags.enable_lip_full_login =
  3218. le32_to_cpu(nv->host_p) & BIT_10 ? 1: 0;
  3219. ha->flags.enable_target_reset =
  3220. le32_to_cpu(nv->host_p) & BIT_11 ? 1: 0;
  3221. ha->flags.enable_led_scheme = 0;
  3222. ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1: 0;
  3223. ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) &
  3224. (BIT_6 | BIT_5 | BIT_4)) >> 4;
  3225. memcpy(ha->fw_seriallink_options24, nv->seriallink_options,
  3226. sizeof(ha->fw_seriallink_options24));
  3227. /* save HBA serial number */
  3228. ha->serial0 = icb->port_name[5];
  3229. ha->serial1 = icb->port_name[6];
  3230. ha->serial2 = icb->port_name[7];
  3231. memcpy(vha->node_name, icb->node_name, WWN_SIZE);
  3232. memcpy(vha->port_name, icb->port_name, WWN_SIZE);
  3233. icb->execution_throttle = __constant_cpu_to_le16(0xFFFF);
  3234. ha->retry_count = le16_to_cpu(nv->login_retry_count);
  3235. /* Set minimum login_timeout to 4 seconds. */
  3236. if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout)
  3237. nv->login_timeout = cpu_to_le16(ql2xlogintimeout);
  3238. if (le16_to_cpu(nv->login_timeout) < 4)
  3239. nv->login_timeout = __constant_cpu_to_le16(4);
  3240. ha->login_timeout = le16_to_cpu(nv->login_timeout);
  3241. icb->login_timeout = nv->login_timeout;
  3242. /* Set minimum RATOV to 100 tenths of a second. */
  3243. ha->r_a_tov = 100;
  3244. ha->loop_reset_delay = nv->reset_delay;
  3245. /* Link Down Timeout = 0:
  3246. *
  3247. * When Port Down timer expires we will start returning
  3248. * I/O's to OS with "DID_NO_CONNECT".
  3249. *
  3250. * Link Down Timeout != 0:
  3251. *
  3252. * The driver waits for the link to come up after link down
  3253. * before returning I/Os to OS with "DID_NO_CONNECT".
  3254. */
  3255. if (le16_to_cpu(nv->link_down_timeout) == 0) {
  3256. ha->loop_down_abort_time =
  3257. (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
  3258. } else {
  3259. ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout);
  3260. ha->loop_down_abort_time =
  3261. (LOOP_DOWN_TIME - ha->link_down_timeout);
  3262. }
  3263. /* Need enough time to try and get the port back. */
  3264. ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count);
  3265. if (qlport_down_retry)
  3266. ha->port_down_retry_count = qlport_down_retry;
  3267. /* Set login_retry_count */
  3268. ha->login_retry_count = le16_to_cpu(nv->login_retry_count);
  3269. if (ha->port_down_retry_count ==
  3270. le16_to_cpu(nv->port_down_retry_count) &&
  3271. ha->port_down_retry_count > 3)
  3272. ha->login_retry_count = ha->port_down_retry_count;
  3273. else if (ha->port_down_retry_count > (int)ha->login_retry_count)
  3274. ha->login_retry_count = ha->port_down_retry_count;
  3275. if (ql2xloginretrycount)
  3276. ha->login_retry_count = ql2xloginretrycount;
  3277. /* Enable ZIO. */
  3278. if (!vha->flags.init_done) {
  3279. ha->zio_mode = le32_to_cpu(icb->firmware_options_2) &
  3280. (BIT_3 | BIT_2 | BIT_1 | BIT_0);
  3281. ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ?
  3282. le16_to_cpu(icb->interrupt_delay_timer): 2;
  3283. }
  3284. icb->firmware_options_2 &= __constant_cpu_to_le32(
  3285. ~(BIT_3 | BIT_2 | BIT_1 | BIT_0));
  3286. vha->flags.process_response_queue = 0;
  3287. if (ha->zio_mode != QLA_ZIO_DISABLED) {
  3288. ha->zio_mode = QLA_ZIO_MODE_6;
  3289. DEBUG2(printk("scsi(%ld): ZIO mode %d enabled; timer delay "
  3290. "(%d us).\n", vha->host_no, ha->zio_mode,
  3291. ha->zio_timer * 100));
  3292. qla_printk(KERN_INFO, ha,
  3293. "ZIO mode %d enabled; timer delay (%d us).\n",
  3294. ha->zio_mode, ha->zio_timer * 100);
  3295. icb->firmware_options_2 |= cpu_to_le32(
  3296. (uint32_t)ha->zio_mode);
  3297. icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer);
  3298. vha->flags.process_response_queue = 1;
  3299. }
  3300. if (rval) {
  3301. DEBUG2_3(printk(KERN_WARNING
  3302. "scsi(%ld): NVRAM configuration failed!\n", vha->host_no));
  3303. }
  3304. return (rval);
  3305. }
  3306. static int
  3307. qla24xx_load_risc_flash(scsi_qla_host_t *vha, uint32_t *srisc_addr)
  3308. {
  3309. int rval = QLA_SUCCESS;
  3310. int segments, fragment;
  3311. uint32_t faddr;
  3312. uint32_t *dcode, dlen;
  3313. uint32_t risc_addr;
  3314. uint32_t risc_size;
  3315. uint32_t i;
  3316. struct qla_hw_data *ha = vha->hw;
  3317. struct req_que *req = ha->req_q_map[0];
  3318. rval = QLA_SUCCESS;
  3319. segments = FA_RISC_CODE_SEGMENTS;
  3320. faddr = ha->flt_region_fw;
  3321. dcode = (uint32_t *)req->ring;
  3322. *srisc_addr = 0;
  3323. /* Validate firmware image by checking version. */
  3324. qla24xx_read_flash_data(vha, dcode, faddr + 4, 4);
  3325. for (i = 0; i < 4; i++)
  3326. dcode[i] = be32_to_cpu(dcode[i]);
  3327. if ((dcode[0] == 0xffffffff && dcode[1] == 0xffffffff &&
  3328. dcode[2] == 0xffffffff && dcode[3] == 0xffffffff) ||
  3329. (dcode[0] == 0 && dcode[1] == 0 && dcode[2] == 0 &&
  3330. dcode[3] == 0)) {
  3331. qla_printk(KERN_WARNING, ha,
  3332. "Unable to verify integrity of flash firmware image!\n");
  3333. qla_printk(KERN_WARNING, ha,
  3334. "Firmware data: %08x %08x %08x %08x!\n", dcode[0],
  3335. dcode[1], dcode[2], dcode[3]);
  3336. return QLA_FUNCTION_FAILED;
  3337. }
  3338. while (segments && rval == QLA_SUCCESS) {
  3339. /* Read segment's load information. */
  3340. qla24xx_read_flash_data(vha, dcode, faddr, 4);
  3341. risc_addr = be32_to_cpu(dcode[2]);
  3342. *srisc_addr = *srisc_addr == 0 ? risc_addr : *srisc_addr;
  3343. risc_size = be32_to_cpu(dcode[3]);
  3344. fragment = 0;
  3345. while (risc_size > 0 && rval == QLA_SUCCESS) {
  3346. dlen = (uint32_t)(ha->fw_transfer_size >> 2);
  3347. if (dlen > risc_size)
  3348. dlen = risc_size;
  3349. DEBUG7(printk("scsi(%ld): Loading risc segment@ risc "
  3350. "addr %x, number of dwords 0x%x, offset 0x%x.\n",
  3351. vha->host_no, risc_addr, dlen, faddr));
  3352. qla24xx_read_flash_data(vha, dcode, faddr, dlen);
  3353. for (i = 0; i < dlen; i++)
  3354. dcode[i] = swab32(dcode[i]);
  3355. rval = qla2x00_load_ram(vha, req->dma, risc_addr,
  3356. dlen);
  3357. if (rval) {
  3358. DEBUG(printk("scsi(%ld):[ERROR] Failed to load "
  3359. "segment %d of firmware\n", vha->host_no,
  3360. fragment));
  3361. qla_printk(KERN_WARNING, ha,
  3362. "[ERROR] Failed to load segment %d of "
  3363. "firmware\n", fragment);
  3364. break;
  3365. }
  3366. faddr += dlen;
  3367. risc_addr += dlen;
  3368. risc_size -= dlen;
  3369. fragment++;
  3370. }
  3371. /* Next segment. */
  3372. segments--;
  3373. }
  3374. return rval;
  3375. }
  3376. #define QLA_FW_URL "ftp://ftp.qlogic.com/outgoing/linux/firmware/"
  3377. int
  3378. qla2x00_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr)
  3379. {
  3380. int rval;
  3381. int i, fragment;
  3382. uint16_t *wcode, *fwcode;
  3383. uint32_t risc_addr, risc_size, fwclen, wlen, *seg;
  3384. struct fw_blob *blob;
  3385. struct qla_hw_data *ha = vha->hw;
  3386. struct req_que *req = ha->req_q_map[0];
  3387. /* Load firmware blob. */
  3388. blob = qla2x00_request_firmware(vha);
  3389. if (!blob) {
  3390. qla_printk(KERN_ERR, ha, "Firmware image unavailable.\n");
  3391. qla_printk(KERN_ERR, ha, "Firmware images can be retrieved "
  3392. "from: " QLA_FW_URL ".\n");
  3393. return QLA_FUNCTION_FAILED;
  3394. }
  3395. rval = QLA_SUCCESS;
  3396. wcode = (uint16_t *)req->ring;
  3397. *srisc_addr = 0;
  3398. fwcode = (uint16_t *)blob->fw->data;
  3399. fwclen = 0;
  3400. /* Validate firmware image by checking version. */
  3401. if (blob->fw->size < 8 * sizeof(uint16_t)) {
  3402. qla_printk(KERN_WARNING, ha,
  3403. "Unable to verify integrity of firmware image (%Zd)!\n",
  3404. blob->fw->size);
  3405. goto fail_fw_integrity;
  3406. }
  3407. for (i = 0; i < 4; i++)
  3408. wcode[i] = be16_to_cpu(fwcode[i + 4]);
  3409. if ((wcode[0] == 0xffff && wcode[1] == 0xffff && wcode[2] == 0xffff &&
  3410. wcode[3] == 0xffff) || (wcode[0] == 0 && wcode[1] == 0 &&
  3411. wcode[2] == 0 && wcode[3] == 0)) {
  3412. qla_printk(KERN_WARNING, ha,
  3413. "Unable to verify integrity of firmware image!\n");
  3414. qla_printk(KERN_WARNING, ha,
  3415. "Firmware data: %04x %04x %04x %04x!\n", wcode[0],
  3416. wcode[1], wcode[2], wcode[3]);
  3417. goto fail_fw_integrity;
  3418. }
  3419. seg = blob->segs;
  3420. while (*seg && rval == QLA_SUCCESS) {
  3421. risc_addr = *seg;
  3422. *srisc_addr = *srisc_addr == 0 ? *seg : *srisc_addr;
  3423. risc_size = be16_to_cpu(fwcode[3]);
  3424. /* Validate firmware image size. */
  3425. fwclen += risc_size * sizeof(uint16_t);
  3426. if (blob->fw->size < fwclen) {
  3427. qla_printk(KERN_WARNING, ha,
  3428. "Unable to verify integrity of firmware image "
  3429. "(%Zd)!\n", blob->fw->size);
  3430. goto fail_fw_integrity;
  3431. }
  3432. fragment = 0;
  3433. while (risc_size > 0 && rval == QLA_SUCCESS) {
  3434. wlen = (uint16_t)(ha->fw_transfer_size >> 1);
  3435. if (wlen > risc_size)
  3436. wlen = risc_size;
  3437. DEBUG7(printk("scsi(%ld): Loading risc segment@ risc "
  3438. "addr %x, number of words 0x%x.\n", vha->host_no,
  3439. risc_addr, wlen));
  3440. for (i = 0; i < wlen; i++)
  3441. wcode[i] = swab16(fwcode[i]);
  3442. rval = qla2x00_load_ram(vha, req->dma, risc_addr,
  3443. wlen);
  3444. if (rval) {
  3445. DEBUG(printk("scsi(%ld):[ERROR] Failed to load "
  3446. "segment %d of firmware\n", vha->host_no,
  3447. fragment));
  3448. qla_printk(KERN_WARNING, ha,
  3449. "[ERROR] Failed to load segment %d of "
  3450. "firmware\n", fragment);
  3451. break;
  3452. }
  3453. fwcode += wlen;
  3454. risc_addr += wlen;
  3455. risc_size -= wlen;
  3456. fragment++;
  3457. }
  3458. /* Next segment. */
  3459. seg++;
  3460. }
  3461. return rval;
  3462. fail_fw_integrity:
  3463. return QLA_FUNCTION_FAILED;
  3464. }
  3465. int
  3466. qla24xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr)
  3467. {
  3468. int rval;
  3469. int segments, fragment;
  3470. uint32_t *dcode, dlen;
  3471. uint32_t risc_addr;
  3472. uint32_t risc_size;
  3473. uint32_t i;
  3474. struct fw_blob *blob;
  3475. uint32_t *fwcode, fwclen;
  3476. struct qla_hw_data *ha = vha->hw;
  3477. struct req_que *req = ha->req_q_map[0];
  3478. /* Load firmware blob. */
  3479. blob = qla2x00_request_firmware(vha);
  3480. if (!blob) {
  3481. qla_printk(KERN_ERR, ha, "Firmware image unavailable.\n");
  3482. qla_printk(KERN_ERR, ha, "Firmware images can be retrieved "
  3483. "from: " QLA_FW_URL ".\n");
  3484. /* Try to load RISC code from flash. */
  3485. qla_printk(KERN_ERR, ha, "Attempting to load (potentially "
  3486. "outdated) firmware from flash.\n");
  3487. return qla24xx_load_risc_flash(vha, srisc_addr);
  3488. }
  3489. rval = QLA_SUCCESS;
  3490. segments = FA_RISC_CODE_SEGMENTS;
  3491. dcode = (uint32_t *)req->ring;
  3492. *srisc_addr = 0;
  3493. fwcode = (uint32_t *)blob->fw->data;
  3494. fwclen = 0;
  3495. /* Validate firmware image by checking version. */
  3496. if (blob->fw->size < 8 * sizeof(uint32_t)) {
  3497. qla_printk(KERN_WARNING, ha,
  3498. "Unable to verify integrity of firmware image (%Zd)!\n",
  3499. blob->fw->size);
  3500. goto fail_fw_integrity;
  3501. }
  3502. for (i = 0; i < 4; i++)
  3503. dcode[i] = be32_to_cpu(fwcode[i + 4]);
  3504. if ((dcode[0] == 0xffffffff && dcode[1] == 0xffffffff &&
  3505. dcode[2] == 0xffffffff && dcode[3] == 0xffffffff) ||
  3506. (dcode[0] == 0 && dcode[1] == 0 && dcode[2] == 0 &&
  3507. dcode[3] == 0)) {
  3508. qla_printk(KERN_WARNING, ha,
  3509. "Unable to verify integrity of firmware image!\n");
  3510. qla_printk(KERN_WARNING, ha,
  3511. "Firmware data: %08x %08x %08x %08x!\n", dcode[0],
  3512. dcode[1], dcode[2], dcode[3]);
  3513. goto fail_fw_integrity;
  3514. }
  3515. while (segments && rval == QLA_SUCCESS) {
  3516. risc_addr = be32_to_cpu(fwcode[2]);
  3517. *srisc_addr = *srisc_addr == 0 ? risc_addr : *srisc_addr;
  3518. risc_size = be32_to_cpu(fwcode[3]);
  3519. /* Validate firmware image size. */
  3520. fwclen += risc_size * sizeof(uint32_t);
  3521. if (blob->fw->size < fwclen) {
  3522. qla_printk(KERN_WARNING, ha,
  3523. "Unable to verify integrity of firmware image "
  3524. "(%Zd)!\n", blob->fw->size);
  3525. goto fail_fw_integrity;
  3526. }
  3527. fragment = 0;
  3528. while (risc_size > 0 && rval == QLA_SUCCESS) {
  3529. dlen = (uint32_t)(ha->fw_transfer_size >> 2);
  3530. if (dlen > risc_size)
  3531. dlen = risc_size;
  3532. DEBUG7(printk("scsi(%ld): Loading risc segment@ risc "
  3533. "addr %x, number of dwords 0x%x.\n", vha->host_no,
  3534. risc_addr, dlen));
  3535. for (i = 0; i < dlen; i++)
  3536. dcode[i] = swab32(fwcode[i]);
  3537. rval = qla2x00_load_ram(vha, req->dma, risc_addr,
  3538. dlen);
  3539. if (rval) {
  3540. DEBUG(printk("scsi(%ld):[ERROR] Failed to load "
  3541. "segment %d of firmware\n", vha->host_no,
  3542. fragment));
  3543. qla_printk(KERN_WARNING, ha,
  3544. "[ERROR] Failed to load segment %d of "
  3545. "firmware\n", fragment);
  3546. break;
  3547. }
  3548. fwcode += dlen;
  3549. risc_addr += dlen;
  3550. risc_size -= dlen;
  3551. fragment++;
  3552. }
  3553. /* Next segment. */
  3554. segments--;
  3555. }
  3556. return rval;
  3557. fail_fw_integrity:
  3558. return QLA_FUNCTION_FAILED;
  3559. }
  3560. void
  3561. qla2x00_try_to_stop_firmware(scsi_qla_host_t *vha)
  3562. {
  3563. int ret, retries;
  3564. struct qla_hw_data *ha = vha->hw;
  3565. if (!IS_FWI2_CAPABLE(ha))
  3566. return;
  3567. if (!ha->fw_major_version)
  3568. return;
  3569. ret = qla2x00_stop_firmware(vha);
  3570. for (retries = 5; ret != QLA_SUCCESS && ret != QLA_FUNCTION_TIMEOUT &&
  3571. retries ; retries--) {
  3572. ha->isp_ops->reset_chip(vha);
  3573. if (ha->isp_ops->chip_diag(vha) != QLA_SUCCESS)
  3574. continue;
  3575. if (qla2x00_setup_chip(vha) != QLA_SUCCESS)
  3576. continue;
  3577. qla_printk(KERN_INFO, ha,
  3578. "Attempting retry of stop-firmware command...\n");
  3579. ret = qla2x00_stop_firmware(vha);
  3580. }
  3581. }
  3582. int
  3583. qla24xx_configure_vhba(scsi_qla_host_t *vha)
  3584. {
  3585. int rval = QLA_SUCCESS;
  3586. uint16_t mb[MAILBOX_REGISTER_COUNT];
  3587. struct qla_hw_data *ha = vha->hw;
  3588. struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
  3589. struct req_que *req = ha->req_q_map[vha->req_ques[0]];
  3590. struct rsp_que *rsp = req->rsp;
  3591. if (!vha->vp_idx)
  3592. return -EINVAL;
  3593. rval = qla2x00_fw_ready(base_vha);
  3594. if (rval == QLA_SUCCESS) {
  3595. clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
  3596. qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL);
  3597. }
  3598. vha->flags.management_server_logged_in = 0;
  3599. /* Login to SNS first */
  3600. ha->isp_ops->fabric_login(vha, NPH_SNS, 0xff, 0xff, 0xfc, mb, BIT_1);
  3601. if (mb[0] != MBS_COMMAND_COMPLETE) {
  3602. DEBUG15(qla_printk(KERN_INFO, ha,
  3603. "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x "
  3604. "mb[2]=%x mb[6]=%x mb[7]=%x\n", NPH_SNS,
  3605. mb[0], mb[1], mb[2], mb[6], mb[7]));
  3606. return (QLA_FUNCTION_FAILED);
  3607. }
  3608. atomic_set(&vha->loop_down_timer, 0);
  3609. atomic_set(&vha->loop_state, LOOP_UP);
  3610. set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
  3611. set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
  3612. rval = qla2x00_loop_resync(base_vha);
  3613. return rval;
  3614. }
  3615. /* 84XX Support **************************************************************/
  3616. static LIST_HEAD(qla_cs84xx_list);
  3617. static DEFINE_MUTEX(qla_cs84xx_mutex);
  3618. static struct qla_chip_state_84xx *
  3619. qla84xx_get_chip(struct scsi_qla_host *vha)
  3620. {
  3621. struct qla_chip_state_84xx *cs84xx;
  3622. struct qla_hw_data *ha = vha->hw;
  3623. mutex_lock(&qla_cs84xx_mutex);
  3624. /* Find any shared 84xx chip. */
  3625. list_for_each_entry(cs84xx, &qla_cs84xx_list, list) {
  3626. if (cs84xx->bus == ha->pdev->bus) {
  3627. kref_get(&cs84xx->kref);
  3628. goto done;
  3629. }
  3630. }
  3631. cs84xx = kzalloc(sizeof(*cs84xx), GFP_KERNEL);
  3632. if (!cs84xx)
  3633. goto done;
  3634. kref_init(&cs84xx->kref);
  3635. spin_lock_init(&cs84xx->access_lock);
  3636. mutex_init(&cs84xx->fw_update_mutex);
  3637. cs84xx->bus = ha->pdev->bus;
  3638. list_add_tail(&cs84xx->list, &qla_cs84xx_list);
  3639. done:
  3640. mutex_unlock(&qla_cs84xx_mutex);
  3641. return cs84xx;
  3642. }
  3643. static void
  3644. __qla84xx_chip_release(struct kref *kref)
  3645. {
  3646. struct qla_chip_state_84xx *cs84xx =
  3647. container_of(kref, struct qla_chip_state_84xx, kref);
  3648. mutex_lock(&qla_cs84xx_mutex);
  3649. list_del(&cs84xx->list);
  3650. mutex_unlock(&qla_cs84xx_mutex);
  3651. kfree(cs84xx);
  3652. }
  3653. void
  3654. qla84xx_put_chip(struct scsi_qla_host *vha)
  3655. {
  3656. struct qla_hw_data *ha = vha->hw;
  3657. if (ha->cs84xx)
  3658. kref_put(&ha->cs84xx->kref, __qla84xx_chip_release);
  3659. }
  3660. static int
  3661. qla84xx_init_chip(scsi_qla_host_t *vha)
  3662. {
  3663. int rval;
  3664. uint16_t status[2];
  3665. struct qla_hw_data *ha = vha->hw;
  3666. mutex_lock(&ha->cs84xx->fw_update_mutex);
  3667. rval = qla84xx_verify_chip(vha, status);
  3668. mutex_unlock(&ha->cs84xx->fw_update_mutex);
  3669. return rval != QLA_SUCCESS || status[0] ? QLA_FUNCTION_FAILED:
  3670. QLA_SUCCESS;
  3671. }
  3672. /* 81XX Support **************************************************************/
  3673. int
  3674. qla81xx_nvram_config(scsi_qla_host_t *vha)
  3675. {
  3676. int rval;
  3677. struct init_cb_81xx *icb;
  3678. struct nvram_81xx *nv;
  3679. uint32_t *dptr;
  3680. uint8_t *dptr1, *dptr2;
  3681. uint32_t chksum;
  3682. uint16_t cnt;
  3683. struct qla_hw_data *ha = vha->hw;
  3684. rval = QLA_SUCCESS;
  3685. icb = (struct init_cb_81xx *)ha->init_cb;
  3686. nv = ha->nvram;
  3687. /* Determine NVRAM starting address. */
  3688. ha->nvram_size = sizeof(struct nvram_81xx);
  3689. ha->nvram_base = FA_NVRAM_FUNC0_ADDR;
  3690. ha->vpd_size = FA_NVRAM_VPD_SIZE;
  3691. ha->vpd_base = FA_NVRAM_VPD0_ADDR;
  3692. if (PCI_FUNC(ha->pdev->devfn) & 1) {
  3693. ha->nvram_base = FA_NVRAM_FUNC1_ADDR;
  3694. ha->vpd_base = FA_NVRAM_VPD1_ADDR;
  3695. }
  3696. /* Get VPD data into cache */
  3697. ha->vpd = ha->nvram + VPD_OFFSET;
  3698. ha->isp_ops->read_nvram(vha, (uint8_t *)ha->vpd,
  3699. ha->nvram_base - FA_NVRAM_FUNC0_ADDR, FA_NVRAM_VPD_SIZE * 4);
  3700. /* Get NVRAM data into cache and calculate checksum. */
  3701. dptr = (uint32_t *)nv;
  3702. ha->isp_ops->read_nvram(vha, (uint8_t *)dptr, ha->nvram_base,
  3703. ha->nvram_size);
  3704. for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++)
  3705. chksum += le32_to_cpu(*dptr++);
  3706. DEBUG5(printk("scsi(%ld): Contents of NVRAM\n", ha->host_no));
  3707. DEBUG5(qla2x00_dump_buffer((uint8_t *)nv, ha->nvram_size));
  3708. /* Bad NVRAM data, set defaults parameters. */
  3709. if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || nv->id[2] != 'P'
  3710. || nv->id[3] != ' ' ||
  3711. nv->nvram_version < __constant_cpu_to_le16(ICB_VERSION)) {
  3712. /* Reset NVRAM data. */
  3713. qla_printk(KERN_WARNING, ha, "Inconsistent NVRAM detected: "
  3714. "checksum=0x%x id=%c version=0x%x.\n", chksum, nv->id[0],
  3715. le16_to_cpu(nv->nvram_version));
  3716. qla_printk(KERN_WARNING, ha, "Falling back to functioning (yet "
  3717. "invalid -- WWPN) defaults.\n");
  3718. /*
  3719. * Set default initialization control block.
  3720. */
  3721. memset(nv, 0, ha->nvram_size);
  3722. nv->nvram_version = __constant_cpu_to_le16(ICB_VERSION);
  3723. nv->version = __constant_cpu_to_le16(ICB_VERSION);
  3724. nv->frame_payload_size = __constant_cpu_to_le16(2048);
  3725. nv->execution_throttle = __constant_cpu_to_le16(0xFFFF);
  3726. nv->exchange_count = __constant_cpu_to_le16(0);
  3727. nv->port_name[0] = 0x21;
  3728. nv->port_name[1] = 0x00 + PCI_FUNC(ha->pdev->devfn);
  3729. nv->port_name[2] = 0x00;
  3730. nv->port_name[3] = 0xe0;
  3731. nv->port_name[4] = 0x8b;
  3732. nv->port_name[5] = 0x1c;
  3733. nv->port_name[6] = 0x55;
  3734. nv->port_name[7] = 0x86;
  3735. nv->node_name[0] = 0x20;
  3736. nv->node_name[1] = 0x00;
  3737. nv->node_name[2] = 0x00;
  3738. nv->node_name[3] = 0xe0;
  3739. nv->node_name[4] = 0x8b;
  3740. nv->node_name[5] = 0x1c;
  3741. nv->node_name[6] = 0x55;
  3742. nv->node_name[7] = 0x86;
  3743. nv->login_retry_count = __constant_cpu_to_le16(8);
  3744. nv->interrupt_delay_timer = __constant_cpu_to_le16(0);
  3745. nv->login_timeout = __constant_cpu_to_le16(0);
  3746. nv->firmware_options_1 =
  3747. __constant_cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1);
  3748. nv->firmware_options_2 = __constant_cpu_to_le32(2 << 4);
  3749. nv->firmware_options_2 |= __constant_cpu_to_le32(BIT_12);
  3750. nv->firmware_options_3 = __constant_cpu_to_le32(2 << 13);
  3751. nv->host_p = __constant_cpu_to_le32(BIT_11|BIT_10);
  3752. nv->efi_parameters = __constant_cpu_to_le32(0);
  3753. nv->reset_delay = 5;
  3754. nv->max_luns_per_target = __constant_cpu_to_le16(128);
  3755. nv->port_down_retry_count = __constant_cpu_to_le16(30);
  3756. nv->link_down_timeout = __constant_cpu_to_le16(30);
  3757. nv->enode_mac[0] = 0x01;
  3758. nv->enode_mac[1] = 0x02;
  3759. nv->enode_mac[2] = 0x03;
  3760. nv->enode_mac[3] = 0x04;
  3761. nv->enode_mac[4] = 0x05;
  3762. nv->enode_mac[5] = 0x06 + PCI_FUNC(ha->pdev->devfn);
  3763. rval = 1;
  3764. }
  3765. /* Reset Initialization control block */
  3766. memset(icb, 0, sizeof(struct init_cb_81xx));
  3767. /* Copy 1st segment. */
  3768. dptr1 = (uint8_t *)icb;
  3769. dptr2 = (uint8_t *)&nv->version;
  3770. cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version;
  3771. while (cnt--)
  3772. *dptr1++ = *dptr2++;
  3773. icb->login_retry_count = nv->login_retry_count;
  3774. /* Copy 2nd segment. */
  3775. dptr1 = (uint8_t *)&icb->interrupt_delay_timer;
  3776. dptr2 = (uint8_t *)&nv->interrupt_delay_timer;
  3777. cnt = (uint8_t *)&icb->reserved_5 -
  3778. (uint8_t *)&icb->interrupt_delay_timer;
  3779. while (cnt--)
  3780. *dptr1++ = *dptr2++;
  3781. memcpy(icb->enode_mac, nv->enode_mac, sizeof(icb->enode_mac));
  3782. /* Some boards (with valid NVRAMs) still have NULL enode_mac!! */
  3783. if (!memcmp(icb->enode_mac, "\0\0\0\0\0\0", sizeof(icb->enode_mac))) {
  3784. icb->enode_mac[0] = 0x01;
  3785. icb->enode_mac[1] = 0x02;
  3786. icb->enode_mac[2] = 0x03;
  3787. icb->enode_mac[3] = 0x04;
  3788. icb->enode_mac[4] = 0x05;
  3789. icb->enode_mac[5] = 0x06 + PCI_FUNC(ha->pdev->devfn);
  3790. }
  3791. /*
  3792. * Setup driver NVRAM options.
  3793. */
  3794. qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name),
  3795. "QLE81XX");
  3796. /* Use alternate WWN? */
  3797. if (nv->host_p & __constant_cpu_to_le32(BIT_15)) {
  3798. memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
  3799. memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
  3800. }
  3801. /* Prepare nodename */
  3802. if ((icb->firmware_options_1 & __constant_cpu_to_le32(BIT_14)) == 0) {
  3803. /*
  3804. * Firmware will apply the following mask if the nodename was
  3805. * not provided.
  3806. */
  3807. memcpy(icb->node_name, icb->port_name, WWN_SIZE);
  3808. icb->node_name[0] &= 0xF0;
  3809. }
  3810. /* Set host adapter parameters. */
  3811. ha->flags.disable_risc_code_load = 0;
  3812. ha->flags.enable_lip_reset = 0;
  3813. ha->flags.enable_lip_full_login =
  3814. le32_to_cpu(nv->host_p) & BIT_10 ? 1: 0;
  3815. ha->flags.enable_target_reset =
  3816. le32_to_cpu(nv->host_p) & BIT_11 ? 1: 0;
  3817. ha->flags.enable_led_scheme = 0;
  3818. ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1: 0;
  3819. ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) &
  3820. (BIT_6 | BIT_5 | BIT_4)) >> 4;
  3821. /* save HBA serial number */
  3822. ha->serial0 = icb->port_name[5];
  3823. ha->serial1 = icb->port_name[6];
  3824. ha->serial2 = icb->port_name[7];
  3825. memcpy(vha->node_name, icb->node_name, WWN_SIZE);
  3826. memcpy(vha->port_name, icb->port_name, WWN_SIZE);
  3827. icb->execution_throttle = __constant_cpu_to_le16(0xFFFF);
  3828. ha->retry_count = le16_to_cpu(nv->login_retry_count);
  3829. /* Set minimum login_timeout to 4 seconds. */
  3830. if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout)
  3831. nv->login_timeout = cpu_to_le16(ql2xlogintimeout);
  3832. if (le16_to_cpu(nv->login_timeout) < 4)
  3833. nv->login_timeout = __constant_cpu_to_le16(4);
  3834. ha->login_timeout = le16_to_cpu(nv->login_timeout);
  3835. icb->login_timeout = nv->login_timeout;
  3836. /* Set minimum RATOV to 100 tenths of a second. */
  3837. ha->r_a_tov = 100;
  3838. ha->loop_reset_delay = nv->reset_delay;
  3839. /* Link Down Timeout = 0:
  3840. *
  3841. * When Port Down timer expires we will start returning
  3842. * I/O's to OS with "DID_NO_CONNECT".
  3843. *
  3844. * Link Down Timeout != 0:
  3845. *
  3846. * The driver waits for the link to come up after link down
  3847. * before returning I/Os to OS with "DID_NO_CONNECT".
  3848. */
  3849. if (le16_to_cpu(nv->link_down_timeout) == 0) {
  3850. ha->loop_down_abort_time =
  3851. (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
  3852. } else {
  3853. ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout);
  3854. ha->loop_down_abort_time =
  3855. (LOOP_DOWN_TIME - ha->link_down_timeout);
  3856. }
  3857. /* Need enough time to try and get the port back. */
  3858. ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count);
  3859. if (qlport_down_retry)
  3860. ha->port_down_retry_count = qlport_down_retry;
  3861. /* Set login_retry_count */
  3862. ha->login_retry_count = le16_to_cpu(nv->login_retry_count);
  3863. if (ha->port_down_retry_count ==
  3864. le16_to_cpu(nv->port_down_retry_count) &&
  3865. ha->port_down_retry_count > 3)
  3866. ha->login_retry_count = ha->port_down_retry_count;
  3867. else if (ha->port_down_retry_count > (int)ha->login_retry_count)
  3868. ha->login_retry_count = ha->port_down_retry_count;
  3869. if (ql2xloginretrycount)
  3870. ha->login_retry_count = ql2xloginretrycount;
  3871. /* Enable ZIO. */
  3872. if (!vha->flags.init_done) {
  3873. ha->zio_mode = le32_to_cpu(icb->firmware_options_2) &
  3874. (BIT_3 | BIT_2 | BIT_1 | BIT_0);
  3875. ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ?
  3876. le16_to_cpu(icb->interrupt_delay_timer): 2;
  3877. }
  3878. icb->firmware_options_2 &= __constant_cpu_to_le32(
  3879. ~(BIT_3 | BIT_2 | BIT_1 | BIT_0));
  3880. vha->flags.process_response_queue = 0;
  3881. if (ha->zio_mode != QLA_ZIO_DISABLED) {
  3882. ha->zio_mode = QLA_ZIO_MODE_6;
  3883. DEBUG2(printk("scsi(%ld): ZIO mode %d enabled; timer delay "
  3884. "(%d us).\n", vha->host_no, ha->zio_mode,
  3885. ha->zio_timer * 100));
  3886. qla_printk(KERN_INFO, ha,
  3887. "ZIO mode %d enabled; timer delay (%d us).\n",
  3888. ha->zio_mode, ha->zio_timer * 100);
  3889. icb->firmware_options_2 |= cpu_to_le32(
  3890. (uint32_t)ha->zio_mode);
  3891. icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer);
  3892. vha->flags.process_response_queue = 1;
  3893. }
  3894. if (rval) {
  3895. DEBUG2_3(printk(KERN_WARNING
  3896. "scsi(%ld): NVRAM configuration failed!\n", vha->host_no));
  3897. }
  3898. return (rval);
  3899. }
  3900. void
  3901. qla81xx_update_fw_options(scsi_qla_host_t *ha)
  3902. {
  3903. }