44x_emulate.c 9.4 KB

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  1. /*
  2. * This program is free software; you can redistribute it and/or modify
  3. * it under the terms of the GNU General Public License, version 2, as
  4. * published by the Free Software Foundation.
  5. *
  6. * This program is distributed in the hope that it will be useful,
  7. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  8. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  9. * GNU General Public License for more details.
  10. *
  11. * You should have received a copy of the GNU General Public License
  12. * along with this program; if not, write to the Free Software
  13. * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
  14. *
  15. * Copyright IBM Corp. 2008
  16. *
  17. * Authors: Hollis Blanchard <hollisb@us.ibm.com>
  18. */
  19. #include <asm/kvm_ppc.h>
  20. #include <asm/dcr.h>
  21. #include <asm/dcr-regs.h>
  22. #include <asm/disassemble.h>
  23. #include <asm/kvm_44x.h>
  24. #include "timing.h"
  25. #include "booke.h"
  26. #include "44x_tlb.h"
  27. #define OP_RFI 19
  28. #define XOP_RFI 50
  29. #define XOP_MFMSR 83
  30. #define XOP_WRTEE 131
  31. #define XOP_MTMSR 146
  32. #define XOP_WRTEEI 163
  33. #define XOP_MFDCR 323
  34. #define XOP_MTDCR 451
  35. #define XOP_TLBSX 914
  36. #define XOP_ICCCI 966
  37. #define XOP_TLBWE 978
  38. static void kvmppc_emul_rfi(struct kvm_vcpu *vcpu)
  39. {
  40. vcpu->arch.pc = vcpu->arch.srr0;
  41. kvmppc_set_msr(vcpu, vcpu->arch.srr1);
  42. }
  43. int kvmppc_core_emulate_op(struct kvm_run *run, struct kvm_vcpu *vcpu,
  44. unsigned int inst, int *advance)
  45. {
  46. int emulated = EMULATE_DONE;
  47. int dcrn;
  48. int ra;
  49. int rb;
  50. int rc;
  51. int rs;
  52. int rt;
  53. int ws;
  54. switch (get_op(inst)) {
  55. case OP_RFI:
  56. switch (get_xop(inst)) {
  57. case XOP_RFI:
  58. kvmppc_emul_rfi(vcpu);
  59. kvmppc_set_exit_type(vcpu, EMULATED_RFI_EXITS);
  60. *advance = 0;
  61. break;
  62. default:
  63. emulated = EMULATE_FAIL;
  64. break;
  65. }
  66. break;
  67. case 31:
  68. switch (get_xop(inst)) {
  69. case XOP_MFMSR:
  70. rt = get_rt(inst);
  71. vcpu->arch.gpr[rt] = vcpu->arch.msr;
  72. kvmppc_set_exit_type(vcpu, EMULATED_MFMSR_EXITS);
  73. break;
  74. case XOP_MTMSR:
  75. rs = get_rs(inst);
  76. kvmppc_set_exit_type(vcpu, EMULATED_MTMSR_EXITS);
  77. kvmppc_set_msr(vcpu, vcpu->arch.gpr[rs]);
  78. break;
  79. case XOP_WRTEE:
  80. rs = get_rs(inst);
  81. vcpu->arch.msr = (vcpu->arch.msr & ~MSR_EE)
  82. | (vcpu->arch.gpr[rs] & MSR_EE);
  83. kvmppc_set_exit_type(vcpu, EMULATED_WRTEE_EXITS);
  84. break;
  85. case XOP_WRTEEI:
  86. vcpu->arch.msr = (vcpu->arch.msr & ~MSR_EE)
  87. | (inst & MSR_EE);
  88. kvmppc_set_exit_type(vcpu, EMULATED_WRTEE_EXITS);
  89. break;
  90. case XOP_MFDCR:
  91. dcrn = get_dcrn(inst);
  92. rt = get_rt(inst);
  93. /* The guest may access CPR0 registers to determine the timebase
  94. * frequency, and it must know the real host frequency because it
  95. * can directly access the timebase registers.
  96. *
  97. * It would be possible to emulate those accesses in userspace,
  98. * but userspace can really only figure out the end frequency.
  99. * We could decompose that into the factors that compute it, but
  100. * that's tricky math, and it's easier to just report the real
  101. * CPR0 values.
  102. */
  103. switch (dcrn) {
  104. case DCRN_CPR0_CONFIG_ADDR:
  105. vcpu->arch.gpr[rt] = vcpu->arch.cpr0_cfgaddr;
  106. break;
  107. case DCRN_CPR0_CONFIG_DATA:
  108. local_irq_disable();
  109. mtdcr(DCRN_CPR0_CONFIG_ADDR,
  110. vcpu->arch.cpr0_cfgaddr);
  111. vcpu->arch.gpr[rt] = mfdcr(DCRN_CPR0_CONFIG_DATA);
  112. local_irq_enable();
  113. break;
  114. default:
  115. run->dcr.dcrn = dcrn;
  116. run->dcr.data = 0;
  117. run->dcr.is_write = 0;
  118. vcpu->arch.io_gpr = rt;
  119. vcpu->arch.dcr_needed = 1;
  120. kvmppc_account_exit(vcpu, DCR_EXITS);
  121. emulated = EMULATE_DO_DCR;
  122. }
  123. break;
  124. case XOP_MTDCR:
  125. dcrn = get_dcrn(inst);
  126. rs = get_rs(inst);
  127. /* emulate some access in kernel */
  128. switch (dcrn) {
  129. case DCRN_CPR0_CONFIG_ADDR:
  130. vcpu->arch.cpr0_cfgaddr = vcpu->arch.gpr[rs];
  131. break;
  132. default:
  133. run->dcr.dcrn = dcrn;
  134. run->dcr.data = vcpu->arch.gpr[rs];
  135. run->dcr.is_write = 1;
  136. vcpu->arch.dcr_needed = 1;
  137. kvmppc_account_exit(vcpu, DCR_EXITS);
  138. emulated = EMULATE_DO_DCR;
  139. }
  140. break;
  141. case XOP_TLBWE:
  142. ra = get_ra(inst);
  143. rs = get_rs(inst);
  144. ws = get_ws(inst);
  145. emulated = kvmppc_44x_emul_tlbwe(vcpu, ra, rs, ws);
  146. break;
  147. case XOP_TLBSX:
  148. rt = get_rt(inst);
  149. ra = get_ra(inst);
  150. rb = get_rb(inst);
  151. rc = get_rc(inst);
  152. emulated = kvmppc_44x_emul_tlbsx(vcpu, rt, ra, rb, rc);
  153. break;
  154. case XOP_ICCCI:
  155. break;
  156. default:
  157. emulated = EMULATE_FAIL;
  158. }
  159. break;
  160. default:
  161. emulated = EMULATE_FAIL;
  162. }
  163. return emulated;
  164. }
  165. int kvmppc_core_emulate_mtspr(struct kvm_vcpu *vcpu, int sprn, int rs)
  166. {
  167. switch (sprn) {
  168. case SPRN_MMUCR:
  169. vcpu->arch.mmucr = vcpu->arch.gpr[rs]; break;
  170. case SPRN_PID:
  171. kvmppc_set_pid(vcpu, vcpu->arch.gpr[rs]); break;
  172. case SPRN_CCR0:
  173. vcpu->arch.ccr0 = vcpu->arch.gpr[rs]; break;
  174. case SPRN_CCR1:
  175. vcpu->arch.ccr1 = vcpu->arch.gpr[rs]; break;
  176. case SPRN_DEAR:
  177. vcpu->arch.dear = vcpu->arch.gpr[rs]; break;
  178. case SPRN_ESR:
  179. vcpu->arch.esr = vcpu->arch.gpr[rs]; break;
  180. case SPRN_DBCR0:
  181. vcpu->arch.dbcr0 = vcpu->arch.gpr[rs]; break;
  182. case SPRN_DBCR1:
  183. vcpu->arch.dbcr1 = vcpu->arch.gpr[rs]; break;
  184. case SPRN_TSR:
  185. vcpu->arch.tsr &= ~vcpu->arch.gpr[rs]; break;
  186. case SPRN_TCR:
  187. vcpu->arch.tcr = vcpu->arch.gpr[rs];
  188. kvmppc_emulate_dec(vcpu);
  189. break;
  190. /* Note: SPRG4-7 are user-readable. These values are
  191. * loaded into the real SPRGs when resuming the
  192. * guest. */
  193. case SPRN_SPRG4:
  194. vcpu->arch.sprg4 = vcpu->arch.gpr[rs]; break;
  195. case SPRN_SPRG5:
  196. vcpu->arch.sprg5 = vcpu->arch.gpr[rs]; break;
  197. case SPRN_SPRG6:
  198. vcpu->arch.sprg6 = vcpu->arch.gpr[rs]; break;
  199. case SPRN_SPRG7:
  200. vcpu->arch.sprg7 = vcpu->arch.gpr[rs]; break;
  201. case SPRN_IVPR:
  202. vcpu->arch.ivpr = vcpu->arch.gpr[rs];
  203. break;
  204. case SPRN_IVOR0:
  205. vcpu->arch.ivor[BOOKE_IRQPRIO_CRITICAL] = vcpu->arch.gpr[rs];
  206. break;
  207. case SPRN_IVOR1:
  208. vcpu->arch.ivor[BOOKE_IRQPRIO_MACHINE_CHECK] = vcpu->arch.gpr[rs];
  209. break;
  210. case SPRN_IVOR2:
  211. vcpu->arch.ivor[BOOKE_IRQPRIO_DATA_STORAGE] = vcpu->arch.gpr[rs];
  212. break;
  213. case SPRN_IVOR3:
  214. vcpu->arch.ivor[BOOKE_IRQPRIO_INST_STORAGE] = vcpu->arch.gpr[rs];
  215. break;
  216. case SPRN_IVOR4:
  217. vcpu->arch.ivor[BOOKE_IRQPRIO_EXTERNAL] = vcpu->arch.gpr[rs];
  218. break;
  219. case SPRN_IVOR5:
  220. vcpu->arch.ivor[BOOKE_IRQPRIO_ALIGNMENT] = vcpu->arch.gpr[rs];
  221. break;
  222. case SPRN_IVOR6:
  223. vcpu->arch.ivor[BOOKE_IRQPRIO_PROGRAM] = vcpu->arch.gpr[rs];
  224. break;
  225. case SPRN_IVOR7:
  226. vcpu->arch.ivor[BOOKE_IRQPRIO_FP_UNAVAIL] = vcpu->arch.gpr[rs];
  227. break;
  228. case SPRN_IVOR8:
  229. vcpu->arch.ivor[BOOKE_IRQPRIO_SYSCALL] = vcpu->arch.gpr[rs];
  230. break;
  231. case SPRN_IVOR9:
  232. vcpu->arch.ivor[BOOKE_IRQPRIO_AP_UNAVAIL] = vcpu->arch.gpr[rs];
  233. break;
  234. case SPRN_IVOR10:
  235. vcpu->arch.ivor[BOOKE_IRQPRIO_DECREMENTER] = vcpu->arch.gpr[rs];
  236. break;
  237. case SPRN_IVOR11:
  238. vcpu->arch.ivor[BOOKE_IRQPRIO_FIT] = vcpu->arch.gpr[rs];
  239. break;
  240. case SPRN_IVOR12:
  241. vcpu->arch.ivor[BOOKE_IRQPRIO_WATCHDOG] = vcpu->arch.gpr[rs];
  242. break;
  243. case SPRN_IVOR13:
  244. vcpu->arch.ivor[BOOKE_IRQPRIO_DTLB_MISS] = vcpu->arch.gpr[rs];
  245. break;
  246. case SPRN_IVOR14:
  247. vcpu->arch.ivor[BOOKE_IRQPRIO_ITLB_MISS] = vcpu->arch.gpr[rs];
  248. break;
  249. case SPRN_IVOR15:
  250. vcpu->arch.ivor[BOOKE_IRQPRIO_DEBUG] = vcpu->arch.gpr[rs];
  251. break;
  252. default:
  253. return EMULATE_FAIL;
  254. }
  255. kvmppc_set_exit_type(vcpu, EMULATED_MTSPR_EXITS);
  256. return EMULATE_DONE;
  257. }
  258. int kvmppc_core_emulate_mfspr(struct kvm_vcpu *vcpu, int sprn, int rt)
  259. {
  260. switch (sprn) {
  261. /* 440 */
  262. case SPRN_MMUCR:
  263. vcpu->arch.gpr[rt] = vcpu->arch.mmucr; break;
  264. case SPRN_CCR0:
  265. vcpu->arch.gpr[rt] = vcpu->arch.ccr0; break;
  266. case SPRN_CCR1:
  267. vcpu->arch.gpr[rt] = vcpu->arch.ccr1; break;
  268. /* Book E */
  269. case SPRN_PID:
  270. vcpu->arch.gpr[rt] = vcpu->arch.pid; break;
  271. case SPRN_IVPR:
  272. vcpu->arch.gpr[rt] = vcpu->arch.ivpr; break;
  273. case SPRN_DEAR:
  274. vcpu->arch.gpr[rt] = vcpu->arch.dear; break;
  275. case SPRN_ESR:
  276. vcpu->arch.gpr[rt] = vcpu->arch.esr; break;
  277. case SPRN_DBCR0:
  278. vcpu->arch.gpr[rt] = vcpu->arch.dbcr0; break;
  279. case SPRN_DBCR1:
  280. vcpu->arch.gpr[rt] = vcpu->arch.dbcr1; break;
  281. case SPRN_IVOR0:
  282. vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_CRITICAL];
  283. break;
  284. case SPRN_IVOR1:
  285. vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_MACHINE_CHECK];
  286. break;
  287. case SPRN_IVOR2:
  288. vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_DATA_STORAGE];
  289. break;
  290. case SPRN_IVOR3:
  291. vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_INST_STORAGE];
  292. break;
  293. case SPRN_IVOR4:
  294. vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_EXTERNAL];
  295. break;
  296. case SPRN_IVOR5:
  297. vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_ALIGNMENT];
  298. break;
  299. case SPRN_IVOR6:
  300. vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_PROGRAM];
  301. break;
  302. case SPRN_IVOR7:
  303. vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_FP_UNAVAIL];
  304. break;
  305. case SPRN_IVOR8:
  306. vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_SYSCALL];
  307. break;
  308. case SPRN_IVOR9:
  309. vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_AP_UNAVAIL];
  310. break;
  311. case SPRN_IVOR10:
  312. vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_DECREMENTER];
  313. break;
  314. case SPRN_IVOR11:
  315. vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_FIT];
  316. break;
  317. case SPRN_IVOR12:
  318. vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_WATCHDOG];
  319. break;
  320. case SPRN_IVOR13:
  321. vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_DTLB_MISS];
  322. break;
  323. case SPRN_IVOR14:
  324. vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_ITLB_MISS];
  325. break;
  326. case SPRN_IVOR15:
  327. vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_DEBUG];
  328. break;
  329. default:
  330. return EMULATE_FAIL;
  331. }
  332. kvmppc_set_exit_type(vcpu, EMULATED_MFSPR_EXITS);
  333. return EMULATE_DONE;
  334. }