bfin_gpio.c 34 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364656667686970717273747576777879808182838485868788899091929394959697989910010110210310410510610710810911011111211311411511611711811912012112212312412512612712812913013113213313413513613713813914014114214314414514614714814915015115215315415515615715815916016116216316416516616716816917017117217317417517617717817918018118218318418518618718818919019119219319419519619719819920020120220320420520620720820921021121221321421521621721821922022122222322422522622722822923023123223323423523623723823924024124224324424524624724824925025125225325425525625725825926026126226326426526626726826927027127227327427527627727827928028128228328428528628728828929029129229329429529629729829930030130230330430530630730830931031131231331431531631731831932032132232332432532632732832933033133233333433533633733833934034134234334434534634734834935035135235335435535635735835936036136236336436536636736836937037137237337437537637737837938038138238338438538638738838939039139239339439539639739839940040140240340440540640740840941041141241341441541641741841942042142242342442542642742842943043143243343443543643743843944044144244344444544644744844945045145245345445545645745845946046146246346446546646746846947047147247347447547647747847948048148248348448548648748848949049149249349449549649749849950050150250350450550650750850951051151251351451551651751851952052152252352452552652752852953053153253353453553653753853954054154254354454554654754854955055155255355455555655755855956056156256356456556656756856957057157257357457557657757857958058158258358458558658758858959059159259359459559659759859960060160260360460560660760860961061161261361461561661761861962062162262362462562662762862963063163263363463563663763863964064164264364464564664764864965065165265365465565665765865966066166266366466566666766866967067167267367467567667767867968068168268368468568668768868969069169269369469569669769869970070170270370470570670770870971071171271371471571671771871972072172272372472572672772872973073173273373473573673773873974074174274374474574674774874975075175275375475575675775875976076176276376476576676776876977077177277377477577677777877978078178278378478578678778878979079179279379479579679779879980080180280380480580680780880981081181281381481581681781881982082182282382482582682782882983083183283383483583683783883984084184284384484584684784884985085185285385485585685785885986086186286386486586686786886987087187287387487587687787887988088188288388488588688788888989089189289389489589689789889990090190290390490590690790890991091191291391491591691791891992092192292392492592692792892993093193293393493593693793893994094194294394494594694794894995095195295395495595695795895996096196296396496596696796896997097197297397497597697797897998098198298398498598698798898999099199299399499599699799899910001001100210031004100510061007100810091010101110121013101410151016101710181019102010211022102310241025102610271028102910301031103210331034103510361037103810391040104110421043104410451046104710481049105010511052105310541055105610571058105910601061106210631064106510661067106810691070107110721073107410751076107710781079108010811082108310841085108610871088108910901091109210931094109510961097109810991100110111021103110411051106110711081109111011111112111311141115111611171118111911201121112211231124112511261127112811291130113111321133113411351136113711381139114011411142114311441145114611471148114911501151115211531154115511561157115811591160116111621163116411651166116711681169117011711172117311741175117611771178117911801181118211831184118511861187118811891190119111921193119411951196119711981199120012011202120312041205120612071208120912101211121212131214121512161217121812191220122112221223122412251226122712281229123012311232123312341235123612371238123912401241124212431244124512461247124812491250125112521253125412551256125712581259126012611262126312641265126612671268126912701271127212731274127512761277127812791280128112821283128412851286128712881289129012911292129312941295129612971298129913001301130213031304130513061307130813091310131113121313131413151316131713181319132013211322132313241325132613271328132913301331133213331334133513361337133813391340134113421343134413451346134713481349135013511352135313541355135613571358135913601361136213631364136513661367136813691370137113721373137413751376137713781379138013811382138313841385138613871388138913901391139213931394139513961397139813991400140114021403140414051406
  1. /*
  2. * File: arch/blackfin/kernel/bfin_gpio.c
  3. * Based on:
  4. * Author: Michael Hennerich (hennerich@blackfin.uclinux.org)
  5. *
  6. * Created:
  7. * Description: GPIO Abstraction Layer
  8. *
  9. * Modified:
  10. * Copyright 2008 Analog Devices Inc.
  11. *
  12. * Bugs: Enter bugs at http://blackfin.uclinux.org/
  13. *
  14. * This program is free software; you can redistribute it and/or modify
  15. * it under the terms of the GNU General Public License as published by
  16. * the Free Software Foundation; either version 2 of the License, or
  17. * (at your option) any later version.
  18. *
  19. * This program is distributed in the hope that it will be useful,
  20. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  21. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  22. * GNU General Public License for more details.
  23. *
  24. * You should have received a copy of the GNU General Public License
  25. * along with this program; if not, see the file COPYING, or write
  26. * to the Free Software Foundation, Inc.,
  27. * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  28. */
  29. /*
  30. * Number BF537/6/4 BF561 BF533/2/1 BF549/8/4/2
  31. *
  32. * GPIO_0 PF0 PF0 PF0 PA0...PJ13
  33. * GPIO_1 PF1 PF1 PF1
  34. * GPIO_2 PF2 PF2 PF2
  35. * GPIO_3 PF3 PF3 PF3
  36. * GPIO_4 PF4 PF4 PF4
  37. * GPIO_5 PF5 PF5 PF5
  38. * GPIO_6 PF6 PF6 PF6
  39. * GPIO_7 PF7 PF7 PF7
  40. * GPIO_8 PF8 PF8 PF8
  41. * GPIO_9 PF9 PF9 PF9
  42. * GPIO_10 PF10 PF10 PF10
  43. * GPIO_11 PF11 PF11 PF11
  44. * GPIO_12 PF12 PF12 PF12
  45. * GPIO_13 PF13 PF13 PF13
  46. * GPIO_14 PF14 PF14 PF14
  47. * GPIO_15 PF15 PF15 PF15
  48. * GPIO_16 PG0 PF16
  49. * GPIO_17 PG1 PF17
  50. * GPIO_18 PG2 PF18
  51. * GPIO_19 PG3 PF19
  52. * GPIO_20 PG4 PF20
  53. * GPIO_21 PG5 PF21
  54. * GPIO_22 PG6 PF22
  55. * GPIO_23 PG7 PF23
  56. * GPIO_24 PG8 PF24
  57. * GPIO_25 PG9 PF25
  58. * GPIO_26 PG10 PF26
  59. * GPIO_27 PG11 PF27
  60. * GPIO_28 PG12 PF28
  61. * GPIO_29 PG13 PF29
  62. * GPIO_30 PG14 PF30
  63. * GPIO_31 PG15 PF31
  64. * GPIO_32 PH0 PF32
  65. * GPIO_33 PH1 PF33
  66. * GPIO_34 PH2 PF34
  67. * GPIO_35 PH3 PF35
  68. * GPIO_36 PH4 PF36
  69. * GPIO_37 PH5 PF37
  70. * GPIO_38 PH6 PF38
  71. * GPIO_39 PH7 PF39
  72. * GPIO_40 PH8 PF40
  73. * GPIO_41 PH9 PF41
  74. * GPIO_42 PH10 PF42
  75. * GPIO_43 PH11 PF43
  76. * GPIO_44 PH12 PF44
  77. * GPIO_45 PH13 PF45
  78. * GPIO_46 PH14 PF46
  79. * GPIO_47 PH15 PF47
  80. */
  81. #include <linux/delay.h>
  82. #include <linux/module.h>
  83. #include <linux/err.h>
  84. #include <linux/proc_fs.h>
  85. #include <asm/blackfin.h>
  86. #include <asm/gpio.h>
  87. #include <asm/portmux.h>
  88. #include <linux/irq.h>
  89. #if ANOMALY_05000311 || ANOMALY_05000323
  90. enum {
  91. AWA_data = SYSCR,
  92. AWA_data_clear = SYSCR,
  93. AWA_data_set = SYSCR,
  94. AWA_toggle = SYSCR,
  95. AWA_maska = BFIN_UART_SCR,
  96. AWA_maska_clear = BFIN_UART_SCR,
  97. AWA_maska_set = BFIN_UART_SCR,
  98. AWA_maska_toggle = BFIN_UART_SCR,
  99. AWA_maskb = BFIN_UART_GCTL,
  100. AWA_maskb_clear = BFIN_UART_GCTL,
  101. AWA_maskb_set = BFIN_UART_GCTL,
  102. AWA_maskb_toggle = BFIN_UART_GCTL,
  103. AWA_dir = SPORT1_STAT,
  104. AWA_polar = SPORT1_STAT,
  105. AWA_edge = SPORT1_STAT,
  106. AWA_both = SPORT1_STAT,
  107. #if ANOMALY_05000311
  108. AWA_inen = TIMER_ENABLE,
  109. #elif ANOMALY_05000323
  110. AWA_inen = DMA1_1_CONFIG,
  111. #endif
  112. };
  113. /* Anomaly Workaround */
  114. #define AWA_DUMMY_READ(name) bfin_read16(AWA_ ## name)
  115. #else
  116. #define AWA_DUMMY_READ(...) do { } while (0)
  117. #endif
  118. #if defined(BF533_FAMILY) || defined(BF538_FAMILY)
  119. static struct gpio_port_t *gpio_bankb[] = {
  120. (struct gpio_port_t *) FIO_FLAG_D,
  121. };
  122. #endif
  123. #if defined(BF527_FAMILY) || defined(BF537_FAMILY) || defined(BF518_FAMILY)
  124. static struct gpio_port_t *gpio_bankb[] = {
  125. (struct gpio_port_t *) PORTFIO,
  126. (struct gpio_port_t *) PORTGIO,
  127. (struct gpio_port_t *) PORTHIO,
  128. };
  129. static unsigned short *port_fer[] = {
  130. (unsigned short *) PORTF_FER,
  131. (unsigned short *) PORTG_FER,
  132. (unsigned short *) PORTH_FER,
  133. };
  134. #endif
  135. #if defined(BF527_FAMILY) || defined(BF518_FAMILY)
  136. static unsigned short *port_mux[] = {
  137. (unsigned short *) PORTF_MUX,
  138. (unsigned short *) PORTG_MUX,
  139. (unsigned short *) PORTH_MUX,
  140. };
  141. static const
  142. u8 pmux_offset[][16] =
  143. {{ 0, 0, 0, 0, 0, 0, 0, 0, 2, 2, 4, 6, 8, 8, 10, 10 }, /* PORTF */
  144. { 0, 0, 0, 0, 0, 2, 2, 4, 4, 6, 8, 10, 10, 10, 12, 12 }, /* PORTG */
  145. { 0, 0, 0, 0, 0, 0, 0, 0, 2, 4, 4, 4, 4, 4, 4, 4 }, /* PORTH */
  146. };
  147. #endif
  148. #ifdef BF561_FAMILY
  149. static struct gpio_port_t *gpio_bankb[] = {
  150. (struct gpio_port_t *) FIO0_FLAG_D,
  151. (struct gpio_port_t *) FIO1_FLAG_D,
  152. (struct gpio_port_t *) FIO2_FLAG_D,
  153. };
  154. #endif
  155. #ifdef BF548_FAMILY
  156. static struct gpio_port_t *gpio_array[] = {
  157. (struct gpio_port_t *)PORTA_FER,
  158. (struct gpio_port_t *)PORTB_FER,
  159. (struct gpio_port_t *)PORTC_FER,
  160. (struct gpio_port_t *)PORTD_FER,
  161. (struct gpio_port_t *)PORTE_FER,
  162. (struct gpio_port_t *)PORTF_FER,
  163. (struct gpio_port_t *)PORTG_FER,
  164. (struct gpio_port_t *)PORTH_FER,
  165. (struct gpio_port_t *)PORTI_FER,
  166. (struct gpio_port_t *)PORTJ_FER,
  167. };
  168. #endif
  169. static unsigned short reserved_gpio_map[GPIO_BANK_NUM];
  170. static unsigned short reserved_peri_map[gpio_bank(MAX_RESOURCES)];
  171. static unsigned short reserved_gpio_irq_map[GPIO_BANK_NUM];
  172. #define RESOURCE_LABEL_SIZE 16
  173. static struct str_ident {
  174. char name[RESOURCE_LABEL_SIZE];
  175. } str_ident[MAX_RESOURCES];
  176. #if defined(CONFIG_PM)
  177. #if defined(CONFIG_BF54x)
  178. static struct gpio_port_s gpio_bank_saved[GPIO_BANK_NUM];
  179. #else
  180. static unsigned short wakeup_map[GPIO_BANK_NUM];
  181. static unsigned char wakeup_flags_map[MAX_BLACKFIN_GPIOS];
  182. static struct gpio_port_s gpio_bank_saved[GPIO_BANK_NUM];
  183. #ifdef BF533_FAMILY
  184. static unsigned int sic_iwr_irqs[] = {IRQ_PROG_INTB};
  185. #endif
  186. #ifdef BF537_FAMILY
  187. static unsigned int sic_iwr_irqs[] = {IRQ_PROG_INTB, IRQ_PORTG_INTB, IRQ_MAC_TX};
  188. #endif
  189. #ifdef BF538_FAMILY
  190. static unsigned int sic_iwr_irqs[] = {IRQ_PORTF_INTB};
  191. #endif
  192. #if defined(BF527_FAMILY) || defined(BF518_FAMILY)
  193. static unsigned int sic_iwr_irqs[] = {IRQ_PORTF_INTB, IRQ_PORTG_INTB, IRQ_PORTH_INTB};
  194. #endif
  195. #ifdef BF561_FAMILY
  196. static unsigned int sic_iwr_irqs[] = {IRQ_PROG0_INTB, IRQ_PROG1_INTB, IRQ_PROG2_INTB};
  197. #endif
  198. #endif
  199. #endif /* CONFIG_PM */
  200. inline int check_gpio(unsigned gpio)
  201. {
  202. #if defined(BF548_FAMILY)
  203. if (gpio == GPIO_PB15 || gpio == GPIO_PC14 || gpio == GPIO_PC15
  204. || gpio == GPIO_PH14 || gpio == GPIO_PH15
  205. || gpio == GPIO_PJ14 || gpio == GPIO_PJ15)
  206. return -EINVAL;
  207. #endif
  208. if (gpio >= MAX_BLACKFIN_GPIOS)
  209. return -EINVAL;
  210. return 0;
  211. }
  212. static void gpio_error(unsigned gpio)
  213. {
  214. printk(KERN_ERR "bfin-gpio: GPIO %d wasn't requested!\n", gpio);
  215. }
  216. static void set_label(unsigned short ident, const char *label)
  217. {
  218. if (label) {
  219. strncpy(str_ident[ident].name, label,
  220. RESOURCE_LABEL_SIZE);
  221. str_ident[ident].name[RESOURCE_LABEL_SIZE - 1] = 0;
  222. }
  223. }
  224. static char *get_label(unsigned short ident)
  225. {
  226. return (*str_ident[ident].name ? str_ident[ident].name : "UNKNOWN");
  227. }
  228. static int cmp_label(unsigned short ident, const char *label)
  229. {
  230. if (label == NULL) {
  231. dump_stack();
  232. printk(KERN_ERR "Please provide none-null label\n");
  233. }
  234. if (label)
  235. return strcmp(str_ident[ident].name, label);
  236. else
  237. return -EINVAL;
  238. }
  239. static void port_setup(unsigned gpio, unsigned short usage)
  240. {
  241. if (check_gpio(gpio))
  242. return;
  243. #if defined(BF527_FAMILY) || defined(BF537_FAMILY) || defined(BF518_FAMILY)
  244. if (usage == GPIO_USAGE)
  245. *port_fer[gpio_bank(gpio)] &= ~gpio_bit(gpio);
  246. else
  247. *port_fer[gpio_bank(gpio)] |= gpio_bit(gpio);
  248. SSYNC();
  249. #elif defined(BF548_FAMILY)
  250. if (usage == GPIO_USAGE)
  251. gpio_array[gpio_bank(gpio)]->port_fer &= ~gpio_bit(gpio);
  252. else
  253. gpio_array[gpio_bank(gpio)]->port_fer |= gpio_bit(gpio);
  254. SSYNC();
  255. #endif
  256. }
  257. #ifdef BF537_FAMILY
  258. static struct {
  259. unsigned short res;
  260. unsigned short offset;
  261. } port_mux_lut[] = {
  262. {.res = P_PPI0_D13, .offset = 11},
  263. {.res = P_PPI0_D14, .offset = 11},
  264. {.res = P_PPI0_D15, .offset = 11},
  265. {.res = P_SPORT1_TFS, .offset = 11},
  266. {.res = P_SPORT1_TSCLK, .offset = 11},
  267. {.res = P_SPORT1_DTPRI, .offset = 11},
  268. {.res = P_PPI0_D10, .offset = 10},
  269. {.res = P_PPI0_D11, .offset = 10},
  270. {.res = P_PPI0_D12, .offset = 10},
  271. {.res = P_SPORT1_RSCLK, .offset = 10},
  272. {.res = P_SPORT1_RFS, .offset = 10},
  273. {.res = P_SPORT1_DRPRI, .offset = 10},
  274. {.res = P_PPI0_D8, .offset = 9},
  275. {.res = P_PPI0_D9, .offset = 9},
  276. {.res = P_SPORT1_DRSEC, .offset = 9},
  277. {.res = P_SPORT1_DTSEC, .offset = 9},
  278. {.res = P_TMR2, .offset = 8},
  279. {.res = P_PPI0_FS3, .offset = 8},
  280. {.res = P_TMR3, .offset = 7},
  281. {.res = P_SPI0_SSEL4, .offset = 7},
  282. {.res = P_TMR4, .offset = 6},
  283. {.res = P_SPI0_SSEL5, .offset = 6},
  284. {.res = P_TMR5, .offset = 5},
  285. {.res = P_SPI0_SSEL6, .offset = 5},
  286. {.res = P_UART1_RX, .offset = 4},
  287. {.res = P_UART1_TX, .offset = 4},
  288. {.res = P_TMR6, .offset = 4},
  289. {.res = P_TMR7, .offset = 4},
  290. {.res = P_UART0_RX, .offset = 3},
  291. {.res = P_UART0_TX, .offset = 3},
  292. {.res = P_DMAR0, .offset = 3},
  293. {.res = P_DMAR1, .offset = 3},
  294. {.res = P_SPORT0_DTSEC, .offset = 1},
  295. {.res = P_SPORT0_DRSEC, .offset = 1},
  296. {.res = P_CAN0_RX, .offset = 1},
  297. {.res = P_CAN0_TX, .offset = 1},
  298. {.res = P_SPI0_SSEL7, .offset = 1},
  299. {.res = P_SPORT0_TFS, .offset = 0},
  300. {.res = P_SPORT0_DTPRI, .offset = 0},
  301. {.res = P_SPI0_SSEL2, .offset = 0},
  302. {.res = P_SPI0_SSEL3, .offset = 0},
  303. };
  304. static void portmux_setup(unsigned short per, unsigned short function)
  305. {
  306. u16 y, offset, muxreg;
  307. for (y = 0; y < ARRAY_SIZE(port_mux_lut); y++) {
  308. if (port_mux_lut[y].res == per) {
  309. /* SET PORTMUX REG */
  310. offset = port_mux_lut[y].offset;
  311. muxreg = bfin_read_PORT_MUX();
  312. if (offset != 1)
  313. muxreg &= ~(1 << offset);
  314. else
  315. muxreg &= ~(3 << 1);
  316. muxreg |= (function << offset);
  317. bfin_write_PORT_MUX(muxreg);
  318. }
  319. }
  320. }
  321. #elif defined(BF548_FAMILY)
  322. inline void portmux_setup(unsigned short portno, unsigned short function)
  323. {
  324. u32 pmux;
  325. pmux = gpio_array[gpio_bank(portno)]->port_mux;
  326. pmux &= ~(0x3 << (2 * gpio_sub_n(portno)));
  327. pmux |= (function & 0x3) << (2 * gpio_sub_n(portno));
  328. gpio_array[gpio_bank(portno)]->port_mux = pmux;
  329. }
  330. inline u16 get_portmux(unsigned short portno)
  331. {
  332. u32 pmux;
  333. pmux = gpio_array[gpio_bank(portno)]->port_mux;
  334. return (pmux >> (2 * gpio_sub_n(portno)) & 0x3);
  335. }
  336. #elif defined(BF527_FAMILY) || defined(BF518_FAMILY)
  337. inline void portmux_setup(unsigned short portno, unsigned short function)
  338. {
  339. u16 pmux, ident = P_IDENT(portno);
  340. u8 offset = pmux_offset[gpio_bank(ident)][gpio_sub_n(ident)];
  341. pmux = *port_mux[gpio_bank(ident)];
  342. pmux &= ~(3 << offset);
  343. pmux |= (function & 3) << offset;
  344. *port_mux[gpio_bank(ident)] = pmux;
  345. SSYNC();
  346. }
  347. #else
  348. # define portmux_setup(...) do { } while (0)
  349. #endif
  350. static int __init bfin_gpio_init(void)
  351. {
  352. printk(KERN_INFO "Blackfin GPIO Controller\n");
  353. return 0;
  354. }
  355. arch_initcall(bfin_gpio_init);
  356. #ifndef BF548_FAMILY
  357. /***********************************************************
  358. *
  359. * FUNCTIONS: Blackfin General Purpose Ports Access Functions
  360. *
  361. * INPUTS/OUTPUTS:
  362. * gpio - GPIO Number between 0 and MAX_BLACKFIN_GPIOS
  363. *
  364. *
  365. * DESCRIPTION: These functions abstract direct register access
  366. * to Blackfin processor General Purpose
  367. * Ports Regsiters
  368. *
  369. * CAUTION: These functions do not belong to the GPIO Driver API
  370. *************************************************************
  371. * MODIFICATION HISTORY :
  372. **************************************************************/
  373. /* Set a specific bit */
  374. #define SET_GPIO(name) \
  375. void set_gpio_ ## name(unsigned gpio, unsigned short arg) \
  376. { \
  377. unsigned long flags; \
  378. local_irq_save_hw(flags); \
  379. if (arg) \
  380. gpio_bankb[gpio_bank(gpio)]->name |= gpio_bit(gpio); \
  381. else \
  382. gpio_bankb[gpio_bank(gpio)]->name &= ~gpio_bit(gpio); \
  383. AWA_DUMMY_READ(name); \
  384. local_irq_restore_hw(flags); \
  385. } \
  386. EXPORT_SYMBOL(set_gpio_ ## name);
  387. SET_GPIO(dir)
  388. SET_GPIO(inen)
  389. SET_GPIO(polar)
  390. SET_GPIO(edge)
  391. SET_GPIO(both)
  392. #if ANOMALY_05000311 || ANOMALY_05000323
  393. #define SET_GPIO_SC(name) \
  394. void set_gpio_ ## name(unsigned gpio, unsigned short arg) \
  395. { \
  396. unsigned long flags; \
  397. local_irq_save_hw(flags); \
  398. if (arg) \
  399. gpio_bankb[gpio_bank(gpio)]->name ## _set = gpio_bit(gpio); \
  400. else \
  401. gpio_bankb[gpio_bank(gpio)]->name ## _clear = gpio_bit(gpio); \
  402. AWA_DUMMY_READ(name); \
  403. local_irq_restore_hw(flags); \
  404. } \
  405. EXPORT_SYMBOL(set_gpio_ ## name);
  406. #else
  407. #define SET_GPIO_SC(name) \
  408. void set_gpio_ ## name(unsigned gpio, unsigned short arg) \
  409. { \
  410. if (arg) \
  411. gpio_bankb[gpio_bank(gpio)]->name ## _set = gpio_bit(gpio); \
  412. else \
  413. gpio_bankb[gpio_bank(gpio)]->name ## _clear = gpio_bit(gpio); \
  414. } \
  415. EXPORT_SYMBOL(set_gpio_ ## name);
  416. #endif
  417. SET_GPIO_SC(maska)
  418. SET_GPIO_SC(maskb)
  419. SET_GPIO_SC(data)
  420. #if ANOMALY_05000311 || ANOMALY_05000323
  421. void set_gpio_toggle(unsigned gpio)
  422. {
  423. unsigned long flags;
  424. local_irq_save_hw(flags);
  425. gpio_bankb[gpio_bank(gpio)]->toggle = gpio_bit(gpio);
  426. AWA_DUMMY_READ(toggle);
  427. local_irq_restore_hw(flags);
  428. }
  429. #else
  430. void set_gpio_toggle(unsigned gpio)
  431. {
  432. gpio_bankb[gpio_bank(gpio)]->toggle = gpio_bit(gpio);
  433. }
  434. #endif
  435. EXPORT_SYMBOL(set_gpio_toggle);
  436. /*Set current PORT date (16-bit word)*/
  437. #if ANOMALY_05000311 || ANOMALY_05000323
  438. #define SET_GPIO_P(name) \
  439. void set_gpiop_ ## name(unsigned gpio, unsigned short arg) \
  440. { \
  441. unsigned long flags; \
  442. local_irq_save_hw(flags); \
  443. gpio_bankb[gpio_bank(gpio)]->name = arg; \
  444. AWA_DUMMY_READ(name); \
  445. local_irq_restore_hw(flags); \
  446. } \
  447. EXPORT_SYMBOL(set_gpiop_ ## name);
  448. #else
  449. #define SET_GPIO_P(name) \
  450. void set_gpiop_ ## name(unsigned gpio, unsigned short arg) \
  451. { \
  452. gpio_bankb[gpio_bank(gpio)]->name = arg; \
  453. } \
  454. EXPORT_SYMBOL(set_gpiop_ ## name);
  455. #endif
  456. SET_GPIO_P(data)
  457. SET_GPIO_P(dir)
  458. SET_GPIO_P(inen)
  459. SET_GPIO_P(polar)
  460. SET_GPIO_P(edge)
  461. SET_GPIO_P(both)
  462. SET_GPIO_P(maska)
  463. SET_GPIO_P(maskb)
  464. /* Get a specific bit */
  465. #if ANOMALY_05000311 || ANOMALY_05000323
  466. #define GET_GPIO(name) \
  467. unsigned short get_gpio_ ## name(unsigned gpio) \
  468. { \
  469. unsigned long flags; \
  470. unsigned short ret; \
  471. local_irq_save_hw(flags); \
  472. ret = 0x01 & (gpio_bankb[gpio_bank(gpio)]->name >> gpio_sub_n(gpio)); \
  473. AWA_DUMMY_READ(name); \
  474. local_irq_restore_hw(flags); \
  475. return ret; \
  476. } \
  477. EXPORT_SYMBOL(get_gpio_ ## name);
  478. #else
  479. #define GET_GPIO(name) \
  480. unsigned short get_gpio_ ## name(unsigned gpio) \
  481. { \
  482. return (0x01 & (gpio_bankb[gpio_bank(gpio)]->name >> gpio_sub_n(gpio))); \
  483. } \
  484. EXPORT_SYMBOL(get_gpio_ ## name);
  485. #endif
  486. GET_GPIO(data)
  487. GET_GPIO(dir)
  488. GET_GPIO(inen)
  489. GET_GPIO(polar)
  490. GET_GPIO(edge)
  491. GET_GPIO(both)
  492. GET_GPIO(maska)
  493. GET_GPIO(maskb)
  494. /*Get current PORT date (16-bit word)*/
  495. #if ANOMALY_05000311 || ANOMALY_05000323
  496. #define GET_GPIO_P(name) \
  497. unsigned short get_gpiop_ ## name(unsigned gpio) \
  498. { \
  499. unsigned long flags; \
  500. unsigned short ret; \
  501. local_irq_save_hw(flags); \
  502. ret = (gpio_bankb[gpio_bank(gpio)]->name); \
  503. AWA_DUMMY_READ(name); \
  504. local_irq_restore_hw(flags); \
  505. return ret; \
  506. } \
  507. EXPORT_SYMBOL(get_gpiop_ ## name);
  508. #else
  509. #define GET_GPIO_P(name) \
  510. unsigned short get_gpiop_ ## name(unsigned gpio) \
  511. { \
  512. return (gpio_bankb[gpio_bank(gpio)]->name);\
  513. } \
  514. EXPORT_SYMBOL(get_gpiop_ ## name);
  515. #endif
  516. GET_GPIO_P(data)
  517. GET_GPIO_P(dir)
  518. GET_GPIO_P(inen)
  519. GET_GPIO_P(polar)
  520. GET_GPIO_P(edge)
  521. GET_GPIO_P(both)
  522. GET_GPIO_P(maska)
  523. GET_GPIO_P(maskb)
  524. #ifdef CONFIG_PM
  525. /***********************************************************
  526. *
  527. * FUNCTIONS: Blackfin PM Setup API
  528. *
  529. * INPUTS/OUTPUTS:
  530. * gpio - GPIO Number between 0 and MAX_BLACKFIN_GPIOS
  531. * type -
  532. * PM_WAKE_RISING
  533. * PM_WAKE_FALLING
  534. * PM_WAKE_HIGH
  535. * PM_WAKE_LOW
  536. * PM_WAKE_BOTH_EDGES
  537. *
  538. * DESCRIPTION: Blackfin PM Driver API
  539. *
  540. * CAUTION:
  541. *************************************************************
  542. * MODIFICATION HISTORY :
  543. **************************************************************/
  544. int gpio_pm_wakeup_request(unsigned gpio, unsigned char type)
  545. {
  546. unsigned long flags;
  547. if ((check_gpio(gpio) < 0) || !type)
  548. return -EINVAL;
  549. local_irq_save_hw(flags);
  550. wakeup_map[gpio_bank(gpio)] |= gpio_bit(gpio);
  551. wakeup_flags_map[gpio] = type;
  552. local_irq_restore_hw(flags);
  553. return 0;
  554. }
  555. EXPORT_SYMBOL(gpio_pm_wakeup_request);
  556. void gpio_pm_wakeup_free(unsigned gpio)
  557. {
  558. unsigned long flags;
  559. if (check_gpio(gpio) < 0)
  560. return;
  561. local_irq_save_hw(flags);
  562. wakeup_map[gpio_bank(gpio)] &= ~gpio_bit(gpio);
  563. local_irq_restore_hw(flags);
  564. }
  565. EXPORT_SYMBOL(gpio_pm_wakeup_free);
  566. static int bfin_gpio_wakeup_type(unsigned gpio, unsigned char type)
  567. {
  568. port_setup(gpio, GPIO_USAGE);
  569. set_gpio_dir(gpio, 0);
  570. set_gpio_inen(gpio, 1);
  571. if (type & (PM_WAKE_RISING | PM_WAKE_FALLING))
  572. set_gpio_edge(gpio, 1);
  573. else
  574. set_gpio_edge(gpio, 0);
  575. if ((type & (PM_WAKE_BOTH_EDGES)) == (PM_WAKE_BOTH_EDGES))
  576. set_gpio_both(gpio, 1);
  577. else
  578. set_gpio_both(gpio, 0);
  579. if ((type & (PM_WAKE_FALLING | PM_WAKE_LOW)))
  580. set_gpio_polar(gpio, 1);
  581. else
  582. set_gpio_polar(gpio, 0);
  583. SSYNC();
  584. return 0;
  585. }
  586. u32 bfin_pm_standby_setup(void)
  587. {
  588. u16 bank, mask, i, gpio;
  589. for (i = 0; i < MAX_BLACKFIN_GPIOS; i += GPIO_BANKSIZE) {
  590. mask = wakeup_map[gpio_bank(i)];
  591. bank = gpio_bank(i);
  592. gpio_bank_saved[bank].maskb = gpio_bankb[bank]->maskb;
  593. gpio_bankb[bank]->maskb = 0;
  594. if (mask) {
  595. #if defined(BF527_FAMILY) || defined(BF537_FAMILY) || defined(BF518_FAMILY)
  596. gpio_bank_saved[bank].fer = *port_fer[bank];
  597. #endif
  598. gpio_bank_saved[bank].inen = gpio_bankb[bank]->inen;
  599. gpio_bank_saved[bank].polar = gpio_bankb[bank]->polar;
  600. gpio_bank_saved[bank].dir = gpio_bankb[bank]->dir;
  601. gpio_bank_saved[bank].edge = gpio_bankb[bank]->edge;
  602. gpio_bank_saved[bank].both = gpio_bankb[bank]->both;
  603. gpio_bank_saved[bank].reserved =
  604. reserved_gpio_map[bank];
  605. gpio = i;
  606. while (mask) {
  607. if ((mask & 1) && (wakeup_flags_map[gpio] !=
  608. PM_WAKE_IGNORE)) {
  609. reserved_gpio_map[gpio_bank(gpio)] |=
  610. gpio_bit(gpio);
  611. bfin_gpio_wakeup_type(gpio,
  612. wakeup_flags_map[gpio]);
  613. set_gpio_data(gpio, 0); /*Clear*/
  614. }
  615. gpio++;
  616. mask >>= 1;
  617. }
  618. bfin_internal_set_wake(sic_iwr_irqs[bank], 1);
  619. gpio_bankb[bank]->maskb_set = wakeup_map[gpio_bank(i)];
  620. }
  621. }
  622. AWA_DUMMY_READ(maskb_set);
  623. return 0;
  624. }
  625. void bfin_pm_standby_restore(void)
  626. {
  627. u16 bank, mask, i;
  628. for (i = 0; i < MAX_BLACKFIN_GPIOS; i += GPIO_BANKSIZE) {
  629. mask = wakeup_map[gpio_bank(i)];
  630. bank = gpio_bank(i);
  631. if (mask) {
  632. #if defined(BF527_FAMILY) || defined(BF537_FAMILY) || defined(BF518_FAMILY)
  633. *port_fer[bank] = gpio_bank_saved[bank].fer;
  634. #endif
  635. gpio_bankb[bank]->inen = gpio_bank_saved[bank].inen;
  636. gpio_bankb[bank]->dir = gpio_bank_saved[bank].dir;
  637. gpio_bankb[bank]->polar = gpio_bank_saved[bank].polar;
  638. gpio_bankb[bank]->edge = gpio_bank_saved[bank].edge;
  639. gpio_bankb[bank]->both = gpio_bank_saved[bank].both;
  640. reserved_gpio_map[bank] =
  641. gpio_bank_saved[bank].reserved;
  642. bfin_internal_set_wake(sic_iwr_irqs[bank], 0);
  643. }
  644. gpio_bankb[bank]->maskb = gpio_bank_saved[bank].maskb;
  645. }
  646. AWA_DUMMY_READ(maskb);
  647. }
  648. void bfin_gpio_pm_hibernate_suspend(void)
  649. {
  650. int i, bank;
  651. for (i = 0; i < MAX_BLACKFIN_GPIOS; i += GPIO_BANKSIZE) {
  652. bank = gpio_bank(i);
  653. #if defined(BF527_FAMILY) || defined(BF537_FAMILY) || defined(BF518_FAMILY)
  654. gpio_bank_saved[bank].fer = *port_fer[bank];
  655. #if defined(BF527_FAMILY) || defined(BF518_FAMILY)
  656. gpio_bank_saved[bank].mux = *port_mux[bank];
  657. #else
  658. if (bank == 0)
  659. gpio_bank_saved[bank].mux = bfin_read_PORT_MUX();
  660. #endif
  661. #endif
  662. gpio_bank_saved[bank].data = gpio_bankb[bank]->data;
  663. gpio_bank_saved[bank].inen = gpio_bankb[bank]->inen;
  664. gpio_bank_saved[bank].polar = gpio_bankb[bank]->polar;
  665. gpio_bank_saved[bank].dir = gpio_bankb[bank]->dir;
  666. gpio_bank_saved[bank].edge = gpio_bankb[bank]->edge;
  667. gpio_bank_saved[bank].both = gpio_bankb[bank]->both;
  668. gpio_bank_saved[bank].maska = gpio_bankb[bank]->maska;
  669. }
  670. AWA_DUMMY_READ(maska);
  671. }
  672. void bfin_gpio_pm_hibernate_restore(void)
  673. {
  674. int i, bank;
  675. for (i = 0; i < MAX_BLACKFIN_GPIOS; i += GPIO_BANKSIZE) {
  676. bank = gpio_bank(i);
  677. #if defined(BF527_FAMILY) || defined(BF537_FAMILY) || defined(BF518_FAMILY)
  678. #if defined(BF527_FAMILY) || defined(BF518_FAMILY)
  679. *port_mux[bank] = gpio_bank_saved[bank].mux;
  680. #else
  681. if (bank == 0)
  682. bfin_write_PORT_MUX(gpio_bank_saved[bank].mux);
  683. #endif
  684. *port_fer[bank] = gpio_bank_saved[bank].fer;
  685. #endif
  686. gpio_bankb[bank]->inen = gpio_bank_saved[bank].inen;
  687. gpio_bankb[bank]->dir = gpio_bank_saved[bank].dir;
  688. gpio_bankb[bank]->polar = gpio_bank_saved[bank].polar;
  689. gpio_bankb[bank]->edge = gpio_bank_saved[bank].edge;
  690. gpio_bankb[bank]->both = gpio_bank_saved[bank].both;
  691. gpio_bankb[bank]->data_set = gpio_bank_saved[bank].data
  692. | gpio_bank_saved[bank].dir;
  693. gpio_bankb[bank]->maska = gpio_bank_saved[bank].maska;
  694. }
  695. AWA_DUMMY_READ(maska);
  696. }
  697. #endif
  698. #else /* BF548_FAMILY */
  699. #ifdef CONFIG_PM
  700. u32 bfin_pm_standby_setup(void)
  701. {
  702. return 0;
  703. }
  704. void bfin_pm_standby_restore(void)
  705. {
  706. }
  707. void bfin_gpio_pm_hibernate_suspend(void)
  708. {
  709. int i, bank;
  710. for (i = 0; i < MAX_BLACKFIN_GPIOS; i += GPIO_BANKSIZE) {
  711. bank = gpio_bank(i);
  712. gpio_bank_saved[bank].fer = gpio_array[bank]->port_fer;
  713. gpio_bank_saved[bank].mux = gpio_array[bank]->port_mux;
  714. gpio_bank_saved[bank].data = gpio_array[bank]->port_data;
  715. gpio_bank_saved[bank].data = gpio_array[bank]->port_data;
  716. gpio_bank_saved[bank].inen = gpio_array[bank]->port_inen;
  717. gpio_bank_saved[bank].dir = gpio_array[bank]->port_dir_set;
  718. }
  719. }
  720. void bfin_gpio_pm_hibernate_restore(void)
  721. {
  722. int i, bank;
  723. for (i = 0; i < MAX_BLACKFIN_GPIOS; i += GPIO_BANKSIZE) {
  724. bank = gpio_bank(i);
  725. gpio_array[bank]->port_mux = gpio_bank_saved[bank].mux;
  726. gpio_array[bank]->port_fer = gpio_bank_saved[bank].fer;
  727. gpio_array[bank]->port_inen = gpio_bank_saved[bank].inen;
  728. gpio_array[bank]->port_dir_set = gpio_bank_saved[bank].dir;
  729. gpio_array[bank]->port_set = gpio_bank_saved[bank].data
  730. | gpio_bank_saved[bank].dir;
  731. }
  732. }
  733. #endif
  734. unsigned short get_gpio_dir(unsigned gpio)
  735. {
  736. return (0x01 & (gpio_array[gpio_bank(gpio)]->port_dir_clear >> gpio_sub_n(gpio)));
  737. }
  738. EXPORT_SYMBOL(get_gpio_dir);
  739. #endif /* BF548_FAMILY */
  740. /***********************************************************
  741. *
  742. * FUNCTIONS: Blackfin Peripheral Resource Allocation
  743. * and PortMux Setup
  744. *
  745. * INPUTS/OUTPUTS:
  746. * per Peripheral Identifier
  747. * label String
  748. *
  749. * DESCRIPTION: Blackfin Peripheral Resource Allocation and Setup API
  750. *
  751. * CAUTION:
  752. *************************************************************
  753. * MODIFICATION HISTORY :
  754. **************************************************************/
  755. int peripheral_request(unsigned short per, const char *label)
  756. {
  757. unsigned long flags;
  758. unsigned short ident = P_IDENT(per);
  759. /*
  760. * Don't cares are pins with only one dedicated function
  761. */
  762. if (per & P_DONTCARE)
  763. return 0;
  764. if (!(per & P_DEFINED))
  765. return -ENODEV;
  766. local_irq_save_hw(flags);
  767. /* If a pin can be muxed as either GPIO or peripheral, make
  768. * sure it is not already a GPIO pin when we request it.
  769. */
  770. if (unlikely(!check_gpio(ident) &&
  771. reserved_gpio_map[gpio_bank(ident)] & gpio_bit(ident))) {
  772. dump_stack();
  773. printk(KERN_ERR
  774. "%s: Peripheral %d is already reserved as GPIO by %s !\n",
  775. __func__, ident, get_label(ident));
  776. local_irq_restore_hw(flags);
  777. return -EBUSY;
  778. }
  779. if (unlikely(reserved_peri_map[gpio_bank(ident)] & gpio_bit(ident))) {
  780. /*
  781. * Pin functions like AMC address strobes my
  782. * be requested and used by several drivers
  783. */
  784. #ifdef BF548_FAMILY
  785. u16 funct = get_portmux(ident);
  786. if (!((per & P_MAYSHARE) && (funct == P_FUNCT2MUX(per)))) {
  787. #else
  788. if (!(per & P_MAYSHARE)) {
  789. #endif
  790. /*
  791. * Allow that the identical pin function can
  792. * be requested from the same driver twice
  793. */
  794. if (cmp_label(ident, label) == 0)
  795. goto anyway;
  796. dump_stack();
  797. printk(KERN_ERR
  798. "%s: Peripheral %d function %d is already reserved by %s !\n",
  799. __func__, ident, P_FUNCT2MUX(per), get_label(ident));
  800. local_irq_restore_hw(flags);
  801. return -EBUSY;
  802. }
  803. }
  804. anyway:
  805. reserved_peri_map[gpio_bank(ident)] |= gpio_bit(ident);
  806. #ifdef BF548_FAMILY
  807. portmux_setup(ident, P_FUNCT2MUX(per));
  808. #else
  809. portmux_setup(per, P_FUNCT2MUX(per));
  810. #endif
  811. port_setup(ident, PERIPHERAL_USAGE);
  812. local_irq_restore_hw(flags);
  813. set_label(ident, label);
  814. return 0;
  815. }
  816. EXPORT_SYMBOL(peripheral_request);
  817. int peripheral_request_list(const unsigned short per[], const char *label)
  818. {
  819. u16 cnt;
  820. int ret;
  821. for (cnt = 0; per[cnt] != 0; cnt++) {
  822. ret = peripheral_request(per[cnt], label);
  823. if (ret < 0) {
  824. for ( ; cnt > 0; cnt--)
  825. peripheral_free(per[cnt - 1]);
  826. return ret;
  827. }
  828. }
  829. return 0;
  830. }
  831. EXPORT_SYMBOL(peripheral_request_list);
  832. void peripheral_free(unsigned short per)
  833. {
  834. unsigned long flags;
  835. unsigned short ident = P_IDENT(per);
  836. if (per & P_DONTCARE)
  837. return;
  838. if (!(per & P_DEFINED))
  839. return;
  840. if (check_gpio(ident) < 0)
  841. return;
  842. local_irq_save_hw(flags);
  843. if (unlikely(!(reserved_peri_map[gpio_bank(ident)] & gpio_bit(ident)))) {
  844. local_irq_restore_hw(flags);
  845. return;
  846. }
  847. if (!(per & P_MAYSHARE))
  848. port_setup(ident, GPIO_USAGE);
  849. reserved_peri_map[gpio_bank(ident)] &= ~gpio_bit(ident);
  850. set_label(ident, "free");
  851. local_irq_restore_hw(flags);
  852. }
  853. EXPORT_SYMBOL(peripheral_free);
  854. void peripheral_free_list(const unsigned short per[])
  855. {
  856. u16 cnt;
  857. for (cnt = 0; per[cnt] != 0; cnt++)
  858. peripheral_free(per[cnt]);
  859. }
  860. EXPORT_SYMBOL(peripheral_free_list);
  861. /***********************************************************
  862. *
  863. * FUNCTIONS: Blackfin GPIO Driver
  864. *
  865. * INPUTS/OUTPUTS:
  866. * gpio PIO Number between 0 and MAX_BLACKFIN_GPIOS
  867. * label String
  868. *
  869. * DESCRIPTION: Blackfin GPIO Driver API
  870. *
  871. * CAUTION:
  872. *************************************************************
  873. * MODIFICATION HISTORY :
  874. **************************************************************/
  875. int bfin_gpio_request(unsigned gpio, const char *label)
  876. {
  877. unsigned long flags;
  878. if (check_gpio(gpio) < 0)
  879. return -EINVAL;
  880. local_irq_save_hw(flags);
  881. /*
  882. * Allow that the identical GPIO can
  883. * be requested from the same driver twice
  884. * Do nothing and return -
  885. */
  886. if (cmp_label(gpio, label) == 0) {
  887. local_irq_restore_hw(flags);
  888. return 0;
  889. }
  890. if (unlikely(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio))) {
  891. dump_stack();
  892. printk(KERN_ERR "bfin-gpio: GPIO %d is already reserved by %s !\n",
  893. gpio, get_label(gpio));
  894. local_irq_restore_hw(flags);
  895. return -EBUSY;
  896. }
  897. if (unlikely(reserved_peri_map[gpio_bank(gpio)] & gpio_bit(gpio))) {
  898. dump_stack();
  899. printk(KERN_ERR
  900. "bfin-gpio: GPIO %d is already reserved as Peripheral by %s !\n",
  901. gpio, get_label(gpio));
  902. local_irq_restore_hw(flags);
  903. return -EBUSY;
  904. }
  905. if (unlikely(reserved_gpio_irq_map[gpio_bank(gpio)] & gpio_bit(gpio)))
  906. printk(KERN_NOTICE "bfin-gpio: GPIO %d is already reserved as gpio-irq!"
  907. " (Documentation/blackfin/bfin-gpio-notes.txt)\n", gpio);
  908. reserved_gpio_map[gpio_bank(gpio)] |= gpio_bit(gpio);
  909. set_label(gpio, label);
  910. local_irq_restore_hw(flags);
  911. port_setup(gpio, GPIO_USAGE);
  912. return 0;
  913. }
  914. EXPORT_SYMBOL(bfin_gpio_request);
  915. void bfin_gpio_free(unsigned gpio)
  916. {
  917. unsigned long flags;
  918. if (check_gpio(gpio) < 0)
  919. return;
  920. local_irq_save_hw(flags);
  921. if (unlikely(!(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio)))) {
  922. dump_stack();
  923. gpio_error(gpio);
  924. local_irq_restore_hw(flags);
  925. return;
  926. }
  927. reserved_gpio_map[gpio_bank(gpio)] &= ~gpio_bit(gpio);
  928. set_label(gpio, "free");
  929. local_irq_restore_hw(flags);
  930. }
  931. EXPORT_SYMBOL(bfin_gpio_free);
  932. int bfin_gpio_irq_request(unsigned gpio, const char *label)
  933. {
  934. unsigned long flags;
  935. if (check_gpio(gpio) < 0)
  936. return -EINVAL;
  937. local_irq_save_hw(flags);
  938. if (unlikely(reserved_gpio_irq_map[gpio_bank(gpio)] & gpio_bit(gpio))) {
  939. dump_stack();
  940. printk(KERN_ERR
  941. "bfin-gpio: GPIO %d is already reserved as gpio-irq !\n",
  942. gpio);
  943. local_irq_restore_hw(flags);
  944. return -EBUSY;
  945. }
  946. if (unlikely(reserved_peri_map[gpio_bank(gpio)] & gpio_bit(gpio))) {
  947. dump_stack();
  948. printk(KERN_ERR
  949. "bfin-gpio: GPIO %d is already reserved as Peripheral by %s !\n",
  950. gpio, get_label(gpio));
  951. local_irq_restore_hw(flags);
  952. return -EBUSY;
  953. }
  954. if (unlikely(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio)))
  955. printk(KERN_NOTICE "bfin-gpio: GPIO %d is already reserved by %s! "
  956. "(Documentation/blackfin/bfin-gpio-notes.txt)\n",
  957. gpio, get_label(gpio));
  958. reserved_gpio_irq_map[gpio_bank(gpio)] |= gpio_bit(gpio);
  959. set_label(gpio, label);
  960. local_irq_restore_hw(flags);
  961. port_setup(gpio, GPIO_USAGE);
  962. return 0;
  963. }
  964. void bfin_gpio_irq_free(unsigned gpio)
  965. {
  966. unsigned long flags;
  967. if (check_gpio(gpio) < 0)
  968. return;
  969. local_irq_save_hw(flags);
  970. if (unlikely(!(reserved_gpio_irq_map[gpio_bank(gpio)] & gpio_bit(gpio)))) {
  971. dump_stack();
  972. gpio_error(gpio);
  973. local_irq_restore_hw(flags);
  974. return;
  975. }
  976. reserved_gpio_irq_map[gpio_bank(gpio)] &= ~gpio_bit(gpio);
  977. set_label(gpio, "free");
  978. local_irq_restore_hw(flags);
  979. }
  980. #ifdef BF548_FAMILY
  981. int bfin_gpio_direction_input(unsigned gpio)
  982. {
  983. unsigned long flags;
  984. if (!(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio))) {
  985. gpio_error(gpio);
  986. return -EINVAL;
  987. }
  988. local_irq_save_hw(flags);
  989. gpio_array[gpio_bank(gpio)]->port_dir_clear = gpio_bit(gpio);
  990. gpio_array[gpio_bank(gpio)]->port_inen |= gpio_bit(gpio);
  991. local_irq_restore_hw(flags);
  992. return 0;
  993. }
  994. EXPORT_SYMBOL(bfin_gpio_direction_input);
  995. int bfin_gpio_direction_output(unsigned gpio, int value)
  996. {
  997. unsigned long flags;
  998. if (!(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio))) {
  999. gpio_error(gpio);
  1000. return -EINVAL;
  1001. }
  1002. local_irq_save_hw(flags);
  1003. gpio_array[gpio_bank(gpio)]->port_inen &= ~gpio_bit(gpio);
  1004. gpio_set_value(gpio, value);
  1005. gpio_array[gpio_bank(gpio)]->port_dir_set = gpio_bit(gpio);
  1006. local_irq_restore_hw(flags);
  1007. return 0;
  1008. }
  1009. EXPORT_SYMBOL(bfin_gpio_direction_output);
  1010. void bfin_gpio_set_value(unsigned gpio, int arg)
  1011. {
  1012. if (arg)
  1013. gpio_array[gpio_bank(gpio)]->port_set = gpio_bit(gpio);
  1014. else
  1015. gpio_array[gpio_bank(gpio)]->port_clear = gpio_bit(gpio);
  1016. }
  1017. EXPORT_SYMBOL(bfin_gpio_set_value);
  1018. int bfin_gpio_get_value(unsigned gpio)
  1019. {
  1020. return (1 & (gpio_array[gpio_bank(gpio)]->port_data >> gpio_sub_n(gpio)));
  1021. }
  1022. EXPORT_SYMBOL(bfin_gpio_get_value);
  1023. void bfin_gpio_irq_prepare(unsigned gpio)
  1024. {
  1025. unsigned long flags;
  1026. port_setup(gpio, GPIO_USAGE);
  1027. local_irq_save_hw(flags);
  1028. gpio_array[gpio_bank(gpio)]->port_dir_clear = gpio_bit(gpio);
  1029. gpio_array[gpio_bank(gpio)]->port_inen |= gpio_bit(gpio);
  1030. local_irq_restore_hw(flags);
  1031. }
  1032. #else
  1033. int bfin_gpio_get_value(unsigned gpio)
  1034. {
  1035. unsigned long flags;
  1036. int ret;
  1037. if (unlikely(get_gpio_edge(gpio))) {
  1038. local_irq_save_hw(flags);
  1039. set_gpio_edge(gpio, 0);
  1040. ret = get_gpio_data(gpio);
  1041. set_gpio_edge(gpio, 1);
  1042. local_irq_restore_hw(flags);
  1043. return ret;
  1044. } else
  1045. return get_gpio_data(gpio);
  1046. }
  1047. EXPORT_SYMBOL(bfin_gpio_get_value);
  1048. int bfin_gpio_direction_input(unsigned gpio)
  1049. {
  1050. unsigned long flags;
  1051. if (!(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio))) {
  1052. gpio_error(gpio);
  1053. return -EINVAL;
  1054. }
  1055. local_irq_save_hw(flags);
  1056. gpio_bankb[gpio_bank(gpio)]->dir &= ~gpio_bit(gpio);
  1057. gpio_bankb[gpio_bank(gpio)]->inen |= gpio_bit(gpio);
  1058. AWA_DUMMY_READ(inen);
  1059. local_irq_restore_hw(flags);
  1060. return 0;
  1061. }
  1062. EXPORT_SYMBOL(bfin_gpio_direction_input);
  1063. int bfin_gpio_direction_output(unsigned gpio, int value)
  1064. {
  1065. unsigned long flags;
  1066. if (!(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio))) {
  1067. gpio_error(gpio);
  1068. return -EINVAL;
  1069. }
  1070. local_irq_save_hw(flags);
  1071. gpio_bankb[gpio_bank(gpio)]->inen &= ~gpio_bit(gpio);
  1072. if (value)
  1073. gpio_bankb[gpio_bank(gpio)]->data_set = gpio_bit(gpio);
  1074. else
  1075. gpio_bankb[gpio_bank(gpio)]->data_clear = gpio_bit(gpio);
  1076. gpio_bankb[gpio_bank(gpio)]->dir |= gpio_bit(gpio);
  1077. AWA_DUMMY_READ(dir);
  1078. local_irq_restore_hw(flags);
  1079. return 0;
  1080. }
  1081. EXPORT_SYMBOL(bfin_gpio_direction_output);
  1082. /* If we are booting from SPI and our board lacks a strong enough pull up,
  1083. * the core can reset and execute the bootrom faster than the resistor can
  1084. * pull the signal logically high. To work around this (common) error in
  1085. * board design, we explicitly set the pin back to GPIO mode, force /CS
  1086. * high, and wait for the electrons to do their thing.
  1087. *
  1088. * This function only makes sense to be called from reset code, but it
  1089. * lives here as we need to force all the GPIO states w/out going through
  1090. * BUG() checks and such.
  1091. */
  1092. void bfin_gpio_reset_spi0_ssel1(void)
  1093. {
  1094. u16 gpio = P_IDENT(P_SPI0_SSEL1);
  1095. port_setup(gpio, GPIO_USAGE);
  1096. gpio_bankb[gpio_bank(gpio)]->data_set = gpio_bit(gpio);
  1097. AWA_DUMMY_READ(data_set);
  1098. udelay(1);
  1099. }
  1100. void bfin_gpio_irq_prepare(unsigned gpio)
  1101. {
  1102. port_setup(gpio, GPIO_USAGE);
  1103. }
  1104. #endif /*BF548_FAMILY */
  1105. #if defined(CONFIG_PROC_FS)
  1106. static int gpio_proc_read(char *buf, char **start, off_t offset,
  1107. int len, int *unused_i, void *unused_v)
  1108. {
  1109. int c, irq, gpio, outlen = 0;
  1110. for (c = 0; c < MAX_RESOURCES; c++) {
  1111. irq = reserved_gpio_irq_map[gpio_bank(c)] & gpio_bit(c);
  1112. gpio = reserved_gpio_map[gpio_bank(c)] & gpio_bit(c);
  1113. if (!check_gpio(c) && (gpio || irq))
  1114. len = sprintf(buf, "GPIO_%d: \t%s%s \t\tGPIO %s\n", c,
  1115. get_label(c), (gpio && irq) ? " *" : "",
  1116. get_gpio_dir(c) ? "OUTPUT" : "INPUT");
  1117. else if (reserved_peri_map[gpio_bank(c)] & gpio_bit(c))
  1118. len = sprintf(buf, "GPIO_%d: \t%s \t\tPeripheral\n", c, get_label(c));
  1119. else
  1120. continue;
  1121. buf += len;
  1122. outlen += len;
  1123. }
  1124. return outlen;
  1125. }
  1126. static __init int gpio_register_proc(void)
  1127. {
  1128. struct proc_dir_entry *proc_gpio;
  1129. proc_gpio = create_proc_entry("gpio", S_IRUGO, NULL);
  1130. if (proc_gpio)
  1131. proc_gpio->read_proc = gpio_proc_read;
  1132. return proc_gpio != NULL;
  1133. }
  1134. __initcall(gpio_register_proc);
  1135. #endif
  1136. #ifdef CONFIG_GPIOLIB
  1137. int bfin_gpiolib_direction_input(struct gpio_chip *chip, unsigned gpio)
  1138. {
  1139. return bfin_gpio_direction_input(gpio);
  1140. }
  1141. int bfin_gpiolib_direction_output(struct gpio_chip *chip, unsigned gpio, int level)
  1142. {
  1143. return bfin_gpio_direction_output(gpio, level);
  1144. }
  1145. int bfin_gpiolib_get_value(struct gpio_chip *chip, unsigned gpio)
  1146. {
  1147. return bfin_gpio_get_value(gpio);
  1148. }
  1149. void bfin_gpiolib_set_value(struct gpio_chip *chip, unsigned gpio, int value)
  1150. {
  1151. #ifdef BF548_FAMILY
  1152. return bfin_gpio_set_value(gpio, value);
  1153. #else
  1154. return set_gpio_data(gpio, value);
  1155. #endif
  1156. }
  1157. int bfin_gpiolib_gpio_request(struct gpio_chip *chip, unsigned gpio)
  1158. {
  1159. return bfin_gpio_request(gpio, chip->label);
  1160. }
  1161. void bfin_gpiolib_gpio_free(struct gpio_chip *chip, unsigned gpio)
  1162. {
  1163. return bfin_gpio_free(gpio);
  1164. }
  1165. static struct gpio_chip bfin_chip = {
  1166. .label = "Blackfin-GPIOlib",
  1167. .direction_input = bfin_gpiolib_direction_input,
  1168. .get = bfin_gpiolib_get_value,
  1169. .direction_output = bfin_gpiolib_direction_output,
  1170. .set = bfin_gpiolib_set_value,
  1171. .request = bfin_gpiolib_gpio_request,
  1172. .free = bfin_gpiolib_gpio_free,
  1173. .base = 0,
  1174. .ngpio = MAX_BLACKFIN_GPIOS,
  1175. };
  1176. static int __init bfin_gpiolib_setup(void)
  1177. {
  1178. return gpiochip_add(&bfin_chip);
  1179. }
  1180. arch_initcall(bfin_gpiolib_setup);
  1181. #endif