iwl-core.c 86 KB

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  1. /******************************************************************************
  2. *
  3. * GPL LICENSE SUMMARY
  4. *
  5. * Copyright(c) 2008 - 2009 Intel Corporation. All rights reserved.
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of version 2 of the GNU General Public License as
  9. * published by the Free Software Foundation.
  10. *
  11. * This program is distributed in the hope that it will be useful, but
  12. * WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  14. * General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program; if not, write to the Free Software
  18. * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
  19. * USA
  20. *
  21. * The full GNU General Public License is included in this distribution
  22. * in the file called LICENSE.GPL.
  23. *
  24. * Contact Information:
  25. * Intel Linux Wireless <ilw@linux.intel.com>
  26. * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  27. *****************************************************************************/
  28. #include <linux/kernel.h>
  29. #include <linux/module.h>
  30. #include <linux/etherdevice.h>
  31. #include <net/mac80211.h>
  32. #include "iwl-eeprom.h"
  33. #include "iwl-dev.h" /* FIXME: remove */
  34. #include "iwl-debug.h"
  35. #include "iwl-core.h"
  36. #include "iwl-io.h"
  37. #include "iwl-power.h"
  38. #include "iwl-sta.h"
  39. #include "iwl-helpers.h"
  40. MODULE_DESCRIPTION("iwl core");
  41. MODULE_VERSION(IWLWIFI_VERSION);
  42. MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
  43. MODULE_LICENSE("GPL");
  44. #define IWL_DECLARE_RATE_INFO(r, s, ip, in, rp, rn, pp, np) \
  45. [IWL_RATE_##r##M_INDEX] = { IWL_RATE_##r##M_PLCP, \
  46. IWL_RATE_SISO_##s##M_PLCP, \
  47. IWL_RATE_MIMO2_##s##M_PLCP,\
  48. IWL_RATE_MIMO3_##s##M_PLCP,\
  49. IWL_RATE_##r##M_IEEE, \
  50. IWL_RATE_##ip##M_INDEX, \
  51. IWL_RATE_##in##M_INDEX, \
  52. IWL_RATE_##rp##M_INDEX, \
  53. IWL_RATE_##rn##M_INDEX, \
  54. IWL_RATE_##pp##M_INDEX, \
  55. IWL_RATE_##np##M_INDEX }
  56. u32 iwl_debug_level;
  57. EXPORT_SYMBOL(iwl_debug_level);
  58. static irqreturn_t iwl_isr(int irq, void *data);
  59. /*
  60. * Parameter order:
  61. * rate, ht rate, prev rate, next rate, prev tgg rate, next tgg rate
  62. *
  63. * If there isn't a valid next or previous rate then INV is used which
  64. * maps to IWL_RATE_INVALID
  65. *
  66. */
  67. const struct iwl_rate_info iwl_rates[IWL_RATE_COUNT] = {
  68. IWL_DECLARE_RATE_INFO(1, INV, INV, 2, INV, 2, INV, 2), /* 1mbps */
  69. IWL_DECLARE_RATE_INFO(2, INV, 1, 5, 1, 5, 1, 5), /* 2mbps */
  70. IWL_DECLARE_RATE_INFO(5, INV, 2, 6, 2, 11, 2, 11), /*5.5mbps */
  71. IWL_DECLARE_RATE_INFO(11, INV, 9, 12, 9, 12, 5, 18), /* 11mbps */
  72. IWL_DECLARE_RATE_INFO(6, 6, 5, 9, 5, 11, 5, 11), /* 6mbps */
  73. IWL_DECLARE_RATE_INFO(9, 6, 6, 11, 6, 11, 5, 11), /* 9mbps */
  74. IWL_DECLARE_RATE_INFO(12, 12, 11, 18, 11, 18, 11, 18), /* 12mbps */
  75. IWL_DECLARE_RATE_INFO(18, 18, 12, 24, 12, 24, 11, 24), /* 18mbps */
  76. IWL_DECLARE_RATE_INFO(24, 24, 18, 36, 18, 36, 18, 36), /* 24mbps */
  77. IWL_DECLARE_RATE_INFO(36, 36, 24, 48, 24, 48, 24, 48), /* 36mbps */
  78. IWL_DECLARE_RATE_INFO(48, 48, 36, 54, 36, 54, 36, 54), /* 48mbps */
  79. IWL_DECLARE_RATE_INFO(54, 54, 48, INV, 48, INV, 48, INV),/* 54mbps */
  80. IWL_DECLARE_RATE_INFO(60, 60, 48, INV, 48, INV, 48, INV),/* 60mbps */
  81. /* FIXME:RS: ^^ should be INV (legacy) */
  82. };
  83. EXPORT_SYMBOL(iwl_rates);
  84. /**
  85. * translate ucode response to mac80211 tx status control values
  86. */
  87. void iwl_hwrate_to_tx_control(struct iwl_priv *priv, u32 rate_n_flags,
  88. struct ieee80211_tx_info *info)
  89. {
  90. struct ieee80211_tx_rate *r = &info->control.rates[0];
  91. info->antenna_sel_tx =
  92. ((rate_n_flags & RATE_MCS_ANT_ABC_MSK) >> RATE_MCS_ANT_POS);
  93. if (rate_n_flags & RATE_MCS_HT_MSK)
  94. r->flags |= IEEE80211_TX_RC_MCS;
  95. if (rate_n_flags & RATE_MCS_GF_MSK)
  96. r->flags |= IEEE80211_TX_RC_GREEN_FIELD;
  97. if (rate_n_flags & RATE_MCS_HT40_MSK)
  98. r->flags |= IEEE80211_TX_RC_40_MHZ_WIDTH;
  99. if (rate_n_flags & RATE_MCS_DUP_MSK)
  100. r->flags |= IEEE80211_TX_RC_DUP_DATA;
  101. if (rate_n_flags & RATE_MCS_SGI_MSK)
  102. r->flags |= IEEE80211_TX_RC_SHORT_GI;
  103. r->idx = iwl_hwrate_to_mac80211_idx(rate_n_flags, info->band);
  104. }
  105. EXPORT_SYMBOL(iwl_hwrate_to_tx_control);
  106. int iwl_hwrate_to_plcp_idx(u32 rate_n_flags)
  107. {
  108. int idx = 0;
  109. /* HT rate format */
  110. if (rate_n_flags & RATE_MCS_HT_MSK) {
  111. idx = (rate_n_flags & 0xff);
  112. if (idx >= IWL_RATE_MIMO3_6M_PLCP)
  113. idx = idx - IWL_RATE_MIMO3_6M_PLCP;
  114. else if (idx >= IWL_RATE_MIMO2_6M_PLCP)
  115. idx = idx - IWL_RATE_MIMO2_6M_PLCP;
  116. idx += IWL_FIRST_OFDM_RATE;
  117. /* skip 9M not supported in ht*/
  118. if (idx >= IWL_RATE_9M_INDEX)
  119. idx += 1;
  120. if ((idx >= IWL_FIRST_OFDM_RATE) && (idx <= IWL_LAST_OFDM_RATE))
  121. return idx;
  122. /* legacy rate format, search for match in table */
  123. } else {
  124. for (idx = 0; idx < ARRAY_SIZE(iwl_rates); idx++)
  125. if (iwl_rates[idx].plcp == (rate_n_flags & 0xFF))
  126. return idx;
  127. }
  128. return -1;
  129. }
  130. EXPORT_SYMBOL(iwl_hwrate_to_plcp_idx);
  131. int iwl_hwrate_to_mac80211_idx(u32 rate_n_flags, enum ieee80211_band band)
  132. {
  133. int idx = 0;
  134. int band_offset = 0;
  135. /* HT rate format: mac80211 wants an MCS number, which is just LSB */
  136. if (rate_n_flags & RATE_MCS_HT_MSK) {
  137. idx = (rate_n_flags & 0xff);
  138. return idx;
  139. /* Legacy rate format, search for match in table */
  140. } else {
  141. if (band == IEEE80211_BAND_5GHZ)
  142. band_offset = IWL_FIRST_OFDM_RATE;
  143. for (idx = band_offset; idx < IWL_RATE_COUNT_LEGACY; idx++)
  144. if (iwl_rates[idx].plcp == (rate_n_flags & 0xFF))
  145. return idx - band_offset;
  146. }
  147. return -1;
  148. }
  149. u8 iwl_toggle_tx_ant(struct iwl_priv *priv, u8 ant)
  150. {
  151. int i;
  152. u8 ind = ant;
  153. for (i = 0; i < RATE_ANT_NUM - 1; i++) {
  154. ind = (ind + 1) < RATE_ANT_NUM ? ind + 1 : 0;
  155. if (priv->hw_params.valid_tx_ant & BIT(ind))
  156. return ind;
  157. }
  158. return ant;
  159. }
  160. const u8 iwl_bcast_addr[ETH_ALEN] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF };
  161. EXPORT_SYMBOL(iwl_bcast_addr);
  162. /* This function both allocates and initializes hw and priv. */
  163. struct ieee80211_hw *iwl_alloc_all(struct iwl_cfg *cfg,
  164. struct ieee80211_ops *hw_ops)
  165. {
  166. struct iwl_priv *priv;
  167. /* mac80211 allocates memory for this device instance, including
  168. * space for this driver's private structure */
  169. struct ieee80211_hw *hw =
  170. ieee80211_alloc_hw(sizeof(struct iwl_priv), hw_ops);
  171. if (hw == NULL) {
  172. printk(KERN_ERR "%s: Can not allocate network device\n",
  173. cfg->name);
  174. goto out;
  175. }
  176. priv = hw->priv;
  177. priv->hw = hw;
  178. out:
  179. return hw;
  180. }
  181. EXPORT_SYMBOL(iwl_alloc_all);
  182. void iwl_hw_detect(struct iwl_priv *priv)
  183. {
  184. priv->hw_rev = _iwl_read32(priv, CSR_HW_REV);
  185. priv->hw_wa_rev = _iwl_read32(priv, CSR_HW_REV_WA_REG);
  186. pci_read_config_byte(priv->pci_dev, PCI_REVISION_ID, &priv->rev_id);
  187. }
  188. EXPORT_SYMBOL(iwl_hw_detect);
  189. int iwl_hw_nic_init(struct iwl_priv *priv)
  190. {
  191. unsigned long flags;
  192. struct iwl_rx_queue *rxq = &priv->rxq;
  193. int ret;
  194. /* nic_init */
  195. spin_lock_irqsave(&priv->lock, flags);
  196. priv->cfg->ops->lib->apm_ops.init(priv);
  197. iwl_write32(priv, CSR_INT_COALESCING, 512 / 32);
  198. spin_unlock_irqrestore(&priv->lock, flags);
  199. ret = priv->cfg->ops->lib->apm_ops.set_pwr_src(priv, IWL_PWR_SRC_VMAIN);
  200. priv->cfg->ops->lib->apm_ops.config(priv);
  201. /* Allocate the RX queue, or reset if it is already allocated */
  202. if (!rxq->bd) {
  203. ret = iwl_rx_queue_alloc(priv);
  204. if (ret) {
  205. IWL_ERR(priv, "Unable to initialize Rx queue\n");
  206. return -ENOMEM;
  207. }
  208. } else
  209. iwl_rx_queue_reset(priv, rxq);
  210. iwl_rx_replenish(priv);
  211. iwl_rx_init(priv, rxq);
  212. spin_lock_irqsave(&priv->lock, flags);
  213. rxq->need_update = 1;
  214. iwl_rx_queue_update_write_ptr(priv, rxq);
  215. spin_unlock_irqrestore(&priv->lock, flags);
  216. /* Allocate and init all Tx and Command queues */
  217. ret = iwl_txq_ctx_reset(priv);
  218. if (ret)
  219. return ret;
  220. set_bit(STATUS_INIT, &priv->status);
  221. return 0;
  222. }
  223. EXPORT_SYMBOL(iwl_hw_nic_init);
  224. /*
  225. * QoS support
  226. */
  227. void iwl_activate_qos(struct iwl_priv *priv, u8 force)
  228. {
  229. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  230. return;
  231. priv->qos_data.def_qos_parm.qos_flags = 0;
  232. if (priv->qos_data.qos_cap.q_AP.queue_request &&
  233. !priv->qos_data.qos_cap.q_AP.txop_request)
  234. priv->qos_data.def_qos_parm.qos_flags |=
  235. QOS_PARAM_FLG_TXOP_TYPE_MSK;
  236. if (priv->qos_data.qos_active)
  237. priv->qos_data.def_qos_parm.qos_flags |=
  238. QOS_PARAM_FLG_UPDATE_EDCA_MSK;
  239. if (priv->current_ht_config.is_ht)
  240. priv->qos_data.def_qos_parm.qos_flags |= QOS_PARAM_FLG_TGN_MSK;
  241. if (force || iwl_is_associated(priv)) {
  242. IWL_DEBUG_QOS(priv, "send QoS cmd with Qos active=%d FLAGS=0x%X\n",
  243. priv->qos_data.qos_active,
  244. priv->qos_data.def_qos_parm.qos_flags);
  245. iwl_send_cmd_pdu_async(priv, REPLY_QOS_PARAM,
  246. sizeof(struct iwl_qosparam_cmd),
  247. &priv->qos_data.def_qos_parm, NULL);
  248. }
  249. }
  250. EXPORT_SYMBOL(iwl_activate_qos);
  251. /*
  252. * AC CWmin CW max AIFSN TXOP Limit TXOP Limit
  253. * (802.11b) (802.11a/g)
  254. * AC_BK 15 1023 7 0 0
  255. * AC_BE 15 1023 3 0 0
  256. * AC_VI 7 15 2 6.016ms 3.008ms
  257. * AC_VO 3 7 2 3.264ms 1.504ms
  258. */
  259. void iwl_reset_qos(struct iwl_priv *priv)
  260. {
  261. u16 cw_min = 15;
  262. u16 cw_max = 1023;
  263. u8 aifs = 2;
  264. bool is_legacy = false;
  265. unsigned long flags;
  266. int i;
  267. spin_lock_irqsave(&priv->lock, flags);
  268. /* QoS always active in AP and ADHOC mode
  269. * In STA mode wait for association
  270. */
  271. if (priv->iw_mode == NL80211_IFTYPE_ADHOC ||
  272. priv->iw_mode == NL80211_IFTYPE_AP)
  273. priv->qos_data.qos_active = 1;
  274. else
  275. priv->qos_data.qos_active = 0;
  276. /* check for legacy mode */
  277. if ((priv->iw_mode == NL80211_IFTYPE_ADHOC &&
  278. (priv->active_rate & IWL_OFDM_RATES_MASK) == 0) ||
  279. (priv->iw_mode == NL80211_IFTYPE_STATION &&
  280. (priv->staging_rxon.flags & RXON_FLG_SHORT_SLOT_MSK) == 0)) {
  281. cw_min = 31;
  282. is_legacy = 1;
  283. }
  284. if (priv->qos_data.qos_active)
  285. aifs = 3;
  286. /* AC_BE */
  287. priv->qos_data.def_qos_parm.ac[0].cw_min = cpu_to_le16(cw_min);
  288. priv->qos_data.def_qos_parm.ac[0].cw_max = cpu_to_le16(cw_max);
  289. priv->qos_data.def_qos_parm.ac[0].aifsn = aifs;
  290. priv->qos_data.def_qos_parm.ac[0].edca_txop = 0;
  291. priv->qos_data.def_qos_parm.ac[0].reserved1 = 0;
  292. if (priv->qos_data.qos_active) {
  293. /* AC_BK */
  294. i = 1;
  295. priv->qos_data.def_qos_parm.ac[i].cw_min = cpu_to_le16(cw_min);
  296. priv->qos_data.def_qos_parm.ac[i].cw_max = cpu_to_le16(cw_max);
  297. priv->qos_data.def_qos_parm.ac[i].aifsn = 7;
  298. priv->qos_data.def_qos_parm.ac[i].edca_txop = 0;
  299. priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
  300. /* AC_VI */
  301. i = 2;
  302. priv->qos_data.def_qos_parm.ac[i].cw_min =
  303. cpu_to_le16((cw_min + 1) / 2 - 1);
  304. priv->qos_data.def_qos_parm.ac[i].cw_max =
  305. cpu_to_le16(cw_min);
  306. priv->qos_data.def_qos_parm.ac[i].aifsn = 2;
  307. if (is_legacy)
  308. priv->qos_data.def_qos_parm.ac[i].edca_txop =
  309. cpu_to_le16(6016);
  310. else
  311. priv->qos_data.def_qos_parm.ac[i].edca_txop =
  312. cpu_to_le16(3008);
  313. priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
  314. /* AC_VO */
  315. i = 3;
  316. priv->qos_data.def_qos_parm.ac[i].cw_min =
  317. cpu_to_le16((cw_min + 1) / 4 - 1);
  318. priv->qos_data.def_qos_parm.ac[i].cw_max =
  319. cpu_to_le16((cw_min + 1) / 2 - 1);
  320. priv->qos_data.def_qos_parm.ac[i].aifsn = 2;
  321. priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
  322. if (is_legacy)
  323. priv->qos_data.def_qos_parm.ac[i].edca_txop =
  324. cpu_to_le16(3264);
  325. else
  326. priv->qos_data.def_qos_parm.ac[i].edca_txop =
  327. cpu_to_le16(1504);
  328. } else {
  329. for (i = 1; i < 4; i++) {
  330. priv->qos_data.def_qos_parm.ac[i].cw_min =
  331. cpu_to_le16(cw_min);
  332. priv->qos_data.def_qos_parm.ac[i].cw_max =
  333. cpu_to_le16(cw_max);
  334. priv->qos_data.def_qos_parm.ac[i].aifsn = aifs;
  335. priv->qos_data.def_qos_parm.ac[i].edca_txop = 0;
  336. priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
  337. }
  338. }
  339. IWL_DEBUG_QOS(priv, "set QoS to default \n");
  340. spin_unlock_irqrestore(&priv->lock, flags);
  341. }
  342. EXPORT_SYMBOL(iwl_reset_qos);
  343. #define MAX_BIT_RATE_40_MHZ 150 /* Mbps */
  344. #define MAX_BIT_RATE_20_MHZ 72 /* Mbps */
  345. static void iwlcore_init_ht_hw_capab(const struct iwl_priv *priv,
  346. struct ieee80211_sta_ht_cap *ht_info,
  347. enum ieee80211_band band)
  348. {
  349. u16 max_bit_rate = 0;
  350. u8 rx_chains_num = priv->hw_params.rx_chains_num;
  351. u8 tx_chains_num = priv->hw_params.tx_chains_num;
  352. ht_info->cap = 0;
  353. memset(&ht_info->mcs, 0, sizeof(ht_info->mcs));
  354. ht_info->ht_supported = true;
  355. if (priv->cfg->ht_greenfield_support)
  356. ht_info->cap |= IEEE80211_HT_CAP_GRN_FLD;
  357. ht_info->cap |= IEEE80211_HT_CAP_SGI_20;
  358. ht_info->cap |= (IEEE80211_HT_CAP_SM_PS &
  359. (WLAN_HT_CAP_SM_PS_DISABLED << 2));
  360. max_bit_rate = MAX_BIT_RATE_20_MHZ;
  361. if (priv->hw_params.ht40_channel & BIT(band)) {
  362. ht_info->cap |= IEEE80211_HT_CAP_SUP_WIDTH_20_40;
  363. ht_info->cap |= IEEE80211_HT_CAP_SGI_40;
  364. ht_info->mcs.rx_mask[4] = 0x01;
  365. max_bit_rate = MAX_BIT_RATE_40_MHZ;
  366. }
  367. if (priv->cfg->mod_params->amsdu_size_8K)
  368. ht_info->cap |= IEEE80211_HT_CAP_MAX_AMSDU;
  369. ht_info->ampdu_factor = CFG_HT_RX_AMPDU_FACTOR_DEF;
  370. ht_info->ampdu_density = CFG_HT_MPDU_DENSITY_DEF;
  371. ht_info->mcs.rx_mask[0] = 0xFF;
  372. if (rx_chains_num >= 2)
  373. ht_info->mcs.rx_mask[1] = 0xFF;
  374. if (rx_chains_num >= 3)
  375. ht_info->mcs.rx_mask[2] = 0xFF;
  376. /* Highest supported Rx data rate */
  377. max_bit_rate *= rx_chains_num;
  378. WARN_ON(max_bit_rate & ~IEEE80211_HT_MCS_RX_HIGHEST_MASK);
  379. ht_info->mcs.rx_highest = cpu_to_le16(max_bit_rate);
  380. /* Tx MCS capabilities */
  381. ht_info->mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED;
  382. if (tx_chains_num != rx_chains_num) {
  383. ht_info->mcs.tx_params |= IEEE80211_HT_MCS_TX_RX_DIFF;
  384. ht_info->mcs.tx_params |= ((tx_chains_num - 1) <<
  385. IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT);
  386. }
  387. }
  388. static void iwlcore_init_hw_rates(struct iwl_priv *priv,
  389. struct ieee80211_rate *rates)
  390. {
  391. int i;
  392. for (i = 0; i < IWL_RATE_COUNT_LEGACY; i++) {
  393. rates[i].bitrate = iwl_rates[i].ieee * 5;
  394. rates[i].hw_value = i; /* Rate scaling will work on indexes */
  395. rates[i].hw_value_short = i;
  396. rates[i].flags = 0;
  397. if ((i >= IWL_FIRST_CCK_RATE) && (i <= IWL_LAST_CCK_RATE)) {
  398. /*
  399. * If CCK != 1M then set short preamble rate flag.
  400. */
  401. rates[i].flags |=
  402. (iwl_rates[i].plcp == IWL_RATE_1M_PLCP) ?
  403. 0 : IEEE80211_RATE_SHORT_PREAMBLE;
  404. }
  405. }
  406. }
  407. /**
  408. * iwlcore_init_geos - Initialize mac80211's geo/channel info based from eeprom
  409. */
  410. int iwlcore_init_geos(struct iwl_priv *priv)
  411. {
  412. struct iwl_channel_info *ch;
  413. struct ieee80211_supported_band *sband;
  414. struct ieee80211_channel *channels;
  415. struct ieee80211_channel *geo_ch;
  416. struct ieee80211_rate *rates;
  417. int i = 0;
  418. if (priv->bands[IEEE80211_BAND_2GHZ].n_bitrates ||
  419. priv->bands[IEEE80211_BAND_5GHZ].n_bitrates) {
  420. IWL_DEBUG_INFO(priv, "Geography modes already initialized.\n");
  421. set_bit(STATUS_GEO_CONFIGURED, &priv->status);
  422. return 0;
  423. }
  424. channels = kzalloc(sizeof(struct ieee80211_channel) *
  425. priv->channel_count, GFP_KERNEL);
  426. if (!channels)
  427. return -ENOMEM;
  428. rates = kzalloc((sizeof(struct ieee80211_rate) * IWL_RATE_COUNT_LEGACY),
  429. GFP_KERNEL);
  430. if (!rates) {
  431. kfree(channels);
  432. return -ENOMEM;
  433. }
  434. /* 5.2GHz channels start after the 2.4GHz channels */
  435. sband = &priv->bands[IEEE80211_BAND_5GHZ];
  436. sband->channels = &channels[ARRAY_SIZE(iwl_eeprom_band_1)];
  437. /* just OFDM */
  438. sband->bitrates = &rates[IWL_FIRST_OFDM_RATE];
  439. sband->n_bitrates = IWL_RATE_COUNT_LEGACY - IWL_FIRST_OFDM_RATE;
  440. if (priv->cfg->sku & IWL_SKU_N)
  441. iwlcore_init_ht_hw_capab(priv, &sband->ht_cap,
  442. IEEE80211_BAND_5GHZ);
  443. sband = &priv->bands[IEEE80211_BAND_2GHZ];
  444. sband->channels = channels;
  445. /* OFDM & CCK */
  446. sband->bitrates = rates;
  447. sband->n_bitrates = IWL_RATE_COUNT_LEGACY;
  448. if (priv->cfg->sku & IWL_SKU_N)
  449. iwlcore_init_ht_hw_capab(priv, &sband->ht_cap,
  450. IEEE80211_BAND_2GHZ);
  451. priv->ieee_channels = channels;
  452. priv->ieee_rates = rates;
  453. for (i = 0; i < priv->channel_count; i++) {
  454. ch = &priv->channel_info[i];
  455. /* FIXME: might be removed if scan is OK */
  456. if (!is_channel_valid(ch))
  457. continue;
  458. if (is_channel_a_band(ch))
  459. sband = &priv->bands[IEEE80211_BAND_5GHZ];
  460. else
  461. sband = &priv->bands[IEEE80211_BAND_2GHZ];
  462. geo_ch = &sband->channels[sband->n_channels++];
  463. geo_ch->center_freq =
  464. ieee80211_channel_to_frequency(ch->channel);
  465. geo_ch->max_power = ch->max_power_avg;
  466. geo_ch->max_antenna_gain = 0xff;
  467. geo_ch->hw_value = ch->channel;
  468. if (is_channel_valid(ch)) {
  469. if (!(ch->flags & EEPROM_CHANNEL_IBSS))
  470. geo_ch->flags |= IEEE80211_CHAN_NO_IBSS;
  471. if (!(ch->flags & EEPROM_CHANNEL_ACTIVE))
  472. geo_ch->flags |= IEEE80211_CHAN_PASSIVE_SCAN;
  473. if (ch->flags & EEPROM_CHANNEL_RADAR)
  474. geo_ch->flags |= IEEE80211_CHAN_RADAR;
  475. geo_ch->flags |= ch->ht40_extension_channel;
  476. if (ch->max_power_avg > priv->tx_power_device_lmt)
  477. priv->tx_power_device_lmt = ch->max_power_avg;
  478. } else {
  479. geo_ch->flags |= IEEE80211_CHAN_DISABLED;
  480. }
  481. IWL_DEBUG_INFO(priv, "Channel %d Freq=%d[%sGHz] %s flag=0x%X\n",
  482. ch->channel, geo_ch->center_freq,
  483. is_channel_a_band(ch) ? "5.2" : "2.4",
  484. geo_ch->flags & IEEE80211_CHAN_DISABLED ?
  485. "restricted" : "valid",
  486. geo_ch->flags);
  487. }
  488. if ((priv->bands[IEEE80211_BAND_5GHZ].n_channels == 0) &&
  489. priv->cfg->sku & IWL_SKU_A) {
  490. IWL_INFO(priv, "Incorrectly detected BG card as ABG. "
  491. "Please send your PCI ID 0x%04X:0x%04X to maintainer.\n",
  492. priv->pci_dev->device,
  493. priv->pci_dev->subsystem_device);
  494. priv->cfg->sku &= ~IWL_SKU_A;
  495. }
  496. IWL_INFO(priv, "Tunable channels: %d 802.11bg, %d 802.11a channels\n",
  497. priv->bands[IEEE80211_BAND_2GHZ].n_channels,
  498. priv->bands[IEEE80211_BAND_5GHZ].n_channels);
  499. set_bit(STATUS_GEO_CONFIGURED, &priv->status);
  500. return 0;
  501. }
  502. EXPORT_SYMBOL(iwlcore_init_geos);
  503. /*
  504. * iwlcore_free_geos - undo allocations in iwlcore_init_geos
  505. */
  506. void iwlcore_free_geos(struct iwl_priv *priv)
  507. {
  508. kfree(priv->ieee_channels);
  509. kfree(priv->ieee_rates);
  510. clear_bit(STATUS_GEO_CONFIGURED, &priv->status);
  511. }
  512. EXPORT_SYMBOL(iwlcore_free_geos);
  513. static bool is_single_rx_stream(struct iwl_priv *priv)
  514. {
  515. return !priv->current_ht_config.is_ht ||
  516. priv->current_ht_config.single_chain_sufficient;
  517. }
  518. static u8 iwl_is_channel_extension(struct iwl_priv *priv,
  519. enum ieee80211_band band,
  520. u16 channel, u8 extension_chan_offset)
  521. {
  522. const struct iwl_channel_info *ch_info;
  523. ch_info = iwl_get_channel_info(priv, band, channel);
  524. if (!is_channel_valid(ch_info))
  525. return 0;
  526. if (extension_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_ABOVE)
  527. return !(ch_info->ht40_extension_channel &
  528. IEEE80211_CHAN_NO_HT40PLUS);
  529. else if (extension_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_BELOW)
  530. return !(ch_info->ht40_extension_channel &
  531. IEEE80211_CHAN_NO_HT40MINUS);
  532. return 0;
  533. }
  534. u8 iwl_is_ht40_tx_allowed(struct iwl_priv *priv,
  535. struct ieee80211_sta_ht_cap *sta_ht_inf)
  536. {
  537. struct iwl_ht_config *ht_conf = &priv->current_ht_config;
  538. if (!ht_conf->is_ht || !ht_conf->is_40mhz)
  539. return 0;
  540. /* We do not check for IEEE80211_HT_CAP_SUP_WIDTH_20_40
  541. * the bit will not set if it is pure 40MHz case
  542. */
  543. if (sta_ht_inf) {
  544. if (!sta_ht_inf->ht_supported)
  545. return 0;
  546. }
  547. #ifdef CONFIG_IWLWIFI_DEBUG
  548. if (priv->disable_ht40)
  549. return 0;
  550. #endif
  551. return iwl_is_channel_extension(priv, priv->band,
  552. le16_to_cpu(priv->staging_rxon.channel),
  553. ht_conf->extension_chan_offset);
  554. }
  555. EXPORT_SYMBOL(iwl_is_ht40_tx_allowed);
  556. static u16 iwl_adjust_beacon_interval(u16 beacon_val, u16 max_beacon_val)
  557. {
  558. u16 new_val = 0;
  559. u16 beacon_factor = 0;
  560. beacon_factor = (beacon_val + max_beacon_val) / max_beacon_val;
  561. new_val = beacon_val / beacon_factor;
  562. if (!new_val)
  563. new_val = max_beacon_val;
  564. return new_val;
  565. }
  566. void iwl_setup_rxon_timing(struct iwl_priv *priv)
  567. {
  568. u64 tsf;
  569. s32 interval_tm, rem;
  570. unsigned long flags;
  571. struct ieee80211_conf *conf = NULL;
  572. u16 beacon_int;
  573. conf = ieee80211_get_hw_conf(priv->hw);
  574. spin_lock_irqsave(&priv->lock, flags);
  575. priv->rxon_timing.timestamp = cpu_to_le64(priv->timestamp);
  576. priv->rxon_timing.listen_interval = cpu_to_le16(conf->listen_interval);
  577. if (priv->iw_mode == NL80211_IFTYPE_STATION) {
  578. beacon_int = priv->beacon_int;
  579. priv->rxon_timing.atim_window = 0;
  580. } else {
  581. beacon_int = priv->vif->bss_conf.beacon_int;
  582. /* TODO: we need to get atim_window from upper stack
  583. * for now we set to 0 */
  584. priv->rxon_timing.atim_window = 0;
  585. }
  586. beacon_int = iwl_adjust_beacon_interval(beacon_int,
  587. priv->hw_params.max_beacon_itrvl * 1024);
  588. priv->rxon_timing.beacon_interval = cpu_to_le16(beacon_int);
  589. tsf = priv->timestamp; /* tsf is modifed by do_div: copy it */
  590. interval_tm = beacon_int * 1024;
  591. rem = do_div(tsf, interval_tm);
  592. priv->rxon_timing.beacon_init_val = cpu_to_le32(interval_tm - rem);
  593. spin_unlock_irqrestore(&priv->lock, flags);
  594. IWL_DEBUG_ASSOC(priv,
  595. "beacon interval %d beacon timer %d beacon tim %d\n",
  596. le16_to_cpu(priv->rxon_timing.beacon_interval),
  597. le32_to_cpu(priv->rxon_timing.beacon_init_val),
  598. le16_to_cpu(priv->rxon_timing.atim_window));
  599. }
  600. EXPORT_SYMBOL(iwl_setup_rxon_timing);
  601. void iwl_set_rxon_hwcrypto(struct iwl_priv *priv, int hw_decrypt)
  602. {
  603. struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
  604. if (hw_decrypt)
  605. rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK;
  606. else
  607. rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK;
  608. }
  609. EXPORT_SYMBOL(iwl_set_rxon_hwcrypto);
  610. /**
  611. * iwl_check_rxon_cmd - validate RXON structure is valid
  612. *
  613. * NOTE: This is really only useful during development and can eventually
  614. * be #ifdef'd out once the driver is stable and folks aren't actively
  615. * making changes
  616. */
  617. int iwl_check_rxon_cmd(struct iwl_priv *priv)
  618. {
  619. int error = 0;
  620. int counter = 1;
  621. struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
  622. if (rxon->flags & RXON_FLG_BAND_24G_MSK) {
  623. error |= le32_to_cpu(rxon->flags &
  624. (RXON_FLG_TGJ_NARROW_BAND_MSK |
  625. RXON_FLG_RADAR_DETECT_MSK));
  626. if (error)
  627. IWL_WARN(priv, "check 24G fields %d | %d\n",
  628. counter++, error);
  629. } else {
  630. error |= (rxon->flags & RXON_FLG_SHORT_SLOT_MSK) ?
  631. 0 : le32_to_cpu(RXON_FLG_SHORT_SLOT_MSK);
  632. if (error)
  633. IWL_WARN(priv, "check 52 fields %d | %d\n",
  634. counter++, error);
  635. error |= le32_to_cpu(rxon->flags & RXON_FLG_CCK_MSK);
  636. if (error)
  637. IWL_WARN(priv, "check 52 CCK %d | %d\n",
  638. counter++, error);
  639. }
  640. error |= (rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1;
  641. if (error)
  642. IWL_WARN(priv, "check mac addr %d | %d\n", counter++, error);
  643. /* make sure basic rates 6Mbps and 1Mbps are supported */
  644. error |= (((rxon->ofdm_basic_rates & IWL_RATE_6M_MASK) == 0) &&
  645. ((rxon->cck_basic_rates & IWL_RATE_1M_MASK) == 0));
  646. if (error)
  647. IWL_WARN(priv, "check basic rate %d | %d\n", counter++, error);
  648. error |= (le16_to_cpu(rxon->assoc_id) > 2007);
  649. if (error)
  650. IWL_WARN(priv, "check assoc id %d | %d\n", counter++, error);
  651. error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK))
  652. == (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK));
  653. if (error)
  654. IWL_WARN(priv, "check CCK and short slot %d | %d\n",
  655. counter++, error);
  656. error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK))
  657. == (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK));
  658. if (error)
  659. IWL_WARN(priv, "check CCK & auto detect %d | %d\n",
  660. counter++, error);
  661. error |= ((rxon->flags & (RXON_FLG_AUTO_DETECT_MSK |
  662. RXON_FLG_TGG_PROTECT_MSK)) == RXON_FLG_TGG_PROTECT_MSK);
  663. if (error)
  664. IWL_WARN(priv, "check TGG and auto detect %d | %d\n",
  665. counter++, error);
  666. if (error)
  667. IWL_WARN(priv, "Tuning to channel %d\n",
  668. le16_to_cpu(rxon->channel));
  669. if (error) {
  670. IWL_ERR(priv, "Not a valid iwl_rxon_assoc_cmd field values\n");
  671. return -1;
  672. }
  673. return 0;
  674. }
  675. EXPORT_SYMBOL(iwl_check_rxon_cmd);
  676. /**
  677. * iwl_full_rxon_required - check if full RXON (vs RXON_ASSOC) cmd is needed
  678. * @priv: staging_rxon is compared to active_rxon
  679. *
  680. * If the RXON structure is changing enough to require a new tune,
  681. * or is clearing the RXON_FILTER_ASSOC_MSK, then return 1 to indicate that
  682. * a new tune (full RXON command, rather than RXON_ASSOC cmd) is required.
  683. */
  684. int iwl_full_rxon_required(struct iwl_priv *priv)
  685. {
  686. /* These items are only settable from the full RXON command */
  687. if (!(iwl_is_associated(priv)) ||
  688. compare_ether_addr(priv->staging_rxon.bssid_addr,
  689. priv->active_rxon.bssid_addr) ||
  690. compare_ether_addr(priv->staging_rxon.node_addr,
  691. priv->active_rxon.node_addr) ||
  692. compare_ether_addr(priv->staging_rxon.wlap_bssid_addr,
  693. priv->active_rxon.wlap_bssid_addr) ||
  694. (priv->staging_rxon.dev_type != priv->active_rxon.dev_type) ||
  695. (priv->staging_rxon.channel != priv->active_rxon.channel) ||
  696. (priv->staging_rxon.air_propagation !=
  697. priv->active_rxon.air_propagation) ||
  698. (priv->staging_rxon.ofdm_ht_single_stream_basic_rates !=
  699. priv->active_rxon.ofdm_ht_single_stream_basic_rates) ||
  700. (priv->staging_rxon.ofdm_ht_dual_stream_basic_rates !=
  701. priv->active_rxon.ofdm_ht_dual_stream_basic_rates) ||
  702. (priv->staging_rxon.ofdm_ht_triple_stream_basic_rates !=
  703. priv->active_rxon.ofdm_ht_triple_stream_basic_rates) ||
  704. (priv->staging_rxon.assoc_id != priv->active_rxon.assoc_id))
  705. return 1;
  706. /* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can
  707. * be updated with the RXON_ASSOC command -- however only some
  708. * flag transitions are allowed using RXON_ASSOC */
  709. /* Check if we are not switching bands */
  710. if ((priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) !=
  711. (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK))
  712. return 1;
  713. /* Check if we are switching association toggle */
  714. if ((priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) !=
  715. (priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK))
  716. return 1;
  717. return 0;
  718. }
  719. EXPORT_SYMBOL(iwl_full_rxon_required);
  720. u8 iwl_rate_get_lowest_plcp(struct iwl_priv *priv)
  721. {
  722. int i;
  723. int rate_mask;
  724. /* Set rate mask*/
  725. if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK)
  726. rate_mask = priv->active_rate_basic & IWL_CCK_RATES_MASK;
  727. else
  728. rate_mask = priv->active_rate_basic & IWL_OFDM_RATES_MASK;
  729. /* Find lowest valid rate */
  730. for (i = IWL_RATE_1M_INDEX; i != IWL_RATE_INVALID;
  731. i = iwl_rates[i].next_ieee) {
  732. if (rate_mask & (1 << i))
  733. return iwl_rates[i].plcp;
  734. }
  735. /* No valid rate was found. Assign the lowest one */
  736. if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK)
  737. return IWL_RATE_1M_PLCP;
  738. else
  739. return IWL_RATE_6M_PLCP;
  740. }
  741. EXPORT_SYMBOL(iwl_rate_get_lowest_plcp);
  742. void iwl_set_rxon_ht(struct iwl_priv *priv, struct iwl_ht_config *ht_conf)
  743. {
  744. struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
  745. if (!ht_conf->is_ht) {
  746. rxon->flags &= ~(RXON_FLG_CHANNEL_MODE_MSK |
  747. RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK |
  748. RXON_FLG_HT40_PROT_MSK |
  749. RXON_FLG_HT_PROT_MSK);
  750. return;
  751. }
  752. /* FIXME: if the definition of ht_protection changed, the "translation"
  753. * will be needed for rxon->flags
  754. */
  755. rxon->flags |= cpu_to_le32(ht_conf->ht_protection << RXON_FLG_HT_OPERATING_MODE_POS);
  756. /* Set up channel bandwidth:
  757. * 20 MHz only, 20/40 mixed or pure 40 if ht40 ok */
  758. /* clear the HT channel mode before set the mode */
  759. rxon->flags &= ~(RXON_FLG_CHANNEL_MODE_MSK |
  760. RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK);
  761. if (iwl_is_ht40_tx_allowed(priv, NULL)) {
  762. /* pure ht40 */
  763. if (ht_conf->ht_protection == IEEE80211_HT_OP_MODE_PROTECTION_20MHZ) {
  764. rxon->flags |= RXON_FLG_CHANNEL_MODE_PURE_40;
  765. /* Note: control channel is opposite of extension channel */
  766. switch (ht_conf->extension_chan_offset) {
  767. case IEEE80211_HT_PARAM_CHA_SEC_ABOVE:
  768. rxon->flags &= ~RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
  769. break;
  770. case IEEE80211_HT_PARAM_CHA_SEC_BELOW:
  771. rxon->flags |= RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
  772. break;
  773. }
  774. } else {
  775. /* Note: control channel is opposite of extension channel */
  776. switch (ht_conf->extension_chan_offset) {
  777. case IEEE80211_HT_PARAM_CHA_SEC_ABOVE:
  778. rxon->flags &= ~(RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK);
  779. rxon->flags |= RXON_FLG_CHANNEL_MODE_MIXED;
  780. break;
  781. case IEEE80211_HT_PARAM_CHA_SEC_BELOW:
  782. rxon->flags |= RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
  783. rxon->flags |= RXON_FLG_CHANNEL_MODE_MIXED;
  784. break;
  785. case IEEE80211_HT_PARAM_CHA_SEC_NONE:
  786. default:
  787. /* channel location only valid if in Mixed mode */
  788. IWL_ERR(priv, "invalid extension channel offset\n");
  789. break;
  790. }
  791. }
  792. } else {
  793. rxon->flags |= RXON_FLG_CHANNEL_MODE_LEGACY;
  794. }
  795. if (priv->cfg->ops->hcmd->set_rxon_chain)
  796. priv->cfg->ops->hcmd->set_rxon_chain(priv);
  797. IWL_DEBUG_ASSOC(priv, "rxon flags 0x%X operation mode :0x%X "
  798. "extension channel offset 0x%x\n",
  799. le32_to_cpu(rxon->flags), ht_conf->ht_protection,
  800. ht_conf->extension_chan_offset);
  801. return;
  802. }
  803. EXPORT_SYMBOL(iwl_set_rxon_ht);
  804. #define IWL_NUM_RX_CHAINS_MULTIPLE 3
  805. #define IWL_NUM_RX_CHAINS_SINGLE 2
  806. #define IWL_NUM_IDLE_CHAINS_DUAL 2
  807. #define IWL_NUM_IDLE_CHAINS_SINGLE 1
  808. /* Determine how many receiver/antenna chains to use.
  809. * More provides better reception via diversity. Fewer saves power.
  810. * MIMO (dual stream) requires at least 2, but works better with 3.
  811. * This does not determine *which* chains to use, just how many.
  812. */
  813. static int iwl_get_active_rx_chain_count(struct iwl_priv *priv)
  814. {
  815. /* # of Rx chains to use when expecting MIMO. */
  816. if (is_single_rx_stream(priv))
  817. return IWL_NUM_RX_CHAINS_SINGLE;
  818. else
  819. return IWL_NUM_RX_CHAINS_MULTIPLE;
  820. }
  821. static int iwl_get_idle_rx_chain_count(struct iwl_priv *priv, int active_cnt)
  822. {
  823. bool is_cam = !test_bit(STATUS_POWER_PMI, &priv->status);
  824. /* # Rx chains when idling and maybe trying to save power */
  825. /*
  826. * XXX: this is incorrect!!
  827. * we always indicate to the AP that
  828. * our SM PS mode is "disabled"
  829. */
  830. return is_cam ? active_cnt : IWL_NUM_IDLE_CHAINS_SINGLE;
  831. }
  832. /* up to 4 chains */
  833. static u8 iwl_count_chain_bitmap(u32 chain_bitmap)
  834. {
  835. u8 res;
  836. res = (chain_bitmap & BIT(0)) >> 0;
  837. res += (chain_bitmap & BIT(1)) >> 1;
  838. res += (chain_bitmap & BIT(2)) >> 2;
  839. res += (chain_bitmap & BIT(3)) >> 3;
  840. return res;
  841. }
  842. /**
  843. * iwl_is_monitor_mode - Determine if interface in monitor mode
  844. *
  845. * priv->iw_mode is set in add_interface, but add_interface is
  846. * never called for monitor mode. The only way mac80211 informs us about
  847. * monitor mode is through configuring filters (call to configure_filter).
  848. */
  849. bool iwl_is_monitor_mode(struct iwl_priv *priv)
  850. {
  851. return !!(priv->staging_rxon.filter_flags & RXON_FILTER_PROMISC_MSK);
  852. }
  853. EXPORT_SYMBOL(iwl_is_monitor_mode);
  854. /**
  855. * iwl_set_rxon_chain - Set up Rx chain usage in "staging" RXON image
  856. *
  857. * Selects how many and which Rx receivers/antennas/chains to use.
  858. * This should not be used for scan command ... it puts data in wrong place.
  859. */
  860. void iwl_set_rxon_chain(struct iwl_priv *priv)
  861. {
  862. bool is_single = is_single_rx_stream(priv);
  863. bool is_cam = !test_bit(STATUS_POWER_PMI, &priv->status);
  864. u8 idle_rx_cnt, active_rx_cnt, valid_rx_cnt;
  865. u32 active_chains;
  866. u16 rx_chain;
  867. /* Tell uCode which antennas are actually connected.
  868. * Before first association, we assume all antennas are connected.
  869. * Just after first association, iwl_chain_noise_calibration()
  870. * checks which antennas actually *are* connected. */
  871. if (priv->chain_noise_data.active_chains)
  872. active_chains = priv->chain_noise_data.active_chains;
  873. else
  874. active_chains = priv->hw_params.valid_rx_ant;
  875. rx_chain = active_chains << RXON_RX_CHAIN_VALID_POS;
  876. /* How many receivers should we use? */
  877. active_rx_cnt = iwl_get_active_rx_chain_count(priv);
  878. idle_rx_cnt = iwl_get_idle_rx_chain_count(priv, active_rx_cnt);
  879. /* correct rx chain count according hw settings
  880. * and chain noise calibration
  881. */
  882. valid_rx_cnt = iwl_count_chain_bitmap(active_chains);
  883. if (valid_rx_cnt < active_rx_cnt)
  884. active_rx_cnt = valid_rx_cnt;
  885. if (valid_rx_cnt < idle_rx_cnt)
  886. idle_rx_cnt = valid_rx_cnt;
  887. rx_chain |= active_rx_cnt << RXON_RX_CHAIN_MIMO_CNT_POS;
  888. rx_chain |= idle_rx_cnt << RXON_RX_CHAIN_CNT_POS;
  889. /* copied from 'iwl_bg_request_scan()' */
  890. /* Force use of chains B and C (0x6) for Rx for 4965
  891. * Avoid A (0x1) because of its off-channel reception on A-band.
  892. * MIMO is not used here, but value is required */
  893. if (iwl_is_monitor_mode(priv) &&
  894. !(priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) &&
  895. ((priv->hw_rev & CSR_HW_REV_TYPE_MSK) == CSR_HW_REV_TYPE_4965)) {
  896. rx_chain = ANT_ABC << RXON_RX_CHAIN_VALID_POS;
  897. rx_chain |= ANT_BC << RXON_RX_CHAIN_FORCE_SEL_POS;
  898. rx_chain |= ANT_ABC << RXON_RX_CHAIN_FORCE_MIMO_SEL_POS;
  899. rx_chain |= 0x1 << RXON_RX_CHAIN_DRIVER_FORCE_POS;
  900. }
  901. priv->staging_rxon.rx_chain = cpu_to_le16(rx_chain);
  902. if (!is_single && (active_rx_cnt >= IWL_NUM_RX_CHAINS_SINGLE) && is_cam)
  903. priv->staging_rxon.rx_chain |= RXON_RX_CHAIN_MIMO_FORCE_MSK;
  904. else
  905. priv->staging_rxon.rx_chain &= ~RXON_RX_CHAIN_MIMO_FORCE_MSK;
  906. IWL_DEBUG_ASSOC(priv, "rx_chain=0x%X active=%d idle=%d\n",
  907. priv->staging_rxon.rx_chain,
  908. active_rx_cnt, idle_rx_cnt);
  909. WARN_ON(active_rx_cnt == 0 || idle_rx_cnt == 0 ||
  910. active_rx_cnt < idle_rx_cnt);
  911. }
  912. EXPORT_SYMBOL(iwl_set_rxon_chain);
  913. /**
  914. * iwl_set_rxon_channel - Set the phymode and channel values in staging RXON
  915. * @phymode: MODE_IEEE80211A sets to 5.2GHz; all else set to 2.4GHz
  916. * @channel: Any channel valid for the requested phymode
  917. * In addition to setting the staging RXON, priv->phymode is also set.
  918. *
  919. * NOTE: Does not commit to the hardware; it sets appropriate bit fields
  920. * in the staging RXON flag structure based on the phymode
  921. */
  922. int iwl_set_rxon_channel(struct iwl_priv *priv, struct ieee80211_channel *ch)
  923. {
  924. enum ieee80211_band band = ch->band;
  925. u16 channel = ieee80211_frequency_to_channel(ch->center_freq);
  926. if (!iwl_get_channel_info(priv, band, channel)) {
  927. IWL_DEBUG_INFO(priv, "Could not set channel to %d [%d]\n",
  928. channel, band);
  929. return -EINVAL;
  930. }
  931. if ((le16_to_cpu(priv->staging_rxon.channel) == channel) &&
  932. (priv->band == band))
  933. return 0;
  934. priv->staging_rxon.channel = cpu_to_le16(channel);
  935. if (band == IEEE80211_BAND_5GHZ)
  936. priv->staging_rxon.flags &= ~RXON_FLG_BAND_24G_MSK;
  937. else
  938. priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
  939. priv->band = band;
  940. IWL_DEBUG_INFO(priv, "Staging channel set to %d [%d]\n", channel, band);
  941. return 0;
  942. }
  943. EXPORT_SYMBOL(iwl_set_rxon_channel);
  944. void iwl_set_flags_for_band(struct iwl_priv *priv,
  945. enum ieee80211_band band)
  946. {
  947. if (band == IEEE80211_BAND_5GHZ) {
  948. priv->staging_rxon.flags &=
  949. ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK
  950. | RXON_FLG_CCK_MSK);
  951. priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
  952. } else {
  953. /* Copied from iwl_post_associate() */
  954. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
  955. priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
  956. else
  957. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  958. if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
  959. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  960. priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
  961. priv->staging_rxon.flags |= RXON_FLG_AUTO_DETECT_MSK;
  962. priv->staging_rxon.flags &= ~RXON_FLG_CCK_MSK;
  963. }
  964. }
  965. /*
  966. * initialize rxon structure with default values from eeprom
  967. */
  968. void iwl_connection_init_rx_config(struct iwl_priv *priv, int mode)
  969. {
  970. const struct iwl_channel_info *ch_info;
  971. memset(&priv->staging_rxon, 0, sizeof(priv->staging_rxon));
  972. switch (mode) {
  973. case NL80211_IFTYPE_AP:
  974. priv->staging_rxon.dev_type = RXON_DEV_TYPE_AP;
  975. break;
  976. case NL80211_IFTYPE_STATION:
  977. priv->staging_rxon.dev_type = RXON_DEV_TYPE_ESS;
  978. priv->staging_rxon.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK;
  979. break;
  980. case NL80211_IFTYPE_ADHOC:
  981. priv->staging_rxon.dev_type = RXON_DEV_TYPE_IBSS;
  982. priv->staging_rxon.flags = RXON_FLG_SHORT_PREAMBLE_MSK;
  983. priv->staging_rxon.filter_flags = RXON_FILTER_BCON_AWARE_MSK |
  984. RXON_FILTER_ACCEPT_GRP_MSK;
  985. break;
  986. default:
  987. IWL_ERR(priv, "Unsupported interface type %d\n", mode);
  988. break;
  989. }
  990. #if 0
  991. /* TODO: Figure out when short_preamble would be set and cache from
  992. * that */
  993. if (!hw_to_local(priv->hw)->short_preamble)
  994. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  995. else
  996. priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  997. #endif
  998. ch_info = iwl_get_channel_info(priv, priv->band,
  999. le16_to_cpu(priv->active_rxon.channel));
  1000. if (!ch_info)
  1001. ch_info = &priv->channel_info[0];
  1002. /*
  1003. * in some case A channels are all non IBSS
  1004. * in this case force B/G channel
  1005. */
  1006. if ((priv->iw_mode == NL80211_IFTYPE_ADHOC) &&
  1007. !(is_channel_ibss(ch_info)))
  1008. ch_info = &priv->channel_info[0];
  1009. priv->staging_rxon.channel = cpu_to_le16(ch_info->channel);
  1010. priv->band = ch_info->band;
  1011. iwl_set_flags_for_band(priv, priv->band);
  1012. priv->staging_rxon.ofdm_basic_rates =
  1013. (IWL_OFDM_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
  1014. priv->staging_rxon.cck_basic_rates =
  1015. (IWL_CCK_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
  1016. /* clear both MIX and PURE40 mode flag */
  1017. priv->staging_rxon.flags &= ~(RXON_FLG_CHANNEL_MODE_MIXED |
  1018. RXON_FLG_CHANNEL_MODE_PURE_40);
  1019. memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
  1020. memcpy(priv->staging_rxon.wlap_bssid_addr, priv->mac_addr, ETH_ALEN);
  1021. priv->staging_rxon.ofdm_ht_single_stream_basic_rates = 0xff;
  1022. priv->staging_rxon.ofdm_ht_dual_stream_basic_rates = 0xff;
  1023. priv->staging_rxon.ofdm_ht_triple_stream_basic_rates = 0xff;
  1024. }
  1025. EXPORT_SYMBOL(iwl_connection_init_rx_config);
  1026. static void iwl_set_rate(struct iwl_priv *priv)
  1027. {
  1028. const struct ieee80211_supported_band *hw = NULL;
  1029. struct ieee80211_rate *rate;
  1030. int i;
  1031. hw = iwl_get_hw_mode(priv, priv->band);
  1032. if (!hw) {
  1033. IWL_ERR(priv, "Failed to set rate: unable to get hw mode\n");
  1034. return;
  1035. }
  1036. priv->active_rate = 0;
  1037. priv->active_rate_basic = 0;
  1038. for (i = 0; i < hw->n_bitrates; i++) {
  1039. rate = &(hw->bitrates[i]);
  1040. if (rate->hw_value < IWL_RATE_COUNT_LEGACY)
  1041. priv->active_rate |= (1 << rate->hw_value);
  1042. }
  1043. IWL_DEBUG_RATE(priv, "Set active_rate = %0x, active_rate_basic = %0x\n",
  1044. priv->active_rate, priv->active_rate_basic);
  1045. /*
  1046. * If a basic rate is configured, then use it (adding IWL_RATE_1M_MASK)
  1047. * otherwise set it to the default of all CCK rates and 6, 12, 24 for
  1048. * OFDM
  1049. */
  1050. if (priv->active_rate_basic & IWL_CCK_BASIC_RATES_MASK)
  1051. priv->staging_rxon.cck_basic_rates =
  1052. ((priv->active_rate_basic &
  1053. IWL_CCK_RATES_MASK) >> IWL_FIRST_CCK_RATE) & 0xF;
  1054. else
  1055. priv->staging_rxon.cck_basic_rates =
  1056. (IWL_CCK_BASIC_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
  1057. if (priv->active_rate_basic & IWL_OFDM_BASIC_RATES_MASK)
  1058. priv->staging_rxon.ofdm_basic_rates =
  1059. ((priv->active_rate_basic &
  1060. (IWL_OFDM_BASIC_RATES_MASK | IWL_RATE_6M_MASK)) >>
  1061. IWL_FIRST_OFDM_RATE) & 0xFF;
  1062. else
  1063. priv->staging_rxon.ofdm_basic_rates =
  1064. (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
  1065. }
  1066. void iwl_rx_csa(struct iwl_priv *priv, struct iwl_rx_mem_buffer *rxb)
  1067. {
  1068. struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
  1069. struct iwl_rxon_cmd *rxon = (void *)&priv->active_rxon;
  1070. struct iwl_csa_notification *csa = &(pkt->u.csa_notif);
  1071. IWL_DEBUG_11H(priv, "CSA notif: channel %d, status %d\n",
  1072. le16_to_cpu(csa->channel), le32_to_cpu(csa->status));
  1073. rxon->channel = csa->channel;
  1074. priv->staging_rxon.channel = csa->channel;
  1075. }
  1076. EXPORT_SYMBOL(iwl_rx_csa);
  1077. #ifdef CONFIG_IWLWIFI_DEBUG
  1078. static void iwl_print_rx_config_cmd(struct iwl_priv *priv)
  1079. {
  1080. struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
  1081. IWL_DEBUG_RADIO(priv, "RX CONFIG:\n");
  1082. iwl_print_hex_dump(priv, IWL_DL_RADIO, (u8 *) rxon, sizeof(*rxon));
  1083. IWL_DEBUG_RADIO(priv, "u16 channel: 0x%x\n", le16_to_cpu(rxon->channel));
  1084. IWL_DEBUG_RADIO(priv, "u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags));
  1085. IWL_DEBUG_RADIO(priv, "u32 filter_flags: 0x%08x\n",
  1086. le32_to_cpu(rxon->filter_flags));
  1087. IWL_DEBUG_RADIO(priv, "u8 dev_type: 0x%x\n", rxon->dev_type);
  1088. IWL_DEBUG_RADIO(priv, "u8 ofdm_basic_rates: 0x%02x\n",
  1089. rxon->ofdm_basic_rates);
  1090. IWL_DEBUG_RADIO(priv, "u8 cck_basic_rates: 0x%02x\n", rxon->cck_basic_rates);
  1091. IWL_DEBUG_RADIO(priv, "u8[6] node_addr: %pM\n", rxon->node_addr);
  1092. IWL_DEBUG_RADIO(priv, "u8[6] bssid_addr: %pM\n", rxon->bssid_addr);
  1093. IWL_DEBUG_RADIO(priv, "u16 assoc_id: 0x%x\n", le16_to_cpu(rxon->assoc_id));
  1094. }
  1095. #endif
  1096. /**
  1097. * iwl_irq_handle_error - called for HW or SW error interrupt from card
  1098. */
  1099. void iwl_irq_handle_error(struct iwl_priv *priv)
  1100. {
  1101. /* Set the FW error flag -- cleared on iwl_down */
  1102. set_bit(STATUS_FW_ERROR, &priv->status);
  1103. /* Cancel currently queued command. */
  1104. clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
  1105. #ifdef CONFIG_IWLWIFI_DEBUG
  1106. if (iwl_get_debug_level(priv) & IWL_DL_FW_ERRORS) {
  1107. priv->cfg->ops->lib->dump_nic_error_log(priv);
  1108. priv->cfg->ops->lib->dump_nic_event_log(priv);
  1109. iwl_print_rx_config_cmd(priv);
  1110. }
  1111. #endif
  1112. wake_up_interruptible(&priv->wait_command_queue);
  1113. /* Keep the restart process from trying to send host
  1114. * commands by clearing the INIT status bit */
  1115. clear_bit(STATUS_READY, &priv->status);
  1116. if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  1117. IWL_DEBUG(priv, IWL_DL_FW_ERRORS,
  1118. "Restarting adapter due to uCode error.\n");
  1119. if (priv->cfg->mod_params->restart_fw)
  1120. queue_work(priv->workqueue, &priv->restart);
  1121. }
  1122. }
  1123. EXPORT_SYMBOL(iwl_irq_handle_error);
  1124. void iwl_configure_filter(struct ieee80211_hw *hw,
  1125. unsigned int changed_flags,
  1126. unsigned int *total_flags,
  1127. u64 multicast)
  1128. {
  1129. struct iwl_priv *priv = hw->priv;
  1130. __le32 *filter_flags = &priv->staging_rxon.filter_flags;
  1131. IWL_DEBUG_MAC80211(priv, "Enter: changed: 0x%x, total: 0x%x\n",
  1132. changed_flags, *total_flags);
  1133. if (changed_flags & (FIF_OTHER_BSS | FIF_PROMISC_IN_BSS)) {
  1134. if (*total_flags & (FIF_OTHER_BSS | FIF_PROMISC_IN_BSS))
  1135. *filter_flags |= RXON_FILTER_PROMISC_MSK;
  1136. else
  1137. *filter_flags &= ~RXON_FILTER_PROMISC_MSK;
  1138. }
  1139. if (changed_flags & FIF_ALLMULTI) {
  1140. if (*total_flags & FIF_ALLMULTI)
  1141. *filter_flags |= RXON_FILTER_ACCEPT_GRP_MSK;
  1142. else
  1143. *filter_flags &= ~RXON_FILTER_ACCEPT_GRP_MSK;
  1144. }
  1145. if (changed_flags & FIF_CONTROL) {
  1146. if (*total_flags & FIF_CONTROL)
  1147. *filter_flags |= RXON_FILTER_CTL2HOST_MSK;
  1148. else
  1149. *filter_flags &= ~RXON_FILTER_CTL2HOST_MSK;
  1150. }
  1151. if (changed_flags & FIF_BCN_PRBRESP_PROMISC) {
  1152. if (*total_flags & FIF_BCN_PRBRESP_PROMISC)
  1153. *filter_flags |= RXON_FILTER_BCON_AWARE_MSK;
  1154. else
  1155. *filter_flags &= ~RXON_FILTER_BCON_AWARE_MSK;
  1156. }
  1157. /* We avoid iwl_commit_rxon here to commit the new filter flags
  1158. * since mac80211 will call ieee80211_hw_config immediately.
  1159. * (mc_list is not supported at this time). Otherwise, we need to
  1160. * queue a background iwl_commit_rxon work.
  1161. */
  1162. *total_flags &= FIF_OTHER_BSS | FIF_ALLMULTI | FIF_PROMISC_IN_BSS |
  1163. FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL;
  1164. }
  1165. EXPORT_SYMBOL(iwl_configure_filter);
  1166. int iwl_setup_mac(struct iwl_priv *priv)
  1167. {
  1168. int ret;
  1169. struct ieee80211_hw *hw = priv->hw;
  1170. hw->rate_control_algorithm = "iwl-agn-rs";
  1171. /* Tell mac80211 our characteristics */
  1172. hw->flags = IEEE80211_HW_SIGNAL_DBM |
  1173. IEEE80211_HW_NOISE_DBM |
  1174. IEEE80211_HW_AMPDU_AGGREGATION |
  1175. IEEE80211_HW_SPECTRUM_MGMT;
  1176. if (!priv->cfg->broken_powersave)
  1177. hw->flags |= IEEE80211_HW_SUPPORTS_PS |
  1178. IEEE80211_HW_SUPPORTS_DYNAMIC_PS;
  1179. hw->wiphy->interface_modes =
  1180. BIT(NL80211_IFTYPE_STATION) |
  1181. BIT(NL80211_IFTYPE_ADHOC);
  1182. hw->wiphy->custom_regulatory = true;
  1183. /* Firmware does not support this */
  1184. hw->wiphy->disable_beacon_hints = true;
  1185. /*
  1186. * For now, disable PS by default because it affects
  1187. * RX performance significantly.
  1188. */
  1189. hw->wiphy->ps_default = false;
  1190. hw->wiphy->max_scan_ssids = PROBE_OPTION_MAX;
  1191. /* we create the 802.11 header and a zero-length SSID element */
  1192. hw->wiphy->max_scan_ie_len = IWL_MAX_PROBE_REQUEST - 24 - 2;
  1193. /* Default value; 4 EDCA QOS priorities */
  1194. hw->queues = 4;
  1195. hw->max_listen_interval = IWL_CONN_MAX_LISTEN_INTERVAL;
  1196. if (priv->bands[IEEE80211_BAND_2GHZ].n_channels)
  1197. priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
  1198. &priv->bands[IEEE80211_BAND_2GHZ];
  1199. if (priv->bands[IEEE80211_BAND_5GHZ].n_channels)
  1200. priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
  1201. &priv->bands[IEEE80211_BAND_5GHZ];
  1202. ret = ieee80211_register_hw(priv->hw);
  1203. if (ret) {
  1204. IWL_ERR(priv, "Failed to register hw (error %d)\n", ret);
  1205. return ret;
  1206. }
  1207. priv->mac80211_registered = 1;
  1208. return 0;
  1209. }
  1210. EXPORT_SYMBOL(iwl_setup_mac);
  1211. int iwl_set_hw_params(struct iwl_priv *priv)
  1212. {
  1213. priv->hw_params.max_rxq_size = RX_QUEUE_SIZE;
  1214. priv->hw_params.max_rxq_log = RX_QUEUE_SIZE_LOG;
  1215. if (priv->cfg->mod_params->amsdu_size_8K)
  1216. priv->hw_params.rx_buf_size = IWL_RX_BUF_SIZE_8K;
  1217. else
  1218. priv->hw_params.rx_buf_size = IWL_RX_BUF_SIZE_4K;
  1219. priv->hw_params.max_pkt_size = priv->hw_params.rx_buf_size - 256;
  1220. priv->hw_params.max_beacon_itrvl = IWL_MAX_UCODE_BEACON_INTERVAL;
  1221. if (priv->cfg->mod_params->disable_11n)
  1222. priv->cfg->sku &= ~IWL_SKU_N;
  1223. /* Device-specific setup */
  1224. return priv->cfg->ops->lib->set_hw_params(priv);
  1225. }
  1226. EXPORT_SYMBOL(iwl_set_hw_params);
  1227. int iwl_init_drv(struct iwl_priv *priv)
  1228. {
  1229. int ret;
  1230. priv->ibss_beacon = NULL;
  1231. spin_lock_init(&priv->lock);
  1232. spin_lock_init(&priv->sta_lock);
  1233. spin_lock_init(&priv->hcmd_lock);
  1234. INIT_LIST_HEAD(&priv->free_frames);
  1235. mutex_init(&priv->mutex);
  1236. /* Clear the driver's (not device's) station table */
  1237. iwl_clear_stations_table(priv);
  1238. priv->data_retry_limit = -1;
  1239. priv->ieee_channels = NULL;
  1240. priv->ieee_rates = NULL;
  1241. priv->band = IEEE80211_BAND_2GHZ;
  1242. priv->iw_mode = NL80211_IFTYPE_STATION;
  1243. /* Choose which receivers/antennas to use */
  1244. if (priv->cfg->ops->hcmd->set_rxon_chain)
  1245. priv->cfg->ops->hcmd->set_rxon_chain(priv);
  1246. iwl_init_scan_params(priv);
  1247. iwl_reset_qos(priv);
  1248. priv->qos_data.qos_active = 0;
  1249. priv->qos_data.qos_cap.val = 0;
  1250. priv->rates_mask = IWL_RATES_MASK;
  1251. /* Set the tx_power_user_lmt to the lowest power level
  1252. * this value will get overwritten by channel max power avg
  1253. * from eeprom */
  1254. priv->tx_power_user_lmt = IWL_TX_POWER_TARGET_POWER_MIN;
  1255. ret = iwl_init_channel_map(priv);
  1256. if (ret) {
  1257. IWL_ERR(priv, "initializing regulatory failed: %d\n", ret);
  1258. goto err;
  1259. }
  1260. ret = iwlcore_init_geos(priv);
  1261. if (ret) {
  1262. IWL_ERR(priv, "initializing geos failed: %d\n", ret);
  1263. goto err_free_channel_map;
  1264. }
  1265. iwlcore_init_hw_rates(priv, priv->ieee_rates);
  1266. return 0;
  1267. err_free_channel_map:
  1268. iwl_free_channel_map(priv);
  1269. err:
  1270. return ret;
  1271. }
  1272. EXPORT_SYMBOL(iwl_init_drv);
  1273. int iwl_set_tx_power(struct iwl_priv *priv, s8 tx_power, bool force)
  1274. {
  1275. int ret = 0;
  1276. s8 prev_tx_power = priv->tx_power_user_lmt;
  1277. if (tx_power < IWL_TX_POWER_TARGET_POWER_MIN) {
  1278. IWL_WARN(priv, "Requested user TXPOWER %d below lower limit %d.\n",
  1279. tx_power,
  1280. IWL_TX_POWER_TARGET_POWER_MIN);
  1281. return -EINVAL;
  1282. }
  1283. if (tx_power > priv->tx_power_device_lmt) {
  1284. IWL_WARN(priv,
  1285. "Requested user TXPOWER %d above upper limit %d.\n",
  1286. tx_power, priv->tx_power_device_lmt);
  1287. return -EINVAL;
  1288. }
  1289. if (priv->tx_power_user_lmt != tx_power)
  1290. force = true;
  1291. /* if nic is not up don't send command */
  1292. if (iwl_is_ready_rf(priv)) {
  1293. priv->tx_power_user_lmt = tx_power;
  1294. if (force && priv->cfg->ops->lib->send_tx_power)
  1295. ret = priv->cfg->ops->lib->send_tx_power(priv);
  1296. else if (!priv->cfg->ops->lib->send_tx_power)
  1297. ret = -EOPNOTSUPP;
  1298. /*
  1299. * if fail to set tx_power, restore the orig. tx power
  1300. */
  1301. if (ret)
  1302. priv->tx_power_user_lmt = prev_tx_power;
  1303. }
  1304. /*
  1305. * Even this is an async host command, the command
  1306. * will always report success from uCode
  1307. * So once driver can placing the command into the queue
  1308. * successfully, driver can use priv->tx_power_user_lmt
  1309. * to reflect the current tx power
  1310. */
  1311. return ret;
  1312. }
  1313. EXPORT_SYMBOL(iwl_set_tx_power);
  1314. void iwl_uninit_drv(struct iwl_priv *priv)
  1315. {
  1316. iwl_calib_free_results(priv);
  1317. iwlcore_free_geos(priv);
  1318. iwl_free_channel_map(priv);
  1319. kfree(priv->scan);
  1320. }
  1321. EXPORT_SYMBOL(iwl_uninit_drv);
  1322. #define ICT_COUNT (PAGE_SIZE/sizeof(u32))
  1323. /* Free dram table */
  1324. void iwl_free_isr_ict(struct iwl_priv *priv)
  1325. {
  1326. if (priv->ict_tbl_vir) {
  1327. pci_free_consistent(priv->pci_dev, (sizeof(u32) * ICT_COUNT) +
  1328. PAGE_SIZE, priv->ict_tbl_vir,
  1329. priv->ict_tbl_dma);
  1330. priv->ict_tbl_vir = NULL;
  1331. }
  1332. }
  1333. EXPORT_SYMBOL(iwl_free_isr_ict);
  1334. /* allocate dram shared table it is a PAGE_SIZE aligned
  1335. * also reset all data related to ICT table interrupt.
  1336. */
  1337. int iwl_alloc_isr_ict(struct iwl_priv *priv)
  1338. {
  1339. if (priv->cfg->use_isr_legacy)
  1340. return 0;
  1341. /* allocate shrared data table */
  1342. priv->ict_tbl_vir = pci_alloc_consistent(priv->pci_dev, (sizeof(u32) *
  1343. ICT_COUNT) + PAGE_SIZE,
  1344. &priv->ict_tbl_dma);
  1345. if (!priv->ict_tbl_vir)
  1346. return -ENOMEM;
  1347. /* align table to PAGE_SIZE boundry */
  1348. priv->aligned_ict_tbl_dma = ALIGN(priv->ict_tbl_dma, PAGE_SIZE);
  1349. IWL_DEBUG_ISR(priv, "ict dma addr %Lx dma aligned %Lx diff %d\n",
  1350. (unsigned long long)priv->ict_tbl_dma,
  1351. (unsigned long long)priv->aligned_ict_tbl_dma,
  1352. (int)(priv->aligned_ict_tbl_dma - priv->ict_tbl_dma));
  1353. priv->ict_tbl = priv->ict_tbl_vir +
  1354. (priv->aligned_ict_tbl_dma - priv->ict_tbl_dma);
  1355. IWL_DEBUG_ISR(priv, "ict vir addr %p vir aligned %p diff %d\n",
  1356. priv->ict_tbl, priv->ict_tbl_vir,
  1357. (int)(priv->aligned_ict_tbl_dma - priv->ict_tbl_dma));
  1358. /* reset table and index to all 0 */
  1359. memset(priv->ict_tbl_vir,0, (sizeof(u32) * ICT_COUNT) + PAGE_SIZE);
  1360. priv->ict_index = 0;
  1361. /* add periodic RX interrupt */
  1362. priv->inta_mask |= CSR_INT_BIT_RX_PERIODIC;
  1363. return 0;
  1364. }
  1365. EXPORT_SYMBOL(iwl_alloc_isr_ict);
  1366. /* Device is going up inform it about using ICT interrupt table,
  1367. * also we need to tell the driver to start using ICT interrupt.
  1368. */
  1369. int iwl_reset_ict(struct iwl_priv *priv)
  1370. {
  1371. u32 val;
  1372. unsigned long flags;
  1373. if (!priv->ict_tbl_vir)
  1374. return 0;
  1375. spin_lock_irqsave(&priv->lock, flags);
  1376. iwl_disable_interrupts(priv);
  1377. memset(&priv->ict_tbl[0], 0, sizeof(u32) * ICT_COUNT);
  1378. val = priv->aligned_ict_tbl_dma >> PAGE_SHIFT;
  1379. val |= CSR_DRAM_INT_TBL_ENABLE;
  1380. val |= CSR_DRAM_INIT_TBL_WRAP_CHECK;
  1381. IWL_DEBUG_ISR(priv, "CSR_DRAM_INT_TBL_REG =0x%X "
  1382. "aligned dma address %Lx\n",
  1383. val, (unsigned long long)priv->aligned_ict_tbl_dma);
  1384. iwl_write32(priv, CSR_DRAM_INT_TBL_REG, val);
  1385. priv->use_ict = true;
  1386. priv->ict_index = 0;
  1387. iwl_write32(priv, CSR_INT, priv->inta_mask);
  1388. iwl_enable_interrupts(priv);
  1389. spin_unlock_irqrestore(&priv->lock, flags);
  1390. return 0;
  1391. }
  1392. EXPORT_SYMBOL(iwl_reset_ict);
  1393. /* Device is going down disable ict interrupt usage */
  1394. void iwl_disable_ict(struct iwl_priv *priv)
  1395. {
  1396. unsigned long flags;
  1397. spin_lock_irqsave(&priv->lock, flags);
  1398. priv->use_ict = false;
  1399. spin_unlock_irqrestore(&priv->lock, flags);
  1400. }
  1401. EXPORT_SYMBOL(iwl_disable_ict);
  1402. /* interrupt handler using ict table, with this interrupt driver will
  1403. * stop using INTA register to get device's interrupt, reading this register
  1404. * is expensive, device will write interrupts in ICT dram table, increment
  1405. * index then will fire interrupt to driver, driver will OR all ICT table
  1406. * entries from current index up to table entry with 0 value. the result is
  1407. * the interrupt we need to service, driver will set the entries back to 0 and
  1408. * set index.
  1409. */
  1410. irqreturn_t iwl_isr_ict(int irq, void *data)
  1411. {
  1412. struct iwl_priv *priv = data;
  1413. u32 inta, inta_mask;
  1414. u32 val = 0;
  1415. if (!priv)
  1416. return IRQ_NONE;
  1417. /* dram interrupt table not set yet,
  1418. * use legacy interrupt.
  1419. */
  1420. if (!priv->use_ict)
  1421. return iwl_isr(irq, data);
  1422. spin_lock(&priv->lock);
  1423. /* Disable (but don't clear!) interrupts here to avoid
  1424. * back-to-back ISRs and sporadic interrupts from our NIC.
  1425. * If we have something to service, the tasklet will re-enable ints.
  1426. * If we *don't* have something, we'll re-enable before leaving here.
  1427. */
  1428. inta_mask = iwl_read32(priv, CSR_INT_MASK); /* just for debug */
  1429. iwl_write32(priv, CSR_INT_MASK, 0x00000000);
  1430. /* Ignore interrupt if there's nothing in NIC to service.
  1431. * This may be due to IRQ shared with another device,
  1432. * or due to sporadic interrupts thrown from our NIC. */
  1433. if (!priv->ict_tbl[priv->ict_index]) {
  1434. IWL_DEBUG_ISR(priv, "Ignore interrupt, inta == 0\n");
  1435. goto none;
  1436. }
  1437. /* read all entries that not 0 start with ict_index */
  1438. while (priv->ict_tbl[priv->ict_index]) {
  1439. val |= le32_to_cpu(priv->ict_tbl[priv->ict_index]);
  1440. IWL_DEBUG_ISR(priv, "ICT index %d value 0x%08X\n",
  1441. priv->ict_index,
  1442. le32_to_cpu(priv->ict_tbl[priv->ict_index]));
  1443. priv->ict_tbl[priv->ict_index] = 0;
  1444. priv->ict_index = iwl_queue_inc_wrap(priv->ict_index,
  1445. ICT_COUNT);
  1446. }
  1447. /* We should not get this value, just ignore it. */
  1448. if (val == 0xffffffff)
  1449. val = 0;
  1450. inta = (0xff & val) | ((0xff00 & val) << 16);
  1451. IWL_DEBUG_ISR(priv, "ISR inta 0x%08x, enabled 0x%08x ict 0x%08x\n",
  1452. inta, inta_mask, val);
  1453. inta &= priv->inta_mask;
  1454. priv->inta |= inta;
  1455. /* iwl_irq_tasklet() will service interrupts and re-enable them */
  1456. if (likely(inta))
  1457. tasklet_schedule(&priv->irq_tasklet);
  1458. else if (test_bit(STATUS_INT_ENABLED, &priv->status) && !priv->inta) {
  1459. /* Allow interrupt if was disabled by this handler and
  1460. * no tasklet was schedules, We should not enable interrupt,
  1461. * tasklet will enable it.
  1462. */
  1463. iwl_enable_interrupts(priv);
  1464. }
  1465. spin_unlock(&priv->lock);
  1466. return IRQ_HANDLED;
  1467. none:
  1468. /* re-enable interrupts here since we don't have anything to service.
  1469. * only Re-enable if disabled by irq.
  1470. */
  1471. if (test_bit(STATUS_INT_ENABLED, &priv->status) && !priv->inta)
  1472. iwl_enable_interrupts(priv);
  1473. spin_unlock(&priv->lock);
  1474. return IRQ_NONE;
  1475. }
  1476. EXPORT_SYMBOL(iwl_isr_ict);
  1477. static irqreturn_t iwl_isr(int irq, void *data)
  1478. {
  1479. struct iwl_priv *priv = data;
  1480. u32 inta, inta_mask;
  1481. #ifdef CONFIG_IWLWIFI_DEBUG
  1482. u32 inta_fh;
  1483. #endif
  1484. if (!priv)
  1485. return IRQ_NONE;
  1486. spin_lock(&priv->lock);
  1487. /* Disable (but don't clear!) interrupts here to avoid
  1488. * back-to-back ISRs and sporadic interrupts from our NIC.
  1489. * If we have something to service, the tasklet will re-enable ints.
  1490. * If we *don't* have something, we'll re-enable before leaving here. */
  1491. inta_mask = iwl_read32(priv, CSR_INT_MASK); /* just for debug */
  1492. iwl_write32(priv, CSR_INT_MASK, 0x00000000);
  1493. /* Discover which interrupts are active/pending */
  1494. inta = iwl_read32(priv, CSR_INT);
  1495. /* Ignore interrupt if there's nothing in NIC to service.
  1496. * This may be due to IRQ shared with another device,
  1497. * or due to sporadic interrupts thrown from our NIC. */
  1498. if (!inta) {
  1499. IWL_DEBUG_ISR(priv, "Ignore interrupt, inta == 0\n");
  1500. goto none;
  1501. }
  1502. if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) {
  1503. /* Hardware disappeared. It might have already raised
  1504. * an interrupt */
  1505. IWL_WARN(priv, "HARDWARE GONE?? INTA == 0x%08x\n", inta);
  1506. goto unplugged;
  1507. }
  1508. #ifdef CONFIG_IWLWIFI_DEBUG
  1509. if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
  1510. inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
  1511. IWL_DEBUG_ISR(priv, "ISR inta 0x%08x, enabled 0x%08x, "
  1512. "fh 0x%08x\n", inta, inta_mask, inta_fh);
  1513. }
  1514. #endif
  1515. priv->inta |= inta;
  1516. /* iwl_irq_tasklet() will service interrupts and re-enable them */
  1517. if (likely(inta))
  1518. tasklet_schedule(&priv->irq_tasklet);
  1519. else if (test_bit(STATUS_INT_ENABLED, &priv->status) && !priv->inta)
  1520. iwl_enable_interrupts(priv);
  1521. unplugged:
  1522. spin_unlock(&priv->lock);
  1523. return IRQ_HANDLED;
  1524. none:
  1525. /* re-enable interrupts here since we don't have anything to service. */
  1526. /* only Re-enable if diabled by irq and no schedules tasklet. */
  1527. if (test_bit(STATUS_INT_ENABLED, &priv->status) && !priv->inta)
  1528. iwl_enable_interrupts(priv);
  1529. spin_unlock(&priv->lock);
  1530. return IRQ_NONE;
  1531. }
  1532. irqreturn_t iwl_isr_legacy(int irq, void *data)
  1533. {
  1534. struct iwl_priv *priv = data;
  1535. u32 inta, inta_mask;
  1536. u32 inta_fh;
  1537. if (!priv)
  1538. return IRQ_NONE;
  1539. spin_lock(&priv->lock);
  1540. /* Disable (but don't clear!) interrupts here to avoid
  1541. * back-to-back ISRs and sporadic interrupts from our NIC.
  1542. * If we have something to service, the tasklet will re-enable ints.
  1543. * If we *don't* have something, we'll re-enable before leaving here. */
  1544. inta_mask = iwl_read32(priv, CSR_INT_MASK); /* just for debug */
  1545. iwl_write32(priv, CSR_INT_MASK, 0x00000000);
  1546. /* Discover which interrupts are active/pending */
  1547. inta = iwl_read32(priv, CSR_INT);
  1548. inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
  1549. /* Ignore interrupt if there's nothing in NIC to service.
  1550. * This may be due to IRQ shared with another device,
  1551. * or due to sporadic interrupts thrown from our NIC. */
  1552. if (!inta && !inta_fh) {
  1553. IWL_DEBUG_ISR(priv, "Ignore interrupt, inta == 0, inta_fh == 0\n");
  1554. goto none;
  1555. }
  1556. if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) {
  1557. /* Hardware disappeared. It might have already raised
  1558. * an interrupt */
  1559. IWL_WARN(priv, "HARDWARE GONE?? INTA == 0x%08x\n", inta);
  1560. goto unplugged;
  1561. }
  1562. IWL_DEBUG_ISR(priv, "ISR inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
  1563. inta, inta_mask, inta_fh);
  1564. inta &= ~CSR_INT_BIT_SCD;
  1565. /* iwl_irq_tasklet() will service interrupts and re-enable them */
  1566. if (likely(inta || inta_fh))
  1567. tasklet_schedule(&priv->irq_tasklet);
  1568. unplugged:
  1569. spin_unlock(&priv->lock);
  1570. return IRQ_HANDLED;
  1571. none:
  1572. /* re-enable interrupts here since we don't have anything to service. */
  1573. /* only Re-enable if diabled by irq */
  1574. if (test_bit(STATUS_INT_ENABLED, &priv->status))
  1575. iwl_enable_interrupts(priv);
  1576. spin_unlock(&priv->lock);
  1577. return IRQ_NONE;
  1578. }
  1579. EXPORT_SYMBOL(iwl_isr_legacy);
  1580. int iwl_send_bt_config(struct iwl_priv *priv)
  1581. {
  1582. struct iwl_bt_cmd bt_cmd = {
  1583. .flags = 3,
  1584. .lead_time = 0xAA,
  1585. .max_kill = 1,
  1586. .kill_ack_mask = 0,
  1587. .kill_cts_mask = 0,
  1588. };
  1589. return iwl_send_cmd_pdu(priv, REPLY_BT_CONFIG,
  1590. sizeof(struct iwl_bt_cmd), &bt_cmd);
  1591. }
  1592. EXPORT_SYMBOL(iwl_send_bt_config);
  1593. int iwl_send_statistics_request(struct iwl_priv *priv, u8 flags)
  1594. {
  1595. u32 stat_flags = 0;
  1596. struct iwl_host_cmd cmd = {
  1597. .id = REPLY_STATISTICS_CMD,
  1598. .flags = flags,
  1599. .len = sizeof(stat_flags),
  1600. .data = (u8 *) &stat_flags,
  1601. };
  1602. return iwl_send_cmd(priv, &cmd);
  1603. }
  1604. EXPORT_SYMBOL(iwl_send_statistics_request);
  1605. /**
  1606. * iwl_verify_inst_sparse - verify runtime uCode image in card vs. host,
  1607. * using sample data 100 bytes apart. If these sample points are good,
  1608. * it's a pretty good bet that everything between them is good, too.
  1609. */
  1610. static int iwlcore_verify_inst_sparse(struct iwl_priv *priv, __le32 *image, u32 len)
  1611. {
  1612. u32 val;
  1613. int ret = 0;
  1614. u32 errcnt = 0;
  1615. u32 i;
  1616. IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len);
  1617. for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
  1618. /* read data comes through single port, auto-incr addr */
  1619. /* NOTE: Use the debugless read so we don't flood kernel log
  1620. * if IWL_DL_IO is set */
  1621. iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
  1622. i + IWL49_RTC_INST_LOWER_BOUND);
  1623. val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
  1624. if (val != le32_to_cpu(*image)) {
  1625. ret = -EIO;
  1626. errcnt++;
  1627. if (errcnt >= 3)
  1628. break;
  1629. }
  1630. }
  1631. return ret;
  1632. }
  1633. /**
  1634. * iwlcore_verify_inst_full - verify runtime uCode image in card vs. host,
  1635. * looking at all data.
  1636. */
  1637. static int iwl_verify_inst_full(struct iwl_priv *priv, __le32 *image,
  1638. u32 len)
  1639. {
  1640. u32 val;
  1641. u32 save_len = len;
  1642. int ret = 0;
  1643. u32 errcnt;
  1644. IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len);
  1645. iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
  1646. IWL49_RTC_INST_LOWER_BOUND);
  1647. errcnt = 0;
  1648. for (; len > 0; len -= sizeof(u32), image++) {
  1649. /* read data comes through single port, auto-incr addr */
  1650. /* NOTE: Use the debugless read so we don't flood kernel log
  1651. * if IWL_DL_IO is set */
  1652. val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
  1653. if (val != le32_to_cpu(*image)) {
  1654. IWL_ERR(priv, "uCode INST section is invalid at "
  1655. "offset 0x%x, is 0x%x, s/b 0x%x\n",
  1656. save_len - len, val, le32_to_cpu(*image));
  1657. ret = -EIO;
  1658. errcnt++;
  1659. if (errcnt >= 20)
  1660. break;
  1661. }
  1662. }
  1663. if (!errcnt)
  1664. IWL_DEBUG_INFO(priv,
  1665. "ucode image in INSTRUCTION memory is good\n");
  1666. return ret;
  1667. }
  1668. /**
  1669. * iwl_verify_ucode - determine which instruction image is in SRAM,
  1670. * and verify its contents
  1671. */
  1672. int iwl_verify_ucode(struct iwl_priv *priv)
  1673. {
  1674. __le32 *image;
  1675. u32 len;
  1676. int ret;
  1677. /* Try bootstrap */
  1678. image = (__le32 *)priv->ucode_boot.v_addr;
  1679. len = priv->ucode_boot.len;
  1680. ret = iwlcore_verify_inst_sparse(priv, image, len);
  1681. if (!ret) {
  1682. IWL_DEBUG_INFO(priv, "Bootstrap uCode is good in inst SRAM\n");
  1683. return 0;
  1684. }
  1685. /* Try initialize */
  1686. image = (__le32 *)priv->ucode_init.v_addr;
  1687. len = priv->ucode_init.len;
  1688. ret = iwlcore_verify_inst_sparse(priv, image, len);
  1689. if (!ret) {
  1690. IWL_DEBUG_INFO(priv, "Initialize uCode is good in inst SRAM\n");
  1691. return 0;
  1692. }
  1693. /* Try runtime/protocol */
  1694. image = (__le32 *)priv->ucode_code.v_addr;
  1695. len = priv->ucode_code.len;
  1696. ret = iwlcore_verify_inst_sparse(priv, image, len);
  1697. if (!ret) {
  1698. IWL_DEBUG_INFO(priv, "Runtime uCode is good in inst SRAM\n");
  1699. return 0;
  1700. }
  1701. IWL_ERR(priv, "NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
  1702. /* Since nothing seems to match, show first several data entries in
  1703. * instruction SRAM, so maybe visual inspection will give a clue.
  1704. * Selection of bootstrap image (vs. other images) is arbitrary. */
  1705. image = (__le32 *)priv->ucode_boot.v_addr;
  1706. len = priv->ucode_boot.len;
  1707. ret = iwl_verify_inst_full(priv, image, len);
  1708. return ret;
  1709. }
  1710. EXPORT_SYMBOL(iwl_verify_ucode);
  1711. void iwl_rf_kill_ct_config(struct iwl_priv *priv)
  1712. {
  1713. struct iwl_ct_kill_config cmd;
  1714. struct iwl_ct_kill_throttling_config adv_cmd;
  1715. unsigned long flags;
  1716. int ret = 0;
  1717. spin_lock_irqsave(&priv->lock, flags);
  1718. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
  1719. CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT);
  1720. spin_unlock_irqrestore(&priv->lock, flags);
  1721. priv->thermal_throttle.ct_kill_toggle = false;
  1722. switch (priv->hw_rev & CSR_HW_REV_TYPE_MSK) {
  1723. case CSR_HW_REV_TYPE_1000:
  1724. case CSR_HW_REV_TYPE_6x00:
  1725. case CSR_HW_REV_TYPE_6x50:
  1726. adv_cmd.critical_temperature_enter =
  1727. cpu_to_le32(priv->hw_params.ct_kill_threshold);
  1728. adv_cmd.critical_temperature_exit =
  1729. cpu_to_le32(priv->hw_params.ct_kill_exit_threshold);
  1730. ret = iwl_send_cmd_pdu(priv, REPLY_CT_KILL_CONFIG_CMD,
  1731. sizeof(adv_cmd), &adv_cmd);
  1732. if (ret)
  1733. IWL_ERR(priv, "REPLY_CT_KILL_CONFIG_CMD failed\n");
  1734. else
  1735. IWL_DEBUG_INFO(priv, "REPLY_CT_KILL_CONFIG_CMD "
  1736. "succeeded, "
  1737. "critical temperature enter is %d,"
  1738. "exit is %d\n",
  1739. priv->hw_params.ct_kill_threshold,
  1740. priv->hw_params.ct_kill_exit_threshold);
  1741. break;
  1742. default:
  1743. cmd.critical_temperature_R =
  1744. cpu_to_le32(priv->hw_params.ct_kill_threshold);
  1745. ret = iwl_send_cmd_pdu(priv, REPLY_CT_KILL_CONFIG_CMD,
  1746. sizeof(cmd), &cmd);
  1747. if (ret)
  1748. IWL_ERR(priv, "REPLY_CT_KILL_CONFIG_CMD failed\n");
  1749. else
  1750. IWL_DEBUG_INFO(priv, "REPLY_CT_KILL_CONFIG_CMD "
  1751. "succeeded, "
  1752. "critical temperature is %d\n",
  1753. priv->hw_params.ct_kill_threshold);
  1754. break;
  1755. }
  1756. }
  1757. EXPORT_SYMBOL(iwl_rf_kill_ct_config);
  1758. /*
  1759. * CARD_STATE_CMD
  1760. *
  1761. * Use: Sets the device's internal card state to enable, disable, or halt
  1762. *
  1763. * When in the 'enable' state the card operates as normal.
  1764. * When in the 'disable' state, the card enters into a low power mode.
  1765. * When in the 'halt' state, the card is shut down and must be fully
  1766. * restarted to come back on.
  1767. */
  1768. int iwl_send_card_state(struct iwl_priv *priv, u32 flags, u8 meta_flag)
  1769. {
  1770. struct iwl_host_cmd cmd = {
  1771. .id = REPLY_CARD_STATE_CMD,
  1772. .len = sizeof(u32),
  1773. .data = &flags,
  1774. .flags = meta_flag,
  1775. };
  1776. return iwl_send_cmd(priv, &cmd);
  1777. }
  1778. void iwl_rx_pm_sleep_notif(struct iwl_priv *priv,
  1779. struct iwl_rx_mem_buffer *rxb)
  1780. {
  1781. #ifdef CONFIG_IWLWIFI_DEBUG
  1782. struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
  1783. struct iwl_sleep_notification *sleep = &(pkt->u.sleep_notif);
  1784. IWL_DEBUG_RX(priv, "sleep mode: %d, src: %d\n",
  1785. sleep->pm_sleep_mode, sleep->pm_wakeup_src);
  1786. #endif
  1787. }
  1788. EXPORT_SYMBOL(iwl_rx_pm_sleep_notif);
  1789. void iwl_rx_pm_debug_statistics_notif(struct iwl_priv *priv,
  1790. struct iwl_rx_mem_buffer *rxb)
  1791. {
  1792. struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
  1793. u32 len = le32_to_cpu(pkt->len_n_flags) & FH_RSCSR_FRAME_SIZE_MSK;
  1794. IWL_DEBUG_RADIO(priv, "Dumping %d bytes of unhandled "
  1795. "notification for %s:\n", len,
  1796. get_cmd_string(pkt->hdr.cmd));
  1797. iwl_print_hex_dump(priv, IWL_DL_RADIO, pkt->u.raw, len);
  1798. }
  1799. EXPORT_SYMBOL(iwl_rx_pm_debug_statistics_notif);
  1800. void iwl_rx_reply_error(struct iwl_priv *priv,
  1801. struct iwl_rx_mem_buffer *rxb)
  1802. {
  1803. struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
  1804. IWL_ERR(priv, "Error Reply type 0x%08X cmd %s (0x%02X) "
  1805. "seq 0x%04X ser 0x%08X\n",
  1806. le32_to_cpu(pkt->u.err_resp.error_type),
  1807. get_cmd_string(pkt->u.err_resp.cmd_id),
  1808. pkt->u.err_resp.cmd_id,
  1809. le16_to_cpu(pkt->u.err_resp.bad_cmd_seq_num),
  1810. le32_to_cpu(pkt->u.err_resp.error_info));
  1811. }
  1812. EXPORT_SYMBOL(iwl_rx_reply_error);
  1813. void iwl_clear_isr_stats(struct iwl_priv *priv)
  1814. {
  1815. memset(&priv->isr_stats, 0, sizeof(priv->isr_stats));
  1816. }
  1817. int iwl_mac_conf_tx(struct ieee80211_hw *hw, u16 queue,
  1818. const struct ieee80211_tx_queue_params *params)
  1819. {
  1820. struct iwl_priv *priv = hw->priv;
  1821. unsigned long flags;
  1822. int q;
  1823. IWL_DEBUG_MAC80211(priv, "enter\n");
  1824. if (!iwl_is_ready_rf(priv)) {
  1825. IWL_DEBUG_MAC80211(priv, "leave - RF not ready\n");
  1826. return -EIO;
  1827. }
  1828. if (queue >= AC_NUM) {
  1829. IWL_DEBUG_MAC80211(priv, "leave - queue >= AC_NUM %d\n", queue);
  1830. return 0;
  1831. }
  1832. q = AC_NUM - 1 - queue;
  1833. spin_lock_irqsave(&priv->lock, flags);
  1834. priv->qos_data.def_qos_parm.ac[q].cw_min = cpu_to_le16(params->cw_min);
  1835. priv->qos_data.def_qos_parm.ac[q].cw_max = cpu_to_le16(params->cw_max);
  1836. priv->qos_data.def_qos_parm.ac[q].aifsn = params->aifs;
  1837. priv->qos_data.def_qos_parm.ac[q].edca_txop =
  1838. cpu_to_le16((params->txop * 32));
  1839. priv->qos_data.def_qos_parm.ac[q].reserved1 = 0;
  1840. priv->qos_data.qos_active = 1;
  1841. if (priv->iw_mode == NL80211_IFTYPE_AP)
  1842. iwl_activate_qos(priv, 1);
  1843. else if (priv->assoc_id && iwl_is_associated(priv))
  1844. iwl_activate_qos(priv, 0);
  1845. spin_unlock_irqrestore(&priv->lock, flags);
  1846. IWL_DEBUG_MAC80211(priv, "leave\n");
  1847. return 0;
  1848. }
  1849. EXPORT_SYMBOL(iwl_mac_conf_tx);
  1850. static void iwl_ht_conf(struct iwl_priv *priv,
  1851. struct ieee80211_bss_conf *bss_conf)
  1852. {
  1853. struct iwl_ht_config *ht_conf = &priv->current_ht_config;
  1854. struct ieee80211_sta *sta;
  1855. IWL_DEBUG_MAC80211(priv, "enter: \n");
  1856. if (!ht_conf->is_ht)
  1857. return;
  1858. ht_conf->ht_protection =
  1859. bss_conf->ht_operation_mode & IEEE80211_HT_OP_MODE_PROTECTION;
  1860. ht_conf->non_GF_STA_present =
  1861. !!(bss_conf->ht_operation_mode & IEEE80211_HT_OP_MODE_NON_GF_STA_PRSNT);
  1862. ht_conf->single_chain_sufficient = false;
  1863. switch (priv->iw_mode) {
  1864. case NL80211_IFTYPE_STATION:
  1865. rcu_read_lock();
  1866. sta = ieee80211_find_sta(priv->hw, priv->bssid);
  1867. if (sta) {
  1868. struct ieee80211_sta_ht_cap *ht_cap = &sta->ht_cap;
  1869. int maxstreams;
  1870. maxstreams = (ht_cap->mcs.tx_params &
  1871. IEEE80211_HT_MCS_TX_MAX_STREAMS_MASK)
  1872. >> IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT;
  1873. maxstreams += 1;
  1874. if ((ht_cap->mcs.rx_mask[1] == 0) &&
  1875. (ht_cap->mcs.rx_mask[2] == 0))
  1876. ht_conf->single_chain_sufficient = true;
  1877. if (maxstreams <= 1)
  1878. ht_conf->single_chain_sufficient = true;
  1879. } else {
  1880. /*
  1881. * If at all, this can only happen through a race
  1882. * when the AP disconnects us while we're still
  1883. * setting up the connection, in that case mac80211
  1884. * will soon tell us about that.
  1885. */
  1886. ht_conf->single_chain_sufficient = true;
  1887. }
  1888. rcu_read_unlock();
  1889. break;
  1890. case NL80211_IFTYPE_ADHOC:
  1891. ht_conf->single_chain_sufficient = true;
  1892. break;
  1893. default:
  1894. break;
  1895. }
  1896. IWL_DEBUG_MAC80211(priv, "leave\n");
  1897. }
  1898. #define IWL_DELAY_NEXT_SCAN_AFTER_ASSOC (HZ*6)
  1899. void iwl_bss_info_changed(struct ieee80211_hw *hw,
  1900. struct ieee80211_vif *vif,
  1901. struct ieee80211_bss_conf *bss_conf,
  1902. u32 changes)
  1903. {
  1904. struct iwl_priv *priv = hw->priv;
  1905. int ret;
  1906. IWL_DEBUG_MAC80211(priv, "changes = 0x%X\n", changes);
  1907. if (!iwl_is_alive(priv))
  1908. return;
  1909. mutex_lock(&priv->mutex);
  1910. if (changes & BSS_CHANGED_BEACON &&
  1911. priv->iw_mode == NL80211_IFTYPE_AP) {
  1912. dev_kfree_skb(priv->ibss_beacon);
  1913. priv->ibss_beacon = ieee80211_beacon_get(hw, vif);
  1914. }
  1915. if (changes & BSS_CHANGED_BEACON_INT) {
  1916. priv->beacon_int = bss_conf->beacon_int;
  1917. /* TODO: in AP mode, do something to make this take effect */
  1918. }
  1919. if (changes & BSS_CHANGED_BSSID) {
  1920. IWL_DEBUG_MAC80211(priv, "BSSID %pM\n", bss_conf->bssid);
  1921. /*
  1922. * If there is currently a HW scan going on in the
  1923. * background then we need to cancel it else the RXON
  1924. * below/in post_associate will fail.
  1925. */
  1926. if (iwl_scan_cancel_timeout(priv, 100)) {
  1927. IWL_WARN(priv, "Aborted scan still in progress after 100ms\n");
  1928. IWL_DEBUG_MAC80211(priv, "leaving - scan abort failed.\n");
  1929. mutex_unlock(&priv->mutex);
  1930. return;
  1931. }
  1932. /* mac80211 only sets assoc when in STATION mode */
  1933. if (priv->iw_mode == NL80211_IFTYPE_ADHOC ||
  1934. bss_conf->assoc) {
  1935. memcpy(priv->staging_rxon.bssid_addr,
  1936. bss_conf->bssid, ETH_ALEN);
  1937. /* currently needed in a few places */
  1938. memcpy(priv->bssid, bss_conf->bssid, ETH_ALEN);
  1939. } else {
  1940. priv->staging_rxon.filter_flags &=
  1941. ~RXON_FILTER_ASSOC_MSK;
  1942. }
  1943. }
  1944. /*
  1945. * This needs to be after setting the BSSID in case
  1946. * mac80211 decides to do both changes at once because
  1947. * it will invoke post_associate.
  1948. */
  1949. if (priv->iw_mode == NL80211_IFTYPE_ADHOC &&
  1950. changes & BSS_CHANGED_BEACON) {
  1951. struct sk_buff *beacon = ieee80211_beacon_get(hw, vif);
  1952. if (beacon)
  1953. iwl_mac_beacon_update(hw, beacon);
  1954. }
  1955. if (changes & BSS_CHANGED_ERP_PREAMBLE) {
  1956. IWL_DEBUG_MAC80211(priv, "ERP_PREAMBLE %d\n",
  1957. bss_conf->use_short_preamble);
  1958. if (bss_conf->use_short_preamble)
  1959. priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  1960. else
  1961. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  1962. }
  1963. if (changes & BSS_CHANGED_ERP_CTS_PROT) {
  1964. IWL_DEBUG_MAC80211(priv, "ERP_CTS %d\n", bss_conf->use_cts_prot);
  1965. if (bss_conf->use_cts_prot && (priv->band != IEEE80211_BAND_5GHZ))
  1966. priv->staging_rxon.flags |= RXON_FLG_TGG_PROTECT_MSK;
  1967. else
  1968. priv->staging_rxon.flags &= ~RXON_FLG_TGG_PROTECT_MSK;
  1969. }
  1970. if (changes & BSS_CHANGED_BASIC_RATES) {
  1971. /* XXX use this information
  1972. *
  1973. * To do that, remove code from iwl_set_rate() and put something
  1974. * like this here:
  1975. *
  1976. if (A-band)
  1977. priv->staging_rxon.ofdm_basic_rates =
  1978. bss_conf->basic_rates;
  1979. else
  1980. priv->staging_rxon.ofdm_basic_rates =
  1981. bss_conf->basic_rates >> 4;
  1982. priv->staging_rxon.cck_basic_rates =
  1983. bss_conf->basic_rates & 0xF;
  1984. */
  1985. }
  1986. if (changes & BSS_CHANGED_HT) {
  1987. iwl_ht_conf(priv, bss_conf);
  1988. if (priv->cfg->ops->hcmd->set_rxon_chain)
  1989. priv->cfg->ops->hcmd->set_rxon_chain(priv);
  1990. }
  1991. if (changes & BSS_CHANGED_ASSOC) {
  1992. IWL_DEBUG_MAC80211(priv, "ASSOC %d\n", bss_conf->assoc);
  1993. if (bss_conf->assoc) {
  1994. priv->assoc_id = bss_conf->aid;
  1995. priv->beacon_int = bss_conf->beacon_int;
  1996. priv->timestamp = bss_conf->timestamp;
  1997. priv->assoc_capability = bss_conf->assoc_capability;
  1998. /*
  1999. * We have just associated, don't start scan too early
  2000. * leave time for EAPOL exchange to complete.
  2001. *
  2002. * XXX: do this in mac80211
  2003. */
  2004. priv->next_scan_jiffies = jiffies +
  2005. IWL_DELAY_NEXT_SCAN_AFTER_ASSOC;
  2006. if (!iwl_is_rfkill(priv))
  2007. priv->cfg->ops->lib->post_associate(priv);
  2008. } else
  2009. priv->assoc_id = 0;
  2010. }
  2011. if (changes && iwl_is_associated(priv) && priv->assoc_id) {
  2012. IWL_DEBUG_MAC80211(priv, "Changes (%#x) while associated\n",
  2013. changes);
  2014. ret = iwl_send_rxon_assoc(priv);
  2015. if (!ret) {
  2016. /* Sync active_rxon with latest change. */
  2017. memcpy((void *)&priv->active_rxon,
  2018. &priv->staging_rxon,
  2019. sizeof(struct iwl_rxon_cmd));
  2020. }
  2021. }
  2022. mutex_unlock(&priv->mutex);
  2023. IWL_DEBUG_MAC80211(priv, "leave\n");
  2024. }
  2025. EXPORT_SYMBOL(iwl_bss_info_changed);
  2026. int iwl_mac_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb)
  2027. {
  2028. struct iwl_priv *priv = hw->priv;
  2029. unsigned long flags;
  2030. __le64 timestamp;
  2031. IWL_DEBUG_MAC80211(priv, "enter\n");
  2032. if (!iwl_is_ready_rf(priv)) {
  2033. IWL_DEBUG_MAC80211(priv, "leave - RF not ready\n");
  2034. return -EIO;
  2035. }
  2036. if (priv->iw_mode != NL80211_IFTYPE_ADHOC) {
  2037. IWL_DEBUG_MAC80211(priv, "leave - not IBSS\n");
  2038. return -EIO;
  2039. }
  2040. spin_lock_irqsave(&priv->lock, flags);
  2041. if (priv->ibss_beacon)
  2042. dev_kfree_skb(priv->ibss_beacon);
  2043. priv->ibss_beacon = skb;
  2044. priv->assoc_id = 0;
  2045. timestamp = ((struct ieee80211_mgmt *)skb->data)->u.beacon.timestamp;
  2046. priv->timestamp = le64_to_cpu(timestamp);
  2047. IWL_DEBUG_MAC80211(priv, "leave\n");
  2048. spin_unlock_irqrestore(&priv->lock, flags);
  2049. iwl_reset_qos(priv);
  2050. priv->cfg->ops->lib->post_associate(priv);
  2051. return 0;
  2052. }
  2053. EXPORT_SYMBOL(iwl_mac_beacon_update);
  2054. int iwl_set_mode(struct iwl_priv *priv, int mode)
  2055. {
  2056. if (mode == NL80211_IFTYPE_ADHOC) {
  2057. const struct iwl_channel_info *ch_info;
  2058. ch_info = iwl_get_channel_info(priv,
  2059. priv->band,
  2060. le16_to_cpu(priv->staging_rxon.channel));
  2061. if (!ch_info || !is_channel_ibss(ch_info)) {
  2062. IWL_ERR(priv, "channel %d not IBSS channel\n",
  2063. le16_to_cpu(priv->staging_rxon.channel));
  2064. return -EINVAL;
  2065. }
  2066. }
  2067. iwl_connection_init_rx_config(priv, mode);
  2068. if (priv->cfg->ops->hcmd->set_rxon_chain)
  2069. priv->cfg->ops->hcmd->set_rxon_chain(priv);
  2070. memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
  2071. iwl_clear_stations_table(priv);
  2072. /* dont commit rxon if rf-kill is on*/
  2073. if (!iwl_is_ready_rf(priv))
  2074. return -EAGAIN;
  2075. iwlcore_commit_rxon(priv);
  2076. return 0;
  2077. }
  2078. EXPORT_SYMBOL(iwl_set_mode);
  2079. int iwl_mac_add_interface(struct ieee80211_hw *hw,
  2080. struct ieee80211_if_init_conf *conf)
  2081. {
  2082. struct iwl_priv *priv = hw->priv;
  2083. unsigned long flags;
  2084. IWL_DEBUG_MAC80211(priv, "enter: type %d\n", conf->type);
  2085. if (priv->vif) {
  2086. IWL_DEBUG_MAC80211(priv, "leave - vif != NULL\n");
  2087. return -EOPNOTSUPP;
  2088. }
  2089. spin_lock_irqsave(&priv->lock, flags);
  2090. priv->vif = conf->vif;
  2091. priv->iw_mode = conf->type;
  2092. spin_unlock_irqrestore(&priv->lock, flags);
  2093. mutex_lock(&priv->mutex);
  2094. if (conf->mac_addr) {
  2095. IWL_DEBUG_MAC80211(priv, "Set %pM\n", conf->mac_addr);
  2096. memcpy(priv->mac_addr, conf->mac_addr, ETH_ALEN);
  2097. }
  2098. if (iwl_set_mode(priv, conf->type) == -EAGAIN)
  2099. /* we are not ready, will run again when ready */
  2100. set_bit(STATUS_MODE_PENDING, &priv->status);
  2101. mutex_unlock(&priv->mutex);
  2102. IWL_DEBUG_MAC80211(priv, "leave\n");
  2103. return 0;
  2104. }
  2105. EXPORT_SYMBOL(iwl_mac_add_interface);
  2106. void iwl_mac_remove_interface(struct ieee80211_hw *hw,
  2107. struct ieee80211_if_init_conf *conf)
  2108. {
  2109. struct iwl_priv *priv = hw->priv;
  2110. IWL_DEBUG_MAC80211(priv, "enter\n");
  2111. mutex_lock(&priv->mutex);
  2112. if (iwl_is_ready_rf(priv)) {
  2113. iwl_scan_cancel_timeout(priv, 100);
  2114. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  2115. iwlcore_commit_rxon(priv);
  2116. }
  2117. if (priv->vif == conf->vif) {
  2118. priv->vif = NULL;
  2119. memset(priv->bssid, 0, ETH_ALEN);
  2120. }
  2121. mutex_unlock(&priv->mutex);
  2122. IWL_DEBUG_MAC80211(priv, "leave\n");
  2123. }
  2124. EXPORT_SYMBOL(iwl_mac_remove_interface);
  2125. /**
  2126. * iwl_mac_config - mac80211 config callback
  2127. *
  2128. * We ignore conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME since it seems to
  2129. * be set inappropriately and the driver currently sets the hardware up to
  2130. * use it whenever needed.
  2131. */
  2132. int iwl_mac_config(struct ieee80211_hw *hw, u32 changed)
  2133. {
  2134. struct iwl_priv *priv = hw->priv;
  2135. const struct iwl_channel_info *ch_info;
  2136. struct ieee80211_conf *conf = &hw->conf;
  2137. struct iwl_ht_config *ht_conf = &priv->current_ht_config;
  2138. unsigned long flags = 0;
  2139. int ret = 0;
  2140. u16 ch;
  2141. int scan_active = 0;
  2142. mutex_lock(&priv->mutex);
  2143. IWL_DEBUG_MAC80211(priv, "enter to channel %d changed 0x%X\n",
  2144. conf->channel->hw_value, changed);
  2145. if (unlikely(!priv->cfg->mod_params->disable_hw_scan &&
  2146. test_bit(STATUS_SCANNING, &priv->status))) {
  2147. scan_active = 1;
  2148. IWL_DEBUG_MAC80211(priv, "leave - scanning\n");
  2149. }
  2150. /* during scanning mac80211 will delay channel setting until
  2151. * scan finish with changed = 0
  2152. */
  2153. if (!changed || (changed & IEEE80211_CONF_CHANGE_CHANNEL)) {
  2154. if (scan_active)
  2155. goto set_ch_out;
  2156. ch = ieee80211_frequency_to_channel(conf->channel->center_freq);
  2157. ch_info = iwl_get_channel_info(priv, conf->channel->band, ch);
  2158. if (!is_channel_valid(ch_info)) {
  2159. IWL_DEBUG_MAC80211(priv, "leave - invalid channel\n");
  2160. ret = -EINVAL;
  2161. goto set_ch_out;
  2162. }
  2163. if (priv->iw_mode == NL80211_IFTYPE_ADHOC &&
  2164. !is_channel_ibss(ch_info)) {
  2165. IWL_ERR(priv, "channel %d in band %d not "
  2166. "IBSS channel\n",
  2167. conf->channel->hw_value, conf->channel->band);
  2168. ret = -EINVAL;
  2169. goto set_ch_out;
  2170. }
  2171. spin_lock_irqsave(&priv->lock, flags);
  2172. /* Configure HT40 channels */
  2173. ht_conf->is_ht = conf_is_ht(conf);
  2174. if (ht_conf->is_ht) {
  2175. if (conf_is_ht40_minus(conf)) {
  2176. ht_conf->extension_chan_offset =
  2177. IEEE80211_HT_PARAM_CHA_SEC_BELOW;
  2178. ht_conf->is_40mhz = true;
  2179. } else if (conf_is_ht40_plus(conf)) {
  2180. ht_conf->extension_chan_offset =
  2181. IEEE80211_HT_PARAM_CHA_SEC_ABOVE;
  2182. ht_conf->is_40mhz = true;
  2183. } else {
  2184. ht_conf->extension_chan_offset =
  2185. IEEE80211_HT_PARAM_CHA_SEC_NONE;
  2186. ht_conf->is_40mhz = false;
  2187. }
  2188. } else
  2189. ht_conf->is_40mhz = false;
  2190. /* Default to no protection. Protection mode will later be set
  2191. * from BSS config in iwl_ht_conf */
  2192. ht_conf->ht_protection = IEEE80211_HT_OP_MODE_PROTECTION_NONE;
  2193. /* if we are switching from ht to 2.4 clear flags
  2194. * from any ht related info since 2.4 does not
  2195. * support ht */
  2196. if ((le16_to_cpu(priv->staging_rxon.channel) != ch))
  2197. priv->staging_rxon.flags = 0;
  2198. iwl_set_rxon_channel(priv, conf->channel);
  2199. iwl_set_flags_for_band(priv, conf->channel->band);
  2200. spin_unlock_irqrestore(&priv->lock, flags);
  2201. set_ch_out:
  2202. /* The list of supported rates and rate mask can be different
  2203. * for each band; since the band may have changed, reset
  2204. * the rate mask to what mac80211 lists */
  2205. iwl_set_rate(priv);
  2206. }
  2207. if (changed & IEEE80211_CONF_CHANGE_PS) {
  2208. ret = iwl_power_update_mode(priv, false);
  2209. if (ret)
  2210. IWL_DEBUG_MAC80211(priv, "Error setting sleep level\n");
  2211. }
  2212. if (changed & IEEE80211_CONF_CHANGE_POWER) {
  2213. IWL_DEBUG_MAC80211(priv, "TX Power old=%d new=%d\n",
  2214. priv->tx_power_user_lmt, conf->power_level);
  2215. iwl_set_tx_power(priv, conf->power_level, false);
  2216. }
  2217. /* call to ensure that 4965 rx_chain is set properly in monitor mode */
  2218. if (priv->cfg->ops->hcmd->set_rxon_chain)
  2219. priv->cfg->ops->hcmd->set_rxon_chain(priv);
  2220. if (!iwl_is_ready(priv)) {
  2221. IWL_DEBUG_MAC80211(priv, "leave - not ready\n");
  2222. goto out;
  2223. }
  2224. if (scan_active)
  2225. goto out;
  2226. if (memcmp(&priv->active_rxon,
  2227. &priv->staging_rxon, sizeof(priv->staging_rxon)))
  2228. iwlcore_commit_rxon(priv);
  2229. else
  2230. IWL_DEBUG_INFO(priv, "Not re-sending same RXON configuration.\n");
  2231. out:
  2232. IWL_DEBUG_MAC80211(priv, "leave\n");
  2233. mutex_unlock(&priv->mutex);
  2234. return ret;
  2235. }
  2236. EXPORT_SYMBOL(iwl_mac_config);
  2237. int iwl_mac_get_tx_stats(struct ieee80211_hw *hw,
  2238. struct ieee80211_tx_queue_stats *stats)
  2239. {
  2240. struct iwl_priv *priv = hw->priv;
  2241. int i, avail;
  2242. struct iwl_tx_queue *txq;
  2243. struct iwl_queue *q;
  2244. unsigned long flags;
  2245. IWL_DEBUG_MAC80211(priv, "enter\n");
  2246. if (!iwl_is_ready_rf(priv)) {
  2247. IWL_DEBUG_MAC80211(priv, "leave - RF not ready\n");
  2248. return -EIO;
  2249. }
  2250. spin_lock_irqsave(&priv->lock, flags);
  2251. for (i = 0; i < AC_NUM; i++) {
  2252. txq = &priv->txq[i];
  2253. q = &txq->q;
  2254. avail = iwl_queue_space(q);
  2255. stats[i].len = q->n_window - avail;
  2256. stats[i].limit = q->n_window - q->high_mark;
  2257. stats[i].count = q->n_window;
  2258. }
  2259. spin_unlock_irqrestore(&priv->lock, flags);
  2260. IWL_DEBUG_MAC80211(priv, "leave\n");
  2261. return 0;
  2262. }
  2263. EXPORT_SYMBOL(iwl_mac_get_tx_stats);
  2264. void iwl_mac_reset_tsf(struct ieee80211_hw *hw)
  2265. {
  2266. struct iwl_priv *priv = hw->priv;
  2267. unsigned long flags;
  2268. mutex_lock(&priv->mutex);
  2269. IWL_DEBUG_MAC80211(priv, "enter\n");
  2270. spin_lock_irqsave(&priv->lock, flags);
  2271. memset(&priv->current_ht_config, 0, sizeof(struct iwl_ht_config));
  2272. spin_unlock_irqrestore(&priv->lock, flags);
  2273. iwl_reset_qos(priv);
  2274. spin_lock_irqsave(&priv->lock, flags);
  2275. priv->assoc_id = 0;
  2276. priv->assoc_capability = 0;
  2277. priv->assoc_station_added = 0;
  2278. /* new association get rid of ibss beacon skb */
  2279. if (priv->ibss_beacon)
  2280. dev_kfree_skb(priv->ibss_beacon);
  2281. priv->ibss_beacon = NULL;
  2282. priv->beacon_int = priv->vif->bss_conf.beacon_int;
  2283. priv->timestamp = 0;
  2284. if ((priv->iw_mode == NL80211_IFTYPE_STATION))
  2285. priv->beacon_int = 0;
  2286. spin_unlock_irqrestore(&priv->lock, flags);
  2287. if (!iwl_is_ready_rf(priv)) {
  2288. IWL_DEBUG_MAC80211(priv, "leave - not ready\n");
  2289. mutex_unlock(&priv->mutex);
  2290. return;
  2291. }
  2292. /* we are restarting association process
  2293. * clear RXON_FILTER_ASSOC_MSK bit
  2294. */
  2295. if (priv->iw_mode != NL80211_IFTYPE_AP) {
  2296. iwl_scan_cancel_timeout(priv, 100);
  2297. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  2298. iwlcore_commit_rxon(priv);
  2299. }
  2300. if (priv->iw_mode != NL80211_IFTYPE_ADHOC) {
  2301. IWL_DEBUG_MAC80211(priv, "leave - not in IBSS\n");
  2302. mutex_unlock(&priv->mutex);
  2303. return;
  2304. }
  2305. iwl_set_rate(priv);
  2306. mutex_unlock(&priv->mutex);
  2307. IWL_DEBUG_MAC80211(priv, "leave\n");
  2308. }
  2309. EXPORT_SYMBOL(iwl_mac_reset_tsf);
  2310. #ifdef CONFIG_IWLWIFI_DEBUGFS
  2311. #define IWL_TRAFFIC_DUMP_SIZE (IWL_TRAFFIC_ENTRY_SIZE * IWL_TRAFFIC_ENTRIES)
  2312. void iwl_reset_traffic_log(struct iwl_priv *priv)
  2313. {
  2314. priv->tx_traffic_idx = 0;
  2315. priv->rx_traffic_idx = 0;
  2316. if (priv->tx_traffic)
  2317. memset(priv->tx_traffic, 0, IWL_TRAFFIC_DUMP_SIZE);
  2318. if (priv->rx_traffic)
  2319. memset(priv->rx_traffic, 0, IWL_TRAFFIC_DUMP_SIZE);
  2320. }
  2321. int iwl_alloc_traffic_mem(struct iwl_priv *priv)
  2322. {
  2323. u32 traffic_size = IWL_TRAFFIC_DUMP_SIZE;
  2324. if (iwl_debug_level & IWL_DL_TX) {
  2325. if (!priv->tx_traffic) {
  2326. priv->tx_traffic =
  2327. kzalloc(traffic_size, GFP_KERNEL);
  2328. if (!priv->tx_traffic)
  2329. return -ENOMEM;
  2330. }
  2331. }
  2332. if (iwl_debug_level & IWL_DL_RX) {
  2333. if (!priv->rx_traffic) {
  2334. priv->rx_traffic =
  2335. kzalloc(traffic_size, GFP_KERNEL);
  2336. if (!priv->rx_traffic)
  2337. return -ENOMEM;
  2338. }
  2339. }
  2340. iwl_reset_traffic_log(priv);
  2341. return 0;
  2342. }
  2343. EXPORT_SYMBOL(iwl_alloc_traffic_mem);
  2344. void iwl_free_traffic_mem(struct iwl_priv *priv)
  2345. {
  2346. kfree(priv->tx_traffic);
  2347. priv->tx_traffic = NULL;
  2348. kfree(priv->rx_traffic);
  2349. priv->rx_traffic = NULL;
  2350. }
  2351. EXPORT_SYMBOL(iwl_free_traffic_mem);
  2352. void iwl_dbg_log_tx_data_frame(struct iwl_priv *priv,
  2353. u16 length, struct ieee80211_hdr *header)
  2354. {
  2355. __le16 fc;
  2356. u16 len;
  2357. if (likely(!(iwl_debug_level & IWL_DL_TX)))
  2358. return;
  2359. if (!priv->tx_traffic)
  2360. return;
  2361. fc = header->frame_control;
  2362. if (ieee80211_is_data(fc)) {
  2363. len = (length > IWL_TRAFFIC_ENTRY_SIZE)
  2364. ? IWL_TRAFFIC_ENTRY_SIZE : length;
  2365. memcpy((priv->tx_traffic +
  2366. (priv->tx_traffic_idx * IWL_TRAFFIC_ENTRY_SIZE)),
  2367. header, len);
  2368. priv->tx_traffic_idx =
  2369. (priv->tx_traffic_idx + 1) % IWL_TRAFFIC_ENTRIES;
  2370. }
  2371. }
  2372. EXPORT_SYMBOL(iwl_dbg_log_tx_data_frame);
  2373. void iwl_dbg_log_rx_data_frame(struct iwl_priv *priv,
  2374. u16 length, struct ieee80211_hdr *header)
  2375. {
  2376. __le16 fc;
  2377. u16 len;
  2378. if (likely(!(iwl_debug_level & IWL_DL_RX)))
  2379. return;
  2380. if (!priv->rx_traffic)
  2381. return;
  2382. fc = header->frame_control;
  2383. if (ieee80211_is_data(fc)) {
  2384. len = (length > IWL_TRAFFIC_ENTRY_SIZE)
  2385. ? IWL_TRAFFIC_ENTRY_SIZE : length;
  2386. memcpy((priv->rx_traffic +
  2387. (priv->rx_traffic_idx * IWL_TRAFFIC_ENTRY_SIZE)),
  2388. header, len);
  2389. priv->rx_traffic_idx =
  2390. (priv->rx_traffic_idx + 1) % IWL_TRAFFIC_ENTRIES;
  2391. }
  2392. }
  2393. EXPORT_SYMBOL(iwl_dbg_log_rx_data_frame);
  2394. const char *get_mgmt_string(int cmd)
  2395. {
  2396. switch (cmd) {
  2397. IWL_CMD(MANAGEMENT_ASSOC_REQ);
  2398. IWL_CMD(MANAGEMENT_ASSOC_RESP);
  2399. IWL_CMD(MANAGEMENT_REASSOC_REQ);
  2400. IWL_CMD(MANAGEMENT_REASSOC_RESP);
  2401. IWL_CMD(MANAGEMENT_PROBE_REQ);
  2402. IWL_CMD(MANAGEMENT_PROBE_RESP);
  2403. IWL_CMD(MANAGEMENT_BEACON);
  2404. IWL_CMD(MANAGEMENT_ATIM);
  2405. IWL_CMD(MANAGEMENT_DISASSOC);
  2406. IWL_CMD(MANAGEMENT_AUTH);
  2407. IWL_CMD(MANAGEMENT_DEAUTH);
  2408. IWL_CMD(MANAGEMENT_ACTION);
  2409. default:
  2410. return "UNKNOWN";
  2411. }
  2412. }
  2413. const char *get_ctrl_string(int cmd)
  2414. {
  2415. switch (cmd) {
  2416. IWL_CMD(CONTROL_BACK_REQ);
  2417. IWL_CMD(CONTROL_BACK);
  2418. IWL_CMD(CONTROL_PSPOLL);
  2419. IWL_CMD(CONTROL_RTS);
  2420. IWL_CMD(CONTROL_CTS);
  2421. IWL_CMD(CONTROL_ACK);
  2422. IWL_CMD(CONTROL_CFEND);
  2423. IWL_CMD(CONTROL_CFENDACK);
  2424. default:
  2425. return "UNKNOWN";
  2426. }
  2427. }
  2428. void iwl_clear_tx_stats(struct iwl_priv *priv)
  2429. {
  2430. memset(&priv->tx_stats, 0, sizeof(struct traffic_stats));
  2431. }
  2432. void iwl_clear_rx_stats(struct iwl_priv *priv)
  2433. {
  2434. memset(&priv->rx_stats, 0, sizeof(struct traffic_stats));
  2435. }
  2436. /*
  2437. * if CONFIG_IWLWIFI_DEBUGFS defined, iwl_update_stats function will
  2438. * record all the MGMT, CTRL and DATA pkt for both TX and Rx pass.
  2439. * Use debugFs to display the rx/rx_statistics
  2440. * if CONFIG_IWLWIFI_DEBUGFS not being defined, then no MGMT and CTRL
  2441. * information will be recorded, but DATA pkt still will be recorded
  2442. * for the reason of iwl_led.c need to control the led blinking based on
  2443. * number of tx and rx data.
  2444. *
  2445. */
  2446. void iwl_update_stats(struct iwl_priv *priv, bool is_tx, __le16 fc, u16 len)
  2447. {
  2448. struct traffic_stats *stats;
  2449. if (is_tx)
  2450. stats = &priv->tx_stats;
  2451. else
  2452. stats = &priv->rx_stats;
  2453. if (ieee80211_is_mgmt(fc)) {
  2454. switch (fc & cpu_to_le16(IEEE80211_FCTL_STYPE)) {
  2455. case cpu_to_le16(IEEE80211_STYPE_ASSOC_REQ):
  2456. stats->mgmt[MANAGEMENT_ASSOC_REQ]++;
  2457. break;
  2458. case cpu_to_le16(IEEE80211_STYPE_ASSOC_RESP):
  2459. stats->mgmt[MANAGEMENT_ASSOC_RESP]++;
  2460. break;
  2461. case cpu_to_le16(IEEE80211_STYPE_REASSOC_REQ):
  2462. stats->mgmt[MANAGEMENT_REASSOC_REQ]++;
  2463. break;
  2464. case cpu_to_le16(IEEE80211_STYPE_REASSOC_RESP):
  2465. stats->mgmt[MANAGEMENT_REASSOC_RESP]++;
  2466. break;
  2467. case cpu_to_le16(IEEE80211_STYPE_PROBE_REQ):
  2468. stats->mgmt[MANAGEMENT_PROBE_REQ]++;
  2469. break;
  2470. case cpu_to_le16(IEEE80211_STYPE_PROBE_RESP):
  2471. stats->mgmt[MANAGEMENT_PROBE_RESP]++;
  2472. break;
  2473. case cpu_to_le16(IEEE80211_STYPE_BEACON):
  2474. stats->mgmt[MANAGEMENT_BEACON]++;
  2475. break;
  2476. case cpu_to_le16(IEEE80211_STYPE_ATIM):
  2477. stats->mgmt[MANAGEMENT_ATIM]++;
  2478. break;
  2479. case cpu_to_le16(IEEE80211_STYPE_DISASSOC):
  2480. stats->mgmt[MANAGEMENT_DISASSOC]++;
  2481. break;
  2482. case cpu_to_le16(IEEE80211_STYPE_AUTH):
  2483. stats->mgmt[MANAGEMENT_AUTH]++;
  2484. break;
  2485. case cpu_to_le16(IEEE80211_STYPE_DEAUTH):
  2486. stats->mgmt[MANAGEMENT_DEAUTH]++;
  2487. break;
  2488. case cpu_to_le16(IEEE80211_STYPE_ACTION):
  2489. stats->mgmt[MANAGEMENT_ACTION]++;
  2490. break;
  2491. }
  2492. } else if (ieee80211_is_ctl(fc)) {
  2493. switch (fc & cpu_to_le16(IEEE80211_FCTL_STYPE)) {
  2494. case cpu_to_le16(IEEE80211_STYPE_BACK_REQ):
  2495. stats->ctrl[CONTROL_BACK_REQ]++;
  2496. break;
  2497. case cpu_to_le16(IEEE80211_STYPE_BACK):
  2498. stats->ctrl[CONTROL_BACK]++;
  2499. break;
  2500. case cpu_to_le16(IEEE80211_STYPE_PSPOLL):
  2501. stats->ctrl[CONTROL_PSPOLL]++;
  2502. break;
  2503. case cpu_to_le16(IEEE80211_STYPE_RTS):
  2504. stats->ctrl[CONTROL_RTS]++;
  2505. break;
  2506. case cpu_to_le16(IEEE80211_STYPE_CTS):
  2507. stats->ctrl[CONTROL_CTS]++;
  2508. break;
  2509. case cpu_to_le16(IEEE80211_STYPE_ACK):
  2510. stats->ctrl[CONTROL_ACK]++;
  2511. break;
  2512. case cpu_to_le16(IEEE80211_STYPE_CFEND):
  2513. stats->ctrl[CONTROL_CFEND]++;
  2514. break;
  2515. case cpu_to_le16(IEEE80211_STYPE_CFENDACK):
  2516. stats->ctrl[CONTROL_CFENDACK]++;
  2517. break;
  2518. }
  2519. } else {
  2520. /* data */
  2521. stats->data_cnt++;
  2522. stats->data_bytes += len;
  2523. }
  2524. }
  2525. EXPORT_SYMBOL(iwl_update_stats);
  2526. #endif
  2527. #ifdef CONFIG_PM
  2528. int iwl_pci_suspend(struct pci_dev *pdev, pm_message_t state)
  2529. {
  2530. struct iwl_priv *priv = pci_get_drvdata(pdev);
  2531. /*
  2532. * This function is called when system goes into suspend state
  2533. * mac80211 will call iwl_mac_stop() from the mac80211 suspend function
  2534. * first but since iwl_mac_stop() has no knowledge of who the caller is,
  2535. * it will not call apm_ops.stop() to stop the DMA operation.
  2536. * Calling apm_ops.stop here to make sure we stop the DMA.
  2537. */
  2538. priv->cfg->ops->lib->apm_ops.stop(priv);
  2539. pci_save_state(pdev);
  2540. pci_disable_device(pdev);
  2541. pci_set_power_state(pdev, PCI_D3hot);
  2542. return 0;
  2543. }
  2544. EXPORT_SYMBOL(iwl_pci_suspend);
  2545. int iwl_pci_resume(struct pci_dev *pdev)
  2546. {
  2547. struct iwl_priv *priv = pci_get_drvdata(pdev);
  2548. int ret;
  2549. pci_set_power_state(pdev, PCI_D0);
  2550. ret = pci_enable_device(pdev);
  2551. if (ret)
  2552. return ret;
  2553. pci_restore_state(pdev);
  2554. iwl_enable_interrupts(priv);
  2555. return 0;
  2556. }
  2557. EXPORT_SYMBOL(iwl_pci_resume);
  2558. #endif /* CONFIG_PM */