radeon_mode.h 15 KB

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  1. /*
  2. * Copyright 2000 ATI Technologies Inc., Markham, Ontario, and
  3. * VA Linux Systems Inc., Fremont, California.
  4. * Copyright 2008 Red Hat Inc.
  5. *
  6. * Permission is hereby granted, free of charge, to any person obtaining a
  7. * copy of this software and associated documentation files (the "Software"),
  8. * to deal in the Software without restriction, including without limitation
  9. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  10. * and/or sell copies of the Software, and to permit persons to whom the
  11. * Software is furnished to do so, subject to the following conditions:
  12. *
  13. * The above copyright notice and this permission notice shall be included in
  14. * all copies or substantial portions of the Software.
  15. *
  16. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19. * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  20. * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  21. * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  22. * OTHER DEALINGS IN THE SOFTWARE.
  23. *
  24. * Original Authors:
  25. * Kevin E. Martin, Rickard E. Faith, Alan Hourihane
  26. *
  27. * Kernel port Author: Dave Airlie
  28. */
  29. #ifndef RADEON_MODE_H
  30. #define RADEON_MODE_H
  31. #include <drm_crtc.h>
  32. #include <drm_mode.h>
  33. #include <drm_edid.h>
  34. #include <linux/i2c.h>
  35. #include <linux/i2c-id.h>
  36. #include <linux/i2c-algo-bit.h>
  37. #include "radeon_fixed.h"
  38. struct radeon_device;
  39. #define to_radeon_crtc(x) container_of(x, struct radeon_crtc, base)
  40. #define to_radeon_connector(x) container_of(x, struct radeon_connector, base)
  41. #define to_radeon_encoder(x) container_of(x, struct radeon_encoder, base)
  42. #define to_radeon_framebuffer(x) container_of(x, struct radeon_framebuffer, base)
  43. enum radeon_connector_type {
  44. CONNECTOR_NONE,
  45. CONNECTOR_VGA,
  46. CONNECTOR_DVI_I,
  47. CONNECTOR_DVI_D,
  48. CONNECTOR_DVI_A,
  49. CONNECTOR_STV,
  50. CONNECTOR_CTV,
  51. CONNECTOR_LVDS,
  52. CONNECTOR_DIGITAL,
  53. CONNECTOR_SCART,
  54. CONNECTOR_HDMI_TYPE_A,
  55. CONNECTOR_HDMI_TYPE_B,
  56. CONNECTOR_0XC,
  57. CONNECTOR_0XD,
  58. CONNECTOR_DIN,
  59. CONNECTOR_DISPLAY_PORT,
  60. CONNECTOR_UNSUPPORTED
  61. };
  62. enum radeon_dvi_type {
  63. DVI_AUTO,
  64. DVI_DIGITAL,
  65. DVI_ANALOG
  66. };
  67. enum radeon_rmx_type {
  68. RMX_OFF,
  69. RMX_FULL,
  70. RMX_CENTER,
  71. RMX_ASPECT
  72. };
  73. enum radeon_tv_std {
  74. TV_STD_NTSC,
  75. TV_STD_PAL,
  76. TV_STD_PAL_M,
  77. TV_STD_PAL_60,
  78. TV_STD_NTSC_J,
  79. TV_STD_SCART_PAL,
  80. TV_STD_SECAM,
  81. TV_STD_PAL_CN,
  82. };
  83. /* radeon gpio-based i2c
  84. * 1. "mask" reg and bits
  85. * grabs the gpio pins for software use
  86. * 0=not held 1=held
  87. * 2. "a" reg and bits
  88. * output pin value
  89. * 0=low 1=high
  90. * 3. "en" reg and bits
  91. * sets the pin direction
  92. * 0=input 1=output
  93. * 4. "y" reg and bits
  94. * input pin value
  95. * 0=low 1=high
  96. */
  97. struct radeon_i2c_bus_rec {
  98. bool valid;
  99. uint32_t mask_clk_reg;
  100. uint32_t mask_data_reg;
  101. uint32_t a_clk_reg;
  102. uint32_t a_data_reg;
  103. uint32_t en_clk_reg;
  104. uint32_t en_data_reg;
  105. uint32_t y_clk_reg;
  106. uint32_t y_data_reg;
  107. uint32_t mask_clk_mask;
  108. uint32_t mask_data_mask;
  109. uint32_t a_clk_mask;
  110. uint32_t a_data_mask;
  111. uint32_t en_clk_mask;
  112. uint32_t en_data_mask;
  113. uint32_t y_clk_mask;
  114. uint32_t y_data_mask;
  115. };
  116. struct radeon_tmds_pll {
  117. uint32_t freq;
  118. uint32_t value;
  119. };
  120. #define RADEON_MAX_BIOS_CONNECTOR 16
  121. #define RADEON_PLL_USE_BIOS_DIVS (1 << 0)
  122. #define RADEON_PLL_NO_ODD_POST_DIV (1 << 1)
  123. #define RADEON_PLL_USE_REF_DIV (1 << 2)
  124. #define RADEON_PLL_LEGACY (1 << 3)
  125. #define RADEON_PLL_PREFER_LOW_REF_DIV (1 << 4)
  126. #define RADEON_PLL_PREFER_HIGH_REF_DIV (1 << 5)
  127. #define RADEON_PLL_PREFER_LOW_FB_DIV (1 << 6)
  128. #define RADEON_PLL_PREFER_HIGH_FB_DIV (1 << 7)
  129. #define RADEON_PLL_PREFER_LOW_POST_DIV (1 << 8)
  130. #define RADEON_PLL_PREFER_HIGH_POST_DIV (1 << 9)
  131. #define RADEON_PLL_USE_FRAC_FB_DIV (1 << 10)
  132. #define RADEON_PLL_PREFER_CLOSEST_LOWER (1 << 11)
  133. struct radeon_pll {
  134. uint16_t reference_freq;
  135. uint16_t reference_div;
  136. uint32_t pll_in_min;
  137. uint32_t pll_in_max;
  138. uint32_t pll_out_min;
  139. uint32_t pll_out_max;
  140. uint16_t xclk;
  141. uint32_t min_ref_div;
  142. uint32_t max_ref_div;
  143. uint32_t min_post_div;
  144. uint32_t max_post_div;
  145. uint32_t min_feedback_div;
  146. uint32_t max_feedback_div;
  147. uint32_t min_frac_feedback_div;
  148. uint32_t max_frac_feedback_div;
  149. uint32_t best_vco;
  150. };
  151. struct radeon_i2c_chan {
  152. struct drm_device *dev;
  153. struct i2c_adapter adapter;
  154. struct i2c_algo_bit_data algo;
  155. struct radeon_i2c_bus_rec rec;
  156. };
  157. /* mostly for macs, but really any system without connector tables */
  158. enum radeon_connector_table {
  159. CT_NONE,
  160. CT_GENERIC,
  161. CT_IBOOK,
  162. CT_POWERBOOK_EXTERNAL,
  163. CT_POWERBOOK_INTERNAL,
  164. CT_POWERBOOK_VGA,
  165. CT_MINI_EXTERNAL,
  166. CT_MINI_INTERNAL,
  167. CT_IMAC_G5_ISIGHT,
  168. CT_EMAC,
  169. };
  170. struct radeon_mode_info {
  171. struct atom_context *atom_context;
  172. struct card_info *atom_card_info;
  173. enum radeon_connector_table connector_table;
  174. bool mode_config_initialized;
  175. struct radeon_crtc *crtcs[2];
  176. /* DVI-I properties */
  177. struct drm_property *coherent_mode_property;
  178. /* DAC enable load detect */
  179. struct drm_property *load_detect_property;
  180. /* TV standard load detect */
  181. struct drm_property *tv_std_property;
  182. /* legacy TMDS PLL detect */
  183. struct drm_property *tmds_pll_property;
  184. };
  185. #define MAX_H_CODE_TIMING_LEN 32
  186. #define MAX_V_CODE_TIMING_LEN 32
  187. /* need to store these as reading
  188. back code tables is excessive */
  189. struct radeon_tv_regs {
  190. uint32_t tv_uv_adr;
  191. uint32_t timing_cntl;
  192. uint32_t hrestart;
  193. uint32_t vrestart;
  194. uint32_t frestart;
  195. uint16_t h_code_timing[MAX_H_CODE_TIMING_LEN];
  196. uint16_t v_code_timing[MAX_V_CODE_TIMING_LEN];
  197. };
  198. struct radeon_crtc {
  199. struct drm_crtc base;
  200. int crtc_id;
  201. u16 lut_r[256], lut_g[256], lut_b[256];
  202. bool enabled;
  203. bool can_tile;
  204. uint32_t crtc_offset;
  205. struct drm_gem_object *cursor_bo;
  206. uint64_t cursor_addr;
  207. int cursor_width;
  208. int cursor_height;
  209. uint32_t legacy_display_base_addr;
  210. uint32_t legacy_cursor_offset;
  211. enum radeon_rmx_type rmx_type;
  212. fixed20_12 vsc;
  213. fixed20_12 hsc;
  214. struct drm_display_mode native_mode;
  215. };
  216. struct radeon_encoder_primary_dac {
  217. /* legacy primary dac */
  218. uint32_t ps2_pdac_adj;
  219. };
  220. struct radeon_encoder_lvds {
  221. /* legacy lvds */
  222. uint16_t panel_vcc_delay;
  223. uint8_t panel_pwr_delay;
  224. uint8_t panel_digon_delay;
  225. uint8_t panel_blon_delay;
  226. uint16_t panel_ref_divider;
  227. uint8_t panel_post_divider;
  228. uint16_t panel_fb_divider;
  229. bool use_bios_dividers;
  230. uint32_t lvds_gen_cntl;
  231. /* panel mode */
  232. struct drm_display_mode native_mode;
  233. };
  234. struct radeon_encoder_tv_dac {
  235. /* legacy tv dac */
  236. uint32_t ps2_tvdac_adj;
  237. uint32_t ntsc_tvdac_adj;
  238. uint32_t pal_tvdac_adj;
  239. int h_pos;
  240. int v_pos;
  241. int h_size;
  242. int supported_tv_stds;
  243. bool tv_on;
  244. enum radeon_tv_std tv_std;
  245. struct radeon_tv_regs tv;
  246. };
  247. struct radeon_encoder_int_tmds {
  248. /* legacy int tmds */
  249. struct radeon_tmds_pll tmds_pll[4];
  250. };
  251. /* spread spectrum */
  252. struct radeon_atom_ss {
  253. uint16_t percentage;
  254. uint8_t type;
  255. uint8_t step;
  256. uint8_t delay;
  257. uint8_t range;
  258. uint8_t refdiv;
  259. };
  260. struct radeon_encoder_atom_dig {
  261. /* atom dig */
  262. bool coherent_mode;
  263. int dig_block;
  264. /* atom lvds */
  265. uint32_t lvds_misc;
  266. uint16_t panel_pwr_delay;
  267. struct radeon_atom_ss *ss;
  268. /* panel mode */
  269. struct drm_display_mode native_mode;
  270. };
  271. struct radeon_encoder_atom_dac {
  272. enum radeon_tv_std tv_std;
  273. };
  274. struct radeon_encoder {
  275. struct drm_encoder base;
  276. uint32_t encoder_id;
  277. uint32_t devices;
  278. uint32_t active_device;
  279. uint32_t flags;
  280. uint32_t pixel_clock;
  281. enum radeon_rmx_type rmx_type;
  282. struct drm_display_mode native_mode;
  283. void *enc_priv;
  284. };
  285. struct radeon_connector_atom_dig {
  286. uint32_t igp_lane_info;
  287. bool linkb;
  288. };
  289. struct radeon_connector {
  290. struct drm_connector base;
  291. uint32_t connector_id;
  292. uint32_t devices;
  293. struct radeon_i2c_chan *ddc_bus;
  294. /* some systems have a an hdmi and vga port with a shared ddc line */
  295. bool shared_ddc;
  296. bool use_digital;
  297. /* we need to mind the EDID between detect
  298. and get modes due to analog/digital/tvencoder */
  299. struct edid *edid;
  300. void *con_priv;
  301. bool dac_load_detect;
  302. uint16_t connector_object_id;
  303. };
  304. struct radeon_framebuffer {
  305. struct drm_framebuffer base;
  306. struct drm_gem_object *obj;
  307. };
  308. extern struct radeon_i2c_chan *radeon_i2c_create(struct drm_device *dev,
  309. struct radeon_i2c_bus_rec *rec,
  310. const char *name);
  311. extern void radeon_i2c_destroy(struct radeon_i2c_chan *i2c);
  312. extern bool radeon_ddc_probe(struct radeon_connector *radeon_connector);
  313. extern int radeon_ddc_get_modes(struct radeon_connector *radeon_connector);
  314. extern struct drm_encoder *radeon_best_encoder(struct drm_connector *connector);
  315. extern void radeon_compute_pll(struct radeon_pll *pll,
  316. uint64_t freq,
  317. uint32_t *dot_clock_p,
  318. uint32_t *fb_div_p,
  319. uint32_t *frac_fb_div_p,
  320. uint32_t *ref_div_p,
  321. uint32_t *post_div_p,
  322. int flags);
  323. struct drm_encoder *radeon_encoder_legacy_lvds_add(struct drm_device *dev, int bios_index);
  324. struct drm_encoder *radeon_encoder_legacy_primary_dac_add(struct drm_device *dev, int bios_index, int with_tv);
  325. struct drm_encoder *radeon_encoder_legacy_tv_dac_add(struct drm_device *dev, int bios_index, int with_tv);
  326. struct drm_encoder *radeon_encoder_legacy_tmds_int_add(struct drm_device *dev, int bios_index);
  327. struct drm_encoder *radeon_encoder_legacy_tmds_ext_add(struct drm_device *dev, int bios_index);
  328. extern void atombios_external_tmds_setup(struct drm_encoder *encoder, int action);
  329. extern int atombios_get_encoder_mode(struct drm_encoder *encoder);
  330. extern void radeon_encoder_set_active_device(struct drm_encoder *encoder);
  331. extern void radeon_crtc_load_lut(struct drm_crtc *crtc);
  332. extern int atombios_crtc_set_base(struct drm_crtc *crtc, int x, int y,
  333. struct drm_framebuffer *old_fb);
  334. extern int atombios_crtc_mode_set(struct drm_crtc *crtc,
  335. struct drm_display_mode *mode,
  336. struct drm_display_mode *adjusted_mode,
  337. int x, int y,
  338. struct drm_framebuffer *old_fb);
  339. extern void atombios_crtc_dpms(struct drm_crtc *crtc, int mode);
  340. extern int radeon_crtc_set_base(struct drm_crtc *crtc, int x, int y,
  341. struct drm_framebuffer *old_fb);
  342. extern void radeon_legacy_atom_set_surface(struct drm_crtc *crtc);
  343. extern int radeon_crtc_cursor_set(struct drm_crtc *crtc,
  344. struct drm_file *file_priv,
  345. uint32_t handle,
  346. uint32_t width,
  347. uint32_t height);
  348. extern int radeon_crtc_cursor_move(struct drm_crtc *crtc,
  349. int x, int y);
  350. extern bool radeon_atom_get_clock_info(struct drm_device *dev);
  351. extern bool radeon_combios_get_clock_info(struct drm_device *dev);
  352. extern struct radeon_encoder_atom_dig *
  353. radeon_atombios_get_lvds_info(struct radeon_encoder *encoder);
  354. bool radeon_atombios_get_tmds_info(struct radeon_encoder *encoder,
  355. struct radeon_encoder_int_tmds *tmds);
  356. bool radeon_legacy_get_tmds_info_from_combios(struct radeon_encoder *encoder,
  357. struct radeon_encoder_int_tmds *tmds);
  358. bool radeon_legacy_get_tmds_info_from_table(struct radeon_encoder *encoder,
  359. struct radeon_encoder_int_tmds *tmds);
  360. extern struct radeon_encoder_primary_dac *
  361. radeon_atombios_get_primary_dac_info(struct radeon_encoder *encoder);
  362. extern struct radeon_encoder_tv_dac *
  363. radeon_atombios_get_tv_dac_info(struct radeon_encoder *encoder);
  364. extern struct radeon_encoder_lvds *
  365. radeon_combios_get_lvds_info(struct radeon_encoder *encoder);
  366. extern void radeon_combios_get_ext_tmds_info(struct radeon_encoder *encoder);
  367. extern struct radeon_encoder_tv_dac *
  368. radeon_combios_get_tv_dac_info(struct radeon_encoder *encoder);
  369. extern struct radeon_encoder_primary_dac *
  370. radeon_combios_get_primary_dac_info(struct radeon_encoder *encoder);
  371. extern void radeon_combios_output_lock(struct drm_encoder *encoder, bool lock);
  372. extern void radeon_combios_initialize_bios_scratch_regs(struct drm_device *dev);
  373. extern void radeon_atom_output_lock(struct drm_encoder *encoder, bool lock);
  374. extern void radeon_atom_initialize_bios_scratch_regs(struct drm_device *dev);
  375. extern void radeon_save_bios_scratch_regs(struct radeon_device *rdev);
  376. extern void radeon_restore_bios_scratch_regs(struct radeon_device *rdev);
  377. extern void
  378. radeon_atombios_encoder_crtc_scratch_regs(struct drm_encoder *encoder, int crtc);
  379. extern void
  380. radeon_atombios_encoder_dpms_scratch_regs(struct drm_encoder *encoder, bool on);
  381. extern void
  382. radeon_combios_encoder_crtc_scratch_regs(struct drm_encoder *encoder, int crtc);
  383. extern void
  384. radeon_combios_encoder_dpms_scratch_regs(struct drm_encoder *encoder, bool on);
  385. extern void radeon_crtc_fb_gamma_set(struct drm_crtc *crtc, u16 red, u16 green,
  386. u16 blue, int regno);
  387. extern void radeon_crtc_fb_gamma_get(struct drm_crtc *crtc, u16 *red, u16 *green,
  388. u16 *blue, int regno);
  389. struct drm_framebuffer *radeon_framebuffer_create(struct drm_device *dev,
  390. struct drm_mode_fb_cmd *mode_cmd,
  391. struct drm_gem_object *obj);
  392. int radeonfb_probe(struct drm_device *dev);
  393. int radeonfb_remove(struct drm_device *dev, struct drm_framebuffer *fb);
  394. bool radeon_get_legacy_connector_info_from_bios(struct drm_device *dev);
  395. bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev);
  396. void radeon_atombios_init_crtc(struct drm_device *dev,
  397. struct radeon_crtc *radeon_crtc);
  398. void radeon_legacy_init_crtc(struct drm_device *dev,
  399. struct radeon_crtc *radeon_crtc);
  400. extern void radeon_i2c_do_lock(struct radeon_i2c_chan *i2c, int lock_state);
  401. void radeon_get_clock_info(struct drm_device *dev);
  402. extern bool radeon_get_atom_connector_info_from_object_table(struct drm_device *dev);
  403. extern bool radeon_get_atom_connector_info_from_supported_devices_table(struct drm_device *dev);
  404. void radeon_rmx_mode_fixup(struct drm_encoder *encoder,
  405. struct drm_display_mode *mode,
  406. struct drm_display_mode *adjusted_mode);
  407. void radeon_enc_destroy(struct drm_encoder *encoder);
  408. void radeon_copy_fb(struct drm_device *dev, struct drm_gem_object *dst_obj);
  409. void radeon_combios_asic_init(struct drm_device *dev);
  410. extern int radeon_static_clocks_init(struct drm_device *dev);
  411. bool radeon_crtc_scaling_mode_fixup(struct drm_crtc *crtc,
  412. struct drm_display_mode *mode,
  413. struct drm_display_mode *adjusted_mode);
  414. void atom_rv515_force_tv_scaler(struct radeon_device *rdev, struct radeon_crtc *radeon_crtc);
  415. /* legacy tv */
  416. void radeon_legacy_tv_adjust_crtc_reg(struct drm_encoder *encoder,
  417. uint32_t *h_total_disp, uint32_t *h_sync_strt_wid,
  418. uint32_t *v_total_disp, uint32_t *v_sync_strt_wid);
  419. void radeon_legacy_tv_adjust_pll1(struct drm_encoder *encoder,
  420. uint32_t *htotal_cntl, uint32_t *ppll_ref_div,
  421. uint32_t *ppll_div_3, uint32_t *pixclks_cntl);
  422. void radeon_legacy_tv_adjust_pll2(struct drm_encoder *encoder,
  423. uint32_t *htotal2_cntl, uint32_t *p2pll_ref_div,
  424. uint32_t *p2pll_div_0, uint32_t *pixclks_cntl);
  425. void radeon_legacy_tv_mode_set(struct drm_encoder *encoder,
  426. struct drm_display_mode *mode,
  427. struct drm_display_mode *adjusted_mode);
  428. #endif