setup_64.c 21 KB

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  1. /*
  2. *
  3. * Common boot and setup code.
  4. *
  5. * Copyright (C) 2001 PPC64 Team, IBM Corp
  6. *
  7. * This program is free software; you can redistribute it and/or
  8. * modify it under the terms of the GNU General Public License
  9. * as published by the Free Software Foundation; either version
  10. * 2 of the License, or (at your option) any later version.
  11. */
  12. #undef DEBUG
  13. #include <linux/config.h>
  14. #include <linux/module.h>
  15. #include <linux/string.h>
  16. #include <linux/sched.h>
  17. #include <linux/init.h>
  18. #include <linux/kernel.h>
  19. #include <linux/reboot.h>
  20. #include <linux/delay.h>
  21. #include <linux/initrd.h>
  22. #include <linux/ide.h>
  23. #include <linux/seq_file.h>
  24. #include <linux/ioport.h>
  25. #include <linux/console.h>
  26. #include <linux/utsname.h>
  27. #include <linux/tty.h>
  28. #include <linux/root_dev.h>
  29. #include <linux/notifier.h>
  30. #include <linux/cpu.h>
  31. #include <linux/unistd.h>
  32. #include <linux/serial.h>
  33. #include <linux/serial_8250.h>
  34. #include <asm/io.h>
  35. #include <asm/prom.h>
  36. #include <asm/processor.h>
  37. #include <asm/pgtable.h>
  38. #include <asm/smp.h>
  39. #include <asm/elf.h>
  40. #include <asm/machdep.h>
  41. #include <asm/paca.h>
  42. #include <asm/time.h>
  43. #include <asm/cputable.h>
  44. #include <asm/sections.h>
  45. #include <asm/btext.h>
  46. #include <asm/nvram.h>
  47. #include <asm/setup.h>
  48. #include <asm/system.h>
  49. #include <asm/rtas.h>
  50. #include <asm/iommu.h>
  51. #include <asm/serial.h>
  52. #include <asm/cache.h>
  53. #include <asm/page.h>
  54. #include <asm/mmu.h>
  55. #include <asm/lmb.h>
  56. #include <asm/iseries/it_lp_naca.h>
  57. #include <asm/firmware.h>
  58. #include <asm/xmon.h>
  59. #include <asm/udbg.h>
  60. #include "setup.h"
  61. #ifdef DEBUG
  62. #define DBG(fmt...) udbg_printf(fmt)
  63. #else
  64. #define DBG(fmt...)
  65. #endif
  66. /*
  67. * Here are some early debugging facilities. You can enable one
  68. * but your kernel will not boot on anything else if you do so
  69. */
  70. /* This one is for use on LPAR machines that support an HVC console
  71. * on vterm 0
  72. */
  73. extern void udbg_init_debug_lpar(void);
  74. /* This one is for use on Apple G5 machines
  75. */
  76. extern void udbg_init_pmac_realmode(void);
  77. /* That's RTAS panel debug */
  78. extern void call_rtas_display_status_delay(unsigned char c);
  79. /* Here's maple real mode debug */
  80. extern void udbg_init_maple_realmode(void);
  81. #define EARLY_DEBUG_INIT() do {} while(0)
  82. #if 0
  83. #define EARLY_DEBUG_INIT() udbg_init_debug_lpar()
  84. #define EARLY_DEBUG_INIT() udbg_init_maple_realmode()
  85. #define EARLY_DEBUG_INIT() udbg_init_pmac_realmode()
  86. #define EARLY_DEBUG_INIT() \
  87. do { udbg_putc = call_rtas_display_status_delay; } while(0)
  88. #endif
  89. int have_of = 1;
  90. int boot_cpuid = 0;
  91. int boot_cpuid_phys = 0;
  92. dev_t boot_dev;
  93. u64 ppc64_pft_size;
  94. struct ppc64_caches ppc64_caches;
  95. EXPORT_SYMBOL_GPL(ppc64_caches);
  96. /*
  97. * These are used in binfmt_elf.c to put aux entries on the stack
  98. * for each elf executable being started.
  99. */
  100. int dcache_bsize;
  101. int icache_bsize;
  102. int ucache_bsize;
  103. /* The main machine-dep calls structure
  104. */
  105. struct machdep_calls ppc_md;
  106. EXPORT_SYMBOL(ppc_md);
  107. #ifdef CONFIG_MAGIC_SYSRQ
  108. unsigned long SYSRQ_KEY;
  109. #endif /* CONFIG_MAGIC_SYSRQ */
  110. static int ppc64_panic_event(struct notifier_block *, unsigned long, void *);
  111. static struct notifier_block ppc64_panic_block = {
  112. .notifier_call = ppc64_panic_event,
  113. .priority = INT_MIN /* may not return; must be done last */
  114. };
  115. #ifdef CONFIG_SMP
  116. static int smt_enabled_cmdline;
  117. /* Look for ibm,smt-enabled OF option */
  118. static void check_smt_enabled(void)
  119. {
  120. struct device_node *dn;
  121. char *smt_option;
  122. /* Allow the command line to overrule the OF option */
  123. if (smt_enabled_cmdline)
  124. return;
  125. dn = of_find_node_by_path("/options");
  126. if (dn) {
  127. smt_option = (char *)get_property(dn, "ibm,smt-enabled", NULL);
  128. if (smt_option) {
  129. if (!strcmp(smt_option, "on"))
  130. smt_enabled_at_boot = 1;
  131. else if (!strcmp(smt_option, "off"))
  132. smt_enabled_at_boot = 0;
  133. }
  134. }
  135. }
  136. /* Look for smt-enabled= cmdline option */
  137. static int __init early_smt_enabled(char *p)
  138. {
  139. smt_enabled_cmdline = 1;
  140. if (!p)
  141. return 0;
  142. if (!strcmp(p, "on") || !strcmp(p, "1"))
  143. smt_enabled_at_boot = 1;
  144. else if (!strcmp(p, "off") || !strcmp(p, "0"))
  145. smt_enabled_at_boot = 0;
  146. return 0;
  147. }
  148. early_param("smt-enabled", early_smt_enabled);
  149. #else
  150. #define check_smt_enabled()
  151. #endif /* CONFIG_SMP */
  152. extern struct machdep_calls pSeries_md;
  153. extern struct machdep_calls pmac_md;
  154. extern struct machdep_calls maple_md;
  155. extern struct machdep_calls cell_md;
  156. extern struct machdep_calls iseries_md;
  157. /* Ultimately, stuff them in an elf section like initcalls... */
  158. static struct machdep_calls __initdata *machines[] = {
  159. #ifdef CONFIG_PPC_PSERIES
  160. &pSeries_md,
  161. #endif /* CONFIG_PPC_PSERIES */
  162. #ifdef CONFIG_PPC_PMAC
  163. &pmac_md,
  164. #endif /* CONFIG_PPC_PMAC */
  165. #ifdef CONFIG_PPC_MAPLE
  166. &maple_md,
  167. #endif /* CONFIG_PPC_MAPLE */
  168. #ifdef CONFIG_PPC_CELL
  169. &cell_md,
  170. #endif
  171. #ifdef CONFIG_PPC_ISERIES
  172. &iseries_md,
  173. #endif
  174. NULL
  175. };
  176. /*
  177. * Early initialization entry point. This is called by head.S
  178. * with MMU translation disabled. We rely on the "feature" of
  179. * the CPU that ignores the top 2 bits of the address in real
  180. * mode so we can access kernel globals normally provided we
  181. * only toy with things in the RMO region. From here, we do
  182. * some early parsing of the device-tree to setup out LMB
  183. * data structures, and allocate & initialize the hash table
  184. * and segment tables so we can start running with translation
  185. * enabled.
  186. *
  187. * It is this function which will call the probe() callback of
  188. * the various platform types and copy the matching one to the
  189. * global ppc_md structure. Your platform can eventually do
  190. * some very early initializations from the probe() routine, but
  191. * this is not recommended, be very careful as, for example, the
  192. * device-tree is not accessible via normal means at this point.
  193. */
  194. void __init early_setup(unsigned long dt_ptr)
  195. {
  196. struct paca_struct *lpaca = get_paca();
  197. static struct machdep_calls **mach;
  198. /*
  199. * Enable early debugging if any specified (see top of
  200. * this file)
  201. */
  202. EARLY_DEBUG_INIT();
  203. DBG(" -> early_setup()\n");
  204. /*
  205. * Do early initializations using the flattened device
  206. * tree, like retreiving the physical memory map or
  207. * calculating/retreiving the hash table size
  208. */
  209. early_init_devtree(__va(dt_ptr));
  210. /*
  211. * Iterate all ppc_md structures until we find the proper
  212. * one for the current machine type
  213. */
  214. DBG("Probing machine type for platform %x...\n", _machine);
  215. for (mach = machines; *mach; mach++) {
  216. if ((*mach)->probe(_machine))
  217. break;
  218. }
  219. /* What can we do if we didn't find ? */
  220. if (*mach == NULL) {
  221. DBG("No suitable machine found !\n");
  222. for (;;);
  223. }
  224. ppc_md = **mach;
  225. DBG("Found, Initializing memory management...\n");
  226. /*
  227. * Initialize the MMU Hash table and create the linear mapping
  228. * of memory. Has to be done before stab/slb initialization as
  229. * this is currently where the page size encoding is obtained
  230. */
  231. htab_initialize();
  232. /*
  233. * Initialize stab / SLB management except on iSeries
  234. */
  235. if (!firmware_has_feature(FW_FEATURE_ISERIES)) {
  236. if (cpu_has_feature(CPU_FTR_SLB))
  237. slb_initialize();
  238. else
  239. stab_initialize(lpaca->stab_real);
  240. }
  241. DBG(" <- early_setup()\n");
  242. }
  243. #ifdef CONFIG_SMP
  244. void early_setup_secondary(void)
  245. {
  246. struct paca_struct *lpaca = get_paca();
  247. /* Mark enabled in PACA */
  248. lpaca->proc_enabled = 0;
  249. /* Initialize hash table for that CPU */
  250. htab_initialize_secondary();
  251. /* Initialize STAB/SLB. We use a virtual address as it works
  252. * in real mode on pSeries and we want a virutal address on
  253. * iSeries anyway
  254. */
  255. if (cpu_has_feature(CPU_FTR_SLB))
  256. slb_initialize();
  257. else
  258. stab_initialize(lpaca->stab_addr);
  259. }
  260. #endif /* CONFIG_SMP */
  261. #if defined(CONFIG_SMP) || defined(CONFIG_KEXEC)
  262. void smp_release_cpus(void)
  263. {
  264. extern unsigned long __secondary_hold_spinloop;
  265. DBG(" -> smp_release_cpus()\n");
  266. /* All secondary cpus are spinning on a common spinloop, release them
  267. * all now so they can start to spin on their individual paca
  268. * spinloops. For non SMP kernels, the secondary cpus never get out
  269. * of the common spinloop.
  270. * This is useless but harmless on iSeries, secondaries are already
  271. * waiting on their paca spinloops. */
  272. __secondary_hold_spinloop = 1;
  273. mb();
  274. DBG(" <- smp_release_cpus()\n");
  275. }
  276. #else
  277. #define smp_release_cpus()
  278. #endif /* CONFIG_SMP || CONFIG_KEXEC */
  279. /*
  280. * Initialize some remaining members of the ppc64_caches and systemcfg
  281. * structures
  282. * (at least until we get rid of them completely). This is mostly some
  283. * cache informations about the CPU that will be used by cache flush
  284. * routines and/or provided to userland
  285. */
  286. static void __init initialize_cache_info(void)
  287. {
  288. struct device_node *np;
  289. unsigned long num_cpus = 0;
  290. DBG(" -> initialize_cache_info()\n");
  291. for (np = NULL; (np = of_find_node_by_type(np, "cpu"));) {
  292. num_cpus += 1;
  293. /* We're assuming *all* of the CPUs have the same
  294. * d-cache and i-cache sizes... -Peter
  295. */
  296. if ( num_cpus == 1 ) {
  297. u32 *sizep, *lsizep;
  298. u32 size, lsize;
  299. const char *dc, *ic;
  300. /* Then read cache informations */
  301. if (_machine == PLATFORM_POWERMAC) {
  302. dc = "d-cache-block-size";
  303. ic = "i-cache-block-size";
  304. } else {
  305. dc = "d-cache-line-size";
  306. ic = "i-cache-line-size";
  307. }
  308. size = 0;
  309. lsize = cur_cpu_spec->dcache_bsize;
  310. sizep = (u32 *)get_property(np, "d-cache-size", NULL);
  311. if (sizep != NULL)
  312. size = *sizep;
  313. lsizep = (u32 *) get_property(np, dc, NULL);
  314. if (lsizep != NULL)
  315. lsize = *lsizep;
  316. if (sizep == 0 || lsizep == 0)
  317. DBG("Argh, can't find dcache properties ! "
  318. "sizep: %p, lsizep: %p\n", sizep, lsizep);
  319. ppc64_caches.dsize = size;
  320. ppc64_caches.dline_size = lsize;
  321. ppc64_caches.log_dline_size = __ilog2(lsize);
  322. ppc64_caches.dlines_per_page = PAGE_SIZE / lsize;
  323. size = 0;
  324. lsize = cur_cpu_spec->icache_bsize;
  325. sizep = (u32 *)get_property(np, "i-cache-size", NULL);
  326. if (sizep != NULL)
  327. size = *sizep;
  328. lsizep = (u32 *)get_property(np, ic, NULL);
  329. if (lsizep != NULL)
  330. lsize = *lsizep;
  331. if (sizep == 0 || lsizep == 0)
  332. DBG("Argh, can't find icache properties ! "
  333. "sizep: %p, lsizep: %p\n", sizep, lsizep);
  334. ppc64_caches.isize = size;
  335. ppc64_caches.iline_size = lsize;
  336. ppc64_caches.log_iline_size = __ilog2(lsize);
  337. ppc64_caches.ilines_per_page = PAGE_SIZE / lsize;
  338. }
  339. }
  340. DBG(" <- initialize_cache_info()\n");
  341. }
  342. /*
  343. * Do some initial setup of the system. The parameters are those which
  344. * were passed in from the bootloader.
  345. */
  346. void __init setup_system(void)
  347. {
  348. DBG(" -> setup_system()\n");
  349. /*
  350. * Unflatten the device-tree passed by prom_init or kexec
  351. */
  352. unflatten_device_tree();
  353. /*
  354. * Fill the ppc64_caches & systemcfg structures with informations
  355. * retreived from the device-tree. Need to be called before
  356. * finish_device_tree() since the later requires some of the
  357. * informations filled up here to properly parse the interrupt
  358. * tree.
  359. * It also sets up the cache line sizes which allows to call
  360. * routines like flush_icache_range (used by the hash init
  361. * later on).
  362. */
  363. initialize_cache_info();
  364. #ifdef CONFIG_PPC_RTAS
  365. /*
  366. * Initialize RTAS if available
  367. */
  368. rtas_initialize();
  369. #endif /* CONFIG_PPC_RTAS */
  370. /*
  371. * Check if we have an initrd provided via the device-tree
  372. */
  373. check_for_initrd();
  374. /*
  375. * Do some platform specific early initializations, that includes
  376. * setting up the hash table pointers. It also sets up some interrupt-mapping
  377. * related options that will be used by finish_device_tree()
  378. */
  379. ppc_md.init_early();
  380. /*
  381. * "Finish" the device-tree, that is do the actual parsing of
  382. * some of the properties like the interrupt map
  383. */
  384. finish_device_tree();
  385. #ifdef CONFIG_BOOTX_TEXT
  386. init_boot_display();
  387. #endif
  388. /*
  389. * Initialize xmon
  390. */
  391. #ifdef CONFIG_XMON_DEFAULT
  392. xmon_init(1);
  393. #endif
  394. /*
  395. * Register early console
  396. */
  397. register_early_udbg_console();
  398. /* Save unparsed command line copy for /proc/cmdline */
  399. strlcpy(saved_command_line, cmd_line, COMMAND_LINE_SIZE);
  400. parse_early_param();
  401. check_smt_enabled();
  402. smp_setup_cpu_maps();
  403. /* Release secondary cpus out of their spinloops at 0x60 now that
  404. * we can map physical -> logical CPU ids
  405. */
  406. smp_release_cpus();
  407. printk("Starting Linux PPC64 %s\n", system_utsname.version);
  408. printk("-----------------------------------------------------\n");
  409. printk("ppc64_pft_size = 0x%lx\n", ppc64_pft_size);
  410. printk("ppc64_interrupt_controller = 0x%ld\n",
  411. ppc64_interrupt_controller);
  412. printk("platform = 0x%x\n", _machine);
  413. printk("physicalMemorySize = 0x%lx\n", lmb_phys_mem_size());
  414. printk("ppc64_caches.dcache_line_size = 0x%x\n",
  415. ppc64_caches.dline_size);
  416. printk("ppc64_caches.icache_line_size = 0x%x\n",
  417. ppc64_caches.iline_size);
  418. printk("htab_address = 0x%p\n", htab_address);
  419. printk("htab_hash_mask = 0x%lx\n", htab_hash_mask);
  420. printk("-----------------------------------------------------\n");
  421. mm_init_ppc64();
  422. DBG(" <- setup_system()\n");
  423. }
  424. static int ppc64_panic_event(struct notifier_block *this,
  425. unsigned long event, void *ptr)
  426. {
  427. ppc_md.panic((char *)ptr); /* May not return */
  428. return NOTIFY_DONE;
  429. }
  430. #ifdef CONFIG_IRQSTACKS
  431. static void __init irqstack_early_init(void)
  432. {
  433. unsigned int i;
  434. /*
  435. * interrupt stacks must be under 256MB, we cannot afford to take
  436. * SLB misses on them.
  437. */
  438. for_each_cpu(i) {
  439. softirq_ctx[i] = (struct thread_info *)
  440. __va(lmb_alloc_base(THREAD_SIZE,
  441. THREAD_SIZE, 0x10000000));
  442. hardirq_ctx[i] = (struct thread_info *)
  443. __va(lmb_alloc_base(THREAD_SIZE,
  444. THREAD_SIZE, 0x10000000));
  445. }
  446. }
  447. #else
  448. #define irqstack_early_init()
  449. #endif
  450. /*
  451. * Stack space used when we detect a bad kernel stack pointer, and
  452. * early in SMP boots before relocation is enabled.
  453. */
  454. static void __init emergency_stack_init(void)
  455. {
  456. unsigned long limit;
  457. unsigned int i;
  458. /*
  459. * Emergency stacks must be under 256MB, we cannot afford to take
  460. * SLB misses on them. The ABI also requires them to be 128-byte
  461. * aligned.
  462. *
  463. * Since we use these as temporary stacks during secondary CPU
  464. * bringup, we need to get at them in real mode. This means they
  465. * must also be within the RMO region.
  466. */
  467. limit = min(0x10000000UL, lmb.rmo_size);
  468. for_each_cpu(i)
  469. paca[i].emergency_sp =
  470. __va(lmb_alloc_base(HW_PAGE_SIZE, 128, limit)) + HW_PAGE_SIZE;
  471. }
  472. /*
  473. * Called into from start_kernel, after lock_kernel has been called.
  474. * Initializes bootmem, which is unsed to manage page allocation until
  475. * mem_init is called.
  476. */
  477. void __init setup_arch(char **cmdline_p)
  478. {
  479. extern void do_init_bootmem(void);
  480. ppc64_boot_msg(0x12, "Setup Arch");
  481. *cmdline_p = cmd_line;
  482. /*
  483. * Set cache line size based on type of cpu as a default.
  484. * Systems with OF can look in the properties on the cpu node(s)
  485. * for a possibly more accurate value.
  486. */
  487. dcache_bsize = ppc64_caches.dline_size;
  488. icache_bsize = ppc64_caches.iline_size;
  489. /* reboot on panic */
  490. panic_timeout = 180;
  491. if (ppc_md.panic)
  492. notifier_chain_register(&panic_notifier_list, &ppc64_panic_block);
  493. init_mm.start_code = PAGE_OFFSET;
  494. init_mm.end_code = (unsigned long) _etext;
  495. init_mm.end_data = (unsigned long) _edata;
  496. init_mm.brk = klimit;
  497. irqstack_early_init();
  498. emergency_stack_init();
  499. stabs_alloc();
  500. /* set up the bootmem stuff with available memory */
  501. do_init_bootmem();
  502. sparse_init();
  503. #ifdef CONFIG_DUMMY_CONSOLE
  504. conswitchp = &dummy_con;
  505. #endif
  506. ppc_md.setup_arch();
  507. /* Use the default idle loop if the platform hasn't provided one. */
  508. if (NULL == ppc_md.idle_loop) {
  509. ppc_md.idle_loop = default_idle;
  510. printk(KERN_INFO "Using default idle loop\n");
  511. }
  512. paging_init();
  513. ppc64_boot_msg(0x15, "Setup Done");
  514. }
  515. /* ToDo: do something useful if ppc_md is not yet setup. */
  516. #define PPC64_LINUX_FUNCTION 0x0f000000
  517. #define PPC64_IPL_MESSAGE 0xc0000000
  518. #define PPC64_TERM_MESSAGE 0xb0000000
  519. static void ppc64_do_msg(unsigned int src, const char *msg)
  520. {
  521. if (ppc_md.progress) {
  522. char buf[128];
  523. sprintf(buf, "%08X\n", src);
  524. ppc_md.progress(buf, 0);
  525. snprintf(buf, 128, "%s", msg);
  526. ppc_md.progress(buf, 0);
  527. }
  528. }
  529. /* Print a boot progress message. */
  530. void ppc64_boot_msg(unsigned int src, const char *msg)
  531. {
  532. ppc64_do_msg(PPC64_LINUX_FUNCTION|PPC64_IPL_MESSAGE|src, msg);
  533. printk("[boot]%04x %s\n", src, msg);
  534. }
  535. /* Print a termination message (print only -- does not stop the kernel) */
  536. void ppc64_terminate_msg(unsigned int src, const char *msg)
  537. {
  538. ppc64_do_msg(PPC64_LINUX_FUNCTION|PPC64_TERM_MESSAGE|src, msg);
  539. printk("[terminate]%04x %s\n", src, msg);
  540. }
  541. #ifndef CONFIG_PPC_ISERIES
  542. /*
  543. * This function can be used by platforms to "find" legacy serial ports.
  544. * It works for "serial" nodes under an "isa" node, and will try to
  545. * respect the "ibm,aix-loc" property if any. It works with up to 8
  546. * ports.
  547. */
  548. #define MAX_LEGACY_SERIAL_PORTS 8
  549. static struct plat_serial8250_port serial_ports[MAX_LEGACY_SERIAL_PORTS+1];
  550. static unsigned int old_serial_count;
  551. void __init generic_find_legacy_serial_ports(u64 *physport,
  552. unsigned int *default_speed)
  553. {
  554. struct device_node *np;
  555. u32 *sizeprop;
  556. struct isa_reg_property {
  557. u32 space;
  558. u32 address;
  559. u32 size;
  560. };
  561. struct pci_reg_property {
  562. struct pci_address addr;
  563. u32 size_hi;
  564. u32 size_lo;
  565. };
  566. DBG(" -> generic_find_legacy_serial_port()\n");
  567. *physport = 0;
  568. if (default_speed)
  569. *default_speed = 0;
  570. np = of_find_node_by_path("/");
  571. if (!np)
  572. return;
  573. /* First fill our array */
  574. for (np = NULL; (np = of_find_node_by_type(np, "serial"));) {
  575. struct device_node *isa, *pci;
  576. struct isa_reg_property *reg;
  577. unsigned long phys_size, addr_size, io_base;
  578. u32 *rangesp;
  579. u32 *interrupts, *clk, *spd;
  580. char *typep;
  581. int index, rlen, rentsize;
  582. /* Ok, first check if it's under an "isa" parent */
  583. isa = of_get_parent(np);
  584. if (!isa || strcmp(isa->name, "isa")) {
  585. DBG("%s: no isa parent found\n", np->full_name);
  586. continue;
  587. }
  588. /* Now look for an "ibm,aix-loc" property that gives us ordering
  589. * if any...
  590. */
  591. typep = (char *)get_property(np, "ibm,aix-loc", NULL);
  592. /* Get the ISA port number */
  593. reg = (struct isa_reg_property *)get_property(np, "reg", NULL);
  594. if (reg == NULL)
  595. goto next_port;
  596. /* We assume the interrupt number isn't translated ... */
  597. interrupts = (u32 *)get_property(np, "interrupts", NULL);
  598. /* get clock freq. if present */
  599. clk = (u32 *)get_property(np, "clock-frequency", NULL);
  600. /* get default speed if present */
  601. spd = (u32 *)get_property(np, "current-speed", NULL);
  602. /* Default to locate at end of array */
  603. index = old_serial_count; /* end of the array by default */
  604. /* If we have a location index, then use it */
  605. if (typep && *typep == 'S') {
  606. index = simple_strtol(typep+1, NULL, 0) - 1;
  607. /* if index is out of range, use end of array instead */
  608. if (index >= MAX_LEGACY_SERIAL_PORTS)
  609. index = old_serial_count;
  610. /* if our index is still out of range, that mean that
  611. * array is full, we could scan for a free slot but that
  612. * make little sense to bother, just skip the port
  613. */
  614. if (index >= MAX_LEGACY_SERIAL_PORTS)
  615. goto next_port;
  616. if (index >= old_serial_count)
  617. old_serial_count = index + 1;
  618. /* Check if there is a port who already claimed our slot */
  619. if (serial_ports[index].iobase != 0) {
  620. /* if we still have some room, move it, else override */
  621. if (old_serial_count < MAX_LEGACY_SERIAL_PORTS) {
  622. DBG("Moved legacy port %d -> %d\n", index,
  623. old_serial_count);
  624. serial_ports[old_serial_count++] =
  625. serial_ports[index];
  626. } else {
  627. DBG("Replacing legacy port %d\n", index);
  628. }
  629. }
  630. }
  631. if (index >= MAX_LEGACY_SERIAL_PORTS)
  632. goto next_port;
  633. if (index >= old_serial_count)
  634. old_serial_count = index + 1;
  635. /* Now fill the entry */
  636. memset(&serial_ports[index], 0, sizeof(struct plat_serial8250_port));
  637. serial_ports[index].uartclk = clk ? *clk : BASE_BAUD * 16;
  638. serial_ports[index].iobase = reg->address;
  639. serial_ports[index].irq = interrupts ? interrupts[0] : 0;
  640. serial_ports[index].flags = ASYNC_BOOT_AUTOCONF;
  641. DBG("Added legacy port, index: %d, port: %x, irq: %d, clk: %d\n",
  642. index,
  643. serial_ports[index].iobase,
  644. serial_ports[index].irq,
  645. serial_ports[index].uartclk);
  646. /* Get phys address of IO reg for port 1 */
  647. if (index != 0)
  648. goto next_port;
  649. pci = of_get_parent(isa);
  650. if (!pci) {
  651. DBG("%s: no pci parent found\n", np->full_name);
  652. goto next_port;
  653. }
  654. rangesp = (u32 *)get_property(pci, "ranges", &rlen);
  655. if (rangesp == NULL) {
  656. of_node_put(pci);
  657. goto next_port;
  658. }
  659. rlen /= 4;
  660. /* we need the #size-cells of the PCI bridge node itself */
  661. phys_size = 1;
  662. sizeprop = (u32 *)get_property(pci, "#size-cells", NULL);
  663. if (sizeprop != NULL)
  664. phys_size = *sizeprop;
  665. /* we need the parent #addr-cells */
  666. addr_size = prom_n_addr_cells(pci);
  667. rentsize = 3 + addr_size + phys_size;
  668. io_base = 0;
  669. for (;rlen >= rentsize; rlen -= rentsize,rangesp += rentsize) {
  670. if (((rangesp[0] >> 24) & 0x3) != 1)
  671. continue; /* not IO space */
  672. io_base = rangesp[3];
  673. if (addr_size == 2)
  674. io_base = (io_base << 32) | rangesp[4];
  675. }
  676. if (io_base != 0) {
  677. *physport = io_base + reg->address;
  678. if (default_speed && spd)
  679. *default_speed = *spd;
  680. }
  681. of_node_put(pci);
  682. next_port:
  683. of_node_put(isa);
  684. }
  685. DBG(" <- generic_find_legacy_serial_port()\n");
  686. }
  687. static struct platform_device serial_device = {
  688. .name = "serial8250",
  689. .id = PLAT8250_DEV_PLATFORM,
  690. .dev = {
  691. .platform_data = serial_ports,
  692. },
  693. };
  694. static int __init serial_dev_init(void)
  695. {
  696. return platform_device_register(&serial_device);
  697. }
  698. arch_initcall(serial_dev_init);
  699. #endif /* CONFIG_PPC_ISERIES */
  700. int check_legacy_ioport(unsigned long base_port)
  701. {
  702. if (ppc_md.check_legacy_ioport == NULL)
  703. return 0;
  704. return ppc_md.check_legacy_ioport(base_port);
  705. }
  706. EXPORT_SYMBOL(check_legacy_ioport);
  707. void cpu_die(void)
  708. {
  709. if (ppc_md.cpu_die)
  710. ppc_md.cpu_die();
  711. }