mpc8349emitx.dts 5.9 KB

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  1. /*
  2. * MPC8349E-mITX Device Tree Source
  3. *
  4. * Copyright 2006 Freescale Semiconductor Inc.
  5. *
  6. * This program is free software; you can redistribute it and/or modify it
  7. * under the terms of the GNU General Public License as published by the
  8. * Free Software Foundation; either version 2 of the License, or (at your
  9. * option) any later version.
  10. */
  11. / {
  12. model = "MPC8349EMITX";
  13. compatible = "MPC8349EMITX", "MPC834xMITX", "MPC83xxMITX";
  14. #address-cells = <1>;
  15. #size-cells = <1>;
  16. aliases {
  17. ethernet0 = &enet0;
  18. ethernet1 = &enet1;
  19. serial0 = &serial0;
  20. serial1 = &serial1;
  21. pci0 = &pci0;
  22. pci1 = &pci1;
  23. };
  24. cpus {
  25. #address-cells = <1>;
  26. #size-cells = <0>;
  27. PowerPC,8349@0 {
  28. device_type = "cpu";
  29. reg = <0>;
  30. d-cache-line-size = <20>;
  31. i-cache-line-size = <20>;
  32. d-cache-size = <8000>;
  33. i-cache-size = <8000>;
  34. timebase-frequency = <0>; // from bootloader
  35. bus-frequency = <0>; // from bootloader
  36. clock-frequency = <0>; // from bootloader
  37. };
  38. };
  39. memory {
  40. device_type = "memory";
  41. reg = <00000000 10000000>;
  42. };
  43. soc8349@e0000000 {
  44. #address-cells = <1>;
  45. #size-cells = <1>;
  46. device_type = "soc";
  47. ranges = <0 e0000000 00100000>;
  48. reg = <e0000000 00000200>;
  49. bus-frequency = <0>; // from bootloader
  50. wdt@200 {
  51. device_type = "watchdog";
  52. compatible = "mpc83xx_wdt";
  53. reg = <200 100>;
  54. };
  55. i2c@3000 {
  56. #address-cells = <1>;
  57. #size-cells = <0>;
  58. cell-index = <0>;
  59. compatible = "fsl-i2c";
  60. reg = <3000 100>;
  61. interrupts = <e 8>;
  62. interrupt-parent = < &ipic >;
  63. dfsrr;
  64. };
  65. i2c@3100 {
  66. #address-cells = <1>;
  67. #size-cells = <0>;
  68. cell-index = <1>;
  69. compatible = "fsl-i2c";
  70. reg = <3100 100>;
  71. interrupts = <f 8>;
  72. interrupt-parent = < &ipic >;
  73. dfsrr;
  74. };
  75. spi@7000 {
  76. device_type = "spi";
  77. compatible = "fsl_spi";
  78. reg = <7000 1000>;
  79. interrupts = <10 8>;
  80. interrupt-parent = < &ipic >;
  81. mode = "cpu";
  82. };
  83. usb@22000 {
  84. compatible = "fsl-usb2-mph";
  85. reg = <22000 1000>;
  86. #address-cells = <1>;
  87. #size-cells = <0>;
  88. interrupt-parent = < &ipic >;
  89. interrupts = <27 8>;
  90. phy_type = "ulpi";
  91. port1;
  92. };
  93. usb@23000 {
  94. compatible = "fsl-usb2-dr";
  95. reg = <23000 1000>;
  96. #address-cells = <1>;
  97. #size-cells = <0>;
  98. interrupt-parent = < &ipic >;
  99. interrupts = <26 8>;
  100. dr_mode = "peripheral";
  101. phy_type = "ulpi";
  102. };
  103. mdio@24520 {
  104. #address-cells = <1>;
  105. #size-cells = <0>;
  106. compatible = "fsl,gianfar-mdio";
  107. reg = <24520 20>;
  108. /* Vitesse 8201 */
  109. phy1c: ethernet-phy@1c {
  110. interrupt-parent = < &ipic >;
  111. interrupts = <12 8>;
  112. reg = <1c>;
  113. device_type = "ethernet-phy";
  114. };
  115. /* Vitesse 7385 */
  116. phy1f: ethernet-phy@1f {
  117. interrupt-parent = < &ipic >;
  118. interrupts = <12 8>;
  119. reg = <1f>;
  120. device_type = "ethernet-phy";
  121. };
  122. };
  123. enet0: ethernet@24000 {
  124. cell-index = <0>;
  125. device_type = "network";
  126. model = "TSEC";
  127. compatible = "gianfar";
  128. reg = <24000 1000>;
  129. local-mac-address = [ 00 00 00 00 00 00 ];
  130. interrupts = <20 8 21 8 22 8>;
  131. interrupt-parent = < &ipic >;
  132. phy-handle = < &phy1c >;
  133. linux,network-index = <0>;
  134. };
  135. enet1: ethernet@25000 {
  136. cell-index = <1>;
  137. device_type = "network";
  138. model = "TSEC";
  139. compatible = "gianfar";
  140. reg = <25000 1000>;
  141. local-mac-address = [ 00 00 00 00 00 00 ];
  142. interrupts = <23 8 24 8 25 8>;
  143. interrupt-parent = < &ipic >;
  144. phy-handle = < &phy1f >;
  145. linux,network-index = <1>;
  146. };
  147. serial0: serial@4500 {
  148. cell-index = <0>;
  149. device_type = "serial";
  150. compatible = "ns16550";
  151. reg = <4500 100>;
  152. clock-frequency = <0>; // from bootloader
  153. interrupts = <9 8>;
  154. interrupt-parent = < &ipic >;
  155. };
  156. serial1: serial@4600 {
  157. cell-index = <1>;
  158. device_type = "serial";
  159. compatible = "ns16550";
  160. reg = <4600 100>;
  161. clock-frequency = <0>; // from bootloader
  162. interrupts = <a 8>;
  163. interrupt-parent = < &ipic >;
  164. };
  165. crypto@30000 {
  166. device_type = "crypto";
  167. model = "SEC2";
  168. compatible = "talitos";
  169. reg = <30000 10000>;
  170. interrupts = <b 8>;
  171. interrupt-parent = < &ipic >;
  172. num-channels = <4>;
  173. channel-fifo-len = <18>;
  174. exec-units-mask = <0000007e>;
  175. descriptor-types-mask = <01010ebf>;
  176. };
  177. ipic: pic@700 {
  178. interrupt-controller;
  179. #address-cells = <0>;
  180. #interrupt-cells = <2>;
  181. reg = <700 100>;
  182. device_type = "ipic";
  183. };
  184. };
  185. pci0: pci@e0008500 {
  186. cell-index = <1>;
  187. interrupt-map-mask = <f800 0 0 7>;
  188. interrupt-map = <
  189. /* IDSEL 0x10 - SATA */
  190. 8000 0 0 1 &ipic 16 8 /* SATA_INTA */
  191. >;
  192. interrupt-parent = < &ipic >;
  193. interrupts = <42 8>;
  194. bus-range = <0 0>;
  195. ranges = <42000000 0 80000000 80000000 0 10000000
  196. 02000000 0 90000000 90000000 0 10000000
  197. 01000000 0 00000000 e2000000 0 01000000>;
  198. clock-frequency = <3f940aa>;
  199. #interrupt-cells = <1>;
  200. #size-cells = <2>;
  201. #address-cells = <3>;
  202. reg = <e0008500 100>;
  203. compatible = "fsl,mpc8349-pci";
  204. device_type = "pci";
  205. };
  206. pci1: pci@e0008600 {
  207. cell-index = <2>;
  208. interrupt-map-mask = <f800 0 0 7>;
  209. interrupt-map = <
  210. /* IDSEL 0x0E - MiniPCI Slot */
  211. 7000 0 0 1 &ipic 15 8 /* PCI_INTA */
  212. /* IDSEL 0x0F - PCI Slot */
  213. 7800 0 0 1 &ipic 14 8 /* PCI_INTA */
  214. 7800 0 0 2 &ipic 15 8 /* PCI_INTB */
  215. >;
  216. interrupt-parent = < &ipic >;
  217. interrupts = <43 8>;
  218. bus-range = <0 0>;
  219. ranges = <42000000 0 a0000000 a0000000 0 10000000
  220. 02000000 0 b0000000 b0000000 0 10000000
  221. 01000000 0 00000000 e3000000 0 01000000>;
  222. clock-frequency = <3f940aa>;
  223. #interrupt-cells = <1>;
  224. #size-cells = <2>;
  225. #address-cells = <3>;
  226. reg = <e0008600 100>;
  227. compatible = "fsl,mpc8349-pci";
  228. device_type = "pci";
  229. };
  230. localbus@e0005000 {
  231. #address-cells = <2>;
  232. #size-cells = <1>;
  233. compatible = "fsl,mpc8349e-localbus",
  234. "fsl,pq2pro-localbus";
  235. reg = <e0005000 d8>;
  236. ranges = <3 0 f0000000 210>;
  237. pata@3,0 {
  238. compatible = "fsl,mpc8349emitx-pata", "ata-generic";
  239. reg = <3 0 10 3 20c 4>;
  240. reg-shift = <1>;
  241. pio-mode = <6>;
  242. interrupts = <17 8>;
  243. interrupt-parent = <&ipic>;
  244. };
  245. };
  246. };