head.S 27 KB

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  1. /*
  2. * arch/s390/kernel/head.S
  3. *
  4. * S390 version
  5. * Copyright (C) 1999,2000 IBM Deutschland Entwicklung GmbH, IBM Corporation
  6. * Author(s): Hartmut Penner (hp@de.ibm.com),
  7. * Martin Schwidefsky (schwidefsky@de.ibm.com),
  8. * Rob van der Heij (rvdhei@iae.nl)
  9. *
  10. * There are 5 different IPL methods
  11. * 1) load the image directly into ram at address 0 and do an PSW restart
  12. * 2) linload will load the image from address 0x10000 to memory 0x10000
  13. * and start the code thru LPSW 0x0008000080010000 (VM only, deprecated)
  14. * 3) generate the tape ipl header, store the generated image on a tape
  15. * and ipl from it
  16. * In case of SL tape you need to IPL 5 times to get past VOL1 etc
  17. * 4) generate the vm reader ipl header, move the generated image to the
  18. * VM reader (use option NOH!) and do a ipl from reader (VM only)
  19. * 5) direct call of start by the SALIPL loader
  20. * We use the cpuid to distinguish between VM and native ipl
  21. * params for kernel are pushed to 0x10400 (see setup.h)
  22. Changes:
  23. Okt 25 2000 <rvdheij@iae.nl>
  24. added code to skip HDR and EOF to allow SL tape IPL (5 retries)
  25. changed first CCW from rewind to backspace block
  26. */
  27. #include <linux/config.h>
  28. #include <asm/setup.h>
  29. #include <asm/lowcore.h>
  30. #include <asm/asm-offsets.h>
  31. #include <asm/thread_info.h>
  32. #include <asm/page.h>
  33. #ifndef CONFIG_IPL
  34. .org 0
  35. .long 0x00080000,0x80000000+startup # Just a restart PSW
  36. #else
  37. #ifdef CONFIG_IPL_TAPE
  38. #define IPL_BS 1024
  39. .org 0
  40. .long 0x00080000,0x80000000+iplstart # The first 24 bytes are loaded
  41. .long 0x27000000,0x60000001 # by ipl to addresses 0-23.
  42. .long 0x02000000,0x20000000+IPL_BS # (a PSW and two CCWs).
  43. .long 0x00000000,0x00000000 # external old psw
  44. .long 0x00000000,0x00000000 # svc old psw
  45. .long 0x00000000,0x00000000 # program check old psw
  46. .long 0x00000000,0x00000000 # machine check old psw
  47. .long 0x00000000,0x00000000 # io old psw
  48. .long 0x00000000,0x00000000
  49. .long 0x00000000,0x00000000
  50. .long 0x00000000,0x00000000
  51. .long 0x000a0000,0x00000058 # external new psw
  52. .long 0x000a0000,0x00000060 # svc new psw
  53. .long 0x000a0000,0x00000068 # program check new psw
  54. .long 0x000a0000,0x00000070 # machine check new psw
  55. .long 0x00080000,0x80000000+.Lioint # io new psw
  56. .org 0x100
  57. #
  58. # subroutine for loading from tape
  59. # Paramters:
  60. # R1 = device number
  61. # R2 = load address
  62. .Lloader:
  63. st %r14,.Lldret
  64. la %r3,.Lorbread # r3 = address of orb
  65. la %r5,.Lirb # r5 = address of irb
  66. st %r2,.Lccwread+4 # initialize CCW data addresses
  67. lctl %c6,%c6,.Lcr6
  68. slr %r2,%r2
  69. .Lldlp:
  70. la %r6,3 # 3 retries
  71. .Lssch:
  72. ssch 0(%r3) # load chunk of IPL_BS bytes
  73. bnz .Llderr
  74. .Lw4end:
  75. bas %r14,.Lwait4io
  76. tm 8(%r5),0x82 # do we have a problem ?
  77. bnz .Lrecov
  78. slr %r7,%r7
  79. icm %r7,3,10(%r5) # get residual count
  80. lcr %r7,%r7
  81. la %r7,IPL_BS(%r7) # IPL_BS-residual=#bytes read
  82. ar %r2,%r7 # add to total size
  83. tm 8(%r5),0x01 # found a tape mark ?
  84. bnz .Ldone
  85. l %r0,.Lccwread+4 # update CCW data addresses
  86. ar %r0,%r7
  87. st %r0,.Lccwread+4
  88. b .Lldlp
  89. .Ldone:
  90. l %r14,.Lldret
  91. br %r14 # r2 contains the total size
  92. .Lrecov:
  93. bas %r14,.Lsense # do the sensing
  94. bct %r6,.Lssch # dec. retry count & branch
  95. b .Llderr
  96. #
  97. # Sense subroutine
  98. #
  99. .Lsense:
  100. st %r14,.Lsnsret
  101. la %r7,.Lorbsense
  102. ssch 0(%r7) # start sense command
  103. bnz .Llderr
  104. bas %r14,.Lwait4io
  105. l %r14,.Lsnsret
  106. tm 8(%r5),0x82 # do we have a problem ?
  107. bnz .Llderr
  108. br %r14
  109. #
  110. # Wait for interrupt subroutine
  111. #
  112. .Lwait4io:
  113. lpsw .Lwaitpsw
  114. .Lioint:
  115. c %r1,0xb8 # compare subchannel number
  116. bne .Lwait4io
  117. tsch 0(%r5)
  118. slr %r0,%r0
  119. tm 8(%r5),0x82 # do we have a problem ?
  120. bnz .Lwtexit
  121. tm 8(%r5),0x04 # got device end ?
  122. bz .Lwait4io
  123. .Lwtexit:
  124. br %r14
  125. .Llderr:
  126. lpsw .Lcrash
  127. .align 8
  128. .Lorbread:
  129. .long 0x00000000,0x0080ff00,.Lccwread
  130. .align 8
  131. .Lorbsense:
  132. .long 0x00000000,0x0080ff00,.Lccwsense
  133. .align 8
  134. .Lccwread:
  135. .long 0x02200000+IPL_BS,0x00000000
  136. .Lccwsense:
  137. .long 0x04200001,0x00000000
  138. .Lwaitpsw:
  139. .long 0x020a0000,0x80000000+.Lioint
  140. .Lirb: .long 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
  141. .Lcr6: .long 0xff000000
  142. .align 8
  143. .Lcrash:.long 0x000a0000,0x00000000
  144. .Lldret:.long 0
  145. .Lsnsret: .long 0
  146. #endif /* CONFIG_IPL_TAPE */
  147. #ifdef CONFIG_IPL_VM
  148. #define IPL_BS 0x730
  149. .org 0
  150. .long 0x00080000,0x80000000+iplstart # The first 24 bytes are loaded
  151. .long 0x02000018,0x60000050 # by ipl to addresses 0-23.
  152. .long 0x02000068,0x60000050 # (a PSW and two CCWs).
  153. .fill 80-24,1,0x40 # bytes 24-79 are discarded !!
  154. .long 0x020000f0,0x60000050 # The next 160 byte are loaded
  155. .long 0x02000140,0x60000050 # to addresses 0x18-0xb7
  156. .long 0x02000190,0x60000050 # They form the continuation
  157. .long 0x020001e0,0x60000050 # of the CCW program started
  158. .long 0x02000230,0x60000050 # by ipl and load the range
  159. .long 0x02000280,0x60000050 # 0x0f0-0x730 from the image
  160. .long 0x020002d0,0x60000050 # to the range 0x0f0-0x730
  161. .long 0x02000320,0x60000050 # in memory. At the end of
  162. .long 0x02000370,0x60000050 # the channel program the PSW
  163. .long 0x020003c0,0x60000050 # at location 0 is loaded.
  164. .long 0x02000410,0x60000050 # Initial processing starts
  165. .long 0x02000460,0x60000050 # at 0xf0 = iplstart.
  166. .long 0x020004b0,0x60000050
  167. .long 0x02000500,0x60000050
  168. .long 0x02000550,0x60000050
  169. .long 0x020005a0,0x60000050
  170. .long 0x020005f0,0x60000050
  171. .long 0x02000640,0x60000050
  172. .long 0x02000690,0x60000050
  173. .long 0x020006e0,0x20000050
  174. .org 0xf0
  175. #
  176. # subroutine for loading cards from the reader
  177. #
  178. .Lloader:
  179. la %r3,.Lorb # r2 = address of orb into r2
  180. la %r5,.Lirb # r4 = address of irb
  181. la %r6,.Lccws
  182. la %r7,20
  183. .Linit:
  184. st %r2,4(%r6) # initialize CCW data addresses
  185. la %r2,0x50(%r2)
  186. la %r6,8(%r6)
  187. bct 7,.Linit
  188. lctl %c6,%c6,.Lcr6 # set IO subclass mask
  189. slr %r2,%r2
  190. .Lldlp:
  191. ssch 0(%r3) # load chunk of 1600 bytes
  192. bnz .Llderr
  193. .Lwait4irq:
  194. mvc __LC_IO_NEW_PSW(8),.Lnewpsw # set up IO interrupt psw
  195. lpsw .Lwaitpsw
  196. .Lioint:
  197. c %r1,0xb8 # compare subchannel number
  198. bne .Lwait4irq
  199. tsch 0(%r5)
  200. slr %r0,%r0
  201. ic %r0,8(%r5) # get device status
  202. chi %r0,8 # channel end ?
  203. be .Lcont
  204. chi %r0,12 # channel end + device end ?
  205. be .Lcont
  206. l %r0,4(%r5)
  207. s %r0,8(%r3) # r0/8 = number of ccws executed
  208. mhi %r0,10 # *10 = number of bytes in ccws
  209. lh %r3,10(%r5) # get residual count
  210. sr %r0,%r3 # #ccws*80-residual=#bytes read
  211. ar %r2,%r0
  212. br %r14 # r2 contains the total size
  213. .Lcont:
  214. ahi %r2,0x640 # add 0x640 to total size
  215. la %r6,.Lccws
  216. la %r7,20
  217. .Lincr:
  218. l %r0,4(%r6) # update CCW data addresses
  219. ahi %r0,0x640
  220. st %r0,4(%r6)
  221. ahi %r6,8
  222. bct 7,.Lincr
  223. b .Lldlp
  224. .Llderr:
  225. lpsw .Lcrash
  226. .align 8
  227. .Lorb: .long 0x00000000,0x0080ff00,.Lccws
  228. .Lirb: .long 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
  229. .Lcr6: .long 0xff000000
  230. .Lloadp:.long 0,0
  231. .align 8
  232. .Lcrash:.long 0x000a0000,0x00000000
  233. .Lnewpsw:
  234. .long 0x00080000,0x80000000+.Lioint
  235. .Lwaitpsw:
  236. .long 0x020a0000,0x80000000+.Lioint
  237. .align 8
  238. .Lccws: .rept 19
  239. .long 0x02600050,0x00000000
  240. .endr
  241. .long 0x02200050,0x00000000
  242. #endif /* CONFIG_IPL_VM */
  243. iplstart:
  244. lh %r1,0xb8 # test if subchannel number
  245. bct %r1,.Lnoload # is valid
  246. l %r1,0xb8 # load ipl subchannel number
  247. la %r2,IPL_BS # load start address
  248. bas %r14,.Lloader # load rest of ipl image
  249. l %r12,.Lparm # pointer to parameter area
  250. st %r1,IPL_DEVICE-PARMAREA(%r12) # store ipl device number
  251. #
  252. # load parameter file from ipl device
  253. #
  254. .Lagain1:
  255. l %r2,INITRD_START-PARMAREA(%r12) # use ramdisk location as temp
  256. bas %r14,.Lloader # load parameter file
  257. ltr %r2,%r2 # got anything ?
  258. bz .Lnopf
  259. chi %r2,895
  260. bnh .Lnotrunc
  261. la %r2,895
  262. .Lnotrunc:
  263. l %r4,INITRD_START-PARMAREA(%r12)
  264. clc 0(3,%r4),.L_hdr # if it is HDRx
  265. bz .Lagain1 # skip dataset header
  266. clc 0(3,%r4),.L_eof # if it is EOFx
  267. bz .Lagain1 # skip dateset trailer
  268. la %r5,0(%r4,%r2)
  269. lr %r3,%r2
  270. .Lidebc:
  271. tm 0(%r5),0x80 # high order bit set ?
  272. bo .Ldocv # yes -> convert from EBCDIC
  273. ahi %r5,-1
  274. bct %r3,.Lidebc
  275. b .Lnocv
  276. .Ldocv:
  277. l %r3,.Lcvtab
  278. tr 0(256,%r4),0(%r3) # convert parameters to ascii
  279. tr 256(256,%r4),0(%r3)
  280. tr 512(256,%r4),0(%r3)
  281. tr 768(122,%r4),0(%r3)
  282. .Lnocv: la %r3,COMMAND_LINE-PARMAREA(%r12) # load adr. of command line
  283. mvc 0(256,%r3),0(%r4)
  284. mvc 256(256,%r3),256(%r4)
  285. mvc 512(256,%r3),512(%r4)
  286. mvc 768(122,%r3),768(%r4)
  287. slr %r0,%r0
  288. b .Lcntlp
  289. .Ldelspc:
  290. ic %r0,0(%r2,%r3)
  291. chi %r0,0x20 # is it a space ?
  292. be .Lcntlp
  293. ahi %r2,1
  294. b .Leolp
  295. .Lcntlp:
  296. brct %r2,.Ldelspc
  297. .Leolp:
  298. slr %r0,%r0
  299. stc %r0,0(%r2,%r3) # terminate buffer
  300. .Lnopf:
  301. #
  302. # load ramdisk from ipl device
  303. #
  304. .Lagain2:
  305. l %r2,INITRD_START-PARMAREA(%r12) # load adr. of ramdisk
  306. bas %r14,.Lloader # load ramdisk
  307. st %r2,INITRD_SIZE-PARMAREA(%r12) # store size of ramdisk
  308. ltr %r2,%r2
  309. bnz .Lrdcont
  310. st %r2,INITRD_START-PARMAREA(%r12) # no ramdisk found, null it
  311. .Lrdcont:
  312. l %r2,INITRD_START-PARMAREA(%r12)
  313. clc 0(3,%r2),.L_hdr # skip HDRx and EOFx
  314. bz .Lagain2
  315. clc 0(3,%r2),.L_eof
  316. bz .Lagain2
  317. #ifdef CONFIG_IPL_VM
  318. #
  319. # reset files in VM reader
  320. #
  321. stidp __LC_CPUID # store cpuid
  322. tm __LC_CPUID,0xff # running VM ?
  323. bno .Lnoreset
  324. la %r2,.Lreset
  325. lhi %r3,26
  326. diag %r2,%r3,8
  327. la %r5,.Lirb
  328. stsch 0(%r5) # check if irq is pending
  329. tm 30(%r5),0x0f # by verifying if any of the
  330. bnz .Lwaitforirq # activity or status control
  331. tm 31(%r5),0xff # bits is set in the schib
  332. bz .Lnoreset
  333. .Lwaitforirq:
  334. mvc 0x78(8),.Lrdrnewpsw # set up IO interrupt psw
  335. .Lwaitrdrirq:
  336. lpsw .Lrdrwaitpsw
  337. .Lrdrint:
  338. c %r1,0xb8 # compare subchannel number
  339. bne .Lwaitrdrirq
  340. la %r5,.Lirb
  341. tsch 0(%r5)
  342. .Lnoreset:
  343. b .Lnoload
  344. .align 8
  345. .Lrdrnewpsw:
  346. .long 0x00080000,0x80000000+.Lrdrint
  347. .Lrdrwaitpsw:
  348. .long 0x020a0000,0x80000000+.Lrdrint
  349. #endif
  350. #
  351. # everything loaded, go for it
  352. #
  353. .Lnoload:
  354. l %r1,.Lstartup
  355. br %r1
  356. .Lparm: .long PARMAREA
  357. .Lstartup: .long startup
  358. .Lcvtab:.long _ebcasc # ebcdic to ascii table
  359. .Lreset:.byte 0xc3,0xc8,0xc1,0xd5,0xc7,0xc5,0x40,0xd9,0xc4,0xd9,0x40
  360. .byte 0xc1,0xd3,0xd3,0x40,0xd2,0xc5,0xc5,0xd7,0x40,0xd5,0xd6
  361. .byte 0xc8,0xd6,0xd3,0xc4 # "change rdr all keep nohold"
  362. .L_eof: .long 0xc5d6c600 /* C'EOF' */
  363. .L_hdr: .long 0xc8c4d900 /* C'HDR' */
  364. #endif /* CONFIG_IPL */
  365. #
  366. # SALIPL loader support. Based on a patch by Rob van der Heij.
  367. # This entry point is called directly from the SALIPL loader and
  368. # doesn't need a builtin ipl record.
  369. #
  370. .org 0x800
  371. .globl start
  372. start:
  373. stm %r0,%r15,0x07b0 # store registers
  374. basr %r12,%r0
  375. .base:
  376. l %r11,.parm
  377. l %r8,.cmd # pointer to command buffer
  378. ltr %r9,%r9 # do we have SALIPL parameters?
  379. bp .sk8x8
  380. mvc 0(64,%r8),0x00b0 # copy saved registers
  381. xc 64(240-64,%r8),0(%r8) # remainder of buffer
  382. tr 0(64,%r8),.lowcase
  383. b .gotr
  384. .sk8x8:
  385. mvc 0(240,%r8),0(%r9) # copy iplparms into buffer
  386. .gotr:
  387. l %r10,.tbl # EBCDIC to ASCII table
  388. tr 0(240,%r8),0(%r10)
  389. stidp __LC_CPUID # Are we running on VM maybe
  390. cli __LC_CPUID,0xff
  391. bnz .test
  392. .long 0x83300060 # diag 3,0,x'0060' - storage size
  393. b .done
  394. .test:
  395. mvc 0x68(8),.pgmnw # set up pgm check handler
  396. l %r2,.fourmeg
  397. lr %r3,%r2
  398. bctr %r3,%r0 # 4M-1
  399. .loop: iske %r0,%r3
  400. ar %r3,%r2
  401. .pgmx:
  402. sr %r3,%r2
  403. la %r3,1(%r3)
  404. .done:
  405. l %r1,.memsize
  406. st %r3,0(%r1)
  407. slr %r0,%r0
  408. st %r0,INITRD_SIZE-PARMAREA(%r11)
  409. st %r0,INITRD_START-PARMAREA(%r11)
  410. j startup # continue with startup
  411. .tbl: .long _ebcasc # translate table
  412. .cmd: .long COMMAND_LINE # address of command line buffer
  413. .parm: .long PARMAREA
  414. .memsize: .long memory_size
  415. .fourmeg: .long 0x00400000 # 4M
  416. .pgmnw: .long 0x00080000,.pgmx
  417. .lowcase:
  418. .byte 0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07
  419. .byte 0x08,0x09,0x0a,0x0b,0x0c,0x0d,0x0e,0x0f
  420. .byte 0x10,0x11,0x12,0x13,0x14,0x15,0x16,0x17
  421. .byte 0x18,0x19,0x1a,0x1b,0x1c,0x1d,0x1e,0x1f
  422. .byte 0x20,0x21,0x22,0x23,0x24,0x25,0x26,0x27
  423. .byte 0x28,0x29,0x2a,0x2b,0x2c,0x2d,0x2e,0x2f
  424. .byte 0x30,0x31,0x32,0x33,0x34,0x35,0x36,0x37
  425. .byte 0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f
  426. .byte 0x40,0x41,0x42,0x43,0x44,0x45,0x46,0x47
  427. .byte 0x48,0x49,0x4a,0x4b,0x4c,0x4d,0x4e,0x4f
  428. .byte 0x50,0x51,0x52,0x53,0x54,0x55,0x56,0x57
  429. .byte 0x58,0x59,0x5a,0x5b,0x5c,0x5d,0x5e,0x5f
  430. .byte 0x60,0x61,0x62,0x63,0x64,0x65,0x66,0x67
  431. .byte 0x68,0x69,0x6a,0x6b,0x6c,0x6d,0x6e,0x6f
  432. .byte 0x70,0x71,0x72,0x73,0x74,0x75,0x76,0x77
  433. .byte 0x78,0x79,0x7a,0x7b,0x7c,0x7d,0x7e,0x7f
  434. .byte 0x80,0x81,0x82,0x83,0x84,0x85,0x86,0x87
  435. .byte 0x88,0x89,0x8a,0x8b,0x8c,0x8d,0x8e,0x8f
  436. .byte 0x90,0x91,0x92,0x93,0x94,0x95,0x96,0x97
  437. .byte 0x98,0x99,0x9a,0x9b,0x9c,0x9d,0x9e,0x9f
  438. .byte 0xa0,0xa1,0xa2,0xa3,0xa4,0xa5,0xa6,0xa7
  439. .byte 0xa8,0xa9,0xaa,0xab,0xac,0xad,0xae,0xaf
  440. .byte 0xb0,0xb1,0xb2,0xb3,0xb4,0xb5,0xb6,0xb7
  441. .byte 0xb8,0xb9,0xba,0xbb,0xbc,0xbd,0xbe,0xbf
  442. .byte 0xc0,0x81,0x82,0x83,0x84,0x85,0x86,0x87 # .abcdefg
  443. .byte 0x88,0x89,0xca,0xcb,0xcc,0xcd,0xce,0xcf # hi
  444. .byte 0xd0,0x91,0x92,0x93,0x94,0x95,0x96,0x97 # .jklmnop
  445. .byte 0x98,0x99,0xda,0xdb,0xdc,0xdd,0xde,0xdf # qr
  446. .byte 0xe0,0xe1,0xa2,0xa3,0xa4,0xa5,0xa6,0xa7 # ..stuvwx
  447. .byte 0xa8,0xa9,0xea,0xeb,0xec,0xed,0xee,0xef # yz
  448. .byte 0xf0,0xf1,0xf2,0xf3,0xf4,0xf5,0xf6,0xf7
  449. .byte 0xf8,0xf9,0xfa,0xfb,0xfc,0xfd,0xfe,0xff
  450. #
  451. # startup-code at 0x10000, running in real mode
  452. # this is called either by the ipl loader or directly by PSW restart
  453. # or linload or SALIPL
  454. #
  455. .org 0x10000
  456. startup:basr %r13,0 # get base
  457. .LPG1: l %r1, .Lget_ipl_device_addr-.LPG1(%r13)
  458. basr %r14, %r1
  459. lctl %c0,%c15,.Lctl-.LPG1(%r13) # load control registers
  460. la %r12,_pstart-.LPG1(%r13) # pointer to parameter area
  461. # move IPL device to lowcore
  462. mvc __LC_IPLDEV(4),IPL_DEVICE-PARMAREA(%r12)
  463. #
  464. # clear bss memory
  465. #
  466. l %r2,.Lbss_bgn-.LPG1(%r13) # start of bss
  467. l %r3,.Lbss_end-.LPG1(%r13) # end of bss
  468. sr %r3,%r2 # length of bss
  469. sr %r4,%r4 #
  470. sr %r5,%r5 # set src,length and pad to zero
  471. sr %r0,%r0 #
  472. mvcle %r2,%r4,0 # clear mem
  473. jo .-4 # branch back, if not finish
  474. l %r2,.Lrcp-.LPG1(%r13) # Read SCP forced command word
  475. .Lservicecall:
  476. stosm .Lpmask-.LPG1(%r13),0x01 # authorize ext interrupts
  477. stctl %r0, %r0,.Lcr-.LPG1(%r13) # get cr0
  478. la %r1,0x200 # set bit 22
  479. o %r1,.Lcr-.LPG1(%r13) # or old cr0 with r1
  480. st %r1,.Lcr-.LPG1(%r13)
  481. lctl %r0, %r0,.Lcr-.LPG1(%r13) # load modified cr0
  482. mvc __LC_EXT_NEW_PSW(8),.Lpcext-.LPG1(%r13) # set postcall psw
  483. la %r1, .Lsclph-.LPG1(%r13)
  484. a %r1,__LC_EXT_NEW_PSW+4 # set handler
  485. st %r1,__LC_EXT_NEW_PSW+4
  486. la %r4,_pstart-.LPG1(%r13) # %r4 is our index for sccb stuff
  487. la %r1, .Lsccb-PARMAREA(%r4) # our sccb
  488. .insn rre,0xb2200000,%r2,%r1 # service call
  489. ipm %r1
  490. srl %r1,28 # get cc code
  491. xr %r3, %r3
  492. chi %r1,3
  493. be .Lfchunk-.LPG1(%r13) # leave
  494. chi %r1,2
  495. be .Lservicecall-.LPG1(%r13)
  496. lpsw .Lwaitsclp-.LPG1(%r13)
  497. .Lsclph:
  498. lh %r1,.Lsccbr-PARMAREA(%r4)
  499. chi %r1,0x10 # 0x0010 is the sucess code
  500. je .Lprocsccb # let's process the sccb
  501. chi %r1,0x1f0
  502. bne .Lfchunk-.LPG1(%r13) # unhandled error code
  503. c %r2, .Lrcp-.LPG1(%r13) # Did we try Read SCP forced
  504. bne .Lfchunk-.LPG1(%r13) # if no, give up
  505. l %r2, .Lrcp2-.LPG1(%r13) # try with Read SCP
  506. b .Lservicecall-.LPG1(%r13)
  507. .Lprocsccb:
  508. lhi %r1,0
  509. icm %r1,3,.Lscpincr1-PARMAREA(%r4) # use this one if != 0
  510. jnz .Lscnd
  511. lhi %r1,0x800 # otherwise report 2GB
  512. .Lscnd:
  513. lhi %r3,0x800 # limit reported memory size to 2GB
  514. cr %r1,%r3
  515. jl .Lno2gb
  516. lr %r1,%r3
  517. .Lno2gb:
  518. xr %r3,%r3 # same logic
  519. ic %r3,.Lscpa1-PARMAREA(%r4)
  520. chi %r3,0x00
  521. jne .Lcompmem
  522. l %r3,.Lscpa2-PARMAREA(%r13)
  523. .Lcompmem:
  524. mr %r2,%r1 # mem in MB on 128-bit
  525. l %r1,.Lonemb-.LPG1(%r13)
  526. mr %r2,%r1 # mem size in bytes in %r3
  527. b .Lfchunk-.LPG1(%r13)
  528. .align 4
  529. .Lget_ipl_device_addr:
  530. .long .Lget_ipl_device
  531. .Lpmask:
  532. .byte 0
  533. .align 8
  534. .Lpcext:.long 0x00080000,0x80000000
  535. .Lcr:
  536. .long 0x00 # place holder for cr0
  537. .Lwaitsclp:
  538. .long 0x010a0000,0x80000000 + .Lsclph
  539. .Lrcp:
  540. .int 0x00120001 # Read SCP forced code
  541. .Lrcp2:
  542. .int 0x00020001 # Read SCP code
  543. .Lonemb:
  544. .int 0x100000
  545. .Lfchunk:
  546. #
  547. # find memory chunks.
  548. #
  549. lr %r9,%r3 # end of mem
  550. mvc __LC_PGM_NEW_PSW(8),.Lpcmem-.LPG1(%r13)
  551. la %r1,1 # test in increments of 128KB
  552. sll %r1,17
  553. l %r3,.Lmchunk-.LPG1(%r13) # get pointer to memory_chunk array
  554. slr %r4,%r4 # set start of chunk to zero
  555. slr %r5,%r5 # set end of chunk to zero
  556. slr %r6,%r6 # set access code to zero
  557. la %r10, MEMORY_CHUNKS # number of chunks
  558. .Lloop:
  559. tprot 0(%r5),0 # test protection of first byte
  560. ipm %r7
  561. srl %r7,28
  562. clr %r6,%r7 # compare cc with last access code
  563. be .Lsame-.LPG1(%r13)
  564. b .Lchkmem-.LPG1(%r13)
  565. .Lsame:
  566. ar %r5,%r1 # add 128KB to end of chunk
  567. bno .Lloop-.LPG1(%r13) # r1 < 0x80000000 -> loop
  568. .Lchkmem: # > 2GB or tprot got a program check
  569. clr %r4,%r5 # chunk size > 0?
  570. be .Lchkloop-.LPG1(%r13)
  571. st %r4,0(%r3) # store start address of chunk
  572. lr %r0,%r5
  573. slr %r0,%r4
  574. st %r0,4(%r3) # store size of chunk
  575. st %r6,8(%r3) # store type of chunk
  576. la %r3,12(%r3)
  577. l %r4,.Lmemsize-.LPG1(%r13) # address of variable memory_size
  578. st %r5,0(%r4) # store last end to memory size
  579. ahi %r10,-1 # update chunk number
  580. .Lchkloop:
  581. lr %r6,%r7 # set access code to last cc
  582. # we got an exception or we're starting a new
  583. # chunk , we must check if we should
  584. # still try to find valid memory (if we detected
  585. # the amount of available storage), and if we
  586. # have chunks left
  587. xr %r0,%r0
  588. clr %r0,%r9 # did we detect memory?
  589. je .Ldonemem # if not, leave
  590. chi %r10,0 # do we have chunks left?
  591. je .Ldonemem
  592. alr %r5,%r1 # add 128KB to end of chunk
  593. lr %r4,%r5 # potential new chunk
  594. clr %r5,%r9 # should we go on?
  595. jl .Lloop
  596. .Ldonemem:
  597. l %r12,.Lmflags-.LPG1(%r13) # get address of machine_flags
  598. #
  599. # find out if we are running under VM
  600. #
  601. stidp __LC_CPUID # store cpuid
  602. tm __LC_CPUID,0xff # running under VM ?
  603. bno .Lnovm-.LPG1(%r13)
  604. oi 3(%r12),1 # set VM flag
  605. .Lnovm:
  606. lh %r0,__LC_CPUID+4 # get cpu version
  607. chi %r0,0x7490 # running on a P/390 ?
  608. bne .Lnop390-.LPG1(%r13)
  609. oi 3(%r12),4 # set P/390 flag
  610. .Lnop390:
  611. #
  612. # find out if we have an IEEE fpu
  613. #
  614. mvc __LC_PGM_NEW_PSW(8),.Lpcfpu-.LPG1(%r13)
  615. efpc %r0,0 # test IEEE extract fpc instruction
  616. oi 3(%r12),2 # set IEEE fpu flag
  617. .Lchkfpu:
  618. #
  619. # find out if we have the CSP instruction
  620. #
  621. mvc __LC_PGM_NEW_PSW(8),.Lpccsp-.LPG1(%r13)
  622. la %r0,0
  623. lr %r1,%r0
  624. la %r2,4
  625. csp %r0,%r2 # Test CSP instruction
  626. oi 3(%r12),8 # set CSP flag
  627. .Lchkcsp:
  628. #
  629. # find out if we have the MVPG instruction
  630. #
  631. mvc __LC_PGM_NEW_PSW(8),.Lpcmvpg-.LPG1(%r13)
  632. sr %r0,%r0
  633. la %r1,0
  634. la %r2,0
  635. mvpg %r1,%r2 # Test CSP instruction
  636. oi 3(%r12),16 # set MVPG flag
  637. .Lchkmvpg:
  638. #
  639. # find out if we have the IDTE instruction
  640. #
  641. mvc __LC_PGM_NEW_PSW(8),.Lpcidte-.LPG1(%r13)
  642. .long 0xb2b10000 # store facility list
  643. tm 0xc8,0x08 # check bit for clearing-by-ASCE
  644. bno .Lchkidte-.LPG1(%r13)
  645. lhi %r1,2094
  646. lhi %r2,0
  647. .long 0xb98e2001
  648. oi 3(%r12),0x80 # set IDTE flag
  649. .Lchkidte:
  650. lpsw .Lentry-.LPG1(13) # jump to _stext in primary-space,
  651. # virtual and never return ...
  652. .align 8
  653. .Lentry:.long 0x00080000,0x80000000 + _stext
  654. .Lctl: .long 0x04b50002 # cr0: various things
  655. .long 0 # cr1: primary space segment table
  656. .long .Lduct # cr2: dispatchable unit control table
  657. .long 0 # cr3: instruction authorization
  658. .long 0 # cr4: instruction authorization
  659. .long 0xffffffff # cr5: primary-aste origin
  660. .long 0 # cr6: I/O interrupts
  661. .long 0 # cr7: secondary space segment table
  662. .long 0 # cr8: access registers translation
  663. .long 0 # cr9: tracing off
  664. .long 0 # cr10: tracing off
  665. .long 0 # cr11: tracing off
  666. .long 0 # cr12: tracing off
  667. .long 0 # cr13: home space segment table
  668. .long 0xc0000000 # cr14: machine check handling off
  669. .long 0 # cr15: linkage stack operations
  670. .Lpcmem:.long 0x00080000,0x80000000 + .Lchkmem
  671. .Lpcfpu:.long 0x00080000,0x80000000 + .Lchkfpu
  672. .Lpccsp:.long 0x00080000,0x80000000 + .Lchkcsp
  673. .Lpcmvpg:.long 0x00080000,0x80000000 + .Lchkmvpg
  674. .Lpcidte:.long 0x00080000,0x80000000 + .Lchkidte
  675. .Lmemsize:.long memory_size
  676. .Lmchunk:.long memory_chunk
  677. .Lmflags:.long machine_flags
  678. .Lbss_bgn: .long __bss_start
  679. .Lbss_end: .long _end
  680. .org PARMAREA-64
  681. .Lduct: .long 0,0,0,0,0,0,0,0
  682. .long 0,0,0,0,0,0,0,0
  683. #
  684. # params at 10400 (setup.h)
  685. #
  686. .org PARMAREA
  687. .global _pstart
  688. _pstart:
  689. .long 0,0 # IPL_DEVICE
  690. .long 0,RAMDISK_ORIGIN # INITRD_START
  691. .long 0,RAMDISK_SIZE # INITRD_SIZE
  692. .org COMMAND_LINE
  693. .byte "root=/dev/ram0 ro"
  694. .byte 0
  695. .org 0x11000
  696. .Lsccb:
  697. .hword 0x1000 # length, one page
  698. .byte 0x00,0x00,0x00
  699. .byte 0x80 # variable response bit set
  700. .Lsccbr:
  701. .hword 0x00 # response code
  702. .Lscpincr1:
  703. .hword 0x00
  704. .Lscpa1:
  705. .byte 0x00
  706. .fill 89,1,0
  707. .Lscpa2:
  708. .int 0x00
  709. .Lscpincr2:
  710. .quad 0x00
  711. .fill 3984,1,0
  712. .org 0x12000
  713. .global _pend
  714. _pend:
  715. .Lget_ipl_device:
  716. basr %r12,0
  717. .LPG2: l %r1,0xb8 # get sid
  718. sll %r1,15 # test if subchannel is enabled
  719. srl %r1,31
  720. ltr %r1,%r1
  721. bz 0(%r14) # subchannel disabled
  722. l %r1,0xb8
  723. la %r5,.Lipl_schib-.LPG2(%r12)
  724. stsch 0(%r5) # get schib of subchannel
  725. bnz 0(%r14) # schib not available
  726. tm 5(%r5),0x01 # devno valid?
  727. bno 0(%r14)
  728. la %r6,ipl_parameter_flags-.LPG2(%r12)
  729. oi 3(%r6),0x01 # set flag
  730. la %r2,ipl_devno-.LPG2(%r12)
  731. mvc 0(2,%r2),6(%r5) # store devno
  732. tm 4(%r5),0x80 # qdio capable device?
  733. bno 0(%r14)
  734. oi 3(%r6),0x02 # set flag
  735. # copy ipl parameters
  736. lhi %r0,4096
  737. l %r2,20(%r0) # get address of parameter list
  738. lhi %r3,IPL_PARMBLOCK_ORIGIN
  739. st %r3,20(%r0)
  740. lhi %r4,1
  741. cr %r2,%r3 # start parameters < destination ?
  742. jl 0f
  743. lhi %r1,1 # copy direction is upwards
  744. j 1f
  745. 0: lhi %r1,-1 # copy direction is downwards
  746. ar %r2,%r0
  747. ar %r3,%r0
  748. ar %r2,%r1
  749. ar %r3,%r1
  750. 1: mvc 0(1,%r3),0(%r2) # finally copy ipl parameters
  751. ar %r3,%r1
  752. ar %r2,%r1
  753. sr %r0,%r4
  754. jne 1b
  755. b 0(%r14)
  756. .align 4
  757. .Lipl_schib:
  758. .rept 13
  759. .long 0
  760. .endr
  761. .globl ipl_parameter_flags
  762. ipl_parameter_flags:
  763. .long 0
  764. .globl ipl_devno
  765. ipl_devno:
  766. .word 0
  767. #ifdef CONFIG_SHARED_KERNEL
  768. .org 0x100000
  769. #endif
  770. #
  771. # startup-code, running in virtual mode
  772. #
  773. .globl _stext
  774. _stext: basr %r13,0 # get base
  775. .LPG3:
  776. #
  777. # Setup stack
  778. #
  779. l %r15,.Linittu-.LPG3(%r13)
  780. mvc __LC_CURRENT(4),__TI_task(%r15)
  781. ahi %r15,1<<(PAGE_SHIFT+THREAD_ORDER) # init_task_union + THREAD_SIZE
  782. st %r15,__LC_KERNEL_STACK # set end of kernel stack
  783. ahi %r15,-96
  784. xc __SF_BACKCHAIN(4,%r15),__SF_BACKCHAIN(%r15) # clear backchain
  785. # check control registers
  786. stctl %c0,%c15,0(%r15)
  787. oi 2(%r15),0x40 # enable sigp emergency signal
  788. oi 0(%r15),0x10 # switch on low address protection
  789. lctl %c0,%c15,0(%r15)
  790. #
  791. lam 0,15,.Laregs-.LPG3(%r13) # load access regs needed by uaccess
  792. l %r14,.Lstart-.LPG3(%r13)
  793. basr %r14,%r14 # call start_kernel
  794. #
  795. # We returned from start_kernel ?!? PANIK
  796. #
  797. basr %r13,0
  798. lpsw .Ldw-.(%r13) # load disabled wait psw
  799. #
  800. .align 8
  801. .Ldw: .long 0x000a0000,0x00000000
  802. .Linittu: .long init_thread_union
  803. .Lstart: .long start_kernel
  804. .Laregs: .long 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0