am335x-evm.dts 12 KB

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  1. /*
  2. * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
  3. *
  4. * This program is free software; you can redistribute it and/or modify
  5. * it under the terms of the GNU General Public License version 2 as
  6. * published by the Free Software Foundation.
  7. */
  8. /dts-v1/;
  9. #include "am33xx.dtsi"
  10. / {
  11. model = "TI AM335x EVM";
  12. compatible = "ti,am335x-evm", "ti,am33xx";
  13. cpus {
  14. cpu@0 {
  15. cpu0-supply = <&vdd1_reg>;
  16. };
  17. };
  18. memory {
  19. device_type = "memory";
  20. reg = <0x80000000 0x10000000>; /* 256 MB */
  21. };
  22. am33xx_pinmux: pinmux@44e10800 {
  23. pinctrl-names = "default";
  24. pinctrl-0 = <&matrix_keypad_s0 &volume_keys_s0 &clkout2_pin>;
  25. matrix_keypad_s0: matrix_keypad_s0 {
  26. pinctrl-single,pins = <
  27. 0x54 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a5.gpio1_21 */
  28. 0x58 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a6.gpio1_22 */
  29. 0x64 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_a9.gpio1_25 */
  30. 0x68 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_a10.gpio1_26 */
  31. 0x6c (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_a11.gpio1_27 */
  32. >;
  33. };
  34. volume_keys_s0: volume_keys_s0 {
  35. pinctrl-single,pins = <
  36. 0x150 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* spi0_sclk.gpio0_2 */
  37. 0x154 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* spi0_d0.gpio0_3 */
  38. >;
  39. };
  40. i2c0_pins: pinmux_i2c0_pins {
  41. pinctrl-single,pins = <
  42. 0x188 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_sda.i2c0_sda */
  43. 0x18c (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_scl.i2c0_scl */
  44. >;
  45. };
  46. i2c1_pins: pinmux_i2c1_pins {
  47. pinctrl-single,pins = <
  48. 0x158 (PIN_INPUT_PULLUP | MUX_MODE2) /* spi0_d1.i2c1_sda */
  49. 0x15c (PIN_INPUT_PULLUP | MUX_MODE2) /* spi0_cs0.i2c1_scl */
  50. >;
  51. };
  52. uart0_pins: pinmux_uart0_pins {
  53. pinctrl-single,pins = <
  54. 0x170 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */
  55. 0x174 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */
  56. >;
  57. };
  58. clkout2_pin: pinmux_clkout2_pin {
  59. pinctrl-single,pins = <
  60. 0x1b4 (PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* xdma_event_intr1.clkout2 */
  61. >;
  62. };
  63. nandflash_pins_s0: nandflash_pins_s0 {
  64. pinctrl-single,pins = <
  65. 0x0 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad0.gpmc_ad0 */
  66. 0x4 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad1.gpmc_ad1 */
  67. 0x8 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad2.gpmc_ad2 */
  68. 0xc (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad3.gpmc_ad3 */
  69. 0x10 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad4.gpmc_ad4 */
  70. 0x14 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad5.gpmc_ad5 */
  71. 0x18 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad6.gpmc_ad6 */
  72. 0x1c (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad7.gpmc_ad7 */
  73. 0x70 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_wait0.gpmc_wait0 */
  74. 0x74 (PIN_INPUT_PULLUP | MUX_MODE7) /* gpmc_wpn.gpio0_30 */
  75. 0x7c (PIN_OUTPUT | MUX_MODE0) /* gpmc_csn0.gpmc_csn0 */
  76. 0x90 (PIN_OUTPUT | MUX_MODE0) /* gpmc_advn_ale.gpmc_advn_ale */
  77. 0x94 (PIN_OUTPUT | MUX_MODE0) /* gpmc_oen_ren.gpmc_oen_ren */
  78. 0x98 (PIN_OUTPUT | MUX_MODE0) /* gpmc_wen.gpmc_wen */
  79. 0x9c (PIN_OUTPUT | MUX_MODE0) /* gpmc_be0n_cle.gpmc_be0n_cle */
  80. >;
  81. };
  82. ecap0_pins: backlight_pins {
  83. pinctrl-single,pins = <
  84. 0x164 0x0 /* eCAP0_in_PWM0_out.eCAP0_in_PWM0_out MODE0 */
  85. >;
  86. };
  87. cpsw_default: cpsw_default {
  88. pinctrl-single,pins = <
  89. /* Slave 1 */
  90. 0x114 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txen.rgmii1_tctl */
  91. 0x118 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxdv.rgmii1_rctl */
  92. 0x11c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd3.rgmii1_td3 */
  93. 0x120 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd2.rgmii1_td2 */
  94. 0x124 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd1.rgmii1_td1 */
  95. 0x128 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd0.rgmii1_td0 */
  96. 0x12c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txclk.rgmii1_tclk */
  97. 0x130 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxclk.rgmii1_rclk */
  98. 0x134 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd3.rgmii1_rd3 */
  99. 0x138 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd2.rgmii1_rd2 */
  100. 0x13c (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd1.rgmii1_rd1 */
  101. 0x140 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd0.rgmii1_rd0 */
  102. >;
  103. };
  104. cpsw_sleep: cpsw_sleep {
  105. pinctrl-single,pins = <
  106. /* Slave 1 reset value */
  107. 0x114 (PIN_INPUT_PULLDOWN | MUX_MODE7)
  108. 0x118 (PIN_INPUT_PULLDOWN | MUX_MODE7)
  109. 0x11c (PIN_INPUT_PULLDOWN | MUX_MODE7)
  110. 0x120 (PIN_INPUT_PULLDOWN | MUX_MODE7)
  111. 0x124 (PIN_INPUT_PULLDOWN | MUX_MODE7)
  112. 0x128 (PIN_INPUT_PULLDOWN | MUX_MODE7)
  113. 0x12c (PIN_INPUT_PULLDOWN | MUX_MODE7)
  114. 0x130 (PIN_INPUT_PULLDOWN | MUX_MODE7)
  115. 0x134 (PIN_INPUT_PULLDOWN | MUX_MODE7)
  116. 0x138 (PIN_INPUT_PULLDOWN | MUX_MODE7)
  117. 0x13c (PIN_INPUT_PULLDOWN | MUX_MODE7)
  118. 0x140 (PIN_INPUT_PULLDOWN | MUX_MODE7)
  119. >;
  120. };
  121. davinci_mdio_default: davinci_mdio_default {
  122. pinctrl-single,pins = <
  123. /* MDIO */
  124. 0x148 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */
  125. 0x14c (PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */
  126. >;
  127. };
  128. davinci_mdio_sleep: davinci_mdio_sleep {
  129. pinctrl-single,pins = <
  130. /* MDIO reset value */
  131. 0x148 (PIN_INPUT_PULLDOWN | MUX_MODE7)
  132. 0x14c (PIN_INPUT_PULLDOWN | MUX_MODE7)
  133. >;
  134. };
  135. };
  136. ocp {
  137. uart0: serial@44e09000 {
  138. pinctrl-names = "default";
  139. pinctrl-0 = <&uart0_pins>;
  140. status = "okay";
  141. };
  142. i2c0: i2c@44e0b000 {
  143. pinctrl-names = "default";
  144. pinctrl-0 = <&i2c0_pins>;
  145. status = "okay";
  146. clock-frequency = <400000>;
  147. tps: tps@2d {
  148. reg = <0x2d>;
  149. };
  150. };
  151. musb: usb@47400000 {
  152. status = "okay";
  153. control@44e10000 {
  154. status = "okay";
  155. };
  156. phy@47401300 {
  157. status = "okay";
  158. };
  159. phy@47401b00 {
  160. status = "okay";
  161. };
  162. usb@47401000 {
  163. status = "okay";
  164. };
  165. usb@47401800 {
  166. status = "okay";
  167. };
  168. dma@07402000 {
  169. status = "okay";
  170. };
  171. };
  172. i2c1: i2c@4802a000 {
  173. pinctrl-names = "default";
  174. pinctrl-0 = <&i2c1_pins>;
  175. status = "okay";
  176. clock-frequency = <100000>;
  177. lis331dlh: lis331dlh@18 {
  178. compatible = "st,lis331dlh", "st,lis3lv02d";
  179. reg = <0x18>;
  180. Vdd-supply = <&lis3_reg>;
  181. Vdd_IO-supply = <&lis3_reg>;
  182. st,click-single-x;
  183. st,click-single-y;
  184. st,click-single-z;
  185. st,click-thresh-x = <10>;
  186. st,click-thresh-y = <10>;
  187. st,click-thresh-z = <10>;
  188. st,irq1-click;
  189. st,irq2-click;
  190. st,wakeup-x-lo;
  191. st,wakeup-x-hi;
  192. st,wakeup-y-lo;
  193. st,wakeup-y-hi;
  194. st,wakeup-z-lo;
  195. st,wakeup-z-hi;
  196. st,min-limit-x = <120>;
  197. st,min-limit-y = <120>;
  198. st,min-limit-z = <140>;
  199. st,max-limit-x = <550>;
  200. st,max-limit-y = <550>;
  201. st,max-limit-z = <750>;
  202. };
  203. tsl2550: tsl2550@39 {
  204. compatible = "taos,tsl2550";
  205. reg = <0x39>;
  206. };
  207. tmp275: tmp275@48 {
  208. compatible = "ti,tmp275";
  209. reg = <0x48>;
  210. };
  211. };
  212. elm: elm@48080000 {
  213. status = "okay";
  214. };
  215. epwmss0: epwmss@48300000 {
  216. status = "okay";
  217. ecap0: ecap@48300100 {
  218. status = "okay";
  219. pinctrl-names = "default";
  220. pinctrl-0 = <&ecap0_pins>;
  221. };
  222. };
  223. gpmc: gpmc@50000000 {
  224. status = "okay";
  225. pinctrl-names = "default";
  226. pinctrl-0 = <&nandflash_pins_s0>;
  227. ranges = <0 0 0x08000000 0x10000000>; /* CS0: NAND */
  228. nand@0,0 {
  229. reg = <0 0 0>; /* CS0, offset 0 */
  230. nand-bus-width = <8>;
  231. ti,nand-ecc-opt = "bch8";
  232. gpmc,device-nand = "true";
  233. gpmc,device-width = <1>;
  234. gpmc,sync-clk-ps = <0>;
  235. gpmc,cs-on-ns = <0>;
  236. gpmc,cs-rd-off-ns = <44>;
  237. gpmc,cs-wr-off-ns = <44>;
  238. gpmc,adv-on-ns = <6>;
  239. gpmc,adv-rd-off-ns = <34>;
  240. gpmc,adv-wr-off-ns = <44>;
  241. gpmc,we-on-ns = <0>;
  242. gpmc,we-off-ns = <40>;
  243. gpmc,oe-on-ns = <0>;
  244. gpmc,oe-off-ns = <54>;
  245. gpmc,access-ns = <64>;
  246. gpmc,rd-cycle-ns = <82>;
  247. gpmc,wr-cycle-ns = <82>;
  248. gpmc,wait-on-read = "true";
  249. gpmc,wait-on-write = "true";
  250. gpmc,bus-turnaround-ns = <0>;
  251. gpmc,cycle2cycle-delay-ns = <0>;
  252. gpmc,clk-activation-ns = <0>;
  253. gpmc,wait-monitoring-ns = <0>;
  254. gpmc,wr-access-ns = <40>;
  255. gpmc,wr-data-mux-bus-ns = <0>;
  256. #address-cells = <1>;
  257. #size-cells = <1>;
  258. elm_id = <&elm>;
  259. /* MTD partition table */
  260. partition@0 {
  261. label = "SPL1";
  262. reg = <0x00000000 0x000020000>;
  263. };
  264. partition@1 {
  265. label = "SPL2";
  266. reg = <0x00020000 0x00020000>;
  267. };
  268. partition@2 {
  269. label = "SPL3";
  270. reg = <0x00040000 0x00020000>;
  271. };
  272. partition@3 {
  273. label = "SPL4";
  274. reg = <0x00060000 0x00020000>;
  275. };
  276. partition@4 {
  277. label = "U-boot";
  278. reg = <0x00080000 0x001e0000>;
  279. };
  280. partition@5 {
  281. label = "environment";
  282. reg = <0x00260000 0x00020000>;
  283. };
  284. partition@6 {
  285. label = "Kernel";
  286. reg = <0x00280000 0x00500000>;
  287. };
  288. partition@7 {
  289. label = "File-System";
  290. reg = <0x00780000 0x0F880000>;
  291. };
  292. };
  293. };
  294. };
  295. vbat: fixedregulator@0 {
  296. compatible = "regulator-fixed";
  297. regulator-name = "vbat";
  298. regulator-min-microvolt = <5000000>;
  299. regulator-max-microvolt = <5000000>;
  300. regulator-boot-on;
  301. };
  302. lis3_reg: fixedregulator@1 {
  303. compatible = "regulator-fixed";
  304. regulator-name = "lis3_reg";
  305. regulator-boot-on;
  306. };
  307. matrix_keypad: matrix_keypad@0 {
  308. compatible = "gpio-matrix-keypad";
  309. debounce-delay-ms = <5>;
  310. col-scan-delay-us = <2>;
  311. row-gpios = <&gpio1 25 GPIO_ACTIVE_HIGH /* Bank1, pin25 */
  312. &gpio1 26 GPIO_ACTIVE_HIGH /* Bank1, pin26 */
  313. &gpio1 27 GPIO_ACTIVE_HIGH>; /* Bank1, pin27 */
  314. col-gpios = <&gpio1 21 GPIO_ACTIVE_HIGH /* Bank1, pin21 */
  315. &gpio1 22 GPIO_ACTIVE_HIGH>; /* Bank1, pin22 */
  316. linux,keymap = <0x0000008b /* MENU */
  317. 0x0100009e /* BACK */
  318. 0x02000069 /* LEFT */
  319. 0x0001006a /* RIGHT */
  320. 0x0101001c /* ENTER */
  321. 0x0201006c>; /* DOWN */
  322. };
  323. gpio_keys: volume_keys@0 {
  324. compatible = "gpio-keys";
  325. #address-cells = <1>;
  326. #size-cells = <0>;
  327. autorepeat;
  328. switch@9 {
  329. label = "volume-up";
  330. linux,code = <115>;
  331. gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
  332. gpio-key,wakeup;
  333. };
  334. switch@10 {
  335. label = "volume-down";
  336. linux,code = <114>;
  337. gpios = <&gpio0 3 GPIO_ACTIVE_LOW>;
  338. gpio-key,wakeup;
  339. };
  340. };
  341. backlight {
  342. compatible = "pwm-backlight";
  343. pwms = <&ecap0 0 50000 0>;
  344. brightness-levels = <0 51 53 56 62 75 101 152 255>;
  345. default-brightness-level = <8>;
  346. };
  347. };
  348. #include "tps65910.dtsi"
  349. &tps {
  350. vcc1-supply = <&vbat>;
  351. vcc2-supply = <&vbat>;
  352. vcc3-supply = <&vbat>;
  353. vcc4-supply = <&vbat>;
  354. vcc5-supply = <&vbat>;
  355. vcc6-supply = <&vbat>;
  356. vcc7-supply = <&vbat>;
  357. vccio-supply = <&vbat>;
  358. regulators {
  359. vrtc_reg: regulator@0 {
  360. regulator-always-on;
  361. };
  362. vio_reg: regulator@1 {
  363. regulator-always-on;
  364. };
  365. vdd1_reg: regulator@2 {
  366. /* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */
  367. regulator-name = "vdd_mpu";
  368. regulator-min-microvolt = <912500>;
  369. regulator-max-microvolt = <1312500>;
  370. regulator-boot-on;
  371. regulator-always-on;
  372. };
  373. vdd2_reg: regulator@3 {
  374. /* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */
  375. regulator-name = "vdd_core";
  376. regulator-min-microvolt = <912500>;
  377. regulator-max-microvolt = <1150000>;
  378. regulator-boot-on;
  379. regulator-always-on;
  380. };
  381. vdd3_reg: regulator@4 {
  382. regulator-always-on;
  383. };
  384. vdig1_reg: regulator@5 {
  385. regulator-always-on;
  386. };
  387. vdig2_reg: regulator@6 {
  388. regulator-always-on;
  389. };
  390. vpll_reg: regulator@7 {
  391. regulator-always-on;
  392. };
  393. vdac_reg: regulator@8 {
  394. regulator-always-on;
  395. };
  396. vaux1_reg: regulator@9 {
  397. regulator-always-on;
  398. };
  399. vaux2_reg: regulator@10 {
  400. regulator-always-on;
  401. };
  402. vaux33_reg: regulator@11 {
  403. regulator-always-on;
  404. };
  405. vmmc_reg: regulator@12 {
  406. regulator-always-on;
  407. };
  408. };
  409. };
  410. &mac {
  411. pinctrl-names = "default", "sleep";
  412. pinctrl-0 = <&cpsw_default>;
  413. pinctrl-1 = <&cpsw_sleep>;
  414. };
  415. &davinci_mdio {
  416. pinctrl-names = "default", "sleep";
  417. pinctrl-0 = <&davinci_mdio_default>;
  418. pinctrl-1 = <&davinci_mdio_sleep>;
  419. };
  420. &cpsw_emac0 {
  421. phy_id = <&davinci_mdio>, <0>;
  422. phy-mode = "rgmii-txid";
  423. };
  424. &cpsw_emac1 {
  425. phy_id = <&davinci_mdio>, <1>;
  426. phy-mode = "rgmii-txid";
  427. };
  428. &tscadc {
  429. status = "okay";
  430. tsc {
  431. ti,wires = <4>;
  432. ti,x-plate-resistance = <200>;
  433. ti,coordiante-readouts = <5>;
  434. ti,wire-config = <0x00 0x11 0x22 0x33>;
  435. };
  436. adc {
  437. ti,adc-channels = <4 5 6 7>;
  438. };
  439. };