budget-ci.c 35 KB

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  1. /*
  2. * budget-ci.c: driver for the SAA7146 based Budget DVB cards
  3. *
  4. * Compiled from various sources by Michael Hunold <michael@mihu.de>
  5. *
  6. * msp430 IR support contributed by Jack Thomasson <jkt@Helius.COM>
  7. * partially based on the Siemens DVB driver by Ralph+Marcus Metzler
  8. *
  9. * CI interface support (c) 2004 Andrew de Quincey <adq_dvb@lidskialf.net>
  10. *
  11. * This program is free software; you can redistribute it and/or
  12. * modify it under the terms of the GNU General Public License
  13. * as published by the Free Software Foundation; either version 2
  14. * of the License, or (at your option) any later version.
  15. *
  16. *
  17. * This program is distributed in the hope that it will be useful,
  18. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  19. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  20. * GNU General Public License for more details.
  21. *
  22. *
  23. * You should have received a copy of the GNU General Public License
  24. * along with this program; if not, write to the Free Software
  25. * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  26. * Or, point your browser to http://www.gnu.org/copyleft/gpl.html
  27. *
  28. *
  29. * the project's page is at http://www.linuxtv.org/dvb/
  30. */
  31. #include "budget.h"
  32. #include <linux/module.h>
  33. #include <linux/errno.h>
  34. #include <linux/slab.h>
  35. #include <linux/interrupt.h>
  36. #include <linux/input.h>
  37. #include <linux/spinlock.h>
  38. #include <media/ir-common.h>
  39. #include "dvb_ca_en50221.h"
  40. #include "stv0299.h"
  41. #include "stv0297.h"
  42. #include "tda1004x.h"
  43. #include "lnbp21.h"
  44. #include "bsbe1.h"
  45. #include "bsru6.h"
  46. /*
  47. * Regarding DEBIADDR_IR:
  48. * Some CI modules hang if random addresses are read.
  49. * Using address 0x4000 for the IR read means that we
  50. * use the same address as for CI version, which should
  51. * be a safe default.
  52. */
  53. #define DEBIADDR_IR 0x4000
  54. #define DEBIADDR_CICONTROL 0x0000
  55. #define DEBIADDR_CIVERSION 0x4000
  56. #define DEBIADDR_IO 0x1000
  57. #define DEBIADDR_ATTR 0x3000
  58. #define CICONTROL_RESET 0x01
  59. #define CICONTROL_ENABLETS 0x02
  60. #define CICONTROL_CAMDETECT 0x08
  61. #define DEBICICTL 0x00420000
  62. #define DEBICICAM 0x02420000
  63. #define SLOTSTATUS_NONE 1
  64. #define SLOTSTATUS_PRESENT 2
  65. #define SLOTSTATUS_RESET 4
  66. #define SLOTSTATUS_READY 8
  67. #define SLOTSTATUS_OCCUPIED (SLOTSTATUS_PRESENT|SLOTSTATUS_RESET|SLOTSTATUS_READY)
  68. /* Milliseconds during which key presses are regarded as key repeat and during
  69. * which the debounce logic is active
  70. */
  71. #define IR_REPEAT_TIMEOUT 350
  72. /* RC5 device wildcard */
  73. #define IR_DEVICE_ANY 255
  74. /* Some remotes sends multiple sequences per keypress (e.g. Zenith sends two),
  75. * this setting allows the superflous sequences to be ignored
  76. */
  77. static int debounce = 0;
  78. module_param(debounce, int, 0644);
  79. MODULE_PARM_DESC(debounce, "ignore repeated IR sequences (default: 0 = ignore no sequences)");
  80. static int rc5_device = -1;
  81. module_param(rc5_device, int, 0644);
  82. MODULE_PARM_DESC(rc5_device, "only IR commands to given RC5 device (device = 0 - 31, any device = 255, default: autodetect)");
  83. static int ir_debug = 0;
  84. module_param(ir_debug, int, 0644);
  85. MODULE_PARM_DESC(ir_debug, "enable debugging information for IR decoding");
  86. struct budget_ci_ir {
  87. struct input_dev *dev;
  88. struct tasklet_struct msp430_irq_tasklet;
  89. char name[72]; /* 40 + 32 for (struct saa7146_dev).name */
  90. char phys[32];
  91. struct ir_input_state state;
  92. int rc5_device;
  93. };
  94. struct budget_ci {
  95. struct budget budget;
  96. struct tasklet_struct ciintf_irq_tasklet;
  97. int slot_status;
  98. int ci_irq;
  99. struct dvb_ca_en50221 ca;
  100. struct budget_ci_ir ir;
  101. u8 tuner_pll_address; /* used for philips_tdm1316l configs */
  102. };
  103. static void msp430_ir_keyup(unsigned long data)
  104. {
  105. struct budget_ci_ir *ir = (struct budget_ci_ir *) data;
  106. ir_input_nokey(ir->dev, &ir->state);
  107. }
  108. static void msp430_ir_interrupt(unsigned long data)
  109. {
  110. struct budget_ci *budget_ci = (struct budget_ci *) data;
  111. struct input_dev *dev = budget_ci->ir.dev;
  112. static int bounces = 0;
  113. int device;
  114. int toggle;
  115. static int prev_toggle = -1;
  116. static u32 ir_key;
  117. u32 command = ttpci_budget_debiread(&budget_ci->budget, DEBINOSWAP, DEBIADDR_IR, 2, 1, 0) >> 8;
  118. /*
  119. * The msp430 chip can generate two different bytes, command and device
  120. *
  121. * type1: X1CCCCCC, C = command bits (0 - 63)
  122. * type2: X0TDDDDD, D = device bits (0 - 31), T = RC5 toggle bit
  123. *
  124. * More than one command byte may be generated before the device byte
  125. * Only when we have both, a correct keypress is generated
  126. */
  127. /* Is this a RC5 command byte? */
  128. if (command & 0x40) {
  129. if (ir_debug)
  130. printk("budget_ci: received command byte 0x%02x\n", command);
  131. ir_key = command & 0x3f;
  132. return;
  133. }
  134. /* It's a RC5 device byte */
  135. if (ir_debug)
  136. printk("budget_ci: received device byte 0x%02x\n", command);
  137. device = command & 0x1f;
  138. toggle = command & 0x20;
  139. if (budget_ci->ir.rc5_device != IR_DEVICE_ANY && budget_ci->ir.rc5_device != device)
  140. return;
  141. /* Ignore repeated key sequences if requested */
  142. if (toggle == prev_toggle && ir_key == dev->repeat_key &&
  143. bounces > 0 && timer_pending(&dev->timer)) {
  144. if (ir_debug)
  145. printk("budget_ci: debounce logic ignored IR command\n");
  146. bounces--;
  147. return;
  148. }
  149. prev_toggle = toggle;
  150. /* Are we still waiting for a keyup event? */
  151. if (del_timer(&dev->timer))
  152. ir_input_nokey(dev, &budget_ci->ir.state);
  153. /* Generate keypress */
  154. if (ir_debug)
  155. printk("budget_ci: generating keypress 0x%02x\n", ir_key);
  156. ir_input_keydown(dev, &budget_ci->ir.state, ir_key, (ir_key & (command << 8)));
  157. /* Do we want to delay the keyup event? */
  158. if (debounce) {
  159. bounces = debounce;
  160. mod_timer(&dev->timer, jiffies + msecs_to_jiffies(IR_REPEAT_TIMEOUT));
  161. } else {
  162. ir_input_nokey(dev, &budget_ci->ir.state);
  163. }
  164. }
  165. static void msp430_ir_debounce(unsigned long data)
  166. {
  167. struct input_dev *dev = (struct input_dev *) data;
  168. if (dev->rep[0] == 0 || dev->rep[0] == ~0) {
  169. input_event(dev, EV_KEY, key_map[dev->repeat_key], 0);
  170. } else {
  171. dev->rep[0] = 0;
  172. dev->timer.expires = jiffies + HZ * 350 / 1000;
  173. add_timer(&dev->timer);
  174. input_event(dev, EV_KEY, key_map[dev->repeat_key], 2); /* REPEAT */
  175. }
  176. input_sync(dev);
  177. }
  178. static void msp430_ir_interrupt(unsigned long data)
  179. {
  180. struct budget_ci *budget_ci = (struct budget_ci *) data;
  181. struct input_dev *dev = budget_ci->ir.dev;
  182. unsigned int code =
  183. ttpci_budget_debiread(&budget_ci->budget, DEBINOSWAP, DEBIADDR_IR, 2, 1, 0) >> 8;
  184. if (code & 0x40) {
  185. code &= 0x3f;
  186. if (timer_pending(&dev->timer)) {
  187. if (code == dev->repeat_key) {
  188. ++dev->rep[0];
  189. return;
  190. }
  191. del_timer(&dev->timer);
  192. input_event(dev, EV_KEY, key_map[dev->repeat_key], 0);
  193. }
  194. if (!key_map[code]) {
  195. printk("DVB (%s): no key for %02x!\n", __FUNCTION__, code);
  196. return;
  197. }
  198. input_event(dev, EV_KEY, key_map[code], 1);
  199. input_sync(dev);
  200. /* initialize debounce and repeat */
  201. dev->repeat_key = code;
  202. /* Zenith remote _always_ sends 2 sequences */
  203. dev->rep[0] = ~0;
  204. mod_timer(&dev->timer, jiffies + msecs_to_jiffies(350));
  205. }
  206. }
  207. static int msp430_ir_init(struct budget_ci *budget_ci)
  208. {
  209. struct saa7146_dev *saa = budget_ci->budget.dev;
  210. struct input_dev *input_dev = budget_ci->ir.dev;
  211. int error;
  212. budget_ci->ir.dev = input_dev = input_allocate_device();
  213. if (!input_dev) {
  214. printk(KERN_ERR "budget_ci: IR interface initialisation failed\n");
  215. error = -ENOMEM;
  216. goto out1;
  217. }
  218. snprintf(budget_ci->ir.name, sizeof(budget_ci->ir.name),
  219. "Budget-CI dvb ir receiver %s", saa->name);
  220. snprintf(budget_ci->ir.phys, sizeof(budget_ci->ir.phys),
  221. "pci-%s/ir0", pci_name(saa->pci));
  222. input_dev->name = budget_ci->ir.name;
  223. input_dev->phys = budget_ci->ir.phys;
  224. input_dev->id.bustype = BUS_PCI;
  225. input_dev->id.version = 1;
  226. if (saa->pci->subsystem_vendor) {
  227. input_dev->id.vendor = saa->pci->subsystem_vendor;
  228. input_dev->id.product = saa->pci->subsystem_device;
  229. } else {
  230. input_dev->id.vendor = saa->pci->vendor;
  231. input_dev->id.product = saa->pci->device;
  232. }
  233. # if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,15)
  234. input_dev->cdev.dev = &saa->pci->dev;
  235. # else
  236. input_dev->dev = &saa->pci->dev;
  237. # endif
  238. /* Select keymap and address */
  239. switch (budget_ci->budget.dev->pci->subsystem_device) {
  240. case 0x100c:
  241. case 0x100f:
  242. case 0x1010:
  243. case 0x1011:
  244. case 0x1012:
  245. case 0x1017:
  246. /* The hauppauge keymap is a superset of these remotes */
  247. ir_input_init(input_dev, &budget_ci->ir.state,
  248. IR_TYPE_RC5, ir_codes_hauppauge_new);
  249. if (rc5_device < 0)
  250. budget_ci->ir.rc5_device = 0x1f;
  251. else
  252. budget_ci->ir.rc5_device = rc5_device;
  253. break;
  254. default:
  255. /* unknown remote */
  256. ir_input_init(input_dev, &budget_ci->ir.state,
  257. IR_TYPE_RC5, ir_codes_budget_ci_old);
  258. if (rc5_device < 0)
  259. budget_ci->ir.rc5_device = IR_DEVICE_ANY;
  260. else
  261. budget_ci->ir.rc5_device = rc5_device;
  262. break;
  263. }
  264. /* initialise the key-up debounce timeout handler */
  265. input_dev->timer.function = msp430_ir_keyup;
  266. input_dev->timer.data = (unsigned long) &budget_ci->ir;
  267. error = input_register_device(input_dev);
  268. if (error) {
  269. printk(KERN_ERR "budget_ci: could not init driver for IR device (code %d)\n", error);
  270. goto out2;
  271. }
  272. tasklet_init(&budget_ci->ir.msp430_irq_tasklet, msp430_ir_interrupt,
  273. (unsigned long) budget_ci);
  274. saa7146_write(saa, IER, saa7146_read(saa, IER) | MASK_06);
  275. saa7146_setgpio(saa, 3, SAA7146_GPIO_IRQHI);
  276. return 0;
  277. out2:
  278. input_free_device(input_dev);
  279. out1:
  280. return error;
  281. }
  282. static void msp430_ir_deinit(struct budget_ci *budget_ci)
  283. {
  284. struct saa7146_dev *saa = budget_ci->budget.dev;
  285. struct input_dev *dev = budget_ci->ir.dev;
  286. saa7146_write(saa, IER, saa7146_read(saa, IER) & ~MASK_06);
  287. saa7146_setgpio(saa, 3, SAA7146_GPIO_INPUT);
  288. tasklet_kill(&budget_ci->ir.msp430_irq_tasklet);
  289. if (del_timer(&dev->timer)) {
  290. ir_input_nokey(dev, &budget_ci->ir.state);
  291. input_sync(dev);
  292. }
  293. input_unregister_device(dev);
  294. }
  295. static int ciintf_read_attribute_mem(struct dvb_ca_en50221 *ca, int slot, int address)
  296. {
  297. struct budget_ci *budget_ci = (struct budget_ci *) ca->data;
  298. if (slot != 0)
  299. return -EINVAL;
  300. return ttpci_budget_debiread(&budget_ci->budget, DEBICICAM,
  301. DEBIADDR_ATTR | (address & 0xfff), 1, 1, 0);
  302. }
  303. static int ciintf_write_attribute_mem(struct dvb_ca_en50221 *ca, int slot, int address, u8 value)
  304. {
  305. struct budget_ci *budget_ci = (struct budget_ci *) ca->data;
  306. if (slot != 0)
  307. return -EINVAL;
  308. return ttpci_budget_debiwrite(&budget_ci->budget, DEBICICAM,
  309. DEBIADDR_ATTR | (address & 0xfff), 1, value, 1, 0);
  310. }
  311. static int ciintf_read_cam_control(struct dvb_ca_en50221 *ca, int slot, u8 address)
  312. {
  313. struct budget_ci *budget_ci = (struct budget_ci *) ca->data;
  314. if (slot != 0)
  315. return -EINVAL;
  316. return ttpci_budget_debiread(&budget_ci->budget, DEBICICAM,
  317. DEBIADDR_IO | (address & 3), 1, 1, 0);
  318. }
  319. static int ciintf_write_cam_control(struct dvb_ca_en50221 *ca, int slot, u8 address, u8 value)
  320. {
  321. struct budget_ci *budget_ci = (struct budget_ci *) ca->data;
  322. if (slot != 0)
  323. return -EINVAL;
  324. return ttpci_budget_debiwrite(&budget_ci->budget, DEBICICAM,
  325. DEBIADDR_IO | (address & 3), 1, value, 1, 0);
  326. }
  327. static int ciintf_slot_reset(struct dvb_ca_en50221 *ca, int slot)
  328. {
  329. struct budget_ci *budget_ci = (struct budget_ci *) ca->data;
  330. struct saa7146_dev *saa = budget_ci->budget.dev;
  331. if (slot != 0)
  332. return -EINVAL;
  333. if (budget_ci->ci_irq) {
  334. // trigger on RISING edge during reset so we know when READY is re-asserted
  335. saa7146_setgpio(saa, 0, SAA7146_GPIO_IRQHI);
  336. }
  337. budget_ci->slot_status = SLOTSTATUS_RESET;
  338. ttpci_budget_debiwrite(&budget_ci->budget, DEBICICTL, DEBIADDR_CICONTROL, 1, 0, 1, 0);
  339. msleep(1);
  340. ttpci_budget_debiwrite(&budget_ci->budget, DEBICICTL, DEBIADDR_CICONTROL, 1,
  341. CICONTROL_RESET, 1, 0);
  342. saa7146_setgpio(saa, 1, SAA7146_GPIO_OUTHI);
  343. ttpci_budget_set_video_port(saa, BUDGET_VIDEO_PORTB);
  344. return 0;
  345. }
  346. static int ciintf_slot_shutdown(struct dvb_ca_en50221 *ca, int slot)
  347. {
  348. struct budget_ci *budget_ci = (struct budget_ci *) ca->data;
  349. struct saa7146_dev *saa = budget_ci->budget.dev;
  350. if (slot != 0)
  351. return -EINVAL;
  352. saa7146_setgpio(saa, 1, SAA7146_GPIO_OUTHI);
  353. ttpci_budget_set_video_port(saa, BUDGET_VIDEO_PORTB);
  354. return 0;
  355. }
  356. static int ciintf_slot_ts_enable(struct dvb_ca_en50221 *ca, int slot)
  357. {
  358. struct budget_ci *budget_ci = (struct budget_ci *) ca->data;
  359. struct saa7146_dev *saa = budget_ci->budget.dev;
  360. int tmp;
  361. if (slot != 0)
  362. return -EINVAL;
  363. saa7146_setgpio(saa, 1, SAA7146_GPIO_OUTLO);
  364. tmp = ttpci_budget_debiread(&budget_ci->budget, DEBICICTL, DEBIADDR_CICONTROL, 1, 1, 0);
  365. ttpci_budget_debiwrite(&budget_ci->budget, DEBICICTL, DEBIADDR_CICONTROL, 1,
  366. tmp | CICONTROL_ENABLETS, 1, 0);
  367. ttpci_budget_set_video_port(saa, BUDGET_VIDEO_PORTA);
  368. return 0;
  369. }
  370. static void ciintf_interrupt(unsigned long data)
  371. {
  372. struct budget_ci *budget_ci = (struct budget_ci *) data;
  373. struct saa7146_dev *saa = budget_ci->budget.dev;
  374. unsigned int flags;
  375. // ensure we don't get spurious IRQs during initialisation
  376. if (!budget_ci->budget.ci_present)
  377. return;
  378. // read the CAM status
  379. flags = ttpci_budget_debiread(&budget_ci->budget, DEBICICTL, DEBIADDR_CICONTROL, 1, 1, 0);
  380. if (flags & CICONTROL_CAMDETECT) {
  381. // GPIO should be set to trigger on falling edge if a CAM is present
  382. saa7146_setgpio(saa, 0, SAA7146_GPIO_IRQLO);
  383. if (budget_ci->slot_status & SLOTSTATUS_NONE) {
  384. // CAM insertion IRQ
  385. budget_ci->slot_status = SLOTSTATUS_PRESENT;
  386. dvb_ca_en50221_camchange_irq(&budget_ci->ca, 0,
  387. DVB_CA_EN50221_CAMCHANGE_INSERTED);
  388. } else if (budget_ci->slot_status & SLOTSTATUS_RESET) {
  389. // CAM ready (reset completed)
  390. budget_ci->slot_status = SLOTSTATUS_READY;
  391. dvb_ca_en50221_camready_irq(&budget_ci->ca, 0);
  392. } else if (budget_ci->slot_status & SLOTSTATUS_READY) {
  393. // FR/DA IRQ
  394. dvb_ca_en50221_frda_irq(&budget_ci->ca, 0);
  395. }
  396. } else {
  397. // trigger on rising edge if a CAM is not present - when a CAM is inserted, we
  398. // only want to get the IRQ when it sets READY. If we trigger on the falling edge,
  399. // the CAM might not actually be ready yet.
  400. saa7146_setgpio(saa, 0, SAA7146_GPIO_IRQHI);
  401. // generate a CAM removal IRQ if we haven't already
  402. if (budget_ci->slot_status & SLOTSTATUS_OCCUPIED) {
  403. // CAM removal IRQ
  404. budget_ci->slot_status = SLOTSTATUS_NONE;
  405. dvb_ca_en50221_camchange_irq(&budget_ci->ca, 0,
  406. DVB_CA_EN50221_CAMCHANGE_REMOVED);
  407. }
  408. }
  409. }
  410. static int ciintf_poll_slot_status(struct dvb_ca_en50221 *ca, int slot, int open)
  411. {
  412. struct budget_ci *budget_ci = (struct budget_ci *) ca->data;
  413. unsigned int flags;
  414. // ensure we don't get spurious IRQs during initialisation
  415. if (!budget_ci->budget.ci_present)
  416. return -EINVAL;
  417. // read the CAM status
  418. flags = ttpci_budget_debiread(&budget_ci->budget, DEBICICTL, DEBIADDR_CICONTROL, 1, 1, 0);
  419. if (flags & CICONTROL_CAMDETECT) {
  420. // mark it as present if it wasn't before
  421. if (budget_ci->slot_status & SLOTSTATUS_NONE) {
  422. budget_ci->slot_status = SLOTSTATUS_PRESENT;
  423. }
  424. // during a RESET, we check if we can read from IO memory to see when CAM is ready
  425. if (budget_ci->slot_status & SLOTSTATUS_RESET) {
  426. if (ciintf_read_attribute_mem(ca, slot, 0) == 0x1d) {
  427. budget_ci->slot_status = SLOTSTATUS_READY;
  428. }
  429. }
  430. } else {
  431. budget_ci->slot_status = SLOTSTATUS_NONE;
  432. }
  433. if (budget_ci->slot_status != SLOTSTATUS_NONE) {
  434. if (budget_ci->slot_status & SLOTSTATUS_READY) {
  435. return DVB_CA_EN50221_POLL_CAM_PRESENT | DVB_CA_EN50221_POLL_CAM_READY;
  436. }
  437. return DVB_CA_EN50221_POLL_CAM_PRESENT;
  438. }
  439. return 0;
  440. }
  441. static int ciintf_init(struct budget_ci *budget_ci)
  442. {
  443. struct saa7146_dev *saa = budget_ci->budget.dev;
  444. int flags;
  445. int result;
  446. int ci_version;
  447. int ca_flags;
  448. memset(&budget_ci->ca, 0, sizeof(struct dvb_ca_en50221));
  449. // enable DEBI pins
  450. saa7146_write(saa, MC1, saa7146_read(saa, MC1) | (0x800 << 16) | 0x800);
  451. // test if it is there
  452. ci_version = ttpci_budget_debiread(&budget_ci->budget, DEBICICTL, DEBIADDR_CIVERSION, 1, 1, 0);
  453. if ((ci_version & 0xa0) != 0xa0) {
  454. result = -ENODEV;
  455. goto error;
  456. }
  457. // determine whether a CAM is present or not
  458. flags = ttpci_budget_debiread(&budget_ci->budget, DEBICICTL, DEBIADDR_CICONTROL, 1, 1, 0);
  459. budget_ci->slot_status = SLOTSTATUS_NONE;
  460. if (flags & CICONTROL_CAMDETECT)
  461. budget_ci->slot_status = SLOTSTATUS_PRESENT;
  462. // version 0xa2 of the CI firmware doesn't generate interrupts
  463. if (ci_version == 0xa2) {
  464. ca_flags = 0;
  465. budget_ci->ci_irq = 0;
  466. } else {
  467. ca_flags = DVB_CA_EN50221_FLAG_IRQ_CAMCHANGE |
  468. DVB_CA_EN50221_FLAG_IRQ_FR |
  469. DVB_CA_EN50221_FLAG_IRQ_DA;
  470. budget_ci->ci_irq = 1;
  471. }
  472. // register CI interface
  473. budget_ci->ca.owner = THIS_MODULE;
  474. budget_ci->ca.read_attribute_mem = ciintf_read_attribute_mem;
  475. budget_ci->ca.write_attribute_mem = ciintf_write_attribute_mem;
  476. budget_ci->ca.read_cam_control = ciintf_read_cam_control;
  477. budget_ci->ca.write_cam_control = ciintf_write_cam_control;
  478. budget_ci->ca.slot_reset = ciintf_slot_reset;
  479. budget_ci->ca.slot_shutdown = ciintf_slot_shutdown;
  480. budget_ci->ca.slot_ts_enable = ciintf_slot_ts_enable;
  481. budget_ci->ca.poll_slot_status = ciintf_poll_slot_status;
  482. budget_ci->ca.data = budget_ci;
  483. if ((result = dvb_ca_en50221_init(&budget_ci->budget.dvb_adapter,
  484. &budget_ci->ca,
  485. ca_flags, 1)) != 0) {
  486. printk("budget_ci: CI interface detected, but initialisation failed.\n");
  487. goto error;
  488. }
  489. // Setup CI slot IRQ
  490. if (budget_ci->ci_irq) {
  491. tasklet_init(&budget_ci->ciintf_irq_tasklet, ciintf_interrupt, (unsigned long) budget_ci);
  492. if (budget_ci->slot_status != SLOTSTATUS_NONE) {
  493. saa7146_setgpio(saa, 0, SAA7146_GPIO_IRQLO);
  494. } else {
  495. saa7146_setgpio(saa, 0, SAA7146_GPIO_IRQHI);
  496. }
  497. saa7146_write(saa, IER, saa7146_read(saa, IER) | MASK_03);
  498. }
  499. // enable interface
  500. ttpci_budget_debiwrite(&budget_ci->budget, DEBICICTL, DEBIADDR_CICONTROL, 1,
  501. CICONTROL_RESET, 1, 0);
  502. // success!
  503. printk("budget_ci: CI interface initialised\n");
  504. budget_ci->budget.ci_present = 1;
  505. // forge a fake CI IRQ so the CAM state is setup correctly
  506. if (budget_ci->ci_irq) {
  507. flags = DVB_CA_EN50221_CAMCHANGE_REMOVED;
  508. if (budget_ci->slot_status != SLOTSTATUS_NONE)
  509. flags = DVB_CA_EN50221_CAMCHANGE_INSERTED;
  510. dvb_ca_en50221_camchange_irq(&budget_ci->ca, 0, flags);
  511. }
  512. return 0;
  513. error:
  514. saa7146_write(saa, MC1, saa7146_read(saa, MC1) | (0x800 << 16));
  515. return result;
  516. }
  517. static void ciintf_deinit(struct budget_ci *budget_ci)
  518. {
  519. struct saa7146_dev *saa = budget_ci->budget.dev;
  520. // disable CI interrupts
  521. if (budget_ci->ci_irq) {
  522. saa7146_write(saa, IER, saa7146_read(saa, IER) & ~MASK_03);
  523. saa7146_setgpio(saa, 0, SAA7146_GPIO_INPUT);
  524. tasklet_kill(&budget_ci->ciintf_irq_tasklet);
  525. }
  526. // reset interface
  527. ttpci_budget_debiwrite(&budget_ci->budget, DEBICICTL, DEBIADDR_CICONTROL, 1, 0, 1, 0);
  528. msleep(1);
  529. ttpci_budget_debiwrite(&budget_ci->budget, DEBICICTL, DEBIADDR_CICONTROL, 1,
  530. CICONTROL_RESET, 1, 0);
  531. // disable TS data stream to CI interface
  532. saa7146_setgpio(saa, 1, SAA7146_GPIO_INPUT);
  533. // release the CA device
  534. dvb_ca_en50221_release(&budget_ci->ca);
  535. // disable DEBI pins
  536. saa7146_write(saa, MC1, saa7146_read(saa, MC1) | (0x800 << 16));
  537. }
  538. static void budget_ci_irq(struct saa7146_dev *dev, u32 * isr)
  539. {
  540. struct budget_ci *budget_ci = (struct budget_ci *) dev->ext_priv;
  541. dprintk(8, "dev: %p, budget_ci: %p\n", dev, budget_ci);
  542. if (*isr & MASK_06)
  543. tasklet_schedule(&budget_ci->ir.msp430_irq_tasklet);
  544. if (*isr & MASK_10)
  545. ttpci_budget_irq10_handler(dev, isr);
  546. if ((*isr & MASK_03) && (budget_ci->budget.ci_present) && (budget_ci->ci_irq))
  547. tasklet_schedule(&budget_ci->ciintf_irq_tasklet);
  548. }
  549. static u8 philips_su1278_tt_inittab[] = {
  550. 0x01, 0x0f,
  551. 0x02, 0x30,
  552. 0x03, 0x00,
  553. 0x04, 0x5b,
  554. 0x05, 0x85,
  555. 0x06, 0x02,
  556. 0x07, 0x00,
  557. 0x08, 0x02,
  558. 0x09, 0x00,
  559. 0x0C, 0x01,
  560. 0x0D, 0x81,
  561. 0x0E, 0x44,
  562. 0x0f, 0x14,
  563. 0x10, 0x3c,
  564. 0x11, 0x84,
  565. 0x12, 0xda,
  566. 0x13, 0x97,
  567. 0x14, 0x95,
  568. 0x15, 0xc9,
  569. 0x16, 0x19,
  570. 0x17, 0x8c,
  571. 0x18, 0x59,
  572. 0x19, 0xf8,
  573. 0x1a, 0xfe,
  574. 0x1c, 0x7f,
  575. 0x1d, 0x00,
  576. 0x1e, 0x00,
  577. 0x1f, 0x50,
  578. 0x20, 0x00,
  579. 0x21, 0x00,
  580. 0x22, 0x00,
  581. 0x23, 0x00,
  582. 0x28, 0x00,
  583. 0x29, 0x28,
  584. 0x2a, 0x14,
  585. 0x2b, 0x0f,
  586. 0x2c, 0x09,
  587. 0x2d, 0x09,
  588. 0x31, 0x1f,
  589. 0x32, 0x19,
  590. 0x33, 0xfc,
  591. 0x34, 0x93,
  592. 0xff, 0xff
  593. };
  594. static int philips_su1278_tt_set_symbol_rate(struct dvb_frontend *fe, u32 srate, u32 ratio)
  595. {
  596. stv0299_writereg(fe, 0x0e, 0x44);
  597. if (srate >= 10000000) {
  598. stv0299_writereg(fe, 0x13, 0x97);
  599. stv0299_writereg(fe, 0x14, 0x95);
  600. stv0299_writereg(fe, 0x15, 0xc9);
  601. stv0299_writereg(fe, 0x17, 0x8c);
  602. stv0299_writereg(fe, 0x1a, 0xfe);
  603. stv0299_writereg(fe, 0x1c, 0x7f);
  604. stv0299_writereg(fe, 0x2d, 0x09);
  605. } else {
  606. stv0299_writereg(fe, 0x13, 0x99);
  607. stv0299_writereg(fe, 0x14, 0x8d);
  608. stv0299_writereg(fe, 0x15, 0xce);
  609. stv0299_writereg(fe, 0x17, 0x43);
  610. stv0299_writereg(fe, 0x1a, 0x1d);
  611. stv0299_writereg(fe, 0x1c, 0x12);
  612. stv0299_writereg(fe, 0x2d, 0x05);
  613. }
  614. stv0299_writereg(fe, 0x0e, 0x23);
  615. stv0299_writereg(fe, 0x0f, 0x94);
  616. stv0299_writereg(fe, 0x10, 0x39);
  617. stv0299_writereg(fe, 0x15, 0xc9);
  618. stv0299_writereg(fe, 0x1f, (ratio >> 16) & 0xff);
  619. stv0299_writereg(fe, 0x20, (ratio >> 8) & 0xff);
  620. stv0299_writereg(fe, 0x21, (ratio) & 0xf0);
  621. return 0;
  622. }
  623. static int philips_su1278_tt_tuner_set_params(struct dvb_frontend *fe,
  624. struct dvb_frontend_parameters *params)
  625. {
  626. struct budget_ci *budget_ci = (struct budget_ci *) fe->dvb->priv;
  627. u32 div;
  628. u8 buf[4];
  629. struct i2c_msg msg = {.addr = 0x60,.flags = 0,.buf = buf,.len = sizeof(buf) };
  630. if ((params->frequency < 950000) || (params->frequency > 2150000))
  631. return -EINVAL;
  632. div = (params->frequency + (500 - 1)) / 500; // round correctly
  633. buf[0] = (div >> 8) & 0x7f;
  634. buf[1] = div & 0xff;
  635. buf[2] = 0x80 | ((div & 0x18000) >> 10) | 2;
  636. buf[3] = 0x20;
  637. if (params->u.qpsk.symbol_rate < 4000000)
  638. buf[3] |= 1;
  639. if (params->frequency < 1250000)
  640. buf[3] |= 0;
  641. else if (params->frequency < 1550000)
  642. buf[3] |= 0x40;
  643. else if (params->frequency < 2050000)
  644. buf[3] |= 0x80;
  645. else if (params->frequency < 2150000)
  646. buf[3] |= 0xC0;
  647. if (fe->ops.i2c_gate_ctrl)
  648. fe->ops.i2c_gate_ctrl(fe, 1);
  649. if (i2c_transfer(&budget_ci->budget.i2c_adap, &msg, 1) != 1)
  650. return -EIO;
  651. return 0;
  652. }
  653. static struct stv0299_config philips_su1278_tt_config = {
  654. .demod_address = 0x68,
  655. .inittab = philips_su1278_tt_inittab,
  656. .mclk = 64000000UL,
  657. .invert = 0,
  658. .skip_reinit = 1,
  659. .lock_output = STV0229_LOCKOUTPUT_1,
  660. .volt13_op0_op1 = STV0299_VOLT13_OP1,
  661. .min_delay_ms = 50,
  662. .set_symbol_rate = philips_su1278_tt_set_symbol_rate,
  663. };
  664. static int philips_tdm1316l_tuner_init(struct dvb_frontend *fe)
  665. {
  666. struct budget_ci *budget_ci = (struct budget_ci *) fe->dvb->priv;
  667. static u8 td1316_init[] = { 0x0b, 0xf5, 0x85, 0xab };
  668. static u8 disable_mc44BC374c[] = { 0x1d, 0x74, 0xa0, 0x68 };
  669. struct i2c_msg tuner_msg = {.addr = budget_ci->tuner_pll_address,.flags = 0,.buf = td1316_init,.len =
  670. sizeof(td1316_init) };
  671. // setup PLL configuration
  672. if (fe->ops.i2c_gate_ctrl)
  673. fe->ops.i2c_gate_ctrl(fe, 1);
  674. if (i2c_transfer(&budget_ci->budget.i2c_adap, &tuner_msg, 1) != 1)
  675. return -EIO;
  676. msleep(1);
  677. // disable the mc44BC374c (do not check for errors)
  678. tuner_msg.addr = 0x65;
  679. tuner_msg.buf = disable_mc44BC374c;
  680. tuner_msg.len = sizeof(disable_mc44BC374c);
  681. if (fe->ops.i2c_gate_ctrl)
  682. fe->ops.i2c_gate_ctrl(fe, 1);
  683. if (i2c_transfer(&budget_ci->budget.i2c_adap, &tuner_msg, 1) != 1) {
  684. if (fe->ops.i2c_gate_ctrl)
  685. fe->ops.i2c_gate_ctrl(fe, 1);
  686. i2c_transfer(&budget_ci->budget.i2c_adap, &tuner_msg, 1);
  687. }
  688. return 0;
  689. }
  690. static int philips_tdm1316l_tuner_set_params(struct dvb_frontend *fe, struct dvb_frontend_parameters *params)
  691. {
  692. struct budget_ci *budget_ci = (struct budget_ci *) fe->dvb->priv;
  693. u8 tuner_buf[4];
  694. struct i2c_msg tuner_msg = {.addr = budget_ci->tuner_pll_address,.flags = 0,.buf = tuner_buf,.len = sizeof(tuner_buf) };
  695. int tuner_frequency = 0;
  696. u8 band, cp, filter;
  697. // determine charge pump
  698. tuner_frequency = params->frequency + 36130000;
  699. if (tuner_frequency < 87000000)
  700. return -EINVAL;
  701. else if (tuner_frequency < 130000000)
  702. cp = 3;
  703. else if (tuner_frequency < 160000000)
  704. cp = 5;
  705. else if (tuner_frequency < 200000000)
  706. cp = 6;
  707. else if (tuner_frequency < 290000000)
  708. cp = 3;
  709. else if (tuner_frequency < 420000000)
  710. cp = 5;
  711. else if (tuner_frequency < 480000000)
  712. cp = 6;
  713. else if (tuner_frequency < 620000000)
  714. cp = 3;
  715. else if (tuner_frequency < 830000000)
  716. cp = 5;
  717. else if (tuner_frequency < 895000000)
  718. cp = 7;
  719. else
  720. return -EINVAL;
  721. // determine band
  722. if (params->frequency < 49000000)
  723. return -EINVAL;
  724. else if (params->frequency < 159000000)
  725. band = 1;
  726. else if (params->frequency < 444000000)
  727. band = 2;
  728. else if (params->frequency < 861000000)
  729. band = 4;
  730. else
  731. return -EINVAL;
  732. // setup PLL filter and TDA9889
  733. switch (params->u.ofdm.bandwidth) {
  734. case BANDWIDTH_6_MHZ:
  735. tda1004x_writereg(fe, 0x0C, 0x14);
  736. filter = 0;
  737. break;
  738. case BANDWIDTH_7_MHZ:
  739. tda1004x_writereg(fe, 0x0C, 0x80);
  740. filter = 0;
  741. break;
  742. case BANDWIDTH_8_MHZ:
  743. tda1004x_writereg(fe, 0x0C, 0x14);
  744. filter = 1;
  745. break;
  746. default:
  747. return -EINVAL;
  748. }
  749. // calculate divisor
  750. // ((36130000+((1000000/6)/2)) + Finput)/(1000000/6)
  751. tuner_frequency = (((params->frequency / 1000) * 6) + 217280) / 1000;
  752. // setup tuner buffer
  753. tuner_buf[0] = tuner_frequency >> 8;
  754. tuner_buf[1] = tuner_frequency & 0xff;
  755. tuner_buf[2] = 0xca;
  756. tuner_buf[3] = (cp << 5) | (filter << 3) | band;
  757. if (fe->ops.i2c_gate_ctrl)
  758. fe->ops.i2c_gate_ctrl(fe, 1);
  759. if (i2c_transfer(&budget_ci->budget.i2c_adap, &tuner_msg, 1) != 1)
  760. return -EIO;
  761. msleep(1);
  762. return 0;
  763. }
  764. static int philips_tdm1316l_request_firmware(struct dvb_frontend *fe,
  765. const struct firmware **fw, char *name)
  766. {
  767. struct budget_ci *budget_ci = (struct budget_ci *) fe->dvb->priv;
  768. return request_firmware(fw, name, &budget_ci->budget.dev->pci->dev);
  769. }
  770. static struct tda1004x_config philips_tdm1316l_config = {
  771. .demod_address = 0x8,
  772. .invert = 0,
  773. .invert_oclk = 0,
  774. .xtal_freq = TDA10046_XTAL_4M,
  775. .agc_config = TDA10046_AGC_DEFAULT,
  776. .if_freq = TDA10046_FREQ_3617,
  777. .request_firmware = philips_tdm1316l_request_firmware,
  778. };
  779. static int dvbc_philips_tdm1316l_tuner_set_params(struct dvb_frontend *fe, struct dvb_frontend_parameters *params)
  780. {
  781. struct budget_ci *budget_ci = (struct budget_ci *) fe->dvb->priv;
  782. u8 tuner_buf[5];
  783. struct i2c_msg tuner_msg = {.addr = budget_ci->tuner_pll_address,
  784. .flags = 0,
  785. .buf = tuner_buf,
  786. .len = sizeof(tuner_buf) };
  787. int tuner_frequency = 0;
  788. u8 band, cp, filter;
  789. // determine charge pump
  790. tuner_frequency = params->frequency + 36125000;
  791. if (tuner_frequency < 87000000)
  792. return -EINVAL;
  793. else if (tuner_frequency < 130000000) {
  794. cp = 3;
  795. band = 1;
  796. } else if (tuner_frequency < 160000000) {
  797. cp = 5;
  798. band = 1;
  799. } else if (tuner_frequency < 200000000) {
  800. cp = 6;
  801. band = 2;
  802. } else if (tuner_frequency < 290000000) {
  803. cp = 3;
  804. band = 2;
  805. } else if (tuner_frequency < 420000000) {
  806. cp = 5;
  807. band = 2;
  808. } else if (tuner_frequency < 480000000) {
  809. cp = 6;
  810. band = 2;
  811. } else if (tuner_frequency < 620000000) {
  812. cp = 3;
  813. band = 4;
  814. } else if (tuner_frequency < 830000000) {
  815. cp = 5;
  816. band = 4;
  817. } else if (tuner_frequency < 895000000) {
  818. cp = 7;
  819. band = 4;
  820. } else
  821. return -EINVAL;
  822. // assume PLL filter should always be 8MHz for the moment.
  823. filter = 1;
  824. // calculate divisor
  825. tuner_frequency = (params->frequency + 36125000 + (62500/2)) / 62500;
  826. // setup tuner buffer
  827. tuner_buf[0] = tuner_frequency >> 8;
  828. tuner_buf[1] = tuner_frequency & 0xff;
  829. tuner_buf[2] = 0xc8;
  830. tuner_buf[3] = (cp << 5) | (filter << 3) | band;
  831. tuner_buf[4] = 0x80;
  832. if (fe->ops.i2c_gate_ctrl)
  833. fe->ops.i2c_gate_ctrl(fe, 1);
  834. if (i2c_transfer(&budget_ci->budget.i2c_adap, &tuner_msg, 1) != 1)
  835. return -EIO;
  836. msleep(50);
  837. if (fe->ops.i2c_gate_ctrl)
  838. fe->ops.i2c_gate_ctrl(fe, 1);
  839. if (i2c_transfer(&budget_ci->budget.i2c_adap, &tuner_msg, 1) != 1)
  840. return -EIO;
  841. msleep(1);
  842. return 0;
  843. }
  844. static u8 dvbc_philips_tdm1316l_inittab[] = {
  845. 0x80, 0x01,
  846. 0x80, 0x00,
  847. 0x81, 0x01,
  848. 0x81, 0x00,
  849. 0x00, 0x09,
  850. 0x01, 0x69,
  851. 0x03, 0x00,
  852. 0x04, 0x00,
  853. 0x07, 0x00,
  854. 0x08, 0x00,
  855. 0x20, 0x00,
  856. 0x21, 0x40,
  857. 0x22, 0x00,
  858. 0x23, 0x00,
  859. 0x24, 0x40,
  860. 0x25, 0x88,
  861. 0x30, 0xff,
  862. 0x31, 0x00,
  863. 0x32, 0xff,
  864. 0x33, 0x00,
  865. 0x34, 0x50,
  866. 0x35, 0x7f,
  867. 0x36, 0x00,
  868. 0x37, 0x20,
  869. 0x38, 0x00,
  870. 0x40, 0x1c,
  871. 0x41, 0xff,
  872. 0x42, 0x29,
  873. 0x43, 0x20,
  874. 0x44, 0xff,
  875. 0x45, 0x00,
  876. 0x46, 0x00,
  877. 0x49, 0x04,
  878. 0x4a, 0x00,
  879. 0x4b, 0x7b,
  880. 0x52, 0x30,
  881. 0x55, 0xae,
  882. 0x56, 0x47,
  883. 0x57, 0xe1,
  884. 0x58, 0x3a,
  885. 0x5a, 0x1e,
  886. 0x5b, 0x34,
  887. 0x60, 0x00,
  888. 0x63, 0x00,
  889. 0x64, 0x00,
  890. 0x65, 0x00,
  891. 0x66, 0x00,
  892. 0x67, 0x00,
  893. 0x68, 0x00,
  894. 0x69, 0x00,
  895. 0x6a, 0x02,
  896. 0x6b, 0x00,
  897. 0x70, 0xff,
  898. 0x71, 0x00,
  899. 0x72, 0x00,
  900. 0x73, 0x00,
  901. 0x74, 0x0c,
  902. 0x80, 0x00,
  903. 0x81, 0x00,
  904. 0x82, 0x00,
  905. 0x83, 0x00,
  906. 0x84, 0x04,
  907. 0x85, 0x80,
  908. 0x86, 0x24,
  909. 0x87, 0x78,
  910. 0x88, 0x10,
  911. 0x89, 0x00,
  912. 0x90, 0x01,
  913. 0x91, 0x01,
  914. 0xa0, 0x04,
  915. 0xa1, 0x00,
  916. 0xa2, 0x00,
  917. 0xb0, 0x91,
  918. 0xb1, 0x0b,
  919. 0xc0, 0x53,
  920. 0xc1, 0x70,
  921. 0xc2, 0x12,
  922. 0xd0, 0x00,
  923. 0xd1, 0x00,
  924. 0xd2, 0x00,
  925. 0xd3, 0x00,
  926. 0xd4, 0x00,
  927. 0xd5, 0x00,
  928. 0xde, 0x00,
  929. 0xdf, 0x00,
  930. 0x61, 0x38,
  931. 0x62, 0x0a,
  932. 0x53, 0x13,
  933. 0x59, 0x08,
  934. 0xff, 0xff,
  935. };
  936. static struct stv0297_config dvbc_philips_tdm1316l_config = {
  937. .demod_address = 0x1c,
  938. .inittab = dvbc_philips_tdm1316l_inittab,
  939. .invert = 0,
  940. .stop_during_read = 1,
  941. };
  942. static void frontend_init(struct budget_ci *budget_ci)
  943. {
  944. switch (budget_ci->budget.dev->pci->subsystem_device) {
  945. case 0x100c: // Hauppauge/TT Nova-CI budget (stv0299/ALPS BSRU6(tsa5059))
  946. budget_ci->budget.dvb_frontend =
  947. dvb_attach(stv0299_attach, &alps_bsru6_config, &budget_ci->budget.i2c_adap);
  948. if (budget_ci->budget.dvb_frontend) {
  949. budget_ci->budget.dvb_frontend->ops.tuner_ops.set_params = alps_bsru6_tuner_set_params;
  950. budget_ci->budget.dvb_frontend->tuner_priv = &budget_ci->budget.i2c_adap;
  951. break;
  952. }
  953. break;
  954. case 0x100f: // Hauppauge/TT Nova-CI budget (stv0299b/Philips su1278(tsa5059))
  955. budget_ci->budget.dvb_frontend =
  956. dvb_attach(stv0299_attach, &philips_su1278_tt_config, &budget_ci->budget.i2c_adap);
  957. if (budget_ci->budget.dvb_frontend) {
  958. budget_ci->budget.dvb_frontend->ops.tuner_ops.set_params = philips_su1278_tt_tuner_set_params;
  959. break;
  960. }
  961. break;
  962. case 0x1010: // TT DVB-C CI budget (stv0297/Philips tdm1316l(tda6651tt))
  963. budget_ci->tuner_pll_address = 0x61;
  964. budget_ci->budget.dvb_frontend =
  965. dvb_attach(stv0297_attach, &dvbc_philips_tdm1316l_config, &budget_ci->budget.i2c_adap);
  966. if (budget_ci->budget.dvb_frontend) {
  967. budget_ci->budget.dvb_frontend->ops.tuner_ops.set_params = dvbc_philips_tdm1316l_tuner_set_params;
  968. break;
  969. }
  970. break;
  971. case 0x1011: // Hauppauge/TT Nova-T budget (tda10045/Philips tdm1316l(tda6651tt) + TDA9889)
  972. budget_ci->tuner_pll_address = 0x63;
  973. budget_ci->budget.dvb_frontend =
  974. dvb_attach(tda10045_attach, &philips_tdm1316l_config, &budget_ci->budget.i2c_adap);
  975. if (budget_ci->budget.dvb_frontend) {
  976. budget_ci->budget.dvb_frontend->ops.tuner_ops.init = philips_tdm1316l_tuner_init;
  977. budget_ci->budget.dvb_frontend->ops.tuner_ops.set_params = philips_tdm1316l_tuner_set_params;
  978. break;
  979. }
  980. break;
  981. case 0x1012: // TT DVB-T CI budget (tda10046/Philips tdm1316l(tda6651tt))
  982. budget_ci->tuner_pll_address = 0x60;
  983. philips_tdm1316l_config.invert = 1;
  984. budget_ci->budget.dvb_frontend =
  985. dvb_attach(tda10046_attach, &philips_tdm1316l_config, &budget_ci->budget.i2c_adap);
  986. if (budget_ci->budget.dvb_frontend) {
  987. budget_ci->budget.dvb_frontend->ops.tuner_ops.init = philips_tdm1316l_tuner_init;
  988. budget_ci->budget.dvb_frontend->ops.tuner_ops.set_params = philips_tdm1316l_tuner_set_params;
  989. break;
  990. }
  991. break;
  992. case 0x1017: // TT S-1500 PCI
  993. budget_ci->budget.dvb_frontend = dvb_attach(stv0299_attach, &alps_bsbe1_config, &budget_ci->budget.i2c_adap);
  994. if (budget_ci->budget.dvb_frontend) {
  995. budget_ci->budget.dvb_frontend->ops.tuner_ops.set_params = alps_bsbe1_tuner_set_params;
  996. budget_ci->budget.dvb_frontend->tuner_priv = &budget_ci->budget.i2c_adap;
  997. budget_ci->budget.dvb_frontend->ops.dishnetwork_send_legacy_command = NULL;
  998. if (dvb_attach(lnbp21_attach, budget_ci->budget.dvb_frontend, &budget_ci->budget.i2c_adap, LNBP21_LLC, 0) == NULL) {
  999. printk("%s: No LNBP21 found!\n", __FUNCTION__);
  1000. dvb_frontend_detach(budget_ci->budget.dvb_frontend);
  1001. budget_ci->budget.dvb_frontend = NULL;
  1002. }
  1003. }
  1004. break;
  1005. }
  1006. if (budget_ci->budget.dvb_frontend == NULL) {
  1007. printk("budget-ci: A frontend driver was not found for device %04x/%04x subsystem %04x/%04x\n",
  1008. budget_ci->budget.dev->pci->vendor,
  1009. budget_ci->budget.dev->pci->device,
  1010. budget_ci->budget.dev->pci->subsystem_vendor,
  1011. budget_ci->budget.dev->pci->subsystem_device);
  1012. } else {
  1013. if (dvb_register_frontend
  1014. (&budget_ci->budget.dvb_adapter, budget_ci->budget.dvb_frontend)) {
  1015. printk("budget-ci: Frontend registration failed!\n");
  1016. dvb_frontend_detach(budget_ci->budget.dvb_frontend);
  1017. budget_ci->budget.dvb_frontend = NULL;
  1018. }
  1019. }
  1020. }
  1021. static int budget_ci_attach(struct saa7146_dev *dev, struct saa7146_pci_extension_data *info)
  1022. {
  1023. struct budget_ci *budget_ci;
  1024. int err;
  1025. budget_ci = kzalloc(sizeof(struct budget_ci), GFP_KERNEL);
  1026. if (!budget_ci) {
  1027. err = -ENOMEM;
  1028. goto out1;
  1029. }
  1030. dprintk(2, "budget_ci: %p\n", budget_ci);
  1031. dev->ext_priv = budget_ci;
  1032. err = ttpci_budget_init(&budget_ci->budget, dev, info, THIS_MODULE);
  1033. if (err)
  1034. goto out2;
  1035. err = msp430_ir_init(budget_ci);
  1036. if (err)
  1037. goto out3;
  1038. ciintf_init(budget_ci);
  1039. budget_ci->budget.dvb_adapter.priv = budget_ci;
  1040. frontend_init(budget_ci);
  1041. ttpci_budget_init_hooks(&budget_ci->budget);
  1042. return 0;
  1043. out3:
  1044. ttpci_budget_deinit(&budget_ci->budget);
  1045. out2:
  1046. kfree(budget_ci);
  1047. out1:
  1048. return err;
  1049. }
  1050. static int budget_ci_detach(struct saa7146_dev *dev)
  1051. {
  1052. struct budget_ci *budget_ci = (struct budget_ci *) dev->ext_priv;
  1053. struct saa7146_dev *saa = budget_ci->budget.dev;
  1054. int err;
  1055. if (budget_ci->budget.ci_present)
  1056. ciintf_deinit(budget_ci);
  1057. msp430_ir_deinit(budget_ci);
  1058. if (budget_ci->budget.dvb_frontend) {
  1059. dvb_unregister_frontend(budget_ci->budget.dvb_frontend);
  1060. dvb_frontend_detach(budget_ci->budget.dvb_frontend);
  1061. }
  1062. err = ttpci_budget_deinit(&budget_ci->budget);
  1063. // disable frontend and CI interface
  1064. saa7146_setgpio(saa, 2, SAA7146_GPIO_INPUT);
  1065. kfree(budget_ci);
  1066. return err;
  1067. }
  1068. static struct saa7146_extension budget_extension;
  1069. MAKE_BUDGET_INFO(ttbs2, "TT-Budget/S-1500 PCI", BUDGET_TT);
  1070. MAKE_BUDGET_INFO(ttbci, "TT-Budget/WinTV-NOVA-CI PCI", BUDGET_TT_HW_DISEQC);
  1071. MAKE_BUDGET_INFO(ttbt2, "TT-Budget/WinTV-NOVA-T PCI", BUDGET_TT);
  1072. MAKE_BUDGET_INFO(ttbtci, "TT-Budget-T-CI PCI", BUDGET_TT);
  1073. MAKE_BUDGET_INFO(ttbcci, "TT-Budget-C-CI PCI", BUDGET_TT);
  1074. static struct pci_device_id pci_tbl[] = {
  1075. MAKE_EXTENSION_PCI(ttbci, 0x13c2, 0x100c),
  1076. MAKE_EXTENSION_PCI(ttbci, 0x13c2, 0x100f),
  1077. MAKE_EXTENSION_PCI(ttbcci, 0x13c2, 0x1010),
  1078. MAKE_EXTENSION_PCI(ttbt2, 0x13c2, 0x1011),
  1079. MAKE_EXTENSION_PCI(ttbtci, 0x13c2, 0x1012),
  1080. MAKE_EXTENSION_PCI(ttbs2, 0x13c2, 0x1017),
  1081. {
  1082. .vendor = 0,
  1083. }
  1084. };
  1085. MODULE_DEVICE_TABLE(pci, pci_tbl);
  1086. static struct saa7146_extension budget_extension = {
  1087. .name = "budget_ci dvb",
  1088. .flags = SAA7146_I2C_SHORT_DELAY,
  1089. .module = THIS_MODULE,
  1090. .pci_tbl = &pci_tbl[0],
  1091. .attach = budget_ci_attach,
  1092. .detach = budget_ci_detach,
  1093. .irq_mask = MASK_03 | MASK_06 | MASK_10,
  1094. .irq_func = budget_ci_irq,
  1095. };
  1096. static int __init budget_ci_init(void)
  1097. {
  1098. return saa7146_register_extension(&budget_extension);
  1099. }
  1100. static void __exit budget_ci_exit(void)
  1101. {
  1102. saa7146_unregister_extension(&budget_extension);
  1103. }
  1104. module_init(budget_ci_init);
  1105. module_exit(budget_ci_exit);
  1106. MODULE_LICENSE("GPL");
  1107. MODULE_AUTHOR("Michael Hunold, Jack Thomasson, Andrew de Quincey, others");
  1108. MODULE_DESCRIPTION("driver for the SAA7146 based so-called "
  1109. "budget PCI DVB cards w/ CI-module produced by "
  1110. "Siemens, Technotrend, Hauppauge");