ehci-q.c 36 KB

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  1. /*
  2. * Copyright (C) 2001-2004 by David Brownell
  3. *
  4. * This program is free software; you can redistribute it and/or modify it
  5. * under the terms of the GNU General Public License as published by the
  6. * Free Software Foundation; either version 2 of the License, or (at your
  7. * option) any later version.
  8. *
  9. * This program is distributed in the hope that it will be useful, but
  10. * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  11. * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
  12. * for more details.
  13. *
  14. * You should have received a copy of the GNU General Public License
  15. * along with this program; if not, write to the Free Software Foundation,
  16. * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  17. */
  18. /* this file is part of ehci-hcd.c */
  19. /*-------------------------------------------------------------------------*/
  20. /*
  21. * EHCI hardware queue manipulation ... the core. QH/QTD manipulation.
  22. *
  23. * Control, bulk, and interrupt traffic all use "qh" lists. They list "qtd"
  24. * entries describing USB transactions, max 16-20kB/entry (with 4kB-aligned
  25. * buffers needed for the larger number). We use one QH per endpoint, queue
  26. * multiple urbs (all three types) per endpoint. URBs may need several qtds.
  27. *
  28. * ISO traffic uses "ISO TD" (itd, and sitd) records, and (along with
  29. * interrupts) needs careful scheduling. Performance improvements can be
  30. * an ongoing challenge. That's in "ehci-sched.c".
  31. *
  32. * USB 1.1 devices are handled (a) by "companion" OHCI or UHCI root hubs,
  33. * or otherwise through transaction translators (TTs) in USB 2.0 hubs using
  34. * (b) special fields in qh entries or (c) split iso entries. TTs will
  35. * buffer low/full speed data so the host collects it at high speed.
  36. */
  37. /*-------------------------------------------------------------------------*/
  38. /* fill a qtd, returning how much of the buffer we were able to queue up */
  39. static int
  40. qtd_fill(struct ehci_hcd *ehci, struct ehci_qtd *qtd, dma_addr_t buf,
  41. size_t len, int token, int maxpacket)
  42. {
  43. int i, count;
  44. u64 addr = buf;
  45. /* one buffer entry per 4K ... first might be short or unaligned */
  46. qtd->hw_buf[0] = cpu_to_hc32(ehci, (u32)addr);
  47. qtd->hw_buf_hi[0] = cpu_to_hc32(ehci, (u32)(addr >> 32));
  48. count = 0x1000 - (buf & 0x0fff); /* rest of that page */
  49. if (likely (len < count)) /* ... iff needed */
  50. count = len;
  51. else {
  52. buf += 0x1000;
  53. buf &= ~0x0fff;
  54. /* per-qtd limit: from 16K to 20K (best alignment) */
  55. for (i = 1; count < len && i < 5; i++) {
  56. addr = buf;
  57. qtd->hw_buf[i] = cpu_to_hc32(ehci, (u32)addr);
  58. qtd->hw_buf_hi[i] = cpu_to_hc32(ehci,
  59. (u32)(addr >> 32));
  60. buf += 0x1000;
  61. if ((count + 0x1000) < len)
  62. count += 0x1000;
  63. else
  64. count = len;
  65. }
  66. /* short packets may only terminate transfers */
  67. if (count != len)
  68. count -= (count % maxpacket);
  69. }
  70. qtd->hw_token = cpu_to_hc32(ehci, (count << 16) | token);
  71. qtd->length = count;
  72. return count;
  73. }
  74. /*-------------------------------------------------------------------------*/
  75. static inline void
  76. qh_update (struct ehci_hcd *ehci, struct ehci_qh *qh, struct ehci_qtd *qtd)
  77. {
  78. struct ehci_qh_hw *hw = qh->hw;
  79. /* writes to an active overlay are unsafe */
  80. BUG_ON(qh->qh_state != QH_STATE_IDLE);
  81. hw->hw_qtd_next = QTD_NEXT(ehci, qtd->qtd_dma);
  82. hw->hw_alt_next = EHCI_LIST_END(ehci);
  83. /* Except for control endpoints, we make hardware maintain data
  84. * toggle (like OHCI) ... here (re)initialize the toggle in the QH,
  85. * and set the pseudo-toggle in udev. Only usb_clear_halt() will
  86. * ever clear it.
  87. */
  88. if (!(hw->hw_info1 & cpu_to_hc32(ehci, 1 << 14))) {
  89. unsigned is_out, epnum;
  90. is_out = qh->is_out;
  91. epnum = (hc32_to_cpup(ehci, &hw->hw_info1) >> 8) & 0x0f;
  92. if (unlikely (!usb_gettoggle (qh->dev, epnum, is_out))) {
  93. hw->hw_token &= ~cpu_to_hc32(ehci, QTD_TOGGLE);
  94. usb_settoggle (qh->dev, epnum, is_out, 1);
  95. }
  96. }
  97. hw->hw_token &= cpu_to_hc32(ehci, QTD_TOGGLE | QTD_STS_PING);
  98. }
  99. /* if it weren't for a common silicon quirk (writing the dummy into the qh
  100. * overlay, so qh->hw_token wrongly becomes inactive/halted), only fault
  101. * recovery (including urb dequeue) would need software changes to a QH...
  102. */
  103. static void
  104. qh_refresh (struct ehci_hcd *ehci, struct ehci_qh *qh)
  105. {
  106. struct ehci_qtd *qtd;
  107. if (list_empty (&qh->qtd_list))
  108. qtd = qh->dummy;
  109. else {
  110. qtd = list_entry (qh->qtd_list.next,
  111. struct ehci_qtd, qtd_list);
  112. /* first qtd may already be partially processed */
  113. if (cpu_to_hc32(ehci, qtd->qtd_dma) == qh->hw->hw_current)
  114. qtd = NULL;
  115. }
  116. if (qtd)
  117. qh_update (ehci, qh, qtd);
  118. }
  119. /*-------------------------------------------------------------------------*/
  120. static void qh_link_async(struct ehci_hcd *ehci, struct ehci_qh *qh);
  121. static void ehci_clear_tt_buffer_complete(struct usb_hcd *hcd,
  122. struct usb_host_endpoint *ep)
  123. {
  124. struct ehci_hcd *ehci = hcd_to_ehci(hcd);
  125. struct ehci_qh *qh = ep->hcpriv;
  126. unsigned long flags;
  127. spin_lock_irqsave(&ehci->lock, flags);
  128. qh->clearing_tt = 0;
  129. if (qh->qh_state == QH_STATE_IDLE && !list_empty(&qh->qtd_list)
  130. && ehci->rh_state == EHCI_RH_RUNNING)
  131. qh_link_async(ehci, qh);
  132. spin_unlock_irqrestore(&ehci->lock, flags);
  133. }
  134. static void ehci_clear_tt_buffer(struct ehci_hcd *ehci, struct ehci_qh *qh,
  135. struct urb *urb, u32 token)
  136. {
  137. /* If an async split transaction gets an error or is unlinked,
  138. * the TT buffer may be left in an indeterminate state. We
  139. * have to clear the TT buffer.
  140. *
  141. * Note: this routine is never called for Isochronous transfers.
  142. */
  143. if (urb->dev->tt && !usb_pipeint(urb->pipe) && !qh->clearing_tt) {
  144. #ifdef DEBUG
  145. struct usb_device *tt = urb->dev->tt->hub;
  146. dev_dbg(&tt->dev,
  147. "clear tt buffer port %d, a%d ep%d t%08x\n",
  148. urb->dev->ttport, urb->dev->devnum,
  149. usb_pipeendpoint(urb->pipe), token);
  150. #endif /* DEBUG */
  151. if (!ehci_is_TDI(ehci)
  152. || urb->dev->tt->hub !=
  153. ehci_to_hcd(ehci)->self.root_hub) {
  154. if (usb_hub_clear_tt_buffer(urb) == 0)
  155. qh->clearing_tt = 1;
  156. } else {
  157. /* REVISIT ARC-derived cores don't clear the root
  158. * hub TT buffer in this way...
  159. */
  160. }
  161. }
  162. }
  163. static int qtd_copy_status (
  164. struct ehci_hcd *ehci,
  165. struct urb *urb,
  166. size_t length,
  167. u32 token
  168. )
  169. {
  170. int status = -EINPROGRESS;
  171. /* count IN/OUT bytes, not SETUP (even short packets) */
  172. if (likely (QTD_PID (token) != 2))
  173. urb->actual_length += length - QTD_LENGTH (token);
  174. /* don't modify error codes */
  175. if (unlikely(urb->unlinked))
  176. return status;
  177. /* force cleanup after short read; not always an error */
  178. if (unlikely (IS_SHORT_READ (token)))
  179. status = -EREMOTEIO;
  180. /* serious "can't proceed" faults reported by the hardware */
  181. if (token & QTD_STS_HALT) {
  182. if (token & QTD_STS_BABBLE) {
  183. /* FIXME "must" disable babbling device's port too */
  184. status = -EOVERFLOW;
  185. /* CERR nonzero + halt --> stall */
  186. } else if (QTD_CERR(token)) {
  187. status = -EPIPE;
  188. /* In theory, more than one of the following bits can be set
  189. * since they are sticky and the transaction is retried.
  190. * Which to test first is rather arbitrary.
  191. */
  192. } else if (token & QTD_STS_MMF) {
  193. /* fs/ls interrupt xfer missed the complete-split */
  194. status = -EPROTO;
  195. } else if (token & QTD_STS_DBE) {
  196. status = (QTD_PID (token) == 1) /* IN ? */
  197. ? -ENOSR /* hc couldn't read data */
  198. : -ECOMM; /* hc couldn't write data */
  199. } else if (token & QTD_STS_XACT) {
  200. /* timeout, bad CRC, wrong PID, etc */
  201. ehci_dbg(ehci, "devpath %s ep%d%s 3strikes\n",
  202. urb->dev->devpath,
  203. usb_pipeendpoint(urb->pipe),
  204. usb_pipein(urb->pipe) ? "in" : "out");
  205. status = -EPROTO;
  206. } else { /* unknown */
  207. status = -EPROTO;
  208. }
  209. ehci_vdbg (ehci,
  210. "dev%d ep%d%s qtd token %08x --> status %d\n",
  211. usb_pipedevice (urb->pipe),
  212. usb_pipeendpoint (urb->pipe),
  213. usb_pipein (urb->pipe) ? "in" : "out",
  214. token, status);
  215. }
  216. return status;
  217. }
  218. static void
  219. ehci_urb_done(struct ehci_hcd *ehci, struct urb *urb, int status)
  220. __releases(ehci->lock)
  221. __acquires(ehci->lock)
  222. {
  223. if (likely (urb->hcpriv != NULL)) {
  224. struct ehci_qh *qh = (struct ehci_qh *) urb->hcpriv;
  225. /* S-mask in a QH means it's an interrupt urb */
  226. if ((qh->hw->hw_info2 & cpu_to_hc32(ehci, QH_SMASK)) != 0) {
  227. /* ... update hc-wide periodic stats (for usbfs) */
  228. ehci_to_hcd(ehci)->self.bandwidth_int_reqs--;
  229. }
  230. qh_put (qh);
  231. }
  232. if (unlikely(urb->unlinked)) {
  233. COUNT(ehci->stats.unlink);
  234. } else {
  235. /* report non-error and short read status as zero */
  236. if (status == -EINPROGRESS || status == -EREMOTEIO)
  237. status = 0;
  238. COUNT(ehci->stats.complete);
  239. }
  240. #ifdef EHCI_URB_TRACE
  241. ehci_dbg (ehci,
  242. "%s %s urb %p ep%d%s status %d len %d/%d\n",
  243. __func__, urb->dev->devpath, urb,
  244. usb_pipeendpoint (urb->pipe),
  245. usb_pipein (urb->pipe) ? "in" : "out",
  246. status,
  247. urb->actual_length, urb->transfer_buffer_length);
  248. #endif
  249. /* complete() can reenter this HCD */
  250. usb_hcd_unlink_urb_from_ep(ehci_to_hcd(ehci), urb);
  251. spin_unlock (&ehci->lock);
  252. usb_hcd_giveback_urb(ehci_to_hcd(ehci), urb, status);
  253. spin_lock (&ehci->lock);
  254. }
  255. static void start_unlink_async (struct ehci_hcd *ehci, struct ehci_qh *qh);
  256. static void unlink_async (struct ehci_hcd *ehci, struct ehci_qh *qh);
  257. static int qh_schedule (struct ehci_hcd *ehci, struct ehci_qh *qh);
  258. /*
  259. * Process and free completed qtds for a qh, returning URBs to drivers.
  260. * Chases up to qh->hw_current. Returns number of completions called,
  261. * indicating how much "real" work we did.
  262. */
  263. static unsigned
  264. qh_completions (struct ehci_hcd *ehci, struct ehci_qh *qh)
  265. {
  266. struct ehci_qtd *last, *end = qh->dummy;
  267. struct list_head *entry, *tmp;
  268. int last_status;
  269. int stopped;
  270. unsigned count = 0;
  271. u8 state;
  272. struct ehci_qh_hw *hw = qh->hw;
  273. if (unlikely (list_empty (&qh->qtd_list)))
  274. return count;
  275. /* completions (or tasks on other cpus) must never clobber HALT
  276. * till we've gone through and cleaned everything up, even when
  277. * they add urbs to this qh's queue or mark them for unlinking.
  278. *
  279. * NOTE: unlinking expects to be done in queue order.
  280. *
  281. * It's a bug for qh->qh_state to be anything other than
  282. * QH_STATE_IDLE, unless our caller is scan_async() or
  283. * scan_periodic().
  284. */
  285. state = qh->qh_state;
  286. qh->qh_state = QH_STATE_COMPLETING;
  287. stopped = (state == QH_STATE_IDLE);
  288. rescan:
  289. last = NULL;
  290. last_status = -EINPROGRESS;
  291. qh->needs_rescan = 0;
  292. /* remove de-activated QTDs from front of queue.
  293. * after faults (including short reads), cleanup this urb
  294. * then let the queue advance.
  295. * if queue is stopped, handles unlinks.
  296. */
  297. list_for_each_safe (entry, tmp, &qh->qtd_list) {
  298. struct ehci_qtd *qtd;
  299. struct urb *urb;
  300. u32 token = 0;
  301. qtd = list_entry (entry, struct ehci_qtd, qtd_list);
  302. urb = qtd->urb;
  303. /* clean up any state from previous QTD ...*/
  304. if (last) {
  305. if (likely (last->urb != urb)) {
  306. ehci_urb_done(ehci, last->urb, last_status);
  307. count++;
  308. last_status = -EINPROGRESS;
  309. }
  310. ehci_qtd_free (ehci, last);
  311. last = NULL;
  312. }
  313. /* ignore urbs submitted during completions we reported */
  314. if (qtd == end)
  315. break;
  316. /* hardware copies qtd out of qh overlay */
  317. rmb ();
  318. token = hc32_to_cpu(ehci, qtd->hw_token);
  319. /* always clean up qtds the hc de-activated */
  320. retry_xacterr:
  321. if ((token & QTD_STS_ACTIVE) == 0) {
  322. /* on STALL, error, and short reads this urb must
  323. * complete and all its qtds must be recycled.
  324. */
  325. if ((token & QTD_STS_HALT) != 0) {
  326. /* retry transaction errors until we
  327. * reach the software xacterr limit
  328. */
  329. if ((token & QTD_STS_XACT) &&
  330. QTD_CERR(token) == 0 &&
  331. ++qh->xacterrs < QH_XACTERR_MAX &&
  332. !urb->unlinked) {
  333. ehci_dbg(ehci,
  334. "detected XactErr len %zu/%zu retry %d\n",
  335. qtd->length - QTD_LENGTH(token), qtd->length, qh->xacterrs);
  336. /* reset the token in the qtd and the
  337. * qh overlay (which still contains
  338. * the qtd) so that we pick up from
  339. * where we left off
  340. */
  341. token &= ~QTD_STS_HALT;
  342. token |= QTD_STS_ACTIVE |
  343. (EHCI_TUNE_CERR << 10);
  344. qtd->hw_token = cpu_to_hc32(ehci,
  345. token);
  346. wmb();
  347. hw->hw_token = cpu_to_hc32(ehci,
  348. token);
  349. goto retry_xacterr;
  350. }
  351. stopped = 1;
  352. /* magic dummy for some short reads; qh won't advance.
  353. * that silicon quirk can kick in with this dummy too.
  354. *
  355. * other short reads won't stop the queue, including
  356. * control transfers (status stage handles that) or
  357. * most other single-qtd reads ... the queue stops if
  358. * URB_SHORT_NOT_OK was set so the driver submitting
  359. * the urbs could clean it up.
  360. */
  361. } else if (IS_SHORT_READ (token)
  362. && !(qtd->hw_alt_next
  363. & EHCI_LIST_END(ehci))) {
  364. stopped = 1;
  365. }
  366. /* stop scanning when we reach qtds the hc is using */
  367. } else if (likely (!stopped
  368. && ehci->rh_state == EHCI_RH_RUNNING)) {
  369. break;
  370. /* scan the whole queue for unlinks whenever it stops */
  371. } else {
  372. stopped = 1;
  373. /* cancel everything if we halt, suspend, etc */
  374. if (ehci->rh_state != EHCI_RH_RUNNING)
  375. last_status = -ESHUTDOWN;
  376. /* this qtd is active; skip it unless a previous qtd
  377. * for its urb faulted, or its urb was canceled.
  378. */
  379. else if (last_status == -EINPROGRESS && !urb->unlinked)
  380. continue;
  381. /* qh unlinked; token in overlay may be most current */
  382. if (state == QH_STATE_IDLE
  383. && cpu_to_hc32(ehci, qtd->qtd_dma)
  384. == hw->hw_current) {
  385. token = hc32_to_cpu(ehci, hw->hw_token);
  386. /* An unlink may leave an incomplete
  387. * async transaction in the TT buffer.
  388. * We have to clear it.
  389. */
  390. ehci_clear_tt_buffer(ehci, qh, urb, token);
  391. }
  392. }
  393. /* unless we already know the urb's status, collect qtd status
  394. * and update count of bytes transferred. in common short read
  395. * cases with only one data qtd (including control transfers),
  396. * queue processing won't halt. but with two or more qtds (for
  397. * example, with a 32 KB transfer), when the first qtd gets a
  398. * short read the second must be removed by hand.
  399. */
  400. if (last_status == -EINPROGRESS) {
  401. last_status = qtd_copy_status(ehci, urb,
  402. qtd->length, token);
  403. if (last_status == -EREMOTEIO
  404. && (qtd->hw_alt_next
  405. & EHCI_LIST_END(ehci)))
  406. last_status = -EINPROGRESS;
  407. /* As part of low/full-speed endpoint-halt processing
  408. * we must clear the TT buffer (11.17.5).
  409. */
  410. if (unlikely(last_status != -EINPROGRESS &&
  411. last_status != -EREMOTEIO)) {
  412. /* The TT's in some hubs malfunction when they
  413. * receive this request following a STALL (they
  414. * stop sending isochronous packets). Since a
  415. * STALL can't leave the TT buffer in a busy
  416. * state (if you believe Figures 11-48 - 11-51
  417. * in the USB 2.0 spec), we won't clear the TT
  418. * buffer in this case. Strictly speaking this
  419. * is a violation of the spec.
  420. */
  421. if (last_status != -EPIPE)
  422. ehci_clear_tt_buffer(ehci, qh, urb,
  423. token);
  424. }
  425. }
  426. /* if we're removing something not at the queue head,
  427. * patch the hardware queue pointer.
  428. */
  429. if (stopped && qtd->qtd_list.prev != &qh->qtd_list) {
  430. last = list_entry (qtd->qtd_list.prev,
  431. struct ehci_qtd, qtd_list);
  432. last->hw_next = qtd->hw_next;
  433. }
  434. /* remove qtd; it's recycled after possible urb completion */
  435. list_del (&qtd->qtd_list);
  436. last = qtd;
  437. /* reinit the xacterr counter for the next qtd */
  438. qh->xacterrs = 0;
  439. }
  440. /* last urb's completion might still need calling */
  441. if (likely (last != NULL)) {
  442. ehci_urb_done(ehci, last->urb, last_status);
  443. count++;
  444. ehci_qtd_free (ehci, last);
  445. }
  446. /* Do we need to rescan for URBs dequeued during a giveback? */
  447. if (unlikely(qh->needs_rescan)) {
  448. /* If the QH is already unlinked, do the rescan now. */
  449. if (state == QH_STATE_IDLE)
  450. goto rescan;
  451. /* Otherwise we have to wait until the QH is fully unlinked.
  452. * Our caller will start an unlink if qh->needs_rescan is
  453. * set. But if an unlink has already started, nothing needs
  454. * to be done.
  455. */
  456. if (state != QH_STATE_LINKED)
  457. qh->needs_rescan = 0;
  458. }
  459. /* restore original state; caller must unlink or relink */
  460. qh->qh_state = state;
  461. /* be sure the hardware's done with the qh before refreshing
  462. * it after fault cleanup, or recovering from silicon wrongly
  463. * overlaying the dummy qtd (which reduces DMA chatter).
  464. */
  465. if (stopped != 0 || hw->hw_qtd_next == EHCI_LIST_END(ehci)) {
  466. switch (state) {
  467. case QH_STATE_IDLE:
  468. qh_refresh(ehci, qh);
  469. break;
  470. case QH_STATE_LINKED:
  471. /* We won't refresh a QH that's linked (after the HC
  472. * stopped the queue). That avoids a race:
  473. * - HC reads first part of QH;
  474. * - CPU updates that first part and the token;
  475. * - HC reads rest of that QH, including token
  476. * Result: HC gets an inconsistent image, and then
  477. * DMAs to/from the wrong memory (corrupting it).
  478. *
  479. * That should be rare for interrupt transfers,
  480. * except maybe high bandwidth ...
  481. */
  482. /* Tell the caller to start an unlink */
  483. qh->needs_rescan = 1;
  484. break;
  485. /* otherwise, unlink already started */
  486. }
  487. }
  488. return count;
  489. }
  490. /*-------------------------------------------------------------------------*/
  491. // high bandwidth multiplier, as encoded in highspeed endpoint descriptors
  492. #define hb_mult(wMaxPacketSize) (1 + (((wMaxPacketSize) >> 11) & 0x03))
  493. // ... and packet size, for any kind of endpoint descriptor
  494. #define max_packet(wMaxPacketSize) ((wMaxPacketSize) & 0x07ff)
  495. /*
  496. * reverse of qh_urb_transaction: free a list of TDs.
  497. * used for cleanup after errors, before HC sees an URB's TDs.
  498. */
  499. static void qtd_list_free (
  500. struct ehci_hcd *ehci,
  501. struct urb *urb,
  502. struct list_head *qtd_list
  503. ) {
  504. struct list_head *entry, *temp;
  505. list_for_each_safe (entry, temp, qtd_list) {
  506. struct ehci_qtd *qtd;
  507. qtd = list_entry (entry, struct ehci_qtd, qtd_list);
  508. list_del (&qtd->qtd_list);
  509. ehci_qtd_free (ehci, qtd);
  510. }
  511. }
  512. /*
  513. * create a list of filled qtds for this URB; won't link into qh.
  514. */
  515. static struct list_head *
  516. qh_urb_transaction (
  517. struct ehci_hcd *ehci,
  518. struct urb *urb,
  519. struct list_head *head,
  520. gfp_t flags
  521. ) {
  522. struct ehci_qtd *qtd, *qtd_prev;
  523. dma_addr_t buf;
  524. int len, this_sg_len, maxpacket;
  525. int is_input;
  526. u32 token;
  527. int i;
  528. struct scatterlist *sg;
  529. /*
  530. * URBs map to sequences of QTDs: one logical transaction
  531. */
  532. qtd = ehci_qtd_alloc (ehci, flags);
  533. if (unlikely (!qtd))
  534. return NULL;
  535. list_add_tail (&qtd->qtd_list, head);
  536. qtd->urb = urb;
  537. token = QTD_STS_ACTIVE;
  538. token |= (EHCI_TUNE_CERR << 10);
  539. /* for split transactions, SplitXState initialized to zero */
  540. len = urb->transfer_buffer_length;
  541. is_input = usb_pipein (urb->pipe);
  542. if (usb_pipecontrol (urb->pipe)) {
  543. /* SETUP pid */
  544. qtd_fill(ehci, qtd, urb->setup_dma,
  545. sizeof (struct usb_ctrlrequest),
  546. token | (2 /* "setup" */ << 8), 8);
  547. /* ... and always at least one more pid */
  548. token ^= QTD_TOGGLE;
  549. qtd_prev = qtd;
  550. qtd = ehci_qtd_alloc (ehci, flags);
  551. if (unlikely (!qtd))
  552. goto cleanup;
  553. qtd->urb = urb;
  554. qtd_prev->hw_next = QTD_NEXT(ehci, qtd->qtd_dma);
  555. list_add_tail (&qtd->qtd_list, head);
  556. /* for zero length DATA stages, STATUS is always IN */
  557. if (len == 0)
  558. token |= (1 /* "in" */ << 8);
  559. }
  560. /*
  561. * data transfer stage: buffer setup
  562. */
  563. i = urb->num_sgs;
  564. if (len > 0 && i > 0) {
  565. sg = urb->sg;
  566. buf = sg_dma_address(sg);
  567. /* urb->transfer_buffer_length may be smaller than the
  568. * size of the scatterlist (or vice versa)
  569. */
  570. this_sg_len = min_t(int, sg_dma_len(sg), len);
  571. } else {
  572. sg = NULL;
  573. buf = urb->transfer_dma;
  574. this_sg_len = len;
  575. }
  576. if (is_input)
  577. token |= (1 /* "in" */ << 8);
  578. /* else it's already initted to "out" pid (0 << 8) */
  579. maxpacket = max_packet(usb_maxpacket(urb->dev, urb->pipe, !is_input));
  580. /*
  581. * buffer gets wrapped in one or more qtds;
  582. * last one may be "short" (including zero len)
  583. * and may serve as a control status ack
  584. */
  585. for (;;) {
  586. int this_qtd_len;
  587. this_qtd_len = qtd_fill(ehci, qtd, buf, this_sg_len, token,
  588. maxpacket);
  589. this_sg_len -= this_qtd_len;
  590. len -= this_qtd_len;
  591. buf += this_qtd_len;
  592. /*
  593. * short reads advance to a "magic" dummy instead of the next
  594. * qtd ... that forces the queue to stop, for manual cleanup.
  595. * (this will usually be overridden later.)
  596. */
  597. if (is_input)
  598. qtd->hw_alt_next = ehci->async->hw->hw_alt_next;
  599. /* qh makes control packets use qtd toggle; maybe switch it */
  600. if ((maxpacket & (this_qtd_len + (maxpacket - 1))) == 0)
  601. token ^= QTD_TOGGLE;
  602. if (likely(this_sg_len <= 0)) {
  603. if (--i <= 0 || len <= 0)
  604. break;
  605. sg = sg_next(sg);
  606. buf = sg_dma_address(sg);
  607. this_sg_len = min_t(int, sg_dma_len(sg), len);
  608. }
  609. qtd_prev = qtd;
  610. qtd = ehci_qtd_alloc (ehci, flags);
  611. if (unlikely (!qtd))
  612. goto cleanup;
  613. qtd->urb = urb;
  614. qtd_prev->hw_next = QTD_NEXT(ehci, qtd->qtd_dma);
  615. list_add_tail (&qtd->qtd_list, head);
  616. }
  617. /*
  618. * unless the caller requires manual cleanup after short reads,
  619. * have the alt_next mechanism keep the queue running after the
  620. * last data qtd (the only one, for control and most other cases).
  621. */
  622. if (likely ((urb->transfer_flags & URB_SHORT_NOT_OK) == 0
  623. || usb_pipecontrol (urb->pipe)))
  624. qtd->hw_alt_next = EHCI_LIST_END(ehci);
  625. /*
  626. * control requests may need a terminating data "status" ack;
  627. * other OUT ones may need a terminating short packet
  628. * (zero length).
  629. */
  630. if (likely (urb->transfer_buffer_length != 0)) {
  631. int one_more = 0;
  632. if (usb_pipecontrol (urb->pipe)) {
  633. one_more = 1;
  634. token ^= 0x0100; /* "in" <--> "out" */
  635. token |= QTD_TOGGLE; /* force DATA1 */
  636. } else if (usb_pipeout(urb->pipe)
  637. && (urb->transfer_flags & URB_ZERO_PACKET)
  638. && !(urb->transfer_buffer_length % maxpacket)) {
  639. one_more = 1;
  640. }
  641. if (one_more) {
  642. qtd_prev = qtd;
  643. qtd = ehci_qtd_alloc (ehci, flags);
  644. if (unlikely (!qtd))
  645. goto cleanup;
  646. qtd->urb = urb;
  647. qtd_prev->hw_next = QTD_NEXT(ehci, qtd->qtd_dma);
  648. list_add_tail (&qtd->qtd_list, head);
  649. /* never any data in such packets */
  650. qtd_fill(ehci, qtd, 0, 0, token, 0);
  651. }
  652. }
  653. /* by default, enable interrupt on urb completion */
  654. if (likely (!(urb->transfer_flags & URB_NO_INTERRUPT)))
  655. qtd->hw_token |= cpu_to_hc32(ehci, QTD_IOC);
  656. return head;
  657. cleanup:
  658. qtd_list_free (ehci, urb, head);
  659. return NULL;
  660. }
  661. /*-------------------------------------------------------------------------*/
  662. // Would be best to create all qh's from config descriptors,
  663. // when each interface/altsetting is established. Unlink
  664. // any previous qh and cancel its urbs first; endpoints are
  665. // implicitly reset then (data toggle too).
  666. // That'd mean updating how usbcore talks to HCDs. (2.7?)
  667. /*
  668. * Each QH holds a qtd list; a QH is used for everything except iso.
  669. *
  670. * For interrupt urbs, the scheduler must set the microframe scheduling
  671. * mask(s) each time the QH gets scheduled. For highspeed, that's
  672. * just one microframe in the s-mask. For split interrupt transactions
  673. * there are additional complications: c-mask, maybe FSTNs.
  674. */
  675. static struct ehci_qh *
  676. qh_make (
  677. struct ehci_hcd *ehci,
  678. struct urb *urb,
  679. gfp_t flags
  680. ) {
  681. struct ehci_qh *qh = ehci_qh_alloc (ehci, flags);
  682. u32 info1 = 0, info2 = 0;
  683. int is_input, type;
  684. int maxp = 0;
  685. struct usb_tt *tt = urb->dev->tt;
  686. struct ehci_qh_hw *hw;
  687. if (!qh)
  688. return qh;
  689. /*
  690. * init endpoint/device data for this QH
  691. */
  692. info1 |= usb_pipeendpoint (urb->pipe) << 8;
  693. info1 |= usb_pipedevice (urb->pipe) << 0;
  694. is_input = usb_pipein (urb->pipe);
  695. type = usb_pipetype (urb->pipe);
  696. maxp = usb_maxpacket (urb->dev, urb->pipe, !is_input);
  697. /* 1024 byte maxpacket is a hardware ceiling. High bandwidth
  698. * acts like up to 3KB, but is built from smaller packets.
  699. */
  700. if (max_packet(maxp) > 1024) {
  701. ehci_dbg(ehci, "bogus qh maxpacket %d\n", max_packet(maxp));
  702. goto done;
  703. }
  704. /* Compute interrupt scheduling parameters just once, and save.
  705. * - allowing for high bandwidth, how many nsec/uframe are used?
  706. * - split transactions need a second CSPLIT uframe; same question
  707. * - splits also need a schedule gap (for full/low speed I/O)
  708. * - qh has a polling interval
  709. *
  710. * For control/bulk requests, the HC or TT handles these.
  711. */
  712. if (type == PIPE_INTERRUPT) {
  713. qh->usecs = NS_TO_US(usb_calc_bus_time(USB_SPEED_HIGH,
  714. is_input, 0,
  715. hb_mult(maxp) * max_packet(maxp)));
  716. qh->start = NO_FRAME;
  717. qh->stamp = ehci->periodic_stamp;
  718. if (urb->dev->speed == USB_SPEED_HIGH) {
  719. qh->c_usecs = 0;
  720. qh->gap_uf = 0;
  721. qh->period = urb->interval >> 3;
  722. if (qh->period == 0 && urb->interval != 1) {
  723. /* NOTE interval 2 or 4 uframes could work.
  724. * But interval 1 scheduling is simpler, and
  725. * includes high bandwidth.
  726. */
  727. urb->interval = 1;
  728. } else if (qh->period > ehci->periodic_size) {
  729. qh->period = ehci->periodic_size;
  730. urb->interval = qh->period << 3;
  731. }
  732. } else {
  733. int think_time;
  734. /* gap is f(FS/LS transfer times) */
  735. qh->gap_uf = 1 + usb_calc_bus_time (urb->dev->speed,
  736. is_input, 0, maxp) / (125 * 1000);
  737. /* FIXME this just approximates SPLIT/CSPLIT times */
  738. if (is_input) { // SPLIT, gap, CSPLIT+DATA
  739. qh->c_usecs = qh->usecs + HS_USECS (0);
  740. qh->usecs = HS_USECS (1);
  741. } else { // SPLIT+DATA, gap, CSPLIT
  742. qh->usecs += HS_USECS (1);
  743. qh->c_usecs = HS_USECS (0);
  744. }
  745. think_time = tt ? tt->think_time : 0;
  746. qh->tt_usecs = NS_TO_US (think_time +
  747. usb_calc_bus_time (urb->dev->speed,
  748. is_input, 0, max_packet (maxp)));
  749. qh->period = urb->interval;
  750. if (qh->period > ehci->periodic_size) {
  751. qh->period = ehci->periodic_size;
  752. urb->interval = qh->period;
  753. }
  754. }
  755. }
  756. /* support for tt scheduling, and access to toggles */
  757. qh->dev = urb->dev;
  758. /* using TT? */
  759. switch (urb->dev->speed) {
  760. case USB_SPEED_LOW:
  761. info1 |= (1 << 12); /* EPS "low" */
  762. /* FALL THROUGH */
  763. case USB_SPEED_FULL:
  764. /* EPS 0 means "full" */
  765. if (type != PIPE_INTERRUPT)
  766. info1 |= (EHCI_TUNE_RL_TT << 28);
  767. if (type == PIPE_CONTROL) {
  768. info1 |= (1 << 27); /* for TT */
  769. info1 |= 1 << 14; /* toggle from qtd */
  770. }
  771. info1 |= maxp << 16;
  772. info2 |= (EHCI_TUNE_MULT_TT << 30);
  773. /* Some Freescale processors have an erratum in which the
  774. * port number in the queue head was 0..N-1 instead of 1..N.
  775. */
  776. if (ehci_has_fsl_portno_bug(ehci))
  777. info2 |= (urb->dev->ttport-1) << 23;
  778. else
  779. info2 |= urb->dev->ttport << 23;
  780. /* set the address of the TT; for TDI's integrated
  781. * root hub tt, leave it zeroed.
  782. */
  783. if (tt && tt->hub != ehci_to_hcd(ehci)->self.root_hub)
  784. info2 |= tt->hub->devnum << 16;
  785. /* NOTE: if (PIPE_INTERRUPT) { scheduler sets c-mask } */
  786. break;
  787. case USB_SPEED_HIGH: /* no TT involved */
  788. info1 |= (2 << 12); /* EPS "high" */
  789. if (type == PIPE_CONTROL) {
  790. info1 |= (EHCI_TUNE_RL_HS << 28);
  791. info1 |= 64 << 16; /* usb2 fixed maxpacket */
  792. info1 |= 1 << 14; /* toggle from qtd */
  793. info2 |= (EHCI_TUNE_MULT_HS << 30);
  794. } else if (type == PIPE_BULK) {
  795. info1 |= (EHCI_TUNE_RL_HS << 28);
  796. /* The USB spec says that high speed bulk endpoints
  797. * always use 512 byte maxpacket. But some device
  798. * vendors decided to ignore that, and MSFT is happy
  799. * to help them do so. So now people expect to use
  800. * such nonconformant devices with Linux too; sigh.
  801. */
  802. info1 |= max_packet(maxp) << 16;
  803. info2 |= (EHCI_TUNE_MULT_HS << 30);
  804. } else { /* PIPE_INTERRUPT */
  805. info1 |= max_packet (maxp) << 16;
  806. info2 |= hb_mult (maxp) << 30;
  807. }
  808. break;
  809. default:
  810. dbg ("bogus dev %p speed %d", urb->dev, urb->dev->speed);
  811. done:
  812. qh_put (qh);
  813. return NULL;
  814. }
  815. /* NOTE: if (PIPE_INTERRUPT) { scheduler sets s-mask } */
  816. /* init as live, toggle clear, advance to dummy */
  817. qh->qh_state = QH_STATE_IDLE;
  818. hw = qh->hw;
  819. hw->hw_info1 = cpu_to_hc32(ehci, info1);
  820. hw->hw_info2 = cpu_to_hc32(ehci, info2);
  821. qh->is_out = !is_input;
  822. usb_settoggle (urb->dev, usb_pipeendpoint (urb->pipe), !is_input, 1);
  823. qh_refresh (ehci, qh);
  824. return qh;
  825. }
  826. /*-------------------------------------------------------------------------*/
  827. /* move qh (and its qtds) onto async queue; maybe enable queue. */
  828. static void qh_link_async (struct ehci_hcd *ehci, struct ehci_qh *qh)
  829. {
  830. __hc32 dma = QH_NEXT(ehci, qh->qh_dma);
  831. struct ehci_qh *head;
  832. /* Don't link a QH if there's a Clear-TT-Buffer pending */
  833. if (unlikely(qh->clearing_tt))
  834. return;
  835. WARN_ON(qh->qh_state != QH_STATE_IDLE);
  836. /* (re)start the async schedule? */
  837. head = ehci->async;
  838. timer_action_done (ehci, TIMER_ASYNC_OFF);
  839. if (!head->qh_next.qh) {
  840. u32 cmd = ehci_readl(ehci, &ehci->regs->command);
  841. if (!(cmd & CMD_ASE)) {
  842. /* in case a clear of CMD_ASE didn't take yet */
  843. (void)handshake(ehci, &ehci->regs->status,
  844. STS_ASS, 0, 150);
  845. cmd |= CMD_ASE;
  846. ehci_writel(ehci, cmd, &ehci->regs->command);
  847. /* posted write need not be known to HC yet ... */
  848. }
  849. }
  850. /* clear halt and/or toggle; and maybe recover from silicon quirk */
  851. qh_refresh(ehci, qh);
  852. /* splice right after start */
  853. qh->qh_next = head->qh_next;
  854. qh->hw->hw_next = head->hw->hw_next;
  855. wmb ();
  856. head->qh_next.qh = qh;
  857. head->hw->hw_next = dma;
  858. qh_get(qh);
  859. qh->xacterrs = 0;
  860. qh->qh_state = QH_STATE_LINKED;
  861. /* qtd completions reported later by interrupt */
  862. }
  863. /*-------------------------------------------------------------------------*/
  864. /*
  865. * For control/bulk/interrupt, return QH with these TDs appended.
  866. * Allocates and initializes the QH if necessary.
  867. * Returns null if it can't allocate a QH it needs to.
  868. * If the QH has TDs (urbs) already, that's great.
  869. */
  870. static struct ehci_qh *qh_append_tds (
  871. struct ehci_hcd *ehci,
  872. struct urb *urb,
  873. struct list_head *qtd_list,
  874. int epnum,
  875. void **ptr
  876. )
  877. {
  878. struct ehci_qh *qh = NULL;
  879. __hc32 qh_addr_mask = cpu_to_hc32(ehci, 0x7f);
  880. qh = (struct ehci_qh *) *ptr;
  881. if (unlikely (qh == NULL)) {
  882. /* can't sleep here, we have ehci->lock... */
  883. qh = qh_make (ehci, urb, GFP_ATOMIC);
  884. *ptr = qh;
  885. }
  886. if (likely (qh != NULL)) {
  887. struct ehci_qtd *qtd;
  888. if (unlikely (list_empty (qtd_list)))
  889. qtd = NULL;
  890. else
  891. qtd = list_entry (qtd_list->next, struct ehci_qtd,
  892. qtd_list);
  893. /* control qh may need patching ... */
  894. if (unlikely (epnum == 0)) {
  895. /* usb_reset_device() briefly reverts to address 0 */
  896. if (usb_pipedevice (urb->pipe) == 0)
  897. qh->hw->hw_info1 &= ~qh_addr_mask;
  898. }
  899. /* just one way to queue requests: swap with the dummy qtd.
  900. * only hc or qh_refresh() ever modify the overlay.
  901. */
  902. if (likely (qtd != NULL)) {
  903. struct ehci_qtd *dummy;
  904. dma_addr_t dma;
  905. __hc32 token;
  906. /* to avoid racing the HC, use the dummy td instead of
  907. * the first td of our list (becomes new dummy). both
  908. * tds stay deactivated until we're done, when the
  909. * HC is allowed to fetch the old dummy (4.10.2).
  910. */
  911. token = qtd->hw_token;
  912. qtd->hw_token = HALT_BIT(ehci);
  913. wmb ();
  914. dummy = qh->dummy;
  915. dma = dummy->qtd_dma;
  916. *dummy = *qtd;
  917. dummy->qtd_dma = dma;
  918. list_del (&qtd->qtd_list);
  919. list_add (&dummy->qtd_list, qtd_list);
  920. list_splice_tail(qtd_list, &qh->qtd_list);
  921. ehci_qtd_init(ehci, qtd, qtd->qtd_dma);
  922. qh->dummy = qtd;
  923. /* hc must see the new dummy at list end */
  924. dma = qtd->qtd_dma;
  925. qtd = list_entry (qh->qtd_list.prev,
  926. struct ehci_qtd, qtd_list);
  927. qtd->hw_next = QTD_NEXT(ehci, dma);
  928. /* let the hc process these next qtds */
  929. wmb ();
  930. dummy->hw_token = token;
  931. urb->hcpriv = qh_get (qh);
  932. }
  933. }
  934. return qh;
  935. }
  936. /*-------------------------------------------------------------------------*/
  937. static int
  938. submit_async (
  939. struct ehci_hcd *ehci,
  940. struct urb *urb,
  941. struct list_head *qtd_list,
  942. gfp_t mem_flags
  943. ) {
  944. int epnum;
  945. unsigned long flags;
  946. struct ehci_qh *qh = NULL;
  947. int rc;
  948. epnum = urb->ep->desc.bEndpointAddress;
  949. #ifdef EHCI_URB_TRACE
  950. {
  951. struct ehci_qtd *qtd;
  952. qtd = list_entry(qtd_list->next, struct ehci_qtd, qtd_list);
  953. ehci_dbg(ehci,
  954. "%s %s urb %p ep%d%s len %d, qtd %p [qh %p]\n",
  955. __func__, urb->dev->devpath, urb,
  956. epnum & 0x0f, (epnum & USB_DIR_IN) ? "in" : "out",
  957. urb->transfer_buffer_length,
  958. qtd, urb->ep->hcpriv);
  959. }
  960. #endif
  961. spin_lock_irqsave (&ehci->lock, flags);
  962. if (unlikely(!HCD_HW_ACCESSIBLE(ehci_to_hcd(ehci)))) {
  963. rc = -ESHUTDOWN;
  964. goto done;
  965. }
  966. rc = usb_hcd_link_urb_to_ep(ehci_to_hcd(ehci), urb);
  967. if (unlikely(rc))
  968. goto done;
  969. qh = qh_append_tds(ehci, urb, qtd_list, epnum, &urb->ep->hcpriv);
  970. if (unlikely(qh == NULL)) {
  971. usb_hcd_unlink_urb_from_ep(ehci_to_hcd(ehci), urb);
  972. rc = -ENOMEM;
  973. goto done;
  974. }
  975. /* Control/bulk operations through TTs don't need scheduling,
  976. * the HC and TT handle it when the TT has a buffer ready.
  977. */
  978. if (likely (qh->qh_state == QH_STATE_IDLE))
  979. qh_link_async(ehci, qh);
  980. done:
  981. spin_unlock_irqrestore (&ehci->lock, flags);
  982. if (unlikely (qh == NULL))
  983. qtd_list_free (ehci, urb, qtd_list);
  984. return rc;
  985. }
  986. /*-------------------------------------------------------------------------*/
  987. /* the async qh for the qtds being reclaimed are now unlinked from the HC */
  988. static void end_unlink_async (struct ehci_hcd *ehci)
  989. {
  990. struct ehci_qh *qh = ehci->reclaim;
  991. struct ehci_qh *next;
  992. iaa_watchdog_done(ehci);
  993. // qh->hw_next = cpu_to_hc32(qh->qh_dma);
  994. qh->qh_state = QH_STATE_IDLE;
  995. qh->qh_next.qh = NULL;
  996. qh_put (qh); // refcount from reclaim
  997. /* other unlink(s) may be pending (in QH_STATE_UNLINK_WAIT) */
  998. next = qh->reclaim;
  999. ehci->reclaim = next;
  1000. qh->reclaim = NULL;
  1001. qh_completions (ehci, qh);
  1002. if (!list_empty(&qh->qtd_list) && ehci->rh_state == EHCI_RH_RUNNING) {
  1003. qh_link_async (ehci, qh);
  1004. } else {
  1005. /* it's not free to turn the async schedule on/off; leave it
  1006. * active but idle for a while once it empties.
  1007. */
  1008. if (ehci->rh_state == EHCI_RH_RUNNING
  1009. && ehci->async->qh_next.qh == NULL)
  1010. timer_action (ehci, TIMER_ASYNC_OFF);
  1011. }
  1012. qh_put(qh); /* refcount from async list */
  1013. if (next) {
  1014. ehci->reclaim = NULL;
  1015. start_unlink_async (ehci, next);
  1016. }
  1017. if (ehci->has_synopsys_hc_bug)
  1018. ehci_writel(ehci, (u32) ehci->async->qh_dma,
  1019. &ehci->regs->async_next);
  1020. }
  1021. /* makes sure the async qh will become idle */
  1022. /* caller must own ehci->lock */
  1023. static void start_unlink_async (struct ehci_hcd *ehci, struct ehci_qh *qh)
  1024. {
  1025. int cmd = ehci_readl(ehci, &ehci->regs->command);
  1026. struct ehci_qh *prev;
  1027. #ifdef DEBUG
  1028. assert_spin_locked(&ehci->lock);
  1029. if (ehci->reclaim
  1030. || (qh->qh_state != QH_STATE_LINKED
  1031. && qh->qh_state != QH_STATE_UNLINK_WAIT)
  1032. )
  1033. BUG ();
  1034. #endif
  1035. /* stop async schedule right now? */
  1036. if (unlikely (qh == ehci->async)) {
  1037. /* can't get here without STS_ASS set */
  1038. if (ehci->rh_state != EHCI_RH_HALTED
  1039. && !ehci->reclaim) {
  1040. /* ... and CMD_IAAD clear */
  1041. ehci_writel(ehci, cmd & ~CMD_ASE,
  1042. &ehci->regs->command);
  1043. wmb ();
  1044. // handshake later, if we need to
  1045. timer_action_done (ehci, TIMER_ASYNC_OFF);
  1046. }
  1047. return;
  1048. }
  1049. qh->qh_state = QH_STATE_UNLINK;
  1050. ehci->reclaim = qh = qh_get (qh);
  1051. prev = ehci->async;
  1052. while (prev->qh_next.qh != qh)
  1053. prev = prev->qh_next.qh;
  1054. prev->hw->hw_next = qh->hw->hw_next;
  1055. prev->qh_next = qh->qh_next;
  1056. if (ehci->qh_scan_next == qh)
  1057. ehci->qh_scan_next = qh->qh_next.qh;
  1058. wmb ();
  1059. /* If the controller isn't running, we don't have to wait for it */
  1060. if (unlikely(ehci->rh_state != EHCI_RH_RUNNING)) {
  1061. /* if (unlikely (qh->reclaim != 0))
  1062. * this will recurse, probably not much
  1063. */
  1064. end_unlink_async (ehci);
  1065. return;
  1066. }
  1067. cmd |= CMD_IAAD;
  1068. ehci_writel(ehci, cmd, &ehci->regs->command);
  1069. (void)ehci_readl(ehci, &ehci->regs->command);
  1070. iaa_watchdog_start(ehci);
  1071. }
  1072. /*-------------------------------------------------------------------------*/
  1073. static void scan_async (struct ehci_hcd *ehci)
  1074. {
  1075. bool stopped;
  1076. struct ehci_qh *qh;
  1077. enum ehci_timer_action action = TIMER_IO_WATCHDOG;
  1078. timer_action_done (ehci, TIMER_ASYNC_SHRINK);
  1079. stopped = (ehci->rh_state != EHCI_RH_RUNNING);
  1080. ehci->qh_scan_next = ehci->async->qh_next.qh;
  1081. while (ehci->qh_scan_next) {
  1082. qh = ehci->qh_scan_next;
  1083. ehci->qh_scan_next = qh->qh_next.qh;
  1084. rescan:
  1085. /* clean any finished work for this qh */
  1086. if (!list_empty(&qh->qtd_list)) {
  1087. int temp;
  1088. /*
  1089. * Unlinks could happen here; completion reporting
  1090. * drops the lock. That's why ehci->qh_scan_next
  1091. * always holds the next qh to scan; if the next qh
  1092. * gets unlinked then ehci->qh_scan_next is adjusted
  1093. * in start_unlink_async().
  1094. */
  1095. qh = qh_get(qh);
  1096. temp = qh_completions(ehci, qh);
  1097. if (qh->needs_rescan)
  1098. unlink_async(ehci, qh);
  1099. qh->unlink_time = jiffies + EHCI_SHRINK_JIFFIES;
  1100. qh_put(qh);
  1101. if (temp != 0)
  1102. goto rescan;
  1103. }
  1104. /* unlink idle entries, reducing DMA usage as well
  1105. * as HCD schedule-scanning costs. delay for any qh
  1106. * we just scanned, there's a not-unusual case that it
  1107. * doesn't stay idle for long.
  1108. * (plus, avoids some kind of re-activation race.)
  1109. */
  1110. if (list_empty(&qh->qtd_list)
  1111. && qh->qh_state == QH_STATE_LINKED) {
  1112. if (!ehci->reclaim && (stopped ||
  1113. time_after_eq(jiffies, qh->unlink_time)))
  1114. start_unlink_async(ehci, qh);
  1115. else
  1116. action = TIMER_ASYNC_SHRINK;
  1117. }
  1118. }
  1119. if (action == TIMER_ASYNC_SHRINK)
  1120. timer_action (ehci, TIMER_ASYNC_SHRINK);
  1121. }