iwl4965-base.c 263 KB

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  1. /******************************************************************************
  2. *
  3. * Copyright(c) 2003 - 2007 Intel Corporation. All rights reserved.
  4. *
  5. * Portions of this file are derived from the ipw3945 project, as well
  6. * as portions of the ieee80211 subsystem header files.
  7. *
  8. * This program is free software; you can redistribute it and/or modify it
  9. * under the terms of version 2 of the GNU General Public License as
  10. * published by the Free Software Foundation.
  11. *
  12. * This program is distributed in the hope that it will be useful, but WITHOUT
  13. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  14. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  15. * more details.
  16. *
  17. * You should have received a copy of the GNU General Public License along with
  18. * this program; if not, write to the Free Software Foundation, Inc.,
  19. * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  20. *
  21. * The full GNU General Public License is included in this distribution in the
  22. * file called LICENSE.
  23. *
  24. * Contact Information:
  25. * James P. Ketrenos <ipw2100-admin@linux.intel.com>
  26. * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  27. *
  28. *****************************************************************************/
  29. /*
  30. * NOTE: This file (iwl-base.c) is used to build to multiple hardware targets
  31. * by defining IWL to either 3945 or 4965. The Makefile used when building
  32. * the base targets will create base-3945.o and base-4965.o
  33. *
  34. * The eventual goal is to move as many of the #if IWL / #endif blocks out of
  35. * this file and into the hardware specific implementation files (iwl-XXXX.c)
  36. * and leave only the common (non #ifdef sprinkled) code in this file
  37. */
  38. #include <linux/kernel.h>
  39. #include <linux/module.h>
  40. #include <linux/version.h>
  41. #include <linux/init.h>
  42. #include <linux/pci.h>
  43. #include <linux/dma-mapping.h>
  44. #include <linux/delay.h>
  45. #include <linux/skbuff.h>
  46. #include <linux/netdevice.h>
  47. #include <linux/wireless.h>
  48. #include <linux/firmware.h>
  49. #include <linux/etherdevice.h>
  50. #include <linux/if_arp.h>
  51. #include <net/ieee80211_radiotap.h>
  52. #include <net/mac80211.h>
  53. #include <asm/div64.h>
  54. #include "iwl-4965.h"
  55. #include "iwl-helpers.h"
  56. #ifdef CONFIG_IWL4965_DEBUG
  57. u32 iwl4965_debug_level;
  58. #endif
  59. static int iwl4965_tx_queue_update_write_ptr(struct iwl4965_priv *priv,
  60. struct iwl4965_tx_queue *txq);
  61. /******************************************************************************
  62. *
  63. * module boiler plate
  64. *
  65. ******************************************************************************/
  66. /* module parameters */
  67. static int iwl4965_param_disable_hw_scan;
  68. static int iwl4965_param_debug;
  69. static int iwl4965_param_disable; /* def: enable radio */
  70. static int iwl4965_param_antenna; /* def: 0 = both antennas (use diversity) */
  71. int iwl4965_param_hwcrypto; /* def: using software encryption */
  72. static int iwl4965_param_qos_enable = 1;
  73. int iwl4965_param_queues_num = IWL_MAX_NUM_QUEUES;
  74. /*
  75. * module name, copyright, version, etc.
  76. * NOTE: DRV_NAME is defined in iwlwifi.h for use by iwl-debug.h and printk
  77. */
  78. #define DRV_DESCRIPTION "Intel(R) Wireless WiFi Link 4965AGN driver for Linux"
  79. #ifdef CONFIG_IWL4965_DEBUG
  80. #define VD "d"
  81. #else
  82. #define VD
  83. #endif
  84. #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
  85. #define VS "s"
  86. #else
  87. #define VS
  88. #endif
  89. #define IWLWIFI_VERSION "1.1.19k" VD VS
  90. #define DRV_COPYRIGHT "Copyright(c) 2003-2007 Intel Corporation"
  91. #define DRV_VERSION IWLWIFI_VERSION
  92. /* Change firmware file name, using "-" and incrementing number,
  93. * *only* when uCode interface or architecture changes so that it
  94. * is not compatible with earlier drivers.
  95. * This number will also appear in << 8 position of 1st dword of uCode file */
  96. #define IWL4965_UCODE_API "-1"
  97. MODULE_DESCRIPTION(DRV_DESCRIPTION);
  98. MODULE_VERSION(DRV_VERSION);
  99. MODULE_AUTHOR(DRV_COPYRIGHT);
  100. MODULE_LICENSE("GPL");
  101. __le16 *ieee80211_get_qos_ctrl(struct ieee80211_hdr *hdr)
  102. {
  103. u16 fc = le16_to_cpu(hdr->frame_control);
  104. int hdr_len = ieee80211_get_hdrlen(fc);
  105. if ((fc & 0x00cc) == (IEEE80211_STYPE_QOS_DATA | IEEE80211_FTYPE_DATA))
  106. return (__le16 *) ((u8 *) hdr + hdr_len - QOS_CONTROL_LEN);
  107. return NULL;
  108. }
  109. static const struct ieee80211_hw_mode *iwl4965_get_hw_mode(
  110. struct iwl4965_priv *priv, int mode)
  111. {
  112. int i;
  113. for (i = 0; i < 3; i++)
  114. if (priv->modes[i].mode == mode)
  115. return &priv->modes[i];
  116. return NULL;
  117. }
  118. static int iwl4965_is_empty_essid(const char *essid, int essid_len)
  119. {
  120. /* Single white space is for Linksys APs */
  121. if (essid_len == 1 && essid[0] == ' ')
  122. return 1;
  123. /* Otherwise, if the entire essid is 0, we assume it is hidden */
  124. while (essid_len) {
  125. essid_len--;
  126. if (essid[essid_len] != '\0')
  127. return 0;
  128. }
  129. return 1;
  130. }
  131. static const char *iwl4965_escape_essid(const char *essid, u8 essid_len)
  132. {
  133. static char escaped[IW_ESSID_MAX_SIZE * 2 + 1];
  134. const char *s = essid;
  135. char *d = escaped;
  136. if (iwl4965_is_empty_essid(essid, essid_len)) {
  137. memcpy(escaped, "<hidden>", sizeof("<hidden>"));
  138. return escaped;
  139. }
  140. essid_len = min(essid_len, (u8) IW_ESSID_MAX_SIZE);
  141. while (essid_len--) {
  142. if (*s == '\0') {
  143. *d++ = '\\';
  144. *d++ = '0';
  145. s++;
  146. } else
  147. *d++ = *s++;
  148. }
  149. *d = '\0';
  150. return escaped;
  151. }
  152. static void iwl4965_print_hex_dump(int level, void *p, u32 len)
  153. {
  154. #ifdef CONFIG_IWL4965_DEBUG
  155. if (!(iwl4965_debug_level & level))
  156. return;
  157. print_hex_dump(KERN_DEBUG, "iwl data: ", DUMP_PREFIX_OFFSET, 16, 1,
  158. p, len, 1);
  159. #endif
  160. }
  161. /*************** DMA-QUEUE-GENERAL-FUNCTIONS *****
  162. * DMA services
  163. *
  164. * Theory of operation
  165. *
  166. * A queue is a circular buffers with 'Read' and 'Write' pointers.
  167. * 2 empty entries always kept in the buffer to protect from overflow.
  168. *
  169. * For Tx queue, there are low mark and high mark limits. If, after queuing
  170. * the packet for Tx, free space become < low mark, Tx queue stopped. When
  171. * reclaiming packets (on 'tx done IRQ), if free space become > high mark,
  172. * Tx queue resumed.
  173. *
  174. * The IWL operates with six queues, one receive queue in the device's
  175. * sram, one transmit queue for sending commands to the device firmware,
  176. * and four transmit queues for data.
  177. ***************************************************/
  178. static int iwl4965_queue_space(const struct iwl4965_queue *q)
  179. {
  180. int s = q->read_ptr - q->write_ptr;
  181. if (q->read_ptr > q->write_ptr)
  182. s -= q->n_bd;
  183. if (s <= 0)
  184. s += q->n_window;
  185. /* keep some reserve to not confuse empty and full situations */
  186. s -= 2;
  187. if (s < 0)
  188. s = 0;
  189. return s;
  190. }
  191. /* XXX: n_bd must be power-of-two size */
  192. static inline int iwl4965_queue_inc_wrap(int index, int n_bd)
  193. {
  194. return ++index & (n_bd - 1);
  195. }
  196. /* XXX: n_bd must be power-of-two size */
  197. static inline int iwl4965_queue_dec_wrap(int index, int n_bd)
  198. {
  199. return --index & (n_bd - 1);
  200. }
  201. static inline int x2_queue_used(const struct iwl4965_queue *q, int i)
  202. {
  203. return q->write_ptr > q->read_ptr ?
  204. (i >= q->read_ptr && i < q->write_ptr) :
  205. !(i < q->read_ptr && i >= q->write_ptr);
  206. }
  207. static inline u8 get_cmd_index(struct iwl4965_queue *q, u32 index, int is_huge)
  208. {
  209. if (is_huge)
  210. return q->n_window;
  211. return index & (q->n_window - 1);
  212. }
  213. static int iwl4965_queue_init(struct iwl4965_priv *priv, struct iwl4965_queue *q,
  214. int count, int slots_num, u32 id)
  215. {
  216. q->n_bd = count;
  217. q->n_window = slots_num;
  218. q->id = id;
  219. /* count must be power-of-two size, otherwise iwl4965_queue_inc_wrap
  220. * and iwl4965_queue_dec_wrap are broken. */
  221. BUG_ON(!is_power_of_2(count));
  222. /* slots_num must be power-of-two size, otherwise
  223. * get_cmd_index is broken. */
  224. BUG_ON(!is_power_of_2(slots_num));
  225. q->low_mark = q->n_window / 4;
  226. if (q->low_mark < 4)
  227. q->low_mark = 4;
  228. q->high_mark = q->n_window / 8;
  229. if (q->high_mark < 2)
  230. q->high_mark = 2;
  231. q->write_ptr = q->read_ptr = 0;
  232. return 0;
  233. }
  234. static int iwl4965_tx_queue_alloc(struct iwl4965_priv *priv,
  235. struct iwl4965_tx_queue *txq, u32 id)
  236. {
  237. struct pci_dev *dev = priv->pci_dev;
  238. if (id != IWL_CMD_QUEUE_NUM) {
  239. txq->txb = kmalloc(sizeof(txq->txb[0]) *
  240. TFD_QUEUE_SIZE_MAX, GFP_KERNEL);
  241. if (!txq->txb) {
  242. IWL_ERROR("kmalloc for auxiliary BD "
  243. "structures failed\n");
  244. goto error;
  245. }
  246. } else
  247. txq->txb = NULL;
  248. txq->bd = pci_alloc_consistent(dev,
  249. sizeof(txq->bd[0]) * TFD_QUEUE_SIZE_MAX,
  250. &txq->q.dma_addr);
  251. if (!txq->bd) {
  252. IWL_ERROR("pci_alloc_consistent(%zd) failed\n",
  253. sizeof(txq->bd[0]) * TFD_QUEUE_SIZE_MAX);
  254. goto error;
  255. }
  256. txq->q.id = id;
  257. return 0;
  258. error:
  259. if (txq->txb) {
  260. kfree(txq->txb);
  261. txq->txb = NULL;
  262. }
  263. return -ENOMEM;
  264. }
  265. int iwl4965_tx_queue_init(struct iwl4965_priv *priv,
  266. struct iwl4965_tx_queue *txq, int slots_num, u32 txq_id)
  267. {
  268. struct pci_dev *dev = priv->pci_dev;
  269. int len;
  270. int rc = 0;
  271. /* allocate command space + one big command for scan since scan
  272. * command is very huge the system will not have two scan at the
  273. * same time */
  274. len = sizeof(struct iwl4965_cmd) * slots_num;
  275. if (txq_id == IWL_CMD_QUEUE_NUM)
  276. len += IWL_MAX_SCAN_SIZE;
  277. txq->cmd = pci_alloc_consistent(dev, len, &txq->dma_addr_cmd);
  278. if (!txq->cmd)
  279. return -ENOMEM;
  280. rc = iwl4965_tx_queue_alloc(priv, txq, txq_id);
  281. if (rc) {
  282. pci_free_consistent(dev, len, txq->cmd, txq->dma_addr_cmd);
  283. return -ENOMEM;
  284. }
  285. txq->need_update = 0;
  286. /* TFD_QUEUE_SIZE_MAX must be power-of-two size, otherwise
  287. * iwl4965_queue_inc_wrap and iwl4965_queue_dec_wrap are broken. */
  288. BUILD_BUG_ON(TFD_QUEUE_SIZE_MAX & (TFD_QUEUE_SIZE_MAX - 1));
  289. iwl4965_queue_init(priv, &txq->q, TFD_QUEUE_SIZE_MAX, slots_num, txq_id);
  290. iwl4965_hw_tx_queue_init(priv, txq);
  291. return 0;
  292. }
  293. /**
  294. * iwl4965_tx_queue_free - Deallocate DMA queue.
  295. * @txq: Transmit queue to deallocate.
  296. *
  297. * Empty queue by removing and destroying all BD's.
  298. * Free all buffers. txq itself is not freed.
  299. *
  300. */
  301. void iwl4965_tx_queue_free(struct iwl4965_priv *priv, struct iwl4965_tx_queue *txq)
  302. {
  303. struct iwl4965_queue *q = &txq->q;
  304. struct pci_dev *dev = priv->pci_dev;
  305. int len;
  306. if (q->n_bd == 0)
  307. return;
  308. /* first, empty all BD's */
  309. for (; q->write_ptr != q->read_ptr;
  310. q->read_ptr = iwl4965_queue_inc_wrap(q->read_ptr, q->n_bd))
  311. iwl4965_hw_txq_free_tfd(priv, txq);
  312. len = sizeof(struct iwl4965_cmd) * q->n_window;
  313. if (q->id == IWL_CMD_QUEUE_NUM)
  314. len += IWL_MAX_SCAN_SIZE;
  315. pci_free_consistent(dev, len, txq->cmd, txq->dma_addr_cmd);
  316. /* free buffers belonging to queue itself */
  317. if (txq->q.n_bd)
  318. pci_free_consistent(dev, sizeof(struct iwl4965_tfd_frame) *
  319. txq->q.n_bd, txq->bd, txq->q.dma_addr);
  320. if (txq->txb) {
  321. kfree(txq->txb);
  322. txq->txb = NULL;
  323. }
  324. /* 0 fill whole structure */
  325. memset(txq, 0, sizeof(*txq));
  326. }
  327. const u8 iwl4965_broadcast_addr[ETH_ALEN] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF };
  328. /*************** STATION TABLE MANAGEMENT ****
  329. *
  330. * NOTE: This needs to be overhauled to better synchronize between
  331. * how the iwl-4965.c is using iwl4965_hw_find_station vs. iwl-3945.c
  332. *
  333. * mac80211 should also be examined to determine if sta_info is duplicating
  334. * the functionality provided here
  335. */
  336. /**************************************************************/
  337. #if 0 /* temporary disable till we add real remove station */
  338. static u8 iwl4965_remove_station(struct iwl4965_priv *priv, const u8 *addr, int is_ap)
  339. {
  340. int index = IWL_INVALID_STATION;
  341. int i;
  342. unsigned long flags;
  343. spin_lock_irqsave(&priv->sta_lock, flags);
  344. if (is_ap)
  345. index = IWL_AP_ID;
  346. else if (is_broadcast_ether_addr(addr))
  347. index = priv->hw_setting.bcast_sta_id;
  348. else
  349. for (i = IWL_STA_ID; i < priv->hw_setting.max_stations; i++)
  350. if (priv->stations[i].used &&
  351. !compare_ether_addr(priv->stations[i].sta.sta.addr,
  352. addr)) {
  353. index = i;
  354. break;
  355. }
  356. if (unlikely(index == IWL_INVALID_STATION))
  357. goto out;
  358. if (priv->stations[index].used) {
  359. priv->stations[index].used = 0;
  360. priv->num_stations--;
  361. }
  362. BUG_ON(priv->num_stations < 0);
  363. out:
  364. spin_unlock_irqrestore(&priv->sta_lock, flags);
  365. return 0;
  366. }
  367. #endif
  368. static void iwl4965_clear_stations_table(struct iwl4965_priv *priv)
  369. {
  370. unsigned long flags;
  371. spin_lock_irqsave(&priv->sta_lock, flags);
  372. priv->num_stations = 0;
  373. memset(priv->stations, 0, sizeof(priv->stations));
  374. spin_unlock_irqrestore(&priv->sta_lock, flags);
  375. }
  376. u8 iwl4965_add_station_flags(struct iwl4965_priv *priv, const u8 *addr, int is_ap, u8 flags)
  377. {
  378. int i;
  379. int index = IWL_INVALID_STATION;
  380. struct iwl4965_station_entry *station;
  381. unsigned long flags_spin;
  382. DECLARE_MAC_BUF(mac);
  383. spin_lock_irqsave(&priv->sta_lock, flags_spin);
  384. if (is_ap)
  385. index = IWL_AP_ID;
  386. else if (is_broadcast_ether_addr(addr))
  387. index = priv->hw_setting.bcast_sta_id;
  388. else
  389. for (i = IWL_STA_ID; i < priv->hw_setting.max_stations; i++) {
  390. if (!compare_ether_addr(priv->stations[i].sta.sta.addr,
  391. addr)) {
  392. index = i;
  393. break;
  394. }
  395. if (!priv->stations[i].used &&
  396. index == IWL_INVALID_STATION)
  397. index = i;
  398. }
  399. /* These two conditions has the same outcome but keep them separate
  400. since they have different meaning */
  401. if (unlikely(index == IWL_INVALID_STATION)) {
  402. spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
  403. return index;
  404. }
  405. if (priv->stations[index].used &&
  406. !compare_ether_addr(priv->stations[index].sta.sta.addr, addr)) {
  407. spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
  408. return index;
  409. }
  410. IWL_DEBUG_ASSOC("Add STA ID %d: %s\n", index, print_mac(mac, addr));
  411. station = &priv->stations[index];
  412. station->used = 1;
  413. priv->num_stations++;
  414. memset(&station->sta, 0, sizeof(struct iwl4965_addsta_cmd));
  415. memcpy(station->sta.sta.addr, addr, ETH_ALEN);
  416. station->sta.mode = 0;
  417. station->sta.sta.sta_id = index;
  418. station->sta.station_flags = 0;
  419. #ifdef CONFIG_IWL4965_HT
  420. /* BCAST station and IBSS stations do not work in HT mode */
  421. if (index != priv->hw_setting.bcast_sta_id &&
  422. priv->iw_mode != IEEE80211_IF_TYPE_IBSS)
  423. iwl4965_set_ht_add_station(priv, index);
  424. #endif /*CONFIG_IWL4965_HT*/
  425. spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
  426. iwl4965_send_add_station(priv, &station->sta, flags);
  427. return index;
  428. }
  429. /*************** DRIVER STATUS FUNCTIONS *****/
  430. static inline int iwl4965_is_ready(struct iwl4965_priv *priv)
  431. {
  432. /* The adapter is 'ready' if READY and GEO_CONFIGURED bits are
  433. * set but EXIT_PENDING is not */
  434. return test_bit(STATUS_READY, &priv->status) &&
  435. test_bit(STATUS_GEO_CONFIGURED, &priv->status) &&
  436. !test_bit(STATUS_EXIT_PENDING, &priv->status);
  437. }
  438. static inline int iwl4965_is_alive(struct iwl4965_priv *priv)
  439. {
  440. return test_bit(STATUS_ALIVE, &priv->status);
  441. }
  442. static inline int iwl4965_is_init(struct iwl4965_priv *priv)
  443. {
  444. return test_bit(STATUS_INIT, &priv->status);
  445. }
  446. static inline int iwl4965_is_rfkill(struct iwl4965_priv *priv)
  447. {
  448. return test_bit(STATUS_RF_KILL_HW, &priv->status) ||
  449. test_bit(STATUS_RF_KILL_SW, &priv->status);
  450. }
  451. static inline int iwl4965_is_ready_rf(struct iwl4965_priv *priv)
  452. {
  453. if (iwl4965_is_rfkill(priv))
  454. return 0;
  455. return iwl4965_is_ready(priv);
  456. }
  457. /*************** HOST COMMAND QUEUE FUNCTIONS *****/
  458. #define IWL_CMD(x) case x : return #x
  459. static const char *get_cmd_string(u8 cmd)
  460. {
  461. switch (cmd) {
  462. IWL_CMD(REPLY_ALIVE);
  463. IWL_CMD(REPLY_ERROR);
  464. IWL_CMD(REPLY_RXON);
  465. IWL_CMD(REPLY_RXON_ASSOC);
  466. IWL_CMD(REPLY_QOS_PARAM);
  467. IWL_CMD(REPLY_RXON_TIMING);
  468. IWL_CMD(REPLY_ADD_STA);
  469. IWL_CMD(REPLY_REMOVE_STA);
  470. IWL_CMD(REPLY_REMOVE_ALL_STA);
  471. IWL_CMD(REPLY_TX);
  472. IWL_CMD(REPLY_RATE_SCALE);
  473. IWL_CMD(REPLY_LEDS_CMD);
  474. IWL_CMD(REPLY_TX_LINK_QUALITY_CMD);
  475. IWL_CMD(RADAR_NOTIFICATION);
  476. IWL_CMD(REPLY_QUIET_CMD);
  477. IWL_CMD(REPLY_CHANNEL_SWITCH);
  478. IWL_CMD(CHANNEL_SWITCH_NOTIFICATION);
  479. IWL_CMD(REPLY_SPECTRUM_MEASUREMENT_CMD);
  480. IWL_CMD(SPECTRUM_MEASURE_NOTIFICATION);
  481. IWL_CMD(POWER_TABLE_CMD);
  482. IWL_CMD(PM_SLEEP_NOTIFICATION);
  483. IWL_CMD(PM_DEBUG_STATISTIC_NOTIFIC);
  484. IWL_CMD(REPLY_SCAN_CMD);
  485. IWL_CMD(REPLY_SCAN_ABORT_CMD);
  486. IWL_CMD(SCAN_START_NOTIFICATION);
  487. IWL_CMD(SCAN_RESULTS_NOTIFICATION);
  488. IWL_CMD(SCAN_COMPLETE_NOTIFICATION);
  489. IWL_CMD(BEACON_NOTIFICATION);
  490. IWL_CMD(REPLY_TX_BEACON);
  491. IWL_CMD(WHO_IS_AWAKE_NOTIFICATION);
  492. IWL_CMD(QUIET_NOTIFICATION);
  493. IWL_CMD(REPLY_TX_PWR_TABLE_CMD);
  494. IWL_CMD(MEASURE_ABORT_NOTIFICATION);
  495. IWL_CMD(REPLY_BT_CONFIG);
  496. IWL_CMD(REPLY_STATISTICS_CMD);
  497. IWL_CMD(STATISTICS_NOTIFICATION);
  498. IWL_CMD(REPLY_CARD_STATE_CMD);
  499. IWL_CMD(CARD_STATE_NOTIFICATION);
  500. IWL_CMD(MISSED_BEACONS_NOTIFICATION);
  501. IWL_CMD(REPLY_CT_KILL_CONFIG_CMD);
  502. IWL_CMD(SENSITIVITY_CMD);
  503. IWL_CMD(REPLY_PHY_CALIBRATION_CMD);
  504. IWL_CMD(REPLY_RX_PHY_CMD);
  505. IWL_CMD(REPLY_RX_MPDU_CMD);
  506. IWL_CMD(REPLY_4965_RX);
  507. IWL_CMD(REPLY_COMPRESSED_BA);
  508. default:
  509. return "UNKNOWN";
  510. }
  511. }
  512. #define HOST_COMPLETE_TIMEOUT (HZ / 2)
  513. /**
  514. * iwl4965_enqueue_hcmd - enqueue a uCode command
  515. * @priv: device private data point
  516. * @cmd: a point to the ucode command structure
  517. *
  518. * The function returns < 0 values to indicate the operation is
  519. * failed. On success, it turns the index (> 0) of command in the
  520. * command queue.
  521. */
  522. static int iwl4965_enqueue_hcmd(struct iwl4965_priv *priv, struct iwl4965_host_cmd *cmd)
  523. {
  524. struct iwl4965_tx_queue *txq = &priv->txq[IWL_CMD_QUEUE_NUM];
  525. struct iwl4965_queue *q = &txq->q;
  526. struct iwl4965_tfd_frame *tfd;
  527. u32 *control_flags;
  528. struct iwl4965_cmd *out_cmd;
  529. u32 idx;
  530. u16 fix_size = (u16)(cmd->len + sizeof(out_cmd->hdr));
  531. dma_addr_t phys_addr;
  532. int ret;
  533. unsigned long flags;
  534. /* If any of the command structures end up being larger than
  535. * the TFD_MAX_PAYLOAD_SIZE, and it sent as a 'small' command then
  536. * we will need to increase the size of the TFD entries */
  537. BUG_ON((fix_size > TFD_MAX_PAYLOAD_SIZE) &&
  538. !(cmd->meta.flags & CMD_SIZE_HUGE));
  539. if (iwl4965_queue_space(q) < ((cmd->meta.flags & CMD_ASYNC) ? 2 : 1)) {
  540. IWL_ERROR("No space for Tx\n");
  541. return -ENOSPC;
  542. }
  543. spin_lock_irqsave(&priv->hcmd_lock, flags);
  544. tfd = &txq->bd[q->write_ptr];
  545. memset(tfd, 0, sizeof(*tfd));
  546. control_flags = (u32 *) tfd;
  547. idx = get_cmd_index(q, q->write_ptr, cmd->meta.flags & CMD_SIZE_HUGE);
  548. out_cmd = &txq->cmd[idx];
  549. out_cmd->hdr.cmd = cmd->id;
  550. memcpy(&out_cmd->meta, &cmd->meta, sizeof(cmd->meta));
  551. memcpy(&out_cmd->cmd.payload, cmd->data, cmd->len);
  552. /* At this point, the out_cmd now has all of the incoming cmd
  553. * information */
  554. out_cmd->hdr.flags = 0;
  555. out_cmd->hdr.sequence = cpu_to_le16(QUEUE_TO_SEQ(IWL_CMD_QUEUE_NUM) |
  556. INDEX_TO_SEQ(q->write_ptr));
  557. if (out_cmd->meta.flags & CMD_SIZE_HUGE)
  558. out_cmd->hdr.sequence |= cpu_to_le16(SEQ_HUGE_FRAME);
  559. phys_addr = txq->dma_addr_cmd + sizeof(txq->cmd[0]) * idx +
  560. offsetof(struct iwl4965_cmd, hdr);
  561. iwl4965_hw_txq_attach_buf_to_tfd(priv, tfd, phys_addr, fix_size);
  562. IWL_DEBUG_HC("Sending command %s (#%x), seq: 0x%04X, "
  563. "%d bytes at %d[%d]:%d\n",
  564. get_cmd_string(out_cmd->hdr.cmd),
  565. out_cmd->hdr.cmd, le16_to_cpu(out_cmd->hdr.sequence),
  566. fix_size, q->write_ptr, idx, IWL_CMD_QUEUE_NUM);
  567. txq->need_update = 1;
  568. ret = iwl4965_tx_queue_update_wr_ptr(priv, txq, 0);
  569. q->write_ptr = iwl4965_queue_inc_wrap(q->write_ptr, q->n_bd);
  570. iwl4965_tx_queue_update_write_ptr(priv, txq);
  571. spin_unlock_irqrestore(&priv->hcmd_lock, flags);
  572. return ret ? ret : idx;
  573. }
  574. static int iwl4965_send_cmd_async(struct iwl4965_priv *priv, struct iwl4965_host_cmd *cmd)
  575. {
  576. int ret;
  577. BUG_ON(!(cmd->meta.flags & CMD_ASYNC));
  578. /* An asynchronous command can not expect an SKB to be set. */
  579. BUG_ON(cmd->meta.flags & CMD_WANT_SKB);
  580. /* An asynchronous command MUST have a callback. */
  581. BUG_ON(!cmd->meta.u.callback);
  582. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  583. return -EBUSY;
  584. ret = iwl4965_enqueue_hcmd(priv, cmd);
  585. if (ret < 0) {
  586. IWL_ERROR("Error sending %s: iwl4965_enqueue_hcmd failed: %d\n",
  587. get_cmd_string(cmd->id), ret);
  588. return ret;
  589. }
  590. return 0;
  591. }
  592. static int iwl4965_send_cmd_sync(struct iwl4965_priv *priv, struct iwl4965_host_cmd *cmd)
  593. {
  594. int cmd_idx;
  595. int ret;
  596. static atomic_t entry = ATOMIC_INIT(0); /* reentrance protection */
  597. BUG_ON(cmd->meta.flags & CMD_ASYNC);
  598. /* A synchronous command can not have a callback set. */
  599. BUG_ON(cmd->meta.u.callback != NULL);
  600. if (atomic_xchg(&entry, 1)) {
  601. IWL_ERROR("Error sending %s: Already sending a host command\n",
  602. get_cmd_string(cmd->id));
  603. return -EBUSY;
  604. }
  605. set_bit(STATUS_HCMD_ACTIVE, &priv->status);
  606. if (cmd->meta.flags & CMD_WANT_SKB)
  607. cmd->meta.source = &cmd->meta;
  608. cmd_idx = iwl4965_enqueue_hcmd(priv, cmd);
  609. if (cmd_idx < 0) {
  610. ret = cmd_idx;
  611. IWL_ERROR("Error sending %s: iwl4965_enqueue_hcmd failed: %d\n",
  612. get_cmd_string(cmd->id), ret);
  613. goto out;
  614. }
  615. ret = wait_event_interruptible_timeout(priv->wait_command_queue,
  616. !test_bit(STATUS_HCMD_ACTIVE, &priv->status),
  617. HOST_COMPLETE_TIMEOUT);
  618. if (!ret) {
  619. if (test_bit(STATUS_HCMD_ACTIVE, &priv->status)) {
  620. IWL_ERROR("Error sending %s: time out after %dms.\n",
  621. get_cmd_string(cmd->id),
  622. jiffies_to_msecs(HOST_COMPLETE_TIMEOUT));
  623. clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
  624. ret = -ETIMEDOUT;
  625. goto cancel;
  626. }
  627. }
  628. if (test_bit(STATUS_RF_KILL_HW, &priv->status)) {
  629. IWL_DEBUG_INFO("Command %s aborted: RF KILL Switch\n",
  630. get_cmd_string(cmd->id));
  631. ret = -ECANCELED;
  632. goto fail;
  633. }
  634. if (test_bit(STATUS_FW_ERROR, &priv->status)) {
  635. IWL_DEBUG_INFO("Command %s failed: FW Error\n",
  636. get_cmd_string(cmd->id));
  637. ret = -EIO;
  638. goto fail;
  639. }
  640. if ((cmd->meta.flags & CMD_WANT_SKB) && !cmd->meta.u.skb) {
  641. IWL_ERROR("Error: Response NULL in '%s'\n",
  642. get_cmd_string(cmd->id));
  643. ret = -EIO;
  644. goto out;
  645. }
  646. ret = 0;
  647. goto out;
  648. cancel:
  649. if (cmd->meta.flags & CMD_WANT_SKB) {
  650. struct iwl4965_cmd *qcmd;
  651. /* Cancel the CMD_WANT_SKB flag for the cmd in the
  652. * TX cmd queue. Otherwise in case the cmd comes
  653. * in later, it will possibly set an invalid
  654. * address (cmd->meta.source). */
  655. qcmd = &priv->txq[IWL_CMD_QUEUE_NUM].cmd[cmd_idx];
  656. qcmd->meta.flags &= ~CMD_WANT_SKB;
  657. }
  658. fail:
  659. if (cmd->meta.u.skb) {
  660. dev_kfree_skb_any(cmd->meta.u.skb);
  661. cmd->meta.u.skb = NULL;
  662. }
  663. out:
  664. atomic_set(&entry, 0);
  665. return ret;
  666. }
  667. int iwl4965_send_cmd(struct iwl4965_priv *priv, struct iwl4965_host_cmd *cmd)
  668. {
  669. if (cmd->meta.flags & CMD_ASYNC)
  670. return iwl4965_send_cmd_async(priv, cmd);
  671. return iwl4965_send_cmd_sync(priv, cmd);
  672. }
  673. int iwl4965_send_cmd_pdu(struct iwl4965_priv *priv, u8 id, u16 len, const void *data)
  674. {
  675. struct iwl4965_host_cmd cmd = {
  676. .id = id,
  677. .len = len,
  678. .data = data,
  679. };
  680. return iwl4965_send_cmd_sync(priv, &cmd);
  681. }
  682. static int __must_check iwl4965_send_cmd_u32(struct iwl4965_priv *priv, u8 id, u32 val)
  683. {
  684. struct iwl4965_host_cmd cmd = {
  685. .id = id,
  686. .len = sizeof(val),
  687. .data = &val,
  688. };
  689. return iwl4965_send_cmd_sync(priv, &cmd);
  690. }
  691. int iwl4965_send_statistics_request(struct iwl4965_priv *priv)
  692. {
  693. return iwl4965_send_cmd_u32(priv, REPLY_STATISTICS_CMD, 0);
  694. }
  695. /**
  696. * iwl4965_rxon_add_station - add station into station table.
  697. *
  698. * there is only one AP station with id= IWL_AP_ID
  699. * NOTE: mutex must be held before calling the this fnction
  700. */
  701. static int iwl4965_rxon_add_station(struct iwl4965_priv *priv,
  702. const u8 *addr, int is_ap)
  703. {
  704. u8 sta_id;
  705. sta_id = iwl4965_add_station_flags(priv, addr, is_ap, 0);
  706. iwl4965_add_station(priv, addr, is_ap);
  707. return sta_id;
  708. }
  709. /**
  710. * iwl4965_set_rxon_channel - Set the phymode and channel values in staging RXON
  711. * @phymode: MODE_IEEE80211A sets to 5.2GHz; all else set to 2.4GHz
  712. * @channel: Any channel valid for the requested phymode
  713. * In addition to setting the staging RXON, priv->phymode is also set.
  714. *
  715. * NOTE: Does not commit to the hardware; it sets appropriate bit fields
  716. * in the staging RXON flag structure based on the phymode
  717. */
  718. static int iwl4965_set_rxon_channel(struct iwl4965_priv *priv, u8 phymode, u16 channel)
  719. {
  720. if (!iwl4965_get_channel_info(priv, phymode, channel)) {
  721. IWL_DEBUG_INFO("Could not set channel to %d [%d]\n",
  722. channel, phymode);
  723. return -EINVAL;
  724. }
  725. if ((le16_to_cpu(priv->staging_rxon.channel) == channel) &&
  726. (priv->phymode == phymode))
  727. return 0;
  728. priv->staging_rxon.channel = cpu_to_le16(channel);
  729. if (phymode == MODE_IEEE80211A)
  730. priv->staging_rxon.flags &= ~RXON_FLG_BAND_24G_MSK;
  731. else
  732. priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
  733. priv->phymode = phymode;
  734. IWL_DEBUG_INFO("Staging channel set to %d [%d]\n", channel, phymode);
  735. return 0;
  736. }
  737. /**
  738. * iwl4965_check_rxon_cmd - validate RXON structure is valid
  739. *
  740. * NOTE: This is really only useful during development and can eventually
  741. * be #ifdef'd out once the driver is stable and folks aren't actively
  742. * making changes
  743. */
  744. static int iwl4965_check_rxon_cmd(struct iwl4965_rxon_cmd *rxon)
  745. {
  746. int error = 0;
  747. int counter = 1;
  748. if (rxon->flags & RXON_FLG_BAND_24G_MSK) {
  749. error |= le32_to_cpu(rxon->flags &
  750. (RXON_FLG_TGJ_NARROW_BAND_MSK |
  751. RXON_FLG_RADAR_DETECT_MSK));
  752. if (error)
  753. IWL_WARNING("check 24G fields %d | %d\n",
  754. counter++, error);
  755. } else {
  756. error |= (rxon->flags & RXON_FLG_SHORT_SLOT_MSK) ?
  757. 0 : le32_to_cpu(RXON_FLG_SHORT_SLOT_MSK);
  758. if (error)
  759. IWL_WARNING("check 52 fields %d | %d\n",
  760. counter++, error);
  761. error |= le32_to_cpu(rxon->flags & RXON_FLG_CCK_MSK);
  762. if (error)
  763. IWL_WARNING("check 52 CCK %d | %d\n",
  764. counter++, error);
  765. }
  766. error |= (rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1;
  767. if (error)
  768. IWL_WARNING("check mac addr %d | %d\n", counter++, error);
  769. /* make sure basic rates 6Mbps and 1Mbps are supported */
  770. error |= (((rxon->ofdm_basic_rates & IWL_RATE_6M_MASK) == 0) &&
  771. ((rxon->cck_basic_rates & IWL_RATE_1M_MASK) == 0));
  772. if (error)
  773. IWL_WARNING("check basic rate %d | %d\n", counter++, error);
  774. error |= (le16_to_cpu(rxon->assoc_id) > 2007);
  775. if (error)
  776. IWL_WARNING("check assoc id %d | %d\n", counter++, error);
  777. error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK))
  778. == (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK));
  779. if (error)
  780. IWL_WARNING("check CCK and short slot %d | %d\n",
  781. counter++, error);
  782. error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK))
  783. == (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK));
  784. if (error)
  785. IWL_WARNING("check CCK & auto detect %d | %d\n",
  786. counter++, error);
  787. error |= ((rxon->flags & (RXON_FLG_AUTO_DETECT_MSK |
  788. RXON_FLG_TGG_PROTECT_MSK)) == RXON_FLG_TGG_PROTECT_MSK);
  789. if (error)
  790. IWL_WARNING("check TGG and auto detect %d | %d\n",
  791. counter++, error);
  792. if (error)
  793. IWL_WARNING("Tuning to channel %d\n",
  794. le16_to_cpu(rxon->channel));
  795. if (error) {
  796. IWL_ERROR("Not a valid iwl4965_rxon_assoc_cmd field values\n");
  797. return -1;
  798. }
  799. return 0;
  800. }
  801. /**
  802. * iwl4965_full_rxon_required - determine if RXON_ASSOC can be used in RXON commit
  803. * @priv: staging_rxon is compared to active_rxon
  804. *
  805. * If the RXON structure is changing sufficient to require a new
  806. * tune or to clear and reset the RXON_FILTER_ASSOC_MSK then return 1
  807. * to indicate a new tune is required.
  808. */
  809. static int iwl4965_full_rxon_required(struct iwl4965_priv *priv)
  810. {
  811. /* These items are only settable from the full RXON command */
  812. if (!(priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) ||
  813. compare_ether_addr(priv->staging_rxon.bssid_addr,
  814. priv->active_rxon.bssid_addr) ||
  815. compare_ether_addr(priv->staging_rxon.node_addr,
  816. priv->active_rxon.node_addr) ||
  817. compare_ether_addr(priv->staging_rxon.wlap_bssid_addr,
  818. priv->active_rxon.wlap_bssid_addr) ||
  819. (priv->staging_rxon.dev_type != priv->active_rxon.dev_type) ||
  820. (priv->staging_rxon.channel != priv->active_rxon.channel) ||
  821. (priv->staging_rxon.air_propagation !=
  822. priv->active_rxon.air_propagation) ||
  823. (priv->staging_rxon.ofdm_ht_single_stream_basic_rates !=
  824. priv->active_rxon.ofdm_ht_single_stream_basic_rates) ||
  825. (priv->staging_rxon.ofdm_ht_dual_stream_basic_rates !=
  826. priv->active_rxon.ofdm_ht_dual_stream_basic_rates) ||
  827. (priv->staging_rxon.rx_chain != priv->active_rxon.rx_chain) ||
  828. (priv->staging_rxon.assoc_id != priv->active_rxon.assoc_id))
  829. return 1;
  830. /* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can
  831. * be updated with the RXON_ASSOC command -- however only some
  832. * flag transitions are allowed using RXON_ASSOC */
  833. /* Check if we are not switching bands */
  834. if ((priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) !=
  835. (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK))
  836. return 1;
  837. /* Check if we are switching association toggle */
  838. if ((priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) !=
  839. (priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK))
  840. return 1;
  841. return 0;
  842. }
  843. static int iwl4965_send_rxon_assoc(struct iwl4965_priv *priv)
  844. {
  845. int rc = 0;
  846. struct iwl4965_rx_packet *res = NULL;
  847. struct iwl4965_rxon_assoc_cmd rxon_assoc;
  848. struct iwl4965_host_cmd cmd = {
  849. .id = REPLY_RXON_ASSOC,
  850. .len = sizeof(rxon_assoc),
  851. .meta.flags = CMD_WANT_SKB,
  852. .data = &rxon_assoc,
  853. };
  854. const struct iwl4965_rxon_cmd *rxon1 = &priv->staging_rxon;
  855. const struct iwl4965_rxon_cmd *rxon2 = &priv->active_rxon;
  856. if ((rxon1->flags == rxon2->flags) &&
  857. (rxon1->filter_flags == rxon2->filter_flags) &&
  858. (rxon1->cck_basic_rates == rxon2->cck_basic_rates) &&
  859. (rxon1->ofdm_ht_single_stream_basic_rates ==
  860. rxon2->ofdm_ht_single_stream_basic_rates) &&
  861. (rxon1->ofdm_ht_dual_stream_basic_rates ==
  862. rxon2->ofdm_ht_dual_stream_basic_rates) &&
  863. (rxon1->rx_chain == rxon2->rx_chain) &&
  864. (rxon1->ofdm_basic_rates == rxon2->ofdm_basic_rates)) {
  865. IWL_DEBUG_INFO("Using current RXON_ASSOC. Not resending.\n");
  866. return 0;
  867. }
  868. rxon_assoc.flags = priv->staging_rxon.flags;
  869. rxon_assoc.filter_flags = priv->staging_rxon.filter_flags;
  870. rxon_assoc.ofdm_basic_rates = priv->staging_rxon.ofdm_basic_rates;
  871. rxon_assoc.cck_basic_rates = priv->staging_rxon.cck_basic_rates;
  872. rxon_assoc.reserved = 0;
  873. rxon_assoc.ofdm_ht_single_stream_basic_rates =
  874. priv->staging_rxon.ofdm_ht_single_stream_basic_rates;
  875. rxon_assoc.ofdm_ht_dual_stream_basic_rates =
  876. priv->staging_rxon.ofdm_ht_dual_stream_basic_rates;
  877. rxon_assoc.rx_chain_select_flags = priv->staging_rxon.rx_chain;
  878. rc = iwl4965_send_cmd_sync(priv, &cmd);
  879. if (rc)
  880. return rc;
  881. res = (struct iwl4965_rx_packet *)cmd.meta.u.skb->data;
  882. if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
  883. IWL_ERROR("Bad return from REPLY_RXON_ASSOC command\n");
  884. rc = -EIO;
  885. }
  886. priv->alloc_rxb_skb--;
  887. dev_kfree_skb_any(cmd.meta.u.skb);
  888. return rc;
  889. }
  890. /**
  891. * iwl4965_commit_rxon - commit staging_rxon to hardware
  892. *
  893. * The RXON command in staging_rxon is committed to the hardware and
  894. * the active_rxon structure is updated with the new data. This
  895. * function correctly transitions out of the RXON_ASSOC_MSK state if
  896. * a HW tune is required based on the RXON structure changes.
  897. */
  898. static int iwl4965_commit_rxon(struct iwl4965_priv *priv)
  899. {
  900. /* cast away the const for active_rxon in this function */
  901. struct iwl4965_rxon_cmd *active_rxon = (void *)&priv->active_rxon;
  902. DECLARE_MAC_BUF(mac);
  903. int rc = 0;
  904. if (!iwl4965_is_alive(priv))
  905. return -1;
  906. /* always get timestamp with Rx frame */
  907. priv->staging_rxon.flags |= RXON_FLG_TSF2HOST_MSK;
  908. rc = iwl4965_check_rxon_cmd(&priv->staging_rxon);
  909. if (rc) {
  910. IWL_ERROR("Invalid RXON configuration. Not committing.\n");
  911. return -EINVAL;
  912. }
  913. /* If we don't need to send a full RXON, we can use
  914. * iwl4965_rxon_assoc_cmd which is used to reconfigure filter
  915. * and other flags for the current radio configuration. */
  916. if (!iwl4965_full_rxon_required(priv)) {
  917. rc = iwl4965_send_rxon_assoc(priv);
  918. if (rc) {
  919. IWL_ERROR("Error setting RXON_ASSOC "
  920. "configuration (%d).\n", rc);
  921. return rc;
  922. }
  923. memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
  924. return 0;
  925. }
  926. /* station table will be cleared */
  927. priv->assoc_station_added = 0;
  928. #ifdef CONFIG_IWL4965_SENSITIVITY
  929. priv->sensitivity_data.state = IWL_SENS_CALIB_NEED_REINIT;
  930. if (!priv->error_recovering)
  931. priv->start_calib = 0;
  932. iwl4965_init_sensitivity(priv, CMD_ASYNC, 1);
  933. #endif /* CONFIG_IWL4965_SENSITIVITY */
  934. /* If we are currently associated and the new config requires
  935. * an RXON_ASSOC and the new config wants the associated mask enabled,
  936. * we must clear the associated from the active configuration
  937. * before we apply the new config */
  938. if (iwl4965_is_associated(priv) &&
  939. (priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK)) {
  940. IWL_DEBUG_INFO("Toggling associated bit on current RXON\n");
  941. active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  942. rc = iwl4965_send_cmd_pdu(priv, REPLY_RXON,
  943. sizeof(struct iwl4965_rxon_cmd),
  944. &priv->active_rxon);
  945. /* If the mask clearing failed then we set
  946. * active_rxon back to what it was previously */
  947. if (rc) {
  948. active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK;
  949. IWL_ERROR("Error clearing ASSOC_MSK on current "
  950. "configuration (%d).\n", rc);
  951. return rc;
  952. }
  953. }
  954. IWL_DEBUG_INFO("Sending RXON\n"
  955. "* with%s RXON_FILTER_ASSOC_MSK\n"
  956. "* channel = %d\n"
  957. "* bssid = %s\n",
  958. ((priv->staging_rxon.filter_flags &
  959. RXON_FILTER_ASSOC_MSK) ? "" : "out"),
  960. le16_to_cpu(priv->staging_rxon.channel),
  961. print_mac(mac, priv->staging_rxon.bssid_addr));
  962. /* Apply the new configuration */
  963. rc = iwl4965_send_cmd_pdu(priv, REPLY_RXON,
  964. sizeof(struct iwl4965_rxon_cmd), &priv->staging_rxon);
  965. if (rc) {
  966. IWL_ERROR("Error setting new configuration (%d).\n", rc);
  967. return rc;
  968. }
  969. iwl4965_clear_stations_table(priv);
  970. #ifdef CONFIG_IWL4965_SENSITIVITY
  971. if (!priv->error_recovering)
  972. priv->start_calib = 0;
  973. priv->sensitivity_data.state = IWL_SENS_CALIB_NEED_REINIT;
  974. iwl4965_init_sensitivity(priv, CMD_ASYNC, 1);
  975. #endif /* CONFIG_IWL4965_SENSITIVITY */
  976. memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
  977. /* If we issue a new RXON command which required a tune then we must
  978. * send a new TXPOWER command or we won't be able to Tx any frames */
  979. rc = iwl4965_hw_reg_send_txpower(priv);
  980. if (rc) {
  981. IWL_ERROR("Error setting Tx power (%d).\n", rc);
  982. return rc;
  983. }
  984. /* Add the broadcast address so we can send broadcast frames */
  985. if (iwl4965_rxon_add_station(priv, iwl4965_broadcast_addr, 0) ==
  986. IWL_INVALID_STATION) {
  987. IWL_ERROR("Error adding BROADCAST address for transmit.\n");
  988. return -EIO;
  989. }
  990. /* If we have set the ASSOC_MSK and we are in BSS mode then
  991. * add the IWL_AP_ID to the station rate table */
  992. if (iwl4965_is_associated(priv) &&
  993. (priv->iw_mode == IEEE80211_IF_TYPE_STA)) {
  994. if (iwl4965_rxon_add_station(priv, priv->active_rxon.bssid_addr, 1)
  995. == IWL_INVALID_STATION) {
  996. IWL_ERROR("Error adding AP address for transmit.\n");
  997. return -EIO;
  998. }
  999. priv->assoc_station_added = 1;
  1000. }
  1001. return 0;
  1002. }
  1003. static int iwl4965_send_bt_config(struct iwl4965_priv *priv)
  1004. {
  1005. struct iwl4965_bt_cmd bt_cmd = {
  1006. .flags = 3,
  1007. .lead_time = 0xAA,
  1008. .max_kill = 1,
  1009. .kill_ack_mask = 0,
  1010. .kill_cts_mask = 0,
  1011. };
  1012. return iwl4965_send_cmd_pdu(priv, REPLY_BT_CONFIG,
  1013. sizeof(struct iwl4965_bt_cmd), &bt_cmd);
  1014. }
  1015. static int iwl4965_send_scan_abort(struct iwl4965_priv *priv)
  1016. {
  1017. int rc = 0;
  1018. struct iwl4965_rx_packet *res;
  1019. struct iwl4965_host_cmd cmd = {
  1020. .id = REPLY_SCAN_ABORT_CMD,
  1021. .meta.flags = CMD_WANT_SKB,
  1022. };
  1023. /* If there isn't a scan actively going on in the hardware
  1024. * then we are in between scan bands and not actually
  1025. * actively scanning, so don't send the abort command */
  1026. if (!test_bit(STATUS_SCAN_HW, &priv->status)) {
  1027. clear_bit(STATUS_SCAN_ABORTING, &priv->status);
  1028. return 0;
  1029. }
  1030. rc = iwl4965_send_cmd_sync(priv, &cmd);
  1031. if (rc) {
  1032. clear_bit(STATUS_SCAN_ABORTING, &priv->status);
  1033. return rc;
  1034. }
  1035. res = (struct iwl4965_rx_packet *)cmd.meta.u.skb->data;
  1036. if (res->u.status != CAN_ABORT_STATUS) {
  1037. /* The scan abort will return 1 for success or
  1038. * 2 for "failure". A failure condition can be
  1039. * due to simply not being in an active scan which
  1040. * can occur if we send the scan abort before we
  1041. * the microcode has notified us that a scan is
  1042. * completed. */
  1043. IWL_DEBUG_INFO("SCAN_ABORT returned %d.\n", res->u.status);
  1044. clear_bit(STATUS_SCAN_ABORTING, &priv->status);
  1045. clear_bit(STATUS_SCAN_HW, &priv->status);
  1046. }
  1047. dev_kfree_skb_any(cmd.meta.u.skb);
  1048. return rc;
  1049. }
  1050. static int iwl4965_card_state_sync_callback(struct iwl4965_priv *priv,
  1051. struct iwl4965_cmd *cmd,
  1052. struct sk_buff *skb)
  1053. {
  1054. return 1;
  1055. }
  1056. /*
  1057. * CARD_STATE_CMD
  1058. *
  1059. * Use: Sets the internal card state to enable, disable, or halt
  1060. *
  1061. * When in the 'enable' state the card operates as normal.
  1062. * When in the 'disable' state, the card enters into a low power mode.
  1063. * When in the 'halt' state, the card is shut down and must be fully
  1064. * restarted to come back on.
  1065. */
  1066. static int iwl4965_send_card_state(struct iwl4965_priv *priv, u32 flags, u8 meta_flag)
  1067. {
  1068. struct iwl4965_host_cmd cmd = {
  1069. .id = REPLY_CARD_STATE_CMD,
  1070. .len = sizeof(u32),
  1071. .data = &flags,
  1072. .meta.flags = meta_flag,
  1073. };
  1074. if (meta_flag & CMD_ASYNC)
  1075. cmd.meta.u.callback = iwl4965_card_state_sync_callback;
  1076. return iwl4965_send_cmd(priv, &cmd);
  1077. }
  1078. static int iwl4965_add_sta_sync_callback(struct iwl4965_priv *priv,
  1079. struct iwl4965_cmd *cmd, struct sk_buff *skb)
  1080. {
  1081. struct iwl4965_rx_packet *res = NULL;
  1082. if (!skb) {
  1083. IWL_ERROR("Error: Response NULL in REPLY_ADD_STA.\n");
  1084. return 1;
  1085. }
  1086. res = (struct iwl4965_rx_packet *)skb->data;
  1087. if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
  1088. IWL_ERROR("Bad return from REPLY_ADD_STA (0x%08X)\n",
  1089. res->hdr.flags);
  1090. return 1;
  1091. }
  1092. switch (res->u.add_sta.status) {
  1093. case ADD_STA_SUCCESS_MSK:
  1094. break;
  1095. default:
  1096. break;
  1097. }
  1098. /* We didn't cache the SKB; let the caller free it */
  1099. return 1;
  1100. }
  1101. int iwl4965_send_add_station(struct iwl4965_priv *priv,
  1102. struct iwl4965_addsta_cmd *sta, u8 flags)
  1103. {
  1104. struct iwl4965_rx_packet *res = NULL;
  1105. int rc = 0;
  1106. struct iwl4965_host_cmd cmd = {
  1107. .id = REPLY_ADD_STA,
  1108. .len = sizeof(struct iwl4965_addsta_cmd),
  1109. .meta.flags = flags,
  1110. .data = sta,
  1111. };
  1112. if (flags & CMD_ASYNC)
  1113. cmd.meta.u.callback = iwl4965_add_sta_sync_callback;
  1114. else
  1115. cmd.meta.flags |= CMD_WANT_SKB;
  1116. rc = iwl4965_send_cmd(priv, &cmd);
  1117. if (rc || (flags & CMD_ASYNC))
  1118. return rc;
  1119. res = (struct iwl4965_rx_packet *)cmd.meta.u.skb->data;
  1120. if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
  1121. IWL_ERROR("Bad return from REPLY_ADD_STA (0x%08X)\n",
  1122. res->hdr.flags);
  1123. rc = -EIO;
  1124. }
  1125. if (rc == 0) {
  1126. switch (res->u.add_sta.status) {
  1127. case ADD_STA_SUCCESS_MSK:
  1128. IWL_DEBUG_INFO("REPLY_ADD_STA PASSED\n");
  1129. break;
  1130. default:
  1131. rc = -EIO;
  1132. IWL_WARNING("REPLY_ADD_STA failed\n");
  1133. break;
  1134. }
  1135. }
  1136. priv->alloc_rxb_skb--;
  1137. dev_kfree_skb_any(cmd.meta.u.skb);
  1138. return rc;
  1139. }
  1140. static int iwl4965_update_sta_key_info(struct iwl4965_priv *priv,
  1141. struct ieee80211_key_conf *keyconf,
  1142. u8 sta_id)
  1143. {
  1144. unsigned long flags;
  1145. __le16 key_flags = 0;
  1146. switch (keyconf->alg) {
  1147. case ALG_CCMP:
  1148. key_flags |= STA_KEY_FLG_CCMP;
  1149. key_flags |= cpu_to_le16(
  1150. keyconf->keyidx << STA_KEY_FLG_KEYID_POS);
  1151. key_flags &= ~STA_KEY_FLG_INVALID;
  1152. break;
  1153. case ALG_TKIP:
  1154. case ALG_WEP:
  1155. default:
  1156. return -EINVAL;
  1157. }
  1158. spin_lock_irqsave(&priv->sta_lock, flags);
  1159. priv->stations[sta_id].keyinfo.alg = keyconf->alg;
  1160. priv->stations[sta_id].keyinfo.keylen = keyconf->keylen;
  1161. memcpy(priv->stations[sta_id].keyinfo.key, keyconf->key,
  1162. keyconf->keylen);
  1163. memcpy(priv->stations[sta_id].sta.key.key, keyconf->key,
  1164. keyconf->keylen);
  1165. priv->stations[sta_id].sta.key.key_flags = key_flags;
  1166. priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
  1167. priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
  1168. spin_unlock_irqrestore(&priv->sta_lock, flags);
  1169. IWL_DEBUG_INFO("hwcrypto: modify ucode station key info\n");
  1170. iwl4965_send_add_station(priv, &priv->stations[sta_id].sta, 0);
  1171. return 0;
  1172. }
  1173. static int iwl4965_clear_sta_key_info(struct iwl4965_priv *priv, u8 sta_id)
  1174. {
  1175. unsigned long flags;
  1176. spin_lock_irqsave(&priv->sta_lock, flags);
  1177. memset(&priv->stations[sta_id].keyinfo, 0, sizeof(struct iwl4965_hw_key));
  1178. memset(&priv->stations[sta_id].sta.key, 0, sizeof(struct iwl4965_keyinfo));
  1179. priv->stations[sta_id].sta.key.key_flags = STA_KEY_FLG_NO_ENC;
  1180. priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
  1181. priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
  1182. spin_unlock_irqrestore(&priv->sta_lock, flags);
  1183. IWL_DEBUG_INFO("hwcrypto: clear ucode station key info\n");
  1184. iwl4965_send_add_station(priv, &priv->stations[sta_id].sta, 0);
  1185. return 0;
  1186. }
  1187. static void iwl4965_clear_free_frames(struct iwl4965_priv *priv)
  1188. {
  1189. struct list_head *element;
  1190. IWL_DEBUG_INFO("%d frames on pre-allocated heap on clear.\n",
  1191. priv->frames_count);
  1192. while (!list_empty(&priv->free_frames)) {
  1193. element = priv->free_frames.next;
  1194. list_del(element);
  1195. kfree(list_entry(element, struct iwl4965_frame, list));
  1196. priv->frames_count--;
  1197. }
  1198. if (priv->frames_count) {
  1199. IWL_WARNING("%d frames still in use. Did we lose one?\n",
  1200. priv->frames_count);
  1201. priv->frames_count = 0;
  1202. }
  1203. }
  1204. static struct iwl4965_frame *iwl4965_get_free_frame(struct iwl4965_priv *priv)
  1205. {
  1206. struct iwl4965_frame *frame;
  1207. struct list_head *element;
  1208. if (list_empty(&priv->free_frames)) {
  1209. frame = kzalloc(sizeof(*frame), GFP_KERNEL);
  1210. if (!frame) {
  1211. IWL_ERROR("Could not allocate frame!\n");
  1212. return NULL;
  1213. }
  1214. priv->frames_count++;
  1215. return frame;
  1216. }
  1217. element = priv->free_frames.next;
  1218. list_del(element);
  1219. return list_entry(element, struct iwl4965_frame, list);
  1220. }
  1221. static void iwl4965_free_frame(struct iwl4965_priv *priv, struct iwl4965_frame *frame)
  1222. {
  1223. memset(frame, 0, sizeof(*frame));
  1224. list_add(&frame->list, &priv->free_frames);
  1225. }
  1226. unsigned int iwl4965_fill_beacon_frame(struct iwl4965_priv *priv,
  1227. struct ieee80211_hdr *hdr,
  1228. const u8 *dest, int left)
  1229. {
  1230. if (!iwl4965_is_associated(priv) || !priv->ibss_beacon ||
  1231. ((priv->iw_mode != IEEE80211_IF_TYPE_IBSS) &&
  1232. (priv->iw_mode != IEEE80211_IF_TYPE_AP)))
  1233. return 0;
  1234. if (priv->ibss_beacon->len > left)
  1235. return 0;
  1236. memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
  1237. return priv->ibss_beacon->len;
  1238. }
  1239. int iwl4965_rate_index_from_plcp(int plcp)
  1240. {
  1241. int i = 0;
  1242. if (plcp & RATE_MCS_HT_MSK) {
  1243. i = (plcp & 0xff);
  1244. if (i >= IWL_RATE_MIMO_6M_PLCP)
  1245. i = i - IWL_RATE_MIMO_6M_PLCP;
  1246. i += IWL_FIRST_OFDM_RATE;
  1247. /* skip 9M not supported in ht*/
  1248. if (i >= IWL_RATE_9M_INDEX)
  1249. i += 1;
  1250. if ((i >= IWL_FIRST_OFDM_RATE) &&
  1251. (i <= IWL_LAST_OFDM_RATE))
  1252. return i;
  1253. } else {
  1254. for (i = 0; i < ARRAY_SIZE(iwl4965_rates); i++)
  1255. if (iwl4965_rates[i].plcp == (plcp &0xFF))
  1256. return i;
  1257. }
  1258. return -1;
  1259. }
  1260. static u8 iwl4965_rate_get_lowest_plcp(int rate_mask)
  1261. {
  1262. u8 i;
  1263. for (i = IWL_RATE_1M_INDEX; i != IWL_RATE_INVALID;
  1264. i = iwl4965_rates[i].next_ieee) {
  1265. if (rate_mask & (1 << i))
  1266. return iwl4965_rates[i].plcp;
  1267. }
  1268. return IWL_RATE_INVALID;
  1269. }
  1270. static int iwl4965_send_beacon_cmd(struct iwl4965_priv *priv)
  1271. {
  1272. struct iwl4965_frame *frame;
  1273. unsigned int frame_size;
  1274. int rc;
  1275. u8 rate;
  1276. frame = iwl4965_get_free_frame(priv);
  1277. if (!frame) {
  1278. IWL_ERROR("Could not obtain free frame buffer for beacon "
  1279. "command.\n");
  1280. return -ENOMEM;
  1281. }
  1282. if (!(priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK)) {
  1283. rate = iwl4965_rate_get_lowest_plcp(priv->active_rate_basic &
  1284. 0xFF0);
  1285. if (rate == IWL_INVALID_RATE)
  1286. rate = IWL_RATE_6M_PLCP;
  1287. } else {
  1288. rate = iwl4965_rate_get_lowest_plcp(priv->active_rate_basic & 0xF);
  1289. if (rate == IWL_INVALID_RATE)
  1290. rate = IWL_RATE_1M_PLCP;
  1291. }
  1292. frame_size = iwl4965_hw_get_beacon_cmd(priv, frame, rate);
  1293. rc = iwl4965_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
  1294. &frame->u.cmd[0]);
  1295. iwl4965_free_frame(priv, frame);
  1296. return rc;
  1297. }
  1298. /******************************************************************************
  1299. *
  1300. * EEPROM related functions
  1301. *
  1302. ******************************************************************************/
  1303. static void get_eeprom_mac(struct iwl4965_priv *priv, u8 *mac)
  1304. {
  1305. memcpy(mac, priv->eeprom.mac_address, 6);
  1306. }
  1307. /**
  1308. * iwl4965_eeprom_init - read EEPROM contents
  1309. *
  1310. * Load the EEPROM from adapter into priv->eeprom
  1311. *
  1312. * NOTE: This routine uses the non-debug IO access functions.
  1313. */
  1314. int iwl4965_eeprom_init(struct iwl4965_priv *priv)
  1315. {
  1316. u16 *e = (u16 *)&priv->eeprom;
  1317. u32 gp = iwl4965_read32(priv, CSR_EEPROM_GP);
  1318. u32 r;
  1319. int sz = sizeof(priv->eeprom);
  1320. int rc;
  1321. int i;
  1322. u16 addr;
  1323. /* The EEPROM structure has several padding buffers within it
  1324. * and when adding new EEPROM maps is subject to programmer errors
  1325. * which may be very difficult to identify without explicitly
  1326. * checking the resulting size of the eeprom map. */
  1327. BUILD_BUG_ON(sizeof(priv->eeprom) != IWL_EEPROM_IMAGE_SIZE);
  1328. if ((gp & CSR_EEPROM_GP_VALID_MSK) == CSR_EEPROM_GP_BAD_SIGNATURE) {
  1329. IWL_ERROR("EEPROM not found, EEPROM_GP=0x%08x", gp);
  1330. return -ENOENT;
  1331. }
  1332. rc = iwl4965_eeprom_acquire_semaphore(priv);
  1333. if (rc < 0) {
  1334. IWL_ERROR("Failed to acquire EEPROM semaphore.\n");
  1335. return -ENOENT;
  1336. }
  1337. /* eeprom is an array of 16bit values */
  1338. for (addr = 0; addr < sz; addr += sizeof(u16)) {
  1339. _iwl4965_write32(priv, CSR_EEPROM_REG, addr << 1);
  1340. _iwl4965_clear_bit(priv, CSR_EEPROM_REG, CSR_EEPROM_REG_BIT_CMD);
  1341. for (i = 0; i < IWL_EEPROM_ACCESS_TIMEOUT;
  1342. i += IWL_EEPROM_ACCESS_DELAY) {
  1343. r = _iwl4965_read_direct32(priv, CSR_EEPROM_REG);
  1344. if (r & CSR_EEPROM_REG_READ_VALID_MSK)
  1345. break;
  1346. udelay(IWL_EEPROM_ACCESS_DELAY);
  1347. }
  1348. if (!(r & CSR_EEPROM_REG_READ_VALID_MSK)) {
  1349. IWL_ERROR("Time out reading EEPROM[%d]", addr);
  1350. rc = -ETIMEDOUT;
  1351. goto done;
  1352. }
  1353. e[addr / 2] = le16_to_cpu(r >> 16);
  1354. }
  1355. rc = 0;
  1356. done:
  1357. iwl4965_eeprom_release_semaphore(priv);
  1358. return rc;
  1359. }
  1360. /******************************************************************************
  1361. *
  1362. * Misc. internal state and helper functions
  1363. *
  1364. ******************************************************************************/
  1365. #ifdef CONFIG_IWL4965_DEBUG
  1366. /**
  1367. * iwl4965_report_frame - dump frame to syslog during debug sessions
  1368. *
  1369. * hack this function to show different aspects of received frames,
  1370. * including selective frame dumps.
  1371. * group100 parameter selects whether to show 1 out of 100 good frames.
  1372. *
  1373. * TODO: ieee80211_hdr stuff is common to 3945 and 4965, so frame type
  1374. * info output is okay, but some of this stuff (e.g. iwl4965_rx_frame_stats)
  1375. * is 3945-specific and gives bad output for 4965. Need to split the
  1376. * functionality, keep common stuff here.
  1377. */
  1378. void iwl4965_report_frame(struct iwl4965_priv *priv,
  1379. struct iwl4965_rx_packet *pkt,
  1380. struct ieee80211_hdr *header, int group100)
  1381. {
  1382. u32 to_us;
  1383. u32 print_summary = 0;
  1384. u32 print_dump = 0; /* set to 1 to dump all frames' contents */
  1385. u32 hundred = 0;
  1386. u32 dataframe = 0;
  1387. u16 fc;
  1388. u16 seq_ctl;
  1389. u16 channel;
  1390. u16 phy_flags;
  1391. int rate_sym;
  1392. u16 length;
  1393. u16 status;
  1394. u16 bcn_tmr;
  1395. u32 tsf_low;
  1396. u64 tsf;
  1397. u8 rssi;
  1398. u8 agc;
  1399. u16 sig_avg;
  1400. u16 noise_diff;
  1401. struct iwl4965_rx_frame_stats *rx_stats = IWL_RX_STATS(pkt);
  1402. struct iwl4965_rx_frame_hdr *rx_hdr = IWL_RX_HDR(pkt);
  1403. struct iwl4965_rx_frame_end *rx_end = IWL_RX_END(pkt);
  1404. u8 *data = IWL_RX_DATA(pkt);
  1405. /* MAC header */
  1406. fc = le16_to_cpu(header->frame_control);
  1407. seq_ctl = le16_to_cpu(header->seq_ctrl);
  1408. /* metadata */
  1409. channel = le16_to_cpu(rx_hdr->channel);
  1410. phy_flags = le16_to_cpu(rx_hdr->phy_flags);
  1411. rate_sym = rx_hdr->rate;
  1412. length = le16_to_cpu(rx_hdr->len);
  1413. /* end-of-frame status and timestamp */
  1414. status = le32_to_cpu(rx_end->status);
  1415. bcn_tmr = le32_to_cpu(rx_end->beacon_timestamp);
  1416. tsf_low = le64_to_cpu(rx_end->timestamp) & 0x0ffffffff;
  1417. tsf = le64_to_cpu(rx_end->timestamp);
  1418. /* signal statistics */
  1419. rssi = rx_stats->rssi;
  1420. agc = rx_stats->agc;
  1421. sig_avg = le16_to_cpu(rx_stats->sig_avg);
  1422. noise_diff = le16_to_cpu(rx_stats->noise_diff);
  1423. to_us = !compare_ether_addr(header->addr1, priv->mac_addr);
  1424. /* if data frame is to us and all is good,
  1425. * (optionally) print summary for only 1 out of every 100 */
  1426. if (to_us && (fc & ~IEEE80211_FCTL_PROTECTED) ==
  1427. (IEEE80211_FCTL_FROMDS | IEEE80211_FTYPE_DATA)) {
  1428. dataframe = 1;
  1429. if (!group100)
  1430. print_summary = 1; /* print each frame */
  1431. else if (priv->framecnt_to_us < 100) {
  1432. priv->framecnt_to_us++;
  1433. print_summary = 0;
  1434. } else {
  1435. priv->framecnt_to_us = 0;
  1436. print_summary = 1;
  1437. hundred = 1;
  1438. }
  1439. } else {
  1440. /* print summary for all other frames */
  1441. print_summary = 1;
  1442. }
  1443. if (print_summary) {
  1444. char *title;
  1445. u32 rate;
  1446. if (hundred)
  1447. title = "100Frames";
  1448. else if (fc & IEEE80211_FCTL_RETRY)
  1449. title = "Retry";
  1450. else if (ieee80211_is_assoc_response(fc))
  1451. title = "AscRsp";
  1452. else if (ieee80211_is_reassoc_response(fc))
  1453. title = "RasRsp";
  1454. else if (ieee80211_is_probe_response(fc)) {
  1455. title = "PrbRsp";
  1456. print_dump = 1; /* dump frame contents */
  1457. } else if (ieee80211_is_beacon(fc)) {
  1458. title = "Beacon";
  1459. print_dump = 1; /* dump frame contents */
  1460. } else if (ieee80211_is_atim(fc))
  1461. title = "ATIM";
  1462. else if (ieee80211_is_auth(fc))
  1463. title = "Auth";
  1464. else if (ieee80211_is_deauth(fc))
  1465. title = "DeAuth";
  1466. else if (ieee80211_is_disassoc(fc))
  1467. title = "DisAssoc";
  1468. else
  1469. title = "Frame";
  1470. rate = iwl4965_rate_index_from_plcp(rate_sym);
  1471. if (rate == -1)
  1472. rate = 0;
  1473. else
  1474. rate = iwl4965_rates[rate].ieee / 2;
  1475. /* print frame summary.
  1476. * MAC addresses show just the last byte (for brevity),
  1477. * but you can hack it to show more, if you'd like to. */
  1478. if (dataframe)
  1479. IWL_DEBUG_RX("%s: mhd=0x%04x, dst=0x%02x, "
  1480. "len=%u, rssi=%d, chnl=%d, rate=%u, \n",
  1481. title, fc, header->addr1[5],
  1482. length, rssi, channel, rate);
  1483. else {
  1484. /* src/dst addresses assume managed mode */
  1485. IWL_DEBUG_RX("%s: 0x%04x, dst=0x%02x, "
  1486. "src=0x%02x, rssi=%u, tim=%lu usec, "
  1487. "phy=0x%02x, chnl=%d\n",
  1488. title, fc, header->addr1[5],
  1489. header->addr3[5], rssi,
  1490. tsf_low - priv->scan_start_tsf,
  1491. phy_flags, channel);
  1492. }
  1493. }
  1494. if (print_dump)
  1495. iwl4965_print_hex_dump(IWL_DL_RX, data, length);
  1496. }
  1497. #endif
  1498. static void iwl4965_unset_hw_setting(struct iwl4965_priv *priv)
  1499. {
  1500. if (priv->hw_setting.shared_virt)
  1501. pci_free_consistent(priv->pci_dev,
  1502. sizeof(struct iwl4965_shared),
  1503. priv->hw_setting.shared_virt,
  1504. priv->hw_setting.shared_phys);
  1505. }
  1506. /**
  1507. * iwl4965_supported_rate_to_ie - fill in the supported rate in IE field
  1508. *
  1509. * return : set the bit for each supported rate insert in ie
  1510. */
  1511. static u16 iwl4965_supported_rate_to_ie(u8 *ie, u16 supported_rate,
  1512. u16 basic_rate, int *left)
  1513. {
  1514. u16 ret_rates = 0, bit;
  1515. int i;
  1516. u8 *cnt = ie;
  1517. u8 *rates = ie + 1;
  1518. for (bit = 1, i = 0; i < IWL_RATE_COUNT; i++, bit <<= 1) {
  1519. if (bit & supported_rate) {
  1520. ret_rates |= bit;
  1521. rates[*cnt] = iwl4965_rates[i].ieee |
  1522. ((bit & basic_rate) ? 0x80 : 0x00);
  1523. (*cnt)++;
  1524. (*left)--;
  1525. if ((*left <= 0) ||
  1526. (*cnt >= IWL_SUPPORTED_RATES_IE_LEN))
  1527. break;
  1528. }
  1529. }
  1530. return ret_rates;
  1531. }
  1532. #ifdef CONFIG_IWL4965_HT
  1533. void static iwl4965_set_ht_capab(struct ieee80211_hw *hw,
  1534. struct ieee80211_ht_capability *ht_cap,
  1535. u8 use_wide_chan);
  1536. #endif
  1537. /**
  1538. * iwl4965_fill_probe_req - fill in all required fields and IE for probe request
  1539. */
  1540. static u16 iwl4965_fill_probe_req(struct iwl4965_priv *priv,
  1541. struct ieee80211_mgmt *frame,
  1542. int left, int is_direct)
  1543. {
  1544. int len = 0;
  1545. u8 *pos = NULL;
  1546. u16 active_rates, ret_rates, cck_rates, active_rate_basic;
  1547. /* Make sure there is enough space for the probe request,
  1548. * two mandatory IEs and the data */
  1549. left -= 24;
  1550. if (left < 0)
  1551. return 0;
  1552. len += 24;
  1553. frame->frame_control = cpu_to_le16(IEEE80211_STYPE_PROBE_REQ);
  1554. memcpy(frame->da, iwl4965_broadcast_addr, ETH_ALEN);
  1555. memcpy(frame->sa, priv->mac_addr, ETH_ALEN);
  1556. memcpy(frame->bssid, iwl4965_broadcast_addr, ETH_ALEN);
  1557. frame->seq_ctrl = 0;
  1558. /* fill in our indirect SSID IE */
  1559. /* ...next IE... */
  1560. left -= 2;
  1561. if (left < 0)
  1562. return 0;
  1563. len += 2;
  1564. pos = &(frame->u.probe_req.variable[0]);
  1565. *pos++ = WLAN_EID_SSID;
  1566. *pos++ = 0;
  1567. /* fill in our direct SSID IE... */
  1568. if (is_direct) {
  1569. /* ...next IE... */
  1570. left -= 2 + priv->essid_len;
  1571. if (left < 0)
  1572. return 0;
  1573. /* ... fill it in... */
  1574. *pos++ = WLAN_EID_SSID;
  1575. *pos++ = priv->essid_len;
  1576. memcpy(pos, priv->essid, priv->essid_len);
  1577. pos += priv->essid_len;
  1578. len += 2 + priv->essid_len;
  1579. }
  1580. /* fill in supported rate */
  1581. /* ...next IE... */
  1582. left -= 2;
  1583. if (left < 0)
  1584. return 0;
  1585. /* ... fill it in... */
  1586. *pos++ = WLAN_EID_SUPP_RATES;
  1587. *pos = 0;
  1588. /* exclude 60M rate */
  1589. active_rates = priv->rates_mask;
  1590. active_rates &= ~IWL_RATE_60M_MASK;
  1591. active_rate_basic = active_rates & IWL_BASIC_RATES_MASK;
  1592. cck_rates = IWL_CCK_RATES_MASK & active_rates;
  1593. ret_rates = iwl4965_supported_rate_to_ie(pos, cck_rates,
  1594. active_rate_basic, &left);
  1595. active_rates &= ~ret_rates;
  1596. ret_rates = iwl4965_supported_rate_to_ie(pos, active_rates,
  1597. active_rate_basic, &left);
  1598. active_rates &= ~ret_rates;
  1599. len += 2 + *pos;
  1600. pos += (*pos) + 1;
  1601. if (active_rates == 0)
  1602. goto fill_end;
  1603. /* fill in supported extended rate */
  1604. /* ...next IE... */
  1605. left -= 2;
  1606. if (left < 0)
  1607. return 0;
  1608. /* ... fill it in... */
  1609. *pos++ = WLAN_EID_EXT_SUPP_RATES;
  1610. *pos = 0;
  1611. iwl4965_supported_rate_to_ie(pos, active_rates,
  1612. active_rate_basic, &left);
  1613. if (*pos > 0)
  1614. len += 2 + *pos;
  1615. #ifdef CONFIG_IWL4965_HT
  1616. if (is_direct && priv->is_ht_enabled) {
  1617. u8 use_wide_chan = 1;
  1618. if (priv->channel_width != IWL_CHANNEL_WIDTH_40MHZ)
  1619. use_wide_chan = 0;
  1620. pos += (*pos) + 1;
  1621. *pos++ = WLAN_EID_HT_CAPABILITY;
  1622. *pos++ = sizeof(struct ieee80211_ht_capability);
  1623. iwl4965_set_ht_capab(NULL, (struct ieee80211_ht_capability *)pos,
  1624. use_wide_chan);
  1625. len += 2 + sizeof(struct ieee80211_ht_capability);
  1626. }
  1627. #endif /*CONFIG_IWL4965_HT */
  1628. fill_end:
  1629. return (u16)len;
  1630. }
  1631. /*
  1632. * QoS support
  1633. */
  1634. #ifdef CONFIG_IWL4965_QOS
  1635. static int iwl4965_send_qos_params_command(struct iwl4965_priv *priv,
  1636. struct iwl4965_qosparam_cmd *qos)
  1637. {
  1638. return iwl4965_send_cmd_pdu(priv, REPLY_QOS_PARAM,
  1639. sizeof(struct iwl4965_qosparam_cmd), qos);
  1640. }
  1641. static void iwl4965_reset_qos(struct iwl4965_priv *priv)
  1642. {
  1643. u16 cw_min = 15;
  1644. u16 cw_max = 1023;
  1645. u8 aifs = 2;
  1646. u8 is_legacy = 0;
  1647. unsigned long flags;
  1648. int i;
  1649. spin_lock_irqsave(&priv->lock, flags);
  1650. priv->qos_data.qos_active = 0;
  1651. if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS) {
  1652. if (priv->qos_data.qos_enable)
  1653. priv->qos_data.qos_active = 1;
  1654. if (!(priv->active_rate & 0xfff0)) {
  1655. cw_min = 31;
  1656. is_legacy = 1;
  1657. }
  1658. } else if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
  1659. if (priv->qos_data.qos_enable)
  1660. priv->qos_data.qos_active = 1;
  1661. } else if (!(priv->staging_rxon.flags & RXON_FLG_SHORT_SLOT_MSK)) {
  1662. cw_min = 31;
  1663. is_legacy = 1;
  1664. }
  1665. if (priv->qos_data.qos_active)
  1666. aifs = 3;
  1667. priv->qos_data.def_qos_parm.ac[0].cw_min = cpu_to_le16(cw_min);
  1668. priv->qos_data.def_qos_parm.ac[0].cw_max = cpu_to_le16(cw_max);
  1669. priv->qos_data.def_qos_parm.ac[0].aifsn = aifs;
  1670. priv->qos_data.def_qos_parm.ac[0].edca_txop = 0;
  1671. priv->qos_data.def_qos_parm.ac[0].reserved1 = 0;
  1672. if (priv->qos_data.qos_active) {
  1673. i = 1;
  1674. priv->qos_data.def_qos_parm.ac[i].cw_min = cpu_to_le16(cw_min);
  1675. priv->qos_data.def_qos_parm.ac[i].cw_max = cpu_to_le16(cw_max);
  1676. priv->qos_data.def_qos_parm.ac[i].aifsn = 7;
  1677. priv->qos_data.def_qos_parm.ac[i].edca_txop = 0;
  1678. priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
  1679. i = 2;
  1680. priv->qos_data.def_qos_parm.ac[i].cw_min =
  1681. cpu_to_le16((cw_min + 1) / 2 - 1);
  1682. priv->qos_data.def_qos_parm.ac[i].cw_max =
  1683. cpu_to_le16(cw_max);
  1684. priv->qos_data.def_qos_parm.ac[i].aifsn = 2;
  1685. if (is_legacy)
  1686. priv->qos_data.def_qos_parm.ac[i].edca_txop =
  1687. cpu_to_le16(6016);
  1688. else
  1689. priv->qos_data.def_qos_parm.ac[i].edca_txop =
  1690. cpu_to_le16(3008);
  1691. priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
  1692. i = 3;
  1693. priv->qos_data.def_qos_parm.ac[i].cw_min =
  1694. cpu_to_le16((cw_min + 1) / 4 - 1);
  1695. priv->qos_data.def_qos_parm.ac[i].cw_max =
  1696. cpu_to_le16((cw_max + 1) / 2 - 1);
  1697. priv->qos_data.def_qos_parm.ac[i].aifsn = 2;
  1698. priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
  1699. if (is_legacy)
  1700. priv->qos_data.def_qos_parm.ac[i].edca_txop =
  1701. cpu_to_le16(3264);
  1702. else
  1703. priv->qos_data.def_qos_parm.ac[i].edca_txop =
  1704. cpu_to_le16(1504);
  1705. } else {
  1706. for (i = 1; i < 4; i++) {
  1707. priv->qos_data.def_qos_parm.ac[i].cw_min =
  1708. cpu_to_le16(cw_min);
  1709. priv->qos_data.def_qos_parm.ac[i].cw_max =
  1710. cpu_to_le16(cw_max);
  1711. priv->qos_data.def_qos_parm.ac[i].aifsn = aifs;
  1712. priv->qos_data.def_qos_parm.ac[i].edca_txop = 0;
  1713. priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
  1714. }
  1715. }
  1716. IWL_DEBUG_QOS("set QoS to default \n");
  1717. spin_unlock_irqrestore(&priv->lock, flags);
  1718. }
  1719. static void iwl4965_activate_qos(struct iwl4965_priv *priv, u8 force)
  1720. {
  1721. unsigned long flags;
  1722. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  1723. return;
  1724. if (!priv->qos_data.qos_enable)
  1725. return;
  1726. spin_lock_irqsave(&priv->lock, flags);
  1727. priv->qos_data.def_qos_parm.qos_flags = 0;
  1728. if (priv->qos_data.qos_cap.q_AP.queue_request &&
  1729. !priv->qos_data.qos_cap.q_AP.txop_request)
  1730. priv->qos_data.def_qos_parm.qos_flags |=
  1731. QOS_PARAM_FLG_TXOP_TYPE_MSK;
  1732. if (priv->qos_data.qos_active)
  1733. priv->qos_data.def_qos_parm.qos_flags |=
  1734. QOS_PARAM_FLG_UPDATE_EDCA_MSK;
  1735. #ifdef CONFIG_IWL4965_HT
  1736. if (priv->is_ht_enabled && priv->current_assoc_ht.is_ht)
  1737. priv->qos_data.def_qos_parm.qos_flags |= QOS_PARAM_FLG_TGN_MSK;
  1738. #endif /* CONFIG_IWL4965_HT */
  1739. spin_unlock_irqrestore(&priv->lock, flags);
  1740. if (force || iwl4965_is_associated(priv)) {
  1741. IWL_DEBUG_QOS("send QoS cmd with Qos active=%d FLAGS=0x%X\n",
  1742. priv->qos_data.qos_active,
  1743. priv->qos_data.def_qos_parm.qos_flags);
  1744. iwl4965_send_qos_params_command(priv,
  1745. &(priv->qos_data.def_qos_parm));
  1746. }
  1747. }
  1748. #endif /* CONFIG_IWL4965_QOS */
  1749. /*
  1750. * Power management (not Tx power!) functions
  1751. */
  1752. #define MSEC_TO_USEC 1024
  1753. #define NOSLP __constant_cpu_to_le16(0), 0, 0
  1754. #define SLP IWL_POWER_DRIVER_ALLOW_SLEEP_MSK, 0, 0
  1755. #define SLP_TIMEOUT(T) __constant_cpu_to_le32((T) * MSEC_TO_USEC)
  1756. #define SLP_VEC(X0, X1, X2, X3, X4) {__constant_cpu_to_le32(X0), \
  1757. __constant_cpu_to_le32(X1), \
  1758. __constant_cpu_to_le32(X2), \
  1759. __constant_cpu_to_le32(X3), \
  1760. __constant_cpu_to_le32(X4)}
  1761. /* default power management (not Tx power) table values */
  1762. /* for tim 0-10 */
  1763. static struct iwl4965_power_vec_entry range_0[IWL_POWER_AC] = {
  1764. {{NOSLP, SLP_TIMEOUT(0), SLP_TIMEOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0},
  1765. {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(500), SLP_VEC(1, 2, 3, 4, 4)}, 0},
  1766. {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(300), SLP_VEC(2, 4, 6, 7, 7)}, 0},
  1767. {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(100), SLP_VEC(2, 6, 9, 9, 10)}, 0},
  1768. {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(25), SLP_VEC(2, 7, 9, 9, 10)}, 1},
  1769. {{SLP, SLP_TIMEOUT(25), SLP_TIMEOUT(25), SLP_VEC(4, 7, 10, 10, 10)}, 1}
  1770. };
  1771. /* for tim > 10 */
  1772. static struct iwl4965_power_vec_entry range_1[IWL_POWER_AC] = {
  1773. {{NOSLP, SLP_TIMEOUT(0), SLP_TIMEOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0},
  1774. {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(500),
  1775. SLP_VEC(1, 2, 3, 4, 0xFF)}, 0},
  1776. {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(300),
  1777. SLP_VEC(2, 4, 6, 7, 0xFF)}, 0},
  1778. {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(100),
  1779. SLP_VEC(2, 6, 9, 9, 0xFF)}, 0},
  1780. {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(25), SLP_VEC(2, 7, 9, 9, 0xFF)}, 0},
  1781. {{SLP, SLP_TIMEOUT(25), SLP_TIMEOUT(25),
  1782. SLP_VEC(4, 7, 10, 10, 0xFF)}, 0}
  1783. };
  1784. int iwl4965_power_init_handle(struct iwl4965_priv *priv)
  1785. {
  1786. int rc = 0, i;
  1787. struct iwl4965_power_mgr *pow_data;
  1788. int size = sizeof(struct iwl4965_power_vec_entry) * IWL_POWER_AC;
  1789. u16 pci_pm;
  1790. IWL_DEBUG_POWER("Initialize power \n");
  1791. pow_data = &(priv->power_data);
  1792. memset(pow_data, 0, sizeof(*pow_data));
  1793. pow_data->active_index = IWL_POWER_RANGE_0;
  1794. pow_data->dtim_val = 0xffff;
  1795. memcpy(&pow_data->pwr_range_0[0], &range_0[0], size);
  1796. memcpy(&pow_data->pwr_range_1[0], &range_1[0], size);
  1797. rc = pci_read_config_word(priv->pci_dev, PCI_LINK_CTRL, &pci_pm);
  1798. if (rc != 0)
  1799. return 0;
  1800. else {
  1801. struct iwl4965_powertable_cmd *cmd;
  1802. IWL_DEBUG_POWER("adjust power command flags\n");
  1803. for (i = 0; i < IWL_POWER_AC; i++) {
  1804. cmd = &pow_data->pwr_range_0[i].cmd;
  1805. if (pci_pm & 0x1)
  1806. cmd->flags &= ~IWL_POWER_PCI_PM_MSK;
  1807. else
  1808. cmd->flags |= IWL_POWER_PCI_PM_MSK;
  1809. }
  1810. }
  1811. return rc;
  1812. }
  1813. static int iwl4965_update_power_cmd(struct iwl4965_priv *priv,
  1814. struct iwl4965_powertable_cmd *cmd, u32 mode)
  1815. {
  1816. int rc = 0, i;
  1817. u8 skip;
  1818. u32 max_sleep = 0;
  1819. struct iwl4965_power_vec_entry *range;
  1820. u8 period = 0;
  1821. struct iwl4965_power_mgr *pow_data;
  1822. if (mode > IWL_POWER_INDEX_5) {
  1823. IWL_DEBUG_POWER("Error invalid power mode \n");
  1824. return -1;
  1825. }
  1826. pow_data = &(priv->power_data);
  1827. if (pow_data->active_index == IWL_POWER_RANGE_0)
  1828. range = &pow_data->pwr_range_0[0];
  1829. else
  1830. range = &pow_data->pwr_range_1[1];
  1831. memcpy(cmd, &range[mode].cmd, sizeof(struct iwl4965_powertable_cmd));
  1832. #ifdef IWL_MAC80211_DISABLE
  1833. if (priv->assoc_network != NULL) {
  1834. unsigned long flags;
  1835. period = priv->assoc_network->tim.tim_period;
  1836. }
  1837. #endif /*IWL_MAC80211_DISABLE */
  1838. skip = range[mode].no_dtim;
  1839. if (period == 0) {
  1840. period = 1;
  1841. skip = 0;
  1842. }
  1843. if (skip == 0) {
  1844. max_sleep = period;
  1845. cmd->flags &= ~IWL_POWER_SLEEP_OVER_DTIM_MSK;
  1846. } else {
  1847. __le32 slp_itrvl = cmd->sleep_interval[IWL_POWER_VEC_SIZE - 1];
  1848. max_sleep = (le32_to_cpu(slp_itrvl) / period) * period;
  1849. cmd->flags |= IWL_POWER_SLEEP_OVER_DTIM_MSK;
  1850. }
  1851. for (i = 0; i < IWL_POWER_VEC_SIZE; i++) {
  1852. if (le32_to_cpu(cmd->sleep_interval[i]) > max_sleep)
  1853. cmd->sleep_interval[i] = cpu_to_le32(max_sleep);
  1854. }
  1855. IWL_DEBUG_POWER("Flags value = 0x%08X\n", cmd->flags);
  1856. IWL_DEBUG_POWER("Tx timeout = %u\n", le32_to_cpu(cmd->tx_data_timeout));
  1857. IWL_DEBUG_POWER("Rx timeout = %u\n", le32_to_cpu(cmd->rx_data_timeout));
  1858. IWL_DEBUG_POWER("Sleep interval vector = { %d , %d , %d , %d , %d }\n",
  1859. le32_to_cpu(cmd->sleep_interval[0]),
  1860. le32_to_cpu(cmd->sleep_interval[1]),
  1861. le32_to_cpu(cmd->sleep_interval[2]),
  1862. le32_to_cpu(cmd->sleep_interval[3]),
  1863. le32_to_cpu(cmd->sleep_interval[4]));
  1864. return rc;
  1865. }
  1866. static int iwl4965_send_power_mode(struct iwl4965_priv *priv, u32 mode)
  1867. {
  1868. u32 uninitialized_var(final_mode);
  1869. int rc;
  1870. struct iwl4965_powertable_cmd cmd;
  1871. /* If on battery, set to 3,
  1872. * if plugged into AC power, set to CAM ("continuously aware mode"),
  1873. * else user level */
  1874. switch (mode) {
  1875. case IWL_POWER_BATTERY:
  1876. final_mode = IWL_POWER_INDEX_3;
  1877. break;
  1878. case IWL_POWER_AC:
  1879. final_mode = IWL_POWER_MODE_CAM;
  1880. break;
  1881. default:
  1882. final_mode = mode;
  1883. break;
  1884. }
  1885. cmd.keep_alive_beacons = 0;
  1886. iwl4965_update_power_cmd(priv, &cmd, final_mode);
  1887. rc = iwl4965_send_cmd_pdu(priv, POWER_TABLE_CMD, sizeof(cmd), &cmd);
  1888. if (final_mode == IWL_POWER_MODE_CAM)
  1889. clear_bit(STATUS_POWER_PMI, &priv->status);
  1890. else
  1891. set_bit(STATUS_POWER_PMI, &priv->status);
  1892. return rc;
  1893. }
  1894. int iwl4965_is_network_packet(struct iwl4965_priv *priv, struct ieee80211_hdr *header)
  1895. {
  1896. /* Filter incoming packets to determine if they are targeted toward
  1897. * this network, discarding packets coming from ourselves */
  1898. switch (priv->iw_mode) {
  1899. case IEEE80211_IF_TYPE_IBSS: /* Header: Dest. | Source | BSSID */
  1900. /* packets from our adapter are dropped (echo) */
  1901. if (!compare_ether_addr(header->addr2, priv->mac_addr))
  1902. return 0;
  1903. /* {broad,multi}cast packets to our IBSS go through */
  1904. if (is_multicast_ether_addr(header->addr1))
  1905. return !compare_ether_addr(header->addr3, priv->bssid);
  1906. /* packets to our adapter go through */
  1907. return !compare_ether_addr(header->addr1, priv->mac_addr);
  1908. case IEEE80211_IF_TYPE_STA: /* Header: Dest. | AP{BSSID} | Source */
  1909. /* packets from our adapter are dropped (echo) */
  1910. if (!compare_ether_addr(header->addr3, priv->mac_addr))
  1911. return 0;
  1912. /* {broad,multi}cast packets to our BSS go through */
  1913. if (is_multicast_ether_addr(header->addr1))
  1914. return !compare_ether_addr(header->addr2, priv->bssid);
  1915. /* packets to our adapter go through */
  1916. return !compare_ether_addr(header->addr1, priv->mac_addr);
  1917. }
  1918. return 1;
  1919. }
  1920. #define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x
  1921. static const char *iwl4965_get_tx_fail_reason(u32 status)
  1922. {
  1923. switch (status & TX_STATUS_MSK) {
  1924. case TX_STATUS_SUCCESS:
  1925. return "SUCCESS";
  1926. TX_STATUS_ENTRY(SHORT_LIMIT);
  1927. TX_STATUS_ENTRY(LONG_LIMIT);
  1928. TX_STATUS_ENTRY(FIFO_UNDERRUN);
  1929. TX_STATUS_ENTRY(MGMNT_ABORT);
  1930. TX_STATUS_ENTRY(NEXT_FRAG);
  1931. TX_STATUS_ENTRY(LIFE_EXPIRE);
  1932. TX_STATUS_ENTRY(DEST_PS);
  1933. TX_STATUS_ENTRY(ABORTED);
  1934. TX_STATUS_ENTRY(BT_RETRY);
  1935. TX_STATUS_ENTRY(STA_INVALID);
  1936. TX_STATUS_ENTRY(FRAG_DROPPED);
  1937. TX_STATUS_ENTRY(TID_DISABLE);
  1938. TX_STATUS_ENTRY(FRAME_FLUSHED);
  1939. TX_STATUS_ENTRY(INSUFFICIENT_CF_POLL);
  1940. TX_STATUS_ENTRY(TX_LOCKED);
  1941. TX_STATUS_ENTRY(NO_BEACON_ON_RADAR);
  1942. }
  1943. return "UNKNOWN";
  1944. }
  1945. /**
  1946. * iwl4965_scan_cancel - Cancel any currently executing HW scan
  1947. *
  1948. * NOTE: priv->mutex is not required before calling this function
  1949. */
  1950. static int iwl4965_scan_cancel(struct iwl4965_priv *priv)
  1951. {
  1952. if (!test_bit(STATUS_SCAN_HW, &priv->status)) {
  1953. clear_bit(STATUS_SCANNING, &priv->status);
  1954. return 0;
  1955. }
  1956. if (test_bit(STATUS_SCANNING, &priv->status)) {
  1957. if (!test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  1958. IWL_DEBUG_SCAN("Queuing scan abort.\n");
  1959. set_bit(STATUS_SCAN_ABORTING, &priv->status);
  1960. queue_work(priv->workqueue, &priv->abort_scan);
  1961. } else
  1962. IWL_DEBUG_SCAN("Scan abort already in progress.\n");
  1963. return test_bit(STATUS_SCANNING, &priv->status);
  1964. }
  1965. return 0;
  1966. }
  1967. /**
  1968. * iwl4965_scan_cancel_timeout - Cancel any currently executing HW scan
  1969. * @ms: amount of time to wait (in milliseconds) for scan to abort
  1970. *
  1971. * NOTE: priv->mutex must be held before calling this function
  1972. */
  1973. static int iwl4965_scan_cancel_timeout(struct iwl4965_priv *priv, unsigned long ms)
  1974. {
  1975. unsigned long now = jiffies;
  1976. int ret;
  1977. ret = iwl4965_scan_cancel(priv);
  1978. if (ret && ms) {
  1979. mutex_unlock(&priv->mutex);
  1980. while (!time_after(jiffies, now + msecs_to_jiffies(ms)) &&
  1981. test_bit(STATUS_SCANNING, &priv->status))
  1982. msleep(1);
  1983. mutex_lock(&priv->mutex);
  1984. return test_bit(STATUS_SCANNING, &priv->status);
  1985. }
  1986. return ret;
  1987. }
  1988. static void iwl4965_sequence_reset(struct iwl4965_priv *priv)
  1989. {
  1990. /* Reset ieee stats */
  1991. /* We don't reset the net_device_stats (ieee->stats) on
  1992. * re-association */
  1993. priv->last_seq_num = -1;
  1994. priv->last_frag_num = -1;
  1995. priv->last_packet_time = 0;
  1996. iwl4965_scan_cancel(priv);
  1997. }
  1998. #define MAX_UCODE_BEACON_INTERVAL 4096
  1999. #define INTEL_CONN_LISTEN_INTERVAL __constant_cpu_to_le16(0xA)
  2000. static __le16 iwl4965_adjust_beacon_interval(u16 beacon_val)
  2001. {
  2002. u16 new_val = 0;
  2003. u16 beacon_factor = 0;
  2004. beacon_factor =
  2005. (beacon_val + MAX_UCODE_BEACON_INTERVAL)
  2006. / MAX_UCODE_BEACON_INTERVAL;
  2007. new_val = beacon_val / beacon_factor;
  2008. return cpu_to_le16(new_val);
  2009. }
  2010. static void iwl4965_setup_rxon_timing(struct iwl4965_priv *priv)
  2011. {
  2012. u64 interval_tm_unit;
  2013. u64 tsf, result;
  2014. unsigned long flags;
  2015. struct ieee80211_conf *conf = NULL;
  2016. u16 beacon_int = 0;
  2017. conf = ieee80211_get_hw_conf(priv->hw);
  2018. spin_lock_irqsave(&priv->lock, flags);
  2019. priv->rxon_timing.timestamp.dw[1] = cpu_to_le32(priv->timestamp1);
  2020. priv->rxon_timing.timestamp.dw[0] = cpu_to_le32(priv->timestamp0);
  2021. priv->rxon_timing.listen_interval = INTEL_CONN_LISTEN_INTERVAL;
  2022. tsf = priv->timestamp1;
  2023. tsf = ((tsf << 32) | priv->timestamp0);
  2024. beacon_int = priv->beacon_int;
  2025. spin_unlock_irqrestore(&priv->lock, flags);
  2026. if (priv->iw_mode == IEEE80211_IF_TYPE_STA) {
  2027. if (beacon_int == 0) {
  2028. priv->rxon_timing.beacon_interval = cpu_to_le16(100);
  2029. priv->rxon_timing.beacon_init_val = cpu_to_le32(102400);
  2030. } else {
  2031. priv->rxon_timing.beacon_interval =
  2032. cpu_to_le16(beacon_int);
  2033. priv->rxon_timing.beacon_interval =
  2034. iwl4965_adjust_beacon_interval(
  2035. le16_to_cpu(priv->rxon_timing.beacon_interval));
  2036. }
  2037. priv->rxon_timing.atim_window = 0;
  2038. } else {
  2039. priv->rxon_timing.beacon_interval =
  2040. iwl4965_adjust_beacon_interval(conf->beacon_int);
  2041. /* TODO: we need to get atim_window from upper stack
  2042. * for now we set to 0 */
  2043. priv->rxon_timing.atim_window = 0;
  2044. }
  2045. interval_tm_unit =
  2046. (le16_to_cpu(priv->rxon_timing.beacon_interval) * 1024);
  2047. result = do_div(tsf, interval_tm_unit);
  2048. priv->rxon_timing.beacon_init_val =
  2049. cpu_to_le32((u32) ((u64) interval_tm_unit - result));
  2050. IWL_DEBUG_ASSOC
  2051. ("beacon interval %d beacon timer %d beacon tim %d\n",
  2052. le16_to_cpu(priv->rxon_timing.beacon_interval),
  2053. le32_to_cpu(priv->rxon_timing.beacon_init_val),
  2054. le16_to_cpu(priv->rxon_timing.atim_window));
  2055. }
  2056. static int iwl4965_scan_initiate(struct iwl4965_priv *priv)
  2057. {
  2058. if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
  2059. IWL_ERROR("APs don't scan.\n");
  2060. return 0;
  2061. }
  2062. if (!iwl4965_is_ready_rf(priv)) {
  2063. IWL_DEBUG_SCAN("Aborting scan due to not ready.\n");
  2064. return -EIO;
  2065. }
  2066. if (test_bit(STATUS_SCANNING, &priv->status)) {
  2067. IWL_DEBUG_SCAN("Scan already in progress.\n");
  2068. return -EAGAIN;
  2069. }
  2070. if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  2071. IWL_DEBUG_SCAN("Scan request while abort pending. "
  2072. "Queuing.\n");
  2073. return -EAGAIN;
  2074. }
  2075. IWL_DEBUG_INFO("Starting scan...\n");
  2076. priv->scan_bands = 2;
  2077. set_bit(STATUS_SCANNING, &priv->status);
  2078. priv->scan_start = jiffies;
  2079. priv->scan_pass_start = priv->scan_start;
  2080. queue_work(priv->workqueue, &priv->request_scan);
  2081. return 0;
  2082. }
  2083. static int iwl4965_set_rxon_hwcrypto(struct iwl4965_priv *priv, int hw_decrypt)
  2084. {
  2085. struct iwl4965_rxon_cmd *rxon = &priv->staging_rxon;
  2086. if (hw_decrypt)
  2087. rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK;
  2088. else
  2089. rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK;
  2090. return 0;
  2091. }
  2092. static void iwl4965_set_flags_for_phymode(struct iwl4965_priv *priv, u8 phymode)
  2093. {
  2094. if (phymode == MODE_IEEE80211A) {
  2095. priv->staging_rxon.flags &=
  2096. ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK
  2097. | RXON_FLG_CCK_MSK);
  2098. priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
  2099. } else {
  2100. /* Copied from iwl4965_bg_post_associate() */
  2101. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
  2102. priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
  2103. else
  2104. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  2105. if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
  2106. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  2107. priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
  2108. priv->staging_rxon.flags |= RXON_FLG_AUTO_DETECT_MSK;
  2109. priv->staging_rxon.flags &= ~RXON_FLG_CCK_MSK;
  2110. }
  2111. }
  2112. /*
  2113. * initialize rxon structure with default values from eeprom
  2114. */
  2115. static void iwl4965_connection_init_rx_config(struct iwl4965_priv *priv)
  2116. {
  2117. const struct iwl4965_channel_info *ch_info;
  2118. memset(&priv->staging_rxon, 0, sizeof(priv->staging_rxon));
  2119. switch (priv->iw_mode) {
  2120. case IEEE80211_IF_TYPE_AP:
  2121. priv->staging_rxon.dev_type = RXON_DEV_TYPE_AP;
  2122. break;
  2123. case IEEE80211_IF_TYPE_STA:
  2124. priv->staging_rxon.dev_type = RXON_DEV_TYPE_ESS;
  2125. priv->staging_rxon.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK;
  2126. break;
  2127. case IEEE80211_IF_TYPE_IBSS:
  2128. priv->staging_rxon.dev_type = RXON_DEV_TYPE_IBSS;
  2129. priv->staging_rxon.flags = RXON_FLG_SHORT_PREAMBLE_MSK;
  2130. priv->staging_rxon.filter_flags = RXON_FILTER_BCON_AWARE_MSK |
  2131. RXON_FILTER_ACCEPT_GRP_MSK;
  2132. break;
  2133. case IEEE80211_IF_TYPE_MNTR:
  2134. priv->staging_rxon.dev_type = RXON_DEV_TYPE_SNIFFER;
  2135. priv->staging_rxon.filter_flags = RXON_FILTER_PROMISC_MSK |
  2136. RXON_FILTER_CTL2HOST_MSK | RXON_FILTER_ACCEPT_GRP_MSK;
  2137. break;
  2138. }
  2139. #if 0
  2140. /* TODO: Figure out when short_preamble would be set and cache from
  2141. * that */
  2142. if (!hw_to_local(priv->hw)->short_preamble)
  2143. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  2144. else
  2145. priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  2146. #endif
  2147. ch_info = iwl4965_get_channel_info(priv, priv->phymode,
  2148. le16_to_cpu(priv->staging_rxon.channel));
  2149. if (!ch_info)
  2150. ch_info = &priv->channel_info[0];
  2151. /*
  2152. * in some case A channels are all non IBSS
  2153. * in this case force B/G channel
  2154. */
  2155. if ((priv->iw_mode == IEEE80211_IF_TYPE_IBSS) &&
  2156. !(is_channel_ibss(ch_info)))
  2157. ch_info = &priv->channel_info[0];
  2158. priv->staging_rxon.channel = cpu_to_le16(ch_info->channel);
  2159. if (is_channel_a_band(ch_info))
  2160. priv->phymode = MODE_IEEE80211A;
  2161. else
  2162. priv->phymode = MODE_IEEE80211G;
  2163. iwl4965_set_flags_for_phymode(priv, priv->phymode);
  2164. priv->staging_rxon.ofdm_basic_rates =
  2165. (IWL_OFDM_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
  2166. priv->staging_rxon.cck_basic_rates =
  2167. (IWL_CCK_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
  2168. priv->staging_rxon.flags &= ~(RXON_FLG_CHANNEL_MODE_MIXED_MSK |
  2169. RXON_FLG_CHANNEL_MODE_PURE_40_MSK);
  2170. memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
  2171. memcpy(priv->staging_rxon.wlap_bssid_addr, priv->mac_addr, ETH_ALEN);
  2172. priv->staging_rxon.ofdm_ht_single_stream_basic_rates = 0xff;
  2173. priv->staging_rxon.ofdm_ht_dual_stream_basic_rates = 0xff;
  2174. iwl4965_set_rxon_chain(priv);
  2175. }
  2176. static int iwl4965_set_mode(struct iwl4965_priv *priv, int mode)
  2177. {
  2178. if (!iwl4965_is_ready_rf(priv))
  2179. return -EAGAIN;
  2180. if (mode == IEEE80211_IF_TYPE_IBSS) {
  2181. const struct iwl4965_channel_info *ch_info;
  2182. ch_info = iwl4965_get_channel_info(priv,
  2183. priv->phymode,
  2184. le16_to_cpu(priv->staging_rxon.channel));
  2185. if (!ch_info || !is_channel_ibss(ch_info)) {
  2186. IWL_ERROR("channel %d not IBSS channel\n",
  2187. le16_to_cpu(priv->staging_rxon.channel));
  2188. return -EINVAL;
  2189. }
  2190. }
  2191. cancel_delayed_work(&priv->scan_check);
  2192. if (iwl4965_scan_cancel_timeout(priv, 100)) {
  2193. IWL_WARNING("Aborted scan still in progress after 100ms\n");
  2194. IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
  2195. return -EAGAIN;
  2196. }
  2197. priv->iw_mode = mode;
  2198. iwl4965_connection_init_rx_config(priv);
  2199. memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
  2200. iwl4965_clear_stations_table(priv);
  2201. iwl4965_commit_rxon(priv);
  2202. return 0;
  2203. }
  2204. static void iwl4965_build_tx_cmd_hwcrypto(struct iwl4965_priv *priv,
  2205. struct ieee80211_tx_control *ctl,
  2206. struct iwl4965_cmd *cmd,
  2207. struct sk_buff *skb_frag,
  2208. int last_frag)
  2209. {
  2210. struct iwl4965_hw_key *keyinfo = &priv->stations[ctl->key_idx].keyinfo;
  2211. switch (keyinfo->alg) {
  2212. case ALG_CCMP:
  2213. cmd->cmd.tx.sec_ctl = TX_CMD_SEC_CCM;
  2214. memcpy(cmd->cmd.tx.key, keyinfo->key, keyinfo->keylen);
  2215. IWL_DEBUG_TX("tx_cmd with aes hwcrypto\n");
  2216. break;
  2217. case ALG_TKIP:
  2218. #if 0
  2219. cmd->cmd.tx.sec_ctl = TX_CMD_SEC_TKIP;
  2220. if (last_frag)
  2221. memcpy(cmd->cmd.tx.tkip_mic.byte, skb_frag->tail - 8,
  2222. 8);
  2223. else
  2224. memset(cmd->cmd.tx.tkip_mic.byte, 0, 8);
  2225. #endif
  2226. break;
  2227. case ALG_WEP:
  2228. cmd->cmd.tx.sec_ctl = TX_CMD_SEC_WEP |
  2229. (ctl->key_idx & TX_CMD_SEC_MSK) << TX_CMD_SEC_SHIFT;
  2230. if (keyinfo->keylen == 13)
  2231. cmd->cmd.tx.sec_ctl |= TX_CMD_SEC_KEY128;
  2232. memcpy(&cmd->cmd.tx.key[3], keyinfo->key, keyinfo->keylen);
  2233. IWL_DEBUG_TX("Configuring packet for WEP encryption "
  2234. "with key %d\n", ctl->key_idx);
  2235. break;
  2236. default:
  2237. printk(KERN_ERR "Unknown encode alg %d\n", keyinfo->alg);
  2238. break;
  2239. }
  2240. }
  2241. /*
  2242. * handle build REPLY_TX command notification.
  2243. */
  2244. static void iwl4965_build_tx_cmd_basic(struct iwl4965_priv *priv,
  2245. struct iwl4965_cmd *cmd,
  2246. struct ieee80211_tx_control *ctrl,
  2247. struct ieee80211_hdr *hdr,
  2248. int is_unicast, u8 std_id)
  2249. {
  2250. __le16 *qc;
  2251. u16 fc = le16_to_cpu(hdr->frame_control);
  2252. __le32 tx_flags = cmd->cmd.tx.tx_flags;
  2253. cmd->cmd.tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
  2254. if (!(ctrl->flags & IEEE80211_TXCTL_NO_ACK)) {
  2255. tx_flags |= TX_CMD_FLG_ACK_MSK;
  2256. if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT)
  2257. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  2258. if (ieee80211_is_probe_response(fc) &&
  2259. !(le16_to_cpu(hdr->seq_ctrl) & 0xf))
  2260. tx_flags |= TX_CMD_FLG_TSF_MSK;
  2261. } else {
  2262. tx_flags &= (~TX_CMD_FLG_ACK_MSK);
  2263. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  2264. }
  2265. cmd->cmd.tx.sta_id = std_id;
  2266. if (ieee80211_get_morefrag(hdr))
  2267. tx_flags |= TX_CMD_FLG_MORE_FRAG_MSK;
  2268. qc = ieee80211_get_qos_ctrl(hdr);
  2269. if (qc) {
  2270. cmd->cmd.tx.tid_tspec = (u8) (le16_to_cpu(*qc) & 0xf);
  2271. tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK;
  2272. } else
  2273. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  2274. if (ctrl->flags & IEEE80211_TXCTL_USE_RTS_CTS) {
  2275. tx_flags |= TX_CMD_FLG_RTS_MSK;
  2276. tx_flags &= ~TX_CMD_FLG_CTS_MSK;
  2277. } else if (ctrl->flags & IEEE80211_TXCTL_USE_CTS_PROTECT) {
  2278. tx_flags &= ~TX_CMD_FLG_RTS_MSK;
  2279. tx_flags |= TX_CMD_FLG_CTS_MSK;
  2280. }
  2281. if ((tx_flags & TX_CMD_FLG_RTS_MSK) || (tx_flags & TX_CMD_FLG_CTS_MSK))
  2282. tx_flags |= TX_CMD_FLG_FULL_TXOP_PROT_MSK;
  2283. tx_flags &= ~(TX_CMD_FLG_ANT_SEL_MSK);
  2284. if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT) {
  2285. if ((fc & IEEE80211_FCTL_STYPE) == IEEE80211_STYPE_ASSOC_REQ ||
  2286. (fc & IEEE80211_FCTL_STYPE) == IEEE80211_STYPE_REASSOC_REQ)
  2287. cmd->cmd.tx.timeout.pm_frame_timeout = cpu_to_le16(3);
  2288. else
  2289. cmd->cmd.tx.timeout.pm_frame_timeout = cpu_to_le16(2);
  2290. } else
  2291. cmd->cmd.tx.timeout.pm_frame_timeout = 0;
  2292. cmd->cmd.tx.driver_txop = 0;
  2293. cmd->cmd.tx.tx_flags = tx_flags;
  2294. cmd->cmd.tx.next_frame_len = 0;
  2295. }
  2296. static int iwl4965_get_sta_id(struct iwl4965_priv *priv, struct ieee80211_hdr *hdr)
  2297. {
  2298. int sta_id;
  2299. u16 fc = le16_to_cpu(hdr->frame_control);
  2300. DECLARE_MAC_BUF(mac);
  2301. /* If this frame is broadcast or not data then use the broadcast
  2302. * station id */
  2303. if (((fc & IEEE80211_FCTL_FTYPE) != IEEE80211_FTYPE_DATA) ||
  2304. is_multicast_ether_addr(hdr->addr1))
  2305. return priv->hw_setting.bcast_sta_id;
  2306. switch (priv->iw_mode) {
  2307. /* If this frame is part of a BSS network (we're a station), then
  2308. * we use the AP's station id */
  2309. case IEEE80211_IF_TYPE_STA:
  2310. return IWL_AP_ID;
  2311. /* If we are an AP, then find the station, or use BCAST */
  2312. case IEEE80211_IF_TYPE_AP:
  2313. sta_id = iwl4965_hw_find_station(priv, hdr->addr1);
  2314. if (sta_id != IWL_INVALID_STATION)
  2315. return sta_id;
  2316. return priv->hw_setting.bcast_sta_id;
  2317. /* If this frame is part of a IBSS network, then we use the
  2318. * target specific station id */
  2319. case IEEE80211_IF_TYPE_IBSS:
  2320. sta_id = iwl4965_hw_find_station(priv, hdr->addr1);
  2321. if (sta_id != IWL_INVALID_STATION)
  2322. return sta_id;
  2323. sta_id = iwl4965_add_station_flags(priv, hdr->addr1, 0, CMD_ASYNC);
  2324. if (sta_id != IWL_INVALID_STATION)
  2325. return sta_id;
  2326. IWL_DEBUG_DROP("Station %s not in station map. "
  2327. "Defaulting to broadcast...\n",
  2328. print_mac(mac, hdr->addr1));
  2329. iwl4965_print_hex_dump(IWL_DL_DROP, (u8 *) hdr, sizeof(*hdr));
  2330. return priv->hw_setting.bcast_sta_id;
  2331. default:
  2332. IWL_WARNING("Unknown mode of operation: %d", priv->iw_mode);
  2333. return priv->hw_setting.bcast_sta_id;
  2334. }
  2335. }
  2336. /*
  2337. * start REPLY_TX command process
  2338. */
  2339. static int iwl4965_tx_skb(struct iwl4965_priv *priv,
  2340. struct sk_buff *skb, struct ieee80211_tx_control *ctl)
  2341. {
  2342. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
  2343. struct iwl4965_tfd_frame *tfd;
  2344. u32 *control_flags;
  2345. int txq_id = ctl->queue;
  2346. struct iwl4965_tx_queue *txq = NULL;
  2347. struct iwl4965_queue *q = NULL;
  2348. dma_addr_t phys_addr;
  2349. dma_addr_t txcmd_phys;
  2350. struct iwl4965_cmd *out_cmd = NULL;
  2351. u16 len, idx, len_org;
  2352. u8 id, hdr_len, unicast;
  2353. u8 sta_id;
  2354. u16 seq_number = 0;
  2355. u16 fc;
  2356. __le16 *qc;
  2357. u8 wait_write_ptr = 0;
  2358. unsigned long flags;
  2359. int rc;
  2360. spin_lock_irqsave(&priv->lock, flags);
  2361. if (iwl4965_is_rfkill(priv)) {
  2362. IWL_DEBUG_DROP("Dropping - RF KILL\n");
  2363. goto drop_unlock;
  2364. }
  2365. if (!priv->interface_id) {
  2366. IWL_DEBUG_DROP("Dropping - !priv->interface_id\n");
  2367. goto drop_unlock;
  2368. }
  2369. if ((ctl->tx_rate & 0xFF) == IWL_INVALID_RATE) {
  2370. IWL_ERROR("ERROR: No TX rate available.\n");
  2371. goto drop_unlock;
  2372. }
  2373. unicast = !is_multicast_ether_addr(hdr->addr1);
  2374. id = 0;
  2375. fc = le16_to_cpu(hdr->frame_control);
  2376. #ifdef CONFIG_IWL4965_DEBUG
  2377. if (ieee80211_is_auth(fc))
  2378. IWL_DEBUG_TX("Sending AUTH frame\n");
  2379. else if (ieee80211_is_assoc_request(fc))
  2380. IWL_DEBUG_TX("Sending ASSOC frame\n");
  2381. else if (ieee80211_is_reassoc_request(fc))
  2382. IWL_DEBUG_TX("Sending REASSOC frame\n");
  2383. #endif
  2384. if (!iwl4965_is_associated(priv) &&
  2385. ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_DATA)) {
  2386. IWL_DEBUG_DROP("Dropping - !iwl4965_is_associated\n");
  2387. goto drop_unlock;
  2388. }
  2389. spin_unlock_irqrestore(&priv->lock, flags);
  2390. hdr_len = ieee80211_get_hdrlen(fc);
  2391. sta_id = iwl4965_get_sta_id(priv, hdr);
  2392. if (sta_id == IWL_INVALID_STATION) {
  2393. DECLARE_MAC_BUF(mac);
  2394. IWL_DEBUG_DROP("Dropping - INVALID STATION: %s\n",
  2395. print_mac(mac, hdr->addr1));
  2396. goto drop;
  2397. }
  2398. IWL_DEBUG_RATE("station Id %d\n", sta_id);
  2399. qc = ieee80211_get_qos_ctrl(hdr);
  2400. if (qc) {
  2401. u8 tid = (u8)(le16_to_cpu(*qc) & 0xf);
  2402. seq_number = priv->stations[sta_id].tid[tid].seq_number &
  2403. IEEE80211_SCTL_SEQ;
  2404. hdr->seq_ctrl = cpu_to_le16(seq_number) |
  2405. (hdr->seq_ctrl &
  2406. __constant_cpu_to_le16(IEEE80211_SCTL_FRAG));
  2407. seq_number += 0x10;
  2408. #ifdef CONFIG_IWL4965_HT
  2409. #ifdef CONFIG_IWL4965_HT_AGG
  2410. /* aggregation is on for this <sta,tid> */
  2411. if (ctl->flags & IEEE80211_TXCTL_HT_MPDU_AGG)
  2412. txq_id = priv->stations[sta_id].tid[tid].agg.txq_id;
  2413. #endif /* CONFIG_IWL4965_HT_AGG */
  2414. #endif /* CONFIG_IWL4965_HT */
  2415. }
  2416. txq = &priv->txq[txq_id];
  2417. q = &txq->q;
  2418. spin_lock_irqsave(&priv->lock, flags);
  2419. tfd = &txq->bd[q->write_ptr];
  2420. memset(tfd, 0, sizeof(*tfd));
  2421. control_flags = (u32 *) tfd;
  2422. idx = get_cmd_index(q, q->write_ptr, 0);
  2423. memset(&(txq->txb[q->write_ptr]), 0, sizeof(struct iwl4965_tx_info));
  2424. txq->txb[q->write_ptr].skb[0] = skb;
  2425. memcpy(&(txq->txb[q->write_ptr].status.control),
  2426. ctl, sizeof(struct ieee80211_tx_control));
  2427. out_cmd = &txq->cmd[idx];
  2428. memset(&out_cmd->hdr, 0, sizeof(out_cmd->hdr));
  2429. memset(&out_cmd->cmd.tx, 0, sizeof(out_cmd->cmd.tx));
  2430. out_cmd->hdr.cmd = REPLY_TX;
  2431. out_cmd->hdr.sequence = cpu_to_le16((u16)(QUEUE_TO_SEQ(txq_id) |
  2432. INDEX_TO_SEQ(q->write_ptr)));
  2433. /* copy frags header */
  2434. memcpy(out_cmd->cmd.tx.hdr, hdr, hdr_len);
  2435. /* hdr = (struct ieee80211_hdr *)out_cmd->cmd.tx.hdr; */
  2436. len = priv->hw_setting.tx_cmd_len +
  2437. sizeof(struct iwl4965_cmd_header) + hdr_len;
  2438. len_org = len;
  2439. len = (len + 3) & ~3;
  2440. if (len_org != len)
  2441. len_org = 1;
  2442. else
  2443. len_org = 0;
  2444. txcmd_phys = txq->dma_addr_cmd + sizeof(struct iwl4965_cmd) * idx +
  2445. offsetof(struct iwl4965_cmd, hdr);
  2446. iwl4965_hw_txq_attach_buf_to_tfd(priv, tfd, txcmd_phys, len);
  2447. if (!(ctl->flags & IEEE80211_TXCTL_DO_NOT_ENCRYPT))
  2448. iwl4965_build_tx_cmd_hwcrypto(priv, ctl, out_cmd, skb, 0);
  2449. /* 802.11 null functions have no payload... */
  2450. len = skb->len - hdr_len;
  2451. if (len) {
  2452. phys_addr = pci_map_single(priv->pci_dev, skb->data + hdr_len,
  2453. len, PCI_DMA_TODEVICE);
  2454. iwl4965_hw_txq_attach_buf_to_tfd(priv, tfd, phys_addr, len);
  2455. }
  2456. if (len_org)
  2457. out_cmd->cmd.tx.tx_flags |= TX_CMD_FLG_MH_PAD_MSK;
  2458. len = (u16)skb->len;
  2459. out_cmd->cmd.tx.len = cpu_to_le16(len);
  2460. /* TODO need this for burst mode later on */
  2461. iwl4965_build_tx_cmd_basic(priv, out_cmd, ctl, hdr, unicast, sta_id);
  2462. /* set is_hcca to 0; it probably will never be implemented */
  2463. iwl4965_hw_build_tx_cmd_rate(priv, out_cmd, ctl, hdr, sta_id, 0);
  2464. iwl4965_tx_cmd(priv, out_cmd, sta_id, txcmd_phys,
  2465. hdr, hdr_len, ctl, NULL);
  2466. if (!ieee80211_get_morefrag(hdr)) {
  2467. txq->need_update = 1;
  2468. if (qc) {
  2469. u8 tid = (u8)(le16_to_cpu(*qc) & 0xf);
  2470. priv->stations[sta_id].tid[tid].seq_number = seq_number;
  2471. }
  2472. } else {
  2473. wait_write_ptr = 1;
  2474. txq->need_update = 0;
  2475. }
  2476. iwl4965_print_hex_dump(IWL_DL_TX, out_cmd->cmd.payload,
  2477. sizeof(out_cmd->cmd.tx));
  2478. iwl4965_print_hex_dump(IWL_DL_TX, (u8 *)out_cmd->cmd.tx.hdr,
  2479. ieee80211_get_hdrlen(fc));
  2480. iwl4965_tx_queue_update_wr_ptr(priv, txq, len);
  2481. q->write_ptr = iwl4965_queue_inc_wrap(q->write_ptr, q->n_bd);
  2482. rc = iwl4965_tx_queue_update_write_ptr(priv, txq);
  2483. spin_unlock_irqrestore(&priv->lock, flags);
  2484. if (rc)
  2485. return rc;
  2486. if ((iwl4965_queue_space(q) < q->high_mark)
  2487. && priv->mac80211_registered) {
  2488. if (wait_write_ptr) {
  2489. spin_lock_irqsave(&priv->lock, flags);
  2490. txq->need_update = 1;
  2491. iwl4965_tx_queue_update_write_ptr(priv, txq);
  2492. spin_unlock_irqrestore(&priv->lock, flags);
  2493. }
  2494. ieee80211_stop_queue(priv->hw, ctl->queue);
  2495. }
  2496. return 0;
  2497. drop_unlock:
  2498. spin_unlock_irqrestore(&priv->lock, flags);
  2499. drop:
  2500. return -1;
  2501. }
  2502. static void iwl4965_set_rate(struct iwl4965_priv *priv)
  2503. {
  2504. const struct ieee80211_hw_mode *hw = NULL;
  2505. struct ieee80211_rate *rate;
  2506. int i;
  2507. hw = iwl4965_get_hw_mode(priv, priv->phymode);
  2508. if (!hw) {
  2509. IWL_ERROR("Failed to set rate: unable to get hw mode\n");
  2510. return;
  2511. }
  2512. priv->active_rate = 0;
  2513. priv->active_rate_basic = 0;
  2514. IWL_DEBUG_RATE("Setting rates for 802.11%c\n",
  2515. hw->mode == MODE_IEEE80211A ?
  2516. 'a' : ((hw->mode == MODE_IEEE80211B) ? 'b' : 'g'));
  2517. for (i = 0; i < hw->num_rates; i++) {
  2518. rate = &(hw->rates[i]);
  2519. if ((rate->val < IWL_RATE_COUNT) &&
  2520. (rate->flags & IEEE80211_RATE_SUPPORTED)) {
  2521. IWL_DEBUG_RATE("Adding rate index %d (plcp %d)%s\n",
  2522. rate->val, iwl4965_rates[rate->val].plcp,
  2523. (rate->flags & IEEE80211_RATE_BASIC) ?
  2524. "*" : "");
  2525. priv->active_rate |= (1 << rate->val);
  2526. if (rate->flags & IEEE80211_RATE_BASIC)
  2527. priv->active_rate_basic |= (1 << rate->val);
  2528. } else
  2529. IWL_DEBUG_RATE("Not adding rate %d (plcp %d)\n",
  2530. rate->val, iwl4965_rates[rate->val].plcp);
  2531. }
  2532. IWL_DEBUG_RATE("Set active_rate = %0x, active_rate_basic = %0x\n",
  2533. priv->active_rate, priv->active_rate_basic);
  2534. /*
  2535. * If a basic rate is configured, then use it (adding IWL_RATE_1M_MASK)
  2536. * otherwise set it to the default of all CCK rates and 6, 12, 24 for
  2537. * OFDM
  2538. */
  2539. if (priv->active_rate_basic & IWL_CCK_BASIC_RATES_MASK)
  2540. priv->staging_rxon.cck_basic_rates =
  2541. ((priv->active_rate_basic &
  2542. IWL_CCK_RATES_MASK) >> IWL_FIRST_CCK_RATE) & 0xF;
  2543. else
  2544. priv->staging_rxon.cck_basic_rates =
  2545. (IWL_CCK_BASIC_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
  2546. if (priv->active_rate_basic & IWL_OFDM_BASIC_RATES_MASK)
  2547. priv->staging_rxon.ofdm_basic_rates =
  2548. ((priv->active_rate_basic &
  2549. (IWL_OFDM_BASIC_RATES_MASK | IWL_RATE_6M_MASK)) >>
  2550. IWL_FIRST_OFDM_RATE) & 0xFF;
  2551. else
  2552. priv->staging_rxon.ofdm_basic_rates =
  2553. (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
  2554. }
  2555. static void iwl4965_radio_kill_sw(struct iwl4965_priv *priv, int disable_radio)
  2556. {
  2557. unsigned long flags;
  2558. if (!!disable_radio == test_bit(STATUS_RF_KILL_SW, &priv->status))
  2559. return;
  2560. IWL_DEBUG_RF_KILL("Manual SW RF KILL set to: RADIO %s\n",
  2561. disable_radio ? "OFF" : "ON");
  2562. if (disable_radio) {
  2563. iwl4965_scan_cancel(priv);
  2564. /* FIXME: This is a workaround for AP */
  2565. if (priv->iw_mode != IEEE80211_IF_TYPE_AP) {
  2566. spin_lock_irqsave(&priv->lock, flags);
  2567. iwl4965_write32(priv, CSR_UCODE_DRV_GP1_SET,
  2568. CSR_UCODE_SW_BIT_RFKILL);
  2569. spin_unlock_irqrestore(&priv->lock, flags);
  2570. iwl4965_send_card_state(priv, CARD_STATE_CMD_DISABLE, 0);
  2571. set_bit(STATUS_RF_KILL_SW, &priv->status);
  2572. }
  2573. return;
  2574. }
  2575. spin_lock_irqsave(&priv->lock, flags);
  2576. iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  2577. clear_bit(STATUS_RF_KILL_SW, &priv->status);
  2578. spin_unlock_irqrestore(&priv->lock, flags);
  2579. /* wake up ucode */
  2580. msleep(10);
  2581. spin_lock_irqsave(&priv->lock, flags);
  2582. iwl4965_read32(priv, CSR_UCODE_DRV_GP1);
  2583. if (!iwl4965_grab_nic_access(priv))
  2584. iwl4965_release_nic_access(priv);
  2585. spin_unlock_irqrestore(&priv->lock, flags);
  2586. if (test_bit(STATUS_RF_KILL_HW, &priv->status)) {
  2587. IWL_DEBUG_RF_KILL("Can not turn radio back on - "
  2588. "disabled by HW switch\n");
  2589. return;
  2590. }
  2591. queue_work(priv->workqueue, &priv->restart);
  2592. return;
  2593. }
  2594. void iwl4965_set_decrypted_flag(struct iwl4965_priv *priv, struct sk_buff *skb,
  2595. u32 decrypt_res, struct ieee80211_rx_status *stats)
  2596. {
  2597. u16 fc =
  2598. le16_to_cpu(((struct ieee80211_hdr *)skb->data)->frame_control);
  2599. if (priv->active_rxon.filter_flags & RXON_FILTER_DIS_DECRYPT_MSK)
  2600. return;
  2601. if (!(fc & IEEE80211_FCTL_PROTECTED))
  2602. return;
  2603. IWL_DEBUG_RX("decrypt_res:0x%x\n", decrypt_res);
  2604. switch (decrypt_res & RX_RES_STATUS_SEC_TYPE_MSK) {
  2605. case RX_RES_STATUS_SEC_TYPE_TKIP:
  2606. if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
  2607. RX_RES_STATUS_BAD_ICV_MIC)
  2608. stats->flag |= RX_FLAG_MMIC_ERROR;
  2609. case RX_RES_STATUS_SEC_TYPE_WEP:
  2610. case RX_RES_STATUS_SEC_TYPE_CCMP:
  2611. if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
  2612. RX_RES_STATUS_DECRYPT_OK) {
  2613. IWL_DEBUG_RX("hw decrypt successfully!!!\n");
  2614. stats->flag |= RX_FLAG_DECRYPTED;
  2615. }
  2616. break;
  2617. default:
  2618. break;
  2619. }
  2620. }
  2621. void iwl4965_handle_data_packet_monitor(struct iwl4965_priv *priv,
  2622. struct iwl4965_rx_mem_buffer *rxb,
  2623. void *data, short len,
  2624. struct ieee80211_rx_status *stats,
  2625. u16 phy_flags)
  2626. {
  2627. struct iwl4965_rt_rx_hdr *iwl4965_rt;
  2628. /* First cache any information we need before we overwrite
  2629. * the information provided in the skb from the hardware */
  2630. s8 signal = stats->ssi;
  2631. s8 noise = 0;
  2632. int rate = stats->rate;
  2633. u64 tsf = stats->mactime;
  2634. __le16 phy_flags_hw = cpu_to_le16(phy_flags);
  2635. /* We received data from the HW, so stop the watchdog */
  2636. if (len > IWL_RX_BUF_SIZE - sizeof(*iwl4965_rt)) {
  2637. IWL_DEBUG_DROP("Dropping too large packet in monitor\n");
  2638. return;
  2639. }
  2640. /* copy the frame data to write after where the radiotap header goes */
  2641. iwl4965_rt = (void *)rxb->skb->data;
  2642. memmove(iwl4965_rt->payload, data, len);
  2643. iwl4965_rt->rt_hdr.it_version = PKTHDR_RADIOTAP_VERSION;
  2644. iwl4965_rt->rt_hdr.it_pad = 0; /* always good to zero */
  2645. /* total header + data */
  2646. iwl4965_rt->rt_hdr.it_len = cpu_to_le16(sizeof(*iwl4965_rt));
  2647. /* Set the size of the skb to the size of the frame */
  2648. skb_put(rxb->skb, sizeof(*iwl4965_rt) + len);
  2649. /* Big bitfield of all the fields we provide in radiotap */
  2650. iwl4965_rt->rt_hdr.it_present =
  2651. cpu_to_le32((1 << IEEE80211_RADIOTAP_TSFT) |
  2652. (1 << IEEE80211_RADIOTAP_FLAGS) |
  2653. (1 << IEEE80211_RADIOTAP_RATE) |
  2654. (1 << IEEE80211_RADIOTAP_CHANNEL) |
  2655. (1 << IEEE80211_RADIOTAP_DBM_ANTSIGNAL) |
  2656. (1 << IEEE80211_RADIOTAP_DBM_ANTNOISE) |
  2657. (1 << IEEE80211_RADIOTAP_ANTENNA));
  2658. /* Zero the flags, we'll add to them as we go */
  2659. iwl4965_rt->rt_flags = 0;
  2660. iwl4965_rt->rt_tsf = cpu_to_le64(tsf);
  2661. /* Convert to dBm */
  2662. iwl4965_rt->rt_dbmsignal = signal;
  2663. iwl4965_rt->rt_dbmnoise = noise;
  2664. /* Convert the channel frequency and set the flags */
  2665. iwl4965_rt->rt_channelMHz = cpu_to_le16(stats->freq);
  2666. if (!(phy_flags_hw & RX_RES_PHY_FLAGS_BAND_24_MSK))
  2667. iwl4965_rt->rt_chbitmask =
  2668. cpu_to_le16((IEEE80211_CHAN_OFDM | IEEE80211_CHAN_5GHZ));
  2669. else if (phy_flags_hw & RX_RES_PHY_FLAGS_MOD_CCK_MSK)
  2670. iwl4965_rt->rt_chbitmask =
  2671. cpu_to_le16((IEEE80211_CHAN_CCK | IEEE80211_CHAN_2GHZ));
  2672. else /* 802.11g */
  2673. iwl4965_rt->rt_chbitmask =
  2674. cpu_to_le16((IEEE80211_CHAN_OFDM | IEEE80211_CHAN_2GHZ));
  2675. rate = iwl4965_rate_index_from_plcp(rate);
  2676. if (rate == -1)
  2677. iwl4965_rt->rt_rate = 0;
  2678. else
  2679. iwl4965_rt->rt_rate = iwl4965_rates[rate].ieee;
  2680. /* antenna number */
  2681. iwl4965_rt->rt_antenna =
  2682. le16_to_cpu(phy_flags_hw & RX_RES_PHY_FLAGS_ANTENNA_MSK) >> 4;
  2683. /* set the preamble flag if we have it */
  2684. if (phy_flags_hw & RX_RES_PHY_FLAGS_SHORT_PREAMBLE_MSK)
  2685. iwl4965_rt->rt_flags |= IEEE80211_RADIOTAP_F_SHORTPRE;
  2686. IWL_DEBUG_RX("Rx packet of %d bytes.\n", rxb->skb->len);
  2687. stats->flag |= RX_FLAG_RADIOTAP;
  2688. ieee80211_rx_irqsafe(priv->hw, rxb->skb, stats);
  2689. rxb->skb = NULL;
  2690. }
  2691. #define IWL_PACKET_RETRY_TIME HZ
  2692. int iwl4965_is_duplicate_packet(struct iwl4965_priv *priv, struct ieee80211_hdr *header)
  2693. {
  2694. u16 sc = le16_to_cpu(header->seq_ctrl);
  2695. u16 seq = (sc & IEEE80211_SCTL_SEQ) >> 4;
  2696. u16 frag = sc & IEEE80211_SCTL_FRAG;
  2697. u16 *last_seq, *last_frag;
  2698. unsigned long *last_time;
  2699. switch (priv->iw_mode) {
  2700. case IEEE80211_IF_TYPE_IBSS:{
  2701. struct list_head *p;
  2702. struct iwl4965_ibss_seq *entry = NULL;
  2703. u8 *mac = header->addr2;
  2704. int index = mac[5] & (IWL_IBSS_MAC_HASH_SIZE - 1);
  2705. __list_for_each(p, &priv->ibss_mac_hash[index]) {
  2706. entry = list_entry(p, struct iwl4965_ibss_seq, list);
  2707. if (!compare_ether_addr(entry->mac, mac))
  2708. break;
  2709. }
  2710. if (p == &priv->ibss_mac_hash[index]) {
  2711. entry = kzalloc(sizeof(*entry), GFP_ATOMIC);
  2712. if (!entry) {
  2713. IWL_ERROR("Cannot malloc new mac entry\n");
  2714. return 0;
  2715. }
  2716. memcpy(entry->mac, mac, ETH_ALEN);
  2717. entry->seq_num = seq;
  2718. entry->frag_num = frag;
  2719. entry->packet_time = jiffies;
  2720. list_add(&entry->list, &priv->ibss_mac_hash[index]);
  2721. return 0;
  2722. }
  2723. last_seq = &entry->seq_num;
  2724. last_frag = &entry->frag_num;
  2725. last_time = &entry->packet_time;
  2726. break;
  2727. }
  2728. case IEEE80211_IF_TYPE_STA:
  2729. last_seq = &priv->last_seq_num;
  2730. last_frag = &priv->last_frag_num;
  2731. last_time = &priv->last_packet_time;
  2732. break;
  2733. default:
  2734. return 0;
  2735. }
  2736. if ((*last_seq == seq) &&
  2737. time_after(*last_time + IWL_PACKET_RETRY_TIME, jiffies)) {
  2738. if (*last_frag == frag)
  2739. goto drop;
  2740. if (*last_frag + 1 != frag)
  2741. /* out-of-order fragment */
  2742. goto drop;
  2743. } else
  2744. *last_seq = seq;
  2745. *last_frag = frag;
  2746. *last_time = jiffies;
  2747. return 0;
  2748. drop:
  2749. return 1;
  2750. }
  2751. #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
  2752. #include "iwl-spectrum.h"
  2753. #define BEACON_TIME_MASK_LOW 0x00FFFFFF
  2754. #define BEACON_TIME_MASK_HIGH 0xFF000000
  2755. #define TIME_UNIT 1024
  2756. /*
  2757. * extended beacon time format
  2758. * time in usec will be changed into a 32-bit value in 8:24 format
  2759. * the high 1 byte is the beacon counts
  2760. * the lower 3 bytes is the time in usec within one beacon interval
  2761. */
  2762. static u32 iwl4965_usecs_to_beacons(u32 usec, u32 beacon_interval)
  2763. {
  2764. u32 quot;
  2765. u32 rem;
  2766. u32 interval = beacon_interval * 1024;
  2767. if (!interval || !usec)
  2768. return 0;
  2769. quot = (usec / interval) & (BEACON_TIME_MASK_HIGH >> 24);
  2770. rem = (usec % interval) & BEACON_TIME_MASK_LOW;
  2771. return (quot << 24) + rem;
  2772. }
  2773. /* base is usually what we get from ucode with each received frame,
  2774. * the same as HW timer counter counting down
  2775. */
  2776. static __le32 iwl4965_add_beacon_time(u32 base, u32 addon, u32 beacon_interval)
  2777. {
  2778. u32 base_low = base & BEACON_TIME_MASK_LOW;
  2779. u32 addon_low = addon & BEACON_TIME_MASK_LOW;
  2780. u32 interval = beacon_interval * TIME_UNIT;
  2781. u32 res = (base & BEACON_TIME_MASK_HIGH) +
  2782. (addon & BEACON_TIME_MASK_HIGH);
  2783. if (base_low > addon_low)
  2784. res += base_low - addon_low;
  2785. else if (base_low < addon_low) {
  2786. res += interval + base_low - addon_low;
  2787. res += (1 << 24);
  2788. } else
  2789. res += (1 << 24);
  2790. return cpu_to_le32(res);
  2791. }
  2792. static int iwl4965_get_measurement(struct iwl4965_priv *priv,
  2793. struct ieee80211_measurement_params *params,
  2794. u8 type)
  2795. {
  2796. struct iwl4965_spectrum_cmd spectrum;
  2797. struct iwl4965_rx_packet *res;
  2798. struct iwl4965_host_cmd cmd = {
  2799. .id = REPLY_SPECTRUM_MEASUREMENT_CMD,
  2800. .data = (void *)&spectrum,
  2801. .meta.flags = CMD_WANT_SKB,
  2802. };
  2803. u32 add_time = le64_to_cpu(params->start_time);
  2804. int rc;
  2805. int spectrum_resp_status;
  2806. int duration = le16_to_cpu(params->duration);
  2807. if (iwl4965_is_associated(priv))
  2808. add_time =
  2809. iwl4965_usecs_to_beacons(
  2810. le64_to_cpu(params->start_time) - priv->last_tsf,
  2811. le16_to_cpu(priv->rxon_timing.beacon_interval));
  2812. memset(&spectrum, 0, sizeof(spectrum));
  2813. spectrum.channel_count = cpu_to_le16(1);
  2814. spectrum.flags =
  2815. RXON_FLG_TSF2HOST_MSK | RXON_FLG_ANT_A_MSK | RXON_FLG_DIS_DIV_MSK;
  2816. spectrum.filter_flags = MEASUREMENT_FILTER_FLAG;
  2817. cmd.len = sizeof(spectrum);
  2818. spectrum.len = cpu_to_le16(cmd.len - sizeof(spectrum.len));
  2819. if (iwl4965_is_associated(priv))
  2820. spectrum.start_time =
  2821. iwl4965_add_beacon_time(priv->last_beacon_time,
  2822. add_time,
  2823. le16_to_cpu(priv->rxon_timing.beacon_interval));
  2824. else
  2825. spectrum.start_time = 0;
  2826. spectrum.channels[0].duration = cpu_to_le32(duration * TIME_UNIT);
  2827. spectrum.channels[0].channel = params->channel;
  2828. spectrum.channels[0].type = type;
  2829. if (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK)
  2830. spectrum.flags |= RXON_FLG_BAND_24G_MSK |
  2831. RXON_FLG_AUTO_DETECT_MSK | RXON_FLG_TGG_PROTECT_MSK;
  2832. rc = iwl4965_send_cmd_sync(priv, &cmd);
  2833. if (rc)
  2834. return rc;
  2835. res = (struct iwl4965_rx_packet *)cmd.meta.u.skb->data;
  2836. if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
  2837. IWL_ERROR("Bad return from REPLY_RX_ON_ASSOC command\n");
  2838. rc = -EIO;
  2839. }
  2840. spectrum_resp_status = le16_to_cpu(res->u.spectrum.status);
  2841. switch (spectrum_resp_status) {
  2842. case 0: /* Command will be handled */
  2843. if (res->u.spectrum.id != 0xff) {
  2844. IWL_DEBUG_INFO
  2845. ("Replaced existing measurement: %d\n",
  2846. res->u.spectrum.id);
  2847. priv->measurement_status &= ~MEASUREMENT_READY;
  2848. }
  2849. priv->measurement_status |= MEASUREMENT_ACTIVE;
  2850. rc = 0;
  2851. break;
  2852. case 1: /* Command will not be handled */
  2853. rc = -EAGAIN;
  2854. break;
  2855. }
  2856. dev_kfree_skb_any(cmd.meta.u.skb);
  2857. return rc;
  2858. }
  2859. #endif
  2860. static void iwl4965_txstatus_to_ieee(struct iwl4965_priv *priv,
  2861. struct iwl4965_tx_info *tx_sta)
  2862. {
  2863. tx_sta->status.ack_signal = 0;
  2864. tx_sta->status.excessive_retries = 0;
  2865. tx_sta->status.queue_length = 0;
  2866. tx_sta->status.queue_number = 0;
  2867. if (in_interrupt())
  2868. ieee80211_tx_status_irqsafe(priv->hw,
  2869. tx_sta->skb[0], &(tx_sta->status));
  2870. else
  2871. ieee80211_tx_status(priv->hw,
  2872. tx_sta->skb[0], &(tx_sta->status));
  2873. tx_sta->skb[0] = NULL;
  2874. }
  2875. /**
  2876. * iwl4965_tx_queue_reclaim - Reclaim Tx queue entries no more used by NIC.
  2877. *
  2878. * When FW advances 'R' index, all entries between old and
  2879. * new 'R' index need to be reclaimed. As result, some free space
  2880. * forms. If there is enough free space (> low mark), wake Tx queue.
  2881. */
  2882. int iwl4965_tx_queue_reclaim(struct iwl4965_priv *priv, int txq_id, int index)
  2883. {
  2884. struct iwl4965_tx_queue *txq = &priv->txq[txq_id];
  2885. struct iwl4965_queue *q = &txq->q;
  2886. int nfreed = 0;
  2887. if ((index >= q->n_bd) || (x2_queue_used(q, index) == 0)) {
  2888. IWL_ERROR("Read index for DMA queue txq id (%d), index %d, "
  2889. "is out of range [0-%d] %d %d.\n", txq_id,
  2890. index, q->n_bd, q->write_ptr, q->read_ptr);
  2891. return 0;
  2892. }
  2893. for (index = iwl4965_queue_inc_wrap(index, q->n_bd);
  2894. q->read_ptr != index;
  2895. q->read_ptr = iwl4965_queue_inc_wrap(q->read_ptr, q->n_bd)) {
  2896. if (txq_id != IWL_CMD_QUEUE_NUM) {
  2897. iwl4965_txstatus_to_ieee(priv,
  2898. &(txq->txb[txq->q.read_ptr]));
  2899. iwl4965_hw_txq_free_tfd(priv, txq);
  2900. } else if (nfreed > 1) {
  2901. IWL_ERROR("HCMD skipped: index (%d) %d %d\n", index,
  2902. q->write_ptr, q->read_ptr);
  2903. queue_work(priv->workqueue, &priv->restart);
  2904. }
  2905. nfreed++;
  2906. }
  2907. if (iwl4965_queue_space(q) > q->low_mark && (txq_id >= 0) &&
  2908. (txq_id != IWL_CMD_QUEUE_NUM) &&
  2909. priv->mac80211_registered)
  2910. ieee80211_wake_queue(priv->hw, txq_id);
  2911. return nfreed;
  2912. }
  2913. static int iwl4965_is_tx_success(u32 status)
  2914. {
  2915. status &= TX_STATUS_MSK;
  2916. return (status == TX_STATUS_SUCCESS)
  2917. || (status == TX_STATUS_DIRECT_DONE);
  2918. }
  2919. /******************************************************************************
  2920. *
  2921. * Generic RX handler implementations
  2922. *
  2923. ******************************************************************************/
  2924. #ifdef CONFIG_IWL4965_HT
  2925. #ifdef CONFIG_IWL4965_HT_AGG
  2926. static inline int iwl4965_get_ra_sta_id(struct iwl4965_priv *priv,
  2927. struct ieee80211_hdr *hdr)
  2928. {
  2929. if (priv->iw_mode == IEEE80211_IF_TYPE_STA)
  2930. return IWL_AP_ID;
  2931. else {
  2932. u8 *da = ieee80211_get_DA(hdr);
  2933. return iwl4965_hw_find_station(priv, da);
  2934. }
  2935. }
  2936. static struct ieee80211_hdr *iwl4965_tx_queue_get_hdr(
  2937. struct iwl4965_priv *priv, int txq_id, int idx)
  2938. {
  2939. if (priv->txq[txq_id].txb[idx].skb[0])
  2940. return (struct ieee80211_hdr *)priv->txq[txq_id].
  2941. txb[idx].skb[0]->data;
  2942. return NULL;
  2943. }
  2944. static inline u32 iwl4965_get_scd_ssn(struct iwl4965_tx_resp *tx_resp)
  2945. {
  2946. __le32 *scd_ssn = (__le32 *)((u32 *)&tx_resp->status +
  2947. tx_resp->frame_count);
  2948. return le32_to_cpu(*scd_ssn) & MAX_SN;
  2949. }
  2950. static int iwl4965_tx_status_reply_tx(struct iwl4965_priv *priv,
  2951. struct iwl4965_ht_agg *agg,
  2952. struct iwl4965_tx_resp *tx_resp,
  2953. u16 start_idx)
  2954. {
  2955. u32 status;
  2956. __le32 *frame_status = &tx_resp->status;
  2957. struct ieee80211_tx_status *tx_status = NULL;
  2958. struct ieee80211_hdr *hdr = NULL;
  2959. int i, sh;
  2960. int txq_id, idx;
  2961. u16 seq;
  2962. if (agg->wait_for_ba)
  2963. IWL_DEBUG_TX_REPLY("got tx repsons w/o back\n");
  2964. agg->frame_count = tx_resp->frame_count;
  2965. agg->start_idx = start_idx;
  2966. agg->rate_n_flags = le32_to_cpu(tx_resp->rate_n_flags);
  2967. agg->bitmap0 = agg->bitmap1 = 0;
  2968. if (agg->frame_count == 1) {
  2969. struct iwl4965_tx_queue *txq ;
  2970. status = le32_to_cpu(frame_status[0]);
  2971. txq_id = agg->txq_id;
  2972. txq = &priv->txq[txq_id];
  2973. /* FIXME: code repetition */
  2974. IWL_DEBUG_TX_REPLY("FrameCnt = %d, StartIdx=%d \n",
  2975. agg->frame_count, agg->start_idx);
  2976. tx_status = &(priv->txq[txq_id].txb[txq->q.read_ptr].status);
  2977. tx_status->retry_count = tx_resp->failure_frame;
  2978. tx_status->queue_number = status & 0xff;
  2979. tx_status->queue_length = tx_resp->bt_kill_count;
  2980. tx_status->queue_length |= tx_resp->failure_rts;
  2981. tx_status->flags = iwl4965_is_tx_success(status)?
  2982. IEEE80211_TX_STATUS_ACK : 0;
  2983. tx_status->control.tx_rate =
  2984. iwl4965_hw_get_rate_n_flags(tx_resp->rate_n_flags);
  2985. /* FIXME: code repetition end */
  2986. IWL_DEBUG_TX_REPLY("1 Frame 0x%x failure :%d\n",
  2987. status & 0xff, tx_resp->failure_frame);
  2988. IWL_DEBUG_TX_REPLY("Rate Info rate_n_flags=%x\n",
  2989. iwl4965_hw_get_rate_n_flags(tx_resp->rate_n_flags));
  2990. agg->wait_for_ba = 0;
  2991. } else {
  2992. u64 bitmap = 0;
  2993. int start = agg->start_idx;
  2994. for (i = 0; i < agg->frame_count; i++) {
  2995. u16 sc;
  2996. status = le32_to_cpu(frame_status[i]);
  2997. seq = status >> 16;
  2998. idx = SEQ_TO_INDEX(seq);
  2999. txq_id = SEQ_TO_QUEUE(seq);
  3000. if (status & (AGG_TX_STATE_FEW_BYTES_MSK |
  3001. AGG_TX_STATE_ABORT_MSK))
  3002. continue;
  3003. IWL_DEBUG_TX_REPLY("FrameCnt = %d, txq_id=%d idx=%d\n",
  3004. agg->frame_count, txq_id, idx);
  3005. hdr = iwl4965_tx_queue_get_hdr(priv, txq_id, idx);
  3006. sc = le16_to_cpu(hdr->seq_ctrl);
  3007. if (idx != (SEQ_TO_SN(sc) & 0xff)) {
  3008. IWL_ERROR("BUG_ON idx doesn't match seq control"
  3009. " idx=%d, seq_idx=%d, seq=%d\n",
  3010. idx, SEQ_TO_SN(sc),
  3011. hdr->seq_ctrl);
  3012. return -1;
  3013. }
  3014. IWL_DEBUG_TX_REPLY("AGG Frame i=%d idx %d seq=%d\n",
  3015. i, idx, SEQ_TO_SN(sc));
  3016. sh = idx - start;
  3017. if (sh > 64) {
  3018. sh = (start - idx) + 0xff;
  3019. bitmap = bitmap << sh;
  3020. sh = 0;
  3021. start = idx;
  3022. } else if (sh < -64)
  3023. sh = 0xff - (start - idx);
  3024. else if (sh < 0) {
  3025. sh = start - idx;
  3026. start = idx;
  3027. bitmap = bitmap << sh;
  3028. sh = 0;
  3029. }
  3030. bitmap |= (1 << sh);
  3031. IWL_DEBUG_TX_REPLY("start=%d bitmap=0x%x\n",
  3032. start, (u32)(bitmap & 0xFFFFFFFF));
  3033. }
  3034. agg->bitmap0 = bitmap & 0xFFFFFFFF;
  3035. agg->bitmap1 = bitmap >> 32;
  3036. agg->start_idx = start;
  3037. agg->rate_n_flags = le32_to_cpu(tx_resp->rate_n_flags);
  3038. IWL_DEBUG_TX_REPLY("Frames %d start_idx=%d bitmap=0x%x\n",
  3039. agg->frame_count, agg->start_idx,
  3040. agg->bitmap0);
  3041. if (bitmap)
  3042. agg->wait_for_ba = 1;
  3043. }
  3044. return 0;
  3045. }
  3046. #endif
  3047. #endif
  3048. static void iwl4965_rx_reply_tx(struct iwl4965_priv *priv,
  3049. struct iwl4965_rx_mem_buffer *rxb)
  3050. {
  3051. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3052. u16 sequence = le16_to_cpu(pkt->hdr.sequence);
  3053. int txq_id = SEQ_TO_QUEUE(sequence);
  3054. int index = SEQ_TO_INDEX(sequence);
  3055. struct iwl4965_tx_queue *txq = &priv->txq[txq_id];
  3056. struct ieee80211_tx_status *tx_status;
  3057. struct iwl4965_tx_resp *tx_resp = (void *)&pkt->u.raw[0];
  3058. u32 status = le32_to_cpu(tx_resp->status);
  3059. #ifdef CONFIG_IWL4965_HT
  3060. #ifdef CONFIG_IWL4965_HT_AGG
  3061. int tid, sta_id;
  3062. #endif
  3063. #endif
  3064. if ((index >= txq->q.n_bd) || (x2_queue_used(&txq->q, index) == 0)) {
  3065. IWL_ERROR("Read index for DMA queue txq_id (%d) index %d "
  3066. "is out of range [0-%d] %d %d\n", txq_id,
  3067. index, txq->q.n_bd, txq->q.write_ptr,
  3068. txq->q.read_ptr);
  3069. return;
  3070. }
  3071. #ifdef CONFIG_IWL4965_HT
  3072. #ifdef CONFIG_IWL4965_HT_AGG
  3073. if (txq->sched_retry) {
  3074. const u32 scd_ssn = iwl4965_get_scd_ssn(tx_resp);
  3075. struct ieee80211_hdr *hdr =
  3076. iwl4965_tx_queue_get_hdr(priv, txq_id, index);
  3077. struct iwl4965_ht_agg *agg = NULL;
  3078. __le16 *qc = ieee80211_get_qos_ctrl(hdr);
  3079. if (qc == NULL) {
  3080. IWL_ERROR("BUG_ON qc is null!!!!\n");
  3081. return;
  3082. }
  3083. tid = le16_to_cpu(*qc) & 0xf;
  3084. sta_id = iwl4965_get_ra_sta_id(priv, hdr);
  3085. if (unlikely(sta_id == IWL_INVALID_STATION)) {
  3086. IWL_ERROR("Station not known for\n");
  3087. return;
  3088. }
  3089. agg = &priv->stations[sta_id].tid[tid].agg;
  3090. iwl4965_tx_status_reply_tx(priv, agg, tx_resp, index);
  3091. if ((tx_resp->frame_count == 1) &&
  3092. !iwl4965_is_tx_success(status)) {
  3093. /* TODO: send BAR */
  3094. }
  3095. if ((txq->q.read_ptr != (scd_ssn & 0xff))) {
  3096. index = iwl4965_queue_dec_wrap(scd_ssn & 0xff, txq->q.n_bd);
  3097. IWL_DEBUG_TX_REPLY("Retry scheduler reclaim scd_ssn "
  3098. "%d index %d\n", scd_ssn , index);
  3099. iwl4965_tx_queue_reclaim(priv, txq_id, index);
  3100. }
  3101. } else {
  3102. #endif /* CONFIG_IWL4965_HT_AGG */
  3103. #endif /* CONFIG_IWL4965_HT */
  3104. tx_status = &(txq->txb[txq->q.read_ptr].status);
  3105. tx_status->retry_count = tx_resp->failure_frame;
  3106. tx_status->queue_number = status;
  3107. tx_status->queue_length = tx_resp->bt_kill_count;
  3108. tx_status->queue_length |= tx_resp->failure_rts;
  3109. tx_status->flags =
  3110. iwl4965_is_tx_success(status) ? IEEE80211_TX_STATUS_ACK : 0;
  3111. tx_status->control.tx_rate =
  3112. iwl4965_hw_get_rate_n_flags(tx_resp->rate_n_flags);
  3113. IWL_DEBUG_TX("Tx queue %d Status %s (0x%08x) rate_n_flags 0x%x "
  3114. "retries %d\n", txq_id, iwl4965_get_tx_fail_reason(status),
  3115. status, le32_to_cpu(tx_resp->rate_n_flags),
  3116. tx_resp->failure_frame);
  3117. IWL_DEBUG_TX_REPLY("Tx queue reclaim %d\n", index);
  3118. if (index != -1)
  3119. iwl4965_tx_queue_reclaim(priv, txq_id, index);
  3120. #ifdef CONFIG_IWL4965_HT
  3121. #ifdef CONFIG_IWL4965_HT_AGG
  3122. }
  3123. #endif /* CONFIG_IWL4965_HT_AGG */
  3124. #endif /* CONFIG_IWL4965_HT */
  3125. if (iwl_check_bits(status, TX_ABORT_REQUIRED_MSK))
  3126. IWL_ERROR("TODO: Implement Tx ABORT REQUIRED!!!\n");
  3127. }
  3128. static void iwl4965_rx_reply_alive(struct iwl4965_priv *priv,
  3129. struct iwl4965_rx_mem_buffer *rxb)
  3130. {
  3131. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3132. struct iwl4965_alive_resp *palive;
  3133. struct delayed_work *pwork;
  3134. palive = &pkt->u.alive_frame;
  3135. IWL_DEBUG_INFO("Alive ucode status 0x%08X revision "
  3136. "0x%01X 0x%01X\n",
  3137. palive->is_valid, palive->ver_type,
  3138. palive->ver_subtype);
  3139. if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
  3140. IWL_DEBUG_INFO("Initialization Alive received.\n");
  3141. memcpy(&priv->card_alive_init,
  3142. &pkt->u.alive_frame,
  3143. sizeof(struct iwl4965_init_alive_resp));
  3144. pwork = &priv->init_alive_start;
  3145. } else {
  3146. IWL_DEBUG_INFO("Runtime Alive received.\n");
  3147. memcpy(&priv->card_alive, &pkt->u.alive_frame,
  3148. sizeof(struct iwl4965_alive_resp));
  3149. pwork = &priv->alive_start;
  3150. }
  3151. /* We delay the ALIVE response by 5ms to
  3152. * give the HW RF Kill time to activate... */
  3153. if (palive->is_valid == UCODE_VALID_OK)
  3154. queue_delayed_work(priv->workqueue, pwork,
  3155. msecs_to_jiffies(5));
  3156. else
  3157. IWL_WARNING("uCode did not respond OK.\n");
  3158. }
  3159. static void iwl4965_rx_reply_add_sta(struct iwl4965_priv *priv,
  3160. struct iwl4965_rx_mem_buffer *rxb)
  3161. {
  3162. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3163. IWL_DEBUG_RX("Received REPLY_ADD_STA: 0x%02X\n", pkt->u.status);
  3164. return;
  3165. }
  3166. static void iwl4965_rx_reply_error(struct iwl4965_priv *priv,
  3167. struct iwl4965_rx_mem_buffer *rxb)
  3168. {
  3169. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3170. IWL_ERROR("Error Reply type 0x%08X cmd %s (0x%02X) "
  3171. "seq 0x%04X ser 0x%08X\n",
  3172. le32_to_cpu(pkt->u.err_resp.error_type),
  3173. get_cmd_string(pkt->u.err_resp.cmd_id),
  3174. pkt->u.err_resp.cmd_id,
  3175. le16_to_cpu(pkt->u.err_resp.bad_cmd_seq_num),
  3176. le32_to_cpu(pkt->u.err_resp.error_info));
  3177. }
  3178. #define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x
  3179. static void iwl4965_rx_csa(struct iwl4965_priv *priv, struct iwl4965_rx_mem_buffer *rxb)
  3180. {
  3181. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3182. struct iwl4965_rxon_cmd *rxon = (void *)&priv->active_rxon;
  3183. struct iwl4965_csa_notification *csa = &(pkt->u.csa_notif);
  3184. IWL_DEBUG_11H("CSA notif: channel %d, status %d\n",
  3185. le16_to_cpu(csa->channel), le32_to_cpu(csa->status));
  3186. rxon->channel = csa->channel;
  3187. priv->staging_rxon.channel = csa->channel;
  3188. }
  3189. static void iwl4965_rx_spectrum_measure_notif(struct iwl4965_priv *priv,
  3190. struct iwl4965_rx_mem_buffer *rxb)
  3191. {
  3192. #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
  3193. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3194. struct iwl4965_spectrum_notification *report = &(pkt->u.spectrum_notif);
  3195. if (!report->state) {
  3196. IWL_DEBUG(IWL_DL_11H | IWL_DL_INFO,
  3197. "Spectrum Measure Notification: Start\n");
  3198. return;
  3199. }
  3200. memcpy(&priv->measure_report, report, sizeof(*report));
  3201. priv->measurement_status |= MEASUREMENT_READY;
  3202. #endif
  3203. }
  3204. static void iwl4965_rx_pm_sleep_notif(struct iwl4965_priv *priv,
  3205. struct iwl4965_rx_mem_buffer *rxb)
  3206. {
  3207. #ifdef CONFIG_IWL4965_DEBUG
  3208. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3209. struct iwl4965_sleep_notification *sleep = &(pkt->u.sleep_notif);
  3210. IWL_DEBUG_RX("sleep mode: %d, src: %d\n",
  3211. sleep->pm_sleep_mode, sleep->pm_wakeup_src);
  3212. #endif
  3213. }
  3214. static void iwl4965_rx_pm_debug_statistics_notif(struct iwl4965_priv *priv,
  3215. struct iwl4965_rx_mem_buffer *rxb)
  3216. {
  3217. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3218. IWL_DEBUG_RADIO("Dumping %d bytes of unhandled "
  3219. "notification for %s:\n",
  3220. le32_to_cpu(pkt->len), get_cmd_string(pkt->hdr.cmd));
  3221. iwl4965_print_hex_dump(IWL_DL_RADIO, pkt->u.raw, le32_to_cpu(pkt->len));
  3222. }
  3223. static void iwl4965_bg_beacon_update(struct work_struct *work)
  3224. {
  3225. struct iwl4965_priv *priv =
  3226. container_of(work, struct iwl4965_priv, beacon_update);
  3227. struct sk_buff *beacon;
  3228. /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
  3229. beacon = ieee80211_beacon_get(priv->hw, priv->interface_id, NULL);
  3230. if (!beacon) {
  3231. IWL_ERROR("update beacon failed\n");
  3232. return;
  3233. }
  3234. mutex_lock(&priv->mutex);
  3235. /* new beacon skb is allocated every time; dispose previous.*/
  3236. if (priv->ibss_beacon)
  3237. dev_kfree_skb(priv->ibss_beacon);
  3238. priv->ibss_beacon = beacon;
  3239. mutex_unlock(&priv->mutex);
  3240. iwl4965_send_beacon_cmd(priv);
  3241. }
  3242. static void iwl4965_rx_beacon_notif(struct iwl4965_priv *priv,
  3243. struct iwl4965_rx_mem_buffer *rxb)
  3244. {
  3245. #ifdef CONFIG_IWL4965_DEBUG
  3246. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3247. struct iwl4965_beacon_notif *beacon = &(pkt->u.beacon_status);
  3248. u8 rate = iwl4965_hw_get_rate(beacon->beacon_notify_hdr.rate_n_flags);
  3249. IWL_DEBUG_RX("beacon status %x retries %d iss %d "
  3250. "tsf %d %d rate %d\n",
  3251. le32_to_cpu(beacon->beacon_notify_hdr.status) & TX_STATUS_MSK,
  3252. beacon->beacon_notify_hdr.failure_frame,
  3253. le32_to_cpu(beacon->ibss_mgr_status),
  3254. le32_to_cpu(beacon->high_tsf),
  3255. le32_to_cpu(beacon->low_tsf), rate);
  3256. #endif
  3257. if ((priv->iw_mode == IEEE80211_IF_TYPE_AP) &&
  3258. (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
  3259. queue_work(priv->workqueue, &priv->beacon_update);
  3260. }
  3261. /* Service response to REPLY_SCAN_CMD (0x80) */
  3262. static void iwl4965_rx_reply_scan(struct iwl4965_priv *priv,
  3263. struct iwl4965_rx_mem_buffer *rxb)
  3264. {
  3265. #ifdef CONFIG_IWL4965_DEBUG
  3266. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3267. struct iwl4965_scanreq_notification *notif =
  3268. (struct iwl4965_scanreq_notification *)pkt->u.raw;
  3269. IWL_DEBUG_RX("Scan request status = 0x%x\n", notif->status);
  3270. #endif
  3271. }
  3272. /* Service SCAN_START_NOTIFICATION (0x82) */
  3273. static void iwl4965_rx_scan_start_notif(struct iwl4965_priv *priv,
  3274. struct iwl4965_rx_mem_buffer *rxb)
  3275. {
  3276. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3277. struct iwl4965_scanstart_notification *notif =
  3278. (struct iwl4965_scanstart_notification *)pkt->u.raw;
  3279. priv->scan_start_tsf = le32_to_cpu(notif->tsf_low);
  3280. IWL_DEBUG_SCAN("Scan start: "
  3281. "%d [802.11%s] "
  3282. "(TSF: 0x%08X:%08X) - %d (beacon timer %u)\n",
  3283. notif->channel,
  3284. notif->band ? "bg" : "a",
  3285. notif->tsf_high,
  3286. notif->tsf_low, notif->status, notif->beacon_timer);
  3287. }
  3288. /* Service SCAN_RESULTS_NOTIFICATION (0x83) */
  3289. static void iwl4965_rx_scan_results_notif(struct iwl4965_priv *priv,
  3290. struct iwl4965_rx_mem_buffer *rxb)
  3291. {
  3292. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3293. struct iwl4965_scanresults_notification *notif =
  3294. (struct iwl4965_scanresults_notification *)pkt->u.raw;
  3295. IWL_DEBUG_SCAN("Scan ch.res: "
  3296. "%d [802.11%s] "
  3297. "(TSF: 0x%08X:%08X) - %d "
  3298. "elapsed=%lu usec (%dms since last)\n",
  3299. notif->channel,
  3300. notif->band ? "bg" : "a",
  3301. le32_to_cpu(notif->tsf_high),
  3302. le32_to_cpu(notif->tsf_low),
  3303. le32_to_cpu(notif->statistics[0]),
  3304. le32_to_cpu(notif->tsf_low) - priv->scan_start_tsf,
  3305. jiffies_to_msecs(elapsed_jiffies
  3306. (priv->last_scan_jiffies, jiffies)));
  3307. priv->last_scan_jiffies = jiffies;
  3308. }
  3309. /* Service SCAN_COMPLETE_NOTIFICATION (0x84) */
  3310. static void iwl4965_rx_scan_complete_notif(struct iwl4965_priv *priv,
  3311. struct iwl4965_rx_mem_buffer *rxb)
  3312. {
  3313. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3314. struct iwl4965_scancomplete_notification *scan_notif = (void *)pkt->u.raw;
  3315. IWL_DEBUG_SCAN("Scan complete: %d channels (TSF 0x%08X:%08X) - %d\n",
  3316. scan_notif->scanned_channels,
  3317. scan_notif->tsf_low,
  3318. scan_notif->tsf_high, scan_notif->status);
  3319. /* The HW is no longer scanning */
  3320. clear_bit(STATUS_SCAN_HW, &priv->status);
  3321. /* The scan completion notification came in, so kill that timer... */
  3322. cancel_delayed_work(&priv->scan_check);
  3323. IWL_DEBUG_INFO("Scan pass on %sGHz took %dms\n",
  3324. (priv->scan_bands == 2) ? "2.4" : "5.2",
  3325. jiffies_to_msecs(elapsed_jiffies
  3326. (priv->scan_pass_start, jiffies)));
  3327. /* Remove this scanned band from the list
  3328. * of pending bands to scan */
  3329. priv->scan_bands--;
  3330. /* If a request to abort was given, or the scan did not succeed
  3331. * then we reset the scan state machine and terminate,
  3332. * re-queuing another scan if one has been requested */
  3333. if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  3334. IWL_DEBUG_INFO("Aborted scan completed.\n");
  3335. clear_bit(STATUS_SCAN_ABORTING, &priv->status);
  3336. } else {
  3337. /* If there are more bands on this scan pass reschedule */
  3338. if (priv->scan_bands > 0)
  3339. goto reschedule;
  3340. }
  3341. priv->last_scan_jiffies = jiffies;
  3342. IWL_DEBUG_INFO("Setting scan to off\n");
  3343. clear_bit(STATUS_SCANNING, &priv->status);
  3344. IWL_DEBUG_INFO("Scan took %dms\n",
  3345. jiffies_to_msecs(elapsed_jiffies(priv->scan_start, jiffies)));
  3346. queue_work(priv->workqueue, &priv->scan_completed);
  3347. return;
  3348. reschedule:
  3349. priv->scan_pass_start = jiffies;
  3350. queue_work(priv->workqueue, &priv->request_scan);
  3351. }
  3352. /* Handle notification from uCode that card's power state is changing
  3353. * due to software, hardware, or critical temperature RFKILL */
  3354. static void iwl4965_rx_card_state_notif(struct iwl4965_priv *priv,
  3355. struct iwl4965_rx_mem_buffer *rxb)
  3356. {
  3357. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3358. u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
  3359. unsigned long status = priv->status;
  3360. IWL_DEBUG_RF_KILL("Card state received: HW:%s SW:%s\n",
  3361. (flags & HW_CARD_DISABLED) ? "Kill" : "On",
  3362. (flags & SW_CARD_DISABLED) ? "Kill" : "On");
  3363. if (flags & (SW_CARD_DISABLED | HW_CARD_DISABLED |
  3364. RF_CARD_DISABLED)) {
  3365. iwl4965_write32(priv, CSR_UCODE_DRV_GP1_SET,
  3366. CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  3367. if (!iwl4965_grab_nic_access(priv)) {
  3368. iwl4965_write_direct32(
  3369. priv, HBUS_TARG_MBX_C,
  3370. HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
  3371. iwl4965_release_nic_access(priv);
  3372. }
  3373. if (!(flags & RXON_CARD_DISABLED)) {
  3374. iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR,
  3375. CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  3376. if (!iwl4965_grab_nic_access(priv)) {
  3377. iwl4965_write_direct32(
  3378. priv, HBUS_TARG_MBX_C,
  3379. HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
  3380. iwl4965_release_nic_access(priv);
  3381. }
  3382. }
  3383. if (flags & RF_CARD_DISABLED) {
  3384. iwl4965_write32(priv, CSR_UCODE_DRV_GP1_SET,
  3385. CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT);
  3386. iwl4965_read32(priv, CSR_UCODE_DRV_GP1);
  3387. if (!iwl4965_grab_nic_access(priv))
  3388. iwl4965_release_nic_access(priv);
  3389. }
  3390. }
  3391. if (flags & HW_CARD_DISABLED)
  3392. set_bit(STATUS_RF_KILL_HW, &priv->status);
  3393. else
  3394. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  3395. if (flags & SW_CARD_DISABLED)
  3396. set_bit(STATUS_RF_KILL_SW, &priv->status);
  3397. else
  3398. clear_bit(STATUS_RF_KILL_SW, &priv->status);
  3399. if (!(flags & RXON_CARD_DISABLED))
  3400. iwl4965_scan_cancel(priv);
  3401. if ((test_bit(STATUS_RF_KILL_HW, &status) !=
  3402. test_bit(STATUS_RF_KILL_HW, &priv->status)) ||
  3403. (test_bit(STATUS_RF_KILL_SW, &status) !=
  3404. test_bit(STATUS_RF_KILL_SW, &priv->status)))
  3405. queue_work(priv->workqueue, &priv->rf_kill);
  3406. else
  3407. wake_up_interruptible(&priv->wait_command_queue);
  3408. }
  3409. /**
  3410. * iwl4965_setup_rx_handlers - Initialize Rx handler callbacks
  3411. *
  3412. * Setup the RX handlers for each of the reply types sent from the uCode
  3413. * to the host.
  3414. *
  3415. * This function chains into the hardware specific files for them to setup
  3416. * any hardware specific handlers as well.
  3417. */
  3418. static void iwl4965_setup_rx_handlers(struct iwl4965_priv *priv)
  3419. {
  3420. priv->rx_handlers[REPLY_ALIVE] = iwl4965_rx_reply_alive;
  3421. priv->rx_handlers[REPLY_ADD_STA] = iwl4965_rx_reply_add_sta;
  3422. priv->rx_handlers[REPLY_ERROR] = iwl4965_rx_reply_error;
  3423. priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl4965_rx_csa;
  3424. priv->rx_handlers[SPECTRUM_MEASURE_NOTIFICATION] =
  3425. iwl4965_rx_spectrum_measure_notif;
  3426. priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl4965_rx_pm_sleep_notif;
  3427. priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
  3428. iwl4965_rx_pm_debug_statistics_notif;
  3429. priv->rx_handlers[BEACON_NOTIFICATION] = iwl4965_rx_beacon_notif;
  3430. /* NOTE: iwl4965_rx_statistics is different based on whether
  3431. * the build is for the 3945 or the 4965. See the
  3432. * corresponding implementation in iwl-XXXX.c
  3433. *
  3434. * The same handler is used for both the REPLY to a
  3435. * discrete statistics request from the host as well as
  3436. * for the periodic statistics notification from the uCode
  3437. */
  3438. priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl4965_hw_rx_statistics;
  3439. priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl4965_hw_rx_statistics;
  3440. priv->rx_handlers[REPLY_SCAN_CMD] = iwl4965_rx_reply_scan;
  3441. priv->rx_handlers[SCAN_START_NOTIFICATION] = iwl4965_rx_scan_start_notif;
  3442. priv->rx_handlers[SCAN_RESULTS_NOTIFICATION] =
  3443. iwl4965_rx_scan_results_notif;
  3444. priv->rx_handlers[SCAN_COMPLETE_NOTIFICATION] =
  3445. iwl4965_rx_scan_complete_notif;
  3446. priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl4965_rx_card_state_notif;
  3447. priv->rx_handlers[REPLY_TX] = iwl4965_rx_reply_tx;
  3448. /* Setup hardware specific Rx handlers */
  3449. iwl4965_hw_rx_handler_setup(priv);
  3450. }
  3451. /**
  3452. * iwl4965_tx_cmd_complete - Pull unused buffers off the queue and reclaim them
  3453. * @rxb: Rx buffer to reclaim
  3454. *
  3455. * If an Rx buffer has an async callback associated with it the callback
  3456. * will be executed. The attached skb (if present) will only be freed
  3457. * if the callback returns 1
  3458. */
  3459. static void iwl4965_tx_cmd_complete(struct iwl4965_priv *priv,
  3460. struct iwl4965_rx_mem_buffer *rxb)
  3461. {
  3462. struct iwl4965_rx_packet *pkt = (struct iwl4965_rx_packet *)rxb->skb->data;
  3463. u16 sequence = le16_to_cpu(pkt->hdr.sequence);
  3464. int txq_id = SEQ_TO_QUEUE(sequence);
  3465. int index = SEQ_TO_INDEX(sequence);
  3466. int huge = sequence & SEQ_HUGE_FRAME;
  3467. int cmd_index;
  3468. struct iwl4965_cmd *cmd;
  3469. /* If a Tx command is being handled and it isn't in the actual
  3470. * command queue then there a command routing bug has been introduced
  3471. * in the queue management code. */
  3472. if (txq_id != IWL_CMD_QUEUE_NUM)
  3473. IWL_ERROR("Error wrong command queue %d command id 0x%X\n",
  3474. txq_id, pkt->hdr.cmd);
  3475. BUG_ON(txq_id != IWL_CMD_QUEUE_NUM);
  3476. cmd_index = get_cmd_index(&priv->txq[IWL_CMD_QUEUE_NUM].q, index, huge);
  3477. cmd = &priv->txq[IWL_CMD_QUEUE_NUM].cmd[cmd_index];
  3478. /* Input error checking is done when commands are added to queue. */
  3479. if (cmd->meta.flags & CMD_WANT_SKB) {
  3480. cmd->meta.source->u.skb = rxb->skb;
  3481. rxb->skb = NULL;
  3482. } else if (cmd->meta.u.callback &&
  3483. !cmd->meta.u.callback(priv, cmd, rxb->skb))
  3484. rxb->skb = NULL;
  3485. iwl4965_tx_queue_reclaim(priv, txq_id, index);
  3486. if (!(cmd->meta.flags & CMD_ASYNC)) {
  3487. clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
  3488. wake_up_interruptible(&priv->wait_command_queue);
  3489. }
  3490. }
  3491. /************************** RX-FUNCTIONS ****************************/
  3492. /*
  3493. * Rx theory of operation
  3494. *
  3495. * The host allocates 32 DMA target addresses and passes the host address
  3496. * to the firmware at register IWL_RFDS_TABLE_LOWER + N * RFD_SIZE where N is
  3497. * 0 to 31
  3498. *
  3499. * Rx Queue Indexes
  3500. * The host/firmware share two index registers for managing the Rx buffers.
  3501. *
  3502. * The READ index maps to the first position that the firmware may be writing
  3503. * to -- the driver can read up to (but not including) this position and get
  3504. * good data.
  3505. * The READ index is managed by the firmware once the card is enabled.
  3506. *
  3507. * The WRITE index maps to the last position the driver has read from -- the
  3508. * position preceding WRITE is the last slot the firmware can place a packet.
  3509. *
  3510. * The queue is empty (no good data) if WRITE = READ - 1, and is full if
  3511. * WRITE = READ.
  3512. *
  3513. * During initialization the host sets up the READ queue position to the first
  3514. * INDEX position, and WRITE to the last (READ - 1 wrapped)
  3515. *
  3516. * When the firmware places a packet in a buffer it will advance the READ index
  3517. * and fire the RX interrupt. The driver can then query the READ index and
  3518. * process as many packets as possible, moving the WRITE index forward as it
  3519. * resets the Rx queue buffers with new memory.
  3520. *
  3521. * The management in the driver is as follows:
  3522. * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When
  3523. * iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
  3524. * to replenish the iwl->rxq->rx_free.
  3525. * + In iwl4965_rx_replenish (scheduled) if 'processed' != 'read' then the
  3526. * iwl->rxq is replenished and the READ INDEX is updated (updating the
  3527. * 'processed' and 'read' driver indexes as well)
  3528. * + A received packet is processed and handed to the kernel network stack,
  3529. * detached from the iwl->rxq. The driver 'processed' index is updated.
  3530. * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
  3531. * list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
  3532. * INDEX is not incremented and iwl->status(RX_STALLED) is set. If there
  3533. * were enough free buffers and RX_STALLED is set it is cleared.
  3534. *
  3535. *
  3536. * Driver sequence:
  3537. *
  3538. * iwl4965_rx_queue_alloc() Allocates rx_free
  3539. * iwl4965_rx_replenish() Replenishes rx_free list from rx_used, and calls
  3540. * iwl4965_rx_queue_restock
  3541. * iwl4965_rx_queue_restock() Moves available buffers from rx_free into Rx
  3542. * queue, updates firmware pointers, and updates
  3543. * the WRITE index. If insufficient rx_free buffers
  3544. * are available, schedules iwl4965_rx_replenish
  3545. *
  3546. * -- enable interrupts --
  3547. * ISR - iwl4965_rx() Detach iwl4965_rx_mem_buffers from pool up to the
  3548. * READ INDEX, detaching the SKB from the pool.
  3549. * Moves the packet buffer from queue to rx_used.
  3550. * Calls iwl4965_rx_queue_restock to refill any empty
  3551. * slots.
  3552. * ...
  3553. *
  3554. */
  3555. /**
  3556. * iwl4965_rx_queue_space - Return number of free slots available in queue.
  3557. */
  3558. static int iwl4965_rx_queue_space(const struct iwl4965_rx_queue *q)
  3559. {
  3560. int s = q->read - q->write;
  3561. if (s <= 0)
  3562. s += RX_QUEUE_SIZE;
  3563. /* keep some buffer to not confuse full and empty queue */
  3564. s -= 2;
  3565. if (s < 0)
  3566. s = 0;
  3567. return s;
  3568. }
  3569. /**
  3570. * iwl4965_rx_queue_update_write_ptr - Update the write pointer for the RX queue
  3571. *
  3572. * NOTE: This function has 3945 and 4965 specific code sections
  3573. * but is declared in base due to the majority of the
  3574. * implementation being the same (only a numeric constant is
  3575. * different)
  3576. *
  3577. */
  3578. int iwl4965_rx_queue_update_write_ptr(struct iwl4965_priv *priv, struct iwl4965_rx_queue *q)
  3579. {
  3580. u32 reg = 0;
  3581. int rc = 0;
  3582. unsigned long flags;
  3583. spin_lock_irqsave(&q->lock, flags);
  3584. if (q->need_update == 0)
  3585. goto exit_unlock;
  3586. if (test_bit(STATUS_POWER_PMI, &priv->status)) {
  3587. reg = iwl4965_read32(priv, CSR_UCODE_DRV_GP1);
  3588. if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
  3589. iwl4965_set_bit(priv, CSR_GP_CNTRL,
  3590. CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
  3591. goto exit_unlock;
  3592. }
  3593. rc = iwl4965_grab_nic_access(priv);
  3594. if (rc)
  3595. goto exit_unlock;
  3596. iwl4965_write_direct32(priv, FH_RSCSR_CHNL0_WPTR,
  3597. q->write & ~0x7);
  3598. iwl4965_release_nic_access(priv);
  3599. } else
  3600. iwl4965_write32(priv, FH_RSCSR_CHNL0_WPTR, q->write & ~0x7);
  3601. q->need_update = 0;
  3602. exit_unlock:
  3603. spin_unlock_irqrestore(&q->lock, flags);
  3604. return rc;
  3605. }
  3606. /**
  3607. * iwl4965_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer pointer.
  3608. *
  3609. * NOTE: This function has 3945 and 4965 specific code paths in it.
  3610. */
  3611. static inline __le32 iwl4965_dma_addr2rbd_ptr(struct iwl4965_priv *priv,
  3612. dma_addr_t dma_addr)
  3613. {
  3614. return cpu_to_le32((u32)(dma_addr >> 8));
  3615. }
  3616. /**
  3617. * iwl4965_rx_queue_restock - refill RX queue from pre-allocated pool
  3618. *
  3619. * If there are slots in the RX queue that need to be restocked,
  3620. * and we have free pre-allocated buffers, fill the ranks as much
  3621. * as we can pulling from rx_free.
  3622. *
  3623. * This moves the 'write' index forward to catch up with 'processed', and
  3624. * also updates the memory address in the firmware to reference the new
  3625. * target buffer.
  3626. */
  3627. static int iwl4965_rx_queue_restock(struct iwl4965_priv *priv)
  3628. {
  3629. struct iwl4965_rx_queue *rxq = &priv->rxq;
  3630. struct list_head *element;
  3631. struct iwl4965_rx_mem_buffer *rxb;
  3632. unsigned long flags;
  3633. int write, rc;
  3634. spin_lock_irqsave(&rxq->lock, flags);
  3635. write = rxq->write & ~0x7;
  3636. while ((iwl4965_rx_queue_space(rxq) > 0) && (rxq->free_count)) {
  3637. element = rxq->rx_free.next;
  3638. rxb = list_entry(element, struct iwl4965_rx_mem_buffer, list);
  3639. list_del(element);
  3640. rxq->bd[rxq->write] = iwl4965_dma_addr2rbd_ptr(priv, rxb->dma_addr);
  3641. rxq->queue[rxq->write] = rxb;
  3642. rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
  3643. rxq->free_count--;
  3644. }
  3645. spin_unlock_irqrestore(&rxq->lock, flags);
  3646. /* If the pre-allocated buffer pool is dropping low, schedule to
  3647. * refill it */
  3648. if (rxq->free_count <= RX_LOW_WATERMARK)
  3649. queue_work(priv->workqueue, &priv->rx_replenish);
  3650. /* If we've added more space for the firmware to place data, tell it */
  3651. if ((write != (rxq->write & ~0x7))
  3652. || (abs(rxq->write - rxq->read) > 7)) {
  3653. spin_lock_irqsave(&rxq->lock, flags);
  3654. rxq->need_update = 1;
  3655. spin_unlock_irqrestore(&rxq->lock, flags);
  3656. rc = iwl4965_rx_queue_update_write_ptr(priv, rxq);
  3657. if (rc)
  3658. return rc;
  3659. }
  3660. return 0;
  3661. }
  3662. /**
  3663. * iwl4965_rx_replenish - Move all used packet from rx_used to rx_free
  3664. *
  3665. * When moving to rx_free an SKB is allocated for the slot.
  3666. *
  3667. * Also restock the Rx queue via iwl4965_rx_queue_restock.
  3668. * This is called as a scheduled work item (except for during initialization)
  3669. */
  3670. void iwl4965_rx_replenish(void *data)
  3671. {
  3672. struct iwl4965_priv *priv = data;
  3673. struct iwl4965_rx_queue *rxq = &priv->rxq;
  3674. struct list_head *element;
  3675. struct iwl4965_rx_mem_buffer *rxb;
  3676. unsigned long flags;
  3677. spin_lock_irqsave(&rxq->lock, flags);
  3678. while (!list_empty(&rxq->rx_used)) {
  3679. element = rxq->rx_used.next;
  3680. rxb = list_entry(element, struct iwl4965_rx_mem_buffer, list);
  3681. rxb->skb =
  3682. alloc_skb(IWL_RX_BUF_SIZE, __GFP_NOWARN | GFP_ATOMIC);
  3683. if (!rxb->skb) {
  3684. if (net_ratelimit())
  3685. printk(KERN_CRIT DRV_NAME
  3686. ": Can not allocate SKB buffers\n");
  3687. /* We don't reschedule replenish work here -- we will
  3688. * call the restock method and if it still needs
  3689. * more buffers it will schedule replenish */
  3690. break;
  3691. }
  3692. priv->alloc_rxb_skb++;
  3693. list_del(element);
  3694. rxb->dma_addr =
  3695. pci_map_single(priv->pci_dev, rxb->skb->data,
  3696. IWL_RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
  3697. list_add_tail(&rxb->list, &rxq->rx_free);
  3698. rxq->free_count++;
  3699. }
  3700. spin_unlock_irqrestore(&rxq->lock, flags);
  3701. spin_lock_irqsave(&priv->lock, flags);
  3702. iwl4965_rx_queue_restock(priv);
  3703. spin_unlock_irqrestore(&priv->lock, flags);
  3704. }
  3705. /* Assumes that the skb field of the buffers in 'pool' is kept accurate.
  3706. * If an SKB has been detached, the POOL needs to have it's SKB set to NULL
  3707. * This free routine walks the list of POOL entries and if SKB is set to
  3708. * non NULL it is unmapped and freed
  3709. */
  3710. static void iwl4965_rx_queue_free(struct iwl4965_priv *priv, struct iwl4965_rx_queue *rxq)
  3711. {
  3712. int i;
  3713. for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) {
  3714. if (rxq->pool[i].skb != NULL) {
  3715. pci_unmap_single(priv->pci_dev,
  3716. rxq->pool[i].dma_addr,
  3717. IWL_RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
  3718. dev_kfree_skb(rxq->pool[i].skb);
  3719. }
  3720. }
  3721. pci_free_consistent(priv->pci_dev, 4 * RX_QUEUE_SIZE, rxq->bd,
  3722. rxq->dma_addr);
  3723. rxq->bd = NULL;
  3724. }
  3725. int iwl4965_rx_queue_alloc(struct iwl4965_priv *priv)
  3726. {
  3727. struct iwl4965_rx_queue *rxq = &priv->rxq;
  3728. struct pci_dev *dev = priv->pci_dev;
  3729. int i;
  3730. spin_lock_init(&rxq->lock);
  3731. INIT_LIST_HEAD(&rxq->rx_free);
  3732. INIT_LIST_HEAD(&rxq->rx_used);
  3733. rxq->bd = pci_alloc_consistent(dev, 4 * RX_QUEUE_SIZE, &rxq->dma_addr);
  3734. if (!rxq->bd)
  3735. return -ENOMEM;
  3736. /* Fill the rx_used queue with _all_ of the Rx buffers */
  3737. for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++)
  3738. list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
  3739. /* Set us so that we have processed and used all buffers, but have
  3740. * not restocked the Rx queue with fresh buffers */
  3741. rxq->read = rxq->write = 0;
  3742. rxq->free_count = 0;
  3743. rxq->need_update = 0;
  3744. return 0;
  3745. }
  3746. void iwl4965_rx_queue_reset(struct iwl4965_priv *priv, struct iwl4965_rx_queue *rxq)
  3747. {
  3748. unsigned long flags;
  3749. int i;
  3750. spin_lock_irqsave(&rxq->lock, flags);
  3751. INIT_LIST_HEAD(&rxq->rx_free);
  3752. INIT_LIST_HEAD(&rxq->rx_used);
  3753. /* Fill the rx_used queue with _all_ of the Rx buffers */
  3754. for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) {
  3755. /* In the reset function, these buffers may have been allocated
  3756. * to an SKB, so we need to unmap and free potential storage */
  3757. if (rxq->pool[i].skb != NULL) {
  3758. pci_unmap_single(priv->pci_dev,
  3759. rxq->pool[i].dma_addr,
  3760. IWL_RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
  3761. priv->alloc_rxb_skb--;
  3762. dev_kfree_skb(rxq->pool[i].skb);
  3763. rxq->pool[i].skb = NULL;
  3764. }
  3765. list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
  3766. }
  3767. /* Set us so that we have processed and used all buffers, but have
  3768. * not restocked the Rx queue with fresh buffers */
  3769. rxq->read = rxq->write = 0;
  3770. rxq->free_count = 0;
  3771. spin_unlock_irqrestore(&rxq->lock, flags);
  3772. }
  3773. /* Convert linear signal-to-noise ratio into dB */
  3774. static u8 ratio2dB[100] = {
  3775. /* 0 1 2 3 4 5 6 7 8 9 */
  3776. 0, 0, 6, 10, 12, 14, 16, 17, 18, 19, /* 00 - 09 */
  3777. 20, 21, 22, 22, 23, 23, 24, 25, 26, 26, /* 10 - 19 */
  3778. 26, 26, 26, 27, 27, 28, 28, 28, 29, 29, /* 20 - 29 */
  3779. 29, 30, 30, 30, 31, 31, 31, 31, 32, 32, /* 30 - 39 */
  3780. 32, 32, 32, 33, 33, 33, 33, 33, 34, 34, /* 40 - 49 */
  3781. 34, 34, 34, 34, 35, 35, 35, 35, 35, 35, /* 50 - 59 */
  3782. 36, 36, 36, 36, 36, 36, 36, 37, 37, 37, /* 60 - 69 */
  3783. 37, 37, 37, 37, 37, 38, 38, 38, 38, 38, /* 70 - 79 */
  3784. 38, 38, 38, 38, 38, 39, 39, 39, 39, 39, /* 80 - 89 */
  3785. 39, 39, 39, 39, 39, 40, 40, 40, 40, 40 /* 90 - 99 */
  3786. };
  3787. /* Calculates a relative dB value from a ratio of linear
  3788. * (i.e. not dB) signal levels.
  3789. * Conversion assumes that levels are voltages (20*log), not powers (10*log). */
  3790. int iwl4965_calc_db_from_ratio(int sig_ratio)
  3791. {
  3792. /* 1000:1 or higher just report as 60 dB */
  3793. if (sig_ratio >= 1000)
  3794. return 60;
  3795. /* 100:1 or higher, divide by 10 and use table,
  3796. * add 20 dB to make up for divide by 10 */
  3797. if (sig_ratio >= 100)
  3798. return (20 + (int)ratio2dB[sig_ratio/10]);
  3799. /* We shouldn't see this */
  3800. if (sig_ratio < 1)
  3801. return 0;
  3802. /* Use table for ratios 1:1 - 99:1 */
  3803. return (int)ratio2dB[sig_ratio];
  3804. }
  3805. #define PERFECT_RSSI (-20) /* dBm */
  3806. #define WORST_RSSI (-95) /* dBm */
  3807. #define RSSI_RANGE (PERFECT_RSSI - WORST_RSSI)
  3808. /* Calculate an indication of rx signal quality (a percentage, not dBm!).
  3809. * See http://www.ces.clemson.edu/linux/signal_quality.shtml for info
  3810. * about formulas used below. */
  3811. int iwl4965_calc_sig_qual(int rssi_dbm, int noise_dbm)
  3812. {
  3813. int sig_qual;
  3814. int degradation = PERFECT_RSSI - rssi_dbm;
  3815. /* If we get a noise measurement, use signal-to-noise ratio (SNR)
  3816. * as indicator; formula is (signal dbm - noise dbm).
  3817. * SNR at or above 40 is a great signal (100%).
  3818. * Below that, scale to fit SNR of 0 - 40 dB within 0 - 100% indicator.
  3819. * Weakest usable signal is usually 10 - 15 dB SNR. */
  3820. if (noise_dbm) {
  3821. if (rssi_dbm - noise_dbm >= 40)
  3822. return 100;
  3823. else if (rssi_dbm < noise_dbm)
  3824. return 0;
  3825. sig_qual = ((rssi_dbm - noise_dbm) * 5) / 2;
  3826. /* Else use just the signal level.
  3827. * This formula is a least squares fit of data points collected and
  3828. * compared with a reference system that had a percentage (%) display
  3829. * for signal quality. */
  3830. } else
  3831. sig_qual = (100 * (RSSI_RANGE * RSSI_RANGE) - degradation *
  3832. (15 * RSSI_RANGE + 62 * degradation)) /
  3833. (RSSI_RANGE * RSSI_RANGE);
  3834. if (sig_qual > 100)
  3835. sig_qual = 100;
  3836. else if (sig_qual < 1)
  3837. sig_qual = 0;
  3838. return sig_qual;
  3839. }
  3840. /**
  3841. * iwl4965_rx_handle - Main entry function for receiving responses from the uCode
  3842. *
  3843. * Uses the priv->rx_handlers callback function array to invoke
  3844. * the appropriate handlers, including command responses,
  3845. * frame-received notifications, and other notifications.
  3846. */
  3847. static void iwl4965_rx_handle(struct iwl4965_priv *priv)
  3848. {
  3849. struct iwl4965_rx_mem_buffer *rxb;
  3850. struct iwl4965_rx_packet *pkt;
  3851. struct iwl4965_rx_queue *rxq = &priv->rxq;
  3852. u32 r, i;
  3853. int reclaim;
  3854. unsigned long flags;
  3855. r = iwl4965_hw_get_rx_read(priv);
  3856. i = rxq->read;
  3857. /* Rx interrupt, but nothing sent from uCode */
  3858. if (i == r)
  3859. IWL_DEBUG(IWL_DL_RX | IWL_DL_ISR, "r = %d, i = %d\n", r, i);
  3860. while (i != r) {
  3861. rxb = rxq->queue[i];
  3862. /* If an RXB doesn't have a queue slot associated with it
  3863. * then a bug has been introduced in the queue refilling
  3864. * routines -- catch it here */
  3865. BUG_ON(rxb == NULL);
  3866. rxq->queue[i] = NULL;
  3867. pci_dma_sync_single_for_cpu(priv->pci_dev, rxb->dma_addr,
  3868. IWL_RX_BUF_SIZE,
  3869. PCI_DMA_FROMDEVICE);
  3870. pkt = (struct iwl4965_rx_packet *)rxb->skb->data;
  3871. /* Reclaim a command buffer only if this packet is a response
  3872. * to a (driver-originated) command.
  3873. * If the packet (e.g. Rx frame) originated from uCode,
  3874. * there is no command buffer to reclaim.
  3875. * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
  3876. * but apparently a few don't get set; catch them here. */
  3877. reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
  3878. (pkt->hdr.cmd != REPLY_RX_PHY_CMD) &&
  3879. (pkt->hdr.cmd != REPLY_4965_RX) &&
  3880. (pkt->hdr.cmd != REPLY_COMPRESSED_BA) &&
  3881. (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
  3882. (pkt->hdr.cmd != REPLY_TX);
  3883. /* Based on type of command response or notification,
  3884. * handle those that need handling via function in
  3885. * rx_handlers table. See iwl4965_setup_rx_handlers() */
  3886. if (priv->rx_handlers[pkt->hdr.cmd]) {
  3887. IWL_DEBUG(IWL_DL_HOST_COMMAND | IWL_DL_RX | IWL_DL_ISR,
  3888. "r = %d, i = %d, %s, 0x%02x\n", r, i,
  3889. get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
  3890. priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
  3891. } else {
  3892. /* No handling needed */
  3893. IWL_DEBUG(IWL_DL_HOST_COMMAND | IWL_DL_RX | IWL_DL_ISR,
  3894. "r %d i %d No handler needed for %s, 0x%02x\n",
  3895. r, i, get_cmd_string(pkt->hdr.cmd),
  3896. pkt->hdr.cmd);
  3897. }
  3898. if (reclaim) {
  3899. /* Invoke any callbacks, transfer the skb to caller,
  3900. * and fire off the (possibly) blocking iwl4965_send_cmd()
  3901. * as we reclaim the driver command queue */
  3902. if (rxb && rxb->skb)
  3903. iwl4965_tx_cmd_complete(priv, rxb);
  3904. else
  3905. IWL_WARNING("Claim null rxb?\n");
  3906. }
  3907. /* For now we just don't re-use anything. We can tweak this
  3908. * later to try and re-use notification packets and SKBs that
  3909. * fail to Rx correctly */
  3910. if (rxb->skb != NULL) {
  3911. priv->alloc_rxb_skb--;
  3912. dev_kfree_skb_any(rxb->skb);
  3913. rxb->skb = NULL;
  3914. }
  3915. pci_unmap_single(priv->pci_dev, rxb->dma_addr,
  3916. IWL_RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
  3917. spin_lock_irqsave(&rxq->lock, flags);
  3918. list_add_tail(&rxb->list, &priv->rxq.rx_used);
  3919. spin_unlock_irqrestore(&rxq->lock, flags);
  3920. i = (i + 1) & RX_QUEUE_MASK;
  3921. }
  3922. /* Backtrack one entry */
  3923. priv->rxq.read = i;
  3924. iwl4965_rx_queue_restock(priv);
  3925. }
  3926. static int iwl4965_tx_queue_update_write_ptr(struct iwl4965_priv *priv,
  3927. struct iwl4965_tx_queue *txq)
  3928. {
  3929. u32 reg = 0;
  3930. int rc = 0;
  3931. int txq_id = txq->q.id;
  3932. if (txq->need_update == 0)
  3933. return rc;
  3934. /* if we're trying to save power */
  3935. if (test_bit(STATUS_POWER_PMI, &priv->status)) {
  3936. /* wake up nic if it's powered down ...
  3937. * uCode will wake up, and interrupt us again, so next
  3938. * time we'll skip this part. */
  3939. reg = iwl4965_read32(priv, CSR_UCODE_DRV_GP1);
  3940. if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
  3941. IWL_DEBUG_INFO("Requesting wakeup, GP1 = 0x%x\n", reg);
  3942. iwl4965_set_bit(priv, CSR_GP_CNTRL,
  3943. CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
  3944. return rc;
  3945. }
  3946. /* restore this queue's parameters in nic hardware. */
  3947. rc = iwl4965_grab_nic_access(priv);
  3948. if (rc)
  3949. return rc;
  3950. iwl4965_write_direct32(priv, HBUS_TARG_WRPTR,
  3951. txq->q.write_ptr | (txq_id << 8));
  3952. iwl4965_release_nic_access(priv);
  3953. /* else not in power-save mode, uCode will never sleep when we're
  3954. * trying to tx (during RFKILL, we're not trying to tx). */
  3955. } else
  3956. iwl4965_write32(priv, HBUS_TARG_WRPTR,
  3957. txq->q.write_ptr | (txq_id << 8));
  3958. txq->need_update = 0;
  3959. return rc;
  3960. }
  3961. #ifdef CONFIG_IWL4965_DEBUG
  3962. static void iwl4965_print_rx_config_cmd(struct iwl4965_rxon_cmd *rxon)
  3963. {
  3964. DECLARE_MAC_BUF(mac);
  3965. IWL_DEBUG_RADIO("RX CONFIG:\n");
  3966. iwl4965_print_hex_dump(IWL_DL_RADIO, (u8 *) rxon, sizeof(*rxon));
  3967. IWL_DEBUG_RADIO("u16 channel: 0x%x\n", le16_to_cpu(rxon->channel));
  3968. IWL_DEBUG_RADIO("u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags));
  3969. IWL_DEBUG_RADIO("u32 filter_flags: 0x%08x\n",
  3970. le32_to_cpu(rxon->filter_flags));
  3971. IWL_DEBUG_RADIO("u8 dev_type: 0x%x\n", rxon->dev_type);
  3972. IWL_DEBUG_RADIO("u8 ofdm_basic_rates: 0x%02x\n",
  3973. rxon->ofdm_basic_rates);
  3974. IWL_DEBUG_RADIO("u8 cck_basic_rates: 0x%02x\n", rxon->cck_basic_rates);
  3975. IWL_DEBUG_RADIO("u8[6] node_addr: %s\n",
  3976. print_mac(mac, rxon->node_addr));
  3977. IWL_DEBUG_RADIO("u8[6] bssid_addr: %s\n",
  3978. print_mac(mac, rxon->bssid_addr));
  3979. IWL_DEBUG_RADIO("u16 assoc_id: 0x%x\n", le16_to_cpu(rxon->assoc_id));
  3980. }
  3981. #endif
  3982. static void iwl4965_enable_interrupts(struct iwl4965_priv *priv)
  3983. {
  3984. IWL_DEBUG_ISR("Enabling interrupts\n");
  3985. set_bit(STATUS_INT_ENABLED, &priv->status);
  3986. iwl4965_write32(priv, CSR_INT_MASK, CSR_INI_SET_MASK);
  3987. }
  3988. static inline void iwl4965_disable_interrupts(struct iwl4965_priv *priv)
  3989. {
  3990. clear_bit(STATUS_INT_ENABLED, &priv->status);
  3991. /* disable interrupts from uCode/NIC to host */
  3992. iwl4965_write32(priv, CSR_INT_MASK, 0x00000000);
  3993. /* acknowledge/clear/reset any interrupts still pending
  3994. * from uCode or flow handler (Rx/Tx DMA) */
  3995. iwl4965_write32(priv, CSR_INT, 0xffffffff);
  3996. iwl4965_write32(priv, CSR_FH_INT_STATUS, 0xffffffff);
  3997. IWL_DEBUG_ISR("Disabled interrupts\n");
  3998. }
  3999. static const char *desc_lookup(int i)
  4000. {
  4001. switch (i) {
  4002. case 1:
  4003. return "FAIL";
  4004. case 2:
  4005. return "BAD_PARAM";
  4006. case 3:
  4007. return "BAD_CHECKSUM";
  4008. case 4:
  4009. return "NMI_INTERRUPT";
  4010. case 5:
  4011. return "SYSASSERT";
  4012. case 6:
  4013. return "FATAL_ERROR";
  4014. }
  4015. return "UNKNOWN";
  4016. }
  4017. #define ERROR_START_OFFSET (1 * sizeof(u32))
  4018. #define ERROR_ELEM_SIZE (7 * sizeof(u32))
  4019. static void iwl4965_dump_nic_error_log(struct iwl4965_priv *priv)
  4020. {
  4021. u32 data2, line;
  4022. u32 desc, time, count, base, data1;
  4023. u32 blink1, blink2, ilink1, ilink2;
  4024. int rc;
  4025. base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
  4026. if (!iwl4965_hw_valid_rtc_data_addr(base)) {
  4027. IWL_ERROR("Not valid error log pointer 0x%08X\n", base);
  4028. return;
  4029. }
  4030. rc = iwl4965_grab_nic_access(priv);
  4031. if (rc) {
  4032. IWL_WARNING("Can not read from adapter at this time.\n");
  4033. return;
  4034. }
  4035. count = iwl4965_read_targ_mem(priv, base);
  4036. if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
  4037. IWL_ERROR("Start IWL Error Log Dump:\n");
  4038. IWL_ERROR("Status: 0x%08lX, Config: %08X count: %d\n",
  4039. priv->status, priv->config, count);
  4040. }
  4041. desc = iwl4965_read_targ_mem(priv, base + 1 * sizeof(u32));
  4042. blink1 = iwl4965_read_targ_mem(priv, base + 3 * sizeof(u32));
  4043. blink2 = iwl4965_read_targ_mem(priv, base + 4 * sizeof(u32));
  4044. ilink1 = iwl4965_read_targ_mem(priv, base + 5 * sizeof(u32));
  4045. ilink2 = iwl4965_read_targ_mem(priv, base + 6 * sizeof(u32));
  4046. data1 = iwl4965_read_targ_mem(priv, base + 7 * sizeof(u32));
  4047. data2 = iwl4965_read_targ_mem(priv, base + 8 * sizeof(u32));
  4048. line = iwl4965_read_targ_mem(priv, base + 9 * sizeof(u32));
  4049. time = iwl4965_read_targ_mem(priv, base + 11 * sizeof(u32));
  4050. IWL_ERROR("Desc Time "
  4051. "data1 data2 line\n");
  4052. IWL_ERROR("%-13s (#%d) %010u 0x%08X 0x%08X %u\n",
  4053. desc_lookup(desc), desc, time, data1, data2, line);
  4054. IWL_ERROR("blink1 blink2 ilink1 ilink2\n");
  4055. IWL_ERROR("0x%05X 0x%05X 0x%05X 0x%05X\n", blink1, blink2,
  4056. ilink1, ilink2);
  4057. iwl4965_release_nic_access(priv);
  4058. }
  4059. #define EVENT_START_OFFSET (4 * sizeof(u32))
  4060. /**
  4061. * iwl4965_print_event_log - Dump error event log to syslog
  4062. *
  4063. * NOTE: Must be called with iwl4965_grab_nic_access() already obtained!
  4064. */
  4065. static void iwl4965_print_event_log(struct iwl4965_priv *priv, u32 start_idx,
  4066. u32 num_events, u32 mode)
  4067. {
  4068. u32 i;
  4069. u32 base; /* SRAM byte address of event log header */
  4070. u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
  4071. u32 ptr; /* SRAM byte address of log data */
  4072. u32 ev, time, data; /* event log data */
  4073. if (num_events == 0)
  4074. return;
  4075. base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
  4076. if (mode == 0)
  4077. event_size = 2 * sizeof(u32);
  4078. else
  4079. event_size = 3 * sizeof(u32);
  4080. ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
  4081. /* "time" is actually "data" for mode 0 (no timestamp).
  4082. * place event id # at far right for easier visual parsing. */
  4083. for (i = 0; i < num_events; i++) {
  4084. ev = iwl4965_read_targ_mem(priv, ptr);
  4085. ptr += sizeof(u32);
  4086. time = iwl4965_read_targ_mem(priv, ptr);
  4087. ptr += sizeof(u32);
  4088. if (mode == 0)
  4089. IWL_ERROR("0x%08x\t%04u\n", time, ev); /* data, ev */
  4090. else {
  4091. data = iwl4965_read_targ_mem(priv, ptr);
  4092. ptr += sizeof(u32);
  4093. IWL_ERROR("%010u\t0x%08x\t%04u\n", time, data, ev);
  4094. }
  4095. }
  4096. }
  4097. static void iwl4965_dump_nic_event_log(struct iwl4965_priv *priv)
  4098. {
  4099. int rc;
  4100. u32 base; /* SRAM byte address of event log header */
  4101. u32 capacity; /* event log capacity in # entries */
  4102. u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */
  4103. u32 num_wraps; /* # times uCode wrapped to top of log */
  4104. u32 next_entry; /* index of next entry to be written by uCode */
  4105. u32 size; /* # entries that we'll print */
  4106. base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
  4107. if (!iwl4965_hw_valid_rtc_data_addr(base)) {
  4108. IWL_ERROR("Invalid event log pointer 0x%08X\n", base);
  4109. return;
  4110. }
  4111. rc = iwl4965_grab_nic_access(priv);
  4112. if (rc) {
  4113. IWL_WARNING("Can not read from adapter at this time.\n");
  4114. return;
  4115. }
  4116. /* event log header */
  4117. capacity = iwl4965_read_targ_mem(priv, base);
  4118. mode = iwl4965_read_targ_mem(priv, base + (1 * sizeof(u32)));
  4119. num_wraps = iwl4965_read_targ_mem(priv, base + (2 * sizeof(u32)));
  4120. next_entry = iwl4965_read_targ_mem(priv, base + (3 * sizeof(u32)));
  4121. size = num_wraps ? capacity : next_entry;
  4122. /* bail out if nothing in log */
  4123. if (size == 0) {
  4124. IWL_ERROR("Start IWL Event Log Dump: nothing in log\n");
  4125. iwl4965_release_nic_access(priv);
  4126. return;
  4127. }
  4128. IWL_ERROR("Start IWL Event Log Dump: display count %d, wraps %d\n",
  4129. size, num_wraps);
  4130. /* if uCode has wrapped back to top of log, start at the oldest entry,
  4131. * i.e the next one that uCode would fill. */
  4132. if (num_wraps)
  4133. iwl4965_print_event_log(priv, next_entry,
  4134. capacity - next_entry, mode);
  4135. /* (then/else) start at top of log */
  4136. iwl4965_print_event_log(priv, 0, next_entry, mode);
  4137. iwl4965_release_nic_access(priv);
  4138. }
  4139. /**
  4140. * iwl4965_irq_handle_error - called for HW or SW error interrupt from card
  4141. */
  4142. static void iwl4965_irq_handle_error(struct iwl4965_priv *priv)
  4143. {
  4144. /* Set the FW error flag -- cleared on iwl4965_down */
  4145. set_bit(STATUS_FW_ERROR, &priv->status);
  4146. /* Cancel currently queued command. */
  4147. clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
  4148. #ifdef CONFIG_IWL4965_DEBUG
  4149. if (iwl4965_debug_level & IWL_DL_FW_ERRORS) {
  4150. iwl4965_dump_nic_error_log(priv);
  4151. iwl4965_dump_nic_event_log(priv);
  4152. iwl4965_print_rx_config_cmd(&priv->staging_rxon);
  4153. }
  4154. #endif
  4155. wake_up_interruptible(&priv->wait_command_queue);
  4156. /* Keep the restart process from trying to send host
  4157. * commands by clearing the INIT status bit */
  4158. clear_bit(STATUS_READY, &priv->status);
  4159. if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  4160. IWL_DEBUG(IWL_DL_INFO | IWL_DL_FW_ERRORS,
  4161. "Restarting adapter due to uCode error.\n");
  4162. if (iwl4965_is_associated(priv)) {
  4163. memcpy(&priv->recovery_rxon, &priv->active_rxon,
  4164. sizeof(priv->recovery_rxon));
  4165. priv->error_recovering = 1;
  4166. }
  4167. queue_work(priv->workqueue, &priv->restart);
  4168. }
  4169. }
  4170. static void iwl4965_error_recovery(struct iwl4965_priv *priv)
  4171. {
  4172. unsigned long flags;
  4173. memcpy(&priv->staging_rxon, &priv->recovery_rxon,
  4174. sizeof(priv->staging_rxon));
  4175. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  4176. iwl4965_commit_rxon(priv);
  4177. iwl4965_rxon_add_station(priv, priv->bssid, 1);
  4178. spin_lock_irqsave(&priv->lock, flags);
  4179. priv->assoc_id = le16_to_cpu(priv->staging_rxon.assoc_id);
  4180. priv->error_recovering = 0;
  4181. spin_unlock_irqrestore(&priv->lock, flags);
  4182. }
  4183. static void iwl4965_irq_tasklet(struct iwl4965_priv *priv)
  4184. {
  4185. u32 inta, handled = 0;
  4186. u32 inta_fh;
  4187. unsigned long flags;
  4188. #ifdef CONFIG_IWL4965_DEBUG
  4189. u32 inta_mask;
  4190. #endif
  4191. spin_lock_irqsave(&priv->lock, flags);
  4192. /* Ack/clear/reset pending uCode interrupts.
  4193. * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
  4194. * and will clear only when CSR_FH_INT_STATUS gets cleared. */
  4195. inta = iwl4965_read32(priv, CSR_INT);
  4196. iwl4965_write32(priv, CSR_INT, inta);
  4197. /* Ack/clear/reset pending flow-handler (DMA) interrupts.
  4198. * Any new interrupts that happen after this, either while we're
  4199. * in this tasklet, or later, will show up in next ISR/tasklet. */
  4200. inta_fh = iwl4965_read32(priv, CSR_FH_INT_STATUS);
  4201. iwl4965_write32(priv, CSR_FH_INT_STATUS, inta_fh);
  4202. #ifdef CONFIG_IWL4965_DEBUG
  4203. if (iwl4965_debug_level & IWL_DL_ISR) {
  4204. inta_mask = iwl4965_read32(priv, CSR_INT_MASK); /* just for debug */
  4205. IWL_DEBUG_ISR("inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
  4206. inta, inta_mask, inta_fh);
  4207. }
  4208. #endif
  4209. /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
  4210. * atomic, make sure that inta covers all the interrupts that
  4211. * we've discovered, even if FH interrupt came in just after
  4212. * reading CSR_INT. */
  4213. if (inta_fh & CSR_FH_INT_RX_MASK)
  4214. inta |= CSR_INT_BIT_FH_RX;
  4215. if (inta_fh & CSR_FH_INT_TX_MASK)
  4216. inta |= CSR_INT_BIT_FH_TX;
  4217. /* Now service all interrupt bits discovered above. */
  4218. if (inta & CSR_INT_BIT_HW_ERR) {
  4219. IWL_ERROR("Microcode HW error detected. Restarting.\n");
  4220. /* Tell the device to stop sending interrupts */
  4221. iwl4965_disable_interrupts(priv);
  4222. iwl4965_irq_handle_error(priv);
  4223. handled |= CSR_INT_BIT_HW_ERR;
  4224. spin_unlock_irqrestore(&priv->lock, flags);
  4225. return;
  4226. }
  4227. #ifdef CONFIG_IWL4965_DEBUG
  4228. if (iwl4965_debug_level & (IWL_DL_ISR)) {
  4229. /* NIC fires this, but we don't use it, redundant with WAKEUP */
  4230. if (inta & CSR_INT_BIT_MAC_CLK_ACTV)
  4231. IWL_DEBUG_ISR("Microcode started or stopped.\n");
  4232. /* Alive notification via Rx interrupt will do the real work */
  4233. if (inta & CSR_INT_BIT_ALIVE)
  4234. IWL_DEBUG_ISR("Alive interrupt\n");
  4235. }
  4236. #endif
  4237. /* Safely ignore these bits for debug checks below */
  4238. inta &= ~(CSR_INT_BIT_MAC_CLK_ACTV | CSR_INT_BIT_ALIVE);
  4239. /* HW RF KILL switch toggled (4965 only) */
  4240. if (inta & CSR_INT_BIT_RF_KILL) {
  4241. int hw_rf_kill = 0;
  4242. if (!(iwl4965_read32(priv, CSR_GP_CNTRL) &
  4243. CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
  4244. hw_rf_kill = 1;
  4245. IWL_DEBUG(IWL_DL_INFO | IWL_DL_RF_KILL | IWL_DL_ISR,
  4246. "RF_KILL bit toggled to %s.\n",
  4247. hw_rf_kill ? "disable radio":"enable radio");
  4248. /* Queue restart only if RF_KILL switch was set to "kill"
  4249. * when we loaded driver, and is now set to "enable".
  4250. * After we're Alive, RF_KILL gets handled by
  4251. * iwl_rx_card_state_notif() */
  4252. if (!hw_rf_kill && !test_bit(STATUS_ALIVE, &priv->status)) {
  4253. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  4254. queue_work(priv->workqueue, &priv->restart);
  4255. }
  4256. handled |= CSR_INT_BIT_RF_KILL;
  4257. }
  4258. /* Chip got too hot and stopped itself (4965 only) */
  4259. if (inta & CSR_INT_BIT_CT_KILL) {
  4260. IWL_ERROR("Microcode CT kill error detected.\n");
  4261. handled |= CSR_INT_BIT_CT_KILL;
  4262. }
  4263. /* Error detected by uCode */
  4264. if (inta & CSR_INT_BIT_SW_ERR) {
  4265. IWL_ERROR("Microcode SW error detected. Restarting 0x%X.\n",
  4266. inta);
  4267. iwl4965_irq_handle_error(priv);
  4268. handled |= CSR_INT_BIT_SW_ERR;
  4269. }
  4270. /* uCode wakes up after power-down sleep */
  4271. if (inta & CSR_INT_BIT_WAKEUP) {
  4272. IWL_DEBUG_ISR("Wakeup interrupt\n");
  4273. iwl4965_rx_queue_update_write_ptr(priv, &priv->rxq);
  4274. iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[0]);
  4275. iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[1]);
  4276. iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[2]);
  4277. iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[3]);
  4278. iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[4]);
  4279. iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[5]);
  4280. handled |= CSR_INT_BIT_WAKEUP;
  4281. }
  4282. /* All uCode command responses, including Tx command responses,
  4283. * Rx "responses" (frame-received notification), and other
  4284. * notifications from uCode come through here*/
  4285. if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
  4286. iwl4965_rx_handle(priv);
  4287. handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
  4288. }
  4289. if (inta & CSR_INT_BIT_FH_TX) {
  4290. IWL_DEBUG_ISR("Tx interrupt\n");
  4291. handled |= CSR_INT_BIT_FH_TX;
  4292. }
  4293. if (inta & ~handled)
  4294. IWL_ERROR("Unhandled INTA bits 0x%08x\n", inta & ~handled);
  4295. if (inta & ~CSR_INI_SET_MASK) {
  4296. IWL_WARNING("Disabled INTA bits 0x%08x were pending\n",
  4297. inta & ~CSR_INI_SET_MASK);
  4298. IWL_WARNING(" with FH_INT = 0x%08x\n", inta_fh);
  4299. }
  4300. /* Re-enable all interrupts */
  4301. iwl4965_enable_interrupts(priv);
  4302. #ifdef CONFIG_IWL4965_DEBUG
  4303. if (iwl4965_debug_level & (IWL_DL_ISR)) {
  4304. inta = iwl4965_read32(priv, CSR_INT);
  4305. inta_mask = iwl4965_read32(priv, CSR_INT_MASK);
  4306. inta_fh = iwl4965_read32(priv, CSR_FH_INT_STATUS);
  4307. IWL_DEBUG_ISR("End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
  4308. "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
  4309. }
  4310. #endif
  4311. spin_unlock_irqrestore(&priv->lock, flags);
  4312. }
  4313. static irqreturn_t iwl4965_isr(int irq, void *data)
  4314. {
  4315. struct iwl4965_priv *priv = data;
  4316. u32 inta, inta_mask;
  4317. u32 inta_fh;
  4318. if (!priv)
  4319. return IRQ_NONE;
  4320. spin_lock(&priv->lock);
  4321. /* Disable (but don't clear!) interrupts here to avoid
  4322. * back-to-back ISRs and sporadic interrupts from our NIC.
  4323. * If we have something to service, the tasklet will re-enable ints.
  4324. * If we *don't* have something, we'll re-enable before leaving here. */
  4325. inta_mask = iwl4965_read32(priv, CSR_INT_MASK); /* just for debug */
  4326. iwl4965_write32(priv, CSR_INT_MASK, 0x00000000);
  4327. /* Discover which interrupts are active/pending */
  4328. inta = iwl4965_read32(priv, CSR_INT);
  4329. inta_fh = iwl4965_read32(priv, CSR_FH_INT_STATUS);
  4330. /* Ignore interrupt if there's nothing in NIC to service.
  4331. * This may be due to IRQ shared with another device,
  4332. * or due to sporadic interrupts thrown from our NIC. */
  4333. if (!inta && !inta_fh) {
  4334. IWL_DEBUG_ISR("Ignore interrupt, inta == 0, inta_fh == 0\n");
  4335. goto none;
  4336. }
  4337. if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) {
  4338. /* Hardware disappeared. It might have already raised
  4339. * an interrupt */
  4340. IWL_WARNING("HARDWARE GONE?? INTA == 0x%080x\n", inta);
  4341. goto unplugged;
  4342. }
  4343. IWL_DEBUG_ISR("ISR inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
  4344. inta, inta_mask, inta_fh);
  4345. /* iwl4965_irq_tasklet() will service interrupts and re-enable them */
  4346. tasklet_schedule(&priv->irq_tasklet);
  4347. unplugged:
  4348. spin_unlock(&priv->lock);
  4349. return IRQ_HANDLED;
  4350. none:
  4351. /* re-enable interrupts here since we don't have anything to service. */
  4352. iwl4965_enable_interrupts(priv);
  4353. spin_unlock(&priv->lock);
  4354. return IRQ_NONE;
  4355. }
  4356. /************************** EEPROM BANDS ****************************
  4357. *
  4358. * The iwl4965_eeprom_band definitions below provide the mapping from the
  4359. * EEPROM contents to the specific channel number supported for each
  4360. * band.
  4361. *
  4362. * For example, iwl4965_priv->eeprom.band_3_channels[4] from the band_3
  4363. * definition below maps to physical channel 42 in the 5.2GHz spectrum.
  4364. * The specific geography and calibration information for that channel
  4365. * is contained in the eeprom map itself.
  4366. *
  4367. * During init, we copy the eeprom information and channel map
  4368. * information into priv->channel_info_24/52 and priv->channel_map_24/52
  4369. *
  4370. * channel_map_24/52 provides the index in the channel_info array for a
  4371. * given channel. We have to have two separate maps as there is channel
  4372. * overlap with the 2.4GHz and 5.2GHz spectrum as seen in band_1 and
  4373. * band_2
  4374. *
  4375. * A value of 0xff stored in the channel_map indicates that the channel
  4376. * is not supported by the hardware at all.
  4377. *
  4378. * A value of 0xfe in the channel_map indicates that the channel is not
  4379. * valid for Tx with the current hardware. This means that
  4380. * while the system can tune and receive on a given channel, it may not
  4381. * be able to associate or transmit any frames on that
  4382. * channel. There is no corresponding channel information for that
  4383. * entry.
  4384. *
  4385. *********************************************************************/
  4386. /* 2.4 GHz */
  4387. static const u8 iwl4965_eeprom_band_1[14] = {
  4388. 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14
  4389. };
  4390. /* 5.2 GHz bands */
  4391. static const u8 iwl4965_eeprom_band_2[] = {
  4392. 183, 184, 185, 187, 188, 189, 192, 196, 7, 8, 11, 12, 16
  4393. };
  4394. static const u8 iwl4965_eeprom_band_3[] = { /* 5205-5320MHz */
  4395. 34, 36, 38, 40, 42, 44, 46, 48, 52, 56, 60, 64
  4396. };
  4397. static const u8 iwl4965_eeprom_band_4[] = { /* 5500-5700MHz */
  4398. 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140
  4399. };
  4400. static const u8 iwl4965_eeprom_band_5[] = { /* 5725-5825MHz */
  4401. 145, 149, 153, 157, 161, 165
  4402. };
  4403. static u8 iwl4965_eeprom_band_6[] = { /* 2.4 FAT channel */
  4404. 1, 2, 3, 4, 5, 6, 7
  4405. };
  4406. static u8 iwl4965_eeprom_band_7[] = { /* 5.2 FAT channel */
  4407. 36, 44, 52, 60, 100, 108, 116, 124, 132, 149, 157
  4408. };
  4409. static void iwl4965_init_band_reference(const struct iwl4965_priv *priv, int band,
  4410. int *eeprom_ch_count,
  4411. const struct iwl4965_eeprom_channel
  4412. **eeprom_ch_info,
  4413. const u8 **eeprom_ch_index)
  4414. {
  4415. switch (band) {
  4416. case 1: /* 2.4GHz band */
  4417. *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_1);
  4418. *eeprom_ch_info = priv->eeprom.band_1_channels;
  4419. *eeprom_ch_index = iwl4965_eeprom_band_1;
  4420. break;
  4421. case 2: /* 5.2GHz band */
  4422. *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_2);
  4423. *eeprom_ch_info = priv->eeprom.band_2_channels;
  4424. *eeprom_ch_index = iwl4965_eeprom_band_2;
  4425. break;
  4426. case 3: /* 5.2GHz band */
  4427. *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_3);
  4428. *eeprom_ch_info = priv->eeprom.band_3_channels;
  4429. *eeprom_ch_index = iwl4965_eeprom_band_3;
  4430. break;
  4431. case 4: /* 5.2GHz band */
  4432. *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_4);
  4433. *eeprom_ch_info = priv->eeprom.band_4_channels;
  4434. *eeprom_ch_index = iwl4965_eeprom_band_4;
  4435. break;
  4436. case 5: /* 5.2GHz band */
  4437. *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_5);
  4438. *eeprom_ch_info = priv->eeprom.band_5_channels;
  4439. *eeprom_ch_index = iwl4965_eeprom_band_5;
  4440. break;
  4441. case 6:
  4442. *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_6);
  4443. *eeprom_ch_info = priv->eeprom.band_24_channels;
  4444. *eeprom_ch_index = iwl4965_eeprom_band_6;
  4445. break;
  4446. case 7:
  4447. *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_7);
  4448. *eeprom_ch_info = priv->eeprom.band_52_channels;
  4449. *eeprom_ch_index = iwl4965_eeprom_band_7;
  4450. break;
  4451. default:
  4452. BUG();
  4453. return;
  4454. }
  4455. }
  4456. const struct iwl4965_channel_info *iwl4965_get_channel_info(const struct iwl4965_priv *priv,
  4457. int phymode, u16 channel)
  4458. {
  4459. int i;
  4460. switch (phymode) {
  4461. case MODE_IEEE80211A:
  4462. for (i = 14; i < priv->channel_count; i++) {
  4463. if (priv->channel_info[i].channel == channel)
  4464. return &priv->channel_info[i];
  4465. }
  4466. break;
  4467. case MODE_IEEE80211B:
  4468. case MODE_IEEE80211G:
  4469. if (channel >= 1 && channel <= 14)
  4470. return &priv->channel_info[channel - 1];
  4471. break;
  4472. }
  4473. return NULL;
  4474. }
  4475. #define CHECK_AND_PRINT(x) ((eeprom_ch_info[ch].flags & EEPROM_CHANNEL_##x) \
  4476. ? # x " " : "")
  4477. static int iwl4965_init_channel_map(struct iwl4965_priv *priv)
  4478. {
  4479. int eeprom_ch_count = 0;
  4480. const u8 *eeprom_ch_index = NULL;
  4481. const struct iwl4965_eeprom_channel *eeprom_ch_info = NULL;
  4482. int band, ch;
  4483. struct iwl4965_channel_info *ch_info;
  4484. if (priv->channel_count) {
  4485. IWL_DEBUG_INFO("Channel map already initialized.\n");
  4486. return 0;
  4487. }
  4488. if (priv->eeprom.version < 0x2f) {
  4489. IWL_WARNING("Unsupported EEPROM version: 0x%04X\n",
  4490. priv->eeprom.version);
  4491. return -EINVAL;
  4492. }
  4493. IWL_DEBUG_INFO("Initializing regulatory info from EEPROM\n");
  4494. priv->channel_count =
  4495. ARRAY_SIZE(iwl4965_eeprom_band_1) +
  4496. ARRAY_SIZE(iwl4965_eeprom_band_2) +
  4497. ARRAY_SIZE(iwl4965_eeprom_band_3) +
  4498. ARRAY_SIZE(iwl4965_eeprom_band_4) +
  4499. ARRAY_SIZE(iwl4965_eeprom_band_5);
  4500. IWL_DEBUG_INFO("Parsing data for %d channels.\n", priv->channel_count);
  4501. priv->channel_info = kzalloc(sizeof(struct iwl4965_channel_info) *
  4502. priv->channel_count, GFP_KERNEL);
  4503. if (!priv->channel_info) {
  4504. IWL_ERROR("Could not allocate channel_info\n");
  4505. priv->channel_count = 0;
  4506. return -ENOMEM;
  4507. }
  4508. ch_info = priv->channel_info;
  4509. /* Loop through the 5 EEPROM bands adding them in order to the
  4510. * channel map we maintain (that contains additional information than
  4511. * what just in the EEPROM) */
  4512. for (band = 1; band <= 5; band++) {
  4513. iwl4965_init_band_reference(priv, band, &eeprom_ch_count,
  4514. &eeprom_ch_info, &eeprom_ch_index);
  4515. /* Loop through each band adding each of the channels */
  4516. for (ch = 0; ch < eeprom_ch_count; ch++) {
  4517. ch_info->channel = eeprom_ch_index[ch];
  4518. ch_info->phymode = (band == 1) ? MODE_IEEE80211B :
  4519. MODE_IEEE80211A;
  4520. /* permanently store EEPROM's channel regulatory flags
  4521. * and max power in channel info database. */
  4522. ch_info->eeprom = eeprom_ch_info[ch];
  4523. /* Copy the run-time flags so they are there even on
  4524. * invalid channels */
  4525. ch_info->flags = eeprom_ch_info[ch].flags;
  4526. if (!(is_channel_valid(ch_info))) {
  4527. IWL_DEBUG_INFO("Ch. %d Flags %x [%sGHz] - "
  4528. "No traffic\n",
  4529. ch_info->channel,
  4530. ch_info->flags,
  4531. is_channel_a_band(ch_info) ?
  4532. "5.2" : "2.4");
  4533. ch_info++;
  4534. continue;
  4535. }
  4536. /* Initialize regulatory-based run-time data */
  4537. ch_info->max_power_avg = ch_info->curr_txpow =
  4538. eeprom_ch_info[ch].max_power_avg;
  4539. ch_info->scan_power = eeprom_ch_info[ch].max_power_avg;
  4540. ch_info->min_power = 0;
  4541. IWL_DEBUG_INFO("Ch. %d [%sGHz] %s%s%s%s%s%s(0x%02x"
  4542. " %ddBm): Ad-Hoc %ssupported\n",
  4543. ch_info->channel,
  4544. is_channel_a_band(ch_info) ?
  4545. "5.2" : "2.4",
  4546. CHECK_AND_PRINT(IBSS),
  4547. CHECK_AND_PRINT(ACTIVE),
  4548. CHECK_AND_PRINT(RADAR),
  4549. CHECK_AND_PRINT(WIDE),
  4550. CHECK_AND_PRINT(NARROW),
  4551. CHECK_AND_PRINT(DFS),
  4552. eeprom_ch_info[ch].flags,
  4553. eeprom_ch_info[ch].max_power_avg,
  4554. ((eeprom_ch_info[ch].
  4555. flags & EEPROM_CHANNEL_IBSS)
  4556. && !(eeprom_ch_info[ch].
  4557. flags & EEPROM_CHANNEL_RADAR))
  4558. ? "" : "not ");
  4559. /* Set the user_txpower_limit to the highest power
  4560. * supported by any channel */
  4561. if (eeprom_ch_info[ch].max_power_avg >
  4562. priv->user_txpower_limit)
  4563. priv->user_txpower_limit =
  4564. eeprom_ch_info[ch].max_power_avg;
  4565. ch_info++;
  4566. }
  4567. }
  4568. for (band = 6; band <= 7; band++) {
  4569. int phymode;
  4570. u8 fat_extension_chan;
  4571. iwl4965_init_band_reference(priv, band, &eeprom_ch_count,
  4572. &eeprom_ch_info, &eeprom_ch_index);
  4573. phymode = (band == 6) ? MODE_IEEE80211B : MODE_IEEE80211A;
  4574. /* Loop through each band adding each of the channels */
  4575. for (ch = 0; ch < eeprom_ch_count; ch++) {
  4576. if ((band == 6) &&
  4577. ((eeprom_ch_index[ch] == 5) ||
  4578. (eeprom_ch_index[ch] == 6) ||
  4579. (eeprom_ch_index[ch] == 7)))
  4580. fat_extension_chan = HT_IE_EXT_CHANNEL_MAX;
  4581. else
  4582. fat_extension_chan = HT_IE_EXT_CHANNEL_ABOVE;
  4583. iwl4965_set_fat_chan_info(priv, phymode,
  4584. eeprom_ch_index[ch],
  4585. &(eeprom_ch_info[ch]),
  4586. fat_extension_chan);
  4587. iwl4965_set_fat_chan_info(priv, phymode,
  4588. (eeprom_ch_index[ch] + 4),
  4589. &(eeprom_ch_info[ch]),
  4590. HT_IE_EXT_CHANNEL_BELOW);
  4591. }
  4592. }
  4593. return 0;
  4594. }
  4595. /* For active scan, listen ACTIVE_DWELL_TIME (msec) on each channel after
  4596. * sending probe req. This should be set long enough to hear probe responses
  4597. * from more than one AP. */
  4598. #define IWL_ACTIVE_DWELL_TIME_24 (20) /* all times in msec */
  4599. #define IWL_ACTIVE_DWELL_TIME_52 (10)
  4600. /* For faster active scanning, scan will move to the next channel if fewer than
  4601. * PLCP_QUIET_THRESH packets are heard on this channel within
  4602. * ACTIVE_QUIET_TIME after sending probe request. This shortens the dwell
  4603. * time if it's a quiet channel (nothing responded to our probe, and there's
  4604. * no other traffic).
  4605. * Disable "quiet" feature by setting PLCP_QUIET_THRESH to 0. */
  4606. #define IWL_PLCP_QUIET_THRESH __constant_cpu_to_le16(1) /* packets */
  4607. #define IWL_ACTIVE_QUIET_TIME __constant_cpu_to_le16(5) /* msec */
  4608. /* For passive scan, listen PASSIVE_DWELL_TIME (msec) on each channel.
  4609. * Must be set longer than active dwell time.
  4610. * For the most reliable scan, set > AP beacon interval (typically 100msec). */
  4611. #define IWL_PASSIVE_DWELL_TIME_24 (20) /* all times in msec */
  4612. #define IWL_PASSIVE_DWELL_TIME_52 (10)
  4613. #define IWL_PASSIVE_DWELL_BASE (100)
  4614. #define IWL_CHANNEL_TUNE_TIME 5
  4615. static inline u16 iwl4965_get_active_dwell_time(struct iwl4965_priv *priv, int phymode)
  4616. {
  4617. if (phymode == MODE_IEEE80211A)
  4618. return IWL_ACTIVE_DWELL_TIME_52;
  4619. else
  4620. return IWL_ACTIVE_DWELL_TIME_24;
  4621. }
  4622. static u16 iwl4965_get_passive_dwell_time(struct iwl4965_priv *priv, int phymode)
  4623. {
  4624. u16 active = iwl4965_get_active_dwell_time(priv, phymode);
  4625. u16 passive = (phymode != MODE_IEEE80211A) ?
  4626. IWL_PASSIVE_DWELL_BASE + IWL_PASSIVE_DWELL_TIME_24 :
  4627. IWL_PASSIVE_DWELL_BASE + IWL_PASSIVE_DWELL_TIME_52;
  4628. if (iwl4965_is_associated(priv)) {
  4629. /* If we're associated, we clamp the maximum passive
  4630. * dwell time to be 98% of the beacon interval (minus
  4631. * 2 * channel tune time) */
  4632. passive = priv->beacon_int;
  4633. if ((passive > IWL_PASSIVE_DWELL_BASE) || !passive)
  4634. passive = IWL_PASSIVE_DWELL_BASE;
  4635. passive = (passive * 98) / 100 - IWL_CHANNEL_TUNE_TIME * 2;
  4636. }
  4637. if (passive <= active)
  4638. passive = active + 1;
  4639. return passive;
  4640. }
  4641. static int iwl4965_get_channels_for_scan(struct iwl4965_priv *priv, int phymode,
  4642. u8 is_active, u8 direct_mask,
  4643. struct iwl4965_scan_channel *scan_ch)
  4644. {
  4645. const struct ieee80211_channel *channels = NULL;
  4646. const struct ieee80211_hw_mode *hw_mode;
  4647. const struct iwl4965_channel_info *ch_info;
  4648. u16 passive_dwell = 0;
  4649. u16 active_dwell = 0;
  4650. int added, i;
  4651. hw_mode = iwl4965_get_hw_mode(priv, phymode);
  4652. if (!hw_mode)
  4653. return 0;
  4654. channels = hw_mode->channels;
  4655. active_dwell = iwl4965_get_active_dwell_time(priv, phymode);
  4656. passive_dwell = iwl4965_get_passive_dwell_time(priv, phymode);
  4657. for (i = 0, added = 0; i < hw_mode->num_channels; i++) {
  4658. if (channels[i].chan ==
  4659. le16_to_cpu(priv->active_rxon.channel)) {
  4660. if (iwl4965_is_associated(priv)) {
  4661. IWL_DEBUG_SCAN
  4662. ("Skipping current channel %d\n",
  4663. le16_to_cpu(priv->active_rxon.channel));
  4664. continue;
  4665. }
  4666. } else if (priv->only_active_channel)
  4667. continue;
  4668. scan_ch->channel = channels[i].chan;
  4669. ch_info = iwl4965_get_channel_info(priv, phymode, scan_ch->channel);
  4670. if (!is_channel_valid(ch_info)) {
  4671. IWL_DEBUG_SCAN("Channel %d is INVALID for this SKU.\n",
  4672. scan_ch->channel);
  4673. continue;
  4674. }
  4675. if (!is_active || is_channel_passive(ch_info) ||
  4676. !(channels[i].flag & IEEE80211_CHAN_W_ACTIVE_SCAN))
  4677. scan_ch->type = 0; /* passive */
  4678. else
  4679. scan_ch->type = 1; /* active */
  4680. if (scan_ch->type & 1)
  4681. scan_ch->type |= (direct_mask << 1);
  4682. if (is_channel_narrow(ch_info))
  4683. scan_ch->type |= (1 << 7);
  4684. scan_ch->active_dwell = cpu_to_le16(active_dwell);
  4685. scan_ch->passive_dwell = cpu_to_le16(passive_dwell);
  4686. /* Set power levels to defaults */
  4687. scan_ch->tpc.dsp_atten = 110;
  4688. /* scan_pwr_info->tpc.dsp_atten; */
  4689. /*scan_pwr_info->tpc.tx_gain; */
  4690. if (phymode == MODE_IEEE80211A)
  4691. scan_ch->tpc.tx_gain = ((1 << 5) | (3 << 3)) | 3;
  4692. else {
  4693. scan_ch->tpc.tx_gain = ((1 << 5) | (5 << 3));
  4694. /* NOTE: if we were doing 6Mb OFDM for scans we'd use
  4695. * power level
  4696. scan_ch->tpc.tx_gain = ((1<<5) | (2 << 3)) | 3;
  4697. */
  4698. }
  4699. IWL_DEBUG_SCAN("Scanning %d [%s %d]\n",
  4700. scan_ch->channel,
  4701. (scan_ch->type & 1) ? "ACTIVE" : "PASSIVE",
  4702. (scan_ch->type & 1) ?
  4703. active_dwell : passive_dwell);
  4704. scan_ch++;
  4705. added++;
  4706. }
  4707. IWL_DEBUG_SCAN("total channels to scan %d \n", added);
  4708. return added;
  4709. }
  4710. static void iwl4965_reset_channel_flag(struct iwl4965_priv *priv)
  4711. {
  4712. int i, j;
  4713. for (i = 0; i < 3; i++) {
  4714. struct ieee80211_hw_mode *hw_mode = (void *)&priv->modes[i];
  4715. for (j = 0; j < hw_mode->num_channels; j++)
  4716. hw_mode->channels[j].flag = hw_mode->channels[j].val;
  4717. }
  4718. }
  4719. static void iwl4965_init_hw_rates(struct iwl4965_priv *priv,
  4720. struct ieee80211_rate *rates)
  4721. {
  4722. int i;
  4723. for (i = 0; i < IWL_RATE_COUNT; i++) {
  4724. rates[i].rate = iwl4965_rates[i].ieee * 5;
  4725. rates[i].val = i; /* Rate scaling will work on indexes */
  4726. rates[i].val2 = i;
  4727. rates[i].flags = IEEE80211_RATE_SUPPORTED;
  4728. /* Only OFDM have the bits-per-symbol set */
  4729. if ((i <= IWL_LAST_OFDM_RATE) && (i >= IWL_FIRST_OFDM_RATE))
  4730. rates[i].flags |= IEEE80211_RATE_OFDM;
  4731. else {
  4732. /*
  4733. * If CCK 1M then set rate flag to CCK else CCK_2
  4734. * which is CCK | PREAMBLE2
  4735. */
  4736. rates[i].flags |= (iwl4965_rates[i].plcp == 10) ?
  4737. IEEE80211_RATE_CCK : IEEE80211_RATE_CCK_2;
  4738. }
  4739. /* Set up which ones are basic rates... */
  4740. if (IWL_BASIC_RATES_MASK & (1 << i))
  4741. rates[i].flags |= IEEE80211_RATE_BASIC;
  4742. }
  4743. }
  4744. /**
  4745. * iwl4965_init_geos - Initialize mac80211's geo/channel info based from eeprom
  4746. */
  4747. static int iwl4965_init_geos(struct iwl4965_priv *priv)
  4748. {
  4749. struct iwl4965_channel_info *ch;
  4750. struct ieee80211_hw_mode *modes;
  4751. struct ieee80211_channel *channels;
  4752. struct ieee80211_channel *geo_ch;
  4753. struct ieee80211_rate *rates;
  4754. int i = 0;
  4755. enum {
  4756. A = 0,
  4757. B = 1,
  4758. G = 2,
  4759. A_11N = 3,
  4760. G_11N = 4,
  4761. };
  4762. int mode_count = 5;
  4763. if (priv->modes) {
  4764. IWL_DEBUG_INFO("Geography modes already initialized.\n");
  4765. set_bit(STATUS_GEO_CONFIGURED, &priv->status);
  4766. return 0;
  4767. }
  4768. modes = kzalloc(sizeof(struct ieee80211_hw_mode) * mode_count,
  4769. GFP_KERNEL);
  4770. if (!modes)
  4771. return -ENOMEM;
  4772. channels = kzalloc(sizeof(struct ieee80211_channel) *
  4773. priv->channel_count, GFP_KERNEL);
  4774. if (!channels) {
  4775. kfree(modes);
  4776. return -ENOMEM;
  4777. }
  4778. rates = kzalloc((sizeof(struct ieee80211_rate) * (IWL_MAX_RATES + 1)),
  4779. GFP_KERNEL);
  4780. if (!rates) {
  4781. kfree(modes);
  4782. kfree(channels);
  4783. return -ENOMEM;
  4784. }
  4785. /* 0 = 802.11a
  4786. * 1 = 802.11b
  4787. * 2 = 802.11g
  4788. */
  4789. /* 5.2GHz channels start after the 2.4GHz channels */
  4790. modes[A].mode = MODE_IEEE80211A;
  4791. modes[A].channels = &channels[ARRAY_SIZE(iwl4965_eeprom_band_1)];
  4792. modes[A].rates = rates;
  4793. modes[A].num_rates = 8; /* just OFDM */
  4794. modes[A].rates = &rates[4];
  4795. modes[A].num_channels = 0;
  4796. modes[B].mode = MODE_IEEE80211B;
  4797. modes[B].channels = channels;
  4798. modes[B].rates = rates;
  4799. modes[B].num_rates = 4; /* just CCK */
  4800. modes[B].num_channels = 0;
  4801. modes[G].mode = MODE_IEEE80211G;
  4802. modes[G].channels = channels;
  4803. modes[G].rates = rates;
  4804. modes[G].num_rates = 12; /* OFDM & CCK */
  4805. modes[G].num_channels = 0;
  4806. modes[G_11N].mode = MODE_IEEE80211G;
  4807. modes[G_11N].channels = channels;
  4808. modes[G_11N].num_rates = 13; /* OFDM & CCK */
  4809. modes[G_11N].rates = rates;
  4810. modes[G_11N].num_channels = 0;
  4811. modes[A_11N].mode = MODE_IEEE80211A;
  4812. modes[A_11N].channels = &channels[ARRAY_SIZE(iwl4965_eeprom_band_1)];
  4813. modes[A_11N].rates = &rates[4];
  4814. modes[A_11N].num_rates = 9; /* just OFDM */
  4815. modes[A_11N].num_channels = 0;
  4816. priv->ieee_channels = channels;
  4817. priv->ieee_rates = rates;
  4818. iwl4965_init_hw_rates(priv, rates);
  4819. for (i = 0, geo_ch = channels; i < priv->channel_count; i++) {
  4820. ch = &priv->channel_info[i];
  4821. if (!is_channel_valid(ch)) {
  4822. IWL_DEBUG_INFO("Channel %d [%sGHz] is restricted -- "
  4823. "skipping.\n",
  4824. ch->channel, is_channel_a_band(ch) ?
  4825. "5.2" : "2.4");
  4826. continue;
  4827. }
  4828. if (is_channel_a_band(ch)) {
  4829. geo_ch = &modes[A].channels[modes[A].num_channels++];
  4830. modes[A_11N].num_channels++;
  4831. } else {
  4832. geo_ch = &modes[B].channels[modes[B].num_channels++];
  4833. modes[G].num_channels++;
  4834. modes[G_11N].num_channels++;
  4835. }
  4836. geo_ch->freq = ieee80211chan2mhz(ch->channel);
  4837. geo_ch->chan = ch->channel;
  4838. geo_ch->power_level = ch->max_power_avg;
  4839. geo_ch->antenna_max = 0xff;
  4840. if (is_channel_valid(ch)) {
  4841. geo_ch->flag = IEEE80211_CHAN_W_SCAN;
  4842. if (ch->flags & EEPROM_CHANNEL_IBSS)
  4843. geo_ch->flag |= IEEE80211_CHAN_W_IBSS;
  4844. if (ch->flags & EEPROM_CHANNEL_ACTIVE)
  4845. geo_ch->flag |= IEEE80211_CHAN_W_ACTIVE_SCAN;
  4846. if (ch->flags & EEPROM_CHANNEL_RADAR)
  4847. geo_ch->flag |= IEEE80211_CHAN_W_RADAR_DETECT;
  4848. if (ch->max_power_avg > priv->max_channel_txpower_limit)
  4849. priv->max_channel_txpower_limit =
  4850. ch->max_power_avg;
  4851. }
  4852. geo_ch->val = geo_ch->flag;
  4853. }
  4854. if ((modes[A].num_channels == 0) && priv->is_abg) {
  4855. printk(KERN_INFO DRV_NAME
  4856. ": Incorrectly detected BG card as ABG. Please send "
  4857. "your PCI ID 0x%04X:0x%04X to maintainer.\n",
  4858. priv->pci_dev->device, priv->pci_dev->subsystem_device);
  4859. priv->is_abg = 0;
  4860. }
  4861. printk(KERN_INFO DRV_NAME
  4862. ": Tunable channels: %d 802.11bg, %d 802.11a channels\n",
  4863. modes[G].num_channels, modes[A].num_channels);
  4864. /*
  4865. * NOTE: We register these in preference of order -- the
  4866. * stack doesn't currently (as of 7.0.6 / Apr 24 '07) pick
  4867. * a phymode based on rates or AP capabilities but seems to
  4868. * configure it purely on if the channel being configured
  4869. * is supported by a mode -- and the first match is taken
  4870. */
  4871. if (modes[G].num_channels)
  4872. ieee80211_register_hwmode(priv->hw, &modes[G]);
  4873. if (modes[B].num_channels)
  4874. ieee80211_register_hwmode(priv->hw, &modes[B]);
  4875. if (modes[A].num_channels)
  4876. ieee80211_register_hwmode(priv->hw, &modes[A]);
  4877. priv->modes = modes;
  4878. set_bit(STATUS_GEO_CONFIGURED, &priv->status);
  4879. return 0;
  4880. }
  4881. /******************************************************************************
  4882. *
  4883. * uCode download functions
  4884. *
  4885. ******************************************************************************/
  4886. static void iwl4965_dealloc_ucode_pci(struct iwl4965_priv *priv)
  4887. {
  4888. if (priv->ucode_code.v_addr != NULL) {
  4889. pci_free_consistent(priv->pci_dev,
  4890. priv->ucode_code.len,
  4891. priv->ucode_code.v_addr,
  4892. priv->ucode_code.p_addr);
  4893. priv->ucode_code.v_addr = NULL;
  4894. }
  4895. if (priv->ucode_data.v_addr != NULL) {
  4896. pci_free_consistent(priv->pci_dev,
  4897. priv->ucode_data.len,
  4898. priv->ucode_data.v_addr,
  4899. priv->ucode_data.p_addr);
  4900. priv->ucode_data.v_addr = NULL;
  4901. }
  4902. if (priv->ucode_data_backup.v_addr != NULL) {
  4903. pci_free_consistent(priv->pci_dev,
  4904. priv->ucode_data_backup.len,
  4905. priv->ucode_data_backup.v_addr,
  4906. priv->ucode_data_backup.p_addr);
  4907. priv->ucode_data_backup.v_addr = NULL;
  4908. }
  4909. if (priv->ucode_init.v_addr != NULL) {
  4910. pci_free_consistent(priv->pci_dev,
  4911. priv->ucode_init.len,
  4912. priv->ucode_init.v_addr,
  4913. priv->ucode_init.p_addr);
  4914. priv->ucode_init.v_addr = NULL;
  4915. }
  4916. if (priv->ucode_init_data.v_addr != NULL) {
  4917. pci_free_consistent(priv->pci_dev,
  4918. priv->ucode_init_data.len,
  4919. priv->ucode_init_data.v_addr,
  4920. priv->ucode_init_data.p_addr);
  4921. priv->ucode_init_data.v_addr = NULL;
  4922. }
  4923. if (priv->ucode_boot.v_addr != NULL) {
  4924. pci_free_consistent(priv->pci_dev,
  4925. priv->ucode_boot.len,
  4926. priv->ucode_boot.v_addr,
  4927. priv->ucode_boot.p_addr);
  4928. priv->ucode_boot.v_addr = NULL;
  4929. }
  4930. }
  4931. /**
  4932. * iwl4965_verify_inst_full - verify runtime uCode image in card vs. host,
  4933. * looking at all data.
  4934. */
  4935. static int iwl4965_verify_inst_full(struct iwl4965_priv *priv, __le32 * image, u32 len)
  4936. {
  4937. u32 val;
  4938. u32 save_len = len;
  4939. int rc = 0;
  4940. u32 errcnt;
  4941. IWL_DEBUG_INFO("ucode inst image size is %u\n", len);
  4942. rc = iwl4965_grab_nic_access(priv);
  4943. if (rc)
  4944. return rc;
  4945. iwl4965_write_direct32(priv, HBUS_TARG_MEM_RADDR, RTC_INST_LOWER_BOUND);
  4946. errcnt = 0;
  4947. for (; len > 0; len -= sizeof(u32), image++) {
  4948. /* read data comes through single port, auto-incr addr */
  4949. /* NOTE: Use the debugless read so we don't flood kernel log
  4950. * if IWL_DL_IO is set */
  4951. val = _iwl4965_read_direct32(priv, HBUS_TARG_MEM_RDAT);
  4952. if (val != le32_to_cpu(*image)) {
  4953. IWL_ERROR("uCode INST section is invalid at "
  4954. "offset 0x%x, is 0x%x, s/b 0x%x\n",
  4955. save_len - len, val, le32_to_cpu(*image));
  4956. rc = -EIO;
  4957. errcnt++;
  4958. if (errcnt >= 20)
  4959. break;
  4960. }
  4961. }
  4962. iwl4965_release_nic_access(priv);
  4963. if (!errcnt)
  4964. IWL_DEBUG_INFO
  4965. ("ucode image in INSTRUCTION memory is good\n");
  4966. return rc;
  4967. }
  4968. /**
  4969. * iwl4965_verify_inst_sparse - verify runtime uCode image in card vs. host,
  4970. * using sample data 100 bytes apart. If these sample points are good,
  4971. * it's a pretty good bet that everything between them is good, too.
  4972. */
  4973. static int iwl4965_verify_inst_sparse(struct iwl4965_priv *priv, __le32 *image, u32 len)
  4974. {
  4975. u32 val;
  4976. int rc = 0;
  4977. u32 errcnt = 0;
  4978. u32 i;
  4979. IWL_DEBUG_INFO("ucode inst image size is %u\n", len);
  4980. rc = iwl4965_grab_nic_access(priv);
  4981. if (rc)
  4982. return rc;
  4983. for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
  4984. /* read data comes through single port, auto-incr addr */
  4985. /* NOTE: Use the debugless read so we don't flood kernel log
  4986. * if IWL_DL_IO is set */
  4987. iwl4965_write_direct32(priv, HBUS_TARG_MEM_RADDR,
  4988. i + RTC_INST_LOWER_BOUND);
  4989. val = _iwl4965_read_direct32(priv, HBUS_TARG_MEM_RDAT);
  4990. if (val != le32_to_cpu(*image)) {
  4991. #if 0 /* Enable this if you want to see details */
  4992. IWL_ERROR("uCode INST section is invalid at "
  4993. "offset 0x%x, is 0x%x, s/b 0x%x\n",
  4994. i, val, *image);
  4995. #endif
  4996. rc = -EIO;
  4997. errcnt++;
  4998. if (errcnt >= 3)
  4999. break;
  5000. }
  5001. }
  5002. iwl4965_release_nic_access(priv);
  5003. return rc;
  5004. }
  5005. /**
  5006. * iwl4965_verify_ucode - determine which instruction image is in SRAM,
  5007. * and verify its contents
  5008. */
  5009. static int iwl4965_verify_ucode(struct iwl4965_priv *priv)
  5010. {
  5011. __le32 *image;
  5012. u32 len;
  5013. int rc = 0;
  5014. /* Try bootstrap */
  5015. image = (__le32 *)priv->ucode_boot.v_addr;
  5016. len = priv->ucode_boot.len;
  5017. rc = iwl4965_verify_inst_sparse(priv, image, len);
  5018. if (rc == 0) {
  5019. IWL_DEBUG_INFO("Bootstrap uCode is good in inst SRAM\n");
  5020. return 0;
  5021. }
  5022. /* Try initialize */
  5023. image = (__le32 *)priv->ucode_init.v_addr;
  5024. len = priv->ucode_init.len;
  5025. rc = iwl4965_verify_inst_sparse(priv, image, len);
  5026. if (rc == 0) {
  5027. IWL_DEBUG_INFO("Initialize uCode is good in inst SRAM\n");
  5028. return 0;
  5029. }
  5030. /* Try runtime/protocol */
  5031. image = (__le32 *)priv->ucode_code.v_addr;
  5032. len = priv->ucode_code.len;
  5033. rc = iwl4965_verify_inst_sparse(priv, image, len);
  5034. if (rc == 0) {
  5035. IWL_DEBUG_INFO("Runtime uCode is good in inst SRAM\n");
  5036. return 0;
  5037. }
  5038. IWL_ERROR("NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
  5039. /* Show first several data entries in instruction SRAM.
  5040. * Selection of bootstrap image is arbitrary. */
  5041. image = (__le32 *)priv->ucode_boot.v_addr;
  5042. len = priv->ucode_boot.len;
  5043. rc = iwl4965_verify_inst_full(priv, image, len);
  5044. return rc;
  5045. }
  5046. /* check contents of special bootstrap uCode SRAM */
  5047. static int iwl4965_verify_bsm(struct iwl4965_priv *priv)
  5048. {
  5049. __le32 *image = priv->ucode_boot.v_addr;
  5050. u32 len = priv->ucode_boot.len;
  5051. u32 reg;
  5052. u32 val;
  5053. IWL_DEBUG_INFO("Begin verify bsm\n");
  5054. /* verify BSM SRAM contents */
  5055. val = iwl4965_read_prph(priv, BSM_WR_DWCOUNT_REG);
  5056. for (reg = BSM_SRAM_LOWER_BOUND;
  5057. reg < BSM_SRAM_LOWER_BOUND + len;
  5058. reg += sizeof(u32), image ++) {
  5059. val = iwl4965_read_prph(priv, reg);
  5060. if (val != le32_to_cpu(*image)) {
  5061. IWL_ERROR("BSM uCode verification failed at "
  5062. "addr 0x%08X+%u (of %u), is 0x%x, s/b 0x%x\n",
  5063. BSM_SRAM_LOWER_BOUND,
  5064. reg - BSM_SRAM_LOWER_BOUND, len,
  5065. val, le32_to_cpu(*image));
  5066. return -EIO;
  5067. }
  5068. }
  5069. IWL_DEBUG_INFO("BSM bootstrap uCode image OK\n");
  5070. return 0;
  5071. }
  5072. /**
  5073. * iwl4965_load_bsm - Load bootstrap instructions
  5074. *
  5075. * BSM operation:
  5076. *
  5077. * The Bootstrap State Machine (BSM) stores a short bootstrap uCode program
  5078. * in special SRAM that does not power down during RFKILL. When powering back
  5079. * up after power-saving sleeps (or during initial uCode load), the BSM loads
  5080. * the bootstrap program into the on-board processor, and starts it.
  5081. *
  5082. * The bootstrap program loads (via DMA) instructions and data for a new
  5083. * program from host DRAM locations indicated by the host driver in the
  5084. * BSM_DRAM_* registers. Once the new program is loaded, it starts
  5085. * automatically.
  5086. *
  5087. * When initializing the NIC, the host driver points the BSM to the
  5088. * "initialize" uCode image. This uCode sets up some internal data, then
  5089. * notifies host via "initialize alive" that it is complete.
  5090. *
  5091. * The host then replaces the BSM_DRAM_* pointer values to point to the
  5092. * normal runtime uCode instructions and a backup uCode data cache buffer
  5093. * (filled initially with starting data values for the on-board processor),
  5094. * then triggers the "initialize" uCode to load and launch the runtime uCode,
  5095. * which begins normal operation.
  5096. *
  5097. * When doing a power-save shutdown, runtime uCode saves data SRAM into
  5098. * the backup data cache in DRAM before SRAM is powered down.
  5099. *
  5100. * When powering back up, the BSM loads the bootstrap program. This reloads
  5101. * the runtime uCode instructions and the backup data cache into SRAM,
  5102. * and re-launches the runtime uCode from where it left off.
  5103. */
  5104. static int iwl4965_load_bsm(struct iwl4965_priv *priv)
  5105. {
  5106. __le32 *image = priv->ucode_boot.v_addr;
  5107. u32 len = priv->ucode_boot.len;
  5108. dma_addr_t pinst;
  5109. dma_addr_t pdata;
  5110. u32 inst_len;
  5111. u32 data_len;
  5112. int rc;
  5113. int i;
  5114. u32 done;
  5115. u32 reg_offset;
  5116. IWL_DEBUG_INFO("Begin load bsm\n");
  5117. /* make sure bootstrap program is no larger than BSM's SRAM size */
  5118. if (len > IWL_MAX_BSM_SIZE)
  5119. return -EINVAL;
  5120. /* Tell bootstrap uCode where to find the "Initialize" uCode
  5121. * in host DRAM ... bits 31:0 for 3945, bits 35:4 for 4965.
  5122. * NOTE: iwl4965_initialize_alive_start() will replace these values,
  5123. * after the "initialize" uCode has run, to point to
  5124. * runtime/protocol instructions and backup data cache. */
  5125. pinst = priv->ucode_init.p_addr >> 4;
  5126. pdata = priv->ucode_init_data.p_addr >> 4;
  5127. inst_len = priv->ucode_init.len;
  5128. data_len = priv->ucode_init_data.len;
  5129. rc = iwl4965_grab_nic_access(priv);
  5130. if (rc)
  5131. return rc;
  5132. iwl4965_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
  5133. iwl4965_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
  5134. iwl4965_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG, inst_len);
  5135. iwl4965_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG, data_len);
  5136. /* Fill BSM memory with bootstrap instructions */
  5137. for (reg_offset = BSM_SRAM_LOWER_BOUND;
  5138. reg_offset < BSM_SRAM_LOWER_BOUND + len;
  5139. reg_offset += sizeof(u32), image++)
  5140. _iwl4965_write_prph(priv, reg_offset,
  5141. le32_to_cpu(*image));
  5142. rc = iwl4965_verify_bsm(priv);
  5143. if (rc) {
  5144. iwl4965_release_nic_access(priv);
  5145. return rc;
  5146. }
  5147. /* Tell BSM to copy from BSM SRAM into instruction SRAM, when asked */
  5148. iwl4965_write_prph(priv, BSM_WR_MEM_SRC_REG, 0x0);
  5149. iwl4965_write_prph(priv, BSM_WR_MEM_DST_REG,
  5150. RTC_INST_LOWER_BOUND);
  5151. iwl4965_write_prph(priv, BSM_WR_DWCOUNT_REG, len / sizeof(u32));
  5152. /* Load bootstrap code into instruction SRAM now,
  5153. * to prepare to load "initialize" uCode */
  5154. iwl4965_write_prph(priv, BSM_WR_CTRL_REG,
  5155. BSM_WR_CTRL_REG_BIT_START);
  5156. /* Wait for load of bootstrap uCode to finish */
  5157. for (i = 0; i < 100; i++) {
  5158. done = iwl4965_read_prph(priv, BSM_WR_CTRL_REG);
  5159. if (!(done & BSM_WR_CTRL_REG_BIT_START))
  5160. break;
  5161. udelay(10);
  5162. }
  5163. if (i < 100)
  5164. IWL_DEBUG_INFO("BSM write complete, poll %d iterations\n", i);
  5165. else {
  5166. IWL_ERROR("BSM write did not complete!\n");
  5167. return -EIO;
  5168. }
  5169. /* Enable future boot loads whenever power management unit triggers it
  5170. * (e.g. when powering back up after power-save shutdown) */
  5171. iwl4965_write_prph(priv, BSM_WR_CTRL_REG,
  5172. BSM_WR_CTRL_REG_BIT_START_EN);
  5173. iwl4965_release_nic_access(priv);
  5174. return 0;
  5175. }
  5176. static void iwl4965_nic_start(struct iwl4965_priv *priv)
  5177. {
  5178. /* Remove all resets to allow NIC to operate */
  5179. iwl4965_write32(priv, CSR_RESET, 0);
  5180. }
  5181. /**
  5182. * iwl4965_read_ucode - Read uCode images from disk file.
  5183. *
  5184. * Copy into buffers for card to fetch via bus-mastering
  5185. */
  5186. static int iwl4965_read_ucode(struct iwl4965_priv *priv)
  5187. {
  5188. struct iwl4965_ucode *ucode;
  5189. int rc = 0;
  5190. const struct firmware *ucode_raw;
  5191. const char *name = "iwlwifi-4965" IWL4965_UCODE_API ".ucode";
  5192. u8 *src;
  5193. size_t len;
  5194. u32 ver, inst_size, data_size, init_size, init_data_size, boot_size;
  5195. /* Ask kernel firmware_class module to get the boot firmware off disk.
  5196. * request_firmware() is synchronous, file is in memory on return. */
  5197. rc = request_firmware(&ucode_raw, name, &priv->pci_dev->dev);
  5198. if (rc < 0) {
  5199. IWL_ERROR("%s firmware file req failed: Reason %d\n", name, rc);
  5200. goto error;
  5201. }
  5202. IWL_DEBUG_INFO("Got firmware '%s' file (%zd bytes) from disk\n",
  5203. name, ucode_raw->size);
  5204. /* Make sure that we got at least our header! */
  5205. if (ucode_raw->size < sizeof(*ucode)) {
  5206. IWL_ERROR("File size way too small!\n");
  5207. rc = -EINVAL;
  5208. goto err_release;
  5209. }
  5210. /* Data from ucode file: header followed by uCode images */
  5211. ucode = (void *)ucode_raw->data;
  5212. ver = le32_to_cpu(ucode->ver);
  5213. inst_size = le32_to_cpu(ucode->inst_size);
  5214. data_size = le32_to_cpu(ucode->data_size);
  5215. init_size = le32_to_cpu(ucode->init_size);
  5216. init_data_size = le32_to_cpu(ucode->init_data_size);
  5217. boot_size = le32_to_cpu(ucode->boot_size);
  5218. IWL_DEBUG_INFO("f/w package hdr ucode version = 0x%x\n", ver);
  5219. IWL_DEBUG_INFO("f/w package hdr runtime inst size = %u\n",
  5220. inst_size);
  5221. IWL_DEBUG_INFO("f/w package hdr runtime data size = %u\n",
  5222. data_size);
  5223. IWL_DEBUG_INFO("f/w package hdr init inst size = %u\n",
  5224. init_size);
  5225. IWL_DEBUG_INFO("f/w package hdr init data size = %u\n",
  5226. init_data_size);
  5227. IWL_DEBUG_INFO("f/w package hdr boot inst size = %u\n",
  5228. boot_size);
  5229. /* Verify size of file vs. image size info in file's header */
  5230. if (ucode_raw->size < sizeof(*ucode) +
  5231. inst_size + data_size + init_size +
  5232. init_data_size + boot_size) {
  5233. IWL_DEBUG_INFO("uCode file size %d too small\n",
  5234. (int)ucode_raw->size);
  5235. rc = -EINVAL;
  5236. goto err_release;
  5237. }
  5238. /* Verify that uCode images will fit in card's SRAM */
  5239. if (inst_size > IWL_MAX_INST_SIZE) {
  5240. IWL_DEBUG_INFO("uCode instr len %d too large to fit in card\n",
  5241. (int)inst_size);
  5242. rc = -EINVAL;
  5243. goto err_release;
  5244. }
  5245. if (data_size > IWL_MAX_DATA_SIZE) {
  5246. IWL_DEBUG_INFO("uCode data len %d too large to fit in card\n",
  5247. (int)data_size);
  5248. rc = -EINVAL;
  5249. goto err_release;
  5250. }
  5251. if (init_size > IWL_MAX_INST_SIZE) {
  5252. IWL_DEBUG_INFO
  5253. ("uCode init instr len %d too large to fit in card\n",
  5254. (int)init_size);
  5255. rc = -EINVAL;
  5256. goto err_release;
  5257. }
  5258. if (init_data_size > IWL_MAX_DATA_SIZE) {
  5259. IWL_DEBUG_INFO
  5260. ("uCode init data len %d too large to fit in card\n",
  5261. (int)init_data_size);
  5262. rc = -EINVAL;
  5263. goto err_release;
  5264. }
  5265. if (boot_size > IWL_MAX_BSM_SIZE) {
  5266. IWL_DEBUG_INFO
  5267. ("uCode boot instr len %d too large to fit in bsm\n",
  5268. (int)boot_size);
  5269. rc = -EINVAL;
  5270. goto err_release;
  5271. }
  5272. /* Allocate ucode buffers for card's bus-master loading ... */
  5273. /* Runtime instructions and 2 copies of data:
  5274. * 1) unmodified from disk
  5275. * 2) backup cache for save/restore during power-downs */
  5276. priv->ucode_code.len = inst_size;
  5277. priv->ucode_code.v_addr =
  5278. pci_alloc_consistent(priv->pci_dev,
  5279. priv->ucode_code.len,
  5280. &(priv->ucode_code.p_addr));
  5281. priv->ucode_data.len = data_size;
  5282. priv->ucode_data.v_addr =
  5283. pci_alloc_consistent(priv->pci_dev,
  5284. priv->ucode_data.len,
  5285. &(priv->ucode_data.p_addr));
  5286. priv->ucode_data_backup.len = data_size;
  5287. priv->ucode_data_backup.v_addr =
  5288. pci_alloc_consistent(priv->pci_dev,
  5289. priv->ucode_data_backup.len,
  5290. &(priv->ucode_data_backup.p_addr));
  5291. /* Initialization instructions and data */
  5292. priv->ucode_init.len = init_size;
  5293. priv->ucode_init.v_addr =
  5294. pci_alloc_consistent(priv->pci_dev,
  5295. priv->ucode_init.len,
  5296. &(priv->ucode_init.p_addr));
  5297. priv->ucode_init_data.len = init_data_size;
  5298. priv->ucode_init_data.v_addr =
  5299. pci_alloc_consistent(priv->pci_dev,
  5300. priv->ucode_init_data.len,
  5301. &(priv->ucode_init_data.p_addr));
  5302. /* Bootstrap (instructions only, no data) */
  5303. priv->ucode_boot.len = boot_size;
  5304. priv->ucode_boot.v_addr =
  5305. pci_alloc_consistent(priv->pci_dev,
  5306. priv->ucode_boot.len,
  5307. &(priv->ucode_boot.p_addr));
  5308. if (!priv->ucode_code.v_addr || !priv->ucode_data.v_addr ||
  5309. !priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr ||
  5310. !priv->ucode_boot.v_addr || !priv->ucode_data_backup.v_addr)
  5311. goto err_pci_alloc;
  5312. /* Copy images into buffers for card's bus-master reads ... */
  5313. /* Runtime instructions (first block of data in file) */
  5314. src = &ucode->data[0];
  5315. len = priv->ucode_code.len;
  5316. IWL_DEBUG_INFO("Copying (but not loading) uCode instr len %d\n",
  5317. (int)len);
  5318. memcpy(priv->ucode_code.v_addr, src, len);
  5319. IWL_DEBUG_INFO("uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
  5320. priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
  5321. /* Runtime data (2nd block)
  5322. * NOTE: Copy into backup buffer will be done in iwl4965_up() */
  5323. src = &ucode->data[inst_size];
  5324. len = priv->ucode_data.len;
  5325. IWL_DEBUG_INFO("Copying (but not loading) uCode data len %d\n",
  5326. (int)len);
  5327. memcpy(priv->ucode_data.v_addr, src, len);
  5328. memcpy(priv->ucode_data_backup.v_addr, src, len);
  5329. /* Initialization instructions (3rd block) */
  5330. if (init_size) {
  5331. src = &ucode->data[inst_size + data_size];
  5332. len = priv->ucode_init.len;
  5333. IWL_DEBUG_INFO("Copying (but not loading) init instr len %d\n",
  5334. (int)len);
  5335. memcpy(priv->ucode_init.v_addr, src, len);
  5336. }
  5337. /* Initialization data (4th block) */
  5338. if (init_data_size) {
  5339. src = &ucode->data[inst_size + data_size + init_size];
  5340. len = priv->ucode_init_data.len;
  5341. IWL_DEBUG_INFO("Copying (but not loading) init data len %d\n",
  5342. (int)len);
  5343. memcpy(priv->ucode_init_data.v_addr, src, len);
  5344. }
  5345. /* Bootstrap instructions (5th block) */
  5346. src = &ucode->data[inst_size + data_size + init_size + init_data_size];
  5347. len = priv->ucode_boot.len;
  5348. IWL_DEBUG_INFO("Copying (but not loading) boot instr len %d\n",
  5349. (int)len);
  5350. memcpy(priv->ucode_boot.v_addr, src, len);
  5351. /* We have our copies now, allow OS release its copies */
  5352. release_firmware(ucode_raw);
  5353. return 0;
  5354. err_pci_alloc:
  5355. IWL_ERROR("failed to allocate pci memory\n");
  5356. rc = -ENOMEM;
  5357. iwl4965_dealloc_ucode_pci(priv);
  5358. err_release:
  5359. release_firmware(ucode_raw);
  5360. error:
  5361. return rc;
  5362. }
  5363. /**
  5364. * iwl4965_set_ucode_ptrs - Set uCode address location
  5365. *
  5366. * Tell initialization uCode where to find runtime uCode.
  5367. *
  5368. * BSM registers initially contain pointers to initialization uCode.
  5369. * We need to replace them to load runtime uCode inst and data,
  5370. * and to save runtime data when powering down.
  5371. */
  5372. static int iwl4965_set_ucode_ptrs(struct iwl4965_priv *priv)
  5373. {
  5374. dma_addr_t pinst;
  5375. dma_addr_t pdata;
  5376. int rc = 0;
  5377. unsigned long flags;
  5378. /* bits 35:4 for 4965 */
  5379. pinst = priv->ucode_code.p_addr >> 4;
  5380. pdata = priv->ucode_data_backup.p_addr >> 4;
  5381. spin_lock_irqsave(&priv->lock, flags);
  5382. rc = iwl4965_grab_nic_access(priv);
  5383. if (rc) {
  5384. spin_unlock_irqrestore(&priv->lock, flags);
  5385. return rc;
  5386. }
  5387. /* Tell bootstrap uCode where to find image to load */
  5388. iwl4965_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
  5389. iwl4965_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
  5390. iwl4965_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG,
  5391. priv->ucode_data.len);
  5392. /* Inst bytecount must be last to set up, bit 31 signals uCode
  5393. * that all new ptr/size info is in place */
  5394. iwl4965_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG,
  5395. priv->ucode_code.len | BSM_DRAM_INST_LOAD);
  5396. iwl4965_release_nic_access(priv);
  5397. spin_unlock_irqrestore(&priv->lock, flags);
  5398. IWL_DEBUG_INFO("Runtime uCode pointers are set.\n");
  5399. return rc;
  5400. }
  5401. /**
  5402. * iwl4965_init_alive_start - Called after REPLY_ALIVE notification received
  5403. *
  5404. * Called after REPLY_ALIVE notification received from "initialize" uCode.
  5405. *
  5406. * The 4965 "initialize" ALIVE reply contains calibration data for:
  5407. * Voltage, temperature, and MIMO tx gain correction, now stored in priv
  5408. * (3945 does not contain this data).
  5409. *
  5410. * Tell "initialize" uCode to go ahead and load the runtime uCode.
  5411. */
  5412. static void iwl4965_init_alive_start(struct iwl4965_priv *priv)
  5413. {
  5414. /* Check alive response for "valid" sign from uCode */
  5415. if (priv->card_alive_init.is_valid != UCODE_VALID_OK) {
  5416. /* We had an error bringing up the hardware, so take it
  5417. * all the way back down so we can try again */
  5418. IWL_DEBUG_INFO("Initialize Alive failed.\n");
  5419. goto restart;
  5420. }
  5421. /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
  5422. * This is a paranoid check, because we would not have gotten the
  5423. * "initialize" alive if code weren't properly loaded. */
  5424. if (iwl4965_verify_ucode(priv)) {
  5425. /* Runtime instruction load was bad;
  5426. * take it all the way back down so we can try again */
  5427. IWL_DEBUG_INFO("Bad \"initialize\" uCode load.\n");
  5428. goto restart;
  5429. }
  5430. /* Calculate temperature */
  5431. priv->temperature = iwl4965_get_temperature(priv);
  5432. /* Send pointers to protocol/runtime uCode image ... init code will
  5433. * load and launch runtime uCode, which will send us another "Alive"
  5434. * notification. */
  5435. IWL_DEBUG_INFO("Initialization Alive received.\n");
  5436. if (iwl4965_set_ucode_ptrs(priv)) {
  5437. /* Runtime instruction load won't happen;
  5438. * take it all the way back down so we can try again */
  5439. IWL_DEBUG_INFO("Couldn't set up uCode pointers.\n");
  5440. goto restart;
  5441. }
  5442. return;
  5443. restart:
  5444. queue_work(priv->workqueue, &priv->restart);
  5445. }
  5446. /**
  5447. * iwl4965_alive_start - called after REPLY_ALIVE notification received
  5448. * from protocol/runtime uCode (initialization uCode's
  5449. * Alive gets handled by iwl4965_init_alive_start()).
  5450. */
  5451. static void iwl4965_alive_start(struct iwl4965_priv *priv)
  5452. {
  5453. int rc = 0;
  5454. IWL_DEBUG_INFO("Runtime Alive received.\n");
  5455. if (priv->card_alive.is_valid != UCODE_VALID_OK) {
  5456. /* We had an error bringing up the hardware, so take it
  5457. * all the way back down so we can try again */
  5458. IWL_DEBUG_INFO("Alive failed.\n");
  5459. goto restart;
  5460. }
  5461. /* Initialize uCode has loaded Runtime uCode ... verify inst image.
  5462. * This is a paranoid check, because we would not have gotten the
  5463. * "runtime" alive if code weren't properly loaded. */
  5464. if (iwl4965_verify_ucode(priv)) {
  5465. /* Runtime instruction load was bad;
  5466. * take it all the way back down so we can try again */
  5467. IWL_DEBUG_INFO("Bad runtime uCode load.\n");
  5468. goto restart;
  5469. }
  5470. iwl4965_clear_stations_table(priv);
  5471. rc = iwl4965_alive_notify(priv);
  5472. if (rc) {
  5473. IWL_WARNING("Could not complete ALIVE transition [ntf]: %d\n",
  5474. rc);
  5475. goto restart;
  5476. }
  5477. /* After the ALIVE response, we can process host commands */
  5478. set_bit(STATUS_ALIVE, &priv->status);
  5479. /* Clear out the uCode error bit if it is set */
  5480. clear_bit(STATUS_FW_ERROR, &priv->status);
  5481. rc = iwl4965_init_channel_map(priv);
  5482. if (rc) {
  5483. IWL_ERROR("initializing regulatory failed: %d\n", rc);
  5484. return;
  5485. }
  5486. iwl4965_init_geos(priv);
  5487. if (iwl4965_is_rfkill(priv))
  5488. return;
  5489. if (!priv->mac80211_registered) {
  5490. /* Unlock so any user space entry points can call back into
  5491. * the driver without a deadlock... */
  5492. mutex_unlock(&priv->mutex);
  5493. iwl4965_rate_control_register(priv->hw);
  5494. rc = ieee80211_register_hw(priv->hw);
  5495. priv->hw->conf.beacon_int = 100;
  5496. mutex_lock(&priv->mutex);
  5497. if (rc) {
  5498. iwl4965_rate_control_unregister(priv->hw);
  5499. IWL_ERROR("Failed to register network "
  5500. "device (error %d)\n", rc);
  5501. return;
  5502. }
  5503. priv->mac80211_registered = 1;
  5504. iwl4965_reset_channel_flag(priv);
  5505. } else
  5506. ieee80211_start_queues(priv->hw);
  5507. priv->active_rate = priv->rates_mask;
  5508. priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
  5509. iwl4965_send_power_mode(priv, IWL_POWER_LEVEL(priv->power_mode));
  5510. if (iwl4965_is_associated(priv)) {
  5511. struct iwl4965_rxon_cmd *active_rxon =
  5512. (struct iwl4965_rxon_cmd *)(&priv->active_rxon);
  5513. memcpy(&priv->staging_rxon, &priv->active_rxon,
  5514. sizeof(priv->staging_rxon));
  5515. active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  5516. } else {
  5517. /* Initialize our rx_config data */
  5518. iwl4965_connection_init_rx_config(priv);
  5519. memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
  5520. }
  5521. /* Configure BT coexistence */
  5522. iwl4965_send_bt_config(priv);
  5523. /* Configure the adapter for unassociated operation */
  5524. iwl4965_commit_rxon(priv);
  5525. /* At this point, the NIC is initialized and operational */
  5526. priv->notif_missed_beacons = 0;
  5527. set_bit(STATUS_READY, &priv->status);
  5528. iwl4965_rf_kill_ct_config(priv);
  5529. IWL_DEBUG_INFO("ALIVE processing complete.\n");
  5530. if (priv->error_recovering)
  5531. iwl4965_error_recovery(priv);
  5532. return;
  5533. restart:
  5534. queue_work(priv->workqueue, &priv->restart);
  5535. }
  5536. static void iwl4965_cancel_deferred_work(struct iwl4965_priv *priv);
  5537. static void __iwl4965_down(struct iwl4965_priv *priv)
  5538. {
  5539. unsigned long flags;
  5540. int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
  5541. struct ieee80211_conf *conf = NULL;
  5542. IWL_DEBUG_INFO(DRV_NAME " is going down\n");
  5543. conf = ieee80211_get_hw_conf(priv->hw);
  5544. if (!exit_pending)
  5545. set_bit(STATUS_EXIT_PENDING, &priv->status);
  5546. iwl4965_clear_stations_table(priv);
  5547. /* Unblock any waiting calls */
  5548. wake_up_interruptible_all(&priv->wait_command_queue);
  5549. /* Wipe out the EXIT_PENDING status bit if we are not actually
  5550. * exiting the module */
  5551. if (!exit_pending)
  5552. clear_bit(STATUS_EXIT_PENDING, &priv->status);
  5553. /* stop and reset the on-board processor */
  5554. iwl4965_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
  5555. /* tell the device to stop sending interrupts */
  5556. iwl4965_disable_interrupts(priv);
  5557. if (priv->mac80211_registered)
  5558. ieee80211_stop_queues(priv->hw);
  5559. /* If we have not previously called iwl4965_init() then
  5560. * clear all bits but the RF Kill and SUSPEND bits and return */
  5561. if (!iwl4965_is_init(priv)) {
  5562. priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
  5563. STATUS_RF_KILL_HW |
  5564. test_bit(STATUS_RF_KILL_SW, &priv->status) <<
  5565. STATUS_RF_KILL_SW |
  5566. test_bit(STATUS_IN_SUSPEND, &priv->status) <<
  5567. STATUS_IN_SUSPEND;
  5568. goto exit;
  5569. }
  5570. /* ...otherwise clear out all the status bits but the RF Kill and
  5571. * SUSPEND bits and continue taking the NIC down. */
  5572. priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
  5573. STATUS_RF_KILL_HW |
  5574. test_bit(STATUS_RF_KILL_SW, &priv->status) <<
  5575. STATUS_RF_KILL_SW |
  5576. test_bit(STATUS_IN_SUSPEND, &priv->status) <<
  5577. STATUS_IN_SUSPEND |
  5578. test_bit(STATUS_FW_ERROR, &priv->status) <<
  5579. STATUS_FW_ERROR;
  5580. spin_lock_irqsave(&priv->lock, flags);
  5581. iwl4965_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
  5582. spin_unlock_irqrestore(&priv->lock, flags);
  5583. iwl4965_hw_txq_ctx_stop(priv);
  5584. iwl4965_hw_rxq_stop(priv);
  5585. spin_lock_irqsave(&priv->lock, flags);
  5586. if (!iwl4965_grab_nic_access(priv)) {
  5587. iwl4965_write_prph(priv, APMG_CLK_DIS_REG,
  5588. APMG_CLK_VAL_DMA_CLK_RQT);
  5589. iwl4965_release_nic_access(priv);
  5590. }
  5591. spin_unlock_irqrestore(&priv->lock, flags);
  5592. udelay(5);
  5593. iwl4965_hw_nic_stop_master(priv);
  5594. iwl4965_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
  5595. iwl4965_hw_nic_reset(priv);
  5596. exit:
  5597. memset(&priv->card_alive, 0, sizeof(struct iwl4965_alive_resp));
  5598. if (priv->ibss_beacon)
  5599. dev_kfree_skb(priv->ibss_beacon);
  5600. priv->ibss_beacon = NULL;
  5601. /* clear out any free frames */
  5602. iwl4965_clear_free_frames(priv);
  5603. }
  5604. static void iwl4965_down(struct iwl4965_priv *priv)
  5605. {
  5606. mutex_lock(&priv->mutex);
  5607. __iwl4965_down(priv);
  5608. mutex_unlock(&priv->mutex);
  5609. iwl4965_cancel_deferred_work(priv);
  5610. }
  5611. #define MAX_HW_RESTARTS 5
  5612. static int __iwl4965_up(struct iwl4965_priv *priv)
  5613. {
  5614. DECLARE_MAC_BUF(mac);
  5615. int rc, i;
  5616. u32 hw_rf_kill = 0;
  5617. if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  5618. IWL_WARNING("Exit pending; will not bring the NIC up\n");
  5619. return -EIO;
  5620. }
  5621. if (test_bit(STATUS_RF_KILL_SW, &priv->status)) {
  5622. IWL_WARNING("Radio disabled by SW RF kill (module "
  5623. "parameter)\n");
  5624. return 0;
  5625. }
  5626. if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
  5627. IWL_ERROR("ucode not available for device bringup\n");
  5628. return -EIO;
  5629. }
  5630. iwl4965_write32(priv, CSR_INT, 0xFFFFFFFF);
  5631. rc = iwl4965_hw_nic_init(priv);
  5632. if (rc) {
  5633. IWL_ERROR("Unable to int nic\n");
  5634. return rc;
  5635. }
  5636. /* make sure rfkill handshake bits are cleared */
  5637. iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  5638. iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR,
  5639. CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  5640. /* clear (again), then enable host interrupts */
  5641. iwl4965_write32(priv, CSR_INT, 0xFFFFFFFF);
  5642. iwl4965_enable_interrupts(priv);
  5643. /* really make sure rfkill handshake bits are cleared */
  5644. iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  5645. iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  5646. /* Copy original ucode data image from disk into backup cache.
  5647. * This will be used to initialize the on-board processor's
  5648. * data SRAM for a clean start when the runtime program first loads. */
  5649. memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
  5650. priv->ucode_data.len);
  5651. /* If platform's RF_KILL switch is set to KILL,
  5652. * wait for BIT_INT_RF_KILL interrupt before loading uCode
  5653. * and getting things started */
  5654. if (!(iwl4965_read32(priv, CSR_GP_CNTRL) &
  5655. CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
  5656. hw_rf_kill = 1;
  5657. if (test_bit(STATUS_RF_KILL_HW, &priv->status) || hw_rf_kill) {
  5658. IWL_WARNING("Radio disabled by HW RF Kill switch\n");
  5659. return 0;
  5660. }
  5661. for (i = 0; i < MAX_HW_RESTARTS; i++) {
  5662. iwl4965_clear_stations_table(priv);
  5663. /* load bootstrap state machine,
  5664. * load bootstrap program into processor's memory,
  5665. * prepare to load the "initialize" uCode */
  5666. rc = iwl4965_load_bsm(priv);
  5667. if (rc) {
  5668. IWL_ERROR("Unable to set up bootstrap uCode: %d\n", rc);
  5669. continue;
  5670. }
  5671. /* start card; "initialize" will load runtime ucode */
  5672. iwl4965_nic_start(priv);
  5673. /* MAC Address location in EEPROM same for 3945/4965 */
  5674. get_eeprom_mac(priv, priv->mac_addr);
  5675. IWL_DEBUG_INFO("MAC address: %s\n",
  5676. print_mac(mac, priv->mac_addr));
  5677. SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr);
  5678. IWL_DEBUG_INFO(DRV_NAME " is coming up\n");
  5679. return 0;
  5680. }
  5681. set_bit(STATUS_EXIT_PENDING, &priv->status);
  5682. __iwl4965_down(priv);
  5683. /* tried to restart and config the device for as long as our
  5684. * patience could withstand */
  5685. IWL_ERROR("Unable to initialize device after %d attempts.\n", i);
  5686. return -EIO;
  5687. }
  5688. /*****************************************************************************
  5689. *
  5690. * Workqueue callbacks
  5691. *
  5692. *****************************************************************************/
  5693. static void iwl4965_bg_init_alive_start(struct work_struct *data)
  5694. {
  5695. struct iwl4965_priv *priv =
  5696. container_of(data, struct iwl4965_priv, init_alive_start.work);
  5697. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5698. return;
  5699. mutex_lock(&priv->mutex);
  5700. iwl4965_init_alive_start(priv);
  5701. mutex_unlock(&priv->mutex);
  5702. }
  5703. static void iwl4965_bg_alive_start(struct work_struct *data)
  5704. {
  5705. struct iwl4965_priv *priv =
  5706. container_of(data, struct iwl4965_priv, alive_start.work);
  5707. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5708. return;
  5709. mutex_lock(&priv->mutex);
  5710. iwl4965_alive_start(priv);
  5711. mutex_unlock(&priv->mutex);
  5712. }
  5713. static void iwl4965_bg_rf_kill(struct work_struct *work)
  5714. {
  5715. struct iwl4965_priv *priv = container_of(work, struct iwl4965_priv, rf_kill);
  5716. wake_up_interruptible(&priv->wait_command_queue);
  5717. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5718. return;
  5719. mutex_lock(&priv->mutex);
  5720. if (!iwl4965_is_rfkill(priv)) {
  5721. IWL_DEBUG(IWL_DL_INFO | IWL_DL_RF_KILL,
  5722. "HW and/or SW RF Kill no longer active, restarting "
  5723. "device\n");
  5724. if (!test_bit(STATUS_EXIT_PENDING, &priv->status))
  5725. queue_work(priv->workqueue, &priv->restart);
  5726. } else {
  5727. if (!test_bit(STATUS_RF_KILL_HW, &priv->status))
  5728. IWL_DEBUG_RF_KILL("Can not turn radio back on - "
  5729. "disabled by SW switch\n");
  5730. else
  5731. IWL_WARNING("Radio Frequency Kill Switch is On:\n"
  5732. "Kill switch must be turned off for "
  5733. "wireless networking to work.\n");
  5734. }
  5735. mutex_unlock(&priv->mutex);
  5736. }
  5737. #define IWL_SCAN_CHECK_WATCHDOG (7 * HZ)
  5738. static void iwl4965_bg_scan_check(struct work_struct *data)
  5739. {
  5740. struct iwl4965_priv *priv =
  5741. container_of(data, struct iwl4965_priv, scan_check.work);
  5742. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5743. return;
  5744. mutex_lock(&priv->mutex);
  5745. if (test_bit(STATUS_SCANNING, &priv->status) ||
  5746. test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  5747. IWL_DEBUG(IWL_DL_INFO | IWL_DL_SCAN,
  5748. "Scan completion watchdog resetting adapter (%dms)\n",
  5749. jiffies_to_msecs(IWL_SCAN_CHECK_WATCHDOG));
  5750. if (!test_bit(STATUS_EXIT_PENDING, &priv->status))
  5751. iwl4965_send_scan_abort(priv);
  5752. }
  5753. mutex_unlock(&priv->mutex);
  5754. }
  5755. static void iwl4965_bg_request_scan(struct work_struct *data)
  5756. {
  5757. struct iwl4965_priv *priv =
  5758. container_of(data, struct iwl4965_priv, request_scan);
  5759. struct iwl4965_host_cmd cmd = {
  5760. .id = REPLY_SCAN_CMD,
  5761. .len = sizeof(struct iwl4965_scan_cmd),
  5762. .meta.flags = CMD_SIZE_HUGE,
  5763. };
  5764. int rc = 0;
  5765. struct iwl4965_scan_cmd *scan;
  5766. struct ieee80211_conf *conf = NULL;
  5767. u8 direct_mask;
  5768. int phymode;
  5769. conf = ieee80211_get_hw_conf(priv->hw);
  5770. mutex_lock(&priv->mutex);
  5771. if (!iwl4965_is_ready(priv)) {
  5772. IWL_WARNING("request scan called when driver not ready.\n");
  5773. goto done;
  5774. }
  5775. /* Make sure the scan wasn't cancelled before this queued work
  5776. * was given the chance to run... */
  5777. if (!test_bit(STATUS_SCANNING, &priv->status))
  5778. goto done;
  5779. /* This should never be called or scheduled if there is currently
  5780. * a scan active in the hardware. */
  5781. if (test_bit(STATUS_SCAN_HW, &priv->status)) {
  5782. IWL_DEBUG_INFO("Multiple concurrent scan requests in parallel. "
  5783. "Ignoring second request.\n");
  5784. rc = -EIO;
  5785. goto done;
  5786. }
  5787. if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  5788. IWL_DEBUG_SCAN("Aborting scan due to device shutdown\n");
  5789. goto done;
  5790. }
  5791. if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  5792. IWL_DEBUG_HC("Scan request while abort pending. Queuing.\n");
  5793. goto done;
  5794. }
  5795. if (iwl4965_is_rfkill(priv)) {
  5796. IWL_DEBUG_HC("Aborting scan due to RF Kill activation\n");
  5797. goto done;
  5798. }
  5799. if (!test_bit(STATUS_READY, &priv->status)) {
  5800. IWL_DEBUG_HC("Scan request while uninitialized. Queuing.\n");
  5801. goto done;
  5802. }
  5803. if (!priv->scan_bands) {
  5804. IWL_DEBUG_HC("Aborting scan due to no requested bands\n");
  5805. goto done;
  5806. }
  5807. if (!priv->scan) {
  5808. priv->scan = kmalloc(sizeof(struct iwl4965_scan_cmd) +
  5809. IWL_MAX_SCAN_SIZE, GFP_KERNEL);
  5810. if (!priv->scan) {
  5811. rc = -ENOMEM;
  5812. goto done;
  5813. }
  5814. }
  5815. scan = priv->scan;
  5816. memset(scan, 0, sizeof(struct iwl4965_scan_cmd) + IWL_MAX_SCAN_SIZE);
  5817. scan->quiet_plcp_th = IWL_PLCP_QUIET_THRESH;
  5818. scan->quiet_time = IWL_ACTIVE_QUIET_TIME;
  5819. if (iwl4965_is_associated(priv)) {
  5820. u16 interval = 0;
  5821. u32 extra;
  5822. u32 suspend_time = 100;
  5823. u32 scan_suspend_time = 100;
  5824. unsigned long flags;
  5825. IWL_DEBUG_INFO("Scanning while associated...\n");
  5826. spin_lock_irqsave(&priv->lock, flags);
  5827. interval = priv->beacon_int;
  5828. spin_unlock_irqrestore(&priv->lock, flags);
  5829. scan->suspend_time = 0;
  5830. scan->max_out_time = cpu_to_le32(200 * 1024);
  5831. if (!interval)
  5832. interval = suspend_time;
  5833. extra = (suspend_time / interval) << 22;
  5834. scan_suspend_time = (extra |
  5835. ((suspend_time % interval) * 1024));
  5836. scan->suspend_time = cpu_to_le32(scan_suspend_time);
  5837. IWL_DEBUG_SCAN("suspend_time 0x%X beacon interval %d\n",
  5838. scan_suspend_time, interval);
  5839. }
  5840. /* We should add the ability for user to lock to PASSIVE ONLY */
  5841. if (priv->one_direct_scan) {
  5842. IWL_DEBUG_SCAN
  5843. ("Kicking off one direct scan for '%s'\n",
  5844. iwl4965_escape_essid(priv->direct_ssid,
  5845. priv->direct_ssid_len));
  5846. scan->direct_scan[0].id = WLAN_EID_SSID;
  5847. scan->direct_scan[0].len = priv->direct_ssid_len;
  5848. memcpy(scan->direct_scan[0].ssid,
  5849. priv->direct_ssid, priv->direct_ssid_len);
  5850. direct_mask = 1;
  5851. } else if (!iwl4965_is_associated(priv) && priv->essid_len) {
  5852. scan->direct_scan[0].id = WLAN_EID_SSID;
  5853. scan->direct_scan[0].len = priv->essid_len;
  5854. memcpy(scan->direct_scan[0].ssid, priv->essid, priv->essid_len);
  5855. direct_mask = 1;
  5856. } else
  5857. direct_mask = 0;
  5858. /* We don't build a direct scan probe request; the uCode will do
  5859. * that based on the direct_mask added to each channel entry */
  5860. scan->tx_cmd.len = cpu_to_le16(
  5861. iwl4965_fill_probe_req(priv, (struct ieee80211_mgmt *)scan->data,
  5862. IWL_MAX_SCAN_SIZE - sizeof(scan), 0));
  5863. scan->tx_cmd.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK;
  5864. scan->tx_cmd.sta_id = priv->hw_setting.bcast_sta_id;
  5865. scan->tx_cmd.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
  5866. /* flags + rate selection */
  5867. scan->tx_cmd.tx_flags |= cpu_to_le32(0x200);
  5868. switch (priv->scan_bands) {
  5869. case 2:
  5870. scan->flags = RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK;
  5871. scan->tx_cmd.rate_n_flags =
  5872. iwl4965_hw_set_rate_n_flags(IWL_RATE_1M_PLCP,
  5873. RATE_MCS_ANT_B_MSK|RATE_MCS_CCK_MSK);
  5874. scan->good_CRC_th = 0;
  5875. phymode = MODE_IEEE80211G;
  5876. break;
  5877. case 1:
  5878. scan->tx_cmd.rate_n_flags =
  5879. iwl4965_hw_set_rate_n_flags(IWL_RATE_6M_PLCP,
  5880. RATE_MCS_ANT_B_MSK);
  5881. scan->good_CRC_th = IWL_GOOD_CRC_TH;
  5882. phymode = MODE_IEEE80211A;
  5883. break;
  5884. default:
  5885. IWL_WARNING("Invalid scan band count\n");
  5886. goto done;
  5887. }
  5888. /* select Rx chains */
  5889. /* Force use of chains B and C (0x6) for scan Rx.
  5890. * Avoid A (0x1) because of its off-channel reception on A-band.
  5891. * MIMO is not used here, but value is required to make uCode happy. */
  5892. scan->rx_chain = RXON_RX_CHAIN_DRIVER_FORCE_MSK |
  5893. cpu_to_le16((0x7 << RXON_RX_CHAIN_VALID_POS) |
  5894. (0x6 << RXON_RX_CHAIN_FORCE_SEL_POS) |
  5895. (0x7 << RXON_RX_CHAIN_FORCE_MIMO_SEL_POS));
  5896. if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR)
  5897. scan->filter_flags = RXON_FILTER_PROMISC_MSK;
  5898. if (direct_mask)
  5899. IWL_DEBUG_SCAN
  5900. ("Initiating direct scan for %s.\n",
  5901. iwl4965_escape_essid(priv->essid, priv->essid_len));
  5902. else
  5903. IWL_DEBUG_SCAN("Initiating indirect scan.\n");
  5904. scan->channel_count =
  5905. iwl4965_get_channels_for_scan(
  5906. priv, phymode, 1, /* active */
  5907. direct_mask,
  5908. (void *)&scan->data[le16_to_cpu(scan->tx_cmd.len)]);
  5909. cmd.len += le16_to_cpu(scan->tx_cmd.len) +
  5910. scan->channel_count * sizeof(struct iwl4965_scan_channel);
  5911. cmd.data = scan;
  5912. scan->len = cpu_to_le16(cmd.len);
  5913. set_bit(STATUS_SCAN_HW, &priv->status);
  5914. rc = iwl4965_send_cmd_sync(priv, &cmd);
  5915. if (rc)
  5916. goto done;
  5917. queue_delayed_work(priv->workqueue, &priv->scan_check,
  5918. IWL_SCAN_CHECK_WATCHDOG);
  5919. mutex_unlock(&priv->mutex);
  5920. return;
  5921. done:
  5922. /* inform mac80211 scan aborted */
  5923. queue_work(priv->workqueue, &priv->scan_completed);
  5924. mutex_unlock(&priv->mutex);
  5925. }
  5926. static void iwl4965_bg_up(struct work_struct *data)
  5927. {
  5928. struct iwl4965_priv *priv = container_of(data, struct iwl4965_priv, up);
  5929. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5930. return;
  5931. mutex_lock(&priv->mutex);
  5932. __iwl4965_up(priv);
  5933. mutex_unlock(&priv->mutex);
  5934. }
  5935. static void iwl4965_bg_restart(struct work_struct *data)
  5936. {
  5937. struct iwl4965_priv *priv = container_of(data, struct iwl4965_priv, restart);
  5938. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5939. return;
  5940. iwl4965_down(priv);
  5941. queue_work(priv->workqueue, &priv->up);
  5942. }
  5943. static void iwl4965_bg_rx_replenish(struct work_struct *data)
  5944. {
  5945. struct iwl4965_priv *priv =
  5946. container_of(data, struct iwl4965_priv, rx_replenish);
  5947. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5948. return;
  5949. mutex_lock(&priv->mutex);
  5950. iwl4965_rx_replenish(priv);
  5951. mutex_unlock(&priv->mutex);
  5952. }
  5953. static void iwl4965_bg_post_associate(struct work_struct *data)
  5954. {
  5955. struct iwl4965_priv *priv = container_of(data, struct iwl4965_priv,
  5956. post_associate.work);
  5957. int rc = 0;
  5958. struct ieee80211_conf *conf = NULL;
  5959. DECLARE_MAC_BUF(mac);
  5960. if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
  5961. IWL_ERROR("%s Should not be called in AP mode\n", __FUNCTION__);
  5962. return;
  5963. }
  5964. IWL_DEBUG_ASSOC("Associated as %d to: %s\n",
  5965. priv->assoc_id,
  5966. print_mac(mac, priv->active_rxon.bssid_addr));
  5967. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5968. return;
  5969. mutex_lock(&priv->mutex);
  5970. if (!priv->interface_id || !priv->is_open) {
  5971. mutex_unlock(&priv->mutex);
  5972. return;
  5973. }
  5974. iwl4965_scan_cancel_timeout(priv, 200);
  5975. conf = ieee80211_get_hw_conf(priv->hw);
  5976. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  5977. iwl4965_commit_rxon(priv);
  5978. memset(&priv->rxon_timing, 0, sizeof(struct iwl4965_rxon_time_cmd));
  5979. iwl4965_setup_rxon_timing(priv);
  5980. rc = iwl4965_send_cmd_pdu(priv, REPLY_RXON_TIMING,
  5981. sizeof(priv->rxon_timing), &priv->rxon_timing);
  5982. if (rc)
  5983. IWL_WARNING("REPLY_RXON_TIMING failed - "
  5984. "Attempting to continue.\n");
  5985. priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
  5986. #ifdef CONFIG_IWL4965_HT
  5987. if (priv->is_ht_enabled && priv->current_assoc_ht.is_ht)
  5988. iwl4965_set_rxon_ht(priv, &priv->current_assoc_ht);
  5989. else {
  5990. priv->active_rate_ht[0] = 0;
  5991. priv->active_rate_ht[1] = 0;
  5992. priv->current_channel_width = IWL_CHANNEL_WIDTH_20MHZ;
  5993. }
  5994. #endif /* CONFIG_IWL4965_HT*/
  5995. iwl4965_set_rxon_chain(priv);
  5996. priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
  5997. IWL_DEBUG_ASSOC("assoc id %d beacon interval %d\n",
  5998. priv->assoc_id, priv->beacon_int);
  5999. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
  6000. priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  6001. else
  6002. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  6003. if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
  6004. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
  6005. priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
  6006. else
  6007. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  6008. if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
  6009. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  6010. }
  6011. iwl4965_commit_rxon(priv);
  6012. switch (priv->iw_mode) {
  6013. case IEEE80211_IF_TYPE_STA:
  6014. iwl4965_rate_scale_init(priv->hw, IWL_AP_ID);
  6015. break;
  6016. case IEEE80211_IF_TYPE_IBSS:
  6017. /* clear out the station table */
  6018. iwl4965_clear_stations_table(priv);
  6019. iwl4965_rxon_add_station(priv, iwl4965_broadcast_addr, 0);
  6020. iwl4965_rxon_add_station(priv, priv->bssid, 0);
  6021. iwl4965_rate_scale_init(priv->hw, IWL_STA_ID);
  6022. iwl4965_send_beacon_cmd(priv);
  6023. break;
  6024. default:
  6025. IWL_ERROR("%s Should not be called in %d mode\n",
  6026. __FUNCTION__, priv->iw_mode);
  6027. break;
  6028. }
  6029. iwl4965_sequence_reset(priv);
  6030. #ifdef CONFIG_IWL4965_SENSITIVITY
  6031. /* Enable Rx differential gain and sensitivity calibrations */
  6032. iwl4965_chain_noise_reset(priv);
  6033. priv->start_calib = 1;
  6034. #endif /* CONFIG_IWL4965_SENSITIVITY */
  6035. if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
  6036. priv->assoc_station_added = 1;
  6037. #ifdef CONFIG_IWL4965_QOS
  6038. iwl4965_activate_qos(priv, 0);
  6039. #endif /* CONFIG_IWL4965_QOS */
  6040. mutex_unlock(&priv->mutex);
  6041. }
  6042. static void iwl4965_bg_abort_scan(struct work_struct *work)
  6043. {
  6044. struct iwl4965_priv *priv = container_of(work, struct iwl4965_priv, abort_scan);
  6045. if (!iwl4965_is_ready(priv))
  6046. return;
  6047. mutex_lock(&priv->mutex);
  6048. set_bit(STATUS_SCAN_ABORTING, &priv->status);
  6049. iwl4965_send_scan_abort(priv);
  6050. mutex_unlock(&priv->mutex);
  6051. }
  6052. static void iwl4965_bg_scan_completed(struct work_struct *work)
  6053. {
  6054. struct iwl4965_priv *priv =
  6055. container_of(work, struct iwl4965_priv, scan_completed);
  6056. IWL_DEBUG(IWL_DL_INFO | IWL_DL_SCAN, "SCAN complete scan\n");
  6057. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  6058. return;
  6059. ieee80211_scan_completed(priv->hw);
  6060. /* Since setting the TXPOWER may have been deferred while
  6061. * performing the scan, fire one off */
  6062. mutex_lock(&priv->mutex);
  6063. iwl4965_hw_reg_send_txpower(priv);
  6064. mutex_unlock(&priv->mutex);
  6065. }
  6066. /*****************************************************************************
  6067. *
  6068. * mac80211 entry point functions
  6069. *
  6070. *****************************************************************************/
  6071. static int iwl4965_mac_start(struct ieee80211_hw *hw)
  6072. {
  6073. struct iwl4965_priv *priv = hw->priv;
  6074. IWL_DEBUG_MAC80211("enter\n");
  6075. /* we should be verifying the device is ready to be opened */
  6076. mutex_lock(&priv->mutex);
  6077. priv->is_open = 1;
  6078. if (!iwl4965_is_rfkill(priv))
  6079. ieee80211_start_queues(priv->hw);
  6080. mutex_unlock(&priv->mutex);
  6081. IWL_DEBUG_MAC80211("leave\n");
  6082. return 0;
  6083. }
  6084. static void iwl4965_mac_stop(struct ieee80211_hw *hw)
  6085. {
  6086. struct iwl4965_priv *priv = hw->priv;
  6087. IWL_DEBUG_MAC80211("enter\n");
  6088. mutex_lock(&priv->mutex);
  6089. /* stop mac, cancel any scan request and clear
  6090. * RXON_FILTER_ASSOC_MSK BIT
  6091. */
  6092. priv->is_open = 0;
  6093. iwl4965_scan_cancel_timeout(priv, 100);
  6094. cancel_delayed_work(&priv->post_associate);
  6095. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  6096. iwl4965_commit_rxon(priv);
  6097. mutex_unlock(&priv->mutex);
  6098. IWL_DEBUG_MAC80211("leave\n");
  6099. }
  6100. static int iwl4965_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb,
  6101. struct ieee80211_tx_control *ctl)
  6102. {
  6103. struct iwl4965_priv *priv = hw->priv;
  6104. IWL_DEBUG_MAC80211("enter\n");
  6105. if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR) {
  6106. IWL_DEBUG_MAC80211("leave - monitor\n");
  6107. return -1;
  6108. }
  6109. IWL_DEBUG_TX("dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
  6110. ctl->tx_rate);
  6111. if (iwl4965_tx_skb(priv, skb, ctl))
  6112. dev_kfree_skb_any(skb);
  6113. IWL_DEBUG_MAC80211("leave\n");
  6114. return 0;
  6115. }
  6116. static int iwl4965_mac_add_interface(struct ieee80211_hw *hw,
  6117. struct ieee80211_if_init_conf *conf)
  6118. {
  6119. struct iwl4965_priv *priv = hw->priv;
  6120. unsigned long flags;
  6121. DECLARE_MAC_BUF(mac);
  6122. IWL_DEBUG_MAC80211("enter: id %d, type %d\n", conf->if_id, conf->type);
  6123. if (priv->interface_id) {
  6124. IWL_DEBUG_MAC80211("leave - interface_id != 0\n");
  6125. return 0;
  6126. }
  6127. spin_lock_irqsave(&priv->lock, flags);
  6128. priv->interface_id = conf->if_id;
  6129. spin_unlock_irqrestore(&priv->lock, flags);
  6130. mutex_lock(&priv->mutex);
  6131. if (conf->mac_addr) {
  6132. IWL_DEBUG_MAC80211("Set %s\n", print_mac(mac, conf->mac_addr));
  6133. memcpy(priv->mac_addr, conf->mac_addr, ETH_ALEN);
  6134. }
  6135. iwl4965_set_mode(priv, conf->type);
  6136. IWL_DEBUG_MAC80211("leave\n");
  6137. mutex_unlock(&priv->mutex);
  6138. return 0;
  6139. }
  6140. /**
  6141. * iwl4965_mac_config - mac80211 config callback
  6142. *
  6143. * We ignore conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME since it seems to
  6144. * be set inappropriately and the driver currently sets the hardware up to
  6145. * use it whenever needed.
  6146. */
  6147. static int iwl4965_mac_config(struct ieee80211_hw *hw, struct ieee80211_conf *conf)
  6148. {
  6149. struct iwl4965_priv *priv = hw->priv;
  6150. const struct iwl4965_channel_info *ch_info;
  6151. unsigned long flags;
  6152. mutex_lock(&priv->mutex);
  6153. IWL_DEBUG_MAC80211("enter to channel %d\n", conf->channel);
  6154. if (!iwl4965_is_ready(priv)) {
  6155. IWL_DEBUG_MAC80211("leave - not ready\n");
  6156. mutex_unlock(&priv->mutex);
  6157. return -EIO;
  6158. }
  6159. /* TODO: Figure out how to get ieee80211_local->sta_scanning w/ only
  6160. * what is exposed through include/ declarations */
  6161. if (unlikely(!iwl4965_param_disable_hw_scan &&
  6162. test_bit(STATUS_SCANNING, &priv->status))) {
  6163. IWL_DEBUG_MAC80211("leave - scanning\n");
  6164. mutex_unlock(&priv->mutex);
  6165. return 0;
  6166. }
  6167. spin_lock_irqsave(&priv->lock, flags);
  6168. ch_info = iwl4965_get_channel_info(priv, conf->phymode, conf->channel);
  6169. if (!is_channel_valid(ch_info)) {
  6170. IWL_DEBUG_SCAN("Channel %d [%d] is INVALID for this SKU.\n",
  6171. conf->channel, conf->phymode);
  6172. IWL_DEBUG_MAC80211("leave - invalid channel\n");
  6173. spin_unlock_irqrestore(&priv->lock, flags);
  6174. mutex_unlock(&priv->mutex);
  6175. return -EINVAL;
  6176. }
  6177. #ifdef CONFIG_IWL4965_HT
  6178. /* if we are switching fron ht to 2.4 clear flags
  6179. * from any ht related info since 2.4 does not
  6180. * support ht */
  6181. if ((le16_to_cpu(priv->staging_rxon.channel) != conf->channel)
  6182. #ifdef IEEE80211_CONF_CHANNEL_SWITCH
  6183. && !(conf->flags & IEEE80211_CONF_CHANNEL_SWITCH)
  6184. #endif
  6185. )
  6186. priv->staging_rxon.flags = 0;
  6187. #endif /* CONFIG_IWL4965_HT */
  6188. iwl4965_set_rxon_channel(priv, conf->phymode, conf->channel);
  6189. iwl4965_set_flags_for_phymode(priv, conf->phymode);
  6190. /* The list of supported rates and rate mask can be different
  6191. * for each phymode; since the phymode may have changed, reset
  6192. * the rate mask to what mac80211 lists */
  6193. iwl4965_set_rate(priv);
  6194. spin_unlock_irqrestore(&priv->lock, flags);
  6195. #ifdef IEEE80211_CONF_CHANNEL_SWITCH
  6196. if (conf->flags & IEEE80211_CONF_CHANNEL_SWITCH) {
  6197. iwl4965_hw_channel_switch(priv, conf->channel);
  6198. mutex_unlock(&priv->mutex);
  6199. return 0;
  6200. }
  6201. #endif
  6202. iwl4965_radio_kill_sw(priv, !conf->radio_enabled);
  6203. if (!conf->radio_enabled) {
  6204. IWL_DEBUG_MAC80211("leave - radio disabled\n");
  6205. mutex_unlock(&priv->mutex);
  6206. return 0;
  6207. }
  6208. if (iwl4965_is_rfkill(priv)) {
  6209. IWL_DEBUG_MAC80211("leave - RF kill\n");
  6210. mutex_unlock(&priv->mutex);
  6211. return -EIO;
  6212. }
  6213. iwl4965_set_rate(priv);
  6214. if (memcmp(&priv->active_rxon,
  6215. &priv->staging_rxon, sizeof(priv->staging_rxon)))
  6216. iwl4965_commit_rxon(priv);
  6217. else
  6218. IWL_DEBUG_INFO("No re-sending same RXON configuration.\n");
  6219. IWL_DEBUG_MAC80211("leave\n");
  6220. mutex_unlock(&priv->mutex);
  6221. return 0;
  6222. }
  6223. static void iwl4965_config_ap(struct iwl4965_priv *priv)
  6224. {
  6225. int rc = 0;
  6226. if (priv->status & STATUS_EXIT_PENDING)
  6227. return;
  6228. /* The following should be done only at AP bring up */
  6229. if ((priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) == 0) {
  6230. /* RXON - unassoc (to set timing command) */
  6231. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  6232. iwl4965_commit_rxon(priv);
  6233. /* RXON Timing */
  6234. memset(&priv->rxon_timing, 0, sizeof(struct iwl4965_rxon_time_cmd));
  6235. iwl4965_setup_rxon_timing(priv);
  6236. rc = iwl4965_send_cmd_pdu(priv, REPLY_RXON_TIMING,
  6237. sizeof(priv->rxon_timing), &priv->rxon_timing);
  6238. if (rc)
  6239. IWL_WARNING("REPLY_RXON_TIMING failed - "
  6240. "Attempting to continue.\n");
  6241. iwl4965_set_rxon_chain(priv);
  6242. /* FIXME: what should be the assoc_id for AP? */
  6243. priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
  6244. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
  6245. priv->staging_rxon.flags |=
  6246. RXON_FLG_SHORT_PREAMBLE_MSK;
  6247. else
  6248. priv->staging_rxon.flags &=
  6249. ~RXON_FLG_SHORT_PREAMBLE_MSK;
  6250. if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
  6251. if (priv->assoc_capability &
  6252. WLAN_CAPABILITY_SHORT_SLOT_TIME)
  6253. priv->staging_rxon.flags |=
  6254. RXON_FLG_SHORT_SLOT_MSK;
  6255. else
  6256. priv->staging_rxon.flags &=
  6257. ~RXON_FLG_SHORT_SLOT_MSK;
  6258. if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
  6259. priv->staging_rxon.flags &=
  6260. ~RXON_FLG_SHORT_SLOT_MSK;
  6261. }
  6262. /* restore RXON assoc */
  6263. priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
  6264. iwl4965_commit_rxon(priv);
  6265. #ifdef CONFIG_IWL4965_QOS
  6266. iwl4965_activate_qos(priv, 1);
  6267. #endif
  6268. iwl4965_rxon_add_station(priv, iwl4965_broadcast_addr, 0);
  6269. }
  6270. iwl4965_send_beacon_cmd(priv);
  6271. /* FIXME - we need to add code here to detect a totally new
  6272. * configuration, reset the AP, unassoc, rxon timing, assoc,
  6273. * clear sta table, add BCAST sta... */
  6274. }
  6275. static int iwl4965_mac_config_interface(struct ieee80211_hw *hw, int if_id,
  6276. struct ieee80211_if_conf *conf)
  6277. {
  6278. struct iwl4965_priv *priv = hw->priv;
  6279. DECLARE_MAC_BUF(mac);
  6280. unsigned long flags;
  6281. int rc;
  6282. if (conf == NULL)
  6283. return -EIO;
  6284. if ((priv->iw_mode == IEEE80211_IF_TYPE_AP) &&
  6285. (!conf->beacon || !conf->ssid_len)) {
  6286. IWL_DEBUG_MAC80211
  6287. ("Leaving in AP mode because HostAPD is not ready.\n");
  6288. return 0;
  6289. }
  6290. mutex_lock(&priv->mutex);
  6291. IWL_DEBUG_MAC80211("enter: interface id %d\n", if_id);
  6292. if (conf->bssid)
  6293. IWL_DEBUG_MAC80211("bssid: %s\n",
  6294. print_mac(mac, conf->bssid));
  6295. /*
  6296. * very dubious code was here; the probe filtering flag is never set:
  6297. *
  6298. if (unlikely(test_bit(STATUS_SCANNING, &priv->status)) &&
  6299. !(priv->hw->flags & IEEE80211_HW_NO_PROBE_FILTERING)) {
  6300. */
  6301. if (unlikely(test_bit(STATUS_SCANNING, &priv->status))) {
  6302. IWL_DEBUG_MAC80211("leave - scanning\n");
  6303. mutex_unlock(&priv->mutex);
  6304. return 0;
  6305. }
  6306. if (priv->interface_id != if_id) {
  6307. IWL_DEBUG_MAC80211("leave - interface_id != if_id\n");
  6308. mutex_unlock(&priv->mutex);
  6309. return 0;
  6310. }
  6311. if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
  6312. if (!conf->bssid) {
  6313. conf->bssid = priv->mac_addr;
  6314. memcpy(priv->bssid, priv->mac_addr, ETH_ALEN);
  6315. IWL_DEBUG_MAC80211("bssid was set to: %s\n",
  6316. print_mac(mac, conf->bssid));
  6317. }
  6318. if (priv->ibss_beacon)
  6319. dev_kfree_skb(priv->ibss_beacon);
  6320. priv->ibss_beacon = conf->beacon;
  6321. }
  6322. if (conf->bssid && !is_zero_ether_addr(conf->bssid) &&
  6323. !is_multicast_ether_addr(conf->bssid)) {
  6324. /* If there is currently a HW scan going on in the background
  6325. * then we need to cancel it else the RXON below will fail. */
  6326. if (iwl4965_scan_cancel_timeout(priv, 100)) {
  6327. IWL_WARNING("Aborted scan still in progress "
  6328. "after 100ms\n");
  6329. IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
  6330. mutex_unlock(&priv->mutex);
  6331. return -EAGAIN;
  6332. }
  6333. memcpy(priv->staging_rxon.bssid_addr, conf->bssid, ETH_ALEN);
  6334. /* TODO: Audit driver for usage of these members and see
  6335. * if mac80211 deprecates them (priv->bssid looks like it
  6336. * shouldn't be there, but I haven't scanned the IBSS code
  6337. * to verify) - jpk */
  6338. memcpy(priv->bssid, conf->bssid, ETH_ALEN);
  6339. if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
  6340. iwl4965_config_ap(priv);
  6341. else {
  6342. rc = iwl4965_commit_rxon(priv);
  6343. if ((priv->iw_mode == IEEE80211_IF_TYPE_STA) && rc)
  6344. iwl4965_rxon_add_station(
  6345. priv, priv->active_rxon.bssid_addr, 1);
  6346. }
  6347. } else {
  6348. iwl4965_scan_cancel_timeout(priv, 100);
  6349. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  6350. iwl4965_commit_rxon(priv);
  6351. }
  6352. spin_lock_irqsave(&priv->lock, flags);
  6353. if (!conf->ssid_len)
  6354. memset(priv->essid, 0, IW_ESSID_MAX_SIZE);
  6355. else
  6356. memcpy(priv->essid, conf->ssid, conf->ssid_len);
  6357. priv->essid_len = conf->ssid_len;
  6358. spin_unlock_irqrestore(&priv->lock, flags);
  6359. IWL_DEBUG_MAC80211("leave\n");
  6360. mutex_unlock(&priv->mutex);
  6361. return 0;
  6362. }
  6363. static void iwl4965_configure_filter(struct ieee80211_hw *hw,
  6364. unsigned int changed_flags,
  6365. unsigned int *total_flags,
  6366. int mc_count, struct dev_addr_list *mc_list)
  6367. {
  6368. /*
  6369. * XXX: dummy
  6370. * see also iwl4965_connection_init_rx_config
  6371. */
  6372. *total_flags = 0;
  6373. }
  6374. static void iwl4965_mac_remove_interface(struct ieee80211_hw *hw,
  6375. struct ieee80211_if_init_conf *conf)
  6376. {
  6377. struct iwl4965_priv *priv = hw->priv;
  6378. IWL_DEBUG_MAC80211("enter\n");
  6379. mutex_lock(&priv->mutex);
  6380. iwl4965_scan_cancel_timeout(priv, 100);
  6381. cancel_delayed_work(&priv->post_associate);
  6382. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  6383. iwl4965_commit_rxon(priv);
  6384. if (priv->interface_id == conf->if_id) {
  6385. priv->interface_id = 0;
  6386. memset(priv->bssid, 0, ETH_ALEN);
  6387. memset(priv->essid, 0, IW_ESSID_MAX_SIZE);
  6388. priv->essid_len = 0;
  6389. }
  6390. mutex_unlock(&priv->mutex);
  6391. IWL_DEBUG_MAC80211("leave\n");
  6392. }
  6393. static void iwl4965_mac_erp_ie_changed(struct ieee80211_hw *hw,
  6394. u8 changes, int cts_protection, int preamble)
  6395. {
  6396. struct iwl4965_priv *priv = hw->priv;
  6397. if (changes & IEEE80211_ERP_CHANGE_PREAMBLE) {
  6398. if (preamble == WLAN_ERP_PREAMBLE_SHORT)
  6399. priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  6400. else
  6401. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  6402. }
  6403. if (changes & IEEE80211_ERP_CHANGE_PROTECTION) {
  6404. if (cts_protection && (priv->phymode != MODE_IEEE80211A))
  6405. priv->staging_rxon.flags |= RXON_FLG_TGG_PROTECT_MSK;
  6406. else
  6407. priv->staging_rxon.flags &= ~RXON_FLG_TGG_PROTECT_MSK;
  6408. }
  6409. if (iwl4965_is_associated(priv))
  6410. iwl4965_send_rxon_assoc(priv);
  6411. }
  6412. #define IWL_DELAY_NEXT_SCAN (HZ*2)
  6413. static int iwl4965_mac_hw_scan(struct ieee80211_hw *hw, u8 *ssid, size_t len)
  6414. {
  6415. int rc = 0;
  6416. unsigned long flags;
  6417. struct iwl4965_priv *priv = hw->priv;
  6418. IWL_DEBUG_MAC80211("enter\n");
  6419. mutex_lock(&priv->mutex);
  6420. spin_lock_irqsave(&priv->lock, flags);
  6421. if (!iwl4965_is_ready_rf(priv)) {
  6422. rc = -EIO;
  6423. IWL_DEBUG_MAC80211("leave - not ready or exit pending\n");
  6424. goto out_unlock;
  6425. }
  6426. if (priv->iw_mode == IEEE80211_IF_TYPE_AP) { /* APs don't scan */
  6427. rc = -EIO;
  6428. IWL_ERROR("ERROR: APs don't scan\n");
  6429. goto out_unlock;
  6430. }
  6431. /* if we just finished scan ask for delay */
  6432. if (priv->last_scan_jiffies &&
  6433. time_after(priv->last_scan_jiffies + IWL_DELAY_NEXT_SCAN,
  6434. jiffies)) {
  6435. rc = -EAGAIN;
  6436. goto out_unlock;
  6437. }
  6438. if (len) {
  6439. IWL_DEBUG_SCAN("direct scan for "
  6440. "%s [%d]\n ",
  6441. iwl4965_escape_essid(ssid, len), (int)len);
  6442. priv->one_direct_scan = 1;
  6443. priv->direct_ssid_len = (u8)
  6444. min((u8) len, (u8) IW_ESSID_MAX_SIZE);
  6445. memcpy(priv->direct_ssid, ssid, priv->direct_ssid_len);
  6446. } else
  6447. priv->one_direct_scan = 0;
  6448. rc = iwl4965_scan_initiate(priv);
  6449. IWL_DEBUG_MAC80211("leave\n");
  6450. out_unlock:
  6451. spin_unlock_irqrestore(&priv->lock, flags);
  6452. mutex_unlock(&priv->mutex);
  6453. return rc;
  6454. }
  6455. static int iwl4965_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
  6456. const u8 *local_addr, const u8 *addr,
  6457. struct ieee80211_key_conf *key)
  6458. {
  6459. struct iwl4965_priv *priv = hw->priv;
  6460. DECLARE_MAC_BUF(mac);
  6461. int rc = 0;
  6462. u8 sta_id;
  6463. IWL_DEBUG_MAC80211("enter\n");
  6464. if (!iwl4965_param_hwcrypto) {
  6465. IWL_DEBUG_MAC80211("leave - hwcrypto disabled\n");
  6466. return -EOPNOTSUPP;
  6467. }
  6468. if (is_zero_ether_addr(addr))
  6469. /* only support pairwise keys */
  6470. return -EOPNOTSUPP;
  6471. sta_id = iwl4965_hw_find_station(priv, addr);
  6472. if (sta_id == IWL_INVALID_STATION) {
  6473. IWL_DEBUG_MAC80211("leave - %s not in station map.\n",
  6474. print_mac(mac, addr));
  6475. return -EINVAL;
  6476. }
  6477. mutex_lock(&priv->mutex);
  6478. iwl4965_scan_cancel_timeout(priv, 100);
  6479. switch (cmd) {
  6480. case SET_KEY:
  6481. rc = iwl4965_update_sta_key_info(priv, key, sta_id);
  6482. if (!rc) {
  6483. iwl4965_set_rxon_hwcrypto(priv, 1);
  6484. iwl4965_commit_rxon(priv);
  6485. key->hw_key_idx = sta_id;
  6486. IWL_DEBUG_MAC80211("set_key success, using hwcrypto\n");
  6487. key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
  6488. }
  6489. break;
  6490. case DISABLE_KEY:
  6491. rc = iwl4965_clear_sta_key_info(priv, sta_id);
  6492. if (!rc) {
  6493. iwl4965_set_rxon_hwcrypto(priv, 0);
  6494. iwl4965_commit_rxon(priv);
  6495. IWL_DEBUG_MAC80211("disable hwcrypto key\n");
  6496. }
  6497. break;
  6498. default:
  6499. rc = -EINVAL;
  6500. }
  6501. IWL_DEBUG_MAC80211("leave\n");
  6502. mutex_unlock(&priv->mutex);
  6503. return rc;
  6504. }
  6505. static int iwl4965_mac_conf_tx(struct ieee80211_hw *hw, int queue,
  6506. const struct ieee80211_tx_queue_params *params)
  6507. {
  6508. struct iwl4965_priv *priv = hw->priv;
  6509. #ifdef CONFIG_IWL4965_QOS
  6510. unsigned long flags;
  6511. int q;
  6512. #endif /* CONFIG_IWL_QOS */
  6513. IWL_DEBUG_MAC80211("enter\n");
  6514. if (!iwl4965_is_ready_rf(priv)) {
  6515. IWL_DEBUG_MAC80211("leave - RF not ready\n");
  6516. return -EIO;
  6517. }
  6518. if (queue >= AC_NUM) {
  6519. IWL_DEBUG_MAC80211("leave - queue >= AC_NUM %d\n", queue);
  6520. return 0;
  6521. }
  6522. #ifdef CONFIG_IWL4965_QOS
  6523. if (!priv->qos_data.qos_enable) {
  6524. priv->qos_data.qos_active = 0;
  6525. IWL_DEBUG_MAC80211("leave - qos not enabled\n");
  6526. return 0;
  6527. }
  6528. q = AC_NUM - 1 - queue;
  6529. spin_lock_irqsave(&priv->lock, flags);
  6530. priv->qos_data.def_qos_parm.ac[q].cw_min = cpu_to_le16(params->cw_min);
  6531. priv->qos_data.def_qos_parm.ac[q].cw_max = cpu_to_le16(params->cw_max);
  6532. priv->qos_data.def_qos_parm.ac[q].aifsn = params->aifs;
  6533. priv->qos_data.def_qos_parm.ac[q].edca_txop =
  6534. cpu_to_le16((params->burst_time * 100));
  6535. priv->qos_data.def_qos_parm.ac[q].reserved1 = 0;
  6536. priv->qos_data.qos_active = 1;
  6537. spin_unlock_irqrestore(&priv->lock, flags);
  6538. mutex_lock(&priv->mutex);
  6539. if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
  6540. iwl4965_activate_qos(priv, 1);
  6541. else if (priv->assoc_id && iwl4965_is_associated(priv))
  6542. iwl4965_activate_qos(priv, 0);
  6543. mutex_unlock(&priv->mutex);
  6544. #endif /*CONFIG_IWL4965_QOS */
  6545. IWL_DEBUG_MAC80211("leave\n");
  6546. return 0;
  6547. }
  6548. static int iwl4965_mac_get_tx_stats(struct ieee80211_hw *hw,
  6549. struct ieee80211_tx_queue_stats *stats)
  6550. {
  6551. struct iwl4965_priv *priv = hw->priv;
  6552. int i, avail;
  6553. struct iwl4965_tx_queue *txq;
  6554. struct iwl4965_queue *q;
  6555. unsigned long flags;
  6556. IWL_DEBUG_MAC80211("enter\n");
  6557. if (!iwl4965_is_ready_rf(priv)) {
  6558. IWL_DEBUG_MAC80211("leave - RF not ready\n");
  6559. return -EIO;
  6560. }
  6561. spin_lock_irqsave(&priv->lock, flags);
  6562. for (i = 0; i < AC_NUM; i++) {
  6563. txq = &priv->txq[i];
  6564. q = &txq->q;
  6565. avail = iwl4965_queue_space(q);
  6566. stats->data[i].len = q->n_window - avail;
  6567. stats->data[i].limit = q->n_window - q->high_mark;
  6568. stats->data[i].count = q->n_window;
  6569. }
  6570. spin_unlock_irqrestore(&priv->lock, flags);
  6571. IWL_DEBUG_MAC80211("leave\n");
  6572. return 0;
  6573. }
  6574. static int iwl4965_mac_get_stats(struct ieee80211_hw *hw,
  6575. struct ieee80211_low_level_stats *stats)
  6576. {
  6577. IWL_DEBUG_MAC80211("enter\n");
  6578. IWL_DEBUG_MAC80211("leave\n");
  6579. return 0;
  6580. }
  6581. static u64 iwl4965_mac_get_tsf(struct ieee80211_hw *hw)
  6582. {
  6583. IWL_DEBUG_MAC80211("enter\n");
  6584. IWL_DEBUG_MAC80211("leave\n");
  6585. return 0;
  6586. }
  6587. static void iwl4965_mac_reset_tsf(struct ieee80211_hw *hw)
  6588. {
  6589. struct iwl4965_priv *priv = hw->priv;
  6590. unsigned long flags;
  6591. mutex_lock(&priv->mutex);
  6592. IWL_DEBUG_MAC80211("enter\n");
  6593. priv->lq_mngr.lq_ready = 0;
  6594. #ifdef CONFIG_IWL4965_HT
  6595. spin_lock_irqsave(&priv->lock, flags);
  6596. memset(&priv->current_assoc_ht, 0, sizeof(struct sta_ht_info));
  6597. spin_unlock_irqrestore(&priv->lock, flags);
  6598. #ifdef CONFIG_IWL4965_HT_AGG
  6599. /* if (priv->lq_mngr.agg_ctrl.granted_ba)
  6600. iwl4965_turn_off_agg(priv, TID_ALL_SPECIFIED);*/
  6601. memset(&(priv->lq_mngr.agg_ctrl), 0, sizeof(struct iwl4965_agg_control));
  6602. priv->lq_mngr.agg_ctrl.tid_traffic_load_threshold = 10;
  6603. priv->lq_mngr.agg_ctrl.ba_timeout = 5000;
  6604. priv->lq_mngr.agg_ctrl.auto_agg = 1;
  6605. if (priv->lq_mngr.agg_ctrl.auto_agg)
  6606. priv->lq_mngr.agg_ctrl.requested_ba = TID_ALL_ENABLED;
  6607. #endif /*CONFIG_IWL4965_HT_AGG */
  6608. #endif /* CONFIG_IWL4965_HT */
  6609. #ifdef CONFIG_IWL4965_QOS
  6610. iwl4965_reset_qos(priv);
  6611. #endif
  6612. cancel_delayed_work(&priv->post_associate);
  6613. spin_lock_irqsave(&priv->lock, flags);
  6614. priv->assoc_id = 0;
  6615. priv->assoc_capability = 0;
  6616. priv->call_post_assoc_from_beacon = 0;
  6617. priv->assoc_station_added = 0;
  6618. /* new association get rid of ibss beacon skb */
  6619. if (priv->ibss_beacon)
  6620. dev_kfree_skb(priv->ibss_beacon);
  6621. priv->ibss_beacon = NULL;
  6622. priv->beacon_int = priv->hw->conf.beacon_int;
  6623. priv->timestamp1 = 0;
  6624. priv->timestamp0 = 0;
  6625. if ((priv->iw_mode == IEEE80211_IF_TYPE_STA))
  6626. priv->beacon_int = 0;
  6627. spin_unlock_irqrestore(&priv->lock, flags);
  6628. /* we are restarting association process
  6629. * clear RXON_FILTER_ASSOC_MSK bit
  6630. */
  6631. if (priv->iw_mode != IEEE80211_IF_TYPE_AP) {
  6632. iwl4965_scan_cancel_timeout(priv, 100);
  6633. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  6634. iwl4965_commit_rxon(priv);
  6635. }
  6636. /* Per mac80211.h: This is only used in IBSS mode... */
  6637. if (priv->iw_mode != IEEE80211_IF_TYPE_IBSS) {
  6638. IWL_DEBUG_MAC80211("leave - not in IBSS\n");
  6639. mutex_unlock(&priv->mutex);
  6640. return;
  6641. }
  6642. if (!iwl4965_is_ready_rf(priv)) {
  6643. IWL_DEBUG_MAC80211("leave - not ready\n");
  6644. mutex_unlock(&priv->mutex);
  6645. return;
  6646. }
  6647. priv->only_active_channel = 0;
  6648. iwl4965_set_rate(priv);
  6649. mutex_unlock(&priv->mutex);
  6650. IWL_DEBUG_MAC80211("leave\n");
  6651. }
  6652. static int iwl4965_mac_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb,
  6653. struct ieee80211_tx_control *control)
  6654. {
  6655. struct iwl4965_priv *priv = hw->priv;
  6656. unsigned long flags;
  6657. mutex_lock(&priv->mutex);
  6658. IWL_DEBUG_MAC80211("enter\n");
  6659. if (!iwl4965_is_ready_rf(priv)) {
  6660. IWL_DEBUG_MAC80211("leave - RF not ready\n");
  6661. mutex_unlock(&priv->mutex);
  6662. return -EIO;
  6663. }
  6664. if (priv->iw_mode != IEEE80211_IF_TYPE_IBSS) {
  6665. IWL_DEBUG_MAC80211("leave - not IBSS\n");
  6666. mutex_unlock(&priv->mutex);
  6667. return -EIO;
  6668. }
  6669. spin_lock_irqsave(&priv->lock, flags);
  6670. if (priv->ibss_beacon)
  6671. dev_kfree_skb(priv->ibss_beacon);
  6672. priv->ibss_beacon = skb;
  6673. priv->assoc_id = 0;
  6674. IWL_DEBUG_MAC80211("leave\n");
  6675. spin_unlock_irqrestore(&priv->lock, flags);
  6676. #ifdef CONFIG_IWL4965_QOS
  6677. iwl4965_reset_qos(priv);
  6678. #endif
  6679. queue_work(priv->workqueue, &priv->post_associate.work);
  6680. mutex_unlock(&priv->mutex);
  6681. return 0;
  6682. }
  6683. #ifdef CONFIG_IWL4965_HT
  6684. union ht_cap_info {
  6685. struct {
  6686. u16 advanced_coding_cap :1;
  6687. u16 supported_chan_width_set :1;
  6688. u16 mimo_power_save_mode :2;
  6689. u16 green_field :1;
  6690. u16 short_GI20 :1;
  6691. u16 short_GI40 :1;
  6692. u16 tx_stbc :1;
  6693. u16 rx_stbc :1;
  6694. u16 beam_forming :1;
  6695. u16 delayed_ba :1;
  6696. u16 maximal_amsdu_size :1;
  6697. u16 cck_mode_at_40MHz :1;
  6698. u16 psmp_support :1;
  6699. u16 stbc_ctrl_frame_support :1;
  6700. u16 sig_txop_protection_support :1;
  6701. };
  6702. u16 val;
  6703. } __attribute__ ((packed));
  6704. union ht_param_info{
  6705. struct {
  6706. u8 max_rx_ampdu_factor :2;
  6707. u8 mpdu_density :3;
  6708. u8 reserved :3;
  6709. };
  6710. u8 val;
  6711. } __attribute__ ((packed));
  6712. union ht_exra_param_info {
  6713. struct {
  6714. u8 ext_chan_offset :2;
  6715. u8 tx_chan_width :1;
  6716. u8 rifs_mode :1;
  6717. u8 controlled_access_only :1;
  6718. u8 service_interval_granularity :3;
  6719. };
  6720. u8 val;
  6721. } __attribute__ ((packed));
  6722. union ht_operation_mode{
  6723. struct {
  6724. u16 op_mode :2;
  6725. u16 non_GF :1;
  6726. u16 reserved :13;
  6727. };
  6728. u16 val;
  6729. } __attribute__ ((packed));
  6730. static int sta_ht_info_init(struct ieee80211_ht_capability *ht_cap,
  6731. struct ieee80211_ht_additional_info *ht_extra,
  6732. struct sta_ht_info *ht_info_ap,
  6733. struct sta_ht_info *ht_info)
  6734. {
  6735. union ht_cap_info cap;
  6736. union ht_operation_mode op_mode;
  6737. union ht_param_info param_info;
  6738. union ht_exra_param_info extra_param_info;
  6739. IWL_DEBUG_MAC80211("enter: \n");
  6740. if (!ht_info) {
  6741. IWL_DEBUG_MAC80211("leave: ht_info is NULL\n");
  6742. return -1;
  6743. }
  6744. if (ht_cap) {
  6745. cap.val = (u16) le16_to_cpu(ht_cap->capabilities_info);
  6746. param_info.val = ht_cap->mac_ht_params_info;
  6747. ht_info->is_ht = 1;
  6748. if (cap.short_GI20)
  6749. ht_info->sgf |= 0x1;
  6750. if (cap.short_GI40)
  6751. ht_info->sgf |= 0x2;
  6752. ht_info->is_green_field = cap.green_field;
  6753. ht_info->max_amsdu_size = cap.maximal_amsdu_size;
  6754. ht_info->supported_chan_width = cap.supported_chan_width_set;
  6755. ht_info->tx_mimo_ps_mode = cap.mimo_power_save_mode;
  6756. memcpy(ht_info->supp_rates, ht_cap->supported_mcs_set, 16);
  6757. ht_info->ampdu_factor = param_info.max_rx_ampdu_factor;
  6758. ht_info->mpdu_density = param_info.mpdu_density;
  6759. IWL_DEBUG_MAC80211("SISO mask 0x%X MIMO mask 0x%X \n",
  6760. ht_cap->supported_mcs_set[0],
  6761. ht_cap->supported_mcs_set[1]);
  6762. if (ht_info_ap) {
  6763. ht_info->control_channel = ht_info_ap->control_channel;
  6764. ht_info->extension_chan_offset =
  6765. ht_info_ap->extension_chan_offset;
  6766. ht_info->tx_chan_width = ht_info_ap->tx_chan_width;
  6767. ht_info->operating_mode = ht_info_ap->operating_mode;
  6768. }
  6769. if (ht_extra) {
  6770. extra_param_info.val = ht_extra->ht_param;
  6771. ht_info->control_channel = ht_extra->control_chan;
  6772. ht_info->extension_chan_offset =
  6773. extra_param_info.ext_chan_offset;
  6774. ht_info->tx_chan_width = extra_param_info.tx_chan_width;
  6775. op_mode.val = (u16)
  6776. le16_to_cpu(ht_extra->operation_mode);
  6777. ht_info->operating_mode = op_mode.op_mode;
  6778. IWL_DEBUG_MAC80211("control channel %d\n",
  6779. ht_extra->control_chan);
  6780. }
  6781. } else
  6782. ht_info->is_ht = 0;
  6783. IWL_DEBUG_MAC80211("leave\n");
  6784. return 0;
  6785. }
  6786. static int iwl4965_mac_conf_ht(struct ieee80211_hw *hw,
  6787. struct ieee80211_ht_capability *ht_cap,
  6788. struct ieee80211_ht_additional_info *ht_extra)
  6789. {
  6790. struct iwl4965_priv *priv = hw->priv;
  6791. int rs;
  6792. IWL_DEBUG_MAC80211("enter: \n");
  6793. rs = sta_ht_info_init(ht_cap, ht_extra, NULL, &priv->current_assoc_ht);
  6794. iwl4965_set_rxon_chain(priv);
  6795. if (priv && priv->assoc_id &&
  6796. (priv->iw_mode == IEEE80211_IF_TYPE_STA)) {
  6797. unsigned long flags;
  6798. spin_lock_irqsave(&priv->lock, flags);
  6799. if (priv->beacon_int)
  6800. queue_work(priv->workqueue, &priv->post_associate.work);
  6801. else
  6802. priv->call_post_assoc_from_beacon = 1;
  6803. spin_unlock_irqrestore(&priv->lock, flags);
  6804. }
  6805. IWL_DEBUG_MAC80211("leave: control channel %d\n",
  6806. ht_extra->control_chan);
  6807. return rs;
  6808. }
  6809. static void iwl4965_set_ht_capab(struct ieee80211_hw *hw,
  6810. struct ieee80211_ht_capability *ht_cap,
  6811. u8 use_wide_chan)
  6812. {
  6813. union ht_cap_info cap;
  6814. union ht_param_info param_info;
  6815. memset(&cap, 0, sizeof(union ht_cap_info));
  6816. memset(&param_info, 0, sizeof(union ht_param_info));
  6817. cap.maximal_amsdu_size = HT_IE_MAX_AMSDU_SIZE_4K;
  6818. cap.green_field = 1;
  6819. cap.short_GI20 = 1;
  6820. cap.short_GI40 = 1;
  6821. cap.supported_chan_width_set = use_wide_chan;
  6822. cap.mimo_power_save_mode = 0x3;
  6823. param_info.max_rx_ampdu_factor = CFG_HT_RX_AMPDU_FACTOR_DEF;
  6824. param_info.mpdu_density = CFG_HT_MPDU_DENSITY_DEF;
  6825. ht_cap->capabilities_info = (__le16) cpu_to_le16(cap.val);
  6826. ht_cap->mac_ht_params_info = (u8) param_info.val;
  6827. ht_cap->supported_mcs_set[0] = 0xff;
  6828. ht_cap->supported_mcs_set[1] = 0xff;
  6829. ht_cap->supported_mcs_set[4] =
  6830. (cap.supported_chan_width_set) ? 0x1: 0x0;
  6831. }
  6832. static void iwl4965_mac_get_ht_capab(struct ieee80211_hw *hw,
  6833. struct ieee80211_ht_capability *ht_cap)
  6834. {
  6835. u8 use_wide_channel = 1;
  6836. struct iwl4965_priv *priv = hw->priv;
  6837. IWL_DEBUG_MAC80211("enter: \n");
  6838. if (priv->channel_width != IWL_CHANNEL_WIDTH_40MHZ)
  6839. use_wide_channel = 0;
  6840. /* no fat tx allowed on 2.4GHZ */
  6841. if (priv->phymode != MODE_IEEE80211A)
  6842. use_wide_channel = 0;
  6843. iwl4965_set_ht_capab(hw, ht_cap, use_wide_channel);
  6844. IWL_DEBUG_MAC80211("leave: \n");
  6845. }
  6846. #endif /*CONFIG_IWL4965_HT*/
  6847. /*****************************************************************************
  6848. *
  6849. * sysfs attributes
  6850. *
  6851. *****************************************************************************/
  6852. #ifdef CONFIG_IWL4965_DEBUG
  6853. /*
  6854. * The following adds a new attribute to the sysfs representation
  6855. * of this device driver (i.e. a new file in /sys/bus/pci/drivers/iwl/)
  6856. * used for controlling the debug level.
  6857. *
  6858. * See the level definitions in iwl for details.
  6859. */
  6860. static ssize_t show_debug_level(struct device_driver *d, char *buf)
  6861. {
  6862. return sprintf(buf, "0x%08X\n", iwl4965_debug_level);
  6863. }
  6864. static ssize_t store_debug_level(struct device_driver *d,
  6865. const char *buf, size_t count)
  6866. {
  6867. char *p = (char *)buf;
  6868. u32 val;
  6869. val = simple_strtoul(p, &p, 0);
  6870. if (p == buf)
  6871. printk(KERN_INFO DRV_NAME
  6872. ": %s is not in hex or decimal form.\n", buf);
  6873. else
  6874. iwl4965_debug_level = val;
  6875. return strnlen(buf, count);
  6876. }
  6877. static DRIVER_ATTR(debug_level, S_IWUSR | S_IRUGO,
  6878. show_debug_level, store_debug_level);
  6879. #endif /* CONFIG_IWL4965_DEBUG */
  6880. static ssize_t show_rf_kill(struct device *d,
  6881. struct device_attribute *attr, char *buf)
  6882. {
  6883. /*
  6884. * 0 - RF kill not enabled
  6885. * 1 - SW based RF kill active (sysfs)
  6886. * 2 - HW based RF kill active
  6887. * 3 - Both HW and SW based RF kill active
  6888. */
  6889. struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
  6890. int val = (test_bit(STATUS_RF_KILL_SW, &priv->status) ? 0x1 : 0x0) |
  6891. (test_bit(STATUS_RF_KILL_HW, &priv->status) ? 0x2 : 0x0);
  6892. return sprintf(buf, "%i\n", val);
  6893. }
  6894. static ssize_t store_rf_kill(struct device *d,
  6895. struct device_attribute *attr,
  6896. const char *buf, size_t count)
  6897. {
  6898. struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
  6899. mutex_lock(&priv->mutex);
  6900. iwl4965_radio_kill_sw(priv, buf[0] == '1');
  6901. mutex_unlock(&priv->mutex);
  6902. return count;
  6903. }
  6904. static DEVICE_ATTR(rf_kill, S_IWUSR | S_IRUGO, show_rf_kill, store_rf_kill);
  6905. static ssize_t show_temperature(struct device *d,
  6906. struct device_attribute *attr, char *buf)
  6907. {
  6908. struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
  6909. if (!iwl4965_is_alive(priv))
  6910. return -EAGAIN;
  6911. return sprintf(buf, "%d\n", iwl4965_hw_get_temperature(priv));
  6912. }
  6913. static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
  6914. static ssize_t show_rs_window(struct device *d,
  6915. struct device_attribute *attr,
  6916. char *buf)
  6917. {
  6918. struct iwl4965_priv *priv = d->driver_data;
  6919. return iwl4965_fill_rs_info(priv->hw, buf, IWL_AP_ID);
  6920. }
  6921. static DEVICE_ATTR(rs_window, S_IRUGO, show_rs_window, NULL);
  6922. static ssize_t show_tx_power(struct device *d,
  6923. struct device_attribute *attr, char *buf)
  6924. {
  6925. struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
  6926. return sprintf(buf, "%d\n", priv->user_txpower_limit);
  6927. }
  6928. static ssize_t store_tx_power(struct device *d,
  6929. struct device_attribute *attr,
  6930. const char *buf, size_t count)
  6931. {
  6932. struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
  6933. char *p = (char *)buf;
  6934. u32 val;
  6935. val = simple_strtoul(p, &p, 10);
  6936. if (p == buf)
  6937. printk(KERN_INFO DRV_NAME
  6938. ": %s is not in decimal form.\n", buf);
  6939. else
  6940. iwl4965_hw_reg_set_txpower(priv, val);
  6941. return count;
  6942. }
  6943. static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
  6944. static ssize_t show_flags(struct device *d,
  6945. struct device_attribute *attr, char *buf)
  6946. {
  6947. struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
  6948. return sprintf(buf, "0x%04X\n", priv->active_rxon.flags);
  6949. }
  6950. static ssize_t store_flags(struct device *d,
  6951. struct device_attribute *attr,
  6952. const char *buf, size_t count)
  6953. {
  6954. struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
  6955. u32 flags = simple_strtoul(buf, NULL, 0);
  6956. mutex_lock(&priv->mutex);
  6957. if (le32_to_cpu(priv->staging_rxon.flags) != flags) {
  6958. /* Cancel any currently running scans... */
  6959. if (iwl4965_scan_cancel_timeout(priv, 100))
  6960. IWL_WARNING("Could not cancel scan.\n");
  6961. else {
  6962. IWL_DEBUG_INFO("Committing rxon.flags = 0x%04X\n",
  6963. flags);
  6964. priv->staging_rxon.flags = cpu_to_le32(flags);
  6965. iwl4965_commit_rxon(priv);
  6966. }
  6967. }
  6968. mutex_unlock(&priv->mutex);
  6969. return count;
  6970. }
  6971. static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags);
  6972. static ssize_t show_filter_flags(struct device *d,
  6973. struct device_attribute *attr, char *buf)
  6974. {
  6975. struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
  6976. return sprintf(buf, "0x%04X\n",
  6977. le32_to_cpu(priv->active_rxon.filter_flags));
  6978. }
  6979. static ssize_t store_filter_flags(struct device *d,
  6980. struct device_attribute *attr,
  6981. const char *buf, size_t count)
  6982. {
  6983. struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
  6984. u32 filter_flags = simple_strtoul(buf, NULL, 0);
  6985. mutex_lock(&priv->mutex);
  6986. if (le32_to_cpu(priv->staging_rxon.filter_flags) != filter_flags) {
  6987. /* Cancel any currently running scans... */
  6988. if (iwl4965_scan_cancel_timeout(priv, 100))
  6989. IWL_WARNING("Could not cancel scan.\n");
  6990. else {
  6991. IWL_DEBUG_INFO("Committing rxon.filter_flags = "
  6992. "0x%04X\n", filter_flags);
  6993. priv->staging_rxon.filter_flags =
  6994. cpu_to_le32(filter_flags);
  6995. iwl4965_commit_rxon(priv);
  6996. }
  6997. }
  6998. mutex_unlock(&priv->mutex);
  6999. return count;
  7000. }
  7001. static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags,
  7002. store_filter_flags);
  7003. static ssize_t show_tune(struct device *d,
  7004. struct device_attribute *attr, char *buf)
  7005. {
  7006. struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
  7007. return sprintf(buf, "0x%04X\n",
  7008. (priv->phymode << 8) |
  7009. le16_to_cpu(priv->active_rxon.channel));
  7010. }
  7011. static void iwl4965_set_flags_for_phymode(struct iwl4965_priv *priv, u8 phymode);
  7012. static ssize_t store_tune(struct device *d,
  7013. struct device_attribute *attr,
  7014. const char *buf, size_t count)
  7015. {
  7016. struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
  7017. char *p = (char *)buf;
  7018. u16 tune = simple_strtoul(p, &p, 0);
  7019. u8 phymode = (tune >> 8) & 0xff;
  7020. u16 channel = tune & 0xff;
  7021. IWL_DEBUG_INFO("Tune request to:%d channel:%d\n", phymode, channel);
  7022. mutex_lock(&priv->mutex);
  7023. if ((le16_to_cpu(priv->staging_rxon.channel) != channel) ||
  7024. (priv->phymode != phymode)) {
  7025. const struct iwl4965_channel_info *ch_info;
  7026. ch_info = iwl4965_get_channel_info(priv, phymode, channel);
  7027. if (!ch_info) {
  7028. IWL_WARNING("Requested invalid phymode/channel "
  7029. "combination: %d %d\n", phymode, channel);
  7030. mutex_unlock(&priv->mutex);
  7031. return -EINVAL;
  7032. }
  7033. /* Cancel any currently running scans... */
  7034. if (iwl4965_scan_cancel_timeout(priv, 100))
  7035. IWL_WARNING("Could not cancel scan.\n");
  7036. else {
  7037. IWL_DEBUG_INFO("Committing phymode and "
  7038. "rxon.channel = %d %d\n",
  7039. phymode, channel);
  7040. iwl4965_set_rxon_channel(priv, phymode, channel);
  7041. iwl4965_set_flags_for_phymode(priv, phymode);
  7042. iwl4965_set_rate(priv);
  7043. iwl4965_commit_rxon(priv);
  7044. }
  7045. }
  7046. mutex_unlock(&priv->mutex);
  7047. return count;
  7048. }
  7049. static DEVICE_ATTR(tune, S_IWUSR | S_IRUGO, show_tune, store_tune);
  7050. #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
  7051. static ssize_t show_measurement(struct device *d,
  7052. struct device_attribute *attr, char *buf)
  7053. {
  7054. struct iwl4965_priv *priv = dev_get_drvdata(d);
  7055. struct iwl4965_spectrum_notification measure_report;
  7056. u32 size = sizeof(measure_report), len = 0, ofs = 0;
  7057. u8 *data = (u8 *) & measure_report;
  7058. unsigned long flags;
  7059. spin_lock_irqsave(&priv->lock, flags);
  7060. if (!(priv->measurement_status & MEASUREMENT_READY)) {
  7061. spin_unlock_irqrestore(&priv->lock, flags);
  7062. return 0;
  7063. }
  7064. memcpy(&measure_report, &priv->measure_report, size);
  7065. priv->measurement_status = 0;
  7066. spin_unlock_irqrestore(&priv->lock, flags);
  7067. while (size && (PAGE_SIZE - len)) {
  7068. hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
  7069. PAGE_SIZE - len, 1);
  7070. len = strlen(buf);
  7071. if (PAGE_SIZE - len)
  7072. buf[len++] = '\n';
  7073. ofs += 16;
  7074. size -= min(size, 16U);
  7075. }
  7076. return len;
  7077. }
  7078. static ssize_t store_measurement(struct device *d,
  7079. struct device_attribute *attr,
  7080. const char *buf, size_t count)
  7081. {
  7082. struct iwl4965_priv *priv = dev_get_drvdata(d);
  7083. struct ieee80211_measurement_params params = {
  7084. .channel = le16_to_cpu(priv->active_rxon.channel),
  7085. .start_time = cpu_to_le64(priv->last_tsf),
  7086. .duration = cpu_to_le16(1),
  7087. };
  7088. u8 type = IWL_MEASURE_BASIC;
  7089. u8 buffer[32];
  7090. u8 channel;
  7091. if (count) {
  7092. char *p = buffer;
  7093. strncpy(buffer, buf, min(sizeof(buffer), count));
  7094. channel = simple_strtoul(p, NULL, 0);
  7095. if (channel)
  7096. params.channel = channel;
  7097. p = buffer;
  7098. while (*p && *p != ' ')
  7099. p++;
  7100. if (*p)
  7101. type = simple_strtoul(p + 1, NULL, 0);
  7102. }
  7103. IWL_DEBUG_INFO("Invoking measurement of type %d on "
  7104. "channel %d (for '%s')\n", type, params.channel, buf);
  7105. iwl4965_get_measurement(priv, &params, type);
  7106. return count;
  7107. }
  7108. static DEVICE_ATTR(measurement, S_IRUSR | S_IWUSR,
  7109. show_measurement, store_measurement);
  7110. #endif /* CONFIG_IWL4965_SPECTRUM_MEASUREMENT */
  7111. static ssize_t store_retry_rate(struct device *d,
  7112. struct device_attribute *attr,
  7113. const char *buf, size_t count)
  7114. {
  7115. struct iwl4965_priv *priv = dev_get_drvdata(d);
  7116. priv->retry_rate = simple_strtoul(buf, NULL, 0);
  7117. if (priv->retry_rate <= 0)
  7118. priv->retry_rate = 1;
  7119. return count;
  7120. }
  7121. static ssize_t show_retry_rate(struct device *d,
  7122. struct device_attribute *attr, char *buf)
  7123. {
  7124. struct iwl4965_priv *priv = dev_get_drvdata(d);
  7125. return sprintf(buf, "%d", priv->retry_rate);
  7126. }
  7127. static DEVICE_ATTR(retry_rate, S_IWUSR | S_IRUSR, show_retry_rate,
  7128. store_retry_rate);
  7129. static ssize_t store_power_level(struct device *d,
  7130. struct device_attribute *attr,
  7131. const char *buf, size_t count)
  7132. {
  7133. struct iwl4965_priv *priv = dev_get_drvdata(d);
  7134. int rc;
  7135. int mode;
  7136. mode = simple_strtoul(buf, NULL, 0);
  7137. mutex_lock(&priv->mutex);
  7138. if (!iwl4965_is_ready(priv)) {
  7139. rc = -EAGAIN;
  7140. goto out;
  7141. }
  7142. if ((mode < 1) || (mode > IWL_POWER_LIMIT) || (mode == IWL_POWER_AC))
  7143. mode = IWL_POWER_AC;
  7144. else
  7145. mode |= IWL_POWER_ENABLED;
  7146. if (mode != priv->power_mode) {
  7147. rc = iwl4965_send_power_mode(priv, IWL_POWER_LEVEL(mode));
  7148. if (rc) {
  7149. IWL_DEBUG_MAC80211("failed setting power mode.\n");
  7150. goto out;
  7151. }
  7152. priv->power_mode = mode;
  7153. }
  7154. rc = count;
  7155. out:
  7156. mutex_unlock(&priv->mutex);
  7157. return rc;
  7158. }
  7159. #define MAX_WX_STRING 80
  7160. /* Values are in microsecond */
  7161. static const s32 timeout_duration[] = {
  7162. 350000,
  7163. 250000,
  7164. 75000,
  7165. 37000,
  7166. 25000,
  7167. };
  7168. static const s32 period_duration[] = {
  7169. 400000,
  7170. 700000,
  7171. 1000000,
  7172. 1000000,
  7173. 1000000
  7174. };
  7175. static ssize_t show_power_level(struct device *d,
  7176. struct device_attribute *attr, char *buf)
  7177. {
  7178. struct iwl4965_priv *priv = dev_get_drvdata(d);
  7179. int level = IWL_POWER_LEVEL(priv->power_mode);
  7180. char *p = buf;
  7181. p += sprintf(p, "%d ", level);
  7182. switch (level) {
  7183. case IWL_POWER_MODE_CAM:
  7184. case IWL_POWER_AC:
  7185. p += sprintf(p, "(AC)");
  7186. break;
  7187. case IWL_POWER_BATTERY:
  7188. p += sprintf(p, "(BATTERY)");
  7189. break;
  7190. default:
  7191. p += sprintf(p,
  7192. "(Timeout %dms, Period %dms)",
  7193. timeout_duration[level - 1] / 1000,
  7194. period_duration[level - 1] / 1000);
  7195. }
  7196. if (!(priv->power_mode & IWL_POWER_ENABLED))
  7197. p += sprintf(p, " OFF\n");
  7198. else
  7199. p += sprintf(p, " \n");
  7200. return (p - buf + 1);
  7201. }
  7202. static DEVICE_ATTR(power_level, S_IWUSR | S_IRUSR, show_power_level,
  7203. store_power_level);
  7204. static ssize_t show_channels(struct device *d,
  7205. struct device_attribute *attr, char *buf)
  7206. {
  7207. struct iwl4965_priv *priv = dev_get_drvdata(d);
  7208. int len = 0, i;
  7209. struct ieee80211_channel *channels = NULL;
  7210. const struct ieee80211_hw_mode *hw_mode = NULL;
  7211. int count = 0;
  7212. if (!iwl4965_is_ready(priv))
  7213. return -EAGAIN;
  7214. hw_mode = iwl4965_get_hw_mode(priv, MODE_IEEE80211G);
  7215. if (!hw_mode)
  7216. hw_mode = iwl4965_get_hw_mode(priv, MODE_IEEE80211B);
  7217. if (hw_mode) {
  7218. channels = hw_mode->channels;
  7219. count = hw_mode->num_channels;
  7220. }
  7221. len +=
  7222. sprintf(&buf[len],
  7223. "Displaying %d channels in 2.4GHz band "
  7224. "(802.11bg):\n", count);
  7225. for (i = 0; i < count; i++)
  7226. len += sprintf(&buf[len], "%d: %ddBm: BSS%s%s, %s.\n",
  7227. channels[i].chan,
  7228. channels[i].power_level,
  7229. channels[i].
  7230. flag & IEEE80211_CHAN_W_RADAR_DETECT ?
  7231. " (IEEE 802.11h required)" : "",
  7232. (!(channels[i].flag & IEEE80211_CHAN_W_IBSS)
  7233. || (channels[i].
  7234. flag &
  7235. IEEE80211_CHAN_W_RADAR_DETECT)) ? "" :
  7236. ", IBSS",
  7237. channels[i].
  7238. flag & IEEE80211_CHAN_W_ACTIVE_SCAN ?
  7239. "active/passive" : "passive only");
  7240. hw_mode = iwl4965_get_hw_mode(priv, MODE_IEEE80211A);
  7241. if (hw_mode) {
  7242. channels = hw_mode->channels;
  7243. count = hw_mode->num_channels;
  7244. } else {
  7245. channels = NULL;
  7246. count = 0;
  7247. }
  7248. len += sprintf(&buf[len], "Displaying %d channels in 5.2GHz band "
  7249. "(802.11a):\n", count);
  7250. for (i = 0; i < count; i++)
  7251. len += sprintf(&buf[len], "%d: %ddBm: BSS%s%s, %s.\n",
  7252. channels[i].chan,
  7253. channels[i].power_level,
  7254. channels[i].
  7255. flag & IEEE80211_CHAN_W_RADAR_DETECT ?
  7256. " (IEEE 802.11h required)" : "",
  7257. (!(channels[i].flag & IEEE80211_CHAN_W_IBSS)
  7258. || (channels[i].
  7259. flag &
  7260. IEEE80211_CHAN_W_RADAR_DETECT)) ? "" :
  7261. ", IBSS",
  7262. channels[i].
  7263. flag & IEEE80211_CHAN_W_ACTIVE_SCAN ?
  7264. "active/passive" : "passive only");
  7265. return len;
  7266. }
  7267. static DEVICE_ATTR(channels, S_IRUSR, show_channels, NULL);
  7268. static ssize_t show_statistics(struct device *d,
  7269. struct device_attribute *attr, char *buf)
  7270. {
  7271. struct iwl4965_priv *priv = dev_get_drvdata(d);
  7272. u32 size = sizeof(struct iwl4965_notif_statistics);
  7273. u32 len = 0, ofs = 0;
  7274. u8 *data = (u8 *) & priv->statistics;
  7275. int rc = 0;
  7276. if (!iwl4965_is_alive(priv))
  7277. return -EAGAIN;
  7278. mutex_lock(&priv->mutex);
  7279. rc = iwl4965_send_statistics_request(priv);
  7280. mutex_unlock(&priv->mutex);
  7281. if (rc) {
  7282. len = sprintf(buf,
  7283. "Error sending statistics request: 0x%08X\n", rc);
  7284. return len;
  7285. }
  7286. while (size && (PAGE_SIZE - len)) {
  7287. hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
  7288. PAGE_SIZE - len, 1);
  7289. len = strlen(buf);
  7290. if (PAGE_SIZE - len)
  7291. buf[len++] = '\n';
  7292. ofs += 16;
  7293. size -= min(size, 16U);
  7294. }
  7295. return len;
  7296. }
  7297. static DEVICE_ATTR(statistics, S_IRUGO, show_statistics, NULL);
  7298. static ssize_t show_antenna(struct device *d,
  7299. struct device_attribute *attr, char *buf)
  7300. {
  7301. struct iwl4965_priv *priv = dev_get_drvdata(d);
  7302. if (!iwl4965_is_alive(priv))
  7303. return -EAGAIN;
  7304. return sprintf(buf, "%d\n", priv->antenna);
  7305. }
  7306. static ssize_t store_antenna(struct device *d,
  7307. struct device_attribute *attr,
  7308. const char *buf, size_t count)
  7309. {
  7310. int ant;
  7311. struct iwl4965_priv *priv = dev_get_drvdata(d);
  7312. if (count == 0)
  7313. return 0;
  7314. if (sscanf(buf, "%1i", &ant) != 1) {
  7315. IWL_DEBUG_INFO("not in hex or decimal form.\n");
  7316. return count;
  7317. }
  7318. if ((ant >= 0) && (ant <= 2)) {
  7319. IWL_DEBUG_INFO("Setting antenna select to %d.\n", ant);
  7320. priv->antenna = (enum iwl4965_antenna)ant;
  7321. } else
  7322. IWL_DEBUG_INFO("Bad antenna select value %d.\n", ant);
  7323. return count;
  7324. }
  7325. static DEVICE_ATTR(antenna, S_IWUSR | S_IRUGO, show_antenna, store_antenna);
  7326. static ssize_t show_status(struct device *d,
  7327. struct device_attribute *attr, char *buf)
  7328. {
  7329. struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
  7330. if (!iwl4965_is_alive(priv))
  7331. return -EAGAIN;
  7332. return sprintf(buf, "0x%08x\n", (int)priv->status);
  7333. }
  7334. static DEVICE_ATTR(status, S_IRUGO, show_status, NULL);
  7335. static ssize_t dump_error_log(struct device *d,
  7336. struct device_attribute *attr,
  7337. const char *buf, size_t count)
  7338. {
  7339. char *p = (char *)buf;
  7340. if (p[0] == '1')
  7341. iwl4965_dump_nic_error_log((struct iwl4965_priv *)d->driver_data);
  7342. return strnlen(buf, count);
  7343. }
  7344. static DEVICE_ATTR(dump_errors, S_IWUSR, NULL, dump_error_log);
  7345. static ssize_t dump_event_log(struct device *d,
  7346. struct device_attribute *attr,
  7347. const char *buf, size_t count)
  7348. {
  7349. char *p = (char *)buf;
  7350. if (p[0] == '1')
  7351. iwl4965_dump_nic_event_log((struct iwl4965_priv *)d->driver_data);
  7352. return strnlen(buf, count);
  7353. }
  7354. static DEVICE_ATTR(dump_events, S_IWUSR, NULL, dump_event_log);
  7355. /*****************************************************************************
  7356. *
  7357. * driver setup and teardown
  7358. *
  7359. *****************************************************************************/
  7360. static void iwl4965_setup_deferred_work(struct iwl4965_priv *priv)
  7361. {
  7362. priv->workqueue = create_workqueue(DRV_NAME);
  7363. init_waitqueue_head(&priv->wait_command_queue);
  7364. INIT_WORK(&priv->up, iwl4965_bg_up);
  7365. INIT_WORK(&priv->restart, iwl4965_bg_restart);
  7366. INIT_WORK(&priv->rx_replenish, iwl4965_bg_rx_replenish);
  7367. INIT_WORK(&priv->scan_completed, iwl4965_bg_scan_completed);
  7368. INIT_WORK(&priv->request_scan, iwl4965_bg_request_scan);
  7369. INIT_WORK(&priv->abort_scan, iwl4965_bg_abort_scan);
  7370. INIT_WORK(&priv->rf_kill, iwl4965_bg_rf_kill);
  7371. INIT_WORK(&priv->beacon_update, iwl4965_bg_beacon_update);
  7372. INIT_DELAYED_WORK(&priv->post_associate, iwl4965_bg_post_associate);
  7373. INIT_DELAYED_WORK(&priv->init_alive_start, iwl4965_bg_init_alive_start);
  7374. INIT_DELAYED_WORK(&priv->alive_start, iwl4965_bg_alive_start);
  7375. INIT_DELAYED_WORK(&priv->scan_check, iwl4965_bg_scan_check);
  7376. iwl4965_hw_setup_deferred_work(priv);
  7377. tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
  7378. iwl4965_irq_tasklet, (unsigned long)priv);
  7379. }
  7380. static void iwl4965_cancel_deferred_work(struct iwl4965_priv *priv)
  7381. {
  7382. iwl4965_hw_cancel_deferred_work(priv);
  7383. cancel_delayed_work_sync(&priv->init_alive_start);
  7384. cancel_delayed_work(&priv->scan_check);
  7385. cancel_delayed_work(&priv->alive_start);
  7386. cancel_delayed_work(&priv->post_associate);
  7387. cancel_work_sync(&priv->beacon_update);
  7388. }
  7389. static struct attribute *iwl4965_sysfs_entries[] = {
  7390. &dev_attr_antenna.attr,
  7391. &dev_attr_channels.attr,
  7392. &dev_attr_dump_errors.attr,
  7393. &dev_attr_dump_events.attr,
  7394. &dev_attr_flags.attr,
  7395. &dev_attr_filter_flags.attr,
  7396. #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
  7397. &dev_attr_measurement.attr,
  7398. #endif
  7399. &dev_attr_power_level.attr,
  7400. &dev_attr_retry_rate.attr,
  7401. &dev_attr_rf_kill.attr,
  7402. &dev_attr_rs_window.attr,
  7403. &dev_attr_statistics.attr,
  7404. &dev_attr_status.attr,
  7405. &dev_attr_temperature.attr,
  7406. &dev_attr_tune.attr,
  7407. &dev_attr_tx_power.attr,
  7408. NULL
  7409. };
  7410. static struct attribute_group iwl4965_attribute_group = {
  7411. .name = NULL, /* put in device directory */
  7412. .attrs = iwl4965_sysfs_entries,
  7413. };
  7414. static struct ieee80211_ops iwl4965_hw_ops = {
  7415. .tx = iwl4965_mac_tx,
  7416. .start = iwl4965_mac_start,
  7417. .stop = iwl4965_mac_stop,
  7418. .add_interface = iwl4965_mac_add_interface,
  7419. .remove_interface = iwl4965_mac_remove_interface,
  7420. .config = iwl4965_mac_config,
  7421. .config_interface = iwl4965_mac_config_interface,
  7422. .configure_filter = iwl4965_configure_filter,
  7423. .set_key = iwl4965_mac_set_key,
  7424. .get_stats = iwl4965_mac_get_stats,
  7425. .get_tx_stats = iwl4965_mac_get_tx_stats,
  7426. .conf_tx = iwl4965_mac_conf_tx,
  7427. .get_tsf = iwl4965_mac_get_tsf,
  7428. .reset_tsf = iwl4965_mac_reset_tsf,
  7429. .beacon_update = iwl4965_mac_beacon_update,
  7430. .erp_ie_changed = iwl4965_mac_erp_ie_changed,
  7431. #ifdef CONFIG_IWL4965_HT
  7432. .conf_ht = iwl4965_mac_conf_ht,
  7433. .get_ht_capab = iwl4965_mac_get_ht_capab,
  7434. #ifdef CONFIG_IWL4965_HT_AGG
  7435. .ht_tx_agg_start = iwl4965_mac_ht_tx_agg_start,
  7436. .ht_tx_agg_stop = iwl4965_mac_ht_tx_agg_stop,
  7437. .ht_rx_agg_start = iwl4965_mac_ht_rx_agg_start,
  7438. .ht_rx_agg_stop = iwl4965_mac_ht_rx_agg_stop,
  7439. #endif /* CONFIG_IWL4965_HT_AGG */
  7440. #endif /* CONFIG_IWL4965_HT */
  7441. .hw_scan = iwl4965_mac_hw_scan
  7442. };
  7443. static int iwl4965_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
  7444. {
  7445. int err = 0;
  7446. struct iwl4965_priv *priv;
  7447. struct ieee80211_hw *hw;
  7448. int i;
  7449. if (iwl4965_param_disable_hw_scan) {
  7450. IWL_DEBUG_INFO("Disabling hw_scan\n");
  7451. iwl4965_hw_ops.hw_scan = NULL;
  7452. }
  7453. if ((iwl4965_param_queues_num > IWL_MAX_NUM_QUEUES) ||
  7454. (iwl4965_param_queues_num < IWL_MIN_NUM_QUEUES)) {
  7455. IWL_ERROR("invalid queues_num, should be between %d and %d\n",
  7456. IWL_MIN_NUM_QUEUES, IWL_MAX_NUM_QUEUES);
  7457. err = -EINVAL;
  7458. goto out;
  7459. }
  7460. /* mac80211 allocates memory for this device instance, including
  7461. * space for this driver's private structure */
  7462. hw = ieee80211_alloc_hw(sizeof(struct iwl4965_priv), &iwl4965_hw_ops);
  7463. if (hw == NULL) {
  7464. IWL_ERROR("Can not allocate network device\n");
  7465. err = -ENOMEM;
  7466. goto out;
  7467. }
  7468. SET_IEEE80211_DEV(hw, &pdev->dev);
  7469. hw->rate_control_algorithm = "iwl-4965-rs";
  7470. IWL_DEBUG_INFO("*** LOAD DRIVER ***\n");
  7471. priv = hw->priv;
  7472. priv->hw = hw;
  7473. priv->pci_dev = pdev;
  7474. priv->antenna = (enum iwl4965_antenna)iwl4965_param_antenna;
  7475. #ifdef CONFIG_IWL4965_DEBUG
  7476. iwl4965_debug_level = iwl4965_param_debug;
  7477. atomic_set(&priv->restrict_refcnt, 0);
  7478. #endif
  7479. priv->retry_rate = 1;
  7480. priv->ibss_beacon = NULL;
  7481. /* Tell mac80211 and its clients (e.g. Wireless Extensions)
  7482. * the range of signal quality values that we'll provide.
  7483. * Negative values for level/noise indicate that we'll provide dBm.
  7484. * For WE, at least, non-0 values here *enable* display of values
  7485. * in app (iwconfig). */
  7486. hw->max_rssi = -20; /* signal level, negative indicates dBm */
  7487. hw->max_noise = -20; /* noise level, negative indicates dBm */
  7488. hw->max_signal = 100; /* link quality indication (%) */
  7489. /* Tell mac80211 our Tx characteristics */
  7490. hw->flags = IEEE80211_HW_HOST_GEN_BEACON_TEMPLATE;
  7491. hw->queues = 4;
  7492. #ifdef CONFIG_IWL4965_HT
  7493. #ifdef CONFIG_IWL4965_HT_AGG
  7494. hw->queues = 16;
  7495. #endif /* CONFIG_IWL4965_HT_AGG */
  7496. #endif /* CONFIG_IWL4965_HT */
  7497. spin_lock_init(&priv->lock);
  7498. spin_lock_init(&priv->power_data.lock);
  7499. spin_lock_init(&priv->sta_lock);
  7500. spin_lock_init(&priv->hcmd_lock);
  7501. spin_lock_init(&priv->lq_mngr.lock);
  7502. for (i = 0; i < IWL_IBSS_MAC_HASH_SIZE; i++)
  7503. INIT_LIST_HEAD(&priv->ibss_mac_hash[i]);
  7504. INIT_LIST_HEAD(&priv->free_frames);
  7505. mutex_init(&priv->mutex);
  7506. if (pci_enable_device(pdev)) {
  7507. err = -ENODEV;
  7508. goto out_ieee80211_free_hw;
  7509. }
  7510. pci_set_master(pdev);
  7511. iwl4965_clear_stations_table(priv);
  7512. priv->data_retry_limit = -1;
  7513. priv->ieee_channels = NULL;
  7514. priv->ieee_rates = NULL;
  7515. priv->phymode = -1;
  7516. err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
  7517. if (!err)
  7518. err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
  7519. if (err) {
  7520. printk(KERN_WARNING DRV_NAME ": No suitable DMA available.\n");
  7521. goto out_pci_disable_device;
  7522. }
  7523. pci_set_drvdata(pdev, priv);
  7524. err = pci_request_regions(pdev, DRV_NAME);
  7525. if (err)
  7526. goto out_pci_disable_device;
  7527. /* We disable the RETRY_TIMEOUT register (0x41) to keep
  7528. * PCI Tx retries from interfering with C3 CPU state */
  7529. pci_write_config_byte(pdev, 0x41, 0x00);
  7530. priv->hw_base = pci_iomap(pdev, 0, 0);
  7531. if (!priv->hw_base) {
  7532. err = -ENODEV;
  7533. goto out_pci_release_regions;
  7534. }
  7535. IWL_DEBUG_INFO("pci_resource_len = 0x%08llx\n",
  7536. (unsigned long long) pci_resource_len(pdev, 0));
  7537. IWL_DEBUG_INFO("pci_resource_base = %p\n", priv->hw_base);
  7538. /* Initialize module parameter values here */
  7539. if (iwl4965_param_disable) {
  7540. set_bit(STATUS_RF_KILL_SW, &priv->status);
  7541. IWL_DEBUG_INFO("Radio disabled.\n");
  7542. }
  7543. priv->iw_mode = IEEE80211_IF_TYPE_STA;
  7544. priv->ps_mode = 0;
  7545. priv->use_ant_b_for_management_frame = 1; /* start with ant B */
  7546. priv->is_ht_enabled = 1;
  7547. priv->channel_width = IWL_CHANNEL_WIDTH_40MHZ;
  7548. priv->valid_antenna = 0x7; /* assume all 3 connected */
  7549. priv->ps_mode = IWL_MIMO_PS_NONE;
  7550. iwl4965_set_rxon_chain(priv);
  7551. printk(KERN_INFO DRV_NAME
  7552. ": Detected Intel Wireless WiFi Link 4965AGN\n");
  7553. /* Device-specific setup */
  7554. if (iwl4965_hw_set_hw_setting(priv)) {
  7555. IWL_ERROR("failed to set hw settings\n");
  7556. mutex_unlock(&priv->mutex);
  7557. goto out_iounmap;
  7558. }
  7559. #ifdef CONFIG_IWL4965_QOS
  7560. if (iwl4965_param_qos_enable)
  7561. priv->qos_data.qos_enable = 1;
  7562. iwl4965_reset_qos(priv);
  7563. priv->qos_data.qos_active = 0;
  7564. priv->qos_data.qos_cap.val = 0;
  7565. #endif /* CONFIG_IWL4965_QOS */
  7566. iwl4965_set_rxon_channel(priv, MODE_IEEE80211G, 6);
  7567. iwl4965_setup_deferred_work(priv);
  7568. iwl4965_setup_rx_handlers(priv);
  7569. priv->rates_mask = IWL_RATES_MASK;
  7570. /* If power management is turned on, default to AC mode */
  7571. priv->power_mode = IWL_POWER_AC;
  7572. priv->user_txpower_limit = IWL_DEFAULT_TX_POWER;
  7573. iwl4965_disable_interrupts(priv);
  7574. pci_enable_msi(pdev);
  7575. err = request_irq(pdev->irq, iwl4965_isr, IRQF_SHARED, DRV_NAME, priv);
  7576. if (err) {
  7577. IWL_ERROR("Error allocating IRQ %d\n", pdev->irq);
  7578. goto out_disable_msi;
  7579. }
  7580. mutex_lock(&priv->mutex);
  7581. err = sysfs_create_group(&pdev->dev.kobj, &iwl4965_attribute_group);
  7582. if (err) {
  7583. IWL_ERROR("failed to create sysfs device attributes\n");
  7584. mutex_unlock(&priv->mutex);
  7585. goto out_release_irq;
  7586. }
  7587. /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
  7588. * ucode filename and max sizes are card-specific. */
  7589. err = iwl4965_read_ucode(priv);
  7590. if (err) {
  7591. IWL_ERROR("Could not read microcode: %d\n", err);
  7592. mutex_unlock(&priv->mutex);
  7593. goto out_pci_alloc;
  7594. }
  7595. mutex_unlock(&priv->mutex);
  7596. IWL_DEBUG_INFO("Queueing UP work.\n");
  7597. queue_work(priv->workqueue, &priv->up);
  7598. return 0;
  7599. out_pci_alloc:
  7600. iwl4965_dealloc_ucode_pci(priv);
  7601. sysfs_remove_group(&pdev->dev.kobj, &iwl4965_attribute_group);
  7602. out_release_irq:
  7603. free_irq(pdev->irq, priv);
  7604. out_disable_msi:
  7605. pci_disable_msi(pdev);
  7606. destroy_workqueue(priv->workqueue);
  7607. priv->workqueue = NULL;
  7608. iwl4965_unset_hw_setting(priv);
  7609. out_iounmap:
  7610. pci_iounmap(pdev, priv->hw_base);
  7611. out_pci_release_regions:
  7612. pci_release_regions(pdev);
  7613. out_pci_disable_device:
  7614. pci_disable_device(pdev);
  7615. pci_set_drvdata(pdev, NULL);
  7616. out_ieee80211_free_hw:
  7617. ieee80211_free_hw(priv->hw);
  7618. out:
  7619. return err;
  7620. }
  7621. static void iwl4965_pci_remove(struct pci_dev *pdev)
  7622. {
  7623. struct iwl4965_priv *priv = pci_get_drvdata(pdev);
  7624. struct list_head *p, *q;
  7625. int i;
  7626. if (!priv)
  7627. return;
  7628. IWL_DEBUG_INFO("*** UNLOAD DRIVER ***\n");
  7629. set_bit(STATUS_EXIT_PENDING, &priv->status);
  7630. iwl4965_down(priv);
  7631. /* Free MAC hash list for ADHOC */
  7632. for (i = 0; i < IWL_IBSS_MAC_HASH_SIZE; i++) {
  7633. list_for_each_safe(p, q, &priv->ibss_mac_hash[i]) {
  7634. list_del(p);
  7635. kfree(list_entry(p, struct iwl4965_ibss_seq, list));
  7636. }
  7637. }
  7638. sysfs_remove_group(&pdev->dev.kobj, &iwl4965_attribute_group);
  7639. iwl4965_dealloc_ucode_pci(priv);
  7640. if (priv->rxq.bd)
  7641. iwl4965_rx_queue_free(priv, &priv->rxq);
  7642. iwl4965_hw_txq_ctx_free(priv);
  7643. iwl4965_unset_hw_setting(priv);
  7644. iwl4965_clear_stations_table(priv);
  7645. if (priv->mac80211_registered) {
  7646. ieee80211_unregister_hw(priv->hw);
  7647. iwl4965_rate_control_unregister(priv->hw);
  7648. }
  7649. /*netif_stop_queue(dev); */
  7650. flush_workqueue(priv->workqueue);
  7651. /* ieee80211_unregister_hw calls iwl4965_mac_stop, which flushes
  7652. * priv->workqueue... so we can't take down the workqueue
  7653. * until now... */
  7654. destroy_workqueue(priv->workqueue);
  7655. priv->workqueue = NULL;
  7656. free_irq(pdev->irq, priv);
  7657. pci_disable_msi(pdev);
  7658. pci_iounmap(pdev, priv->hw_base);
  7659. pci_release_regions(pdev);
  7660. pci_disable_device(pdev);
  7661. pci_set_drvdata(pdev, NULL);
  7662. kfree(priv->channel_info);
  7663. kfree(priv->ieee_channels);
  7664. kfree(priv->ieee_rates);
  7665. if (priv->ibss_beacon)
  7666. dev_kfree_skb(priv->ibss_beacon);
  7667. ieee80211_free_hw(priv->hw);
  7668. }
  7669. #ifdef CONFIG_PM
  7670. static int iwl4965_pci_suspend(struct pci_dev *pdev, pm_message_t state)
  7671. {
  7672. struct iwl4965_priv *priv = pci_get_drvdata(pdev);
  7673. set_bit(STATUS_IN_SUSPEND, &priv->status);
  7674. /* Take down the device; powers it off, etc. */
  7675. iwl4965_down(priv);
  7676. if (priv->mac80211_registered)
  7677. ieee80211_stop_queues(priv->hw);
  7678. pci_save_state(pdev);
  7679. pci_disable_device(pdev);
  7680. pci_set_power_state(pdev, PCI_D3hot);
  7681. return 0;
  7682. }
  7683. static void iwl4965_resume(struct iwl4965_priv *priv)
  7684. {
  7685. unsigned long flags;
  7686. /* The following it a temporary work around due to the
  7687. * suspend / resume not fully initializing the NIC correctly.
  7688. * Without all of the following, resume will not attempt to take
  7689. * down the NIC (it shouldn't really need to) and will just try
  7690. * and bring the NIC back up. However that fails during the
  7691. * ucode verification process. This then causes iwl4965_down to be
  7692. * called *after* iwl4965_hw_nic_init() has succeeded -- which
  7693. * then lets the next init sequence succeed. So, we've
  7694. * replicated all of that NIC init code here... */
  7695. iwl4965_write32(priv, CSR_INT, 0xFFFFFFFF);
  7696. iwl4965_hw_nic_init(priv);
  7697. iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  7698. iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR,
  7699. CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  7700. iwl4965_write32(priv, CSR_INT, 0xFFFFFFFF);
  7701. iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  7702. iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  7703. /* tell the device to stop sending interrupts */
  7704. iwl4965_disable_interrupts(priv);
  7705. spin_lock_irqsave(&priv->lock, flags);
  7706. iwl4965_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
  7707. if (!iwl4965_grab_nic_access(priv)) {
  7708. iwl4965_write_prph(priv, APMG_CLK_DIS_REG,
  7709. APMG_CLK_VAL_DMA_CLK_RQT);
  7710. iwl4965_release_nic_access(priv);
  7711. }
  7712. spin_unlock_irqrestore(&priv->lock, flags);
  7713. udelay(5);
  7714. iwl4965_hw_nic_reset(priv);
  7715. /* Bring the device back up */
  7716. clear_bit(STATUS_IN_SUSPEND, &priv->status);
  7717. queue_work(priv->workqueue, &priv->up);
  7718. }
  7719. static int iwl4965_pci_resume(struct pci_dev *pdev)
  7720. {
  7721. struct iwl4965_priv *priv = pci_get_drvdata(pdev);
  7722. int err;
  7723. printk(KERN_INFO "Coming out of suspend...\n");
  7724. pci_set_power_state(pdev, PCI_D0);
  7725. err = pci_enable_device(pdev);
  7726. pci_restore_state(pdev);
  7727. /*
  7728. * Suspend/Resume resets the PCI configuration space, so we have to
  7729. * re-disable the RETRY_TIMEOUT register (0x41) to keep PCI Tx retries
  7730. * from interfering with C3 CPU state. pci_restore_state won't help
  7731. * here since it only restores the first 64 bytes pci config header.
  7732. */
  7733. pci_write_config_byte(pdev, 0x41, 0x00);
  7734. iwl4965_resume(priv);
  7735. return 0;
  7736. }
  7737. #endif /* CONFIG_PM */
  7738. /*****************************************************************************
  7739. *
  7740. * driver and module entry point
  7741. *
  7742. *****************************************************************************/
  7743. static struct pci_driver iwl4965_driver = {
  7744. .name = DRV_NAME,
  7745. .id_table = iwl4965_hw_card_ids,
  7746. .probe = iwl4965_pci_probe,
  7747. .remove = __devexit_p(iwl4965_pci_remove),
  7748. #ifdef CONFIG_PM
  7749. .suspend = iwl4965_pci_suspend,
  7750. .resume = iwl4965_pci_resume,
  7751. #endif
  7752. };
  7753. static int __init iwl4965_init(void)
  7754. {
  7755. int ret;
  7756. printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n");
  7757. printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n");
  7758. ret = pci_register_driver(&iwl4965_driver);
  7759. if (ret) {
  7760. IWL_ERROR("Unable to initialize PCI module\n");
  7761. return ret;
  7762. }
  7763. #ifdef CONFIG_IWL4965_DEBUG
  7764. ret = driver_create_file(&iwl4965_driver.driver, &driver_attr_debug_level);
  7765. if (ret) {
  7766. IWL_ERROR("Unable to create driver sysfs file\n");
  7767. pci_unregister_driver(&iwl4965_driver);
  7768. return ret;
  7769. }
  7770. #endif
  7771. return ret;
  7772. }
  7773. static void __exit iwl4965_exit(void)
  7774. {
  7775. #ifdef CONFIG_IWL4965_DEBUG
  7776. driver_remove_file(&iwl4965_driver.driver, &driver_attr_debug_level);
  7777. #endif
  7778. pci_unregister_driver(&iwl4965_driver);
  7779. }
  7780. module_param_named(antenna, iwl4965_param_antenna, int, 0444);
  7781. MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])");
  7782. module_param_named(disable, iwl4965_param_disable, int, 0444);
  7783. MODULE_PARM_DESC(disable, "manually disable the radio (default 0 [radio on])");
  7784. module_param_named(hwcrypto, iwl4965_param_hwcrypto, int, 0444);
  7785. MODULE_PARM_DESC(hwcrypto,
  7786. "using hardware crypto engine (default 0 [software])\n");
  7787. module_param_named(debug, iwl4965_param_debug, int, 0444);
  7788. MODULE_PARM_DESC(debug, "debug output mask");
  7789. module_param_named(disable_hw_scan, iwl4965_param_disable_hw_scan, int, 0444);
  7790. MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 0)");
  7791. module_param_named(queues_num, iwl4965_param_queues_num, int, 0444);
  7792. MODULE_PARM_DESC(queues_num, "number of hw queues.");
  7793. /* QoS */
  7794. module_param_named(qos_enable, iwl4965_param_qos_enable, int, 0444);
  7795. MODULE_PARM_DESC(qos_enable, "enable all QoS functionality");
  7796. module_exit(iwl4965_exit);
  7797. module_init(iwl4965_init);