sh_mobile_lcdcfb.c 42 KB

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  1. /*
  2. * SuperH Mobile LCDC Framebuffer
  3. *
  4. * Copyright (c) 2008 Magnus Damm
  5. *
  6. * This file is subject to the terms and conditions of the GNU General Public
  7. * License. See the file "COPYING" in the main directory of this archive
  8. * for more details.
  9. */
  10. #include <linux/kernel.h>
  11. #include <linux/init.h>
  12. #include <linux/delay.h>
  13. #include <linux/mm.h>
  14. #include <linux/clk.h>
  15. #include <linux/pm_runtime.h>
  16. #include <linux/platform_device.h>
  17. #include <linux/dma-mapping.h>
  18. #include <linux/interrupt.h>
  19. #include <linux/vmalloc.h>
  20. #include <linux/ioctl.h>
  21. #include <linux/slab.h>
  22. #include <linux/console.h>
  23. #include <linux/backlight.h>
  24. #include <linux/gpio.h>
  25. #include <video/sh_mobile_lcdc.h>
  26. #include <linux/atomic.h>
  27. #include "sh_mobile_lcdcfb.h"
  28. #include "sh_mobile_meram.h"
  29. #define SIDE_B_OFFSET 0x1000
  30. #define MIRROR_OFFSET 0x2000
  31. /* shared registers and their order for context save/restore */
  32. static int lcdc_shared_regs[] = {
  33. _LDDCKR,
  34. _LDDCKSTPR,
  35. _LDINTR,
  36. _LDDDSR,
  37. _LDCNT1R,
  38. _LDCNT2R,
  39. };
  40. #define NR_SHARED_REGS ARRAY_SIZE(lcdc_shared_regs)
  41. #define MAX_XRES 1920
  42. #define MAX_YRES 1080
  43. static unsigned long lcdc_offs_mainlcd[NR_CH_REGS] = {
  44. [LDDCKPAT1R] = 0x400,
  45. [LDDCKPAT2R] = 0x404,
  46. [LDMT1R] = 0x418,
  47. [LDMT2R] = 0x41c,
  48. [LDMT3R] = 0x420,
  49. [LDDFR] = 0x424,
  50. [LDSM1R] = 0x428,
  51. [LDSM2R] = 0x42c,
  52. [LDSA1R] = 0x430,
  53. [LDSA2R] = 0x434,
  54. [LDMLSR] = 0x438,
  55. [LDHCNR] = 0x448,
  56. [LDHSYNR] = 0x44c,
  57. [LDVLNR] = 0x450,
  58. [LDVSYNR] = 0x454,
  59. [LDPMR] = 0x460,
  60. [LDHAJR] = 0x4a0,
  61. };
  62. static unsigned long lcdc_offs_sublcd[NR_CH_REGS] = {
  63. [LDDCKPAT1R] = 0x408,
  64. [LDDCKPAT2R] = 0x40c,
  65. [LDMT1R] = 0x600,
  66. [LDMT2R] = 0x604,
  67. [LDMT3R] = 0x608,
  68. [LDDFR] = 0x60c,
  69. [LDSM1R] = 0x610,
  70. [LDSM2R] = 0x614,
  71. [LDSA1R] = 0x618,
  72. [LDMLSR] = 0x620,
  73. [LDHCNR] = 0x624,
  74. [LDHSYNR] = 0x628,
  75. [LDVLNR] = 0x62c,
  76. [LDVSYNR] = 0x630,
  77. [LDPMR] = 0x63c,
  78. };
  79. static const struct fb_videomode default_720p = {
  80. .name = "HDMI 720p",
  81. .xres = 1280,
  82. .yres = 720,
  83. .left_margin = 220,
  84. .right_margin = 110,
  85. .hsync_len = 40,
  86. .upper_margin = 20,
  87. .lower_margin = 5,
  88. .vsync_len = 5,
  89. .pixclock = 13468,
  90. .refresh = 60,
  91. .sync = FB_SYNC_VERT_HIGH_ACT | FB_SYNC_HOR_HIGH_ACT,
  92. };
  93. struct sh_mobile_lcdc_priv {
  94. void __iomem *base;
  95. int irq;
  96. atomic_t hw_usecnt;
  97. struct device *dev;
  98. struct clk *dot_clk;
  99. unsigned long lddckr;
  100. struct sh_mobile_lcdc_chan ch[2];
  101. struct notifier_block notifier;
  102. unsigned long saved_shared_regs[NR_SHARED_REGS];
  103. int started;
  104. int forced_bpp; /* 2 channel LCDC must share bpp setting */
  105. struct sh_mobile_meram_info *meram_dev;
  106. };
  107. static bool banked(int reg_nr)
  108. {
  109. switch (reg_nr) {
  110. case LDMT1R:
  111. case LDMT2R:
  112. case LDMT3R:
  113. case LDDFR:
  114. case LDSM1R:
  115. case LDSA1R:
  116. case LDSA2R:
  117. case LDMLSR:
  118. case LDHCNR:
  119. case LDHSYNR:
  120. case LDVLNR:
  121. case LDVSYNR:
  122. return true;
  123. }
  124. return false;
  125. }
  126. static void lcdc_write_chan(struct sh_mobile_lcdc_chan *chan,
  127. int reg_nr, unsigned long data)
  128. {
  129. iowrite32(data, chan->lcdc->base + chan->reg_offs[reg_nr]);
  130. if (banked(reg_nr))
  131. iowrite32(data, chan->lcdc->base + chan->reg_offs[reg_nr] +
  132. SIDE_B_OFFSET);
  133. }
  134. static void lcdc_write_chan_mirror(struct sh_mobile_lcdc_chan *chan,
  135. int reg_nr, unsigned long data)
  136. {
  137. iowrite32(data, chan->lcdc->base + chan->reg_offs[reg_nr] +
  138. MIRROR_OFFSET);
  139. }
  140. static unsigned long lcdc_read_chan(struct sh_mobile_lcdc_chan *chan,
  141. int reg_nr)
  142. {
  143. return ioread32(chan->lcdc->base + chan->reg_offs[reg_nr]);
  144. }
  145. static void lcdc_write(struct sh_mobile_lcdc_priv *priv,
  146. unsigned long reg_offs, unsigned long data)
  147. {
  148. iowrite32(data, priv->base + reg_offs);
  149. }
  150. static unsigned long lcdc_read(struct sh_mobile_lcdc_priv *priv,
  151. unsigned long reg_offs)
  152. {
  153. return ioread32(priv->base + reg_offs);
  154. }
  155. static void lcdc_wait_bit(struct sh_mobile_lcdc_priv *priv,
  156. unsigned long reg_offs,
  157. unsigned long mask, unsigned long until)
  158. {
  159. while ((lcdc_read(priv, reg_offs) & mask) != until)
  160. cpu_relax();
  161. }
  162. static int lcdc_chan_is_sublcd(struct sh_mobile_lcdc_chan *chan)
  163. {
  164. return chan->cfg.chan == LCDC_CHAN_SUBLCD;
  165. }
  166. static void lcdc_sys_write_index(void *handle, unsigned long data)
  167. {
  168. struct sh_mobile_lcdc_chan *ch = handle;
  169. lcdc_write(ch->lcdc, _LDDWD0R, data | LDDWDxR_WDACT);
  170. lcdc_wait_bit(ch->lcdc, _LDSR, LDSR_AS, 0);
  171. lcdc_write(ch->lcdc, _LDDWAR, LDDWAR_WA |
  172. (lcdc_chan_is_sublcd(ch) ? 2 : 0));
  173. lcdc_wait_bit(ch->lcdc, _LDSR, LDSR_AS, 0);
  174. }
  175. static void lcdc_sys_write_data(void *handle, unsigned long data)
  176. {
  177. struct sh_mobile_lcdc_chan *ch = handle;
  178. lcdc_write(ch->lcdc, _LDDWD0R, data | LDDWDxR_WDACT | LDDWDxR_RSW);
  179. lcdc_wait_bit(ch->lcdc, _LDSR, LDSR_AS, 0);
  180. lcdc_write(ch->lcdc, _LDDWAR, LDDWAR_WA |
  181. (lcdc_chan_is_sublcd(ch) ? 2 : 0));
  182. lcdc_wait_bit(ch->lcdc, _LDSR, LDSR_AS, 0);
  183. }
  184. static unsigned long lcdc_sys_read_data(void *handle)
  185. {
  186. struct sh_mobile_lcdc_chan *ch = handle;
  187. lcdc_write(ch->lcdc, _LDDRDR, LDDRDR_RSR);
  188. lcdc_wait_bit(ch->lcdc, _LDSR, LDSR_AS, 0);
  189. lcdc_write(ch->lcdc, _LDDRAR, LDDRAR_RA |
  190. (lcdc_chan_is_sublcd(ch) ? 2 : 0));
  191. udelay(1);
  192. lcdc_wait_bit(ch->lcdc, _LDSR, LDSR_AS, 0);
  193. return lcdc_read(ch->lcdc, _LDDRDR) & LDDRDR_DRD_MASK;
  194. }
  195. struct sh_mobile_lcdc_sys_bus_ops sh_mobile_lcdc_sys_bus_ops = {
  196. lcdc_sys_write_index,
  197. lcdc_sys_write_data,
  198. lcdc_sys_read_data,
  199. };
  200. static void sh_mobile_lcdc_clk_on(struct sh_mobile_lcdc_priv *priv)
  201. {
  202. if (atomic_inc_and_test(&priv->hw_usecnt)) {
  203. if (priv->dot_clk)
  204. clk_enable(priv->dot_clk);
  205. pm_runtime_get_sync(priv->dev);
  206. if (priv->meram_dev && priv->meram_dev->pdev)
  207. pm_runtime_get_sync(&priv->meram_dev->pdev->dev);
  208. }
  209. }
  210. static void sh_mobile_lcdc_clk_off(struct sh_mobile_lcdc_priv *priv)
  211. {
  212. if (atomic_sub_return(1, &priv->hw_usecnt) == -1) {
  213. if (priv->meram_dev && priv->meram_dev->pdev)
  214. pm_runtime_put_sync(&priv->meram_dev->pdev->dev);
  215. pm_runtime_put(priv->dev);
  216. if (priv->dot_clk)
  217. clk_disable(priv->dot_clk);
  218. }
  219. }
  220. static int sh_mobile_lcdc_sginit(struct fb_info *info,
  221. struct list_head *pagelist)
  222. {
  223. struct sh_mobile_lcdc_chan *ch = info->par;
  224. unsigned int nr_pages_max = info->fix.smem_len >> PAGE_SHIFT;
  225. struct page *page;
  226. int nr_pages = 0;
  227. sg_init_table(ch->sglist, nr_pages_max);
  228. list_for_each_entry(page, pagelist, lru)
  229. sg_set_page(&ch->sglist[nr_pages++], page, PAGE_SIZE, 0);
  230. return nr_pages;
  231. }
  232. static void sh_mobile_lcdc_deferred_io(struct fb_info *info,
  233. struct list_head *pagelist)
  234. {
  235. struct sh_mobile_lcdc_chan *ch = info->par;
  236. struct sh_mobile_lcdc_board_cfg *bcfg = &ch->cfg.board_cfg;
  237. /* enable clocks before accessing hardware */
  238. sh_mobile_lcdc_clk_on(ch->lcdc);
  239. /*
  240. * It's possible to get here without anything on the pagelist via
  241. * sh_mobile_lcdc_deferred_io_touch() or via a userspace fsync()
  242. * invocation. In the former case, the acceleration routines are
  243. * stepped in to when using the framebuffer console causing the
  244. * workqueue to be scheduled without any dirty pages on the list.
  245. *
  246. * Despite this, a panel update is still needed given that the
  247. * acceleration routines have their own methods for writing in
  248. * that still need to be updated.
  249. *
  250. * The fsync() and empty pagelist case could be optimized for,
  251. * but we don't bother, as any application exhibiting such
  252. * behaviour is fundamentally broken anyways.
  253. */
  254. if (!list_empty(pagelist)) {
  255. unsigned int nr_pages = sh_mobile_lcdc_sginit(info, pagelist);
  256. /* trigger panel update */
  257. dma_map_sg(info->dev, ch->sglist, nr_pages, DMA_TO_DEVICE);
  258. if (bcfg->start_transfer)
  259. bcfg->start_transfer(bcfg->board_data, ch,
  260. &sh_mobile_lcdc_sys_bus_ops);
  261. lcdc_write_chan(ch, LDSM2R, LDSM2R_OSTRG);
  262. dma_unmap_sg(info->dev, ch->sglist, nr_pages, DMA_TO_DEVICE);
  263. } else {
  264. if (bcfg->start_transfer)
  265. bcfg->start_transfer(bcfg->board_data, ch,
  266. &sh_mobile_lcdc_sys_bus_ops);
  267. lcdc_write_chan(ch, LDSM2R, LDSM2R_OSTRG);
  268. }
  269. }
  270. static void sh_mobile_lcdc_deferred_io_touch(struct fb_info *info)
  271. {
  272. struct fb_deferred_io *fbdefio = info->fbdefio;
  273. if (fbdefio)
  274. schedule_delayed_work(&info->deferred_work, fbdefio->delay);
  275. }
  276. static irqreturn_t sh_mobile_lcdc_irq(int irq, void *data)
  277. {
  278. struct sh_mobile_lcdc_priv *priv = data;
  279. struct sh_mobile_lcdc_chan *ch;
  280. unsigned long ldintr;
  281. int is_sub;
  282. int k;
  283. /* Acknowledge interrupts and disable further VSYNC End IRQs. */
  284. ldintr = lcdc_read(priv, _LDINTR);
  285. lcdc_write(priv, _LDINTR, (ldintr ^ LDINTR_STATUS_MASK) & ~LDINTR_VEE);
  286. /* figure out if this interrupt is for main or sub lcd */
  287. is_sub = (lcdc_read(priv, _LDSR) & LDSR_MSS) ? 1 : 0;
  288. /* wake up channel and disable clocks */
  289. for (k = 0; k < ARRAY_SIZE(priv->ch); k++) {
  290. ch = &priv->ch[k];
  291. if (!ch->enabled)
  292. continue;
  293. /* Frame End */
  294. if (ldintr & LDINTR_FS) {
  295. if (is_sub == lcdc_chan_is_sublcd(ch)) {
  296. ch->frame_end = 1;
  297. wake_up(&ch->frame_end_wait);
  298. sh_mobile_lcdc_clk_off(priv);
  299. }
  300. }
  301. /* VSYNC End */
  302. if (ldintr & LDINTR_VES)
  303. complete(&ch->vsync_completion);
  304. }
  305. return IRQ_HANDLED;
  306. }
  307. static void sh_mobile_lcdc_start_stop(struct sh_mobile_lcdc_priv *priv,
  308. int start)
  309. {
  310. unsigned long tmp = lcdc_read(priv, _LDCNT2R);
  311. int k;
  312. /* start or stop the lcdc */
  313. if (start)
  314. lcdc_write(priv, _LDCNT2R, tmp | LDCNT2R_DO);
  315. else
  316. lcdc_write(priv, _LDCNT2R, tmp & ~LDCNT2R_DO);
  317. /* wait until power is applied/stopped on all channels */
  318. for (k = 0; k < ARRAY_SIZE(priv->ch); k++)
  319. if (lcdc_read(priv, _LDCNT2R) & priv->ch[k].enabled)
  320. while (1) {
  321. tmp = lcdc_read_chan(&priv->ch[k], LDPMR)
  322. & LDPMR_LPS;
  323. if (start && tmp == LDPMR_LPS)
  324. break;
  325. if (!start && tmp == 0)
  326. break;
  327. cpu_relax();
  328. }
  329. if (!start)
  330. lcdc_write(priv, _LDDCKSTPR, 1); /* stop dotclock */
  331. }
  332. static void sh_mobile_lcdc_geometry(struct sh_mobile_lcdc_chan *ch)
  333. {
  334. struct fb_var_screeninfo *var = &ch->info->var, *display_var = &ch->display_var;
  335. unsigned long h_total, hsync_pos, display_h_total;
  336. u32 tmp;
  337. tmp = ch->ldmt1r_value;
  338. tmp |= (var->sync & FB_SYNC_VERT_HIGH_ACT) ? 0 : LDMT1R_VPOL;
  339. tmp |= (var->sync & FB_SYNC_HOR_HIGH_ACT) ? 0 : LDMT1R_HPOL;
  340. tmp |= (ch->cfg.flags & LCDC_FLAGS_DWPOL) ? LDMT1R_DWPOL : 0;
  341. tmp |= (ch->cfg.flags & LCDC_FLAGS_DIPOL) ? LDMT1R_DIPOL : 0;
  342. tmp |= (ch->cfg.flags & LCDC_FLAGS_DAPOL) ? LDMT1R_DAPOL : 0;
  343. tmp |= (ch->cfg.flags & LCDC_FLAGS_HSCNT) ? LDMT1R_HSCNT : 0;
  344. tmp |= (ch->cfg.flags & LCDC_FLAGS_DWCNT) ? LDMT1R_DWCNT : 0;
  345. lcdc_write_chan(ch, LDMT1R, tmp);
  346. /* setup SYS bus */
  347. lcdc_write_chan(ch, LDMT2R, ch->cfg.sys_bus_cfg.ldmt2r);
  348. lcdc_write_chan(ch, LDMT3R, ch->cfg.sys_bus_cfg.ldmt3r);
  349. /* horizontal configuration */
  350. h_total = display_var->xres + display_var->hsync_len +
  351. display_var->left_margin + display_var->right_margin;
  352. tmp = h_total / 8; /* HTCN */
  353. tmp |= (min(display_var->xres, var->xres) / 8) << 16; /* HDCN */
  354. lcdc_write_chan(ch, LDHCNR, tmp);
  355. hsync_pos = display_var->xres + display_var->right_margin;
  356. tmp = hsync_pos / 8; /* HSYNP */
  357. tmp |= (display_var->hsync_len / 8) << 16; /* HSYNW */
  358. lcdc_write_chan(ch, LDHSYNR, tmp);
  359. /* vertical configuration */
  360. tmp = display_var->yres + display_var->vsync_len +
  361. display_var->upper_margin + display_var->lower_margin; /* VTLN */
  362. tmp |= min(display_var->yres, var->yres) << 16; /* VDLN */
  363. lcdc_write_chan(ch, LDVLNR, tmp);
  364. tmp = display_var->yres + display_var->lower_margin; /* VSYNP */
  365. tmp |= display_var->vsync_len << 16; /* VSYNW */
  366. lcdc_write_chan(ch, LDVSYNR, tmp);
  367. /* Adjust horizontal synchronisation for HDMI */
  368. display_h_total = display_var->xres + display_var->hsync_len +
  369. display_var->left_margin + display_var->right_margin;
  370. tmp = ((display_var->xres & 7) << 24) |
  371. ((display_h_total & 7) << 16) |
  372. ((display_var->hsync_len & 7) << 8) |
  373. hsync_pos;
  374. lcdc_write_chan(ch, LDHAJR, tmp);
  375. }
  376. /*
  377. * __sh_mobile_lcdc_start - Configure and tart the LCDC
  378. * @priv: LCDC device
  379. *
  380. * Configure all enabled channels and start the LCDC device. All external
  381. * devices (clocks, MERAM, panels, ...) are not touched by this function.
  382. */
  383. static void __sh_mobile_lcdc_start(struct sh_mobile_lcdc_priv *priv)
  384. {
  385. struct sh_mobile_lcdc_chan *ch;
  386. unsigned long tmp;
  387. int bpp = 0;
  388. int k, m;
  389. /* Enable LCDC channels. Read data from external memory, avoid using the
  390. * BEU for now.
  391. */
  392. lcdc_write(priv, _LDCNT2R, priv->ch[0].enabled | priv->ch[1].enabled);
  393. /* Stop the LCDC first and disable all interrupts. */
  394. sh_mobile_lcdc_start_stop(priv, 0);
  395. lcdc_write(priv, _LDINTR, 0);
  396. /* Configure power supply, dot clocks and start them. */
  397. tmp = priv->lddckr;
  398. for (k = 0; k < ARRAY_SIZE(priv->ch); k++) {
  399. ch = &priv->ch[k];
  400. if (!ch->enabled)
  401. continue;
  402. if (!bpp)
  403. bpp = ch->info->var.bits_per_pixel;
  404. /* Power supply */
  405. lcdc_write_chan(ch, LDPMR, 0);
  406. m = ch->cfg.clock_divider;
  407. if (!m)
  408. continue;
  409. /* FIXME: sh7724 can only use 42, 48, 54 and 60 for the divider
  410. * denominator.
  411. */
  412. lcdc_write_chan(ch, LDDCKPAT1R, 0);
  413. lcdc_write_chan(ch, LDDCKPAT2R, (1 << (m/2)) - 1);
  414. if (m == 1)
  415. m = LDDCKR_MOSEL;
  416. tmp |= m << (lcdc_chan_is_sublcd(ch) ? 8 : 0);
  417. }
  418. lcdc_write(priv, _LDDCKR, tmp);
  419. lcdc_write(priv, _LDDCKSTPR, 0);
  420. lcdc_wait_bit(priv, _LDDCKSTPR, ~0, 0);
  421. /* Setup geometry, format, frame buffer memory and operation mode. */
  422. for (k = 0; k < ARRAY_SIZE(priv->ch); k++) {
  423. ch = &priv->ch[k];
  424. if (!ch->enabled)
  425. continue;
  426. sh_mobile_lcdc_geometry(ch);
  427. if (ch->info->var.nonstd) {
  428. tmp = (ch->info->var.nonstd << 16);
  429. switch (ch->info->var.bits_per_pixel) {
  430. case 12:
  431. tmp |= LDDFR_YF_420;
  432. break;
  433. case 16:
  434. tmp |= LDDFR_YF_422;
  435. break;
  436. case 24:
  437. default:
  438. tmp |= LDDFR_YF_444;
  439. break;
  440. }
  441. } else {
  442. switch (ch->info->var.bits_per_pixel) {
  443. case 16:
  444. tmp = LDDFR_PKF_RGB16;
  445. break;
  446. case 24:
  447. tmp = LDDFR_PKF_RGB24;
  448. break;
  449. case 32:
  450. default:
  451. tmp = LDDFR_PKF_ARGB32;
  452. break;
  453. }
  454. }
  455. lcdc_write_chan(ch, LDDFR, tmp);
  456. lcdc_write_chan(ch, LDMLSR, ch->pitch);
  457. lcdc_write_chan(ch, LDSA1R, ch->base_addr_y);
  458. if (ch->info->var.nonstd)
  459. lcdc_write_chan(ch, LDSA2R, ch->base_addr_c);
  460. /* When using deferred I/O mode, configure the LCDC for one-shot
  461. * operation and enable the frame end interrupt. Otherwise use
  462. * continuous read mode.
  463. */
  464. if (ch->ldmt1r_value & LDMT1R_IFM &&
  465. ch->cfg.sys_bus_cfg.deferred_io_msec) {
  466. lcdc_write_chan(ch, LDSM1R, LDSM1R_OS);
  467. lcdc_write(priv, _LDINTR, LDINTR_FE);
  468. } else {
  469. lcdc_write_chan(ch, LDSM1R, 0);
  470. }
  471. }
  472. /* Word and long word swap. */
  473. if (priv->ch[0].info->var.nonstd)
  474. tmp = LDDDSR_LS | LDDDSR_WS | LDDDSR_BS;
  475. else {
  476. switch (bpp) {
  477. case 16:
  478. tmp = LDDDSR_LS | LDDDSR_WS;
  479. break;
  480. case 24:
  481. tmp = LDDDSR_LS | LDDDSR_WS | LDDDSR_BS;
  482. break;
  483. case 32:
  484. default:
  485. tmp = LDDDSR_LS;
  486. break;
  487. }
  488. }
  489. lcdc_write(priv, _LDDDSR, tmp);
  490. /* Enable the display output. */
  491. lcdc_write(priv, _LDCNT1R, LDCNT1R_DE);
  492. sh_mobile_lcdc_start_stop(priv, 1);
  493. priv->started = 1;
  494. }
  495. static int sh_mobile_lcdc_start(struct sh_mobile_lcdc_priv *priv)
  496. {
  497. struct sh_mobile_meram_info *mdev = priv->meram_dev;
  498. struct sh_mobile_lcdc_board_cfg *board_cfg;
  499. struct sh_mobile_lcdc_chan *ch;
  500. unsigned long tmp;
  501. int ret;
  502. int k;
  503. /* enable clocks before accessing the hardware */
  504. for (k = 0; k < ARRAY_SIZE(priv->ch); k++) {
  505. if (priv->ch[k].enabled)
  506. sh_mobile_lcdc_clk_on(priv);
  507. }
  508. /* reset */
  509. lcdc_write(priv, _LDCNT2R, lcdc_read(priv, _LDCNT2R) | LDCNT2R_BR);
  510. lcdc_wait_bit(priv, _LDCNT2R, LDCNT2R_BR, 0);
  511. for (k = 0; k < ARRAY_SIZE(priv->ch); k++) {
  512. ch = &priv->ch[k];
  513. if (!ch->enabled)
  514. continue;
  515. board_cfg = &ch->cfg.board_cfg;
  516. if (board_cfg->setup_sys) {
  517. ret = board_cfg->setup_sys(board_cfg->board_data, ch,
  518. &sh_mobile_lcdc_sys_bus_ops);
  519. if (ret)
  520. return ret;
  521. }
  522. }
  523. /* Compute frame buffer base address and pitch for each channel. */
  524. for (k = 0; k < ARRAY_SIZE(priv->ch); k++) {
  525. struct sh_mobile_meram_cfg *cfg;
  526. int pixelformat;
  527. ch = &priv->ch[k];
  528. if (!ch->enabled)
  529. continue;
  530. ch->base_addr_y = ch->info->fix.smem_start;
  531. ch->base_addr_c = ch->base_addr_y
  532. + ch->info->var.xres
  533. * ch->info->var.yres_virtual;
  534. ch->pitch = ch->info->fix.line_length;
  535. /* Enable MERAM if possible. */
  536. cfg = ch->cfg.meram_cfg;
  537. if (mdev == NULL || mdev->ops == NULL || cfg == NULL)
  538. continue;
  539. /* we need to de-init configured ICBs before we can
  540. * re-initialize them.
  541. */
  542. if (ch->meram_enabled) {
  543. mdev->ops->meram_unregister(mdev, cfg);
  544. ch->meram_enabled = 0;
  545. }
  546. if (!ch->info->var.nonstd)
  547. pixelformat = SH_MOBILE_MERAM_PF_RGB;
  548. else if (ch->info->var.bits_per_pixel == 24)
  549. pixelformat = SH_MOBILE_MERAM_PF_NV24;
  550. else
  551. pixelformat = SH_MOBILE_MERAM_PF_NV;
  552. ret = mdev->ops->meram_register(mdev, cfg, ch->pitch,
  553. ch->info->var.yres, pixelformat,
  554. ch->base_addr_y, ch->base_addr_c,
  555. &ch->base_addr_y, &ch->base_addr_c,
  556. &ch->pitch);
  557. if (!ret)
  558. ch->meram_enabled = 1;
  559. }
  560. /* Start the LCDC. */
  561. __sh_mobile_lcdc_start(priv);
  562. /* Setup deferred I/O, tell the board code to enable the panels, and
  563. * turn backlight on.
  564. */
  565. for (k = 0; k < ARRAY_SIZE(priv->ch); k++) {
  566. ch = &priv->ch[k];
  567. if (!ch->enabled)
  568. continue;
  569. tmp = ch->cfg.sys_bus_cfg.deferred_io_msec;
  570. if (ch->ldmt1r_value & LDMT1R_IFM && tmp) {
  571. ch->defio.deferred_io = sh_mobile_lcdc_deferred_io;
  572. ch->defio.delay = msecs_to_jiffies(tmp);
  573. ch->info->fbdefio = &ch->defio;
  574. fb_deferred_io_init(ch->info);
  575. }
  576. board_cfg = &ch->cfg.board_cfg;
  577. if (board_cfg->display_on && try_module_get(board_cfg->owner)) {
  578. board_cfg->display_on(board_cfg->board_data, ch->info);
  579. module_put(board_cfg->owner);
  580. }
  581. if (ch->bl) {
  582. ch->bl->props.power = FB_BLANK_UNBLANK;
  583. backlight_update_status(ch->bl);
  584. }
  585. }
  586. return 0;
  587. }
  588. static void sh_mobile_lcdc_stop(struct sh_mobile_lcdc_priv *priv)
  589. {
  590. struct sh_mobile_lcdc_chan *ch;
  591. struct sh_mobile_lcdc_board_cfg *board_cfg;
  592. int k;
  593. /* clean up deferred io and ask board code to disable panel */
  594. for (k = 0; k < ARRAY_SIZE(priv->ch); k++) {
  595. ch = &priv->ch[k];
  596. if (!ch->enabled)
  597. continue;
  598. /* deferred io mode:
  599. * flush frame, and wait for frame end interrupt
  600. * clean up deferred io and enable clock
  601. */
  602. if (ch->info && ch->info->fbdefio) {
  603. ch->frame_end = 0;
  604. schedule_delayed_work(&ch->info->deferred_work, 0);
  605. wait_event(ch->frame_end_wait, ch->frame_end);
  606. fb_deferred_io_cleanup(ch->info);
  607. ch->info->fbdefio = NULL;
  608. sh_mobile_lcdc_clk_on(priv);
  609. }
  610. if (ch->bl) {
  611. ch->bl->props.power = FB_BLANK_POWERDOWN;
  612. backlight_update_status(ch->bl);
  613. }
  614. board_cfg = &ch->cfg.board_cfg;
  615. if (board_cfg->display_off && try_module_get(board_cfg->owner)) {
  616. board_cfg->display_off(board_cfg->board_data);
  617. module_put(board_cfg->owner);
  618. }
  619. /* disable the meram */
  620. if (ch->meram_enabled) {
  621. struct sh_mobile_meram_cfg *cfg;
  622. struct sh_mobile_meram_info *mdev;
  623. cfg = ch->cfg.meram_cfg;
  624. mdev = priv->meram_dev;
  625. mdev->ops->meram_unregister(mdev, cfg);
  626. ch->meram_enabled = 0;
  627. }
  628. }
  629. /* stop the lcdc */
  630. if (priv->started) {
  631. sh_mobile_lcdc_start_stop(priv, 0);
  632. priv->started = 0;
  633. }
  634. /* stop clocks */
  635. for (k = 0; k < ARRAY_SIZE(priv->ch); k++)
  636. if (priv->ch[k].enabled)
  637. sh_mobile_lcdc_clk_off(priv);
  638. }
  639. static int sh_mobile_lcdc_check_interface(struct sh_mobile_lcdc_chan *ch)
  640. {
  641. int interface_type = ch->cfg.interface_type;
  642. switch (interface_type) {
  643. case RGB8:
  644. case RGB9:
  645. case RGB12A:
  646. case RGB12B:
  647. case RGB16:
  648. case RGB18:
  649. case RGB24:
  650. case SYS8A:
  651. case SYS8B:
  652. case SYS8C:
  653. case SYS8D:
  654. case SYS9:
  655. case SYS12:
  656. case SYS16A:
  657. case SYS16B:
  658. case SYS16C:
  659. case SYS18:
  660. case SYS24:
  661. break;
  662. default:
  663. return -EINVAL;
  664. }
  665. /* SUBLCD only supports SYS interface */
  666. if (lcdc_chan_is_sublcd(ch)) {
  667. if (!(interface_type & LDMT1R_IFM))
  668. return -EINVAL;
  669. interface_type &= ~LDMT1R_IFM;
  670. }
  671. ch->ldmt1r_value = interface_type;
  672. return 0;
  673. }
  674. static int sh_mobile_lcdc_setup_clocks(struct platform_device *pdev,
  675. int clock_source,
  676. struct sh_mobile_lcdc_priv *priv)
  677. {
  678. char *str;
  679. switch (clock_source) {
  680. case LCDC_CLK_BUS:
  681. str = "bus_clk";
  682. priv->lddckr = LDDCKR_ICKSEL_BUS;
  683. break;
  684. case LCDC_CLK_PERIPHERAL:
  685. str = "peripheral_clk";
  686. priv->lddckr = LDDCKR_ICKSEL_MIPI;
  687. break;
  688. case LCDC_CLK_EXTERNAL:
  689. str = NULL;
  690. priv->lddckr = LDDCKR_ICKSEL_HDMI;
  691. break;
  692. default:
  693. return -EINVAL;
  694. }
  695. if (str) {
  696. priv->dot_clk = clk_get(&pdev->dev, str);
  697. if (IS_ERR(priv->dot_clk)) {
  698. dev_err(&pdev->dev, "cannot get dot clock %s\n", str);
  699. return PTR_ERR(priv->dot_clk);
  700. }
  701. }
  702. /* Runtime PM support involves two step for this driver:
  703. * 1) Enable Runtime PM
  704. * 2) Force Runtime PM Resume since hardware is accessed from probe()
  705. */
  706. priv->dev = &pdev->dev;
  707. pm_runtime_enable(priv->dev);
  708. pm_runtime_resume(priv->dev);
  709. return 0;
  710. }
  711. static int sh_mobile_lcdc_setcolreg(u_int regno,
  712. u_int red, u_int green, u_int blue,
  713. u_int transp, struct fb_info *info)
  714. {
  715. u32 *palette = info->pseudo_palette;
  716. if (regno >= PALETTE_NR)
  717. return -EINVAL;
  718. /* only FB_VISUAL_TRUECOLOR supported */
  719. red >>= 16 - info->var.red.length;
  720. green >>= 16 - info->var.green.length;
  721. blue >>= 16 - info->var.blue.length;
  722. transp >>= 16 - info->var.transp.length;
  723. palette[regno] = (red << info->var.red.offset) |
  724. (green << info->var.green.offset) |
  725. (blue << info->var.blue.offset) |
  726. (transp << info->var.transp.offset);
  727. return 0;
  728. }
  729. static struct fb_fix_screeninfo sh_mobile_lcdc_fix = {
  730. .id = "SH Mobile LCDC",
  731. .type = FB_TYPE_PACKED_PIXELS,
  732. .visual = FB_VISUAL_TRUECOLOR,
  733. .accel = FB_ACCEL_NONE,
  734. .xpanstep = 0,
  735. .ypanstep = 1,
  736. .ywrapstep = 0,
  737. };
  738. static void sh_mobile_lcdc_fillrect(struct fb_info *info,
  739. const struct fb_fillrect *rect)
  740. {
  741. sys_fillrect(info, rect);
  742. sh_mobile_lcdc_deferred_io_touch(info);
  743. }
  744. static void sh_mobile_lcdc_copyarea(struct fb_info *info,
  745. const struct fb_copyarea *area)
  746. {
  747. sys_copyarea(info, area);
  748. sh_mobile_lcdc_deferred_io_touch(info);
  749. }
  750. static void sh_mobile_lcdc_imageblit(struct fb_info *info,
  751. const struct fb_image *image)
  752. {
  753. sys_imageblit(info, image);
  754. sh_mobile_lcdc_deferred_io_touch(info);
  755. }
  756. static int sh_mobile_fb_pan_display(struct fb_var_screeninfo *var,
  757. struct fb_info *info)
  758. {
  759. struct sh_mobile_lcdc_chan *ch = info->par;
  760. struct sh_mobile_lcdc_priv *priv = ch->lcdc;
  761. unsigned long ldrcntr;
  762. unsigned long new_pan_offset;
  763. unsigned long base_addr_y, base_addr_c;
  764. unsigned long c_offset;
  765. if (!var->nonstd)
  766. new_pan_offset = (var->yoffset * info->fix.line_length) +
  767. (var->xoffset * (info->var.bits_per_pixel / 8));
  768. else
  769. new_pan_offset = (var->yoffset * info->fix.line_length) +
  770. (var->xoffset);
  771. if (new_pan_offset == ch->pan_offset)
  772. return 0; /* No change, do nothing */
  773. ldrcntr = lcdc_read(priv, _LDRCNTR);
  774. /* Set the source address for the next refresh */
  775. base_addr_y = ch->dma_handle + new_pan_offset;
  776. if (var->nonstd) {
  777. /* Set y offset */
  778. c_offset = (var->yoffset *
  779. info->fix.line_length *
  780. (info->var.bits_per_pixel - 8)) / 8;
  781. base_addr_c = ch->dma_handle + var->xres * var->yres_virtual +
  782. c_offset;
  783. /* Set x offset */
  784. if (info->var.bits_per_pixel == 24)
  785. base_addr_c += 2 * var->xoffset;
  786. else
  787. base_addr_c += var->xoffset;
  788. } else
  789. base_addr_c = 0;
  790. if (!ch->meram_enabled) {
  791. lcdc_write_chan_mirror(ch, LDSA1R, base_addr_y);
  792. if (base_addr_c)
  793. lcdc_write_chan_mirror(ch, LDSA2R, base_addr_c);
  794. } else {
  795. struct sh_mobile_meram_cfg *cfg;
  796. struct sh_mobile_meram_info *mdev;
  797. unsigned long icb_addr_y, icb_addr_c;
  798. int ret;
  799. cfg = ch->cfg.meram_cfg;
  800. mdev = priv->meram_dev;
  801. ret = mdev->ops->meram_update(mdev, cfg,
  802. base_addr_y, base_addr_c,
  803. &icb_addr_y, &icb_addr_c);
  804. if (ret)
  805. return ret;
  806. lcdc_write_chan_mirror(ch, LDSA1R, icb_addr_y);
  807. if (icb_addr_c)
  808. lcdc_write_chan_mirror(ch, LDSA2R, icb_addr_c);
  809. }
  810. if (lcdc_chan_is_sublcd(ch))
  811. lcdc_write(ch->lcdc, _LDRCNTR, ldrcntr ^ LDRCNTR_SRS);
  812. else
  813. lcdc_write(ch->lcdc, _LDRCNTR, ldrcntr ^ LDRCNTR_MRS);
  814. ch->pan_offset = new_pan_offset;
  815. sh_mobile_lcdc_deferred_io_touch(info);
  816. return 0;
  817. }
  818. static int sh_mobile_wait_for_vsync(struct fb_info *info)
  819. {
  820. struct sh_mobile_lcdc_chan *ch = info->par;
  821. unsigned long ldintr;
  822. int ret;
  823. /* Enable VSync End interrupt and be careful not to acknowledge any
  824. * pending interrupt.
  825. */
  826. ldintr = lcdc_read(ch->lcdc, _LDINTR);
  827. ldintr |= LDINTR_VEE | LDINTR_STATUS_MASK;
  828. lcdc_write(ch->lcdc, _LDINTR, ldintr);
  829. ret = wait_for_completion_interruptible_timeout(&ch->vsync_completion,
  830. msecs_to_jiffies(100));
  831. if (!ret)
  832. return -ETIMEDOUT;
  833. return 0;
  834. }
  835. static int sh_mobile_ioctl(struct fb_info *info, unsigned int cmd,
  836. unsigned long arg)
  837. {
  838. int retval;
  839. switch (cmd) {
  840. case FBIO_WAITFORVSYNC:
  841. retval = sh_mobile_wait_for_vsync(info);
  842. break;
  843. default:
  844. retval = -ENOIOCTLCMD;
  845. break;
  846. }
  847. return retval;
  848. }
  849. static void sh_mobile_fb_reconfig(struct fb_info *info)
  850. {
  851. struct sh_mobile_lcdc_chan *ch = info->par;
  852. struct fb_videomode mode1, mode2;
  853. struct fb_event event;
  854. int evnt = FB_EVENT_MODE_CHANGE_ALL;
  855. if (ch->use_count > 1 || (ch->use_count == 1 && !info->fbcon_par))
  856. /* More framebuffer users are active */
  857. return;
  858. fb_var_to_videomode(&mode1, &ch->display_var);
  859. fb_var_to_videomode(&mode2, &info->var);
  860. if (fb_mode_is_equal(&mode1, &mode2))
  861. return;
  862. /* Display has been re-plugged, framebuffer is free now, reconfigure */
  863. if (fb_set_var(info, &ch->display_var) < 0)
  864. /* Couldn't reconfigure, hopefully, can continue as before */
  865. return;
  866. if (info->var.nonstd)
  867. info->fix.line_length = mode1.xres;
  868. else
  869. info->fix.line_length = mode1.xres * (ch->cfg.bpp / 8);
  870. /*
  871. * fb_set_var() calls the notifier change internally, only if
  872. * FBINFO_MISC_USEREVENT flag is set. Since we do not want to fake a
  873. * user event, we have to call the chain ourselves.
  874. */
  875. event.info = info;
  876. event.data = &mode1;
  877. fb_notifier_call_chain(evnt, &event);
  878. }
  879. /*
  880. * Locking: both .fb_release() and .fb_open() are called with info->lock held if
  881. * user == 1, or with console sem held, if user == 0.
  882. */
  883. static int sh_mobile_release(struct fb_info *info, int user)
  884. {
  885. struct sh_mobile_lcdc_chan *ch = info->par;
  886. mutex_lock(&ch->open_lock);
  887. dev_dbg(info->dev, "%s(): %d users\n", __func__, ch->use_count);
  888. ch->use_count--;
  889. /* Nothing to reconfigure, when called from fbcon */
  890. if (user) {
  891. console_lock();
  892. sh_mobile_fb_reconfig(info);
  893. console_unlock();
  894. }
  895. mutex_unlock(&ch->open_lock);
  896. return 0;
  897. }
  898. static int sh_mobile_open(struct fb_info *info, int user)
  899. {
  900. struct sh_mobile_lcdc_chan *ch = info->par;
  901. mutex_lock(&ch->open_lock);
  902. ch->use_count++;
  903. dev_dbg(info->dev, "%s(): %d users\n", __func__, ch->use_count);
  904. mutex_unlock(&ch->open_lock);
  905. return 0;
  906. }
  907. static int sh_mobile_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
  908. {
  909. struct sh_mobile_lcdc_chan *ch = info->par;
  910. struct sh_mobile_lcdc_priv *p = ch->lcdc;
  911. if (var->xres > MAX_XRES || var->yres > MAX_YRES ||
  912. var->xres * var->yres * (ch->cfg.bpp / 8) * 2 > info->fix.smem_len) {
  913. dev_warn(info->dev, "Invalid info: %u-%u-%u-%u x %u-%u-%u-%u @ %lukHz!\n",
  914. var->left_margin, var->xres, var->right_margin, var->hsync_len,
  915. var->upper_margin, var->yres, var->lower_margin, var->vsync_len,
  916. PICOS2KHZ(var->pixclock));
  917. return -EINVAL;
  918. }
  919. /* only accept the forced_bpp for dual channel configurations */
  920. if (p->forced_bpp && p->forced_bpp != var->bits_per_pixel)
  921. return -EINVAL;
  922. switch (var->bits_per_pixel) {
  923. case 16: /* PKF[4:0] = 00011 - RGB 565 */
  924. case 24: /* PKF[4:0] = 01011 - RGB 888 */
  925. case 32: /* PKF[4:0] = 00000 - RGBA 888 */
  926. break;
  927. default:
  928. return -EINVAL;
  929. }
  930. return 0;
  931. }
  932. /*
  933. * Screen blanking. Behavior is as follows:
  934. * FB_BLANK_UNBLANK: screen unblanked, clocks enabled
  935. * FB_BLANK_NORMAL: screen blanked, clocks enabled
  936. * FB_BLANK_VSYNC,
  937. * FB_BLANK_HSYNC,
  938. * FB_BLANK_POWEROFF: screen blanked, clocks disabled
  939. */
  940. static int sh_mobile_lcdc_blank(int blank, struct fb_info *info)
  941. {
  942. struct sh_mobile_lcdc_chan *ch = info->par;
  943. struct sh_mobile_lcdc_priv *p = ch->lcdc;
  944. /* blank the screen? */
  945. if (blank > FB_BLANK_UNBLANK && ch->blank_status == FB_BLANK_UNBLANK) {
  946. struct fb_fillrect rect = {
  947. .width = info->var.xres,
  948. .height = info->var.yres,
  949. };
  950. sh_mobile_lcdc_fillrect(info, &rect);
  951. }
  952. /* turn clocks on? */
  953. if (blank <= FB_BLANK_NORMAL && ch->blank_status > FB_BLANK_NORMAL) {
  954. sh_mobile_lcdc_clk_on(p);
  955. }
  956. /* turn clocks off? */
  957. if (blank > FB_BLANK_NORMAL && ch->blank_status <= FB_BLANK_NORMAL) {
  958. /* make sure the screen is updated with the black fill before
  959. * switching the clocks off. one vsync is not enough since
  960. * blanking may occur in the middle of a refresh. deferred io
  961. * mode will reenable the clocks and update the screen in time,
  962. * so it does not need this. */
  963. if (!info->fbdefio) {
  964. sh_mobile_wait_for_vsync(info);
  965. sh_mobile_wait_for_vsync(info);
  966. }
  967. sh_mobile_lcdc_clk_off(p);
  968. }
  969. ch->blank_status = blank;
  970. return 0;
  971. }
  972. static struct fb_ops sh_mobile_lcdc_ops = {
  973. .owner = THIS_MODULE,
  974. .fb_setcolreg = sh_mobile_lcdc_setcolreg,
  975. .fb_read = fb_sys_read,
  976. .fb_write = fb_sys_write,
  977. .fb_fillrect = sh_mobile_lcdc_fillrect,
  978. .fb_copyarea = sh_mobile_lcdc_copyarea,
  979. .fb_imageblit = sh_mobile_lcdc_imageblit,
  980. .fb_blank = sh_mobile_lcdc_blank,
  981. .fb_pan_display = sh_mobile_fb_pan_display,
  982. .fb_ioctl = sh_mobile_ioctl,
  983. .fb_open = sh_mobile_open,
  984. .fb_release = sh_mobile_release,
  985. .fb_check_var = sh_mobile_check_var,
  986. };
  987. static int sh_mobile_lcdc_update_bl(struct backlight_device *bdev)
  988. {
  989. struct sh_mobile_lcdc_chan *ch = bl_get_data(bdev);
  990. struct sh_mobile_lcdc_board_cfg *cfg = &ch->cfg.board_cfg;
  991. int brightness = bdev->props.brightness;
  992. if (bdev->props.power != FB_BLANK_UNBLANK ||
  993. bdev->props.state & (BL_CORE_SUSPENDED | BL_CORE_FBBLANK))
  994. brightness = 0;
  995. return cfg->set_brightness(cfg->board_data, brightness);
  996. }
  997. static int sh_mobile_lcdc_get_brightness(struct backlight_device *bdev)
  998. {
  999. struct sh_mobile_lcdc_chan *ch = bl_get_data(bdev);
  1000. struct sh_mobile_lcdc_board_cfg *cfg = &ch->cfg.board_cfg;
  1001. return cfg->get_brightness(cfg->board_data);
  1002. }
  1003. static int sh_mobile_lcdc_check_fb(struct backlight_device *bdev,
  1004. struct fb_info *info)
  1005. {
  1006. return (info->bl_dev == bdev);
  1007. }
  1008. static struct backlight_ops sh_mobile_lcdc_bl_ops = {
  1009. .options = BL_CORE_SUSPENDRESUME,
  1010. .update_status = sh_mobile_lcdc_update_bl,
  1011. .get_brightness = sh_mobile_lcdc_get_brightness,
  1012. .check_fb = sh_mobile_lcdc_check_fb,
  1013. };
  1014. static struct backlight_device *sh_mobile_lcdc_bl_probe(struct device *parent,
  1015. struct sh_mobile_lcdc_chan *ch)
  1016. {
  1017. struct backlight_device *bl;
  1018. bl = backlight_device_register(ch->cfg.bl_info.name, parent, ch,
  1019. &sh_mobile_lcdc_bl_ops, NULL);
  1020. if (IS_ERR(bl)) {
  1021. dev_err(parent, "unable to register backlight device: %ld\n",
  1022. PTR_ERR(bl));
  1023. return NULL;
  1024. }
  1025. bl->props.max_brightness = ch->cfg.bl_info.max_brightness;
  1026. bl->props.brightness = bl->props.max_brightness;
  1027. backlight_update_status(bl);
  1028. return bl;
  1029. }
  1030. static void sh_mobile_lcdc_bl_remove(struct backlight_device *bdev)
  1031. {
  1032. backlight_device_unregister(bdev);
  1033. }
  1034. static int sh_mobile_lcdc_set_bpp(struct fb_var_screeninfo *var, int bpp,
  1035. int nonstd)
  1036. {
  1037. if (nonstd) {
  1038. switch (bpp) {
  1039. case 12:
  1040. case 16:
  1041. case 24:
  1042. var->bits_per_pixel = bpp;
  1043. var->nonstd = nonstd;
  1044. return 0;
  1045. default:
  1046. return -EINVAL;
  1047. }
  1048. }
  1049. switch (bpp) {
  1050. case 16: /* PKF[4:0] = 00011 - RGB 565 */
  1051. var->red.offset = 11;
  1052. var->red.length = 5;
  1053. var->green.offset = 5;
  1054. var->green.length = 6;
  1055. var->blue.offset = 0;
  1056. var->blue.length = 5;
  1057. var->transp.offset = 0;
  1058. var->transp.length = 0;
  1059. break;
  1060. case 24: /* PKF[4:0] = 01011 - RGB 888 */
  1061. var->red.offset = 16;
  1062. var->red.length = 8;
  1063. var->green.offset = 8;
  1064. var->green.length = 8;
  1065. var->blue.offset = 0;
  1066. var->blue.length = 8;
  1067. var->transp.offset = 0;
  1068. var->transp.length = 0;
  1069. break;
  1070. case 32: /* PKF[4:0] = 00000 - RGBA 888 */
  1071. var->red.offset = 16;
  1072. var->red.length = 8;
  1073. var->green.offset = 8;
  1074. var->green.length = 8;
  1075. var->blue.offset = 0;
  1076. var->blue.length = 8;
  1077. var->transp.offset = 24;
  1078. var->transp.length = 8;
  1079. break;
  1080. default:
  1081. return -EINVAL;
  1082. }
  1083. var->bits_per_pixel = bpp;
  1084. var->red.msb_right = 0;
  1085. var->green.msb_right = 0;
  1086. var->blue.msb_right = 0;
  1087. var->transp.msb_right = 0;
  1088. return 0;
  1089. }
  1090. static int sh_mobile_lcdc_suspend(struct device *dev)
  1091. {
  1092. struct platform_device *pdev = to_platform_device(dev);
  1093. sh_mobile_lcdc_stop(platform_get_drvdata(pdev));
  1094. return 0;
  1095. }
  1096. static int sh_mobile_lcdc_resume(struct device *dev)
  1097. {
  1098. struct platform_device *pdev = to_platform_device(dev);
  1099. return sh_mobile_lcdc_start(platform_get_drvdata(pdev));
  1100. }
  1101. static int sh_mobile_lcdc_runtime_suspend(struct device *dev)
  1102. {
  1103. struct platform_device *pdev = to_platform_device(dev);
  1104. struct sh_mobile_lcdc_priv *p = platform_get_drvdata(pdev);
  1105. struct sh_mobile_lcdc_chan *ch;
  1106. int k, n;
  1107. /* save per-channel registers */
  1108. for (k = 0; k < ARRAY_SIZE(p->ch); k++) {
  1109. ch = &p->ch[k];
  1110. if (!ch->enabled)
  1111. continue;
  1112. for (n = 0; n < NR_CH_REGS; n++)
  1113. ch->saved_ch_regs[n] = lcdc_read_chan(ch, n);
  1114. }
  1115. /* save shared registers */
  1116. for (n = 0; n < NR_SHARED_REGS; n++)
  1117. p->saved_shared_regs[n] = lcdc_read(p, lcdc_shared_regs[n]);
  1118. /* turn off LCDC hardware */
  1119. lcdc_write(p, _LDCNT1R, 0);
  1120. return 0;
  1121. }
  1122. static int sh_mobile_lcdc_runtime_resume(struct device *dev)
  1123. {
  1124. struct platform_device *pdev = to_platform_device(dev);
  1125. struct sh_mobile_lcdc_priv *p = platform_get_drvdata(pdev);
  1126. struct sh_mobile_lcdc_chan *ch;
  1127. int k, n;
  1128. /* restore per-channel registers */
  1129. for (k = 0; k < ARRAY_SIZE(p->ch); k++) {
  1130. ch = &p->ch[k];
  1131. if (!ch->enabled)
  1132. continue;
  1133. for (n = 0; n < NR_CH_REGS; n++)
  1134. lcdc_write_chan(ch, n, ch->saved_ch_regs[n]);
  1135. }
  1136. /* restore shared registers */
  1137. for (n = 0; n < NR_SHARED_REGS; n++)
  1138. lcdc_write(p, lcdc_shared_regs[n], p->saved_shared_regs[n]);
  1139. return 0;
  1140. }
  1141. static const struct dev_pm_ops sh_mobile_lcdc_dev_pm_ops = {
  1142. .suspend = sh_mobile_lcdc_suspend,
  1143. .resume = sh_mobile_lcdc_resume,
  1144. .runtime_suspend = sh_mobile_lcdc_runtime_suspend,
  1145. .runtime_resume = sh_mobile_lcdc_runtime_resume,
  1146. };
  1147. /* locking: called with info->lock held */
  1148. static int sh_mobile_lcdc_notify(struct notifier_block *nb,
  1149. unsigned long action, void *data)
  1150. {
  1151. struct fb_event *event = data;
  1152. struct fb_info *info = event->info;
  1153. struct sh_mobile_lcdc_chan *ch = info->par;
  1154. struct sh_mobile_lcdc_board_cfg *board_cfg = &ch->cfg.board_cfg;
  1155. if (&ch->lcdc->notifier != nb)
  1156. return NOTIFY_DONE;
  1157. dev_dbg(info->dev, "%s(): action = %lu, data = %p\n",
  1158. __func__, action, event->data);
  1159. switch(action) {
  1160. case FB_EVENT_SUSPEND:
  1161. if (board_cfg->display_off && try_module_get(board_cfg->owner)) {
  1162. board_cfg->display_off(board_cfg->board_data);
  1163. module_put(board_cfg->owner);
  1164. }
  1165. sh_mobile_lcdc_stop(ch->lcdc);
  1166. break;
  1167. case FB_EVENT_RESUME:
  1168. mutex_lock(&ch->open_lock);
  1169. sh_mobile_fb_reconfig(info);
  1170. mutex_unlock(&ch->open_lock);
  1171. /* HDMI must be enabled before LCDC configuration */
  1172. if (board_cfg->display_on && try_module_get(board_cfg->owner)) {
  1173. board_cfg->display_on(board_cfg->board_data, info);
  1174. module_put(board_cfg->owner);
  1175. }
  1176. sh_mobile_lcdc_start(ch->lcdc);
  1177. }
  1178. return NOTIFY_OK;
  1179. }
  1180. static int sh_mobile_lcdc_remove(struct platform_device *pdev);
  1181. static int __devinit sh_mobile_lcdc_probe(struct platform_device *pdev)
  1182. {
  1183. struct fb_info *info;
  1184. struct sh_mobile_lcdc_priv *priv;
  1185. struct sh_mobile_lcdc_info *pdata = pdev->dev.platform_data;
  1186. struct resource *res;
  1187. int error;
  1188. void *buf;
  1189. int i, j;
  1190. if (!pdata) {
  1191. dev_err(&pdev->dev, "no platform data defined\n");
  1192. return -EINVAL;
  1193. }
  1194. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  1195. i = platform_get_irq(pdev, 0);
  1196. if (!res || i < 0) {
  1197. dev_err(&pdev->dev, "cannot get platform resources\n");
  1198. return -ENOENT;
  1199. }
  1200. priv = kzalloc(sizeof(*priv), GFP_KERNEL);
  1201. if (!priv) {
  1202. dev_err(&pdev->dev, "cannot allocate device data\n");
  1203. return -ENOMEM;
  1204. }
  1205. platform_set_drvdata(pdev, priv);
  1206. error = request_irq(i, sh_mobile_lcdc_irq, IRQF_DISABLED,
  1207. dev_name(&pdev->dev), priv);
  1208. if (error) {
  1209. dev_err(&pdev->dev, "unable to request irq\n");
  1210. goto err1;
  1211. }
  1212. priv->irq = i;
  1213. atomic_set(&priv->hw_usecnt, -1);
  1214. j = 0;
  1215. for (i = 0; i < ARRAY_SIZE(pdata->ch); i++) {
  1216. struct sh_mobile_lcdc_chan *ch = priv->ch + j;
  1217. ch->lcdc = priv;
  1218. memcpy(&ch->cfg, &pdata->ch[i], sizeof(pdata->ch[i]));
  1219. error = sh_mobile_lcdc_check_interface(ch);
  1220. if (error) {
  1221. dev_err(&pdev->dev, "unsupported interface type\n");
  1222. goto err1;
  1223. }
  1224. init_waitqueue_head(&ch->frame_end_wait);
  1225. init_completion(&ch->vsync_completion);
  1226. ch->pan_offset = 0;
  1227. /* probe the backlight is there is one defined */
  1228. if (ch->cfg.bl_info.max_brightness)
  1229. ch->bl = sh_mobile_lcdc_bl_probe(&pdev->dev, ch);
  1230. switch (pdata->ch[i].chan) {
  1231. case LCDC_CHAN_MAINLCD:
  1232. ch->enabled = LDCNT2R_ME;
  1233. ch->reg_offs = lcdc_offs_mainlcd;
  1234. j++;
  1235. break;
  1236. case LCDC_CHAN_SUBLCD:
  1237. ch->enabled = LDCNT2R_SE;
  1238. ch->reg_offs = lcdc_offs_sublcd;
  1239. j++;
  1240. break;
  1241. }
  1242. }
  1243. if (!j) {
  1244. dev_err(&pdev->dev, "no channels defined\n");
  1245. error = -EINVAL;
  1246. goto err1;
  1247. }
  1248. /* for dual channel LCDC (MAIN + SUB) force shared bpp setting */
  1249. if (j == 2)
  1250. priv->forced_bpp = pdata->ch[0].bpp;
  1251. priv->base = ioremap_nocache(res->start, resource_size(res));
  1252. if (!priv->base)
  1253. goto err1;
  1254. error = sh_mobile_lcdc_setup_clocks(pdev, pdata->clock_source, priv);
  1255. if (error) {
  1256. dev_err(&pdev->dev, "unable to setup clocks\n");
  1257. goto err1;
  1258. }
  1259. priv->meram_dev = pdata->meram_dev;
  1260. for (i = 0; i < j; i++) {
  1261. struct fb_var_screeninfo *var;
  1262. const struct fb_videomode *lcd_cfg, *max_cfg = NULL;
  1263. struct sh_mobile_lcdc_chan *ch = priv->ch + i;
  1264. struct sh_mobile_lcdc_chan_cfg *cfg = &ch->cfg;
  1265. const struct fb_videomode *mode = cfg->lcd_cfg;
  1266. unsigned long max_size = 0;
  1267. int k;
  1268. int num_cfg;
  1269. ch->info = framebuffer_alloc(0, &pdev->dev);
  1270. if (!ch->info) {
  1271. dev_err(&pdev->dev, "unable to allocate fb_info\n");
  1272. error = -ENOMEM;
  1273. break;
  1274. }
  1275. info = ch->info;
  1276. var = &info->var;
  1277. info->fbops = &sh_mobile_lcdc_ops;
  1278. info->par = ch;
  1279. mutex_init(&ch->open_lock);
  1280. for (k = 0, lcd_cfg = mode;
  1281. k < cfg->num_cfg && lcd_cfg;
  1282. k++, lcd_cfg++) {
  1283. unsigned long size = lcd_cfg->yres * lcd_cfg->xres;
  1284. /* NV12 buffers must have even number of lines */
  1285. if ((cfg->nonstd) && cfg->bpp == 12 &&
  1286. (lcd_cfg->yres & 0x1)) {
  1287. dev_err(&pdev->dev, "yres must be multiple of 2"
  1288. " for YCbCr420 mode.\n");
  1289. error = -EINVAL;
  1290. goto err1;
  1291. }
  1292. if (size > max_size) {
  1293. max_cfg = lcd_cfg;
  1294. max_size = size;
  1295. }
  1296. }
  1297. if (!mode)
  1298. max_size = MAX_XRES * MAX_YRES;
  1299. else if (max_cfg)
  1300. dev_dbg(&pdev->dev, "Found largest videomode %ux%u\n",
  1301. max_cfg->xres, max_cfg->yres);
  1302. info->fix = sh_mobile_lcdc_fix;
  1303. info->fix.smem_len = max_size * 2 * cfg->bpp / 8;
  1304. /* Only pan in 2 line steps for NV12 */
  1305. if (cfg->nonstd && cfg->bpp == 12)
  1306. info->fix.ypanstep = 2;
  1307. if (!mode) {
  1308. mode = &default_720p;
  1309. num_cfg = 1;
  1310. } else {
  1311. num_cfg = cfg->num_cfg;
  1312. }
  1313. fb_videomode_to_modelist(mode, num_cfg, &info->modelist);
  1314. fb_videomode_to_var(var, mode);
  1315. var->width = cfg->lcd_size_cfg.width;
  1316. var->height = cfg->lcd_size_cfg.height;
  1317. /* Default Y virtual resolution is 2x panel size */
  1318. var->yres_virtual = var->yres * 2;
  1319. var->activate = FB_ACTIVATE_NOW;
  1320. error = sh_mobile_lcdc_set_bpp(var, cfg->bpp, cfg->nonstd);
  1321. if (error)
  1322. break;
  1323. buf = dma_alloc_coherent(&pdev->dev, info->fix.smem_len,
  1324. &ch->dma_handle, GFP_KERNEL);
  1325. if (!buf) {
  1326. dev_err(&pdev->dev, "unable to allocate buffer\n");
  1327. error = -ENOMEM;
  1328. break;
  1329. }
  1330. info->pseudo_palette = &ch->pseudo_palette;
  1331. info->flags = FBINFO_FLAG_DEFAULT;
  1332. error = fb_alloc_cmap(&info->cmap, PALETTE_NR, 0);
  1333. if (error < 0) {
  1334. dev_err(&pdev->dev, "unable to allocate cmap\n");
  1335. dma_free_coherent(&pdev->dev, info->fix.smem_len,
  1336. buf, ch->dma_handle);
  1337. break;
  1338. }
  1339. info->fix.smem_start = ch->dma_handle;
  1340. if (var->nonstd)
  1341. info->fix.line_length = var->xres;
  1342. else
  1343. info->fix.line_length = var->xres * (cfg->bpp / 8);
  1344. info->screen_base = buf;
  1345. info->device = &pdev->dev;
  1346. ch->display_var = *var;
  1347. }
  1348. if (error)
  1349. goto err1;
  1350. error = sh_mobile_lcdc_start(priv);
  1351. if (error) {
  1352. dev_err(&pdev->dev, "unable to start hardware\n");
  1353. goto err1;
  1354. }
  1355. for (i = 0; i < j; i++) {
  1356. struct sh_mobile_lcdc_chan *ch = priv->ch + i;
  1357. info = ch->info;
  1358. if (info->fbdefio) {
  1359. ch->sglist = vmalloc(sizeof(struct scatterlist) *
  1360. info->fix.smem_len >> PAGE_SHIFT);
  1361. if (!ch->sglist) {
  1362. dev_err(&pdev->dev, "cannot allocate sglist\n");
  1363. goto err1;
  1364. }
  1365. }
  1366. info->bl_dev = ch->bl;
  1367. error = register_framebuffer(info);
  1368. if (error < 0)
  1369. goto err1;
  1370. dev_info(info->dev,
  1371. "registered %s/%s as %dx%d %dbpp.\n",
  1372. pdev->name,
  1373. (ch->cfg.chan == LCDC_CHAN_MAINLCD) ?
  1374. "mainlcd" : "sublcd",
  1375. info->var.xres, info->var.yres,
  1376. ch->cfg.bpp);
  1377. /* deferred io mode: disable clock to save power */
  1378. if (info->fbdefio || info->state == FBINFO_STATE_SUSPENDED)
  1379. sh_mobile_lcdc_clk_off(priv);
  1380. }
  1381. /* Failure ignored */
  1382. priv->notifier.notifier_call = sh_mobile_lcdc_notify;
  1383. fb_register_client(&priv->notifier);
  1384. return 0;
  1385. err1:
  1386. sh_mobile_lcdc_remove(pdev);
  1387. return error;
  1388. }
  1389. static int sh_mobile_lcdc_remove(struct platform_device *pdev)
  1390. {
  1391. struct sh_mobile_lcdc_priv *priv = platform_get_drvdata(pdev);
  1392. struct fb_info *info;
  1393. int i;
  1394. fb_unregister_client(&priv->notifier);
  1395. for (i = 0; i < ARRAY_SIZE(priv->ch); i++)
  1396. if (priv->ch[i].info && priv->ch[i].info->dev)
  1397. unregister_framebuffer(priv->ch[i].info);
  1398. sh_mobile_lcdc_stop(priv);
  1399. for (i = 0; i < ARRAY_SIZE(priv->ch); i++) {
  1400. info = priv->ch[i].info;
  1401. if (!info || !info->device)
  1402. continue;
  1403. if (priv->ch[i].sglist)
  1404. vfree(priv->ch[i].sglist);
  1405. if (info->screen_base)
  1406. dma_free_coherent(&pdev->dev, info->fix.smem_len,
  1407. info->screen_base,
  1408. priv->ch[i].dma_handle);
  1409. fb_dealloc_cmap(&info->cmap);
  1410. framebuffer_release(info);
  1411. }
  1412. for (i = 0; i < ARRAY_SIZE(priv->ch); i++) {
  1413. if (priv->ch[i].bl)
  1414. sh_mobile_lcdc_bl_remove(priv->ch[i].bl);
  1415. }
  1416. if (priv->dot_clk)
  1417. clk_put(priv->dot_clk);
  1418. if (priv->dev)
  1419. pm_runtime_disable(priv->dev);
  1420. if (priv->base)
  1421. iounmap(priv->base);
  1422. if (priv->irq)
  1423. free_irq(priv->irq, priv);
  1424. kfree(priv);
  1425. return 0;
  1426. }
  1427. static struct platform_driver sh_mobile_lcdc_driver = {
  1428. .driver = {
  1429. .name = "sh_mobile_lcdc_fb",
  1430. .owner = THIS_MODULE,
  1431. .pm = &sh_mobile_lcdc_dev_pm_ops,
  1432. },
  1433. .probe = sh_mobile_lcdc_probe,
  1434. .remove = sh_mobile_lcdc_remove,
  1435. };
  1436. static int __init sh_mobile_lcdc_init(void)
  1437. {
  1438. return platform_driver_register(&sh_mobile_lcdc_driver);
  1439. }
  1440. static void __exit sh_mobile_lcdc_exit(void)
  1441. {
  1442. platform_driver_unregister(&sh_mobile_lcdc_driver);
  1443. }
  1444. module_init(sh_mobile_lcdc_init);
  1445. module_exit(sh_mobile_lcdc_exit);
  1446. MODULE_DESCRIPTION("SuperH Mobile LCDC Framebuffer driver");
  1447. MODULE_AUTHOR("Magnus Damm <damm@opensource.se>");
  1448. MODULE_LICENSE("GPL v2");