i915_debugfs.c 30 KB

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  1. /*
  2. * Copyright © 2008 Intel Corporation
  3. *
  4. * Permission is hereby granted, free of charge, to any person obtaining a
  5. * copy of this software and associated documentation files (the "Software"),
  6. * to deal in the Software without restriction, including without limitation
  7. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  8. * and/or sell copies of the Software, and to permit persons to whom the
  9. * Software is furnished to do so, subject to the following conditions:
  10. *
  11. * The above copyright notice and this permission notice (including the next
  12. * paragraph) shall be included in all copies or substantial portions of the
  13. * Software.
  14. *
  15. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  18. * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19. * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20. * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21. * IN THE SOFTWARE.
  22. *
  23. * Authors:
  24. * Eric Anholt <eric@anholt.net>
  25. * Keith Packard <keithp@keithp.com>
  26. *
  27. */
  28. #include <linux/seq_file.h>
  29. #include <linux/debugfs.h>
  30. #include <linux/slab.h>
  31. #include "drmP.h"
  32. #include "drm.h"
  33. #include "intel_drv.h"
  34. #include "i915_drm.h"
  35. #include "i915_drv.h"
  36. #define DRM_I915_RING_DEBUG 1
  37. #if defined(CONFIG_DEBUG_FS)
  38. enum {
  39. RENDER_LIST,
  40. BSD_LIST,
  41. FLUSHING_LIST,
  42. INACTIVE_LIST,
  43. PINNED_LIST,
  44. DEFERRED_FREE_LIST,
  45. };
  46. static const char *yesno(int v)
  47. {
  48. return v ? "yes" : "no";
  49. }
  50. static int i915_capabilities(struct seq_file *m, void *data)
  51. {
  52. struct drm_info_node *node = (struct drm_info_node *) m->private;
  53. struct drm_device *dev = node->minor->dev;
  54. const struct intel_device_info *info = INTEL_INFO(dev);
  55. seq_printf(m, "gen: %d\n", info->gen);
  56. #define B(x) seq_printf(m, #x ": %s\n", yesno(info->x))
  57. B(is_mobile);
  58. B(is_i85x);
  59. B(is_i915g);
  60. B(is_i945gm);
  61. B(is_g33);
  62. B(need_gfx_hws);
  63. B(is_g4x);
  64. B(is_pineview);
  65. B(is_broadwater);
  66. B(is_crestline);
  67. B(is_ironlake);
  68. B(has_fbc);
  69. B(has_rc6);
  70. B(has_pipe_cxsr);
  71. B(has_hotplug);
  72. B(cursor_needs_physical);
  73. B(has_overlay);
  74. B(overlay_needs_physical);
  75. B(supports_tv);
  76. #undef B
  77. return 0;
  78. }
  79. static const char *get_pin_flag(struct drm_i915_gem_object *obj_priv)
  80. {
  81. if (obj_priv->user_pin_count > 0)
  82. return "P";
  83. else if (obj_priv->pin_count > 0)
  84. return "p";
  85. else
  86. return " ";
  87. }
  88. static const char *get_tiling_flag(struct drm_i915_gem_object *obj_priv)
  89. {
  90. switch (obj_priv->tiling_mode) {
  91. default:
  92. case I915_TILING_NONE: return " ";
  93. case I915_TILING_X: return "X";
  94. case I915_TILING_Y: return "Y";
  95. }
  96. }
  97. static void
  98. describe_obj(struct seq_file *m, struct drm_i915_gem_object *obj)
  99. {
  100. seq_printf(m, "%p: %s%s %8zd %08x %08x %d%s%s",
  101. &obj->base,
  102. get_pin_flag(obj),
  103. get_tiling_flag(obj),
  104. obj->base.size,
  105. obj->base.read_domains,
  106. obj->base.write_domain,
  107. obj->last_rendering_seqno,
  108. obj->dirty ? " dirty" : "",
  109. obj->madv == I915_MADV_DONTNEED ? " purgeable" : "");
  110. if (obj->base.name)
  111. seq_printf(m, " (name: %d)", obj->base.name);
  112. if (obj->fence_reg != I915_FENCE_REG_NONE)
  113. seq_printf(m, " (fence: %d)", obj->fence_reg);
  114. if (obj->gtt_space != NULL)
  115. seq_printf(m, " (gtt_offset: %08x)", obj->gtt_offset);
  116. }
  117. static int i915_gem_object_list_info(struct seq_file *m, void *data)
  118. {
  119. struct drm_info_node *node = (struct drm_info_node *) m->private;
  120. uintptr_t list = (uintptr_t) node->info_ent->data;
  121. struct list_head *head;
  122. struct drm_device *dev = node->minor->dev;
  123. drm_i915_private_t *dev_priv = dev->dev_private;
  124. struct drm_i915_gem_object *obj_priv;
  125. size_t total_obj_size, total_gtt_size;
  126. int count, ret;
  127. ret = mutex_lock_interruptible(&dev->struct_mutex);
  128. if (ret)
  129. return ret;
  130. switch (list) {
  131. case RENDER_LIST:
  132. seq_printf(m, "Render:\n");
  133. head = &dev_priv->render_ring.active_list;
  134. break;
  135. case BSD_LIST:
  136. seq_printf(m, "BSD:\n");
  137. head = &dev_priv->bsd_ring.active_list;
  138. break;
  139. case INACTIVE_LIST:
  140. seq_printf(m, "Inactive:\n");
  141. head = &dev_priv->mm.inactive_list;
  142. break;
  143. case PINNED_LIST:
  144. seq_printf(m, "Pinned:\n");
  145. head = &dev_priv->mm.pinned_list;
  146. break;
  147. case FLUSHING_LIST:
  148. seq_printf(m, "Flushing:\n");
  149. head = &dev_priv->mm.flushing_list;
  150. break;
  151. case DEFERRED_FREE_LIST:
  152. seq_printf(m, "Deferred free:\n");
  153. head = &dev_priv->mm.deferred_free_list;
  154. break;
  155. default:
  156. mutex_unlock(&dev->struct_mutex);
  157. return -EINVAL;
  158. }
  159. total_obj_size = total_gtt_size = count = 0;
  160. list_for_each_entry(obj_priv, head, list) {
  161. seq_printf(m, " ");
  162. describe_obj(m, obj_priv);
  163. seq_printf(m, "\n");
  164. total_obj_size += obj_priv->base.size;
  165. total_gtt_size += obj_priv->gtt_space->size;
  166. count++;
  167. }
  168. mutex_unlock(&dev->struct_mutex);
  169. seq_printf(m, "Total %d objects, %zu bytes, %zu GTT size\n",
  170. count, total_obj_size, total_gtt_size);
  171. return 0;
  172. }
  173. static int i915_gem_object_info(struct seq_file *m, void* data)
  174. {
  175. struct drm_info_node *node = (struct drm_info_node *) m->private;
  176. struct drm_device *dev = node->minor->dev;
  177. struct drm_i915_private *dev_priv = dev->dev_private;
  178. int ret;
  179. ret = mutex_lock_interruptible(&dev->struct_mutex);
  180. if (ret)
  181. return ret;
  182. seq_printf(m, "%u objects\n", dev_priv->mm.object_count);
  183. seq_printf(m, "%zu object bytes\n", dev_priv->mm.object_memory);
  184. seq_printf(m, "%u pinned\n", dev_priv->mm.pin_count);
  185. seq_printf(m, "%zu pin bytes\n", dev_priv->mm.pin_memory);
  186. seq_printf(m, "%u objects in gtt\n", dev_priv->mm.gtt_count);
  187. seq_printf(m, "%zu gtt bytes\n", dev_priv->mm.gtt_memory);
  188. seq_printf(m, "%zu gtt total\n", dev_priv->mm.gtt_total);
  189. mutex_unlock(&dev->struct_mutex);
  190. return 0;
  191. }
  192. static int i915_gem_pageflip_info(struct seq_file *m, void *data)
  193. {
  194. struct drm_info_node *node = (struct drm_info_node *) m->private;
  195. struct drm_device *dev = node->minor->dev;
  196. unsigned long flags;
  197. struct intel_crtc *crtc;
  198. list_for_each_entry(crtc, &dev->mode_config.crtc_list, base.head) {
  199. const char *pipe = crtc->pipe ? "B" : "A";
  200. const char *plane = crtc->plane ? "B" : "A";
  201. struct intel_unpin_work *work;
  202. spin_lock_irqsave(&dev->event_lock, flags);
  203. work = crtc->unpin_work;
  204. if (work == NULL) {
  205. seq_printf(m, "No flip due on pipe %s (plane %s)\n",
  206. pipe, plane);
  207. } else {
  208. if (!work->pending) {
  209. seq_printf(m, "Flip queued on pipe %s (plane %s)\n",
  210. pipe, plane);
  211. } else {
  212. seq_printf(m, "Flip pending (waiting for vsync) on pipe %s (plane %s)\n",
  213. pipe, plane);
  214. }
  215. if (work->enable_stall_check)
  216. seq_printf(m, "Stall check enabled, ");
  217. else
  218. seq_printf(m, "Stall check waiting for page flip ioctl, ");
  219. seq_printf(m, "%d prepares\n", work->pending);
  220. if (work->old_fb_obj) {
  221. struct drm_i915_gem_object *obj_priv = to_intel_bo(work->old_fb_obj);
  222. if(obj_priv)
  223. seq_printf(m, "Old framebuffer gtt_offset 0x%08x\n", obj_priv->gtt_offset );
  224. }
  225. if (work->pending_flip_obj) {
  226. struct drm_i915_gem_object *obj_priv = to_intel_bo(work->pending_flip_obj);
  227. if(obj_priv)
  228. seq_printf(m, "New framebuffer gtt_offset 0x%08x\n", obj_priv->gtt_offset );
  229. }
  230. }
  231. spin_unlock_irqrestore(&dev->event_lock, flags);
  232. }
  233. return 0;
  234. }
  235. static int i915_gem_request_info(struct seq_file *m, void *data)
  236. {
  237. struct drm_info_node *node = (struct drm_info_node *) m->private;
  238. struct drm_device *dev = node->minor->dev;
  239. drm_i915_private_t *dev_priv = dev->dev_private;
  240. struct drm_i915_gem_request *gem_request;
  241. int ret;
  242. ret = mutex_lock_interruptible(&dev->struct_mutex);
  243. if (ret)
  244. return ret;
  245. seq_printf(m, "Request:\n");
  246. list_for_each_entry(gem_request, &dev_priv->render_ring.request_list,
  247. list) {
  248. seq_printf(m, " %d @ %d\n",
  249. gem_request->seqno,
  250. (int) (jiffies - gem_request->emitted_jiffies));
  251. }
  252. mutex_unlock(&dev->struct_mutex);
  253. return 0;
  254. }
  255. static int i915_gem_seqno_info(struct seq_file *m, void *data)
  256. {
  257. struct drm_info_node *node = (struct drm_info_node *) m->private;
  258. struct drm_device *dev = node->minor->dev;
  259. drm_i915_private_t *dev_priv = dev->dev_private;
  260. int ret;
  261. ret = mutex_lock_interruptible(&dev->struct_mutex);
  262. if (ret)
  263. return ret;
  264. if (dev_priv->render_ring.status_page.page_addr != NULL) {
  265. seq_printf(m, "Current sequence: %d\n",
  266. dev_priv->render_ring.get_seqno(dev, &dev_priv->render_ring));
  267. } else {
  268. seq_printf(m, "Current sequence: hws uninitialized\n");
  269. }
  270. seq_printf(m, "Waiter sequence: %d\n",
  271. dev_priv->mm.waiting_gem_seqno);
  272. seq_printf(m, "IRQ sequence: %d\n", dev_priv->mm.irq_gem_seqno);
  273. mutex_unlock(&dev->struct_mutex);
  274. return 0;
  275. }
  276. static int i915_interrupt_info(struct seq_file *m, void *data)
  277. {
  278. struct drm_info_node *node = (struct drm_info_node *) m->private;
  279. struct drm_device *dev = node->minor->dev;
  280. drm_i915_private_t *dev_priv = dev->dev_private;
  281. int ret;
  282. ret = mutex_lock_interruptible(&dev->struct_mutex);
  283. if (ret)
  284. return ret;
  285. if (!HAS_PCH_SPLIT(dev)) {
  286. seq_printf(m, "Interrupt enable: %08x\n",
  287. I915_READ(IER));
  288. seq_printf(m, "Interrupt identity: %08x\n",
  289. I915_READ(IIR));
  290. seq_printf(m, "Interrupt mask: %08x\n",
  291. I915_READ(IMR));
  292. seq_printf(m, "Pipe A stat: %08x\n",
  293. I915_READ(PIPEASTAT));
  294. seq_printf(m, "Pipe B stat: %08x\n",
  295. I915_READ(PIPEBSTAT));
  296. } else {
  297. seq_printf(m, "North Display Interrupt enable: %08x\n",
  298. I915_READ(DEIER));
  299. seq_printf(m, "North Display Interrupt identity: %08x\n",
  300. I915_READ(DEIIR));
  301. seq_printf(m, "North Display Interrupt mask: %08x\n",
  302. I915_READ(DEIMR));
  303. seq_printf(m, "South Display Interrupt enable: %08x\n",
  304. I915_READ(SDEIER));
  305. seq_printf(m, "South Display Interrupt identity: %08x\n",
  306. I915_READ(SDEIIR));
  307. seq_printf(m, "South Display Interrupt mask: %08x\n",
  308. I915_READ(SDEIMR));
  309. seq_printf(m, "Graphics Interrupt enable: %08x\n",
  310. I915_READ(GTIER));
  311. seq_printf(m, "Graphics Interrupt identity: %08x\n",
  312. I915_READ(GTIIR));
  313. seq_printf(m, "Graphics Interrupt mask: %08x\n",
  314. I915_READ(GTIMR));
  315. }
  316. seq_printf(m, "Interrupts received: %d\n",
  317. atomic_read(&dev_priv->irq_received));
  318. if (dev_priv->render_ring.status_page.page_addr != NULL) {
  319. seq_printf(m, "Current sequence: %d\n",
  320. dev_priv->render_ring.get_seqno(dev, &dev_priv->render_ring));
  321. } else {
  322. seq_printf(m, "Current sequence: hws uninitialized\n");
  323. }
  324. seq_printf(m, "Waiter sequence: %d\n",
  325. dev_priv->mm.waiting_gem_seqno);
  326. seq_printf(m, "IRQ sequence: %d\n",
  327. dev_priv->mm.irq_gem_seqno);
  328. mutex_unlock(&dev->struct_mutex);
  329. return 0;
  330. }
  331. static int i915_gem_fence_regs_info(struct seq_file *m, void *data)
  332. {
  333. struct drm_info_node *node = (struct drm_info_node *) m->private;
  334. struct drm_device *dev = node->minor->dev;
  335. drm_i915_private_t *dev_priv = dev->dev_private;
  336. int i, ret;
  337. ret = mutex_lock_interruptible(&dev->struct_mutex);
  338. if (ret)
  339. return ret;
  340. seq_printf(m, "Reserved fences = %d\n", dev_priv->fence_reg_start);
  341. seq_printf(m, "Total fences = %d\n", dev_priv->num_fence_regs);
  342. for (i = 0; i < dev_priv->num_fence_regs; i++) {
  343. struct drm_gem_object *obj = dev_priv->fence_regs[i].obj;
  344. if (obj == NULL) {
  345. seq_printf(m, "Fenced object[%2d] = unused\n", i);
  346. } else {
  347. struct drm_i915_gem_object *obj_priv;
  348. obj_priv = to_intel_bo(obj);
  349. seq_printf(m, "Fenced object[%2d] = %p: %s "
  350. "%08x %08zx %08x %s %08x %08x %d",
  351. i, obj, get_pin_flag(obj_priv),
  352. obj_priv->gtt_offset,
  353. obj->size, obj_priv->stride,
  354. get_tiling_flag(obj_priv),
  355. obj->read_domains, obj->write_domain,
  356. obj_priv->last_rendering_seqno);
  357. if (obj->name)
  358. seq_printf(m, " (name: %d)", obj->name);
  359. seq_printf(m, "\n");
  360. }
  361. }
  362. mutex_unlock(&dev->struct_mutex);
  363. return 0;
  364. }
  365. static int i915_hws_info(struct seq_file *m, void *data)
  366. {
  367. struct drm_info_node *node = (struct drm_info_node *) m->private;
  368. struct drm_device *dev = node->minor->dev;
  369. drm_i915_private_t *dev_priv = dev->dev_private;
  370. int i;
  371. volatile u32 *hws;
  372. hws = (volatile u32 *)dev_priv->render_ring.status_page.page_addr;
  373. if (hws == NULL)
  374. return 0;
  375. for (i = 0; i < 4096 / sizeof(u32) / 4; i += 4) {
  376. seq_printf(m, "0x%08x: 0x%08x 0x%08x 0x%08x 0x%08x\n",
  377. i * 4,
  378. hws[i], hws[i + 1], hws[i + 2], hws[i + 3]);
  379. }
  380. return 0;
  381. }
  382. static void i915_dump_object(struct seq_file *m,
  383. struct io_mapping *mapping,
  384. struct drm_i915_gem_object *obj_priv)
  385. {
  386. int page, page_count, i;
  387. page_count = obj_priv->base.size / PAGE_SIZE;
  388. for (page = 0; page < page_count; page++) {
  389. u32 *mem = io_mapping_map_wc(mapping,
  390. obj_priv->gtt_offset + page * PAGE_SIZE);
  391. for (i = 0; i < PAGE_SIZE; i += 4)
  392. seq_printf(m, "%08x : %08x\n", i, mem[i / 4]);
  393. io_mapping_unmap(mem);
  394. }
  395. }
  396. static int i915_batchbuffer_info(struct seq_file *m, void *data)
  397. {
  398. struct drm_info_node *node = (struct drm_info_node *) m->private;
  399. struct drm_device *dev = node->minor->dev;
  400. drm_i915_private_t *dev_priv = dev->dev_private;
  401. struct drm_gem_object *obj;
  402. struct drm_i915_gem_object *obj_priv;
  403. int ret;
  404. ret = mutex_lock_interruptible(&dev->struct_mutex);
  405. if (ret)
  406. return ret;
  407. list_for_each_entry(obj_priv, &dev_priv->render_ring.active_list,
  408. list) {
  409. obj = &obj_priv->base;
  410. if (obj->read_domains & I915_GEM_DOMAIN_COMMAND) {
  411. seq_printf(m, "--- gtt_offset = 0x%08x\n",
  412. obj_priv->gtt_offset);
  413. i915_dump_object(m, dev_priv->mm.gtt_mapping, obj_priv);
  414. }
  415. }
  416. mutex_unlock(&dev->struct_mutex);
  417. return 0;
  418. }
  419. static int i915_ringbuffer_data(struct seq_file *m, void *data)
  420. {
  421. struct drm_info_node *node = (struct drm_info_node *) m->private;
  422. struct drm_device *dev = node->minor->dev;
  423. drm_i915_private_t *dev_priv = dev->dev_private;
  424. int ret;
  425. ret = mutex_lock_interruptible(&dev->struct_mutex);
  426. if (ret)
  427. return ret;
  428. if (!dev_priv->render_ring.gem_object) {
  429. seq_printf(m, "No ringbuffer setup\n");
  430. } else {
  431. u8 *virt = dev_priv->render_ring.virtual_start;
  432. uint32_t off;
  433. for (off = 0; off < dev_priv->render_ring.size; off += 4) {
  434. uint32_t *ptr = (uint32_t *)(virt + off);
  435. seq_printf(m, "%08x : %08x\n", off, *ptr);
  436. }
  437. }
  438. mutex_unlock(&dev->struct_mutex);
  439. return 0;
  440. }
  441. static int i915_ringbuffer_info(struct seq_file *m, void *data)
  442. {
  443. struct drm_info_node *node = (struct drm_info_node *) m->private;
  444. struct drm_device *dev = node->minor->dev;
  445. drm_i915_private_t *dev_priv = dev->dev_private;
  446. unsigned int head, tail;
  447. head = I915_READ(PRB0_HEAD) & HEAD_ADDR;
  448. tail = I915_READ(PRB0_TAIL) & TAIL_ADDR;
  449. seq_printf(m, "RingHead : %08x\n", head);
  450. seq_printf(m, "RingTail : %08x\n", tail);
  451. seq_printf(m, "RingSize : %08lx\n", dev_priv->render_ring.size);
  452. seq_printf(m, "Acthd : %08x\n", I915_READ(INTEL_INFO(dev)->gen >= 4 ? ACTHD_I965 : ACTHD));
  453. return 0;
  454. }
  455. static const char *pin_flag(int pinned)
  456. {
  457. if (pinned > 0)
  458. return " P";
  459. else if (pinned < 0)
  460. return " p";
  461. else
  462. return "";
  463. }
  464. static const char *tiling_flag(int tiling)
  465. {
  466. switch (tiling) {
  467. default:
  468. case I915_TILING_NONE: return "";
  469. case I915_TILING_X: return " X";
  470. case I915_TILING_Y: return " Y";
  471. }
  472. }
  473. static const char *dirty_flag(int dirty)
  474. {
  475. return dirty ? " dirty" : "";
  476. }
  477. static const char *purgeable_flag(int purgeable)
  478. {
  479. return purgeable ? " purgeable" : "";
  480. }
  481. static int i915_error_state(struct seq_file *m, void *unused)
  482. {
  483. struct drm_info_node *node = (struct drm_info_node *) m->private;
  484. struct drm_device *dev = node->minor->dev;
  485. drm_i915_private_t *dev_priv = dev->dev_private;
  486. struct drm_i915_error_state *error;
  487. unsigned long flags;
  488. int i, page, offset, elt;
  489. spin_lock_irqsave(&dev_priv->error_lock, flags);
  490. if (!dev_priv->first_error) {
  491. seq_printf(m, "no error state collected\n");
  492. goto out;
  493. }
  494. error = dev_priv->first_error;
  495. seq_printf(m, "Time: %ld s %ld us\n", error->time.tv_sec,
  496. error->time.tv_usec);
  497. seq_printf(m, "PCI ID: 0x%04x\n", dev->pci_device);
  498. seq_printf(m, "EIR: 0x%08x\n", error->eir);
  499. seq_printf(m, " PGTBL_ER: 0x%08x\n", error->pgtbl_er);
  500. seq_printf(m, " INSTPM: 0x%08x\n", error->instpm);
  501. seq_printf(m, " IPEIR: 0x%08x\n", error->ipeir);
  502. seq_printf(m, " IPEHR: 0x%08x\n", error->ipehr);
  503. seq_printf(m, " INSTDONE: 0x%08x\n", error->instdone);
  504. seq_printf(m, " ACTHD: 0x%08x\n", error->acthd);
  505. if (INTEL_INFO(dev)->gen >= 4) {
  506. seq_printf(m, " INSTPS: 0x%08x\n", error->instps);
  507. seq_printf(m, " INSTDONE1: 0x%08x\n", error->instdone1);
  508. }
  509. seq_printf(m, "seqno: 0x%08x\n", error->seqno);
  510. if (error->active_bo_count) {
  511. seq_printf(m, "Buffers [%d]:\n", error->active_bo_count);
  512. for (i = 0; i < error->active_bo_count; i++) {
  513. seq_printf(m, " %08x %8zd %08x %08x %08x%s%s%s%s",
  514. error->active_bo[i].gtt_offset,
  515. error->active_bo[i].size,
  516. error->active_bo[i].read_domains,
  517. error->active_bo[i].write_domain,
  518. error->active_bo[i].seqno,
  519. pin_flag(error->active_bo[i].pinned),
  520. tiling_flag(error->active_bo[i].tiling),
  521. dirty_flag(error->active_bo[i].dirty),
  522. purgeable_flag(error->active_bo[i].purgeable));
  523. if (error->active_bo[i].name)
  524. seq_printf(m, " (name: %d)", error->active_bo[i].name);
  525. if (error->active_bo[i].fence_reg != I915_FENCE_REG_NONE)
  526. seq_printf(m, " (fence: %d)", error->active_bo[i].fence_reg);
  527. seq_printf(m, "\n");
  528. }
  529. }
  530. for (i = 0; i < ARRAY_SIZE(error->batchbuffer); i++) {
  531. if (error->batchbuffer[i]) {
  532. struct drm_i915_error_object *obj = error->batchbuffer[i];
  533. seq_printf(m, "--- gtt_offset = 0x%08x\n", obj->gtt_offset);
  534. offset = 0;
  535. for (page = 0; page < obj->page_count; page++) {
  536. for (elt = 0; elt < PAGE_SIZE/4; elt++) {
  537. seq_printf(m, "%08x : %08x\n", offset, obj->pages[page][elt]);
  538. offset += 4;
  539. }
  540. }
  541. }
  542. }
  543. if (error->ringbuffer) {
  544. struct drm_i915_error_object *obj = error->ringbuffer;
  545. seq_printf(m, "--- ringbuffer = 0x%08x\n", obj->gtt_offset);
  546. offset = 0;
  547. for (page = 0; page < obj->page_count; page++) {
  548. for (elt = 0; elt < PAGE_SIZE/4; elt++) {
  549. seq_printf(m, "%08x : %08x\n", offset, obj->pages[page][elt]);
  550. offset += 4;
  551. }
  552. }
  553. }
  554. if (error->overlay)
  555. intel_overlay_print_error_state(m, error->overlay);
  556. out:
  557. spin_unlock_irqrestore(&dev_priv->error_lock, flags);
  558. return 0;
  559. }
  560. static int i915_rstdby_delays(struct seq_file *m, void *unused)
  561. {
  562. struct drm_info_node *node = (struct drm_info_node *) m->private;
  563. struct drm_device *dev = node->minor->dev;
  564. drm_i915_private_t *dev_priv = dev->dev_private;
  565. u16 crstanddelay = I915_READ16(CRSTANDVID);
  566. seq_printf(m, "w/ctx: %d, w/o ctx: %d\n", (crstanddelay >> 8) & 0x3f, (crstanddelay & 0x3f));
  567. return 0;
  568. }
  569. static int i915_cur_delayinfo(struct seq_file *m, void *unused)
  570. {
  571. struct drm_info_node *node = (struct drm_info_node *) m->private;
  572. struct drm_device *dev = node->minor->dev;
  573. drm_i915_private_t *dev_priv = dev->dev_private;
  574. u16 rgvswctl = I915_READ16(MEMSWCTL);
  575. u16 rgvstat = I915_READ16(MEMSTAT_ILK);
  576. seq_printf(m, "Requested P-state: %d\n", (rgvswctl >> 8) & 0xf);
  577. seq_printf(m, "Requested VID: %d\n", rgvswctl & 0x3f);
  578. seq_printf(m, "Current VID: %d\n", (rgvstat & MEMSTAT_VID_MASK) >>
  579. MEMSTAT_VID_SHIFT);
  580. seq_printf(m, "Current P-state: %d\n",
  581. (rgvstat & MEMSTAT_PSTATE_MASK) >> MEMSTAT_PSTATE_SHIFT);
  582. return 0;
  583. }
  584. static int i915_delayfreq_table(struct seq_file *m, void *unused)
  585. {
  586. struct drm_info_node *node = (struct drm_info_node *) m->private;
  587. struct drm_device *dev = node->minor->dev;
  588. drm_i915_private_t *dev_priv = dev->dev_private;
  589. u32 delayfreq;
  590. int i;
  591. for (i = 0; i < 16; i++) {
  592. delayfreq = I915_READ(PXVFREQ_BASE + i * 4);
  593. seq_printf(m, "P%02dVIDFREQ: 0x%08x (VID: %d)\n", i, delayfreq,
  594. (delayfreq & PXVFREQ_PX_MASK) >> PXVFREQ_PX_SHIFT);
  595. }
  596. return 0;
  597. }
  598. static inline int MAP_TO_MV(int map)
  599. {
  600. return 1250 - (map * 25);
  601. }
  602. static int i915_inttoext_table(struct seq_file *m, void *unused)
  603. {
  604. struct drm_info_node *node = (struct drm_info_node *) m->private;
  605. struct drm_device *dev = node->minor->dev;
  606. drm_i915_private_t *dev_priv = dev->dev_private;
  607. u32 inttoext;
  608. int i;
  609. for (i = 1; i <= 32; i++) {
  610. inttoext = I915_READ(INTTOEXT_BASE_ILK + i * 4);
  611. seq_printf(m, "INTTOEXT%02d: 0x%08x\n", i, inttoext);
  612. }
  613. return 0;
  614. }
  615. static int i915_drpc_info(struct seq_file *m, void *unused)
  616. {
  617. struct drm_info_node *node = (struct drm_info_node *) m->private;
  618. struct drm_device *dev = node->minor->dev;
  619. drm_i915_private_t *dev_priv = dev->dev_private;
  620. u32 rgvmodectl = I915_READ(MEMMODECTL);
  621. u32 rstdbyctl = I915_READ(MCHBAR_RENDER_STANDBY);
  622. u16 crstandvid = I915_READ16(CRSTANDVID);
  623. seq_printf(m, "HD boost: %s\n", (rgvmodectl & MEMMODE_BOOST_EN) ?
  624. "yes" : "no");
  625. seq_printf(m, "Boost freq: %d\n",
  626. (rgvmodectl & MEMMODE_BOOST_FREQ_MASK) >>
  627. MEMMODE_BOOST_FREQ_SHIFT);
  628. seq_printf(m, "HW control enabled: %s\n",
  629. rgvmodectl & MEMMODE_HWIDLE_EN ? "yes" : "no");
  630. seq_printf(m, "SW control enabled: %s\n",
  631. rgvmodectl & MEMMODE_SWMODE_EN ? "yes" : "no");
  632. seq_printf(m, "Gated voltage change: %s\n",
  633. rgvmodectl & MEMMODE_RCLK_GATE ? "yes" : "no");
  634. seq_printf(m, "Starting frequency: P%d\n",
  635. (rgvmodectl & MEMMODE_FSTART_MASK) >> MEMMODE_FSTART_SHIFT);
  636. seq_printf(m, "Max P-state: P%d\n",
  637. (rgvmodectl & MEMMODE_FMAX_MASK) >> MEMMODE_FMAX_SHIFT);
  638. seq_printf(m, "Min P-state: P%d\n", (rgvmodectl & MEMMODE_FMIN_MASK));
  639. seq_printf(m, "RS1 VID: %d\n", (crstandvid & 0x3f));
  640. seq_printf(m, "RS2 VID: %d\n", ((crstandvid >> 8) & 0x3f));
  641. seq_printf(m, "Render standby enabled: %s\n",
  642. (rstdbyctl & RCX_SW_EXIT) ? "no" : "yes");
  643. return 0;
  644. }
  645. static int i915_fbc_status(struct seq_file *m, void *unused)
  646. {
  647. struct drm_info_node *node = (struct drm_info_node *) m->private;
  648. struct drm_device *dev = node->minor->dev;
  649. drm_i915_private_t *dev_priv = dev->dev_private;
  650. if (!I915_HAS_FBC(dev)) {
  651. seq_printf(m, "FBC unsupported on this chipset\n");
  652. return 0;
  653. }
  654. if (intel_fbc_enabled(dev)) {
  655. seq_printf(m, "FBC enabled\n");
  656. } else {
  657. seq_printf(m, "FBC disabled: ");
  658. switch (dev_priv->no_fbc_reason) {
  659. case FBC_NO_OUTPUT:
  660. seq_printf(m, "no outputs");
  661. break;
  662. case FBC_STOLEN_TOO_SMALL:
  663. seq_printf(m, "not enough stolen memory");
  664. break;
  665. case FBC_UNSUPPORTED_MODE:
  666. seq_printf(m, "mode not supported");
  667. break;
  668. case FBC_MODE_TOO_LARGE:
  669. seq_printf(m, "mode too large");
  670. break;
  671. case FBC_BAD_PLANE:
  672. seq_printf(m, "FBC unsupported on plane");
  673. break;
  674. case FBC_NOT_TILED:
  675. seq_printf(m, "scanout buffer not tiled");
  676. break;
  677. case FBC_MULTIPLE_PIPES:
  678. seq_printf(m, "multiple pipes are enabled");
  679. break;
  680. default:
  681. seq_printf(m, "unknown reason");
  682. }
  683. seq_printf(m, "\n");
  684. }
  685. return 0;
  686. }
  687. static int i915_sr_status(struct seq_file *m, void *unused)
  688. {
  689. struct drm_info_node *node = (struct drm_info_node *) m->private;
  690. struct drm_device *dev = node->minor->dev;
  691. drm_i915_private_t *dev_priv = dev->dev_private;
  692. bool sr_enabled = false;
  693. if (IS_IRONLAKE(dev))
  694. sr_enabled = I915_READ(WM1_LP_ILK) & WM1_LP_SR_EN;
  695. else if (IS_CRESTLINE(dev) || IS_I945G(dev) || IS_I945GM(dev))
  696. sr_enabled = I915_READ(FW_BLC_SELF) & FW_BLC_SELF_EN;
  697. else if (IS_I915GM(dev))
  698. sr_enabled = I915_READ(INSTPM) & INSTPM_SELF_EN;
  699. else if (IS_PINEVIEW(dev))
  700. sr_enabled = I915_READ(DSPFW3) & PINEVIEW_SELF_REFRESH_EN;
  701. seq_printf(m, "self-refresh: %s\n",
  702. sr_enabled ? "enabled" : "disabled");
  703. return 0;
  704. }
  705. static int i915_emon_status(struct seq_file *m, void *unused)
  706. {
  707. struct drm_info_node *node = (struct drm_info_node *) m->private;
  708. struct drm_device *dev = node->minor->dev;
  709. drm_i915_private_t *dev_priv = dev->dev_private;
  710. unsigned long temp, chipset, gfx;
  711. int ret;
  712. ret = mutex_lock_interruptible(&dev->struct_mutex);
  713. if (ret)
  714. return ret;
  715. temp = i915_mch_val(dev_priv);
  716. chipset = i915_chipset_val(dev_priv);
  717. gfx = i915_gfx_val(dev_priv);
  718. mutex_unlock(&dev->struct_mutex);
  719. seq_printf(m, "GMCH temp: %ld\n", temp);
  720. seq_printf(m, "Chipset power: %ld\n", chipset);
  721. seq_printf(m, "GFX power: %ld\n", gfx);
  722. seq_printf(m, "Total power: %ld\n", chipset + gfx);
  723. return 0;
  724. }
  725. static int i915_gfxec(struct seq_file *m, void *unused)
  726. {
  727. struct drm_info_node *node = (struct drm_info_node *) m->private;
  728. struct drm_device *dev = node->minor->dev;
  729. drm_i915_private_t *dev_priv = dev->dev_private;
  730. seq_printf(m, "GFXEC: %ld\n", (unsigned long)I915_READ(0x112f4));
  731. return 0;
  732. }
  733. static int i915_opregion(struct seq_file *m, void *unused)
  734. {
  735. struct drm_info_node *node = (struct drm_info_node *) m->private;
  736. struct drm_device *dev = node->minor->dev;
  737. drm_i915_private_t *dev_priv = dev->dev_private;
  738. struct intel_opregion *opregion = &dev_priv->opregion;
  739. int ret;
  740. ret = mutex_lock_interruptible(&dev->struct_mutex);
  741. if (ret)
  742. return ret;
  743. if (opregion->header)
  744. seq_write(m, opregion->header, OPREGION_SIZE);
  745. mutex_unlock(&dev->struct_mutex);
  746. return 0;
  747. }
  748. static int i915_gem_framebuffer_info(struct seq_file *m, void *data)
  749. {
  750. struct drm_info_node *node = (struct drm_info_node *) m->private;
  751. struct drm_device *dev = node->minor->dev;
  752. drm_i915_private_t *dev_priv = dev->dev_private;
  753. struct intel_fbdev *ifbdev;
  754. struct intel_framebuffer *fb;
  755. int ret;
  756. ret = mutex_lock_interruptible(&dev->mode_config.mutex);
  757. if (ret)
  758. return ret;
  759. ifbdev = dev_priv->fbdev;
  760. fb = to_intel_framebuffer(ifbdev->helper.fb);
  761. seq_printf(m, "fbcon size: %d x %d, depth %d, %d bpp, obj ",
  762. fb->base.width,
  763. fb->base.height,
  764. fb->base.depth,
  765. fb->base.bits_per_pixel);
  766. describe_obj(m, to_intel_bo(fb->obj));
  767. seq_printf(m, "\n");
  768. list_for_each_entry(fb, &dev->mode_config.fb_list, base.head) {
  769. if (&fb->base == ifbdev->helper.fb)
  770. continue;
  771. seq_printf(m, "user size: %d x %d, depth %d, %d bpp, obj ",
  772. fb->base.width,
  773. fb->base.height,
  774. fb->base.depth,
  775. fb->base.bits_per_pixel);
  776. describe_obj(m, to_intel_bo(fb->obj));
  777. seq_printf(m, "\n");
  778. }
  779. mutex_unlock(&dev->mode_config.mutex);
  780. return 0;
  781. }
  782. static int
  783. i915_wedged_open(struct inode *inode,
  784. struct file *filp)
  785. {
  786. filp->private_data = inode->i_private;
  787. return 0;
  788. }
  789. static ssize_t
  790. i915_wedged_read(struct file *filp,
  791. char __user *ubuf,
  792. size_t max,
  793. loff_t *ppos)
  794. {
  795. struct drm_device *dev = filp->private_data;
  796. drm_i915_private_t *dev_priv = dev->dev_private;
  797. char buf[80];
  798. int len;
  799. len = snprintf(buf, sizeof (buf),
  800. "wedged : %d\n",
  801. atomic_read(&dev_priv->mm.wedged));
  802. if (len > sizeof (buf))
  803. len = sizeof (buf);
  804. return simple_read_from_buffer(ubuf, max, ppos, buf, len);
  805. }
  806. static ssize_t
  807. i915_wedged_write(struct file *filp,
  808. const char __user *ubuf,
  809. size_t cnt,
  810. loff_t *ppos)
  811. {
  812. struct drm_device *dev = filp->private_data;
  813. drm_i915_private_t *dev_priv = dev->dev_private;
  814. char buf[20];
  815. int val = 1;
  816. if (cnt > 0) {
  817. if (cnt > sizeof (buf) - 1)
  818. return -EINVAL;
  819. if (copy_from_user(buf, ubuf, cnt))
  820. return -EFAULT;
  821. buf[cnt] = 0;
  822. val = simple_strtoul(buf, NULL, 0);
  823. }
  824. DRM_INFO("Manually setting wedged to %d\n", val);
  825. atomic_set(&dev_priv->mm.wedged, val);
  826. if (val) {
  827. wake_up_all(&dev_priv->irq_queue);
  828. queue_work(dev_priv->wq, &dev_priv->error_work);
  829. }
  830. return cnt;
  831. }
  832. static const struct file_operations i915_wedged_fops = {
  833. .owner = THIS_MODULE,
  834. .open = i915_wedged_open,
  835. .read = i915_wedged_read,
  836. .write = i915_wedged_write,
  837. };
  838. /* As the drm_debugfs_init() routines are called before dev->dev_private is
  839. * allocated we need to hook into the minor for release. */
  840. static int
  841. drm_add_fake_info_node(struct drm_minor *minor,
  842. struct dentry *ent,
  843. const void *key)
  844. {
  845. struct drm_info_node *node;
  846. node = kmalloc(sizeof(struct drm_info_node), GFP_KERNEL);
  847. if (node == NULL) {
  848. debugfs_remove(ent);
  849. return -ENOMEM;
  850. }
  851. node->minor = minor;
  852. node->dent = ent;
  853. node->info_ent = (void *) key;
  854. list_add(&node->list, &minor->debugfs_nodes.list);
  855. return 0;
  856. }
  857. static int i915_wedged_create(struct dentry *root, struct drm_minor *minor)
  858. {
  859. struct drm_device *dev = minor->dev;
  860. struct dentry *ent;
  861. ent = debugfs_create_file("i915_wedged",
  862. S_IRUGO | S_IWUSR,
  863. root, dev,
  864. &i915_wedged_fops);
  865. if (IS_ERR(ent))
  866. return PTR_ERR(ent);
  867. return drm_add_fake_info_node(minor, ent, &i915_wedged_fops);
  868. }
  869. static struct drm_info_list i915_debugfs_list[] = {
  870. {"i915_capabilities", i915_capabilities, 0, 0},
  871. {"i915_gem_objects", i915_gem_object_info, 0},
  872. {"i915_gem_render_active", i915_gem_object_list_info, 0, (void *) RENDER_LIST},
  873. {"i915_gem_bsd_active", i915_gem_object_list_info, 0, (void *) BSD_LIST},
  874. {"i915_gem_flushing", i915_gem_object_list_info, 0, (void *) FLUSHING_LIST},
  875. {"i915_gem_inactive", i915_gem_object_list_info, 0, (void *) INACTIVE_LIST},
  876. {"i915_gem_pinned", i915_gem_object_list_info, 0, (void *) PINNED_LIST},
  877. {"i915_gem_deferred_free", i915_gem_object_list_info, 0, (void *) DEFERRED_FREE_LIST},
  878. {"i915_gem_pageflip", i915_gem_pageflip_info, 0},
  879. {"i915_gem_request", i915_gem_request_info, 0},
  880. {"i915_gem_seqno", i915_gem_seqno_info, 0},
  881. {"i915_gem_fence_regs", i915_gem_fence_regs_info, 0},
  882. {"i915_gem_interrupt", i915_interrupt_info, 0},
  883. {"i915_gem_hws", i915_hws_info, 0},
  884. {"i915_ringbuffer_data", i915_ringbuffer_data, 0},
  885. {"i915_ringbuffer_info", i915_ringbuffer_info, 0},
  886. {"i915_batchbuffers", i915_batchbuffer_info, 0},
  887. {"i915_error_state", i915_error_state, 0},
  888. {"i915_rstdby_delays", i915_rstdby_delays, 0},
  889. {"i915_cur_delayinfo", i915_cur_delayinfo, 0},
  890. {"i915_delayfreq_table", i915_delayfreq_table, 0},
  891. {"i915_inttoext_table", i915_inttoext_table, 0},
  892. {"i915_drpc_info", i915_drpc_info, 0},
  893. {"i915_emon_status", i915_emon_status, 0},
  894. {"i915_gfxec", i915_gfxec, 0},
  895. {"i915_fbc_status", i915_fbc_status, 0},
  896. {"i915_sr_status", i915_sr_status, 0},
  897. {"i915_opregion", i915_opregion, 0},
  898. {"i915_gem_framebuffer", i915_gem_framebuffer_info, 0},
  899. };
  900. #define I915_DEBUGFS_ENTRIES ARRAY_SIZE(i915_debugfs_list)
  901. int i915_debugfs_init(struct drm_minor *minor)
  902. {
  903. int ret;
  904. ret = i915_wedged_create(minor->debugfs_root, minor);
  905. if (ret)
  906. return ret;
  907. return drm_debugfs_create_files(i915_debugfs_list,
  908. I915_DEBUGFS_ENTRIES,
  909. minor->debugfs_root, minor);
  910. }
  911. void i915_debugfs_cleanup(struct drm_minor *minor)
  912. {
  913. drm_debugfs_remove_files(i915_debugfs_list,
  914. I915_DEBUGFS_ENTRIES, minor);
  915. drm_debugfs_remove_files((struct drm_info_list *) &i915_wedged_fops,
  916. 1, minor);
  917. }
  918. #endif /* CONFIG_DEBUG_FS */