geode-aes.c 11 KB

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  1. /* Copyright (C) 2004-2006, Advanced Micro Devices, Inc.
  2. *
  3. * This program is free software; you can redistribute it and/or modify
  4. * it under the terms of the GNU General Public License as published by
  5. * the Free Software Foundation; either version 2 of the License, or
  6. * (at your option) any later version.
  7. */
  8. #include <linux/module.h>
  9. #include <linux/kernel.h>
  10. #include <linux/pci.h>
  11. #include <linux/pci_ids.h>
  12. #include <linux/crypto.h>
  13. #include <linux/spinlock.h>
  14. #include <crypto/algapi.h>
  15. #include <asm/io.h>
  16. #include <asm/delay.h>
  17. #include "geode-aes.h"
  18. /* Register definitions */
  19. #define AES_CTRLA_REG 0x0000
  20. #define AES_CTRL_START 0x01
  21. #define AES_CTRL_DECRYPT 0x00
  22. #define AES_CTRL_ENCRYPT 0x02
  23. #define AES_CTRL_WRKEY 0x04
  24. #define AES_CTRL_DCA 0x08
  25. #define AES_CTRL_SCA 0x10
  26. #define AES_CTRL_CBC 0x20
  27. #define AES_INTR_REG 0x0008
  28. #define AES_INTRA_PENDING (1 << 16)
  29. #define AES_INTRB_PENDING (1 << 17)
  30. #define AES_INTR_PENDING (AES_INTRA_PENDING | AES_INTRB_PENDING)
  31. #define AES_INTR_MASK 0x07
  32. #define AES_SOURCEA_REG 0x0010
  33. #define AES_DSTA_REG 0x0014
  34. #define AES_LENA_REG 0x0018
  35. #define AES_WRITEKEY0_REG 0x0030
  36. #define AES_WRITEIV0_REG 0x0040
  37. /* A very large counter that is used to gracefully bail out of an
  38. * operation in case of trouble
  39. */
  40. #define AES_OP_TIMEOUT 0x50000
  41. /* Static structures */
  42. static void __iomem * _iobase;
  43. static spinlock_t lock;
  44. /* Write a 128 bit field (either a writable key or IV) */
  45. static inline void
  46. _writefield(u32 offset, void *value)
  47. {
  48. int i;
  49. for(i = 0; i < 4; i++)
  50. iowrite32(((u32 *) value)[i], _iobase + offset + (i * 4));
  51. }
  52. /* Read a 128 bit field (either a writable key or IV) */
  53. static inline void
  54. _readfield(u32 offset, void *value)
  55. {
  56. int i;
  57. for(i = 0; i < 4; i++)
  58. ((u32 *) value)[i] = ioread32(_iobase + offset + (i * 4));
  59. }
  60. static int
  61. do_crypt(void *src, void *dst, int len, u32 flags)
  62. {
  63. u32 status;
  64. u32 counter = AES_OP_TIMEOUT;
  65. iowrite32(virt_to_phys(src), _iobase + AES_SOURCEA_REG);
  66. iowrite32(virt_to_phys(dst), _iobase + AES_DSTA_REG);
  67. iowrite32(len, _iobase + AES_LENA_REG);
  68. /* Start the operation */
  69. iowrite32(AES_CTRL_START | flags, _iobase + AES_CTRLA_REG);
  70. do
  71. status = ioread32(_iobase + AES_INTR_REG);
  72. while(!(status & AES_INTRA_PENDING) && --counter);
  73. /* Clear the event */
  74. iowrite32((status & 0xFF) | AES_INTRA_PENDING, _iobase + AES_INTR_REG);
  75. return counter ? 0 : 1;
  76. }
  77. static unsigned int
  78. geode_aes_crypt(struct geode_aes_op *op)
  79. {
  80. u32 flags = 0;
  81. unsigned long iflags;
  82. if (op->len == 0)
  83. return 0;
  84. /* If the source and destination is the same, then
  85. * we need to turn on the coherent flags, otherwise
  86. * we don't need to worry
  87. */
  88. flags |= (AES_CTRL_DCA | AES_CTRL_SCA);
  89. if (op->dir == AES_DIR_ENCRYPT)
  90. flags |= AES_CTRL_ENCRYPT;
  91. /* Start the critical section */
  92. spin_lock_irqsave(&lock, iflags);
  93. if (op->mode == AES_MODE_CBC) {
  94. flags |= AES_CTRL_CBC;
  95. _writefield(AES_WRITEIV0_REG, op->iv);
  96. }
  97. if (!(op->flags & AES_FLAGS_HIDDENKEY)) {
  98. flags |= AES_CTRL_WRKEY;
  99. _writefield(AES_WRITEKEY0_REG, op->key);
  100. }
  101. do_crypt(op->src, op->dst, op->len, flags);
  102. if (op->mode == AES_MODE_CBC)
  103. _readfield(AES_WRITEIV0_REG, op->iv);
  104. spin_unlock_irqrestore(&lock, iflags);
  105. return op->len;
  106. }
  107. /* CRYPTO-API Functions */
  108. static int
  109. geode_setkey(struct crypto_tfm *tfm, const u8 *key, unsigned int len)
  110. {
  111. struct geode_aes_op *op = crypto_tfm_ctx(tfm);
  112. if (len != AES_KEY_LENGTH) {
  113. tfm->crt_flags |= CRYPTO_TFM_RES_BAD_KEY_LEN;
  114. return -EINVAL;
  115. }
  116. memcpy(op->key, key, len);
  117. return 0;
  118. }
  119. static void
  120. geode_encrypt(struct crypto_tfm *tfm, u8 *out, const u8 *in)
  121. {
  122. struct geode_aes_op *op = crypto_tfm_ctx(tfm);
  123. if ((out == NULL) || (in == NULL))
  124. return;
  125. op->src = (void *) in;
  126. op->dst = (void *) out;
  127. op->mode = AES_MODE_ECB;
  128. op->flags = 0;
  129. op->len = AES_MIN_BLOCK_SIZE;
  130. op->dir = AES_DIR_ENCRYPT;
  131. geode_aes_crypt(op);
  132. }
  133. static void
  134. geode_decrypt(struct crypto_tfm *tfm, u8 *out, const u8 *in)
  135. {
  136. struct geode_aes_op *op = crypto_tfm_ctx(tfm);
  137. if ((out == NULL) || (in == NULL))
  138. return;
  139. op->src = (void *) in;
  140. op->dst = (void *) out;
  141. op->mode = AES_MODE_ECB;
  142. op->flags = 0;
  143. op->len = AES_MIN_BLOCK_SIZE;
  144. op->dir = AES_DIR_DECRYPT;
  145. geode_aes_crypt(op);
  146. }
  147. static struct crypto_alg geode_alg = {
  148. .cra_name = "aes",
  149. .cra_driver_name = "geode-aes-128",
  150. .cra_priority = 300,
  151. .cra_alignmask = 15,
  152. .cra_flags = CRYPTO_ALG_TYPE_CIPHER,
  153. .cra_blocksize = AES_MIN_BLOCK_SIZE,
  154. .cra_ctxsize = sizeof(struct geode_aes_op),
  155. .cra_module = THIS_MODULE,
  156. .cra_list = LIST_HEAD_INIT(geode_alg.cra_list),
  157. .cra_u = {
  158. .cipher = {
  159. .cia_min_keysize = AES_KEY_LENGTH,
  160. .cia_max_keysize = AES_KEY_LENGTH,
  161. .cia_setkey = geode_setkey,
  162. .cia_encrypt = geode_encrypt,
  163. .cia_decrypt = geode_decrypt
  164. }
  165. }
  166. };
  167. static int
  168. geode_cbc_decrypt(struct blkcipher_desc *desc,
  169. struct scatterlist *dst, struct scatterlist *src,
  170. unsigned int nbytes)
  171. {
  172. struct geode_aes_op *op = crypto_blkcipher_ctx(desc->tfm);
  173. struct blkcipher_walk walk;
  174. int err, ret;
  175. blkcipher_walk_init(&walk, dst, src, nbytes);
  176. err = blkcipher_walk_virt(desc, &walk);
  177. while((nbytes = walk.nbytes)) {
  178. op->src = walk.src.virt.addr,
  179. op->dst = walk.dst.virt.addr;
  180. op->mode = AES_MODE_CBC;
  181. op->len = nbytes - (nbytes % AES_MIN_BLOCK_SIZE);
  182. op->dir = AES_DIR_DECRYPT;
  183. memcpy(op->iv, walk.iv, AES_IV_LENGTH);
  184. ret = geode_aes_crypt(op);
  185. memcpy(walk.iv, op->iv, AES_IV_LENGTH);
  186. nbytes -= ret;
  187. err = blkcipher_walk_done(desc, &walk, nbytes);
  188. }
  189. return err;
  190. }
  191. static int
  192. geode_cbc_encrypt(struct blkcipher_desc *desc,
  193. struct scatterlist *dst, struct scatterlist *src,
  194. unsigned int nbytes)
  195. {
  196. struct geode_aes_op *op = crypto_blkcipher_ctx(desc->tfm);
  197. struct blkcipher_walk walk;
  198. int err, ret;
  199. blkcipher_walk_init(&walk, dst, src, nbytes);
  200. err = blkcipher_walk_virt(desc, &walk);
  201. while((nbytes = walk.nbytes)) {
  202. op->src = walk.src.virt.addr,
  203. op->dst = walk.dst.virt.addr;
  204. op->mode = AES_MODE_CBC;
  205. op->len = nbytes - (nbytes % AES_MIN_BLOCK_SIZE);
  206. op->dir = AES_DIR_ENCRYPT;
  207. memcpy(op->iv, walk.iv, AES_IV_LENGTH);
  208. ret = geode_aes_crypt(op);
  209. nbytes -= ret;
  210. err = blkcipher_walk_done(desc, &walk, nbytes);
  211. }
  212. return err;
  213. }
  214. static struct crypto_alg geode_cbc_alg = {
  215. .cra_name = "cbc(aes)",
  216. .cra_driver_name = "cbc-aes-geode-128",
  217. .cra_priority = 400,
  218. .cra_flags = CRYPTO_ALG_TYPE_BLKCIPHER,
  219. .cra_blocksize = AES_MIN_BLOCK_SIZE,
  220. .cra_ctxsize = sizeof(struct geode_aes_op),
  221. .cra_alignmask = 15,
  222. .cra_type = &crypto_blkcipher_type,
  223. .cra_module = THIS_MODULE,
  224. .cra_list = LIST_HEAD_INIT(geode_cbc_alg.cra_list),
  225. .cra_u = {
  226. .blkcipher = {
  227. .min_keysize = AES_KEY_LENGTH,
  228. .max_keysize = AES_KEY_LENGTH,
  229. .setkey = geode_setkey,
  230. .encrypt = geode_cbc_encrypt,
  231. .decrypt = geode_cbc_decrypt,
  232. .ivsize = AES_IV_LENGTH,
  233. }
  234. }
  235. };
  236. static int
  237. geode_ecb_decrypt(struct blkcipher_desc *desc,
  238. struct scatterlist *dst, struct scatterlist *src,
  239. unsigned int nbytes)
  240. {
  241. struct geode_aes_op *op = crypto_blkcipher_ctx(desc->tfm);
  242. struct blkcipher_walk walk;
  243. int err, ret;
  244. blkcipher_walk_init(&walk, dst, src, nbytes);
  245. err = blkcipher_walk_virt(desc, &walk);
  246. while((nbytes = walk.nbytes)) {
  247. op->src = walk.src.virt.addr,
  248. op->dst = walk.dst.virt.addr;
  249. op->mode = AES_MODE_ECB;
  250. op->len = nbytes - (nbytes % AES_MIN_BLOCK_SIZE);
  251. op->dir = AES_DIR_DECRYPT;
  252. ret = geode_aes_crypt(op);
  253. nbytes -= ret;
  254. err = blkcipher_walk_done(desc, &walk, nbytes);
  255. }
  256. return err;
  257. }
  258. static int
  259. geode_ecb_encrypt(struct blkcipher_desc *desc,
  260. struct scatterlist *dst, struct scatterlist *src,
  261. unsigned int nbytes)
  262. {
  263. struct geode_aes_op *op = crypto_blkcipher_ctx(desc->tfm);
  264. struct blkcipher_walk walk;
  265. int err, ret;
  266. blkcipher_walk_init(&walk, dst, src, nbytes);
  267. err = blkcipher_walk_virt(desc, &walk);
  268. while((nbytes = walk.nbytes)) {
  269. op->src = walk.src.virt.addr,
  270. op->dst = walk.dst.virt.addr;
  271. op->mode = AES_MODE_ECB;
  272. op->len = nbytes - (nbytes % AES_MIN_BLOCK_SIZE);
  273. op->dir = AES_DIR_ENCRYPT;
  274. ret = geode_aes_crypt(op);
  275. nbytes -= ret;
  276. ret = blkcipher_walk_done(desc, &walk, nbytes);
  277. }
  278. return err;
  279. }
  280. static struct crypto_alg geode_ecb_alg = {
  281. .cra_name = "ecb(aes)",
  282. .cra_driver_name = "ecb-aes-geode-128",
  283. .cra_priority = 400,
  284. .cra_flags = CRYPTO_ALG_TYPE_BLKCIPHER,
  285. .cra_blocksize = AES_MIN_BLOCK_SIZE,
  286. .cra_ctxsize = sizeof(struct geode_aes_op),
  287. .cra_alignmask = 15,
  288. .cra_type = &crypto_blkcipher_type,
  289. .cra_module = THIS_MODULE,
  290. .cra_list = LIST_HEAD_INIT(geode_ecb_alg.cra_list),
  291. .cra_u = {
  292. .blkcipher = {
  293. .min_keysize = AES_KEY_LENGTH,
  294. .max_keysize = AES_KEY_LENGTH,
  295. .setkey = geode_setkey,
  296. .encrypt = geode_ecb_encrypt,
  297. .decrypt = geode_ecb_decrypt,
  298. }
  299. }
  300. };
  301. static void
  302. geode_aes_remove(struct pci_dev *dev)
  303. {
  304. crypto_unregister_alg(&geode_alg);
  305. crypto_unregister_alg(&geode_ecb_alg);
  306. crypto_unregister_alg(&geode_cbc_alg);
  307. pci_iounmap(dev, _iobase);
  308. _iobase = NULL;
  309. pci_release_regions(dev);
  310. pci_disable_device(dev);
  311. }
  312. static int
  313. geode_aes_probe(struct pci_dev *dev, const struct pci_device_id *id)
  314. {
  315. int ret;
  316. if ((ret = pci_enable_device(dev)))
  317. return ret;
  318. if ((ret = pci_request_regions(dev, "geode-aes-128")))
  319. goto eenable;
  320. _iobase = pci_iomap(dev, 0, 0);
  321. if (_iobase == NULL) {
  322. ret = -ENOMEM;
  323. goto erequest;
  324. }
  325. spin_lock_init(&lock);
  326. /* Clear any pending activity */
  327. iowrite32(AES_INTR_PENDING | AES_INTR_MASK, _iobase + AES_INTR_REG);
  328. if ((ret = crypto_register_alg(&geode_alg)))
  329. goto eiomap;
  330. if ((ret = crypto_register_alg(&geode_ecb_alg)))
  331. goto ealg;
  332. if ((ret = crypto_register_alg(&geode_cbc_alg)))
  333. goto eecb;
  334. printk(KERN_NOTICE "geode-aes: GEODE AES engine enabled.\n");
  335. return 0;
  336. eecb:
  337. crypto_unregister_alg(&geode_ecb_alg);
  338. ealg:
  339. crypto_unregister_alg(&geode_alg);
  340. eiomap:
  341. pci_iounmap(dev, _iobase);
  342. erequest:
  343. pci_release_regions(dev);
  344. eenable:
  345. pci_disable_device(dev);
  346. printk(KERN_ERR "geode-aes: GEODE AES initialization failed.\n");
  347. return ret;
  348. }
  349. static struct pci_device_id geode_aes_tbl[] = {
  350. { PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_LX_AES, PCI_ANY_ID, PCI_ANY_ID} ,
  351. { 0, }
  352. };
  353. MODULE_DEVICE_TABLE(pci, geode_aes_tbl);
  354. static struct pci_driver geode_aes_driver = {
  355. .name = "Geode LX AES",
  356. .id_table = geode_aes_tbl,
  357. .probe = geode_aes_probe,
  358. .remove = __devexit_p(geode_aes_remove)
  359. };
  360. static int __init
  361. geode_aes_init(void)
  362. {
  363. return pci_register_driver(&geode_aes_driver);
  364. }
  365. static void __exit
  366. geode_aes_exit(void)
  367. {
  368. pci_unregister_driver(&geode_aes_driver);
  369. }
  370. MODULE_AUTHOR("Advanced Micro Devices, Inc.");
  371. MODULE_DESCRIPTION("Geode LX Hardware AES driver");
  372. MODULE_LICENSE("GPL");
  373. MODULE_ALIAS("aes");
  374. module_init(geode_aes_init);
  375. module_exit(geode_aes_exit);