bfin-t350mcqb-fb.c 16 KB

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  1. /*
  2. * File: drivers/video/bfin-t350mcqb-fb.c
  3. * Based on:
  4. * Author: Michael Hennerich <hennerich@blackfin.uclinux.org>
  5. *
  6. * Created:
  7. * Description: Blackfin LCD Framebufer driver
  8. *
  9. *
  10. * Modified:
  11. * Copyright 2004-2007 Analog Devices Inc.
  12. *
  13. * Bugs: Enter bugs at http://blackfin.uclinux.org/
  14. *
  15. * This program is free software; you can redistribute it and/or modify
  16. * it under the terms of the GNU General Public License as published by
  17. * the Free Software Foundation; either version 2 of the License, or
  18. * (at your option) any later version.
  19. *
  20. * This program is distributed in the hope that it will be useful,
  21. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  22. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  23. * GNU General Public License for more details.
  24. *
  25. * You should have received a copy of the GNU General Public License
  26. * along with this program; if not, see the file COPYING, or write
  27. * to the Free Software Foundation, Inc.,
  28. * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  29. */
  30. #include <linux/module.h>
  31. #include <linux/kernel.h>
  32. #include <linux/errno.h>
  33. #include <linux/string.h>
  34. #include <linux/fb.h>
  35. #include <linux/init.h>
  36. #include <linux/types.h>
  37. #include <linux/interrupt.h>
  38. #include <linux/device.h>
  39. #include <linux/backlight.h>
  40. #include <linux/lcd.h>
  41. #include <linux/dma-mapping.h>
  42. #include <linux/platform_device.h>
  43. #include <asm/blackfin.h>
  44. #include <asm/irq.h>
  45. #include <asm/dma-mapping.h>
  46. #include <asm/dma.h>
  47. #include <asm/portmux.h>
  48. #include <asm/gptimers.h>
  49. #define NO_BL_SUPPORT
  50. #define LCD_X_RES 320 /* Horizontal Resolution */
  51. #define LCD_Y_RES 240 /* Vertical Resolution */
  52. #define LCD_BPP 24 /* Bit Per Pixel */
  53. #define DMA_BUS_SIZE 16
  54. #define LCD_CLK (12*1000*1000) /* 12MHz */
  55. #define CLOCKS_PER_PIX 3
  56. /*
  57. * HS and VS timing parameters (all in number of PPI clk ticks)
  58. */
  59. #define U_LINE 1 /* Blanking Lines */
  60. #define H_ACTPIX (LCD_X_RES * CLOCKS_PER_PIX) /* active horizontal pixel */
  61. #define H_PERIOD (408 * CLOCKS_PER_PIX) /* HS period */
  62. #define H_PULSE 90 /* HS pulse width */
  63. #define H_START 204 /* first valid pixel */
  64. #define V_LINES (LCD_Y_RES + U_LINE) /* total vertical lines */
  65. #define V_PULSE (3 * H_PERIOD) /* VS pulse width (1-5 H_PERIODs) */
  66. #define V_PERIOD (H_PERIOD * V_LINES) /* VS period */
  67. #define ACTIVE_VIDEO_MEM_OFFSET (U_LINE * H_ACTPIX)
  68. #define BFIN_LCD_NBR_PALETTE_ENTRIES 256
  69. #define DRIVER_NAME "bfin-t350mcqb"
  70. static char driver_name[] = DRIVER_NAME;
  71. struct bfin_t350mcqbfb_info {
  72. struct fb_info *fb;
  73. struct device *dev;
  74. unsigned char *fb_buffer; /* RGB Buffer */
  75. dma_addr_t dma_handle;
  76. int lq043_mmap;
  77. int lq043_open_cnt;
  78. int irq;
  79. spinlock_t lock; /* lock */
  80. };
  81. static int nocursor;
  82. module_param(nocursor, int, 0644);
  83. MODULE_PARM_DESC(nocursor, "cursor enable/disable");
  84. #define PPI_TX_MODE 0x2
  85. #define PPI_XFER_TYPE_11 0xC
  86. #define PPI_PORT_CFG_01 0x10
  87. #define PPI_PACK_EN 0x80
  88. #define PPI_POLS_1 0x8000
  89. static void bfin_t350mcqb_config_ppi(struct bfin_t350mcqbfb_info *fbi)
  90. {
  91. bfin_write_PPI_DELAY(H_START);
  92. bfin_write_PPI_COUNT(H_ACTPIX-1);
  93. bfin_write_PPI_FRAME(V_LINES);
  94. bfin_write_PPI_CONTROL(PPI_TX_MODE | /* output mode , PORT_DIR */
  95. PPI_XFER_TYPE_11 | /* sync mode XFR_TYPE */
  96. PPI_PORT_CFG_01 | /* two frame sync PORT_CFG */
  97. PPI_PACK_EN | /* packing enabled PACK_EN */
  98. PPI_POLS_1); /* faling edge syncs POLS */
  99. }
  100. static inline void bfin_t350mcqb_disable_ppi(void)
  101. {
  102. bfin_write_PPI_CONTROL(bfin_read_PPI_CONTROL() & ~PORT_EN);
  103. }
  104. static inline void bfin_t350mcqb_enable_ppi(void)
  105. {
  106. bfin_write_PPI_CONTROL(bfin_read_PPI_CONTROL() | PORT_EN);
  107. }
  108. static void bfin_t350mcqb_start_timers(void)
  109. {
  110. unsigned long flags;
  111. local_irq_save(flags);
  112. enable_gptimers(TIMER1bit);
  113. enable_gptimers(TIMER0bit);
  114. local_irq_restore(flags);
  115. }
  116. static void bfin_t350mcqb_stop_timers(void)
  117. {
  118. disable_gptimers(TIMER0bit | TIMER1bit);
  119. set_gptimer_status(0, TIMER_STATUS_TRUN0 | TIMER_STATUS_TRUN1 |
  120. TIMER_STATUS_TIMIL0 | TIMER_STATUS_TIMIL1 |
  121. TIMER_STATUS_TOVF0 | TIMER_STATUS_TOVF1);
  122. }
  123. static void bfin_t350mcqb_init_timers(void)
  124. {
  125. bfin_t350mcqb_stop_timers();
  126. set_gptimer_period(TIMER0_id, H_PERIOD);
  127. set_gptimer_pwidth(TIMER0_id, H_PULSE);
  128. set_gptimer_config(TIMER0_id, TIMER_MODE_PWM | TIMER_PERIOD_CNT |
  129. TIMER_TIN_SEL | TIMER_CLK_SEL|
  130. TIMER_EMU_RUN);
  131. set_gptimer_period(TIMER1_id, V_PERIOD);
  132. set_gptimer_pwidth(TIMER1_id, V_PULSE);
  133. set_gptimer_config(TIMER1_id, TIMER_MODE_PWM | TIMER_PERIOD_CNT |
  134. TIMER_TIN_SEL | TIMER_CLK_SEL |
  135. TIMER_EMU_RUN);
  136. }
  137. static void bfin_t350mcqb_config_dma(struct bfin_t350mcqbfb_info *fbi)
  138. {
  139. set_dma_config(CH_PPI,
  140. set_bfin_dma_config(DIR_READ, DMA_FLOW_AUTO,
  141. INTR_DISABLE, DIMENSION_2D,
  142. DATA_SIZE_16,
  143. DMA_NOSYNC_KEEP_DMA_BUF));
  144. set_dma_x_count(CH_PPI, (LCD_X_RES * LCD_BPP) / DMA_BUS_SIZE);
  145. set_dma_x_modify(CH_PPI, DMA_BUS_SIZE / 8);
  146. set_dma_y_count(CH_PPI, V_LINES);
  147. set_dma_y_modify(CH_PPI, DMA_BUS_SIZE / 8);
  148. set_dma_start_addr(CH_PPI, (unsigned long)fbi->fb_buffer);
  149. }
  150. static int bfin_t350mcqb_request_ports(int action)
  151. {
  152. u16 ppi0_req_8[] = {P_PPI0_CLK, P_PPI0_FS1, P_PPI0_FS2,
  153. P_PPI0_D0, P_PPI0_D1, P_PPI0_D2,
  154. P_PPI0_D3, P_PPI0_D4, P_PPI0_D5,
  155. P_PPI0_D6, P_PPI0_D7, 0};
  156. if (action) {
  157. if (peripheral_request_list(ppi0_req_8, DRIVER_NAME)) {
  158. printk(KERN_ERR "Requesting Peripherals faild\n");
  159. return -EFAULT;
  160. }
  161. } else
  162. peripheral_free_list(ppi0_req_8);
  163. return 0;
  164. }
  165. static int bfin_t350mcqb_fb_open(struct fb_info *info, int user)
  166. {
  167. struct bfin_t350mcqbfb_info *fbi = info->par;
  168. spin_lock(&fbi->lock);
  169. fbi->lq043_open_cnt++;
  170. if (fbi->lq043_open_cnt <= 1) {
  171. bfin_t350mcqb_disable_ppi();
  172. SSYNC();
  173. bfin_t350mcqb_config_dma(fbi);
  174. bfin_t350mcqb_config_ppi(fbi);
  175. bfin_t350mcqb_init_timers();
  176. /* start dma */
  177. enable_dma(CH_PPI);
  178. bfin_t350mcqb_enable_ppi();
  179. bfin_t350mcqb_start_timers();
  180. }
  181. spin_unlock(&fbi->lock);
  182. return 0;
  183. }
  184. static int bfin_t350mcqb_fb_release(struct fb_info *info, int user)
  185. {
  186. struct bfin_t350mcqbfb_info *fbi = info->par;
  187. spin_lock(&fbi->lock);
  188. fbi->lq043_open_cnt--;
  189. fbi->lq043_mmap = 0;
  190. if (fbi->lq043_open_cnt <= 0) {
  191. bfin_t350mcqb_disable_ppi();
  192. SSYNC();
  193. disable_dma(CH_PPI);
  194. bfin_t350mcqb_stop_timers();
  195. memset(fbi->fb_buffer, 0, info->fix.smem_len);
  196. }
  197. spin_unlock(&fbi->lock);
  198. return 0;
  199. }
  200. static int bfin_t350mcqb_fb_check_var(struct fb_var_screeninfo *var,
  201. struct fb_info *info)
  202. {
  203. if (var->bits_per_pixel != LCD_BPP) {
  204. pr_debug("%s: depth not supported: %u BPP\n", __FUNCTION__,
  205. var->bits_per_pixel);
  206. return -EINVAL;
  207. }
  208. if (info->var.xres != var->xres || info->var.yres != var->yres ||
  209. info->var.xres_virtual != var->xres_virtual ||
  210. info->var.yres_virtual != var->yres_virtual) {
  211. pr_debug("%s: Resolution not supported: X%u x Y%u \n",
  212. __FUNCTION__, var->xres, var->yres);
  213. return -EINVAL;
  214. }
  215. /*
  216. * Memory limit
  217. */
  218. if ((info->fix.line_length * var->yres_virtual) > info->fix.smem_len) {
  219. pr_debug("%s: Memory Limit requested yres_virtual = %u\n",
  220. __FUNCTION__, var->yres_virtual);
  221. return -ENOMEM;
  222. }
  223. return 0;
  224. }
  225. static int bfin_t350mcqb_fb_mmap(struct fb_info *info, struct vm_area_struct *vma)
  226. {
  227. struct bfin_t350mcqbfb_info *fbi = info->par;
  228. if (fbi->lq043_mmap)
  229. return -1;
  230. spin_lock(&fbi->lock);
  231. fbi->lq043_mmap = 1;
  232. spin_unlock(&fbi->lock);
  233. vma->vm_start = (unsigned long)(fbi->fb_buffer + ACTIVE_VIDEO_MEM_OFFSET);
  234. vma->vm_end = vma->vm_start + info->fix.smem_len;
  235. /* For those who don't understand how mmap works, go read
  236. * Documentation/nommu-mmap.txt.
  237. * For those that do, you will know that the VM_MAYSHARE flag
  238. * must be set in the vma->vm_flags structure on noMMU
  239. * Other flags can be set, and are documented in
  240. * include/linux/mm.h
  241. */
  242. vma->vm_flags |= VM_MAYSHARE;
  243. return 0;
  244. }
  245. int bfin_t350mcqb_fb_cursor(struct fb_info *info, struct fb_cursor *cursor)
  246. {
  247. if (nocursor)
  248. return 0;
  249. else
  250. return -EINVAL; /* just to force soft_cursor() call */
  251. }
  252. static int bfin_t350mcqb_fb_setcolreg(u_int regno, u_int red, u_int green,
  253. u_int blue, u_int transp,
  254. struct fb_info *info)
  255. {
  256. if (regno >= BFIN_LCD_NBR_PALETTE_ENTRIES)
  257. return -EINVAL;
  258. if (info->var.grayscale) {
  259. /* grayscale = 0.30*R + 0.59*G + 0.11*B */
  260. red = green = blue = (red * 77 + green * 151 + blue * 28) >> 8;
  261. }
  262. if (info->fix.visual == FB_VISUAL_TRUECOLOR) {
  263. u32 value;
  264. /* Place color in the pseudopalette */
  265. if (regno > 16)
  266. return -EINVAL;
  267. red >>= (16 - info->var.red.length);
  268. green >>= (16 - info->var.green.length);
  269. blue >>= (16 - info->var.blue.length);
  270. value = (red << info->var.red.offset) |
  271. (green << info->var.green.offset) |
  272. (blue << info->var.blue.offset);
  273. value &= 0xFFFFFF;
  274. ((u32 *) (info->pseudo_palette))[regno] = value;
  275. }
  276. return 0;
  277. }
  278. static struct fb_ops bfin_t350mcqb_fb_ops = {
  279. .owner = THIS_MODULE,
  280. .fb_open = bfin_t350mcqb_fb_open,
  281. .fb_release = bfin_t350mcqb_fb_release,
  282. .fb_check_var = bfin_t350mcqb_fb_check_var,
  283. .fb_fillrect = cfb_fillrect,
  284. .fb_copyarea = cfb_copyarea,
  285. .fb_imageblit = cfb_imageblit,
  286. .fb_mmap = bfin_t350mcqb_fb_mmap,
  287. .fb_cursor = bfin_t350mcqb_fb_cursor,
  288. .fb_setcolreg = bfin_t350mcqb_fb_setcolreg,
  289. };
  290. #ifndef NO_BL_SUPPORT
  291. static int bl_get_brightness(struct backlight_device *bd)
  292. {
  293. return 0;
  294. }
  295. static struct backlight_ops bfin_lq043fb_bl_ops = {
  296. .get_brightness = bl_get_brightness,
  297. };
  298. static struct backlight_device *bl_dev;
  299. static int bfin_lcd_get_power(struct lcd_device *dev)
  300. {
  301. return 0;
  302. }
  303. static int bfin_lcd_set_power(struct lcd_device *dev, int power)
  304. {
  305. return 0;
  306. }
  307. static int bfin_lcd_get_contrast(struct lcd_device *dev)
  308. {
  309. return 0;
  310. }
  311. static int bfin_lcd_set_contrast(struct lcd_device *dev, int contrast)
  312. {
  313. return 0;
  314. }
  315. static int bfin_lcd_check_fb(struct fb_info *fi)
  316. {
  317. if (!fi || (fi == &bfin_t350mcqb_fb))
  318. return 1;
  319. return 0;
  320. }
  321. static struct lcd_ops bfin_lcd_ops = {
  322. .get_power = bfin_lcd_get_power,
  323. .set_power = bfin_lcd_set_power,
  324. .get_contrast = bfin_lcd_get_contrast,
  325. .set_contrast = bfin_lcd_set_contrast,
  326. .check_fb = bfin_lcd_check_fb,
  327. };
  328. static struct lcd_device *lcd_dev;
  329. #endif
  330. static irqreturn_t bfin_t350mcqb_irq_error(int irq, void *dev_id)
  331. {
  332. /*struct bfin_t350mcqbfb_info *info = (struct bfin_t350mcqbfb_info *)dev_id;*/
  333. u16 status = bfin_read_PPI_STATUS();
  334. bfin_write_PPI_STATUS(0xFFFF);
  335. if (status) {
  336. bfin_t350mcqb_disable_ppi();
  337. disable_dma(CH_PPI);
  338. /* start dma */
  339. enable_dma(CH_PPI);
  340. bfin_t350mcqb_enable_ppi();
  341. bfin_write_PPI_STATUS(0xFFFF);
  342. }
  343. return IRQ_HANDLED;
  344. }
  345. static int __init bfin_t350mcqb_probe(struct platform_device *pdev)
  346. {
  347. struct bfin_t350mcqbfb_info *info;
  348. struct fb_info *fbinfo;
  349. int ret;
  350. printk(KERN_INFO DRIVER_NAME ": %dx%d %d-bit RGB FrameBuffer initializing...\n",
  351. LCD_X_RES, LCD_Y_RES, LCD_BPP);
  352. if (request_dma(CH_PPI, "CH_PPI") < 0) {
  353. printk(KERN_ERR DRIVER_NAME
  354. ": couldn't request CH_PPI DMA\n");
  355. ret = -EFAULT;
  356. goto out1;
  357. }
  358. fbinfo =
  359. framebuffer_alloc(sizeof(struct bfin_t350mcqbfb_info), &pdev->dev);
  360. if (!fbinfo) {
  361. ret = -ENOMEM;
  362. goto out2;
  363. }
  364. info = fbinfo->par;
  365. info->fb = fbinfo;
  366. info->dev = &pdev->dev;
  367. platform_set_drvdata(pdev, fbinfo);
  368. strcpy(fbinfo->fix.id, driver_name);
  369. fbinfo->fix.type = FB_TYPE_PACKED_PIXELS;
  370. fbinfo->fix.type_aux = 0;
  371. fbinfo->fix.xpanstep = 0;
  372. fbinfo->fix.ypanstep = 0;
  373. fbinfo->fix.ywrapstep = 0;
  374. fbinfo->fix.accel = FB_ACCEL_NONE;
  375. fbinfo->fix.visual = FB_VISUAL_TRUECOLOR;
  376. fbinfo->var.nonstd = 0;
  377. fbinfo->var.activate = FB_ACTIVATE_NOW;
  378. fbinfo->var.height = -1;
  379. fbinfo->var.width = -1;
  380. fbinfo->var.accel_flags = 0;
  381. fbinfo->var.vmode = FB_VMODE_NONINTERLACED;
  382. fbinfo->var.xres = LCD_X_RES;
  383. fbinfo->var.xres_virtual = LCD_X_RES;
  384. fbinfo->var.yres = LCD_Y_RES;
  385. fbinfo->var.yres_virtual = LCD_Y_RES;
  386. fbinfo->var.bits_per_pixel = LCD_BPP;
  387. fbinfo->var.red.offset = 0;
  388. fbinfo->var.green.offset = 8;
  389. fbinfo->var.blue.offset = 16;
  390. fbinfo->var.transp.offset = 0;
  391. fbinfo->var.red.length = 8;
  392. fbinfo->var.green.length = 8;
  393. fbinfo->var.blue.length = 8;
  394. fbinfo->var.transp.length = 0;
  395. fbinfo->fix.smem_len = LCD_X_RES * LCD_Y_RES * LCD_BPP / 8;
  396. fbinfo->fix.line_length = fbinfo->var.xres_virtual *
  397. fbinfo->var.bits_per_pixel / 8;
  398. fbinfo->fbops = &bfin_t350mcqb_fb_ops;
  399. fbinfo->flags = FBINFO_FLAG_DEFAULT;
  400. info->fb_buffer =
  401. dma_alloc_coherent(NULL, fbinfo->fix.smem_len, &info->dma_handle,
  402. GFP_KERNEL);
  403. if (NULL == info->fb_buffer) {
  404. printk(KERN_ERR DRIVER_NAME
  405. ": couldn't allocate dma buffer.\n");
  406. ret = -ENOMEM;
  407. goto out3;
  408. }
  409. memset(info->fb_buffer, 0, fbinfo->fix.smem_len);
  410. fbinfo->screen_base = (void *)info->fb_buffer + ACTIVE_VIDEO_MEM_OFFSET;
  411. fbinfo->fix.smem_start = (int)info->fb_buffer + ACTIVE_VIDEO_MEM_OFFSET;
  412. fbinfo->fbops = &bfin_t350mcqb_fb_ops;
  413. fbinfo->pseudo_palette = kmalloc(sizeof(u32) * 16, GFP_KERNEL);
  414. if (!fbinfo->pseudo_palette) {
  415. printk(KERN_ERR DRIVER_NAME
  416. "Fail to allocate pseudo_palette\n");
  417. ret = -ENOMEM;
  418. goto out4;
  419. }
  420. memset(fbinfo->pseudo_palette, 0, sizeof(u32) * 16);
  421. if (fb_alloc_cmap(&fbinfo->cmap, BFIN_LCD_NBR_PALETTE_ENTRIES, 0)
  422. < 0) {
  423. printk(KERN_ERR DRIVER_NAME
  424. "Fail to allocate colormap (%d entries)\n",
  425. BFIN_LCD_NBR_PALETTE_ENTRIES);
  426. ret = -EFAULT;
  427. goto out5;
  428. }
  429. if (bfin_t350mcqb_request_ports(1)) {
  430. printk(KERN_ERR DRIVER_NAME ": couldn't request gpio port.\n");
  431. ret = -EFAULT;
  432. goto out6;
  433. }
  434. info->irq = platform_get_irq(pdev, 0);
  435. if (info->irq < 0) {
  436. ret = -EINVAL;
  437. goto out7;
  438. }
  439. if (request_irq(info->irq, (void *)bfin_t350mcqb_irq_error, IRQF_DISABLED,
  440. "PPI ERROR", info) < 0) {
  441. printk(KERN_ERR DRIVER_NAME
  442. ": unable to request PPI ERROR IRQ\n");
  443. ret = -EFAULT;
  444. goto out7;
  445. }
  446. if (register_framebuffer(fbinfo) < 0) {
  447. printk(KERN_ERR DRIVER_NAME
  448. ": unable to register framebuffer.\n");
  449. ret = -EINVAL;
  450. goto out8;
  451. }
  452. #ifndef NO_BL_SUPPORT
  453. bl_dev =
  454. backlight_device_register("bf52x-bl", NULL, NULL,
  455. &bfin_lq043fb_bl_ops);
  456. bl_dev->props.max_brightness = 255;
  457. lcd_dev = lcd_device_register(DRIVER_NAME, NULL, &bfin_lcd_ops);
  458. lcd_dev->props.max_contrast = 255, printk(KERN_INFO "Done.\n");
  459. #endif
  460. return 0;
  461. out8:
  462. free_irq(info->irq, info);
  463. out7:
  464. bfin_t350mcqb_request_ports(0);
  465. out6:
  466. fb_dealloc_cmap(&fbinfo->cmap);
  467. out5:
  468. kfree(fbinfo->pseudo_palette);
  469. out4:
  470. dma_free_coherent(NULL, fbinfo->fix.smem_len, info->fb_buffer,
  471. info->dma_handle);
  472. out3:
  473. framebuffer_release(fbinfo);
  474. out2:
  475. free_dma(CH_PPI);
  476. out1:
  477. platform_set_drvdata(pdev, NULL);
  478. return ret;
  479. }
  480. static int bfin_t350mcqb_remove(struct platform_device *pdev)
  481. {
  482. struct fb_info *fbinfo = platform_get_drvdata(pdev);
  483. struct bfin_t350mcqbfb_info *info = fbinfo->par;
  484. free_dma(CH_PPI);
  485. free_irq(info->irq, info);
  486. if (info->fb_buffer != NULL)
  487. dma_free_coherent(NULL, fbinfo->fix.smem_len, info->fb_buffer,
  488. info->dma_handle);
  489. kfree(fbinfo->pseudo_palette);
  490. fb_dealloc_cmap(&fbinfo->cmap);
  491. #ifndef NO_BL_SUPPORT
  492. lcd_device_unregister(lcd_dev);
  493. backlight_device_unregister(bl_dev);
  494. #endif
  495. unregister_framebuffer(fbinfo);
  496. bfin_t350mcqb_request_ports(0);
  497. printk(KERN_INFO DRIVER_NAME ": Unregister LCD driver.\n");
  498. return 0;
  499. }
  500. #ifdef CONFIG_PM
  501. static int bfin_t350mcqb_suspend(struct platform_device *pdev, pm_message_t state)
  502. {
  503. struct fb_info *fbinfo = platform_get_drvdata(pdev);
  504. struct bfin_t350mcqbfb_info *info = fbinfo->par;
  505. bfin_t350mcqb_disable_ppi();
  506. disable_dma(CH_PPI);
  507. bfin_write_PPI_STATUS(0xFFFF);
  508. return 0;
  509. }
  510. static int bfin_t350mcqb_resume(struct platform_device *pdev)
  511. {
  512. struct fb_info *fbinfo = platform_get_drvdata(pdev);
  513. struct bfin_t350mcqbfb_info *info = fbinfo->par;
  514. enable_dma(CH_PPI);
  515. bfin_t350mcqb_enable_ppi();
  516. return 0;
  517. }
  518. #else
  519. #define bfin_t350mcqb_suspend NULL
  520. #define bfin_t350mcqb_resume NULL
  521. #endif
  522. static struct platform_driver bfin_t350mcqb_driver = {
  523. .probe = bfin_t350mcqb_probe,
  524. .remove = bfin_t350mcqb_remove,
  525. .suspend = bfin_t350mcqb_suspend,
  526. .resume = bfin_t350mcqb_resume,
  527. .driver = {
  528. .name = DRIVER_NAME,
  529. .owner = THIS_MODULE,
  530. },
  531. };
  532. static int __devinit bfin_t350mcqb_driver_init(void)
  533. {
  534. return platform_driver_register(&bfin_t350mcqb_driver);
  535. }
  536. static void __exit bfin_t350mcqb_driver_cleanup(void)
  537. {
  538. platform_driver_unregister(&bfin_t350mcqb_driver);
  539. }
  540. MODULE_DESCRIPTION("Blackfin TFT LCD Driver");
  541. MODULE_LICENSE("GPL");
  542. module_init(bfin_t350mcqb_driver_init);
  543. module_exit(bfin_t350mcqb_driver_cleanup);