bfin_5xx.c 31 KB

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  1. /*
  2. * File: drivers/serial/bfin_5xx.c
  3. * Based on: Based on drivers/serial/sa1100.c
  4. * Author: Aubrey Li <aubrey.li@analog.com>
  5. *
  6. * Created:
  7. * Description: Driver for blackfin 5xx serial ports
  8. *
  9. * Modified:
  10. * Copyright 2006 Analog Devices Inc.
  11. *
  12. * Bugs: Enter bugs at http://blackfin.uclinux.org/
  13. *
  14. * This program is free software; you can redistribute it and/or modify
  15. * it under the terms of the GNU General Public License as published by
  16. * the Free Software Foundation; either version 2 of the License, or
  17. * (at your option) any later version.
  18. *
  19. * This program is distributed in the hope that it will be useful,
  20. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  21. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  22. * GNU General Public License for more details.
  23. *
  24. * You should have received a copy of the GNU General Public License
  25. * along with this program; if not, see the file COPYING, or write
  26. * to the Free Software Foundation, Inc.,
  27. * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  28. */
  29. #if defined(CONFIG_SERIAL_BFIN_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
  30. #define SUPPORT_SYSRQ
  31. #endif
  32. #include <linux/module.h>
  33. #include <linux/ioport.h>
  34. #include <linux/init.h>
  35. #include <linux/console.h>
  36. #include <linux/sysrq.h>
  37. #include <linux/platform_device.h>
  38. #include <linux/tty.h>
  39. #include <linux/tty_flip.h>
  40. #include <linux/serial_core.h>
  41. #ifdef CONFIG_KGDB_UART
  42. #include <linux/kgdb.h>
  43. #include <asm/irq_regs.h>
  44. #endif
  45. #include <asm/gpio.h>
  46. #include <asm/mach/bfin_serial_5xx.h>
  47. #ifdef CONFIG_SERIAL_BFIN_DMA
  48. #include <linux/dma-mapping.h>
  49. #include <asm/io.h>
  50. #include <asm/irq.h>
  51. #include <asm/cacheflush.h>
  52. #endif
  53. /* UART name and device definitions */
  54. #define BFIN_SERIAL_NAME "ttyBF"
  55. #define BFIN_SERIAL_MAJOR 204
  56. #define BFIN_SERIAL_MINOR 64
  57. /*
  58. * Setup for console. Argument comes from the menuconfig
  59. */
  60. #define DMA_RX_XCOUNT 512
  61. #define DMA_RX_YCOUNT (PAGE_SIZE / DMA_RX_XCOUNT)
  62. #define DMA_RX_FLUSH_JIFFIES 5
  63. #ifdef CONFIG_SERIAL_BFIN_DMA
  64. static void bfin_serial_dma_tx_chars(struct bfin_serial_port *uart);
  65. #else
  66. static void bfin_serial_do_work(struct work_struct *work);
  67. static void bfin_serial_tx_chars(struct bfin_serial_port *uart);
  68. #endif
  69. static void bfin_serial_mctrl_check(struct bfin_serial_port *uart);
  70. /*
  71. * interrupts are disabled on entry
  72. */
  73. static void bfin_serial_stop_tx(struct uart_port *port)
  74. {
  75. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  76. #if !defined(CONFIG_BF54x) && !defined(CONFIG_SERIAL_BFIN_DMA)
  77. unsigned short ier;
  78. #endif
  79. while (!(UART_GET_LSR(uart) & TEMT))
  80. continue;
  81. #ifdef CONFIG_SERIAL_BFIN_DMA
  82. disable_dma(uart->tx_dma_channel);
  83. #else
  84. #ifdef CONFIG_BF54x
  85. /* Waiting for Transmission Finished */
  86. while (!(UART_GET_LSR(uart) & TFI))
  87. continue;
  88. /* Clear TFI bit */
  89. UART_PUT_LSR(uart, TFI);
  90. UART_CLEAR_IER(uart, ETBEI);
  91. #else
  92. ier = UART_GET_IER(uart);
  93. ier &= ~ETBEI;
  94. UART_PUT_IER(uart, ier);
  95. #endif
  96. #endif
  97. }
  98. /*
  99. * port is locked and interrupts are disabled
  100. */
  101. static void bfin_serial_start_tx(struct uart_port *port)
  102. {
  103. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  104. #ifdef CONFIG_SERIAL_BFIN_DMA
  105. bfin_serial_dma_tx_chars(uart);
  106. #else
  107. #ifdef CONFIG_BF54x
  108. UART_SET_IER(uart, ETBEI);
  109. #else
  110. unsigned short ier;
  111. ier = UART_GET_IER(uart);
  112. ier |= ETBEI;
  113. UART_PUT_IER(uart, ier);
  114. #endif
  115. bfin_serial_tx_chars(uart);
  116. #endif
  117. }
  118. /*
  119. * Interrupts are enabled
  120. */
  121. static void bfin_serial_stop_rx(struct uart_port *port)
  122. {
  123. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  124. #ifdef CONFIG_KGDB_UART
  125. if (uart->port.line != CONFIG_KGDB_UART_PORT) {
  126. #endif
  127. #ifdef CONFIG_BF54x
  128. UART_CLEAR_IER(uart, ERBFI);
  129. #else
  130. unsigned short ier;
  131. ier = UART_GET_IER(uart);
  132. ier &= ~ERBFI;
  133. UART_PUT_IER(uart, ier);
  134. #endif
  135. #ifdef CONFIG_KGDB_UART
  136. }
  137. #endif
  138. }
  139. /*
  140. * Set the modem control timer to fire immediately.
  141. */
  142. static void bfin_serial_enable_ms(struct uart_port *port)
  143. {
  144. }
  145. #ifdef CONFIG_KGDB_UART
  146. static int kgdb_entry_state;
  147. void kgdb_put_debug_char(int chr)
  148. {
  149. struct bfin_serial_port *uart;
  150. if (CONFIG_KGDB_UART_PORT<0 || CONFIG_KGDB_UART_PORT>=NR_PORTS)
  151. uart = &bfin_serial_ports[0];
  152. else
  153. uart = &bfin_serial_ports[CONFIG_KGDB_UART_PORT];
  154. while (!(UART_GET_LSR(uart) & THRE)) {
  155. SSYNC();
  156. }
  157. #ifndef CONFIG_BF54x
  158. UART_PUT_LCR(uart, UART_GET_LCR(uart)&(~DLAB));
  159. SSYNC();
  160. #endif
  161. UART_PUT_CHAR(uart, (unsigned char)chr);
  162. SSYNC();
  163. }
  164. int kgdb_get_debug_char(void)
  165. {
  166. struct bfin_serial_port *uart;
  167. unsigned char chr;
  168. if (CONFIG_KGDB_UART_PORT<0 || CONFIG_KGDB_UART_PORT>=NR_PORTS)
  169. uart = &bfin_serial_ports[0];
  170. else
  171. uart = &bfin_serial_ports[CONFIG_KGDB_UART_PORT];
  172. while(!(UART_GET_LSR(uart) & DR)) {
  173. SSYNC();
  174. }
  175. #ifndef CONFIG_BF54x
  176. UART_PUT_LCR(uart, UART_GET_LCR(uart)&(~DLAB));
  177. SSYNC();
  178. #endif
  179. chr = UART_GET_CHAR(uart);
  180. SSYNC();
  181. return chr;
  182. }
  183. #endif
  184. #ifdef CONFIG_SERIAL_BFIN_PIO
  185. static void bfin_serial_rx_chars(struct bfin_serial_port *uart)
  186. {
  187. struct tty_struct *tty = uart->port.info->tty;
  188. unsigned int status, ch, flg;
  189. static int in_break = 0;
  190. #ifdef CONFIG_KGDB_UART
  191. struct pt_regs *regs = get_irq_regs();
  192. #endif
  193. ch = UART_GET_CHAR(uart);
  194. status = UART_GET_LSR(uart);
  195. uart->port.icount.rx++;
  196. #ifdef CONFIG_KGDB_UART
  197. if (uart->port.line == CONFIG_KGDB_UART_PORT) {
  198. if (uart->port.cons->index == CONFIG_KGDB_UART_PORT && ch == 0x1) { /* Ctrl + A */
  199. kgdb_breakkey_pressed(regs);
  200. return;
  201. } else if (kgdb_entry_state == 0 && ch == '$') {/* connection from KGDB */
  202. kgdb_entry_state = 1;
  203. } else if (kgdb_entry_state == 1 && ch == 'q') {
  204. kgdb_entry_state = 0;
  205. kgdb_breakkey_pressed(regs);
  206. return;
  207. } else if (ch == 0x3) {/* Ctrl + C */
  208. kgdb_entry_state = 0;
  209. kgdb_breakkey_pressed(regs);
  210. return;
  211. } else {
  212. kgdb_entry_state = 0;
  213. }
  214. }
  215. #endif
  216. if (ANOMALY_05000230) {
  217. /* The BF533 family of processors have a nice misbehavior where
  218. * they continuously generate characters for a "single" break.
  219. * We have to basically ignore this flood until the "next" valid
  220. * character comes across. All other Blackfin families operate
  221. * properly though.
  222. * Note: While Anomaly 05000230 does not directly address this,
  223. * the changes that went in for it also fixed this issue.
  224. */
  225. if (in_break) {
  226. if (ch != 0) {
  227. in_break = 0;
  228. ch = UART_GET_CHAR(uart);
  229. if (bfin_revid() < 5)
  230. return;
  231. } else
  232. return;
  233. }
  234. }
  235. if (status & BI) {
  236. if (ANOMALY_05000230)
  237. in_break = 1;
  238. uart->port.icount.brk++;
  239. if (uart_handle_break(&uart->port))
  240. goto ignore_char;
  241. status &= ~(PE | FE);
  242. }
  243. if (status & PE)
  244. uart->port.icount.parity++;
  245. if (status & OE)
  246. uart->port.icount.overrun++;
  247. if (status & FE)
  248. uart->port.icount.frame++;
  249. status &= uart->port.read_status_mask;
  250. if (status & BI)
  251. flg = TTY_BREAK;
  252. else if (status & PE)
  253. flg = TTY_PARITY;
  254. else if (status & FE)
  255. flg = TTY_FRAME;
  256. else
  257. flg = TTY_NORMAL;
  258. if (uart_handle_sysrq_char(&uart->port, ch))
  259. goto ignore_char;
  260. uart_insert_char(&uart->port, status, OE, ch, flg);
  261. ignore_char:
  262. tty_flip_buffer_push(tty);
  263. }
  264. static void bfin_serial_tx_chars(struct bfin_serial_port *uart)
  265. {
  266. struct circ_buf *xmit = &uart->port.info->xmit;
  267. if (uart->port.x_char) {
  268. UART_PUT_CHAR(uart, uart->port.x_char);
  269. uart->port.icount.tx++;
  270. uart->port.x_char = 0;
  271. }
  272. /*
  273. * Check the modem control lines before
  274. * transmitting anything.
  275. */
  276. bfin_serial_mctrl_check(uart);
  277. if (uart_circ_empty(xmit) || uart_tx_stopped(&uart->port)) {
  278. bfin_serial_stop_tx(&uart->port);
  279. return;
  280. }
  281. while ((UART_GET_LSR(uart) & THRE) && xmit->tail != xmit->head) {
  282. UART_PUT_CHAR(uart, xmit->buf[xmit->tail]);
  283. xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
  284. uart->port.icount.tx++;
  285. SSYNC();
  286. }
  287. if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
  288. uart_write_wakeup(&uart->port);
  289. if (uart_circ_empty(xmit))
  290. bfin_serial_stop_tx(&uart->port);
  291. }
  292. static irqreturn_t bfin_serial_rx_int(int irq, void *dev_id)
  293. {
  294. struct bfin_serial_port *uart = dev_id;
  295. spin_lock(&uart->port.lock);
  296. while ((UART_GET_IER(uart) & ERBFI) && (UART_GET_LSR(uart) & DR))
  297. bfin_serial_rx_chars(uart);
  298. spin_unlock(&uart->port.lock);
  299. return IRQ_HANDLED;
  300. }
  301. static irqreturn_t bfin_serial_tx_int(int irq, void *dev_id)
  302. {
  303. struct bfin_serial_port *uart = dev_id;
  304. spin_lock(&uart->port.lock);
  305. if ((UART_GET_IER(uart) & ETBEI) && (UART_GET_LSR(uart) & THRE))
  306. bfin_serial_tx_chars(uart);
  307. spin_unlock(&uart->port.lock);
  308. return IRQ_HANDLED;
  309. }
  310. static void bfin_serial_do_work(struct work_struct *work)
  311. {
  312. struct bfin_serial_port *uart = container_of(work, struct bfin_serial_port, cts_workqueue);
  313. bfin_serial_mctrl_check(uart);
  314. }
  315. #endif
  316. #ifdef CONFIG_SERIAL_BFIN_DMA
  317. static void bfin_serial_dma_tx_chars(struct bfin_serial_port *uart)
  318. {
  319. struct circ_buf *xmit = &uart->port.info->xmit;
  320. unsigned short ier;
  321. int flags = 0;
  322. if (!uart->tx_done)
  323. return;
  324. uart->tx_done = 0;
  325. if (uart_circ_empty(xmit) || uart_tx_stopped(&uart->port)) {
  326. bfin_serial_stop_tx(&uart->port);
  327. uart->tx_done = 1;
  328. return;
  329. }
  330. if (uart->port.x_char) {
  331. UART_PUT_CHAR(uart, uart->port.x_char);
  332. uart->port.icount.tx++;
  333. uart->port.x_char = 0;
  334. }
  335. /*
  336. * Check the modem control lines before
  337. * transmitting anything.
  338. */
  339. bfin_serial_mctrl_check(uart);
  340. spin_lock_irqsave(&uart->port.lock, flags);
  341. uart->tx_count = CIRC_CNT(xmit->head, xmit->tail, UART_XMIT_SIZE);
  342. if (uart->tx_count > (UART_XMIT_SIZE - xmit->tail))
  343. uart->tx_count = UART_XMIT_SIZE - xmit->tail;
  344. blackfin_dcache_flush_range((unsigned long)(xmit->buf+xmit->tail),
  345. (unsigned long)(xmit->buf+xmit->tail+uart->tx_count));
  346. set_dma_config(uart->tx_dma_channel,
  347. set_bfin_dma_config(DIR_READ, DMA_FLOW_STOP,
  348. INTR_ON_BUF,
  349. DIMENSION_LINEAR,
  350. DATA_SIZE_8,
  351. DMA_SYNC_RESTART));
  352. set_dma_start_addr(uart->tx_dma_channel, (unsigned long)(xmit->buf+xmit->tail));
  353. set_dma_x_count(uart->tx_dma_channel, uart->tx_count);
  354. set_dma_x_modify(uart->tx_dma_channel, 1);
  355. enable_dma(uart->tx_dma_channel);
  356. xmit->tail = (xmit->tail + uart->tx_count) & (UART_XMIT_SIZE - 1);
  357. uart->port.icount.tx += uart->tx_count;
  358. #ifdef CONFIG_BF54x
  359. UART_SET_IER(uart, ETBEI);
  360. #else
  361. ier = UART_GET_IER(uart);
  362. ier |= ETBEI;
  363. UART_PUT_IER(uart, ier);
  364. #endif
  365. spin_unlock_irqrestore(&uart->port.lock, flags);
  366. }
  367. static void bfin_serial_dma_rx_chars(struct bfin_serial_port *uart)
  368. {
  369. struct tty_struct *tty = uart->port.info->tty;
  370. int i, flg, status;
  371. status = UART_GET_LSR(uart);
  372. uart->port.icount.rx += CIRC_CNT(uart->rx_dma_buf.head, uart->rx_dma_buf.tail, UART_XMIT_SIZE);;
  373. if (status & BI) {
  374. uart->port.icount.brk++;
  375. if (uart_handle_break(&uart->port))
  376. goto dma_ignore_char;
  377. status &= ~(PE | FE);
  378. }
  379. if (status & PE)
  380. uart->port.icount.parity++;
  381. if (status & OE)
  382. uart->port.icount.overrun++;
  383. if (status & FE)
  384. uart->port.icount.frame++;
  385. status &= uart->port.read_status_mask;
  386. if (status & BI)
  387. flg = TTY_BREAK;
  388. else if (status & PE)
  389. flg = TTY_PARITY;
  390. else if (status & FE)
  391. flg = TTY_FRAME;
  392. else
  393. flg = TTY_NORMAL;
  394. for (i = uart->rx_dma_buf.head; i < uart->rx_dma_buf.tail; i++) {
  395. if (uart_handle_sysrq_char(&uart->port, uart->rx_dma_buf.buf[i]))
  396. goto dma_ignore_char;
  397. uart_insert_char(&uart->port, status, OE, uart->rx_dma_buf.buf[i], flg);
  398. }
  399. dma_ignore_char:
  400. tty_flip_buffer_push(tty);
  401. }
  402. void bfin_serial_rx_dma_timeout(struct bfin_serial_port *uart)
  403. {
  404. int x_pos, pos;
  405. int flags = 0;
  406. spin_lock_irqsave(&uart->port.lock, flags);
  407. x_pos = DMA_RX_XCOUNT - get_dma_curr_xcount(uart->rx_dma_channel);
  408. if (x_pos == DMA_RX_XCOUNT)
  409. x_pos = 0;
  410. pos = uart->rx_dma_nrows * DMA_RX_XCOUNT + x_pos;
  411. if (pos>uart->rx_dma_buf.tail) {
  412. uart->rx_dma_buf.tail = pos;
  413. bfin_serial_dma_rx_chars(uart);
  414. uart->rx_dma_buf.head = uart->rx_dma_buf.tail;
  415. }
  416. spin_unlock_irqrestore(&uart->port.lock, flags);
  417. uart->rx_dma_timer.expires = jiffies + DMA_RX_FLUSH_JIFFIES;
  418. add_timer(&(uart->rx_dma_timer));
  419. }
  420. static irqreturn_t bfin_serial_dma_tx_int(int irq, void *dev_id)
  421. {
  422. struct bfin_serial_port *uart = dev_id;
  423. struct circ_buf *xmit = &uart->port.info->xmit;
  424. unsigned short ier;
  425. spin_lock(&uart->port.lock);
  426. if (!(get_dma_curr_irqstat(uart->tx_dma_channel)&DMA_RUN)) {
  427. clear_dma_irqstat(uart->tx_dma_channel);
  428. disable_dma(uart->tx_dma_channel);
  429. #ifdef CONFIG_BF54x
  430. UART_CLEAR_IER(uart, ETBEI);
  431. #else
  432. ier = UART_GET_IER(uart);
  433. ier &= ~ETBEI;
  434. UART_PUT_IER(uart, ier);
  435. #endif
  436. if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
  437. uart_write_wakeup(&uart->port);
  438. uart->tx_done = 1;
  439. bfin_serial_dma_tx_chars(uart);
  440. }
  441. spin_unlock(&uart->port.lock);
  442. return IRQ_HANDLED;
  443. }
  444. static irqreturn_t bfin_serial_dma_rx_int(int irq, void *dev_id)
  445. {
  446. struct bfin_serial_port *uart = dev_id;
  447. unsigned short irqstat;
  448. uart->rx_dma_nrows++;
  449. if (uart->rx_dma_nrows == DMA_RX_YCOUNT) {
  450. uart->rx_dma_nrows = 0;
  451. uart->rx_dma_buf.tail = DMA_RX_XCOUNT*DMA_RX_YCOUNT;
  452. bfin_serial_dma_rx_chars(uart);
  453. uart->rx_dma_buf.head = uart->rx_dma_buf.tail = 0;
  454. }
  455. spin_lock(&uart->port.lock);
  456. irqstat = get_dma_curr_irqstat(uart->rx_dma_channel);
  457. clear_dma_irqstat(uart->rx_dma_channel);
  458. spin_unlock(&uart->port.lock);
  459. return IRQ_HANDLED;
  460. }
  461. #endif
  462. /*
  463. * Return TIOCSER_TEMT when transmitter is not busy.
  464. */
  465. static unsigned int bfin_serial_tx_empty(struct uart_port *port)
  466. {
  467. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  468. unsigned short lsr;
  469. lsr = UART_GET_LSR(uart);
  470. if (lsr & TEMT)
  471. return TIOCSER_TEMT;
  472. else
  473. return 0;
  474. }
  475. static unsigned int bfin_serial_get_mctrl(struct uart_port *port)
  476. {
  477. #ifdef CONFIG_SERIAL_BFIN_CTSRTS
  478. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  479. if (uart->cts_pin < 0)
  480. return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
  481. if (gpio_get_value(uart->cts_pin))
  482. return TIOCM_DSR | TIOCM_CAR;
  483. else
  484. #endif
  485. return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
  486. }
  487. static void bfin_serial_set_mctrl(struct uart_port *port, unsigned int mctrl)
  488. {
  489. #ifdef CONFIG_SERIAL_BFIN_CTSRTS
  490. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  491. if (uart->rts_pin < 0)
  492. return;
  493. if (mctrl & TIOCM_RTS)
  494. gpio_set_value(uart->rts_pin, 0);
  495. else
  496. gpio_set_value(uart->rts_pin, 1);
  497. #endif
  498. }
  499. /*
  500. * Handle any change of modem status signal since we were last called.
  501. */
  502. static void bfin_serial_mctrl_check(struct bfin_serial_port *uart)
  503. {
  504. #ifdef CONFIG_SERIAL_BFIN_CTSRTS
  505. unsigned int status;
  506. # ifdef CONFIG_SERIAL_BFIN_DMA
  507. struct uart_info *info = uart->port.info;
  508. struct tty_struct *tty = info->tty;
  509. status = bfin_serial_get_mctrl(&uart->port);
  510. if (!(status & TIOCM_CTS)) {
  511. tty->hw_stopped = 1;
  512. } else {
  513. tty->hw_stopped = 0;
  514. }
  515. # else
  516. status = bfin_serial_get_mctrl(&uart->port);
  517. uart_handle_cts_change(&uart->port, status & TIOCM_CTS);
  518. if (!(status & TIOCM_CTS))
  519. schedule_work(&uart->cts_workqueue);
  520. # endif
  521. #endif
  522. }
  523. /*
  524. * Interrupts are always disabled.
  525. */
  526. static void bfin_serial_break_ctl(struct uart_port *port, int break_state)
  527. {
  528. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  529. u16 lcr = UART_GET_LCR(uart);
  530. if (break_state)
  531. lcr |= SB;
  532. else
  533. lcr &= ~SB;
  534. UART_PUT_LCR(uart, lcr);
  535. SSYNC();
  536. }
  537. static int bfin_serial_startup(struct uart_port *port)
  538. {
  539. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  540. #ifdef CONFIG_SERIAL_BFIN_DMA
  541. dma_addr_t dma_handle;
  542. if (request_dma(uart->rx_dma_channel, "BFIN_UART_RX") < 0) {
  543. printk(KERN_NOTICE "Unable to attach Blackfin UART RX DMA channel\n");
  544. return -EBUSY;
  545. }
  546. if (request_dma(uart->tx_dma_channel, "BFIN_UART_TX") < 0) {
  547. printk(KERN_NOTICE "Unable to attach Blackfin UART TX DMA channel\n");
  548. free_dma(uart->rx_dma_channel);
  549. return -EBUSY;
  550. }
  551. set_dma_callback(uart->rx_dma_channel, bfin_serial_dma_rx_int, uart);
  552. set_dma_callback(uart->tx_dma_channel, bfin_serial_dma_tx_int, uart);
  553. uart->rx_dma_buf.buf = (unsigned char *)dma_alloc_coherent(NULL, PAGE_SIZE, &dma_handle, GFP_DMA);
  554. uart->rx_dma_buf.head = 0;
  555. uart->rx_dma_buf.tail = 0;
  556. uart->rx_dma_nrows = 0;
  557. set_dma_config(uart->rx_dma_channel,
  558. set_bfin_dma_config(DIR_WRITE, DMA_FLOW_AUTO,
  559. INTR_ON_ROW, DIMENSION_2D,
  560. DATA_SIZE_8,
  561. DMA_SYNC_RESTART));
  562. set_dma_x_count(uart->rx_dma_channel, DMA_RX_XCOUNT);
  563. set_dma_x_modify(uart->rx_dma_channel, 1);
  564. set_dma_y_count(uart->rx_dma_channel, DMA_RX_YCOUNT);
  565. set_dma_y_modify(uart->rx_dma_channel, 1);
  566. set_dma_start_addr(uart->rx_dma_channel, (unsigned long)uart->rx_dma_buf.buf);
  567. enable_dma(uart->rx_dma_channel);
  568. uart->rx_dma_timer.data = (unsigned long)(uart);
  569. uart->rx_dma_timer.function = (void *)bfin_serial_rx_dma_timeout;
  570. uart->rx_dma_timer.expires = jiffies + DMA_RX_FLUSH_JIFFIES;
  571. add_timer(&(uart->rx_dma_timer));
  572. #else
  573. if (request_irq(uart->port.irq, bfin_serial_rx_int, IRQF_DISABLED,
  574. "BFIN_UART_RX", uart)) {
  575. # ifdef CONFIG_KGDB_UART
  576. if (uart->port.line != CONFIG_KGDB_UART_PORT) {
  577. # endif
  578. printk(KERN_NOTICE "Unable to attach BlackFin UART RX interrupt\n");
  579. return -EBUSY;
  580. # ifdef CONFIG_KGDB_UART
  581. }
  582. # endif
  583. }
  584. if (request_irq
  585. (uart->port.irq+1, bfin_serial_tx_int, IRQF_DISABLED,
  586. "BFIN_UART_TX", uart)) {
  587. printk(KERN_NOTICE "Unable to attach BlackFin UART TX interrupt\n");
  588. free_irq(uart->port.irq, uart);
  589. return -EBUSY;
  590. }
  591. #endif
  592. #ifdef CONFIG_BF54x
  593. UART_SET_IER(uart, ERBFI);
  594. #else
  595. UART_PUT_IER(uart, UART_GET_IER(uart) | ERBFI);
  596. #endif
  597. return 0;
  598. }
  599. static void bfin_serial_shutdown(struct uart_port *port)
  600. {
  601. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  602. #ifdef CONFIG_SERIAL_BFIN_DMA
  603. disable_dma(uart->tx_dma_channel);
  604. free_dma(uart->tx_dma_channel);
  605. disable_dma(uart->rx_dma_channel);
  606. free_dma(uart->rx_dma_channel);
  607. del_timer(&(uart->rx_dma_timer));
  608. dma_free_coherent(NULL, PAGE_SIZE, uart->rx_dma_buf.buf, 0);
  609. #else
  610. #ifdef CONFIG_KGDB_UART
  611. if (uart->port.line != CONFIG_KGDB_UART_PORT)
  612. #endif
  613. free_irq(uart->port.irq, uart);
  614. free_irq(uart->port.irq+1, uart);
  615. #endif
  616. }
  617. static void
  618. bfin_serial_set_termios(struct uart_port *port, struct ktermios *termios,
  619. struct ktermios *old)
  620. {
  621. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  622. unsigned long flags;
  623. unsigned int baud, quot;
  624. unsigned short val, ier, lsr, lcr = 0;
  625. switch (termios->c_cflag & CSIZE) {
  626. case CS8:
  627. lcr = WLS(8);
  628. break;
  629. case CS7:
  630. lcr = WLS(7);
  631. break;
  632. case CS6:
  633. lcr = WLS(6);
  634. break;
  635. case CS5:
  636. lcr = WLS(5);
  637. break;
  638. default:
  639. printk(KERN_ERR "%s: word lengh not supported\n",
  640. __FUNCTION__);
  641. }
  642. if (termios->c_cflag & CSTOPB)
  643. lcr |= STB;
  644. if (termios->c_cflag & PARENB)
  645. lcr |= PEN;
  646. if (!(termios->c_cflag & PARODD))
  647. lcr |= EPS;
  648. if (termios->c_cflag & CMSPAR)
  649. lcr |= STP;
  650. port->read_status_mask = OE;
  651. if (termios->c_iflag & INPCK)
  652. port->read_status_mask |= (FE | PE);
  653. if (termios->c_iflag & (BRKINT | PARMRK))
  654. port->read_status_mask |= BI;
  655. /*
  656. * Characters to ignore
  657. */
  658. port->ignore_status_mask = 0;
  659. if (termios->c_iflag & IGNPAR)
  660. port->ignore_status_mask |= FE | PE;
  661. if (termios->c_iflag & IGNBRK) {
  662. port->ignore_status_mask |= BI;
  663. /*
  664. * If we're ignoring parity and break indicators,
  665. * ignore overruns too (for real raw support).
  666. */
  667. if (termios->c_iflag & IGNPAR)
  668. port->ignore_status_mask |= OE;
  669. }
  670. baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
  671. quot = uart_get_divisor(port, baud);
  672. spin_lock_irqsave(&uart->port.lock, flags);
  673. do {
  674. lsr = UART_GET_LSR(uart);
  675. } while (!(lsr & TEMT));
  676. /* Disable UART */
  677. ier = UART_GET_IER(uart);
  678. #ifdef CONFIG_BF54x
  679. UART_CLEAR_IER(uart, 0xF);
  680. #else
  681. UART_PUT_IER(uart, 0);
  682. #endif
  683. #ifndef CONFIG_BF54x
  684. /* Set DLAB in LCR to Access DLL and DLH */
  685. val = UART_GET_LCR(uart);
  686. val |= DLAB;
  687. UART_PUT_LCR(uart, val);
  688. SSYNC();
  689. #endif
  690. UART_PUT_DLL(uart, quot & 0xFF);
  691. SSYNC();
  692. UART_PUT_DLH(uart, (quot >> 8) & 0xFF);
  693. SSYNC();
  694. #ifndef CONFIG_BF54x
  695. /* Clear DLAB in LCR to Access THR RBR IER */
  696. val = UART_GET_LCR(uart);
  697. val &= ~DLAB;
  698. UART_PUT_LCR(uart, val);
  699. SSYNC();
  700. #endif
  701. UART_PUT_LCR(uart, lcr);
  702. /* Enable UART */
  703. #ifdef CONFIG_BF54x
  704. UART_SET_IER(uart, ier);
  705. #else
  706. UART_PUT_IER(uart, ier);
  707. #endif
  708. val = UART_GET_GCTL(uart);
  709. val |= UCEN;
  710. UART_PUT_GCTL(uart, val);
  711. spin_unlock_irqrestore(&uart->port.lock, flags);
  712. }
  713. static const char *bfin_serial_type(struct uart_port *port)
  714. {
  715. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  716. return uart->port.type == PORT_BFIN ? "BFIN-UART" : NULL;
  717. }
  718. /*
  719. * Release the memory region(s) being used by 'port'.
  720. */
  721. static void bfin_serial_release_port(struct uart_port *port)
  722. {
  723. }
  724. /*
  725. * Request the memory region(s) being used by 'port'.
  726. */
  727. static int bfin_serial_request_port(struct uart_port *port)
  728. {
  729. return 0;
  730. }
  731. /*
  732. * Configure/autoconfigure the port.
  733. */
  734. static void bfin_serial_config_port(struct uart_port *port, int flags)
  735. {
  736. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  737. if (flags & UART_CONFIG_TYPE &&
  738. bfin_serial_request_port(&uart->port) == 0)
  739. uart->port.type = PORT_BFIN;
  740. }
  741. /*
  742. * Verify the new serial_struct (for TIOCSSERIAL).
  743. * The only change we allow are to the flags and type, and
  744. * even then only between PORT_BFIN and PORT_UNKNOWN
  745. */
  746. static int
  747. bfin_serial_verify_port(struct uart_port *port, struct serial_struct *ser)
  748. {
  749. return 0;
  750. }
  751. static struct uart_ops bfin_serial_pops = {
  752. .tx_empty = bfin_serial_tx_empty,
  753. .set_mctrl = bfin_serial_set_mctrl,
  754. .get_mctrl = bfin_serial_get_mctrl,
  755. .stop_tx = bfin_serial_stop_tx,
  756. .start_tx = bfin_serial_start_tx,
  757. .stop_rx = bfin_serial_stop_rx,
  758. .enable_ms = bfin_serial_enable_ms,
  759. .break_ctl = bfin_serial_break_ctl,
  760. .startup = bfin_serial_startup,
  761. .shutdown = bfin_serial_shutdown,
  762. .set_termios = bfin_serial_set_termios,
  763. .type = bfin_serial_type,
  764. .release_port = bfin_serial_release_port,
  765. .request_port = bfin_serial_request_port,
  766. .config_port = bfin_serial_config_port,
  767. .verify_port = bfin_serial_verify_port,
  768. };
  769. static void __init bfin_serial_init_ports(void)
  770. {
  771. static int first = 1;
  772. int i;
  773. if (!first)
  774. return;
  775. first = 0;
  776. for (i = 0; i < nr_ports; i++) {
  777. bfin_serial_ports[i].port.uartclk = get_sclk();
  778. bfin_serial_ports[i].port.ops = &bfin_serial_pops;
  779. bfin_serial_ports[i].port.line = i;
  780. bfin_serial_ports[i].port.iotype = UPIO_MEM;
  781. bfin_serial_ports[i].port.membase =
  782. (void __iomem *)bfin_serial_resource[i].uart_base_addr;
  783. bfin_serial_ports[i].port.mapbase =
  784. bfin_serial_resource[i].uart_base_addr;
  785. bfin_serial_ports[i].port.irq =
  786. bfin_serial_resource[i].uart_irq;
  787. bfin_serial_ports[i].port.flags = UPF_BOOT_AUTOCONF;
  788. #ifdef CONFIG_SERIAL_BFIN_DMA
  789. bfin_serial_ports[i].tx_done = 1;
  790. bfin_serial_ports[i].tx_count = 0;
  791. bfin_serial_ports[i].tx_dma_channel =
  792. bfin_serial_resource[i].uart_tx_dma_channel;
  793. bfin_serial_ports[i].rx_dma_channel =
  794. bfin_serial_resource[i].uart_rx_dma_channel;
  795. init_timer(&(bfin_serial_ports[i].rx_dma_timer));
  796. #else
  797. INIT_WORK(&bfin_serial_ports[i].cts_workqueue, bfin_serial_do_work);
  798. #endif
  799. #ifdef CONFIG_SERIAL_BFIN_CTSRTS
  800. bfin_serial_ports[i].cts_pin =
  801. bfin_serial_resource[i].uart_cts_pin;
  802. bfin_serial_ports[i].rts_pin =
  803. bfin_serial_resource[i].uart_rts_pin;
  804. #endif
  805. bfin_serial_hw_init(&bfin_serial_ports[i]);
  806. }
  807. }
  808. #ifdef CONFIG_SERIAL_BFIN_CONSOLE
  809. /*
  810. * If the port was already initialised (eg, by a boot loader),
  811. * try to determine the current setup.
  812. */
  813. static void __init
  814. bfin_serial_console_get_options(struct bfin_serial_port *uart, int *baud,
  815. int *parity, int *bits)
  816. {
  817. unsigned short status;
  818. status = UART_GET_IER(uart) & (ERBFI | ETBEI);
  819. if (status == (ERBFI | ETBEI)) {
  820. /* ok, the port was enabled */
  821. unsigned short lcr, val;
  822. unsigned short dlh, dll;
  823. lcr = UART_GET_LCR(uart);
  824. *parity = 'n';
  825. if (lcr & PEN) {
  826. if (lcr & EPS)
  827. *parity = 'e';
  828. else
  829. *parity = 'o';
  830. }
  831. switch (lcr & 0x03) {
  832. case 0: *bits = 5; break;
  833. case 1: *bits = 6; break;
  834. case 2: *bits = 7; break;
  835. case 3: *bits = 8; break;
  836. }
  837. #ifndef CONFIG_BF54x
  838. /* Set DLAB in LCR to Access DLL and DLH */
  839. val = UART_GET_LCR(uart);
  840. val |= DLAB;
  841. UART_PUT_LCR(uart, val);
  842. #endif
  843. dll = UART_GET_DLL(uart);
  844. dlh = UART_GET_DLH(uart);
  845. #ifndef CONFIG_BF54x
  846. /* Clear DLAB in LCR to Access THR RBR IER */
  847. val = UART_GET_LCR(uart);
  848. val &= ~DLAB;
  849. UART_PUT_LCR(uart, val);
  850. #endif
  851. *baud = get_sclk() / (16*(dll | dlh << 8));
  852. }
  853. pr_debug("%s:baud = %d, parity = %c, bits= %d\n", __FUNCTION__, *baud, *parity, *bits);
  854. }
  855. #endif
  856. #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
  857. static struct uart_driver bfin_serial_reg;
  858. static int __init
  859. bfin_serial_console_setup(struct console *co, char *options)
  860. {
  861. struct bfin_serial_port *uart;
  862. # ifdef CONFIG_SERIAL_BFIN_CONSOLE
  863. int baud = 57600;
  864. int bits = 8;
  865. int parity = 'n';
  866. # ifdef CONFIG_SERIAL_BFIN_CTSRTS
  867. int flow = 'r';
  868. # else
  869. int flow = 'n';
  870. # endif
  871. # endif
  872. /*
  873. * Check whether an invalid uart number has been specified, and
  874. * if so, search for the first available port that does have
  875. * console support.
  876. */
  877. if (co->index == -1 || co->index >= nr_ports)
  878. co->index = 0;
  879. uart = &bfin_serial_ports[co->index];
  880. # ifdef CONFIG_SERIAL_BFIN_CONSOLE
  881. if (options)
  882. uart_parse_options(options, &baud, &parity, &bits, &flow);
  883. else
  884. bfin_serial_console_get_options(uart, &baud, &parity, &bits);
  885. return uart_set_options(&uart->port, co, baud, parity, bits, flow);
  886. # else
  887. return 0;
  888. # endif
  889. }
  890. #endif /* defined (CONFIG_SERIAL_BFIN_CONSOLE) ||
  891. defined (CONFIG_EARLY_PRINTK) */
  892. #ifdef CONFIG_SERIAL_BFIN_CONSOLE
  893. static void bfin_serial_console_putchar(struct uart_port *port, int ch)
  894. {
  895. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  896. while (!(UART_GET_LSR(uart) & THRE))
  897. barrier();
  898. UART_PUT_CHAR(uart, ch);
  899. SSYNC();
  900. }
  901. /*
  902. * Interrupts are disabled on entering
  903. */
  904. static void
  905. bfin_serial_console_write(struct console *co, const char *s, unsigned int count)
  906. {
  907. struct bfin_serial_port *uart = &bfin_serial_ports[co->index];
  908. int flags = 0;
  909. spin_lock_irqsave(&uart->port.lock, flags);
  910. uart_console_write(&uart->port, s, count, bfin_serial_console_putchar);
  911. spin_unlock_irqrestore(&uart->port.lock, flags);
  912. }
  913. static struct console bfin_serial_console = {
  914. .name = BFIN_SERIAL_NAME,
  915. .write = bfin_serial_console_write,
  916. .device = uart_console_device,
  917. .setup = bfin_serial_console_setup,
  918. .flags = CON_PRINTBUFFER,
  919. .index = -1,
  920. .data = &bfin_serial_reg,
  921. };
  922. static int __init bfin_serial_rs_console_init(void)
  923. {
  924. bfin_serial_init_ports();
  925. register_console(&bfin_serial_console);
  926. #ifdef CONFIG_KGDB_UART
  927. kgdb_entry_state = 0;
  928. init_kgdb_uart();
  929. #endif
  930. return 0;
  931. }
  932. console_initcall(bfin_serial_rs_console_init);
  933. #define BFIN_SERIAL_CONSOLE &bfin_serial_console
  934. #else
  935. #define BFIN_SERIAL_CONSOLE NULL
  936. #endif /* CONFIG_SERIAL_BFIN_CONSOLE */
  937. #ifdef CONFIG_EARLY_PRINTK
  938. static __init void early_serial_putc(struct uart_port *port, int ch)
  939. {
  940. unsigned timeout = 0xffff;
  941. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  942. while ((!(UART_GET_LSR(uart) & THRE)) && --timeout)
  943. cpu_relax();
  944. UART_PUT_CHAR(uart, ch);
  945. }
  946. static __init void early_serial_write(struct console *con, const char *s,
  947. unsigned int n)
  948. {
  949. struct bfin_serial_port *uart = &bfin_serial_ports[con->index];
  950. unsigned int i;
  951. for (i = 0; i < n; i++, s++) {
  952. if (*s == '\n')
  953. early_serial_putc(&uart->port, '\r');
  954. early_serial_putc(&uart->port, *s);
  955. }
  956. }
  957. static struct __init console bfin_early_serial_console = {
  958. .name = "early_BFuart",
  959. .write = early_serial_write,
  960. .device = uart_console_device,
  961. .flags = CON_PRINTBUFFER,
  962. .setup = bfin_serial_console_setup,
  963. .index = -1,
  964. .data = &bfin_serial_reg,
  965. };
  966. struct console __init *bfin_earlyserial_init(unsigned int port,
  967. unsigned int cflag)
  968. {
  969. struct bfin_serial_port *uart;
  970. struct ktermios t;
  971. if (port == -1 || port >= nr_ports)
  972. port = 0;
  973. bfin_serial_init_ports();
  974. bfin_early_serial_console.index = port;
  975. uart = &bfin_serial_ports[port];
  976. t.c_cflag = cflag;
  977. t.c_iflag = 0;
  978. t.c_oflag = 0;
  979. t.c_lflag = ICANON;
  980. t.c_line = port;
  981. bfin_serial_set_termios(&uart->port, &t, &t);
  982. return &bfin_early_serial_console;
  983. }
  984. #endif /* CONFIG_SERIAL_BFIN_CONSOLE */
  985. static struct uart_driver bfin_serial_reg = {
  986. .owner = THIS_MODULE,
  987. .driver_name = "bfin-uart",
  988. .dev_name = BFIN_SERIAL_NAME,
  989. .major = BFIN_SERIAL_MAJOR,
  990. .minor = BFIN_SERIAL_MINOR,
  991. .nr = NR_PORTS,
  992. .cons = BFIN_SERIAL_CONSOLE,
  993. };
  994. static int bfin_serial_suspend(struct platform_device *dev, pm_message_t state)
  995. {
  996. struct bfin_serial_port *uart = platform_get_drvdata(dev);
  997. if (uart)
  998. uart_suspend_port(&bfin_serial_reg, &uart->port);
  999. return 0;
  1000. }
  1001. static int bfin_serial_resume(struct platform_device *dev)
  1002. {
  1003. struct bfin_serial_port *uart = platform_get_drvdata(dev);
  1004. if (uart)
  1005. uart_resume_port(&bfin_serial_reg, &uart->port);
  1006. return 0;
  1007. }
  1008. static int bfin_serial_probe(struct platform_device *dev)
  1009. {
  1010. struct resource *res = dev->resource;
  1011. int i;
  1012. for (i = 0; i < dev->num_resources; i++, res++)
  1013. if (res->flags & IORESOURCE_MEM)
  1014. break;
  1015. if (i < dev->num_resources) {
  1016. for (i = 0; i < nr_ports; i++, res++) {
  1017. if (bfin_serial_ports[i].port.mapbase != res->start)
  1018. continue;
  1019. bfin_serial_ports[i].port.dev = &dev->dev;
  1020. uart_add_one_port(&bfin_serial_reg, &bfin_serial_ports[i].port);
  1021. platform_set_drvdata(dev, &bfin_serial_ports[i]);
  1022. }
  1023. }
  1024. return 0;
  1025. }
  1026. static int bfin_serial_remove(struct platform_device *pdev)
  1027. {
  1028. struct bfin_serial_port *uart = platform_get_drvdata(pdev);
  1029. #ifdef CONFIG_SERIAL_BFIN_CTSRTS
  1030. gpio_free(uart->cts_pin);
  1031. gpio_free(uart->rts_pin);
  1032. #endif
  1033. platform_set_drvdata(pdev, NULL);
  1034. if (uart)
  1035. uart_remove_one_port(&bfin_serial_reg, &uart->port);
  1036. return 0;
  1037. }
  1038. static struct platform_driver bfin_serial_driver = {
  1039. .probe = bfin_serial_probe,
  1040. .remove = bfin_serial_remove,
  1041. .suspend = bfin_serial_suspend,
  1042. .resume = bfin_serial_resume,
  1043. .driver = {
  1044. .name = "bfin-uart",
  1045. },
  1046. };
  1047. static int __init bfin_serial_init(void)
  1048. {
  1049. int ret;
  1050. #ifdef CONFIG_KGDB_UART
  1051. struct bfin_serial_port *uart = &bfin_serial_ports[CONFIG_KGDB_UART_PORT];
  1052. struct ktermios t;
  1053. #endif
  1054. pr_info("Serial: Blackfin serial driver\n");
  1055. bfin_serial_init_ports();
  1056. ret = uart_register_driver(&bfin_serial_reg);
  1057. if (ret == 0) {
  1058. ret = platform_driver_register(&bfin_serial_driver);
  1059. if (ret) {
  1060. pr_debug("uart register failed\n");
  1061. uart_unregister_driver(&bfin_serial_reg);
  1062. }
  1063. }
  1064. #ifdef CONFIG_KGDB_UART
  1065. if (uart->port.cons->index != CONFIG_KGDB_UART_PORT) {
  1066. request_irq(uart->port.irq, bfin_serial_rx_int,
  1067. IRQF_DISABLED, "BFIN_UART_RX", uart);
  1068. pr_info("Request irq for kgdb uart port\n");
  1069. #ifdef CONFIG_BF54x
  1070. UART_SET_IER(uart, ERBFI);
  1071. #else
  1072. UART_PUT_IER(uart, UART_GET_IER(uart) | ERBFI);
  1073. #endif
  1074. SSYNC();
  1075. t.c_cflag = CS8|B57600;
  1076. t.c_iflag = 0;
  1077. t.c_oflag = 0;
  1078. t.c_lflag = ICANON;
  1079. t.c_line = CONFIG_KGDB_UART_PORT;
  1080. bfin_serial_set_termios(&uart->port, &t, &t);
  1081. }
  1082. #endif
  1083. return ret;
  1084. }
  1085. static void __exit bfin_serial_exit(void)
  1086. {
  1087. platform_driver_unregister(&bfin_serial_driver);
  1088. uart_unregister_driver(&bfin_serial_reg);
  1089. }
  1090. module_init(bfin_serial_init);
  1091. module_exit(bfin_serial_exit);
  1092. MODULE_AUTHOR("Aubrey.Li <aubrey.li@analog.com>");
  1093. MODULE_DESCRIPTION("Blackfin generic serial port driver");
  1094. MODULE_LICENSE("GPL");
  1095. MODULE_ALIAS_CHARDEV_MAJOR(BFIN_SERIAL_MAJOR);