pci-sysfs.c 14 KB

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  1. /*
  2. * drivers/pci/pci-sysfs.c
  3. *
  4. * (C) Copyright 2002-2004 Greg Kroah-Hartman <greg@kroah.com>
  5. * (C) Copyright 2002-2004 IBM Corp.
  6. * (C) Copyright 2003 Matthew Wilcox
  7. * (C) Copyright 2003 Hewlett-Packard
  8. * (C) Copyright 2004 Jon Smirl <jonsmirl@yahoo.com>
  9. * (C) Copyright 2004 Silicon Graphics, Inc. Jesse Barnes <jbarnes@sgi.com>
  10. *
  11. * File attributes for PCI devices
  12. *
  13. * Modeled after usb's driverfs.c
  14. *
  15. */
  16. #include <linux/config.h>
  17. #include <linux/kernel.h>
  18. #include <linux/pci.h>
  19. #include <linux/stat.h>
  20. #include <linux/topology.h>
  21. #include <linux/mm.h>
  22. #include "pci.h"
  23. static int sysfs_initialized; /* = 0 */
  24. /* show configuration fields */
  25. #define pci_config_attr(field, format_string) \
  26. static ssize_t \
  27. field##_show(struct device *dev, struct device_attribute *attr, char *buf) \
  28. { \
  29. struct pci_dev *pdev; \
  30. \
  31. pdev = to_pci_dev (dev); \
  32. return sprintf (buf, format_string, pdev->field); \
  33. }
  34. pci_config_attr(vendor, "0x%04x\n");
  35. pci_config_attr(device, "0x%04x\n");
  36. pci_config_attr(subsystem_vendor, "0x%04x\n");
  37. pci_config_attr(subsystem_device, "0x%04x\n");
  38. pci_config_attr(class, "0x%06x\n");
  39. pci_config_attr(irq, "%u\n");
  40. pci_config_attr(is_enabled, "%u\n");
  41. static ssize_t local_cpus_show(struct device *dev,
  42. struct device_attribute *attr, char *buf)
  43. {
  44. cpumask_t mask;
  45. int len;
  46. mask = pcibus_to_cpumask(to_pci_dev(dev)->bus);
  47. len = cpumask_scnprintf(buf, PAGE_SIZE-2, mask);
  48. strcat(buf,"\n");
  49. return 1+len;
  50. }
  51. /* show resources */
  52. static ssize_t
  53. resource_show(struct device * dev, struct device_attribute *attr, char * buf)
  54. {
  55. struct pci_dev * pci_dev = to_pci_dev(dev);
  56. char * str = buf;
  57. int i;
  58. int max = 7;
  59. u64 start, end;
  60. if (pci_dev->subordinate)
  61. max = DEVICE_COUNT_RESOURCE;
  62. for (i = 0; i < max; i++) {
  63. struct resource *res = &pci_dev->resource[i];
  64. pci_resource_to_user(pci_dev, i, res, &start, &end);
  65. str += sprintf(str,"0x%016llx 0x%016llx 0x%016llx\n",
  66. (unsigned long long)start,
  67. (unsigned long long)end,
  68. (unsigned long long)res->flags);
  69. }
  70. return (str - buf);
  71. }
  72. static ssize_t modalias_show(struct device *dev, struct device_attribute *attr, char *buf)
  73. {
  74. struct pci_dev *pci_dev = to_pci_dev(dev);
  75. return sprintf(buf, "pci:v%08Xd%08Xsv%08Xsd%08Xbc%02Xsc%02Xi%02x\n",
  76. pci_dev->vendor, pci_dev->device,
  77. pci_dev->subsystem_vendor, pci_dev->subsystem_device,
  78. (u8)(pci_dev->class >> 16), (u8)(pci_dev->class >> 8),
  79. (u8)(pci_dev->class));
  80. }
  81. static ssize_t
  82. is_enabled_store(struct device *dev, struct device_attribute *attr,
  83. const char *buf, size_t count)
  84. {
  85. struct pci_dev *pdev = to_pci_dev(dev);
  86. /* this can crash the machine when done on the "wrong" device */
  87. if (!capable(CAP_SYS_ADMIN))
  88. return count;
  89. if (*buf == '0')
  90. pci_disable_device(pdev);
  91. if (*buf == '1')
  92. pci_enable_device(pdev);
  93. return count;
  94. }
  95. struct device_attribute pci_dev_attrs[] = {
  96. __ATTR_RO(resource),
  97. __ATTR_RO(vendor),
  98. __ATTR_RO(device),
  99. __ATTR_RO(subsystem_vendor),
  100. __ATTR_RO(subsystem_device),
  101. __ATTR_RO(class),
  102. __ATTR_RO(irq),
  103. __ATTR_RO(local_cpus),
  104. __ATTR_RO(modalias),
  105. __ATTR(enable, 0600, is_enabled_show, is_enabled_store),
  106. __ATTR_NULL,
  107. };
  108. static ssize_t
  109. pci_read_config(struct kobject *kobj, char *buf, loff_t off, size_t count)
  110. {
  111. struct pci_dev *dev = to_pci_dev(container_of(kobj,struct device,kobj));
  112. unsigned int size = 64;
  113. loff_t init_off = off;
  114. u8 *data = (u8*) buf;
  115. /* Several chips lock up trying to read undefined config space */
  116. if (capable(CAP_SYS_ADMIN)) {
  117. size = dev->cfg_size;
  118. } else if (dev->hdr_type == PCI_HEADER_TYPE_CARDBUS) {
  119. size = 128;
  120. }
  121. if (off > size)
  122. return 0;
  123. if (off + count > size) {
  124. size -= off;
  125. count = size;
  126. } else {
  127. size = count;
  128. }
  129. if ((off & 1) && size) {
  130. u8 val;
  131. pci_user_read_config_byte(dev, off, &val);
  132. data[off - init_off] = val;
  133. off++;
  134. size--;
  135. }
  136. if ((off & 3) && size > 2) {
  137. u16 val;
  138. pci_user_read_config_word(dev, off, &val);
  139. data[off - init_off] = val & 0xff;
  140. data[off - init_off + 1] = (val >> 8) & 0xff;
  141. off += 2;
  142. size -= 2;
  143. }
  144. while (size > 3) {
  145. u32 val;
  146. pci_user_read_config_dword(dev, off, &val);
  147. data[off - init_off] = val & 0xff;
  148. data[off - init_off + 1] = (val >> 8) & 0xff;
  149. data[off - init_off + 2] = (val >> 16) & 0xff;
  150. data[off - init_off + 3] = (val >> 24) & 0xff;
  151. off += 4;
  152. size -= 4;
  153. }
  154. if (size >= 2) {
  155. u16 val;
  156. pci_user_read_config_word(dev, off, &val);
  157. data[off - init_off] = val & 0xff;
  158. data[off - init_off + 1] = (val >> 8) & 0xff;
  159. off += 2;
  160. size -= 2;
  161. }
  162. if (size > 0) {
  163. u8 val;
  164. pci_user_read_config_byte(dev, off, &val);
  165. data[off - init_off] = val;
  166. off++;
  167. --size;
  168. }
  169. return count;
  170. }
  171. static ssize_t
  172. pci_write_config(struct kobject *kobj, char *buf, loff_t off, size_t count)
  173. {
  174. struct pci_dev *dev = to_pci_dev(container_of(kobj,struct device,kobj));
  175. unsigned int size = count;
  176. loff_t init_off = off;
  177. u8 *data = (u8*) buf;
  178. if (off > dev->cfg_size)
  179. return 0;
  180. if (off + count > dev->cfg_size) {
  181. size = dev->cfg_size - off;
  182. count = size;
  183. }
  184. if ((off & 1) && size) {
  185. pci_user_write_config_byte(dev, off, data[off - init_off]);
  186. off++;
  187. size--;
  188. }
  189. if ((off & 3) && size > 2) {
  190. u16 val = data[off - init_off];
  191. val |= (u16) data[off - init_off + 1] << 8;
  192. pci_user_write_config_word(dev, off, val);
  193. off += 2;
  194. size -= 2;
  195. }
  196. while (size > 3) {
  197. u32 val = data[off - init_off];
  198. val |= (u32) data[off - init_off + 1] << 8;
  199. val |= (u32) data[off - init_off + 2] << 16;
  200. val |= (u32) data[off - init_off + 3] << 24;
  201. pci_user_write_config_dword(dev, off, val);
  202. off += 4;
  203. size -= 4;
  204. }
  205. if (size >= 2) {
  206. u16 val = data[off - init_off];
  207. val |= (u16) data[off - init_off + 1] << 8;
  208. pci_user_write_config_word(dev, off, val);
  209. off += 2;
  210. size -= 2;
  211. }
  212. if (size) {
  213. pci_user_write_config_byte(dev, off, data[off - init_off]);
  214. off++;
  215. --size;
  216. }
  217. return count;
  218. }
  219. #ifdef HAVE_PCI_LEGACY
  220. /**
  221. * pci_read_legacy_io - read byte(s) from legacy I/O port space
  222. * @kobj: kobject corresponding to file to read from
  223. * @buf: buffer to store results
  224. * @off: offset into legacy I/O port space
  225. * @count: number of bytes to read
  226. *
  227. * Reads 1, 2, or 4 bytes from legacy I/O port space using an arch specific
  228. * callback routine (pci_legacy_read).
  229. */
  230. ssize_t
  231. pci_read_legacy_io(struct kobject *kobj, char *buf, loff_t off, size_t count)
  232. {
  233. struct pci_bus *bus = to_pci_bus(container_of(kobj,
  234. struct class_device,
  235. kobj));
  236. /* Only support 1, 2 or 4 byte accesses */
  237. if (count != 1 && count != 2 && count != 4)
  238. return -EINVAL;
  239. return pci_legacy_read(bus, off, (u32 *)buf, count);
  240. }
  241. /**
  242. * pci_write_legacy_io - write byte(s) to legacy I/O port space
  243. * @kobj: kobject corresponding to file to read from
  244. * @buf: buffer containing value to be written
  245. * @off: offset into legacy I/O port space
  246. * @count: number of bytes to write
  247. *
  248. * Writes 1, 2, or 4 bytes from legacy I/O port space using an arch specific
  249. * callback routine (pci_legacy_write).
  250. */
  251. ssize_t
  252. pci_write_legacy_io(struct kobject *kobj, char *buf, loff_t off, size_t count)
  253. {
  254. struct pci_bus *bus = to_pci_bus(container_of(kobj,
  255. struct class_device,
  256. kobj));
  257. /* Only support 1, 2 or 4 byte accesses */
  258. if (count != 1 && count != 2 && count != 4)
  259. return -EINVAL;
  260. return pci_legacy_write(bus, off, *(u32 *)buf, count);
  261. }
  262. /**
  263. * pci_mmap_legacy_mem - map legacy PCI memory into user memory space
  264. * @kobj: kobject corresponding to device to be mapped
  265. * @attr: struct bin_attribute for this file
  266. * @vma: struct vm_area_struct passed to mmap
  267. *
  268. * Uses an arch specific callback, pci_mmap_legacy_page_range, to mmap
  269. * legacy memory space (first meg of bus space) into application virtual
  270. * memory space.
  271. */
  272. int
  273. pci_mmap_legacy_mem(struct kobject *kobj, struct bin_attribute *attr,
  274. struct vm_area_struct *vma)
  275. {
  276. struct pci_bus *bus = to_pci_bus(container_of(kobj,
  277. struct class_device,
  278. kobj));
  279. return pci_mmap_legacy_page_range(bus, vma);
  280. }
  281. #endif /* HAVE_PCI_LEGACY */
  282. #ifdef HAVE_PCI_MMAP
  283. /**
  284. * pci_mmap_resource - map a PCI resource into user memory space
  285. * @kobj: kobject for mapping
  286. * @attr: struct bin_attribute for the file being mapped
  287. * @vma: struct vm_area_struct passed into the mmap
  288. *
  289. * Use the regular PCI mapping routines to map a PCI resource into userspace.
  290. * FIXME: write combining? maybe automatic for prefetchable regions?
  291. */
  292. static int
  293. pci_mmap_resource(struct kobject *kobj, struct bin_attribute *attr,
  294. struct vm_area_struct *vma)
  295. {
  296. struct pci_dev *pdev = to_pci_dev(container_of(kobj,
  297. struct device, kobj));
  298. struct resource *res = (struct resource *)attr->private;
  299. enum pci_mmap_state mmap_type;
  300. u64 start, end;
  301. int i;
  302. for (i = 0; i < PCI_ROM_RESOURCE; i++)
  303. if (res == &pdev->resource[i])
  304. break;
  305. if (i >= PCI_ROM_RESOURCE)
  306. return -ENODEV;
  307. /* pci_mmap_page_range() expects the same kind of entry as coming
  308. * from /proc/bus/pci/ which is a "user visible" value. If this is
  309. * different from the resource itself, arch will do necessary fixup.
  310. */
  311. pci_resource_to_user(pdev, i, res, &start, &end);
  312. vma->vm_pgoff += start >> PAGE_SHIFT;
  313. mmap_type = res->flags & IORESOURCE_MEM ? pci_mmap_mem : pci_mmap_io;
  314. return pci_mmap_page_range(pdev, vma, mmap_type, 0);
  315. }
  316. /**
  317. * pci_create_resource_files - create resource files in sysfs for @dev
  318. * @dev: dev in question
  319. *
  320. * Walk the resources in @dev creating files for each resource available.
  321. */
  322. static void
  323. pci_create_resource_files(struct pci_dev *pdev)
  324. {
  325. int i;
  326. /* Expose the PCI resources from this device as files */
  327. for (i = 0; i < PCI_ROM_RESOURCE; i++) {
  328. struct bin_attribute *res_attr;
  329. /* skip empty resources */
  330. if (!pci_resource_len(pdev, i))
  331. continue;
  332. /* allocate attribute structure, piggyback attribute name */
  333. res_attr = kzalloc(sizeof(*res_attr) + 10, GFP_ATOMIC);
  334. if (res_attr) {
  335. char *res_attr_name = (char *)(res_attr + 1);
  336. pdev->res_attr[i] = res_attr;
  337. sprintf(res_attr_name, "resource%d", i);
  338. res_attr->attr.name = res_attr_name;
  339. res_attr->attr.mode = S_IRUSR | S_IWUSR;
  340. res_attr->attr.owner = THIS_MODULE;
  341. res_attr->size = pci_resource_len(pdev, i);
  342. res_attr->mmap = pci_mmap_resource;
  343. res_attr->private = &pdev->resource[i];
  344. sysfs_create_bin_file(&pdev->dev.kobj, res_attr);
  345. }
  346. }
  347. }
  348. /**
  349. * pci_remove_resource_files - cleanup resource files
  350. * @dev: dev to cleanup
  351. *
  352. * If we created resource files for @dev, remove them from sysfs and
  353. * free their resources.
  354. */
  355. static void
  356. pci_remove_resource_files(struct pci_dev *pdev)
  357. {
  358. int i;
  359. for (i = 0; i < PCI_ROM_RESOURCE; i++) {
  360. struct bin_attribute *res_attr;
  361. res_attr = pdev->res_attr[i];
  362. if (res_attr) {
  363. sysfs_remove_bin_file(&pdev->dev.kobj, res_attr);
  364. kfree(res_attr);
  365. }
  366. }
  367. }
  368. #else /* !HAVE_PCI_MMAP */
  369. static inline void pci_create_resource_files(struct pci_dev *dev) { return; }
  370. static inline void pci_remove_resource_files(struct pci_dev *dev) { return; }
  371. #endif /* HAVE_PCI_MMAP */
  372. /**
  373. * pci_write_rom - used to enable access to the PCI ROM display
  374. * @kobj: kernel object handle
  375. * @buf: user input
  376. * @off: file offset
  377. * @count: number of byte in input
  378. *
  379. * writing anything except 0 enables it
  380. */
  381. static ssize_t
  382. pci_write_rom(struct kobject *kobj, char *buf, loff_t off, size_t count)
  383. {
  384. struct pci_dev *pdev = to_pci_dev(container_of(kobj, struct device, kobj));
  385. if ((off == 0) && (*buf == '0') && (count == 2))
  386. pdev->rom_attr_enabled = 0;
  387. else
  388. pdev->rom_attr_enabled = 1;
  389. return count;
  390. }
  391. /**
  392. * pci_read_rom - read a PCI ROM
  393. * @kobj: kernel object handle
  394. * @buf: where to put the data we read from the ROM
  395. * @off: file offset
  396. * @count: number of bytes to read
  397. *
  398. * Put @count bytes starting at @off into @buf from the ROM in the PCI
  399. * device corresponding to @kobj.
  400. */
  401. static ssize_t
  402. pci_read_rom(struct kobject *kobj, char *buf, loff_t off, size_t count)
  403. {
  404. struct pci_dev *pdev = to_pci_dev(container_of(kobj, struct device, kobj));
  405. void __iomem *rom;
  406. size_t size;
  407. if (!pdev->rom_attr_enabled)
  408. return -EINVAL;
  409. rom = pci_map_rom(pdev, &size); /* size starts out as PCI window size */
  410. if (!rom)
  411. return 0;
  412. if (off >= size)
  413. count = 0;
  414. else {
  415. if (off + count > size)
  416. count = size - off;
  417. memcpy_fromio(buf, rom + off, count);
  418. }
  419. pci_unmap_rom(pdev, rom);
  420. return count;
  421. }
  422. static struct bin_attribute pci_config_attr = {
  423. .attr = {
  424. .name = "config",
  425. .mode = S_IRUGO | S_IWUSR,
  426. .owner = THIS_MODULE,
  427. },
  428. .size = 256,
  429. .read = pci_read_config,
  430. .write = pci_write_config,
  431. };
  432. static struct bin_attribute pcie_config_attr = {
  433. .attr = {
  434. .name = "config",
  435. .mode = S_IRUGO | S_IWUSR,
  436. .owner = THIS_MODULE,
  437. },
  438. .size = 4096,
  439. .read = pci_read_config,
  440. .write = pci_write_config,
  441. };
  442. int pci_create_sysfs_dev_files (struct pci_dev *pdev)
  443. {
  444. if (!sysfs_initialized)
  445. return -EACCES;
  446. if (pdev->cfg_size < 4096)
  447. sysfs_create_bin_file(&pdev->dev.kobj, &pci_config_attr);
  448. else
  449. sysfs_create_bin_file(&pdev->dev.kobj, &pcie_config_attr);
  450. pci_create_resource_files(pdev);
  451. /* If the device has a ROM, try to expose it in sysfs. */
  452. if (pci_resource_len(pdev, PCI_ROM_RESOURCE)) {
  453. struct bin_attribute *rom_attr;
  454. rom_attr = kzalloc(sizeof(*rom_attr), GFP_ATOMIC);
  455. if (rom_attr) {
  456. pdev->rom_attr = rom_attr;
  457. rom_attr->size = pci_resource_len(pdev, PCI_ROM_RESOURCE);
  458. rom_attr->attr.name = "rom";
  459. rom_attr->attr.mode = S_IRUSR;
  460. rom_attr->attr.owner = THIS_MODULE;
  461. rom_attr->read = pci_read_rom;
  462. rom_attr->write = pci_write_rom;
  463. sysfs_create_bin_file(&pdev->dev.kobj, rom_attr);
  464. }
  465. }
  466. /* add platform-specific attributes */
  467. pcibios_add_platform_entries(pdev);
  468. return 0;
  469. }
  470. /**
  471. * pci_remove_sysfs_dev_files - cleanup PCI specific sysfs files
  472. * @pdev: device whose entries we should free
  473. *
  474. * Cleanup when @pdev is removed from sysfs.
  475. */
  476. void pci_remove_sysfs_dev_files(struct pci_dev *pdev)
  477. {
  478. if (pdev->cfg_size < 4096)
  479. sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr);
  480. else
  481. sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr);
  482. pci_remove_resource_files(pdev);
  483. if (pci_resource_len(pdev, PCI_ROM_RESOURCE)) {
  484. if (pdev->rom_attr) {
  485. sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr);
  486. kfree(pdev->rom_attr);
  487. }
  488. }
  489. }
  490. static int __init pci_sysfs_init(void)
  491. {
  492. struct pci_dev *pdev = NULL;
  493. sysfs_initialized = 1;
  494. for_each_pci_dev(pdev)
  495. pci_create_sysfs_dev_files(pdev);
  496. return 0;
  497. }
  498. __initcall(pci_sysfs_init);