xhci.c 72 KB

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  1. /*
  2. * xHCI host controller driver
  3. *
  4. * Copyright (C) 2008 Intel Corp.
  5. *
  6. * Author: Sarah Sharp
  7. * Some code borrowed from the Linux EHCI driver.
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License version 2 as
  11. * published by the Free Software Foundation.
  12. *
  13. * This program is distributed in the hope that it will be useful, but
  14. * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  15. * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
  16. * for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software Foundation,
  20. * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  21. */
  22. #include <linux/irq.h>
  23. #include <linux/log2.h>
  24. #include <linux/module.h>
  25. #include <linux/moduleparam.h>
  26. #include <linux/slab.h>
  27. #include "xhci.h"
  28. #define DRIVER_AUTHOR "Sarah Sharp"
  29. #define DRIVER_DESC "'eXtensible' Host Controller (xHC) Driver"
  30. /* Some 0.95 hardware can't handle the chain bit on a Link TRB being cleared */
  31. static int link_quirk;
  32. module_param(link_quirk, int, S_IRUGO | S_IWUSR);
  33. MODULE_PARM_DESC(link_quirk, "Don't clear the chain bit on a link TRB");
  34. /* TODO: copied from ehci-hcd.c - can this be refactored? */
  35. /*
  36. * handshake - spin reading hc until handshake completes or fails
  37. * @ptr: address of hc register to be read
  38. * @mask: bits to look at in result of read
  39. * @done: value of those bits when handshake succeeds
  40. * @usec: timeout in microseconds
  41. *
  42. * Returns negative errno, or zero on success
  43. *
  44. * Success happens when the "mask" bits have the specified value (hardware
  45. * handshake done). There are two failure modes: "usec" have passed (major
  46. * hardware flakeout), or the register reads as all-ones (hardware removed).
  47. */
  48. static int handshake(struct xhci_hcd *xhci, void __iomem *ptr,
  49. u32 mask, u32 done, int usec)
  50. {
  51. u32 result;
  52. do {
  53. result = xhci_readl(xhci, ptr);
  54. if (result == ~(u32)0) /* card removed */
  55. return -ENODEV;
  56. result &= mask;
  57. if (result == done)
  58. return 0;
  59. udelay(1);
  60. usec--;
  61. } while (usec > 0);
  62. return -ETIMEDOUT;
  63. }
  64. /*
  65. * Disable interrupts and begin the xHCI halting process.
  66. */
  67. void xhci_quiesce(struct xhci_hcd *xhci)
  68. {
  69. u32 halted;
  70. u32 cmd;
  71. u32 mask;
  72. mask = ~(XHCI_IRQS);
  73. halted = xhci_readl(xhci, &xhci->op_regs->status) & STS_HALT;
  74. if (!halted)
  75. mask &= ~CMD_RUN;
  76. cmd = xhci_readl(xhci, &xhci->op_regs->command);
  77. cmd &= mask;
  78. xhci_writel(xhci, cmd, &xhci->op_regs->command);
  79. }
  80. /*
  81. * Force HC into halt state.
  82. *
  83. * Disable any IRQs and clear the run/stop bit.
  84. * HC will complete any current and actively pipelined transactions, and
  85. * should halt within 16 microframes of the run/stop bit being cleared.
  86. * Read HC Halted bit in the status register to see when the HC is finished.
  87. * XXX: shouldn't we set HC_STATE_HALT here somewhere?
  88. */
  89. int xhci_halt(struct xhci_hcd *xhci)
  90. {
  91. xhci_dbg(xhci, "// Halt the HC\n");
  92. xhci_quiesce(xhci);
  93. return handshake(xhci, &xhci->op_regs->status,
  94. STS_HALT, STS_HALT, XHCI_MAX_HALT_USEC);
  95. }
  96. /*
  97. * Reset a halted HC, and set the internal HC state to HC_STATE_HALT.
  98. *
  99. * This resets pipelines, timers, counters, state machines, etc.
  100. * Transactions will be terminated immediately, and operational registers
  101. * will be set to their defaults.
  102. */
  103. int xhci_reset(struct xhci_hcd *xhci)
  104. {
  105. u32 command;
  106. u32 state;
  107. state = xhci_readl(xhci, &xhci->op_regs->status);
  108. if ((state & STS_HALT) == 0) {
  109. xhci_warn(xhci, "Host controller not halted, aborting reset.\n");
  110. return 0;
  111. }
  112. xhci_dbg(xhci, "// Reset the HC\n");
  113. command = xhci_readl(xhci, &xhci->op_regs->command);
  114. command |= CMD_RESET;
  115. xhci_writel(xhci, command, &xhci->op_regs->command);
  116. /* XXX: Why does EHCI set this here? Shouldn't other code do this? */
  117. xhci_to_hcd(xhci)->state = HC_STATE_HALT;
  118. return handshake(xhci, &xhci->op_regs->command, CMD_RESET, 0, 250 * 1000);
  119. }
  120. #if 0
  121. /* Set up MSI-X table for entry 0 (may claim other entries later) */
  122. static int xhci_setup_msix(struct xhci_hcd *xhci)
  123. {
  124. int ret;
  125. struct pci_dev *pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller);
  126. xhci->msix_count = 0;
  127. /* XXX: did I do this right? ixgbe does kcalloc for more than one */
  128. xhci->msix_entries = kmalloc(sizeof(struct msix_entry), GFP_KERNEL);
  129. if (!xhci->msix_entries) {
  130. xhci_err(xhci, "Failed to allocate MSI-X entries\n");
  131. return -ENOMEM;
  132. }
  133. xhci->msix_entries[0].entry = 0;
  134. ret = pci_enable_msix(pdev, xhci->msix_entries, xhci->msix_count);
  135. if (ret) {
  136. xhci_err(xhci, "Failed to enable MSI-X\n");
  137. goto free_entries;
  138. }
  139. /*
  140. * Pass the xhci pointer value as the request_irq "cookie".
  141. * If more irqs are added, this will need to be unique for each one.
  142. */
  143. ret = request_irq(xhci->msix_entries[0].vector, &xhci_irq, 0,
  144. "xHCI", xhci_to_hcd(xhci));
  145. if (ret) {
  146. xhci_err(xhci, "Failed to allocate MSI-X interrupt\n");
  147. goto disable_msix;
  148. }
  149. xhci_dbg(xhci, "Finished setting up MSI-X\n");
  150. return 0;
  151. disable_msix:
  152. pci_disable_msix(pdev);
  153. free_entries:
  154. kfree(xhci->msix_entries);
  155. xhci->msix_entries = NULL;
  156. return ret;
  157. }
  158. /* XXX: code duplication; can xhci_setup_msix call this? */
  159. /* Free any IRQs and disable MSI-X */
  160. static void xhci_cleanup_msix(struct xhci_hcd *xhci)
  161. {
  162. struct pci_dev *pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller);
  163. if (!xhci->msix_entries)
  164. return;
  165. free_irq(xhci->msix_entries[0].vector, xhci);
  166. pci_disable_msix(pdev);
  167. kfree(xhci->msix_entries);
  168. xhci->msix_entries = NULL;
  169. xhci_dbg(xhci, "Finished cleaning up MSI-X\n");
  170. }
  171. #endif
  172. /*
  173. * Initialize memory for HCD and xHC (one-time init).
  174. *
  175. * Program the PAGESIZE register, initialize the device context array, create
  176. * device contexts (?), set up a command ring segment (or two?), create event
  177. * ring (one for now).
  178. */
  179. int xhci_init(struct usb_hcd *hcd)
  180. {
  181. struct xhci_hcd *xhci = hcd_to_xhci(hcd);
  182. int retval = 0;
  183. xhci_dbg(xhci, "xhci_init\n");
  184. spin_lock_init(&xhci->lock);
  185. if (link_quirk) {
  186. xhci_dbg(xhci, "QUIRK: Not clearing Link TRB chain bits.\n");
  187. xhci->quirks |= XHCI_LINK_TRB_QUIRK;
  188. } else {
  189. xhci_dbg(xhci, "xHCI doesn't need link TRB QUIRK\n");
  190. }
  191. retval = xhci_mem_init(xhci, GFP_KERNEL);
  192. xhci_dbg(xhci, "Finished xhci_init\n");
  193. return retval;
  194. }
  195. /*
  196. * Called in interrupt context when there might be work
  197. * queued on the event ring
  198. *
  199. * xhci->lock must be held by caller.
  200. */
  201. static void xhci_work(struct xhci_hcd *xhci)
  202. {
  203. u32 temp;
  204. u64 temp_64;
  205. /*
  206. * Clear the op reg interrupt status first,
  207. * so we can receive interrupts from other MSI-X interrupters.
  208. * Write 1 to clear the interrupt status.
  209. */
  210. temp = xhci_readl(xhci, &xhci->op_regs->status);
  211. temp |= STS_EINT;
  212. xhci_writel(xhci, temp, &xhci->op_regs->status);
  213. /* FIXME when MSI-X is supported and there are multiple vectors */
  214. /* Clear the MSI-X event interrupt status */
  215. /* Acknowledge the interrupt */
  216. temp = xhci_readl(xhci, &xhci->ir_set->irq_pending);
  217. temp |= 0x3;
  218. xhci_writel(xhci, temp, &xhci->ir_set->irq_pending);
  219. /* Flush posted writes */
  220. xhci_readl(xhci, &xhci->ir_set->irq_pending);
  221. if (xhci->xhc_state & XHCI_STATE_DYING)
  222. xhci_dbg(xhci, "xHCI dying, ignoring interrupt. "
  223. "Shouldn't IRQs be disabled?\n");
  224. else
  225. /* FIXME this should be a delayed service routine
  226. * that clears the EHB.
  227. */
  228. xhci_handle_event(xhci);
  229. /* Clear the event handler busy flag (RW1C); the event ring should be empty. */
  230. temp_64 = xhci_read_64(xhci, &xhci->ir_set->erst_dequeue);
  231. xhci_write_64(xhci, temp_64 | ERST_EHB, &xhci->ir_set->erst_dequeue);
  232. /* Flush posted writes -- FIXME is this necessary? */
  233. xhci_readl(xhci, &xhci->ir_set->irq_pending);
  234. }
  235. /*-------------------------------------------------------------------------*/
  236. /*
  237. * xHCI spec says we can get an interrupt, and if the HC has an error condition,
  238. * we might get bad data out of the event ring. Section 4.10.2.7 has a list of
  239. * indicators of an event TRB error, but we check the status *first* to be safe.
  240. */
  241. irqreturn_t xhci_irq(struct usb_hcd *hcd)
  242. {
  243. struct xhci_hcd *xhci = hcd_to_xhci(hcd);
  244. u32 temp, temp2;
  245. union xhci_trb *trb;
  246. spin_lock(&xhci->lock);
  247. trb = xhci->event_ring->dequeue;
  248. /* Check if the xHC generated the interrupt, or the irq is shared */
  249. temp = xhci_readl(xhci, &xhci->op_regs->status);
  250. temp2 = xhci_readl(xhci, &xhci->ir_set->irq_pending);
  251. if (temp == 0xffffffff && temp2 == 0xffffffff)
  252. goto hw_died;
  253. if (!(temp & STS_EINT) && !ER_IRQ_PENDING(temp2)) {
  254. spin_unlock(&xhci->lock);
  255. return IRQ_NONE;
  256. }
  257. xhci_dbg(xhci, "op reg status = %08x\n", temp);
  258. xhci_dbg(xhci, "ir set irq_pending = %08x\n", temp2);
  259. xhci_dbg(xhci, "Event ring dequeue ptr:\n");
  260. xhci_dbg(xhci, "@%llx %08x %08x %08x %08x\n",
  261. (unsigned long long)xhci_trb_virt_to_dma(xhci->event_ring->deq_seg, trb),
  262. lower_32_bits(trb->link.segment_ptr),
  263. upper_32_bits(trb->link.segment_ptr),
  264. (unsigned int) trb->link.intr_target,
  265. (unsigned int) trb->link.control);
  266. if (temp & STS_FATAL) {
  267. xhci_warn(xhci, "WARNING: Host System Error\n");
  268. xhci_halt(xhci);
  269. hw_died:
  270. xhci_to_hcd(xhci)->state = HC_STATE_HALT;
  271. spin_unlock(&xhci->lock);
  272. return -ESHUTDOWN;
  273. }
  274. xhci_work(xhci);
  275. spin_unlock(&xhci->lock);
  276. return IRQ_HANDLED;
  277. }
  278. #ifdef CONFIG_USB_XHCI_HCD_DEBUGGING
  279. void xhci_event_ring_work(unsigned long arg)
  280. {
  281. unsigned long flags;
  282. int temp;
  283. u64 temp_64;
  284. struct xhci_hcd *xhci = (struct xhci_hcd *) arg;
  285. int i, j;
  286. xhci_dbg(xhci, "Poll event ring: %lu\n", jiffies);
  287. spin_lock_irqsave(&xhci->lock, flags);
  288. temp = xhci_readl(xhci, &xhci->op_regs->status);
  289. xhci_dbg(xhci, "op reg status = 0x%x\n", temp);
  290. if (temp == 0xffffffff || (xhci->xhc_state & XHCI_STATE_DYING)) {
  291. xhci_dbg(xhci, "HW died, polling stopped.\n");
  292. spin_unlock_irqrestore(&xhci->lock, flags);
  293. return;
  294. }
  295. temp = xhci_readl(xhci, &xhci->ir_set->irq_pending);
  296. xhci_dbg(xhci, "ir_set 0 pending = 0x%x\n", temp);
  297. xhci_dbg(xhci, "No-op commands handled = %d\n", xhci->noops_handled);
  298. xhci_dbg(xhci, "HC error bitmask = 0x%x\n", xhci->error_bitmask);
  299. xhci->error_bitmask = 0;
  300. xhci_dbg(xhci, "Event ring:\n");
  301. xhci_debug_segment(xhci, xhci->event_ring->deq_seg);
  302. xhci_dbg_ring_ptrs(xhci, xhci->event_ring);
  303. temp_64 = xhci_read_64(xhci, &xhci->ir_set->erst_dequeue);
  304. temp_64 &= ~ERST_PTR_MASK;
  305. xhci_dbg(xhci, "ERST deq = 64'h%0lx\n", (long unsigned int) temp_64);
  306. xhci_dbg(xhci, "Command ring:\n");
  307. xhci_debug_segment(xhci, xhci->cmd_ring->deq_seg);
  308. xhci_dbg_ring_ptrs(xhci, xhci->cmd_ring);
  309. xhci_dbg_cmd_ptrs(xhci);
  310. for (i = 0; i < MAX_HC_SLOTS; ++i) {
  311. if (!xhci->devs[i])
  312. continue;
  313. for (j = 0; j < 31; ++j) {
  314. xhci_dbg_ep_rings(xhci, i, j, &xhci->devs[i]->eps[j]);
  315. }
  316. }
  317. if (xhci->noops_submitted != NUM_TEST_NOOPS)
  318. if (xhci_setup_one_noop(xhci))
  319. xhci_ring_cmd_db(xhci);
  320. spin_unlock_irqrestore(&xhci->lock, flags);
  321. if (!xhci->zombie)
  322. mod_timer(&xhci->event_ring_timer, jiffies + POLL_TIMEOUT * HZ);
  323. else
  324. xhci_dbg(xhci, "Quit polling the event ring.\n");
  325. }
  326. #endif
  327. /*
  328. * Start the HC after it was halted.
  329. *
  330. * This function is called by the USB core when the HC driver is added.
  331. * Its opposite is xhci_stop().
  332. *
  333. * xhci_init() must be called once before this function can be called.
  334. * Reset the HC, enable device slot contexts, program DCBAAP, and
  335. * set command ring pointer and event ring pointer.
  336. *
  337. * Setup MSI-X vectors and enable interrupts.
  338. */
  339. int xhci_run(struct usb_hcd *hcd)
  340. {
  341. u32 temp;
  342. u64 temp_64;
  343. struct xhci_hcd *xhci = hcd_to_xhci(hcd);
  344. void (*doorbell)(struct xhci_hcd *) = NULL;
  345. hcd->uses_new_polling = 1;
  346. hcd->poll_rh = 0;
  347. xhci_dbg(xhci, "xhci_run\n");
  348. #if 0 /* FIXME: MSI not setup yet */
  349. /* Do this at the very last minute */
  350. ret = xhci_setup_msix(xhci);
  351. if (!ret)
  352. return ret;
  353. return -ENOSYS;
  354. #endif
  355. #ifdef CONFIG_USB_XHCI_HCD_DEBUGGING
  356. init_timer(&xhci->event_ring_timer);
  357. xhci->event_ring_timer.data = (unsigned long) xhci;
  358. xhci->event_ring_timer.function = xhci_event_ring_work;
  359. /* Poll the event ring */
  360. xhci->event_ring_timer.expires = jiffies + POLL_TIMEOUT * HZ;
  361. xhci->zombie = 0;
  362. xhci_dbg(xhci, "Setting event ring polling timer\n");
  363. add_timer(&xhci->event_ring_timer);
  364. #endif
  365. xhci_dbg(xhci, "Command ring memory map follows:\n");
  366. xhci_debug_ring(xhci, xhci->cmd_ring);
  367. xhci_dbg_ring_ptrs(xhci, xhci->cmd_ring);
  368. xhci_dbg_cmd_ptrs(xhci);
  369. xhci_dbg(xhci, "ERST memory map follows:\n");
  370. xhci_dbg_erst(xhci, &xhci->erst);
  371. xhci_dbg(xhci, "Event ring:\n");
  372. xhci_debug_ring(xhci, xhci->event_ring);
  373. xhci_dbg_ring_ptrs(xhci, xhci->event_ring);
  374. temp_64 = xhci_read_64(xhci, &xhci->ir_set->erst_dequeue);
  375. temp_64 &= ~ERST_PTR_MASK;
  376. xhci_dbg(xhci, "ERST deq = 64'h%0lx\n", (long unsigned int) temp_64);
  377. xhci_dbg(xhci, "// Set the interrupt modulation register\n");
  378. temp = xhci_readl(xhci, &xhci->ir_set->irq_control);
  379. temp &= ~ER_IRQ_INTERVAL_MASK;
  380. temp |= (u32) 160;
  381. xhci_writel(xhci, temp, &xhci->ir_set->irq_control);
  382. /* Set the HCD state before we enable the irqs */
  383. hcd->state = HC_STATE_RUNNING;
  384. temp = xhci_readl(xhci, &xhci->op_regs->command);
  385. temp |= (CMD_EIE);
  386. xhci_dbg(xhci, "// Enable interrupts, cmd = 0x%x.\n",
  387. temp);
  388. xhci_writel(xhci, temp, &xhci->op_regs->command);
  389. temp = xhci_readl(xhci, &xhci->ir_set->irq_pending);
  390. xhci_dbg(xhci, "// Enabling event ring interrupter %p by writing 0x%x to irq_pending\n",
  391. xhci->ir_set, (unsigned int) ER_IRQ_ENABLE(temp));
  392. xhci_writel(xhci, ER_IRQ_ENABLE(temp),
  393. &xhci->ir_set->irq_pending);
  394. xhci_print_ir_set(xhci, xhci->ir_set, 0);
  395. if (NUM_TEST_NOOPS > 0)
  396. doorbell = xhci_setup_one_noop(xhci);
  397. temp = xhci_readl(xhci, &xhci->op_regs->command);
  398. temp |= (CMD_RUN);
  399. xhci_dbg(xhci, "// Turn on HC, cmd = 0x%x.\n",
  400. temp);
  401. xhci_writel(xhci, temp, &xhci->op_regs->command);
  402. /* Flush PCI posted writes */
  403. temp = xhci_readl(xhci, &xhci->op_regs->command);
  404. xhci_dbg(xhci, "// @%p = 0x%x\n", &xhci->op_regs->command, temp);
  405. if (doorbell)
  406. (*doorbell)(xhci);
  407. xhci_dbg(xhci, "Finished xhci_run\n");
  408. return 0;
  409. }
  410. /*
  411. * Stop xHCI driver.
  412. *
  413. * This function is called by the USB core when the HC driver is removed.
  414. * Its opposite is xhci_run().
  415. *
  416. * Disable device contexts, disable IRQs, and quiesce the HC.
  417. * Reset the HC, finish any completed transactions, and cleanup memory.
  418. */
  419. void xhci_stop(struct usb_hcd *hcd)
  420. {
  421. u32 temp;
  422. struct xhci_hcd *xhci = hcd_to_xhci(hcd);
  423. spin_lock_irq(&xhci->lock);
  424. xhci_halt(xhci);
  425. xhci_reset(xhci);
  426. spin_unlock_irq(&xhci->lock);
  427. #if 0 /* No MSI yet */
  428. xhci_cleanup_msix(xhci);
  429. #endif
  430. #ifdef CONFIG_USB_XHCI_HCD_DEBUGGING
  431. /* Tell the event ring poll function not to reschedule */
  432. xhci->zombie = 1;
  433. del_timer_sync(&xhci->event_ring_timer);
  434. #endif
  435. xhci_dbg(xhci, "// Disabling event ring interrupts\n");
  436. temp = xhci_readl(xhci, &xhci->op_regs->status);
  437. xhci_writel(xhci, temp & ~STS_EINT, &xhci->op_regs->status);
  438. temp = xhci_readl(xhci, &xhci->ir_set->irq_pending);
  439. xhci_writel(xhci, ER_IRQ_DISABLE(temp),
  440. &xhci->ir_set->irq_pending);
  441. xhci_print_ir_set(xhci, xhci->ir_set, 0);
  442. xhci_dbg(xhci, "cleaning up memory\n");
  443. xhci_mem_cleanup(xhci);
  444. xhci_dbg(xhci, "xhci_stop completed - status = %x\n",
  445. xhci_readl(xhci, &xhci->op_regs->status));
  446. }
  447. /*
  448. * Shutdown HC (not bus-specific)
  449. *
  450. * This is called when the machine is rebooting or halting. We assume that the
  451. * machine will be powered off, and the HC's internal state will be reset.
  452. * Don't bother to free memory.
  453. */
  454. void xhci_shutdown(struct usb_hcd *hcd)
  455. {
  456. struct xhci_hcd *xhci = hcd_to_xhci(hcd);
  457. spin_lock_irq(&xhci->lock);
  458. xhci_halt(xhci);
  459. spin_unlock_irq(&xhci->lock);
  460. #if 0
  461. xhci_cleanup_msix(xhci);
  462. #endif
  463. xhci_dbg(xhci, "xhci_shutdown completed - status = %x\n",
  464. xhci_readl(xhci, &xhci->op_regs->status));
  465. }
  466. /*-------------------------------------------------------------------------*/
  467. /**
  468. * xhci_get_endpoint_index - Used for passing endpoint bitmasks between the core and
  469. * HCDs. Find the index for an endpoint given its descriptor. Use the return
  470. * value to right shift 1 for the bitmask.
  471. *
  472. * Index = (epnum * 2) + direction - 1,
  473. * where direction = 0 for OUT, 1 for IN.
  474. * For control endpoints, the IN index is used (OUT index is unused), so
  475. * index = (epnum * 2) + direction - 1 = (epnum * 2) + 1 - 1 = (epnum * 2)
  476. */
  477. unsigned int xhci_get_endpoint_index(struct usb_endpoint_descriptor *desc)
  478. {
  479. unsigned int index;
  480. if (usb_endpoint_xfer_control(desc))
  481. index = (unsigned int) (usb_endpoint_num(desc)*2);
  482. else
  483. index = (unsigned int) (usb_endpoint_num(desc)*2) +
  484. (usb_endpoint_dir_in(desc) ? 1 : 0) - 1;
  485. return index;
  486. }
  487. /* Find the flag for this endpoint (for use in the control context). Use the
  488. * endpoint index to create a bitmask. The slot context is bit 0, endpoint 0 is
  489. * bit 1, etc.
  490. */
  491. unsigned int xhci_get_endpoint_flag(struct usb_endpoint_descriptor *desc)
  492. {
  493. return 1 << (xhci_get_endpoint_index(desc) + 1);
  494. }
  495. /* Find the flag for this endpoint (for use in the control context). Use the
  496. * endpoint index to create a bitmask. The slot context is bit 0, endpoint 0 is
  497. * bit 1, etc.
  498. */
  499. unsigned int xhci_get_endpoint_flag_from_index(unsigned int ep_index)
  500. {
  501. return 1 << (ep_index + 1);
  502. }
  503. /* Compute the last valid endpoint context index. Basically, this is the
  504. * endpoint index plus one. For slot contexts with more than valid endpoint,
  505. * we find the most significant bit set in the added contexts flags.
  506. * e.g. ep 1 IN (with epnum 0x81) => added_ctxs = 0b1000
  507. * fls(0b1000) = 4, but the endpoint context index is 3, so subtract one.
  508. */
  509. unsigned int xhci_last_valid_endpoint(u32 added_ctxs)
  510. {
  511. return fls(added_ctxs) - 1;
  512. }
  513. /* Returns 1 if the arguments are OK;
  514. * returns 0 this is a root hub; returns -EINVAL for NULL pointers.
  515. */
  516. int xhci_check_args(struct usb_hcd *hcd, struct usb_device *udev,
  517. struct usb_host_endpoint *ep, int check_ep, const char *func) {
  518. if (!hcd || (check_ep && !ep) || !udev) {
  519. printk(KERN_DEBUG "xHCI %s called with invalid args\n",
  520. func);
  521. return -EINVAL;
  522. }
  523. if (!udev->parent) {
  524. printk(KERN_DEBUG "xHCI %s called for root hub\n",
  525. func);
  526. return 0;
  527. }
  528. if (!udev->slot_id) {
  529. printk(KERN_DEBUG "xHCI %s called with unaddressed device\n",
  530. func);
  531. return -EINVAL;
  532. }
  533. return 1;
  534. }
  535. static int xhci_configure_endpoint(struct xhci_hcd *xhci,
  536. struct usb_device *udev, struct xhci_command *command,
  537. bool ctx_change, bool must_succeed);
  538. /*
  539. * Full speed devices may have a max packet size greater than 8 bytes, but the
  540. * USB core doesn't know that until it reads the first 8 bytes of the
  541. * descriptor. If the usb_device's max packet size changes after that point,
  542. * we need to issue an evaluate context command and wait on it.
  543. */
  544. static int xhci_check_maxpacket(struct xhci_hcd *xhci, unsigned int slot_id,
  545. unsigned int ep_index, struct urb *urb)
  546. {
  547. struct xhci_container_ctx *in_ctx;
  548. struct xhci_container_ctx *out_ctx;
  549. struct xhci_input_control_ctx *ctrl_ctx;
  550. struct xhci_ep_ctx *ep_ctx;
  551. int max_packet_size;
  552. int hw_max_packet_size;
  553. int ret = 0;
  554. out_ctx = xhci->devs[slot_id]->out_ctx;
  555. ep_ctx = xhci_get_ep_ctx(xhci, out_ctx, ep_index);
  556. hw_max_packet_size = MAX_PACKET_DECODED(ep_ctx->ep_info2);
  557. max_packet_size = urb->dev->ep0.desc.wMaxPacketSize;
  558. if (hw_max_packet_size != max_packet_size) {
  559. xhci_dbg(xhci, "Max Packet Size for ep 0 changed.\n");
  560. xhci_dbg(xhci, "Max packet size in usb_device = %d\n",
  561. max_packet_size);
  562. xhci_dbg(xhci, "Max packet size in xHCI HW = %d\n",
  563. hw_max_packet_size);
  564. xhci_dbg(xhci, "Issuing evaluate context command.\n");
  565. /* Set up the modified control endpoint 0 */
  566. xhci_endpoint_copy(xhci, xhci->devs[slot_id]->in_ctx,
  567. xhci->devs[slot_id]->out_ctx, ep_index);
  568. in_ctx = xhci->devs[slot_id]->in_ctx;
  569. ep_ctx = xhci_get_ep_ctx(xhci, in_ctx, ep_index);
  570. ep_ctx->ep_info2 &= ~MAX_PACKET_MASK;
  571. ep_ctx->ep_info2 |= MAX_PACKET(max_packet_size);
  572. /* Set up the input context flags for the command */
  573. /* FIXME: This won't work if a non-default control endpoint
  574. * changes max packet sizes.
  575. */
  576. ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
  577. ctrl_ctx->add_flags = EP0_FLAG;
  578. ctrl_ctx->drop_flags = 0;
  579. xhci_dbg(xhci, "Slot %d input context\n", slot_id);
  580. xhci_dbg_ctx(xhci, in_ctx, ep_index);
  581. xhci_dbg(xhci, "Slot %d output context\n", slot_id);
  582. xhci_dbg_ctx(xhci, out_ctx, ep_index);
  583. ret = xhci_configure_endpoint(xhci, urb->dev, NULL,
  584. true, false);
  585. /* Clean up the input context for later use by bandwidth
  586. * functions.
  587. */
  588. ctrl_ctx->add_flags = SLOT_FLAG;
  589. }
  590. return ret;
  591. }
  592. /*
  593. * non-error returns are a promise to giveback() the urb later
  594. * we drop ownership so next owner (or urb unlink) can get it
  595. */
  596. int xhci_urb_enqueue(struct usb_hcd *hcd, struct urb *urb, gfp_t mem_flags)
  597. {
  598. struct xhci_hcd *xhci = hcd_to_xhci(hcd);
  599. unsigned long flags;
  600. int ret = 0;
  601. unsigned int slot_id, ep_index;
  602. if (!urb || xhci_check_args(hcd, urb->dev, urb->ep, true, __func__) <= 0)
  603. return -EINVAL;
  604. slot_id = urb->dev->slot_id;
  605. ep_index = xhci_get_endpoint_index(&urb->ep->desc);
  606. if (!xhci->devs || !xhci->devs[slot_id]) {
  607. if (!in_interrupt())
  608. dev_warn(&urb->dev->dev, "WARN: urb submitted for dev with no Slot ID\n");
  609. ret = -EINVAL;
  610. goto exit;
  611. }
  612. if (!test_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags)) {
  613. if (!in_interrupt())
  614. xhci_dbg(xhci, "urb submitted during PCI suspend\n");
  615. ret = -ESHUTDOWN;
  616. goto exit;
  617. }
  618. if (usb_endpoint_xfer_control(&urb->ep->desc)) {
  619. /* Check to see if the max packet size for the default control
  620. * endpoint changed during FS device enumeration
  621. */
  622. if (urb->dev->speed == USB_SPEED_FULL) {
  623. ret = xhci_check_maxpacket(xhci, slot_id,
  624. ep_index, urb);
  625. if (ret < 0)
  626. return ret;
  627. }
  628. /* We have a spinlock and interrupts disabled, so we must pass
  629. * atomic context to this function, which may allocate memory.
  630. */
  631. spin_lock_irqsave(&xhci->lock, flags);
  632. if (xhci->xhc_state & XHCI_STATE_DYING)
  633. goto dying;
  634. ret = xhci_queue_ctrl_tx(xhci, GFP_ATOMIC, urb,
  635. slot_id, ep_index);
  636. spin_unlock_irqrestore(&xhci->lock, flags);
  637. } else if (usb_endpoint_xfer_bulk(&urb->ep->desc)) {
  638. spin_lock_irqsave(&xhci->lock, flags);
  639. if (xhci->xhc_state & XHCI_STATE_DYING)
  640. goto dying;
  641. if (xhci->devs[slot_id]->eps[ep_index].ep_state &
  642. EP_GETTING_STREAMS) {
  643. xhci_warn(xhci, "WARN: Can't enqueue URB while bulk ep "
  644. "is transitioning to using streams.\n");
  645. ret = -EINVAL;
  646. } else if (xhci->devs[slot_id]->eps[ep_index].ep_state &
  647. EP_GETTING_NO_STREAMS) {
  648. xhci_warn(xhci, "WARN: Can't enqueue URB while bulk ep "
  649. "is transitioning to "
  650. "not having streams.\n");
  651. ret = -EINVAL;
  652. } else {
  653. ret = xhci_queue_bulk_tx(xhci, GFP_ATOMIC, urb,
  654. slot_id, ep_index);
  655. }
  656. spin_unlock_irqrestore(&xhci->lock, flags);
  657. } else if (usb_endpoint_xfer_int(&urb->ep->desc)) {
  658. spin_lock_irqsave(&xhci->lock, flags);
  659. if (xhci->xhc_state & XHCI_STATE_DYING)
  660. goto dying;
  661. ret = xhci_queue_intr_tx(xhci, GFP_ATOMIC, urb,
  662. slot_id, ep_index);
  663. spin_unlock_irqrestore(&xhci->lock, flags);
  664. } else {
  665. ret = -EINVAL;
  666. }
  667. exit:
  668. return ret;
  669. dying:
  670. xhci_dbg(xhci, "Ep 0x%x: URB %p submitted for "
  671. "non-responsive xHCI host.\n",
  672. urb->ep->desc.bEndpointAddress, urb);
  673. spin_unlock_irqrestore(&xhci->lock, flags);
  674. return -ESHUTDOWN;
  675. }
  676. /*
  677. * Remove the URB's TD from the endpoint ring. This may cause the HC to stop
  678. * USB transfers, potentially stopping in the middle of a TRB buffer. The HC
  679. * should pick up where it left off in the TD, unless a Set Transfer Ring
  680. * Dequeue Pointer is issued.
  681. *
  682. * The TRBs that make up the buffers for the canceled URB will be "removed" from
  683. * the ring. Since the ring is a contiguous structure, they can't be physically
  684. * removed. Instead, there are two options:
  685. *
  686. * 1) If the HC is in the middle of processing the URB to be canceled, we
  687. * simply move the ring's dequeue pointer past those TRBs using the Set
  688. * Transfer Ring Dequeue Pointer command. This will be the common case,
  689. * when drivers timeout on the last submitted URB and attempt to cancel.
  690. *
  691. * 2) If the HC is in the middle of a different TD, we turn the TRBs into a
  692. * series of 1-TRB transfer no-op TDs. (No-ops shouldn't be chained.) The
  693. * HC will need to invalidate the any TRBs it has cached after the stop
  694. * endpoint command, as noted in the xHCI 0.95 errata.
  695. *
  696. * 3) The TD may have completed by the time the Stop Endpoint Command
  697. * completes, so software needs to handle that case too.
  698. *
  699. * This function should protect against the TD enqueueing code ringing the
  700. * doorbell while this code is waiting for a Stop Endpoint command to complete.
  701. * It also needs to account for multiple cancellations on happening at the same
  702. * time for the same endpoint.
  703. *
  704. * Note that this function can be called in any context, or so says
  705. * usb_hcd_unlink_urb()
  706. */
  707. int xhci_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status)
  708. {
  709. unsigned long flags;
  710. int ret;
  711. u32 temp;
  712. struct xhci_hcd *xhci;
  713. struct xhci_td *td;
  714. unsigned int ep_index;
  715. struct xhci_ring *ep_ring;
  716. struct xhci_virt_ep *ep;
  717. xhci = hcd_to_xhci(hcd);
  718. spin_lock_irqsave(&xhci->lock, flags);
  719. /* Make sure the URB hasn't completed or been unlinked already */
  720. ret = usb_hcd_check_unlink_urb(hcd, urb, status);
  721. if (ret || !urb->hcpriv)
  722. goto done;
  723. temp = xhci_readl(xhci, &xhci->op_regs->status);
  724. if (temp == 0xffffffff) {
  725. xhci_dbg(xhci, "HW died, freeing TD.\n");
  726. td = (struct xhci_td *) urb->hcpriv;
  727. usb_hcd_unlink_urb_from_ep(hcd, urb);
  728. spin_unlock_irqrestore(&xhci->lock, flags);
  729. usb_hcd_giveback_urb(xhci_to_hcd(xhci), urb, -ESHUTDOWN);
  730. kfree(td);
  731. return ret;
  732. }
  733. if (xhci->xhc_state & XHCI_STATE_DYING) {
  734. xhci_dbg(xhci, "Ep 0x%x: URB %p to be canceled on "
  735. "non-responsive xHCI host.\n",
  736. urb->ep->desc.bEndpointAddress, urb);
  737. /* Let the stop endpoint command watchdog timer (which set this
  738. * state) finish cleaning up the endpoint TD lists. We must
  739. * have caught it in the middle of dropping a lock and giving
  740. * back an URB.
  741. */
  742. goto done;
  743. }
  744. xhci_dbg(xhci, "Cancel URB %p\n", urb);
  745. xhci_dbg(xhci, "Event ring:\n");
  746. xhci_debug_ring(xhci, xhci->event_ring);
  747. ep_index = xhci_get_endpoint_index(&urb->ep->desc);
  748. ep = &xhci->devs[urb->dev->slot_id]->eps[ep_index];
  749. ep_ring = xhci_urb_to_transfer_ring(xhci, urb);
  750. if (!ep_ring) {
  751. ret = -EINVAL;
  752. goto done;
  753. }
  754. xhci_dbg(xhci, "Endpoint ring:\n");
  755. xhci_debug_ring(xhci, ep_ring);
  756. td = (struct xhci_td *) urb->hcpriv;
  757. list_add_tail(&td->cancelled_td_list, &ep->cancelled_td_list);
  758. /* Queue a stop endpoint command, but only if this is
  759. * the first cancellation to be handled.
  760. */
  761. if (!(ep->ep_state & EP_HALT_PENDING)) {
  762. ep->ep_state |= EP_HALT_PENDING;
  763. ep->stop_cmds_pending++;
  764. ep->stop_cmd_timer.expires = jiffies +
  765. XHCI_STOP_EP_CMD_TIMEOUT * HZ;
  766. add_timer(&ep->stop_cmd_timer);
  767. xhci_queue_stop_endpoint(xhci, urb->dev->slot_id, ep_index);
  768. xhci_ring_cmd_db(xhci);
  769. }
  770. done:
  771. spin_unlock_irqrestore(&xhci->lock, flags);
  772. return ret;
  773. }
  774. /* Drop an endpoint from a new bandwidth configuration for this device.
  775. * Only one call to this function is allowed per endpoint before
  776. * check_bandwidth() or reset_bandwidth() must be called.
  777. * A call to xhci_drop_endpoint() followed by a call to xhci_add_endpoint() will
  778. * add the endpoint to the schedule with possibly new parameters denoted by a
  779. * different endpoint descriptor in usb_host_endpoint.
  780. * A call to xhci_add_endpoint() followed by a call to xhci_drop_endpoint() is
  781. * not allowed.
  782. *
  783. * The USB core will not allow URBs to be queued to an endpoint that is being
  784. * disabled, so there's no need for mutual exclusion to protect
  785. * the xhci->devs[slot_id] structure.
  786. */
  787. int xhci_drop_endpoint(struct usb_hcd *hcd, struct usb_device *udev,
  788. struct usb_host_endpoint *ep)
  789. {
  790. struct xhci_hcd *xhci;
  791. struct xhci_container_ctx *in_ctx, *out_ctx;
  792. struct xhci_input_control_ctx *ctrl_ctx;
  793. struct xhci_slot_ctx *slot_ctx;
  794. unsigned int last_ctx;
  795. unsigned int ep_index;
  796. struct xhci_ep_ctx *ep_ctx;
  797. u32 drop_flag;
  798. u32 new_add_flags, new_drop_flags, new_slot_info;
  799. int ret;
  800. ret = xhci_check_args(hcd, udev, ep, 1, __func__);
  801. if (ret <= 0)
  802. return ret;
  803. xhci = hcd_to_xhci(hcd);
  804. xhci_dbg(xhci, "%s called for udev %p\n", __func__, udev);
  805. drop_flag = xhci_get_endpoint_flag(&ep->desc);
  806. if (drop_flag == SLOT_FLAG || drop_flag == EP0_FLAG) {
  807. xhci_dbg(xhci, "xHCI %s - can't drop slot or ep 0 %#x\n",
  808. __func__, drop_flag);
  809. return 0;
  810. }
  811. if (!xhci->devs || !xhci->devs[udev->slot_id]) {
  812. xhci_warn(xhci, "xHCI %s called with unaddressed device\n",
  813. __func__);
  814. return -EINVAL;
  815. }
  816. in_ctx = xhci->devs[udev->slot_id]->in_ctx;
  817. out_ctx = xhci->devs[udev->slot_id]->out_ctx;
  818. ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
  819. ep_index = xhci_get_endpoint_index(&ep->desc);
  820. ep_ctx = xhci_get_ep_ctx(xhci, out_ctx, ep_index);
  821. /* If the HC already knows the endpoint is disabled,
  822. * or the HCD has noted it is disabled, ignore this request
  823. */
  824. if ((ep_ctx->ep_info & EP_STATE_MASK) == EP_STATE_DISABLED ||
  825. ctrl_ctx->drop_flags & xhci_get_endpoint_flag(&ep->desc)) {
  826. xhci_warn(xhci, "xHCI %s called with disabled ep %p\n",
  827. __func__, ep);
  828. return 0;
  829. }
  830. ctrl_ctx->drop_flags |= drop_flag;
  831. new_drop_flags = ctrl_ctx->drop_flags;
  832. ctrl_ctx->add_flags &= ~drop_flag;
  833. new_add_flags = ctrl_ctx->add_flags;
  834. last_ctx = xhci_last_valid_endpoint(ctrl_ctx->add_flags);
  835. slot_ctx = xhci_get_slot_ctx(xhci, in_ctx);
  836. /* Update the last valid endpoint context, if we deleted the last one */
  837. if ((slot_ctx->dev_info & LAST_CTX_MASK) > LAST_CTX(last_ctx)) {
  838. slot_ctx->dev_info &= ~LAST_CTX_MASK;
  839. slot_ctx->dev_info |= LAST_CTX(last_ctx);
  840. }
  841. new_slot_info = slot_ctx->dev_info;
  842. xhci_endpoint_zero(xhci, xhci->devs[udev->slot_id], ep);
  843. xhci_dbg(xhci, "drop ep 0x%x, slot id %d, new drop flags = %#x, new add flags = %#x, new slot info = %#x\n",
  844. (unsigned int) ep->desc.bEndpointAddress,
  845. udev->slot_id,
  846. (unsigned int) new_drop_flags,
  847. (unsigned int) new_add_flags,
  848. (unsigned int) new_slot_info);
  849. return 0;
  850. }
  851. /* Add an endpoint to a new possible bandwidth configuration for this device.
  852. * Only one call to this function is allowed per endpoint before
  853. * check_bandwidth() or reset_bandwidth() must be called.
  854. * A call to xhci_drop_endpoint() followed by a call to xhci_add_endpoint() will
  855. * add the endpoint to the schedule with possibly new parameters denoted by a
  856. * different endpoint descriptor in usb_host_endpoint.
  857. * A call to xhci_add_endpoint() followed by a call to xhci_drop_endpoint() is
  858. * not allowed.
  859. *
  860. * The USB core will not allow URBs to be queued to an endpoint until the
  861. * configuration or alt setting is installed in the device, so there's no need
  862. * for mutual exclusion to protect the xhci->devs[slot_id] structure.
  863. */
  864. int xhci_add_endpoint(struct usb_hcd *hcd, struct usb_device *udev,
  865. struct usb_host_endpoint *ep)
  866. {
  867. struct xhci_hcd *xhci;
  868. struct xhci_container_ctx *in_ctx, *out_ctx;
  869. unsigned int ep_index;
  870. struct xhci_ep_ctx *ep_ctx;
  871. struct xhci_slot_ctx *slot_ctx;
  872. struct xhci_input_control_ctx *ctrl_ctx;
  873. u32 added_ctxs;
  874. unsigned int last_ctx;
  875. u32 new_add_flags, new_drop_flags, new_slot_info;
  876. int ret = 0;
  877. ret = xhci_check_args(hcd, udev, ep, 1, __func__);
  878. if (ret <= 0) {
  879. /* So we won't queue a reset ep command for a root hub */
  880. ep->hcpriv = NULL;
  881. return ret;
  882. }
  883. xhci = hcd_to_xhci(hcd);
  884. added_ctxs = xhci_get_endpoint_flag(&ep->desc);
  885. last_ctx = xhci_last_valid_endpoint(added_ctxs);
  886. if (added_ctxs == SLOT_FLAG || added_ctxs == EP0_FLAG) {
  887. /* FIXME when we have to issue an evaluate endpoint command to
  888. * deal with ep0 max packet size changing once we get the
  889. * descriptors
  890. */
  891. xhci_dbg(xhci, "xHCI %s - can't add slot or ep 0 %#x\n",
  892. __func__, added_ctxs);
  893. return 0;
  894. }
  895. if (!xhci->devs || !xhci->devs[udev->slot_id]) {
  896. xhci_warn(xhci, "xHCI %s called with unaddressed device\n",
  897. __func__);
  898. return -EINVAL;
  899. }
  900. in_ctx = xhci->devs[udev->slot_id]->in_ctx;
  901. out_ctx = xhci->devs[udev->slot_id]->out_ctx;
  902. ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
  903. ep_index = xhci_get_endpoint_index(&ep->desc);
  904. ep_ctx = xhci_get_ep_ctx(xhci, out_ctx, ep_index);
  905. /* If the HCD has already noted the endpoint is enabled,
  906. * ignore this request.
  907. */
  908. if (ctrl_ctx->add_flags & xhci_get_endpoint_flag(&ep->desc)) {
  909. xhci_warn(xhci, "xHCI %s called with enabled ep %p\n",
  910. __func__, ep);
  911. return 0;
  912. }
  913. /*
  914. * Configuration and alternate setting changes must be done in
  915. * process context, not interrupt context (or so documenation
  916. * for usb_set_interface() and usb_set_configuration() claim).
  917. */
  918. if (xhci_endpoint_init(xhci, xhci->devs[udev->slot_id],
  919. udev, ep, GFP_NOIO) < 0) {
  920. dev_dbg(&udev->dev, "%s - could not initialize ep %#x\n",
  921. __func__, ep->desc.bEndpointAddress);
  922. return -ENOMEM;
  923. }
  924. ctrl_ctx->add_flags |= added_ctxs;
  925. new_add_flags = ctrl_ctx->add_flags;
  926. /* If xhci_endpoint_disable() was called for this endpoint, but the
  927. * xHC hasn't been notified yet through the check_bandwidth() call,
  928. * this re-adds a new state for the endpoint from the new endpoint
  929. * descriptors. We must drop and re-add this endpoint, so we leave the
  930. * drop flags alone.
  931. */
  932. new_drop_flags = ctrl_ctx->drop_flags;
  933. slot_ctx = xhci_get_slot_ctx(xhci, in_ctx);
  934. /* Update the last valid endpoint context, if we just added one past */
  935. if ((slot_ctx->dev_info & LAST_CTX_MASK) < LAST_CTX(last_ctx)) {
  936. slot_ctx->dev_info &= ~LAST_CTX_MASK;
  937. slot_ctx->dev_info |= LAST_CTX(last_ctx);
  938. }
  939. new_slot_info = slot_ctx->dev_info;
  940. /* Store the usb_device pointer for later use */
  941. ep->hcpriv = udev;
  942. xhci_dbg(xhci, "add ep 0x%x, slot id %d, new drop flags = %#x, new add flags = %#x, new slot info = %#x\n",
  943. (unsigned int) ep->desc.bEndpointAddress,
  944. udev->slot_id,
  945. (unsigned int) new_drop_flags,
  946. (unsigned int) new_add_flags,
  947. (unsigned int) new_slot_info);
  948. return 0;
  949. }
  950. static void xhci_zero_in_ctx(struct xhci_hcd *xhci, struct xhci_virt_device *virt_dev)
  951. {
  952. struct xhci_input_control_ctx *ctrl_ctx;
  953. struct xhci_ep_ctx *ep_ctx;
  954. struct xhci_slot_ctx *slot_ctx;
  955. int i;
  956. /* When a device's add flag and drop flag are zero, any subsequent
  957. * configure endpoint command will leave that endpoint's state
  958. * untouched. Make sure we don't leave any old state in the input
  959. * endpoint contexts.
  960. */
  961. ctrl_ctx = xhci_get_input_control_ctx(xhci, virt_dev->in_ctx);
  962. ctrl_ctx->drop_flags = 0;
  963. ctrl_ctx->add_flags = 0;
  964. slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->in_ctx);
  965. slot_ctx->dev_info &= ~LAST_CTX_MASK;
  966. /* Endpoint 0 is always valid */
  967. slot_ctx->dev_info |= LAST_CTX(1);
  968. for (i = 1; i < 31; ++i) {
  969. ep_ctx = xhci_get_ep_ctx(xhci, virt_dev->in_ctx, i);
  970. ep_ctx->ep_info = 0;
  971. ep_ctx->ep_info2 = 0;
  972. ep_ctx->deq = 0;
  973. ep_ctx->tx_info = 0;
  974. }
  975. }
  976. static int xhci_configure_endpoint_result(struct xhci_hcd *xhci,
  977. struct usb_device *udev, int *cmd_status)
  978. {
  979. int ret;
  980. switch (*cmd_status) {
  981. case COMP_ENOMEM:
  982. dev_warn(&udev->dev, "Not enough host controller resources "
  983. "for new device state.\n");
  984. ret = -ENOMEM;
  985. /* FIXME: can we allocate more resources for the HC? */
  986. break;
  987. case COMP_BW_ERR:
  988. dev_warn(&udev->dev, "Not enough bandwidth "
  989. "for new device state.\n");
  990. ret = -ENOSPC;
  991. /* FIXME: can we go back to the old state? */
  992. break;
  993. case COMP_TRB_ERR:
  994. /* the HCD set up something wrong */
  995. dev_warn(&udev->dev, "ERROR: Endpoint drop flag = 0, "
  996. "add flag = 1, "
  997. "and endpoint is not disabled.\n");
  998. ret = -EINVAL;
  999. break;
  1000. case COMP_SUCCESS:
  1001. dev_dbg(&udev->dev, "Successful Endpoint Configure command\n");
  1002. ret = 0;
  1003. break;
  1004. default:
  1005. xhci_err(xhci, "ERROR: unexpected command completion "
  1006. "code 0x%x.\n", *cmd_status);
  1007. ret = -EINVAL;
  1008. break;
  1009. }
  1010. return ret;
  1011. }
  1012. static int xhci_evaluate_context_result(struct xhci_hcd *xhci,
  1013. struct usb_device *udev, int *cmd_status)
  1014. {
  1015. int ret;
  1016. struct xhci_virt_device *virt_dev = xhci->devs[udev->slot_id];
  1017. switch (*cmd_status) {
  1018. case COMP_EINVAL:
  1019. dev_warn(&udev->dev, "WARN: xHCI driver setup invalid evaluate "
  1020. "context command.\n");
  1021. ret = -EINVAL;
  1022. break;
  1023. case COMP_EBADSLT:
  1024. dev_warn(&udev->dev, "WARN: slot not enabled for"
  1025. "evaluate context command.\n");
  1026. case COMP_CTX_STATE:
  1027. dev_warn(&udev->dev, "WARN: invalid context state for "
  1028. "evaluate context command.\n");
  1029. xhci_dbg_ctx(xhci, virt_dev->out_ctx, 1);
  1030. ret = -EINVAL;
  1031. break;
  1032. case COMP_SUCCESS:
  1033. dev_dbg(&udev->dev, "Successful evaluate context command\n");
  1034. ret = 0;
  1035. break;
  1036. default:
  1037. xhci_err(xhci, "ERROR: unexpected command completion "
  1038. "code 0x%x.\n", *cmd_status);
  1039. ret = -EINVAL;
  1040. break;
  1041. }
  1042. return ret;
  1043. }
  1044. /* Issue a configure endpoint command or evaluate context command
  1045. * and wait for it to finish.
  1046. */
  1047. static int xhci_configure_endpoint(struct xhci_hcd *xhci,
  1048. struct usb_device *udev,
  1049. struct xhci_command *command,
  1050. bool ctx_change, bool must_succeed)
  1051. {
  1052. int ret;
  1053. int timeleft;
  1054. unsigned long flags;
  1055. struct xhci_container_ctx *in_ctx;
  1056. struct completion *cmd_completion;
  1057. int *cmd_status;
  1058. struct xhci_virt_device *virt_dev;
  1059. spin_lock_irqsave(&xhci->lock, flags);
  1060. virt_dev = xhci->devs[udev->slot_id];
  1061. if (command) {
  1062. in_ctx = command->in_ctx;
  1063. cmd_completion = command->completion;
  1064. cmd_status = &command->status;
  1065. command->command_trb = xhci->cmd_ring->enqueue;
  1066. list_add_tail(&command->cmd_list, &virt_dev->cmd_list);
  1067. } else {
  1068. in_ctx = virt_dev->in_ctx;
  1069. cmd_completion = &virt_dev->cmd_completion;
  1070. cmd_status = &virt_dev->cmd_status;
  1071. }
  1072. init_completion(cmd_completion);
  1073. if (!ctx_change)
  1074. ret = xhci_queue_configure_endpoint(xhci, in_ctx->dma,
  1075. udev->slot_id, must_succeed);
  1076. else
  1077. ret = xhci_queue_evaluate_context(xhci, in_ctx->dma,
  1078. udev->slot_id);
  1079. if (ret < 0) {
  1080. if (command)
  1081. list_del(&command->cmd_list);
  1082. spin_unlock_irqrestore(&xhci->lock, flags);
  1083. xhci_dbg(xhci, "FIXME allocate a new ring segment\n");
  1084. return -ENOMEM;
  1085. }
  1086. xhci_ring_cmd_db(xhci);
  1087. spin_unlock_irqrestore(&xhci->lock, flags);
  1088. /* Wait for the configure endpoint command to complete */
  1089. timeleft = wait_for_completion_interruptible_timeout(
  1090. cmd_completion,
  1091. USB_CTRL_SET_TIMEOUT);
  1092. if (timeleft <= 0) {
  1093. xhci_warn(xhci, "%s while waiting for %s command\n",
  1094. timeleft == 0 ? "Timeout" : "Signal",
  1095. ctx_change == 0 ?
  1096. "configure endpoint" :
  1097. "evaluate context");
  1098. /* FIXME cancel the configure endpoint command */
  1099. return -ETIME;
  1100. }
  1101. if (!ctx_change)
  1102. return xhci_configure_endpoint_result(xhci, udev, cmd_status);
  1103. return xhci_evaluate_context_result(xhci, udev, cmd_status);
  1104. }
  1105. /* Called after one or more calls to xhci_add_endpoint() or
  1106. * xhci_drop_endpoint(). If this call fails, the USB core is expected
  1107. * to call xhci_reset_bandwidth().
  1108. *
  1109. * Since we are in the middle of changing either configuration or
  1110. * installing a new alt setting, the USB core won't allow URBs to be
  1111. * enqueued for any endpoint on the old config or interface. Nothing
  1112. * else should be touching the xhci->devs[slot_id] structure, so we
  1113. * don't need to take the xhci->lock for manipulating that.
  1114. */
  1115. int xhci_check_bandwidth(struct usb_hcd *hcd, struct usb_device *udev)
  1116. {
  1117. int i;
  1118. int ret = 0;
  1119. struct xhci_hcd *xhci;
  1120. struct xhci_virt_device *virt_dev;
  1121. struct xhci_input_control_ctx *ctrl_ctx;
  1122. struct xhci_slot_ctx *slot_ctx;
  1123. ret = xhci_check_args(hcd, udev, NULL, 0, __func__);
  1124. if (ret <= 0)
  1125. return ret;
  1126. xhci = hcd_to_xhci(hcd);
  1127. if (!udev->slot_id || !xhci->devs || !xhci->devs[udev->slot_id]) {
  1128. xhci_warn(xhci, "xHCI %s called with unaddressed device\n",
  1129. __func__);
  1130. return -EINVAL;
  1131. }
  1132. xhci_dbg(xhci, "%s called for udev %p\n", __func__, udev);
  1133. virt_dev = xhci->devs[udev->slot_id];
  1134. /* See section 4.6.6 - A0 = 1; A1 = D0 = D1 = 0 */
  1135. ctrl_ctx = xhci_get_input_control_ctx(xhci, virt_dev->in_ctx);
  1136. ctrl_ctx->add_flags |= SLOT_FLAG;
  1137. ctrl_ctx->add_flags &= ~EP0_FLAG;
  1138. ctrl_ctx->drop_flags &= ~SLOT_FLAG;
  1139. ctrl_ctx->drop_flags &= ~EP0_FLAG;
  1140. xhci_dbg(xhci, "New Input Control Context:\n");
  1141. slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->in_ctx);
  1142. xhci_dbg_ctx(xhci, virt_dev->in_ctx,
  1143. LAST_CTX_TO_EP_NUM(slot_ctx->dev_info));
  1144. ret = xhci_configure_endpoint(xhci, udev, NULL,
  1145. false, false);
  1146. if (ret) {
  1147. /* Callee should call reset_bandwidth() */
  1148. return ret;
  1149. }
  1150. xhci_dbg(xhci, "Output context after successful config ep cmd:\n");
  1151. xhci_dbg_ctx(xhci, virt_dev->out_ctx,
  1152. LAST_CTX_TO_EP_NUM(slot_ctx->dev_info));
  1153. xhci_zero_in_ctx(xhci, virt_dev);
  1154. /* Install new rings and free or cache any old rings */
  1155. for (i = 1; i < 31; ++i) {
  1156. if (!virt_dev->eps[i].new_ring)
  1157. continue;
  1158. /* Only cache or free the old ring if it exists.
  1159. * It may not if this is the first add of an endpoint.
  1160. */
  1161. if (virt_dev->eps[i].ring) {
  1162. xhci_free_or_cache_endpoint_ring(xhci, virt_dev, i);
  1163. }
  1164. virt_dev->eps[i].ring = virt_dev->eps[i].new_ring;
  1165. virt_dev->eps[i].new_ring = NULL;
  1166. }
  1167. return ret;
  1168. }
  1169. void xhci_reset_bandwidth(struct usb_hcd *hcd, struct usb_device *udev)
  1170. {
  1171. struct xhci_hcd *xhci;
  1172. struct xhci_virt_device *virt_dev;
  1173. int i, ret;
  1174. ret = xhci_check_args(hcd, udev, NULL, 0, __func__);
  1175. if (ret <= 0)
  1176. return;
  1177. xhci = hcd_to_xhci(hcd);
  1178. if (!xhci->devs || !xhci->devs[udev->slot_id]) {
  1179. xhci_warn(xhci, "xHCI %s called with unaddressed device\n",
  1180. __func__);
  1181. return;
  1182. }
  1183. xhci_dbg(xhci, "%s called for udev %p\n", __func__, udev);
  1184. virt_dev = xhci->devs[udev->slot_id];
  1185. /* Free any rings allocated for added endpoints */
  1186. for (i = 0; i < 31; ++i) {
  1187. if (virt_dev->eps[i].new_ring) {
  1188. xhci_ring_free(xhci, virt_dev->eps[i].new_ring);
  1189. virt_dev->eps[i].new_ring = NULL;
  1190. }
  1191. }
  1192. xhci_zero_in_ctx(xhci, virt_dev);
  1193. }
  1194. static void xhci_setup_input_ctx_for_config_ep(struct xhci_hcd *xhci,
  1195. struct xhci_container_ctx *in_ctx,
  1196. struct xhci_container_ctx *out_ctx,
  1197. u32 add_flags, u32 drop_flags)
  1198. {
  1199. struct xhci_input_control_ctx *ctrl_ctx;
  1200. ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
  1201. ctrl_ctx->add_flags = add_flags;
  1202. ctrl_ctx->drop_flags = drop_flags;
  1203. xhci_slot_copy(xhci, in_ctx, out_ctx);
  1204. ctrl_ctx->add_flags |= SLOT_FLAG;
  1205. xhci_dbg(xhci, "Input Context:\n");
  1206. xhci_dbg_ctx(xhci, in_ctx, xhci_last_valid_endpoint(add_flags));
  1207. }
  1208. void xhci_setup_input_ctx_for_quirk(struct xhci_hcd *xhci,
  1209. unsigned int slot_id, unsigned int ep_index,
  1210. struct xhci_dequeue_state *deq_state)
  1211. {
  1212. struct xhci_container_ctx *in_ctx;
  1213. struct xhci_ep_ctx *ep_ctx;
  1214. u32 added_ctxs;
  1215. dma_addr_t addr;
  1216. xhci_endpoint_copy(xhci, xhci->devs[slot_id]->in_ctx,
  1217. xhci->devs[slot_id]->out_ctx, ep_index);
  1218. in_ctx = xhci->devs[slot_id]->in_ctx;
  1219. ep_ctx = xhci_get_ep_ctx(xhci, in_ctx, ep_index);
  1220. addr = xhci_trb_virt_to_dma(deq_state->new_deq_seg,
  1221. deq_state->new_deq_ptr);
  1222. if (addr == 0) {
  1223. xhci_warn(xhci, "WARN Cannot submit config ep after "
  1224. "reset ep command\n");
  1225. xhci_warn(xhci, "WARN deq seg = %p, deq ptr = %p\n",
  1226. deq_state->new_deq_seg,
  1227. deq_state->new_deq_ptr);
  1228. return;
  1229. }
  1230. ep_ctx->deq = addr | deq_state->new_cycle_state;
  1231. added_ctxs = xhci_get_endpoint_flag_from_index(ep_index);
  1232. xhci_setup_input_ctx_for_config_ep(xhci, xhci->devs[slot_id]->in_ctx,
  1233. xhci->devs[slot_id]->out_ctx, added_ctxs, added_ctxs);
  1234. }
  1235. void xhci_cleanup_stalled_ring(struct xhci_hcd *xhci,
  1236. struct usb_device *udev, unsigned int ep_index)
  1237. {
  1238. struct xhci_dequeue_state deq_state;
  1239. struct xhci_virt_ep *ep;
  1240. xhci_dbg(xhci, "Cleaning up stalled endpoint ring\n");
  1241. ep = &xhci->devs[udev->slot_id]->eps[ep_index];
  1242. /* We need to move the HW's dequeue pointer past this TD,
  1243. * or it will attempt to resend it on the next doorbell ring.
  1244. */
  1245. xhci_find_new_dequeue_state(xhci, udev->slot_id,
  1246. ep_index, ep->stopped_stream, ep->stopped_td,
  1247. &deq_state);
  1248. /* HW with the reset endpoint quirk will use the saved dequeue state to
  1249. * issue a configure endpoint command later.
  1250. */
  1251. if (!(xhci->quirks & XHCI_RESET_EP_QUIRK)) {
  1252. xhci_dbg(xhci, "Queueing new dequeue state\n");
  1253. xhci_queue_new_dequeue_state(xhci, udev->slot_id,
  1254. ep_index, ep->stopped_stream, &deq_state);
  1255. } else {
  1256. /* Better hope no one uses the input context between now and the
  1257. * reset endpoint completion!
  1258. * XXX: No idea how this hardware will react when stream rings
  1259. * are enabled.
  1260. */
  1261. xhci_dbg(xhci, "Setting up input context for "
  1262. "configure endpoint command\n");
  1263. xhci_setup_input_ctx_for_quirk(xhci, udev->slot_id,
  1264. ep_index, &deq_state);
  1265. }
  1266. }
  1267. /* Deal with stalled endpoints. The core should have sent the control message
  1268. * to clear the halt condition. However, we need to make the xHCI hardware
  1269. * reset its sequence number, since a device will expect a sequence number of
  1270. * zero after the halt condition is cleared.
  1271. * Context: in_interrupt
  1272. */
  1273. void xhci_endpoint_reset(struct usb_hcd *hcd,
  1274. struct usb_host_endpoint *ep)
  1275. {
  1276. struct xhci_hcd *xhci;
  1277. struct usb_device *udev;
  1278. unsigned int ep_index;
  1279. unsigned long flags;
  1280. int ret;
  1281. struct xhci_virt_ep *virt_ep;
  1282. xhci = hcd_to_xhci(hcd);
  1283. udev = (struct usb_device *) ep->hcpriv;
  1284. /* Called with a root hub endpoint (or an endpoint that wasn't added
  1285. * with xhci_add_endpoint()
  1286. */
  1287. if (!ep->hcpriv)
  1288. return;
  1289. ep_index = xhci_get_endpoint_index(&ep->desc);
  1290. virt_ep = &xhci->devs[udev->slot_id]->eps[ep_index];
  1291. if (!virt_ep->stopped_td) {
  1292. xhci_dbg(xhci, "Endpoint 0x%x not halted, refusing to reset.\n",
  1293. ep->desc.bEndpointAddress);
  1294. return;
  1295. }
  1296. if (usb_endpoint_xfer_control(&ep->desc)) {
  1297. xhci_dbg(xhci, "Control endpoint stall already handled.\n");
  1298. return;
  1299. }
  1300. xhci_dbg(xhci, "Queueing reset endpoint command\n");
  1301. spin_lock_irqsave(&xhci->lock, flags);
  1302. ret = xhci_queue_reset_ep(xhci, udev->slot_id, ep_index);
  1303. /*
  1304. * Can't change the ring dequeue pointer until it's transitioned to the
  1305. * stopped state, which is only upon a successful reset endpoint
  1306. * command. Better hope that last command worked!
  1307. */
  1308. if (!ret) {
  1309. xhci_cleanup_stalled_ring(xhci, udev, ep_index);
  1310. kfree(virt_ep->stopped_td);
  1311. xhci_ring_cmd_db(xhci);
  1312. }
  1313. virt_ep->stopped_td = NULL;
  1314. virt_ep->stopped_trb = NULL;
  1315. virt_ep->stopped_stream = 0;
  1316. spin_unlock_irqrestore(&xhci->lock, flags);
  1317. if (ret)
  1318. xhci_warn(xhci, "FIXME allocate a new ring segment\n");
  1319. }
  1320. static int xhci_check_streams_endpoint(struct xhci_hcd *xhci,
  1321. struct usb_device *udev, struct usb_host_endpoint *ep,
  1322. unsigned int slot_id)
  1323. {
  1324. int ret;
  1325. unsigned int ep_index;
  1326. unsigned int ep_state;
  1327. if (!ep)
  1328. return -EINVAL;
  1329. ret = xhci_check_args(xhci_to_hcd(xhci), udev, ep, 1, __func__);
  1330. if (ret <= 0)
  1331. return -EINVAL;
  1332. if (ep->ss_ep_comp.bmAttributes == 0) {
  1333. xhci_warn(xhci, "WARN: SuperSpeed Endpoint Companion"
  1334. " descriptor for ep 0x%x does not support streams\n",
  1335. ep->desc.bEndpointAddress);
  1336. return -EINVAL;
  1337. }
  1338. ep_index = xhci_get_endpoint_index(&ep->desc);
  1339. ep_state = xhci->devs[slot_id]->eps[ep_index].ep_state;
  1340. if (ep_state & EP_HAS_STREAMS ||
  1341. ep_state & EP_GETTING_STREAMS) {
  1342. xhci_warn(xhci, "WARN: SuperSpeed bulk endpoint 0x%x "
  1343. "already has streams set up.\n",
  1344. ep->desc.bEndpointAddress);
  1345. xhci_warn(xhci, "Send email to xHCI maintainer and ask for "
  1346. "dynamic stream context array reallocation.\n");
  1347. return -EINVAL;
  1348. }
  1349. if (!list_empty(&xhci->devs[slot_id]->eps[ep_index].ring->td_list)) {
  1350. xhci_warn(xhci, "Cannot setup streams for SuperSpeed bulk "
  1351. "endpoint 0x%x; URBs are pending.\n",
  1352. ep->desc.bEndpointAddress);
  1353. return -EINVAL;
  1354. }
  1355. return 0;
  1356. }
  1357. static void xhci_calculate_streams_entries(struct xhci_hcd *xhci,
  1358. unsigned int *num_streams, unsigned int *num_stream_ctxs)
  1359. {
  1360. unsigned int max_streams;
  1361. /* The stream context array size must be a power of two */
  1362. *num_stream_ctxs = roundup_pow_of_two(*num_streams);
  1363. /*
  1364. * Find out how many primary stream array entries the host controller
  1365. * supports. Later we may use secondary stream arrays (similar to 2nd
  1366. * level page entries), but that's an optional feature for xHCI host
  1367. * controllers. xHCs must support at least 4 stream IDs.
  1368. */
  1369. max_streams = HCC_MAX_PSA(xhci->hcc_params);
  1370. if (*num_stream_ctxs > max_streams) {
  1371. xhci_dbg(xhci, "xHCI HW only supports %u stream ctx entries.\n",
  1372. max_streams);
  1373. *num_stream_ctxs = max_streams;
  1374. *num_streams = max_streams;
  1375. }
  1376. }
  1377. /* Returns an error code if one of the endpoint already has streams.
  1378. * This does not change any data structures, it only checks and gathers
  1379. * information.
  1380. */
  1381. static int xhci_calculate_streams_and_bitmask(struct xhci_hcd *xhci,
  1382. struct usb_device *udev,
  1383. struct usb_host_endpoint **eps, unsigned int num_eps,
  1384. unsigned int *num_streams, u32 *changed_ep_bitmask)
  1385. {
  1386. unsigned int max_streams;
  1387. unsigned int endpoint_flag;
  1388. int i;
  1389. int ret;
  1390. for (i = 0; i < num_eps; i++) {
  1391. ret = xhci_check_streams_endpoint(xhci, udev,
  1392. eps[i], udev->slot_id);
  1393. if (ret < 0)
  1394. return ret;
  1395. max_streams = USB_SS_MAX_STREAMS(
  1396. eps[i]->ss_ep_comp.bmAttributes);
  1397. if (max_streams < (*num_streams - 1)) {
  1398. xhci_dbg(xhci, "Ep 0x%x only supports %u stream IDs.\n",
  1399. eps[i]->desc.bEndpointAddress,
  1400. max_streams);
  1401. *num_streams = max_streams+1;
  1402. }
  1403. endpoint_flag = xhci_get_endpoint_flag(&eps[i]->desc);
  1404. if (*changed_ep_bitmask & endpoint_flag)
  1405. return -EINVAL;
  1406. *changed_ep_bitmask |= endpoint_flag;
  1407. }
  1408. return 0;
  1409. }
  1410. static u32 xhci_calculate_no_streams_bitmask(struct xhci_hcd *xhci,
  1411. struct usb_device *udev,
  1412. struct usb_host_endpoint **eps, unsigned int num_eps)
  1413. {
  1414. u32 changed_ep_bitmask = 0;
  1415. unsigned int slot_id;
  1416. unsigned int ep_index;
  1417. unsigned int ep_state;
  1418. int i;
  1419. slot_id = udev->slot_id;
  1420. if (!xhci->devs[slot_id])
  1421. return 0;
  1422. for (i = 0; i < num_eps; i++) {
  1423. ep_index = xhci_get_endpoint_index(&eps[i]->desc);
  1424. ep_state = xhci->devs[slot_id]->eps[ep_index].ep_state;
  1425. /* Are streams already being freed for the endpoint? */
  1426. if (ep_state & EP_GETTING_NO_STREAMS) {
  1427. xhci_warn(xhci, "WARN Can't disable streams for "
  1428. "endpoint 0x%x\n, "
  1429. "streams are being disabled already.",
  1430. eps[i]->desc.bEndpointAddress);
  1431. return 0;
  1432. }
  1433. /* Are there actually any streams to free? */
  1434. if (!(ep_state & EP_HAS_STREAMS) &&
  1435. !(ep_state & EP_GETTING_STREAMS)) {
  1436. xhci_warn(xhci, "WARN Can't disable streams for "
  1437. "endpoint 0x%x\n, "
  1438. "streams are already disabled!",
  1439. eps[i]->desc.bEndpointAddress);
  1440. xhci_warn(xhci, "WARN xhci_free_streams() called "
  1441. "with non-streams endpoint\n");
  1442. return 0;
  1443. }
  1444. changed_ep_bitmask |= xhci_get_endpoint_flag(&eps[i]->desc);
  1445. }
  1446. return changed_ep_bitmask;
  1447. }
  1448. /*
  1449. * The USB device drivers use this function (though the HCD interface in USB
  1450. * core) to prepare a set of bulk endpoints to use streams. Streams are used to
  1451. * coordinate mass storage command queueing across multiple endpoints (basically
  1452. * a stream ID == a task ID).
  1453. *
  1454. * Setting up streams involves allocating the same size stream context array
  1455. * for each endpoint and issuing a configure endpoint command for all endpoints.
  1456. *
  1457. * Don't allow the call to succeed if one endpoint only supports one stream
  1458. * (which means it doesn't support streams at all).
  1459. *
  1460. * Drivers may get less stream IDs than they asked for, if the host controller
  1461. * hardware or endpoints claim they can't support the number of requested
  1462. * stream IDs.
  1463. */
  1464. int xhci_alloc_streams(struct usb_hcd *hcd, struct usb_device *udev,
  1465. struct usb_host_endpoint **eps, unsigned int num_eps,
  1466. unsigned int num_streams, gfp_t mem_flags)
  1467. {
  1468. int i, ret;
  1469. struct xhci_hcd *xhci;
  1470. struct xhci_virt_device *vdev;
  1471. struct xhci_command *config_cmd;
  1472. unsigned int ep_index;
  1473. unsigned int num_stream_ctxs;
  1474. unsigned long flags;
  1475. u32 changed_ep_bitmask = 0;
  1476. if (!eps)
  1477. return -EINVAL;
  1478. /* Add one to the number of streams requested to account for
  1479. * stream 0 that is reserved for xHCI usage.
  1480. */
  1481. num_streams += 1;
  1482. xhci = hcd_to_xhci(hcd);
  1483. xhci_dbg(xhci, "Driver wants %u stream IDs (including stream 0).\n",
  1484. num_streams);
  1485. config_cmd = xhci_alloc_command(xhci, true, true, mem_flags);
  1486. if (!config_cmd) {
  1487. xhci_dbg(xhci, "Could not allocate xHCI command structure.\n");
  1488. return -ENOMEM;
  1489. }
  1490. /* Check to make sure all endpoints are not already configured for
  1491. * streams. While we're at it, find the maximum number of streams that
  1492. * all the endpoints will support and check for duplicate endpoints.
  1493. */
  1494. spin_lock_irqsave(&xhci->lock, flags);
  1495. ret = xhci_calculate_streams_and_bitmask(xhci, udev, eps,
  1496. num_eps, &num_streams, &changed_ep_bitmask);
  1497. if (ret < 0) {
  1498. xhci_free_command(xhci, config_cmd);
  1499. spin_unlock_irqrestore(&xhci->lock, flags);
  1500. return ret;
  1501. }
  1502. if (num_streams <= 1) {
  1503. xhci_warn(xhci, "WARN: endpoints can't handle "
  1504. "more than one stream.\n");
  1505. xhci_free_command(xhci, config_cmd);
  1506. spin_unlock_irqrestore(&xhci->lock, flags);
  1507. return -EINVAL;
  1508. }
  1509. vdev = xhci->devs[udev->slot_id];
  1510. /* Mark each endpoint as being in transistion, so
  1511. * xhci_urb_enqueue() will reject all URBs.
  1512. */
  1513. for (i = 0; i < num_eps; i++) {
  1514. ep_index = xhci_get_endpoint_index(&eps[i]->desc);
  1515. vdev->eps[ep_index].ep_state |= EP_GETTING_STREAMS;
  1516. }
  1517. spin_unlock_irqrestore(&xhci->lock, flags);
  1518. /* Setup internal data structures and allocate HW data structures for
  1519. * streams (but don't install the HW structures in the input context
  1520. * until we're sure all memory allocation succeeded).
  1521. */
  1522. xhci_calculate_streams_entries(xhci, &num_streams, &num_stream_ctxs);
  1523. xhci_dbg(xhci, "Need %u stream ctx entries for %u stream IDs.\n",
  1524. num_stream_ctxs, num_streams);
  1525. for (i = 0; i < num_eps; i++) {
  1526. ep_index = xhci_get_endpoint_index(&eps[i]->desc);
  1527. vdev->eps[ep_index].stream_info = xhci_alloc_stream_info(xhci,
  1528. num_stream_ctxs,
  1529. num_streams, mem_flags);
  1530. if (!vdev->eps[ep_index].stream_info)
  1531. goto cleanup;
  1532. /* Set maxPstreams in endpoint context and update deq ptr to
  1533. * point to stream context array. FIXME
  1534. */
  1535. }
  1536. /* Set up the input context for a configure endpoint command. */
  1537. for (i = 0; i < num_eps; i++) {
  1538. struct xhci_ep_ctx *ep_ctx;
  1539. ep_index = xhci_get_endpoint_index(&eps[i]->desc);
  1540. ep_ctx = xhci_get_ep_ctx(xhci, config_cmd->in_ctx, ep_index);
  1541. xhci_endpoint_copy(xhci, config_cmd->in_ctx,
  1542. vdev->out_ctx, ep_index);
  1543. xhci_setup_streams_ep_input_ctx(xhci, ep_ctx,
  1544. vdev->eps[ep_index].stream_info);
  1545. }
  1546. /* Tell the HW to drop its old copy of the endpoint context info
  1547. * and add the updated copy from the input context.
  1548. */
  1549. xhci_setup_input_ctx_for_config_ep(xhci, config_cmd->in_ctx,
  1550. vdev->out_ctx, changed_ep_bitmask, changed_ep_bitmask);
  1551. /* Issue and wait for the configure endpoint command */
  1552. ret = xhci_configure_endpoint(xhci, udev, config_cmd,
  1553. false, false);
  1554. /* xHC rejected the configure endpoint command for some reason, so we
  1555. * leave the old ring intact and free our internal streams data
  1556. * structure.
  1557. */
  1558. if (ret < 0)
  1559. goto cleanup;
  1560. spin_lock_irqsave(&xhci->lock, flags);
  1561. for (i = 0; i < num_eps; i++) {
  1562. ep_index = xhci_get_endpoint_index(&eps[i]->desc);
  1563. vdev->eps[ep_index].ep_state &= ~EP_GETTING_STREAMS;
  1564. xhci_dbg(xhci, "Slot %u ep ctx %u now has streams.\n",
  1565. udev->slot_id, ep_index);
  1566. vdev->eps[ep_index].ep_state |= EP_HAS_STREAMS;
  1567. }
  1568. xhci_free_command(xhci, config_cmd);
  1569. spin_unlock_irqrestore(&xhci->lock, flags);
  1570. /* Subtract 1 for stream 0, which drivers can't use */
  1571. return num_streams - 1;
  1572. cleanup:
  1573. /* If it didn't work, free the streams! */
  1574. for (i = 0; i < num_eps; i++) {
  1575. ep_index = xhci_get_endpoint_index(&eps[i]->desc);
  1576. xhci_free_stream_info(xhci, vdev->eps[ep_index].stream_info);
  1577. vdev->eps[ep_index].stream_info = NULL;
  1578. /* FIXME Unset maxPstreams in endpoint context and
  1579. * update deq ptr to point to normal string ring.
  1580. */
  1581. vdev->eps[ep_index].ep_state &= ~EP_GETTING_STREAMS;
  1582. vdev->eps[ep_index].ep_state &= ~EP_HAS_STREAMS;
  1583. xhci_endpoint_zero(xhci, vdev, eps[i]);
  1584. }
  1585. xhci_free_command(xhci, config_cmd);
  1586. return -ENOMEM;
  1587. }
  1588. /* Transition the endpoint from using streams to being a "normal" endpoint
  1589. * without streams.
  1590. *
  1591. * Modify the endpoint context state, submit a configure endpoint command,
  1592. * and free all endpoint rings for streams if that completes successfully.
  1593. */
  1594. int xhci_free_streams(struct usb_hcd *hcd, struct usb_device *udev,
  1595. struct usb_host_endpoint **eps, unsigned int num_eps,
  1596. gfp_t mem_flags)
  1597. {
  1598. int i, ret;
  1599. struct xhci_hcd *xhci;
  1600. struct xhci_virt_device *vdev;
  1601. struct xhci_command *command;
  1602. unsigned int ep_index;
  1603. unsigned long flags;
  1604. u32 changed_ep_bitmask;
  1605. xhci = hcd_to_xhci(hcd);
  1606. vdev = xhci->devs[udev->slot_id];
  1607. /* Set up a configure endpoint command to remove the streams rings */
  1608. spin_lock_irqsave(&xhci->lock, flags);
  1609. changed_ep_bitmask = xhci_calculate_no_streams_bitmask(xhci,
  1610. udev, eps, num_eps);
  1611. if (changed_ep_bitmask == 0) {
  1612. spin_unlock_irqrestore(&xhci->lock, flags);
  1613. return -EINVAL;
  1614. }
  1615. /* Use the xhci_command structure from the first endpoint. We may have
  1616. * allocated too many, but the driver may call xhci_free_streams() for
  1617. * each endpoint it grouped into one call to xhci_alloc_streams().
  1618. */
  1619. ep_index = xhci_get_endpoint_index(&eps[0]->desc);
  1620. command = vdev->eps[ep_index].stream_info->free_streams_command;
  1621. for (i = 0; i < num_eps; i++) {
  1622. struct xhci_ep_ctx *ep_ctx;
  1623. ep_index = xhci_get_endpoint_index(&eps[i]->desc);
  1624. ep_ctx = xhci_get_ep_ctx(xhci, command->in_ctx, ep_index);
  1625. xhci->devs[udev->slot_id]->eps[ep_index].ep_state |=
  1626. EP_GETTING_NO_STREAMS;
  1627. xhci_endpoint_copy(xhci, command->in_ctx,
  1628. vdev->out_ctx, ep_index);
  1629. xhci_setup_no_streams_ep_input_ctx(xhci, ep_ctx,
  1630. &vdev->eps[ep_index]);
  1631. }
  1632. xhci_setup_input_ctx_for_config_ep(xhci, command->in_ctx,
  1633. vdev->out_ctx, changed_ep_bitmask, changed_ep_bitmask);
  1634. spin_unlock_irqrestore(&xhci->lock, flags);
  1635. /* Issue and wait for the configure endpoint command,
  1636. * which must succeed.
  1637. */
  1638. ret = xhci_configure_endpoint(xhci, udev, command,
  1639. false, true);
  1640. /* xHC rejected the configure endpoint command for some reason, so we
  1641. * leave the streams rings intact.
  1642. */
  1643. if (ret < 0)
  1644. return ret;
  1645. spin_lock_irqsave(&xhci->lock, flags);
  1646. for (i = 0; i < num_eps; i++) {
  1647. ep_index = xhci_get_endpoint_index(&eps[i]->desc);
  1648. xhci_free_stream_info(xhci, vdev->eps[ep_index].stream_info);
  1649. vdev->eps[ep_index].stream_info = NULL;
  1650. /* FIXME Unset maxPstreams in endpoint context and
  1651. * update deq ptr to point to normal string ring.
  1652. */
  1653. vdev->eps[ep_index].ep_state &= ~EP_GETTING_NO_STREAMS;
  1654. vdev->eps[ep_index].ep_state &= ~EP_HAS_STREAMS;
  1655. }
  1656. spin_unlock_irqrestore(&xhci->lock, flags);
  1657. return 0;
  1658. }
  1659. /*
  1660. * This submits a Reset Device Command, which will set the device state to 0,
  1661. * set the device address to 0, and disable all the endpoints except the default
  1662. * control endpoint. The USB core should come back and call
  1663. * xhci_address_device(), and then re-set up the configuration. If this is
  1664. * called because of a usb_reset_and_verify_device(), then the old alternate
  1665. * settings will be re-installed through the normal bandwidth allocation
  1666. * functions.
  1667. *
  1668. * Wait for the Reset Device command to finish. Remove all structures
  1669. * associated with the endpoints that were disabled. Clear the input device
  1670. * structure? Cache the rings? Reset the control endpoint 0 max packet size?
  1671. */
  1672. int xhci_reset_device(struct usb_hcd *hcd, struct usb_device *udev)
  1673. {
  1674. int ret, i;
  1675. unsigned long flags;
  1676. struct xhci_hcd *xhci;
  1677. unsigned int slot_id;
  1678. struct xhci_virt_device *virt_dev;
  1679. struct xhci_command *reset_device_cmd;
  1680. int timeleft;
  1681. int last_freed_endpoint;
  1682. ret = xhci_check_args(hcd, udev, NULL, 0, __func__);
  1683. if (ret <= 0)
  1684. return ret;
  1685. xhci = hcd_to_xhci(hcd);
  1686. slot_id = udev->slot_id;
  1687. virt_dev = xhci->devs[slot_id];
  1688. if (!virt_dev) {
  1689. xhci_dbg(xhci, "%s called with invalid slot ID %u\n",
  1690. __func__, slot_id);
  1691. return -EINVAL;
  1692. }
  1693. xhci_dbg(xhci, "Resetting device with slot ID %u\n", slot_id);
  1694. /* Allocate the command structure that holds the struct completion.
  1695. * Assume we're in process context, since the normal device reset
  1696. * process has to wait for the device anyway. Storage devices are
  1697. * reset as part of error handling, so use GFP_NOIO instead of
  1698. * GFP_KERNEL.
  1699. */
  1700. reset_device_cmd = xhci_alloc_command(xhci, false, true, GFP_NOIO);
  1701. if (!reset_device_cmd) {
  1702. xhci_dbg(xhci, "Couldn't allocate command structure.\n");
  1703. return -ENOMEM;
  1704. }
  1705. /* Attempt to submit the Reset Device command to the command ring */
  1706. spin_lock_irqsave(&xhci->lock, flags);
  1707. reset_device_cmd->command_trb = xhci->cmd_ring->enqueue;
  1708. list_add_tail(&reset_device_cmd->cmd_list, &virt_dev->cmd_list);
  1709. ret = xhci_queue_reset_device(xhci, slot_id);
  1710. if (ret) {
  1711. xhci_dbg(xhci, "FIXME: allocate a command ring segment\n");
  1712. list_del(&reset_device_cmd->cmd_list);
  1713. spin_unlock_irqrestore(&xhci->lock, flags);
  1714. goto command_cleanup;
  1715. }
  1716. xhci_ring_cmd_db(xhci);
  1717. spin_unlock_irqrestore(&xhci->lock, flags);
  1718. /* Wait for the Reset Device command to finish */
  1719. timeleft = wait_for_completion_interruptible_timeout(
  1720. reset_device_cmd->completion,
  1721. USB_CTRL_SET_TIMEOUT);
  1722. if (timeleft <= 0) {
  1723. xhci_warn(xhci, "%s while waiting for reset device command\n",
  1724. timeleft == 0 ? "Timeout" : "Signal");
  1725. spin_lock_irqsave(&xhci->lock, flags);
  1726. /* The timeout might have raced with the event ring handler, so
  1727. * only delete from the list if the item isn't poisoned.
  1728. */
  1729. if (reset_device_cmd->cmd_list.next != LIST_POISON1)
  1730. list_del(&reset_device_cmd->cmd_list);
  1731. spin_unlock_irqrestore(&xhci->lock, flags);
  1732. ret = -ETIME;
  1733. goto command_cleanup;
  1734. }
  1735. /* The Reset Device command can't fail, according to the 0.95/0.96 spec,
  1736. * unless we tried to reset a slot ID that wasn't enabled,
  1737. * or the device wasn't in the addressed or configured state.
  1738. */
  1739. ret = reset_device_cmd->status;
  1740. switch (ret) {
  1741. case COMP_EBADSLT: /* 0.95 completion code for bad slot ID */
  1742. case COMP_CTX_STATE: /* 0.96 completion code for same thing */
  1743. xhci_info(xhci, "Can't reset device (slot ID %u) in %s state\n",
  1744. slot_id,
  1745. xhci_get_slot_state(xhci, virt_dev->out_ctx));
  1746. xhci_info(xhci, "Not freeing device rings.\n");
  1747. /* Don't treat this as an error. May change my mind later. */
  1748. ret = 0;
  1749. goto command_cleanup;
  1750. case COMP_SUCCESS:
  1751. xhci_dbg(xhci, "Successful reset device command.\n");
  1752. break;
  1753. default:
  1754. if (xhci_is_vendor_info_code(xhci, ret))
  1755. break;
  1756. xhci_warn(xhci, "Unknown completion code %u for "
  1757. "reset device command.\n", ret);
  1758. ret = -EINVAL;
  1759. goto command_cleanup;
  1760. }
  1761. /* Everything but endpoint 0 is disabled, so free or cache the rings. */
  1762. last_freed_endpoint = 1;
  1763. for (i = 1; i < 31; ++i) {
  1764. if (!virt_dev->eps[i].ring)
  1765. continue;
  1766. xhci_free_or_cache_endpoint_ring(xhci, virt_dev, i);
  1767. last_freed_endpoint = i;
  1768. }
  1769. xhci_dbg(xhci, "Output context after successful reset device cmd:\n");
  1770. xhci_dbg_ctx(xhci, virt_dev->out_ctx, last_freed_endpoint);
  1771. ret = 0;
  1772. command_cleanup:
  1773. xhci_free_command(xhci, reset_device_cmd);
  1774. return ret;
  1775. }
  1776. /*
  1777. * At this point, the struct usb_device is about to go away, the device has
  1778. * disconnected, and all traffic has been stopped and the endpoints have been
  1779. * disabled. Free any HC data structures associated with that device.
  1780. */
  1781. void xhci_free_dev(struct usb_hcd *hcd, struct usb_device *udev)
  1782. {
  1783. struct xhci_hcd *xhci = hcd_to_xhci(hcd);
  1784. struct xhci_virt_device *virt_dev;
  1785. unsigned long flags;
  1786. u32 state;
  1787. int i;
  1788. if (udev->slot_id == 0)
  1789. return;
  1790. virt_dev = xhci->devs[udev->slot_id];
  1791. if (!virt_dev)
  1792. return;
  1793. /* Stop any wayward timer functions (which may grab the lock) */
  1794. for (i = 0; i < 31; ++i) {
  1795. virt_dev->eps[i].ep_state &= ~EP_HALT_PENDING;
  1796. del_timer_sync(&virt_dev->eps[i].stop_cmd_timer);
  1797. }
  1798. spin_lock_irqsave(&xhci->lock, flags);
  1799. /* Don't disable the slot if the host controller is dead. */
  1800. state = xhci_readl(xhci, &xhci->op_regs->status);
  1801. if (state == 0xffffffff || (xhci->xhc_state & XHCI_STATE_DYING)) {
  1802. xhci_free_virt_device(xhci, udev->slot_id);
  1803. spin_unlock_irqrestore(&xhci->lock, flags);
  1804. return;
  1805. }
  1806. if (xhci_queue_slot_control(xhci, TRB_DISABLE_SLOT, udev->slot_id)) {
  1807. spin_unlock_irqrestore(&xhci->lock, flags);
  1808. xhci_dbg(xhci, "FIXME: allocate a command ring segment\n");
  1809. return;
  1810. }
  1811. xhci_ring_cmd_db(xhci);
  1812. spin_unlock_irqrestore(&xhci->lock, flags);
  1813. /*
  1814. * Event command completion handler will free any data structures
  1815. * associated with the slot. XXX Can free sleep?
  1816. */
  1817. }
  1818. /*
  1819. * Returns 0 if the xHC ran out of device slots, the Enable Slot command
  1820. * timed out, or allocating memory failed. Returns 1 on success.
  1821. */
  1822. int xhci_alloc_dev(struct usb_hcd *hcd, struct usb_device *udev)
  1823. {
  1824. struct xhci_hcd *xhci = hcd_to_xhci(hcd);
  1825. unsigned long flags;
  1826. int timeleft;
  1827. int ret;
  1828. spin_lock_irqsave(&xhci->lock, flags);
  1829. ret = xhci_queue_slot_control(xhci, TRB_ENABLE_SLOT, 0);
  1830. if (ret) {
  1831. spin_unlock_irqrestore(&xhci->lock, flags);
  1832. xhci_dbg(xhci, "FIXME: allocate a command ring segment\n");
  1833. return 0;
  1834. }
  1835. xhci_ring_cmd_db(xhci);
  1836. spin_unlock_irqrestore(&xhci->lock, flags);
  1837. /* XXX: how much time for xHC slot assignment? */
  1838. timeleft = wait_for_completion_interruptible_timeout(&xhci->addr_dev,
  1839. USB_CTRL_SET_TIMEOUT);
  1840. if (timeleft <= 0) {
  1841. xhci_warn(xhci, "%s while waiting for a slot\n",
  1842. timeleft == 0 ? "Timeout" : "Signal");
  1843. /* FIXME cancel the enable slot request */
  1844. return 0;
  1845. }
  1846. if (!xhci->slot_id) {
  1847. xhci_err(xhci, "Error while assigning device slot ID\n");
  1848. return 0;
  1849. }
  1850. /* xhci_alloc_virt_device() does not touch rings; no need to lock */
  1851. if (!xhci_alloc_virt_device(xhci, xhci->slot_id, udev, GFP_KERNEL)) {
  1852. /* Disable slot, if we can do it without mem alloc */
  1853. xhci_warn(xhci, "Could not allocate xHCI USB device data structures\n");
  1854. spin_lock_irqsave(&xhci->lock, flags);
  1855. if (!xhci_queue_slot_control(xhci, TRB_DISABLE_SLOT, udev->slot_id))
  1856. xhci_ring_cmd_db(xhci);
  1857. spin_unlock_irqrestore(&xhci->lock, flags);
  1858. return 0;
  1859. }
  1860. udev->slot_id = xhci->slot_id;
  1861. /* Is this a LS or FS device under a HS hub? */
  1862. /* Hub or peripherial? */
  1863. return 1;
  1864. }
  1865. /*
  1866. * Issue an Address Device command (which will issue a SetAddress request to
  1867. * the device).
  1868. * We should be protected by the usb_address0_mutex in khubd's hub_port_init, so
  1869. * we should only issue and wait on one address command at the same time.
  1870. *
  1871. * We add one to the device address issued by the hardware because the USB core
  1872. * uses address 1 for the root hubs (even though they're not really devices).
  1873. */
  1874. int xhci_address_device(struct usb_hcd *hcd, struct usb_device *udev)
  1875. {
  1876. unsigned long flags;
  1877. int timeleft;
  1878. struct xhci_virt_device *virt_dev;
  1879. int ret = 0;
  1880. struct xhci_hcd *xhci = hcd_to_xhci(hcd);
  1881. struct xhci_slot_ctx *slot_ctx;
  1882. struct xhci_input_control_ctx *ctrl_ctx;
  1883. u64 temp_64;
  1884. if (!udev->slot_id) {
  1885. xhci_dbg(xhci, "Bad Slot ID %d\n", udev->slot_id);
  1886. return -EINVAL;
  1887. }
  1888. virt_dev = xhci->devs[udev->slot_id];
  1889. /* If this is a Set Address to an unconfigured device, setup ep 0 */
  1890. if (!udev->config)
  1891. xhci_setup_addressable_virt_dev(xhci, udev);
  1892. /* Otherwise, assume the core has the device configured how it wants */
  1893. xhci_dbg(xhci, "Slot ID %d Input Context:\n", udev->slot_id);
  1894. xhci_dbg_ctx(xhci, virt_dev->in_ctx, 2);
  1895. spin_lock_irqsave(&xhci->lock, flags);
  1896. ret = xhci_queue_address_device(xhci, virt_dev->in_ctx->dma,
  1897. udev->slot_id);
  1898. if (ret) {
  1899. spin_unlock_irqrestore(&xhci->lock, flags);
  1900. xhci_dbg(xhci, "FIXME: allocate a command ring segment\n");
  1901. return ret;
  1902. }
  1903. xhci_ring_cmd_db(xhci);
  1904. spin_unlock_irqrestore(&xhci->lock, flags);
  1905. /* ctrl tx can take up to 5 sec; XXX: need more time for xHC? */
  1906. timeleft = wait_for_completion_interruptible_timeout(&xhci->addr_dev,
  1907. USB_CTRL_SET_TIMEOUT);
  1908. /* FIXME: From section 4.3.4: "Software shall be responsible for timing
  1909. * the SetAddress() "recovery interval" required by USB and aborting the
  1910. * command on a timeout.
  1911. */
  1912. if (timeleft <= 0) {
  1913. xhci_warn(xhci, "%s while waiting for a slot\n",
  1914. timeleft == 0 ? "Timeout" : "Signal");
  1915. /* FIXME cancel the address device command */
  1916. return -ETIME;
  1917. }
  1918. switch (virt_dev->cmd_status) {
  1919. case COMP_CTX_STATE:
  1920. case COMP_EBADSLT:
  1921. xhci_err(xhci, "Setup ERROR: address device command for slot %d.\n",
  1922. udev->slot_id);
  1923. ret = -EINVAL;
  1924. break;
  1925. case COMP_TX_ERR:
  1926. dev_warn(&udev->dev, "Device not responding to set address.\n");
  1927. ret = -EPROTO;
  1928. break;
  1929. case COMP_SUCCESS:
  1930. xhci_dbg(xhci, "Successful Address Device command\n");
  1931. break;
  1932. default:
  1933. xhci_err(xhci, "ERROR: unexpected command completion "
  1934. "code 0x%x.\n", virt_dev->cmd_status);
  1935. xhci_dbg(xhci, "Slot ID %d Output Context:\n", udev->slot_id);
  1936. xhci_dbg_ctx(xhci, virt_dev->out_ctx, 2);
  1937. ret = -EINVAL;
  1938. break;
  1939. }
  1940. if (ret) {
  1941. return ret;
  1942. }
  1943. temp_64 = xhci_read_64(xhci, &xhci->op_regs->dcbaa_ptr);
  1944. xhci_dbg(xhci, "Op regs DCBAA ptr = %#016llx\n", temp_64);
  1945. xhci_dbg(xhci, "Slot ID %d dcbaa entry @%p = %#016llx\n",
  1946. udev->slot_id,
  1947. &xhci->dcbaa->dev_context_ptrs[udev->slot_id],
  1948. (unsigned long long)
  1949. xhci->dcbaa->dev_context_ptrs[udev->slot_id]);
  1950. xhci_dbg(xhci, "Output Context DMA address = %#08llx\n",
  1951. (unsigned long long)virt_dev->out_ctx->dma);
  1952. xhci_dbg(xhci, "Slot ID %d Input Context:\n", udev->slot_id);
  1953. xhci_dbg_ctx(xhci, virt_dev->in_ctx, 2);
  1954. xhci_dbg(xhci, "Slot ID %d Output Context:\n", udev->slot_id);
  1955. xhci_dbg_ctx(xhci, virt_dev->out_ctx, 2);
  1956. /*
  1957. * USB core uses address 1 for the roothubs, so we add one to the
  1958. * address given back to us by the HC.
  1959. */
  1960. slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->out_ctx);
  1961. udev->devnum = (slot_ctx->dev_state & DEV_ADDR_MASK) + 1;
  1962. /* Zero the input context control for later use */
  1963. ctrl_ctx = xhci_get_input_control_ctx(xhci, virt_dev->in_ctx);
  1964. ctrl_ctx->add_flags = 0;
  1965. ctrl_ctx->drop_flags = 0;
  1966. xhci_dbg(xhci, "Device address = %d\n", udev->devnum);
  1967. /* XXX Meh, not sure if anyone else but choose_address uses this. */
  1968. set_bit(udev->devnum, udev->bus->devmap.devicemap);
  1969. return 0;
  1970. }
  1971. /* Once a hub descriptor is fetched for a device, we need to update the xHC's
  1972. * internal data structures for the device.
  1973. */
  1974. int xhci_update_hub_device(struct usb_hcd *hcd, struct usb_device *hdev,
  1975. struct usb_tt *tt, gfp_t mem_flags)
  1976. {
  1977. struct xhci_hcd *xhci = hcd_to_xhci(hcd);
  1978. struct xhci_virt_device *vdev;
  1979. struct xhci_command *config_cmd;
  1980. struct xhci_input_control_ctx *ctrl_ctx;
  1981. struct xhci_slot_ctx *slot_ctx;
  1982. unsigned long flags;
  1983. unsigned think_time;
  1984. int ret;
  1985. /* Ignore root hubs */
  1986. if (!hdev->parent)
  1987. return 0;
  1988. vdev = xhci->devs[hdev->slot_id];
  1989. if (!vdev) {
  1990. xhci_warn(xhci, "Cannot update hub desc for unknown device.\n");
  1991. return -EINVAL;
  1992. }
  1993. config_cmd = xhci_alloc_command(xhci, true, true, mem_flags);
  1994. if (!config_cmd) {
  1995. xhci_dbg(xhci, "Could not allocate xHCI command structure.\n");
  1996. return -ENOMEM;
  1997. }
  1998. spin_lock_irqsave(&xhci->lock, flags);
  1999. xhci_slot_copy(xhci, config_cmd->in_ctx, vdev->out_ctx);
  2000. ctrl_ctx = xhci_get_input_control_ctx(xhci, config_cmd->in_ctx);
  2001. ctrl_ctx->add_flags |= SLOT_FLAG;
  2002. slot_ctx = xhci_get_slot_ctx(xhci, config_cmd->in_ctx);
  2003. slot_ctx->dev_info |= DEV_HUB;
  2004. if (tt->multi)
  2005. slot_ctx->dev_info |= DEV_MTT;
  2006. if (xhci->hci_version > 0x95) {
  2007. xhci_dbg(xhci, "xHCI version %x needs hub "
  2008. "TT think time and number of ports\n",
  2009. (unsigned int) xhci->hci_version);
  2010. slot_ctx->dev_info2 |= XHCI_MAX_PORTS(hdev->maxchild);
  2011. /* Set TT think time - convert from ns to FS bit times.
  2012. * 0 = 8 FS bit times, 1 = 16 FS bit times,
  2013. * 2 = 24 FS bit times, 3 = 32 FS bit times.
  2014. */
  2015. think_time = tt->think_time;
  2016. if (think_time != 0)
  2017. think_time = (think_time / 666) - 1;
  2018. slot_ctx->tt_info |= TT_THINK_TIME(think_time);
  2019. } else {
  2020. xhci_dbg(xhci, "xHCI version %x doesn't need hub "
  2021. "TT think time or number of ports\n",
  2022. (unsigned int) xhci->hci_version);
  2023. }
  2024. slot_ctx->dev_state = 0;
  2025. spin_unlock_irqrestore(&xhci->lock, flags);
  2026. xhci_dbg(xhci, "Set up %s for hub device.\n",
  2027. (xhci->hci_version > 0x95) ?
  2028. "configure endpoint" : "evaluate context");
  2029. xhci_dbg(xhci, "Slot %u Input Context:\n", hdev->slot_id);
  2030. xhci_dbg_ctx(xhci, config_cmd->in_ctx, 0);
  2031. /* Issue and wait for the configure endpoint or
  2032. * evaluate context command.
  2033. */
  2034. if (xhci->hci_version > 0x95)
  2035. ret = xhci_configure_endpoint(xhci, hdev, config_cmd,
  2036. false, false);
  2037. else
  2038. ret = xhci_configure_endpoint(xhci, hdev, config_cmd,
  2039. true, false);
  2040. xhci_dbg(xhci, "Slot %u Output Context:\n", hdev->slot_id);
  2041. xhci_dbg_ctx(xhci, vdev->out_ctx, 0);
  2042. xhci_free_command(xhci, config_cmd);
  2043. return ret;
  2044. }
  2045. int xhci_get_frame(struct usb_hcd *hcd)
  2046. {
  2047. struct xhci_hcd *xhci = hcd_to_xhci(hcd);
  2048. /* EHCI mods by the periodic size. Why? */
  2049. return xhci_readl(xhci, &xhci->run_regs->microframe_index) >> 3;
  2050. }
  2051. MODULE_DESCRIPTION(DRIVER_DESC);
  2052. MODULE_AUTHOR(DRIVER_AUTHOR);
  2053. MODULE_LICENSE("GPL");
  2054. static int __init xhci_hcd_init(void)
  2055. {
  2056. #ifdef CONFIG_PCI
  2057. int retval = 0;
  2058. retval = xhci_register_pci();
  2059. if (retval < 0) {
  2060. printk(KERN_DEBUG "Problem registering PCI driver.");
  2061. return retval;
  2062. }
  2063. #endif
  2064. /*
  2065. * Check the compiler generated sizes of structures that must be laid
  2066. * out in specific ways for hardware access.
  2067. */
  2068. BUILD_BUG_ON(sizeof(struct xhci_doorbell_array) != 256*32/8);
  2069. BUILD_BUG_ON(sizeof(struct xhci_slot_ctx) != 8*32/8);
  2070. BUILD_BUG_ON(sizeof(struct xhci_ep_ctx) != 8*32/8);
  2071. /* xhci_device_control has eight fields, and also
  2072. * embeds one xhci_slot_ctx and 31 xhci_ep_ctx
  2073. */
  2074. BUILD_BUG_ON(sizeof(struct xhci_stream_ctx) != 4*32/8);
  2075. BUILD_BUG_ON(sizeof(union xhci_trb) != 4*32/8);
  2076. BUILD_BUG_ON(sizeof(struct xhci_erst_entry) != 4*32/8);
  2077. BUILD_BUG_ON(sizeof(struct xhci_cap_regs) != 7*32/8);
  2078. BUILD_BUG_ON(sizeof(struct xhci_intr_reg) != 8*32/8);
  2079. /* xhci_run_regs has eight fields and embeds 128 xhci_intr_regs */
  2080. BUILD_BUG_ON(sizeof(struct xhci_run_regs) != (8+8*128)*32/8);
  2081. BUILD_BUG_ON(sizeof(struct xhci_doorbell_array) != 256*32/8);
  2082. return 0;
  2083. }
  2084. module_init(xhci_hcd_init);
  2085. static void __exit xhci_hcd_cleanup(void)
  2086. {
  2087. #ifdef CONFIG_PCI
  2088. xhci_unregister_pci();
  2089. #endif
  2090. }
  2091. module_exit(xhci_hcd_cleanup);