qla_init.c 141 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465666768697071727374757677787980818283848586878889909192939495969798991001011021031041051061071081091101111121131141151161171181191201211221231241251261271281291301311321331341351361371381391401411421431441451461471481491501511521531541551561571581591601611621631641651661671681691701711721731741751761771781791801811821831841851861871881891901911921931941951961971981992002012022032042052062072082092102112122132142152162172182192202212222232242252262272282292302312322332342352362372382392402412422432442452462472482492502512522532542552562572582592602612622632642652662672682692702712722732742752762772782792802812822832842852862872882892902912922932942952962972982993003013023033043053063073083093103113123133143153163173183193203213223233243253263273283293303313323333343353363373383393403413423433443453463473483493503513523533543553563573583593603613623633643653663673683693703713723733743753763773783793803813823833843853863873883893903913923933943953963973983994004014024034044054064074084094104114124134144154164174184194204214224234244254264274284294304314324334344354364374384394404414424434444454464474484494504514524534544554564574584594604614624634644654664674684694704714724734744754764774784794804814824834844854864874884894904914924934944954964974984995005015025035045055065075085095105115125135145155165175185195205215225235245255265275285295305315325335345355365375385395405415425435445455465475485495505515525535545555565575585595605615625635645655665675685695705715725735745755765775785795805815825835845855865875885895905915925935945955965975985996006016026036046056066076086096106116126136146156166176186196206216226236246256266276286296306316326336346356366376386396406416426436446456466476486496506516526536546556566576586596606616626636646656666676686696706716726736746756766776786796806816826836846856866876886896906916926936946956966976986997007017027037047057067077087097107117127137147157167177187197207217227237247257267277287297307317327337347357367377387397407417427437447457467477487497507517527537547557567577587597607617627637647657667677687697707717727737747757767777787797807817827837847857867877887897907917927937947957967977987998008018028038048058068078088098108118128138148158168178188198208218228238248258268278288298308318328338348358368378388398408418428438448458468478488498508518528538548558568578588598608618628638648658668678688698708718728738748758768778788798808818828838848858868878888898908918928938948958968978988999009019029039049059069079089099109119129139149159169179189199209219229239249259269279289299309319329339349359369379389399409419429439449459469479489499509519529539549559569579589599609619629639649659669679689699709719729739749759769779789799809819829839849859869879889899909919929939949959969979989991000100110021003100410051006100710081009101010111012101310141015101610171018101910201021102210231024102510261027102810291030103110321033103410351036103710381039104010411042104310441045104610471048104910501051105210531054105510561057105810591060106110621063106410651066106710681069107010711072107310741075107610771078107910801081108210831084108510861087108810891090109110921093109410951096109710981099110011011102110311041105110611071108110911101111111211131114111511161117111811191120112111221123112411251126112711281129113011311132113311341135113611371138113911401141114211431144114511461147114811491150115111521153115411551156115711581159116011611162116311641165116611671168116911701171117211731174117511761177117811791180118111821183118411851186118711881189119011911192119311941195119611971198119912001201120212031204120512061207120812091210121112121213121412151216121712181219122012211222122312241225122612271228122912301231123212331234123512361237123812391240124112421243124412451246124712481249125012511252125312541255125612571258125912601261126212631264126512661267126812691270127112721273127412751276127712781279128012811282128312841285128612871288128912901291129212931294129512961297129812991300130113021303130413051306130713081309131013111312131313141315131613171318131913201321132213231324132513261327132813291330133113321333133413351336133713381339134013411342134313441345134613471348134913501351135213531354135513561357135813591360136113621363136413651366136713681369137013711372137313741375137613771378137913801381138213831384138513861387138813891390139113921393139413951396139713981399140014011402140314041405140614071408140914101411141214131414141514161417141814191420142114221423142414251426142714281429143014311432143314341435143614371438143914401441144214431444144514461447144814491450145114521453145414551456145714581459146014611462146314641465146614671468146914701471147214731474147514761477147814791480148114821483148414851486148714881489149014911492149314941495149614971498149915001501150215031504150515061507150815091510151115121513151415151516151715181519152015211522152315241525152615271528152915301531153215331534153515361537153815391540154115421543154415451546154715481549155015511552155315541555155615571558155915601561156215631564156515661567156815691570157115721573157415751576157715781579158015811582158315841585158615871588158915901591159215931594159515961597159815991600160116021603160416051606160716081609161016111612161316141615161616171618161916201621162216231624162516261627162816291630163116321633163416351636163716381639164016411642164316441645164616471648164916501651165216531654165516561657165816591660166116621663166416651666166716681669167016711672167316741675167616771678167916801681168216831684168516861687168816891690169116921693169416951696169716981699170017011702170317041705170617071708170917101711171217131714171517161717171817191720172117221723172417251726172717281729173017311732173317341735173617371738173917401741174217431744174517461747174817491750175117521753175417551756175717581759176017611762176317641765176617671768176917701771177217731774177517761777177817791780178117821783178417851786178717881789179017911792179317941795179617971798179918001801180218031804180518061807180818091810181118121813181418151816181718181819182018211822182318241825182618271828182918301831183218331834183518361837183818391840184118421843184418451846184718481849185018511852185318541855185618571858185918601861186218631864186518661867186818691870187118721873187418751876187718781879188018811882188318841885188618871888188918901891189218931894189518961897189818991900190119021903190419051906190719081909191019111912191319141915191619171918191919201921192219231924192519261927192819291930193119321933193419351936193719381939194019411942194319441945194619471948194919501951195219531954195519561957195819591960196119621963196419651966196719681969197019711972197319741975197619771978197919801981198219831984198519861987198819891990199119921993199419951996199719981999200020012002200320042005200620072008200920102011201220132014201520162017201820192020202120222023202420252026202720282029203020312032203320342035203620372038203920402041204220432044204520462047204820492050205120522053205420552056205720582059206020612062206320642065206620672068206920702071207220732074207520762077207820792080208120822083208420852086208720882089209020912092209320942095209620972098209921002101210221032104210521062107210821092110211121122113211421152116211721182119212021212122212321242125212621272128212921302131213221332134213521362137213821392140214121422143214421452146214721482149215021512152215321542155215621572158215921602161216221632164216521662167216821692170217121722173217421752176217721782179218021812182218321842185218621872188218921902191219221932194219521962197219821992200220122022203220422052206220722082209221022112212221322142215221622172218221922202221222222232224222522262227222822292230223122322233223422352236223722382239224022412242224322442245224622472248224922502251225222532254225522562257225822592260226122622263226422652266226722682269227022712272227322742275227622772278227922802281228222832284228522862287228822892290229122922293229422952296229722982299230023012302230323042305230623072308230923102311231223132314231523162317231823192320232123222323232423252326232723282329233023312332233323342335233623372338233923402341234223432344234523462347234823492350235123522353235423552356235723582359236023612362236323642365236623672368236923702371237223732374237523762377237823792380238123822383238423852386238723882389239023912392239323942395239623972398239924002401240224032404240524062407240824092410241124122413241424152416241724182419242024212422242324242425242624272428242924302431243224332434243524362437243824392440244124422443244424452446244724482449245024512452245324542455245624572458245924602461246224632464246524662467246824692470247124722473247424752476247724782479248024812482248324842485248624872488248924902491249224932494249524962497249824992500250125022503250425052506250725082509251025112512251325142515251625172518251925202521252225232524252525262527252825292530253125322533253425352536253725382539254025412542254325442545254625472548254925502551255225532554255525562557255825592560256125622563256425652566256725682569257025712572257325742575257625772578257925802581258225832584258525862587258825892590259125922593259425952596259725982599260026012602260326042605260626072608260926102611261226132614261526162617261826192620262126222623262426252626262726282629263026312632263326342635263626372638263926402641264226432644264526462647264826492650265126522653265426552656265726582659266026612662266326642665266626672668266926702671267226732674267526762677267826792680268126822683268426852686268726882689269026912692269326942695269626972698269927002701270227032704270527062707270827092710271127122713271427152716271727182719272027212722272327242725272627272728272927302731273227332734273527362737273827392740274127422743274427452746274727482749275027512752275327542755275627572758275927602761276227632764276527662767276827692770277127722773277427752776277727782779278027812782278327842785278627872788278927902791279227932794279527962797279827992800280128022803280428052806280728082809281028112812281328142815281628172818281928202821282228232824282528262827282828292830283128322833283428352836283728382839284028412842284328442845284628472848284928502851285228532854285528562857285828592860286128622863286428652866286728682869287028712872287328742875287628772878287928802881288228832884288528862887288828892890289128922893289428952896289728982899290029012902290329042905290629072908290929102911291229132914291529162917291829192920292129222923292429252926292729282929293029312932293329342935293629372938293929402941294229432944294529462947294829492950295129522953295429552956295729582959296029612962296329642965296629672968296929702971297229732974297529762977297829792980298129822983298429852986298729882989299029912992299329942995299629972998299930003001300230033004300530063007300830093010301130123013301430153016301730183019302030213022302330243025302630273028302930303031303230333034303530363037303830393040304130423043304430453046304730483049305030513052305330543055305630573058305930603061306230633064306530663067306830693070307130723073307430753076307730783079308030813082308330843085308630873088308930903091309230933094309530963097309830993100310131023103310431053106310731083109311031113112311331143115311631173118311931203121312231233124312531263127312831293130313131323133313431353136313731383139314031413142314331443145314631473148314931503151315231533154315531563157315831593160316131623163316431653166316731683169317031713172317331743175317631773178317931803181318231833184318531863187318831893190319131923193319431953196319731983199320032013202320332043205320632073208320932103211321232133214321532163217321832193220322132223223322432253226322732283229323032313232323332343235323632373238323932403241324232433244324532463247324832493250325132523253325432553256325732583259326032613262326332643265326632673268326932703271327232733274327532763277327832793280328132823283328432853286328732883289329032913292329332943295329632973298329933003301330233033304330533063307330833093310331133123313331433153316331733183319332033213322332333243325332633273328332933303331333233333334333533363337333833393340334133423343334433453346334733483349335033513352335333543355335633573358335933603361336233633364336533663367336833693370337133723373337433753376337733783379338033813382338333843385338633873388338933903391339233933394339533963397339833993400340134023403340434053406340734083409341034113412341334143415341634173418341934203421342234233424342534263427342834293430343134323433343434353436343734383439344034413442344334443445344634473448344934503451345234533454345534563457345834593460346134623463346434653466346734683469347034713472347334743475347634773478347934803481348234833484348534863487348834893490349134923493349434953496349734983499350035013502350335043505350635073508350935103511351235133514351535163517351835193520352135223523352435253526352735283529353035313532353335343535353635373538353935403541354235433544354535463547354835493550355135523553355435553556355735583559356035613562356335643565356635673568356935703571357235733574357535763577357835793580358135823583358435853586358735883589359035913592359335943595359635973598359936003601360236033604360536063607360836093610361136123613361436153616361736183619362036213622362336243625362636273628362936303631363236333634363536363637363836393640364136423643364436453646364736483649365036513652365336543655365636573658365936603661366236633664366536663667366836693670367136723673367436753676367736783679368036813682368336843685368636873688368936903691369236933694369536963697369836993700370137023703370437053706370737083709371037113712371337143715371637173718371937203721372237233724372537263727372837293730373137323733373437353736373737383739374037413742374337443745374637473748374937503751375237533754375537563757375837593760376137623763376437653766376737683769377037713772377337743775377637773778377937803781378237833784378537863787378837893790379137923793379437953796379737983799380038013802380338043805380638073808380938103811381238133814381538163817381838193820382138223823382438253826382738283829383038313832383338343835383638373838383938403841384238433844384538463847384838493850385138523853385438553856385738583859386038613862386338643865386638673868386938703871387238733874387538763877387838793880388138823883388438853886388738883889389038913892389338943895389638973898389939003901390239033904390539063907390839093910391139123913391439153916391739183919392039213922392339243925392639273928392939303931393239333934393539363937393839393940394139423943394439453946394739483949395039513952395339543955395639573958395939603961396239633964396539663967396839693970397139723973397439753976397739783979398039813982398339843985398639873988398939903991399239933994399539963997399839994000400140024003400440054006400740084009401040114012401340144015401640174018401940204021402240234024402540264027402840294030403140324033403440354036403740384039404040414042404340444045404640474048404940504051405240534054405540564057405840594060406140624063406440654066406740684069407040714072407340744075407640774078407940804081408240834084408540864087408840894090409140924093409440954096409740984099410041014102410341044105410641074108410941104111411241134114411541164117411841194120412141224123412441254126412741284129413041314132413341344135413641374138413941404141414241434144414541464147414841494150415141524153415441554156415741584159416041614162416341644165416641674168416941704171417241734174417541764177417841794180418141824183418441854186418741884189419041914192419341944195419641974198419942004201420242034204420542064207420842094210421142124213421442154216421742184219422042214222422342244225422642274228422942304231423242334234423542364237423842394240424142424243424442454246424742484249425042514252425342544255425642574258425942604261426242634264426542664267426842694270427142724273427442754276427742784279428042814282428342844285428642874288428942904291429242934294429542964297429842994300430143024303430443054306430743084309431043114312431343144315431643174318431943204321432243234324432543264327432843294330433143324333433443354336433743384339434043414342434343444345434643474348434943504351435243534354435543564357435843594360436143624363436443654366436743684369437043714372437343744375437643774378437943804381438243834384438543864387438843894390439143924393439443954396439743984399440044014402440344044405440644074408440944104411441244134414441544164417441844194420442144224423442444254426442744284429443044314432443344344435443644374438443944404441444244434444444544464447444844494450445144524453445444554456445744584459446044614462446344644465446644674468446944704471447244734474447544764477447844794480448144824483448444854486448744884489449044914492449344944495449644974498449945004501450245034504450545064507450845094510451145124513451445154516451745184519452045214522452345244525452645274528452945304531453245334534453545364537453845394540454145424543454445454546454745484549455045514552455345544555455645574558455945604561456245634564456545664567456845694570457145724573457445754576457745784579458045814582458345844585458645874588458945904591459245934594459545964597459845994600460146024603460446054606460746084609461046114612461346144615461646174618461946204621462246234624462546264627462846294630463146324633463446354636463746384639464046414642464346444645464646474648464946504651465246534654465546564657465846594660466146624663466446654666466746684669467046714672467346744675467646774678467946804681468246834684468546864687468846894690469146924693469446954696469746984699470047014702470347044705470647074708470947104711471247134714471547164717471847194720472147224723472447254726472747284729473047314732473347344735473647374738473947404741474247434744474547464747474847494750475147524753475447554756475747584759476047614762476347644765476647674768476947704771477247734774477547764777477847794780478147824783478447854786478747884789479047914792479347944795479647974798479948004801480248034804480548064807480848094810481148124813481448154816481748184819482048214822482348244825482648274828482948304831483248334834483548364837483848394840484148424843484448454846484748484849485048514852485348544855485648574858485948604861486248634864486548664867486848694870487148724873487448754876487748784879488048814882488348844885488648874888488948904891489248934894489548964897489848994900490149024903490449054906490749084909491049114912491349144915491649174918491949204921492249234924492549264927492849294930493149324933493449354936493749384939494049414942494349444945494649474948494949504951495249534954495549564957495849594960496149624963496449654966496749684969497049714972497349744975497649774978497949804981498249834984498549864987498849894990499149924993499449954996499749984999500050015002500350045005500650075008500950105011501250135014501550165017501850195020502150225023502450255026502750285029503050315032503350345035503650375038503950405041504250435044504550465047504850495050505150525053505450555056505750585059506050615062506350645065506650675068506950705071507250735074507550765077507850795080508150825083508450855086508750885089509050915092509350945095509650975098509951005101510251035104510551065107510851095110511151125113511451155116511751185119512051215122512351245125512651275128512951305131513251335134513551365137513851395140514151425143514451455146514751485149515051515152515351545155515651575158515951605161516251635164516551665167516851695170517151725173517451755176517751785179518051815182518351845185518651875188518951905191519251935194519551965197519851995200520152025203520452055206520752085209521052115212521352145215521652175218521952205221522252235224522552265227522852295230523152325233523452355236523752385239524052415242524352445245524652475248524952505251525252535254525552565257525852595260526152625263526452655266526752685269527052715272527352745275527652775278527952805281528252835284528552865287528852895290529152925293529452955296529752985299530053015302530353045305530653075308530953105311531253135314531553165317531853195320532153225323532453255326532753285329533053315332533353345335533653375338533953405341534253435344534553465347534853495350535153525353535453555356535753585359536053615362536353645365536653675368536953705371537253735374537553765377537853795380538153825383538453855386538753885389539053915392539353945395539653975398539954005401540254035404540554065407540854095410541154125413541454155416541754185419542054215422542354245425542654275428542954305431543254335434543554365437543854395440544154425443544454455446544754485449545054515452545354545455545654575458545954605461546254635464546554665467546854695470547154725473547454755476547754785479548054815482548354845485548654875488548954905491
  1. /*
  2. * QLogic Fibre Channel HBA Driver
  3. * Copyright (c) 2003-2008 QLogic Corporation
  4. *
  5. * See LICENSE.qla2xxx for copyright and licensing details.
  6. */
  7. #include "qla_def.h"
  8. #include "qla_gbl.h"
  9. #include <linux/delay.h>
  10. #include <linux/slab.h>
  11. #include <linux/vmalloc.h>
  12. #include "qla_devtbl.h"
  13. #ifdef CONFIG_SPARC
  14. #include <asm/prom.h>
  15. #endif
  16. /*
  17. * QLogic ISP2x00 Hardware Support Function Prototypes.
  18. */
  19. static int qla2x00_isp_firmware(scsi_qla_host_t *);
  20. static int qla2x00_setup_chip(scsi_qla_host_t *);
  21. static int qla2x00_init_rings(scsi_qla_host_t *);
  22. static int qla2x00_fw_ready(scsi_qla_host_t *);
  23. static int qla2x00_configure_hba(scsi_qla_host_t *);
  24. static int qla2x00_configure_loop(scsi_qla_host_t *);
  25. static int qla2x00_configure_local_loop(scsi_qla_host_t *);
  26. static int qla2x00_configure_fabric(scsi_qla_host_t *);
  27. static int qla2x00_find_all_fabric_devs(scsi_qla_host_t *, struct list_head *);
  28. static int qla2x00_device_resync(scsi_qla_host_t *);
  29. static int qla2x00_fabric_dev_login(scsi_qla_host_t *, fc_port_t *,
  30. uint16_t *);
  31. static int qla2x00_restart_isp(scsi_qla_host_t *);
  32. static int qla2x00_find_new_loop_id(scsi_qla_host_t *, fc_port_t *);
  33. static struct qla_chip_state_84xx *qla84xx_get_chip(struct scsi_qla_host *);
  34. static int qla84xx_init_chip(scsi_qla_host_t *);
  35. static int qla25xx_init_queues(struct qla_hw_data *);
  36. /* SRB Extensions ---------------------------------------------------------- */
  37. static void
  38. qla2x00_ctx_sp_timeout(unsigned long __data)
  39. {
  40. srb_t *sp = (srb_t *)__data;
  41. struct srb_ctx *ctx;
  42. struct srb_iocb *iocb;
  43. fc_port_t *fcport = sp->fcport;
  44. struct qla_hw_data *ha = fcport->vha->hw;
  45. struct req_que *req;
  46. unsigned long flags;
  47. spin_lock_irqsave(&ha->hardware_lock, flags);
  48. req = ha->req_q_map[0];
  49. req->outstanding_cmds[sp->handle] = NULL;
  50. ctx = sp->ctx;
  51. iocb = ctx->u.iocb_cmd;
  52. iocb->timeout(sp);
  53. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  54. iocb->free(sp);
  55. }
  56. void
  57. qla2x00_ctx_sp_free(srb_t *sp)
  58. {
  59. struct srb_ctx *ctx = sp->ctx;
  60. struct srb_iocb *iocb = ctx->u.iocb_cmd;
  61. del_timer_sync(&iocb->timer);
  62. kfree(iocb);
  63. kfree(ctx);
  64. mempool_free(sp, sp->fcport->vha->hw->srb_mempool);
  65. }
  66. inline srb_t *
  67. qla2x00_get_ctx_sp(scsi_qla_host_t *vha, fc_port_t *fcport, size_t size,
  68. unsigned long tmo)
  69. {
  70. srb_t *sp;
  71. struct qla_hw_data *ha = vha->hw;
  72. struct srb_ctx *ctx;
  73. struct srb_iocb *iocb;
  74. sp = mempool_alloc(ha->srb_mempool, GFP_KERNEL);
  75. if (!sp)
  76. goto done;
  77. ctx = kzalloc(size, GFP_KERNEL);
  78. if (!ctx) {
  79. mempool_free(sp, ha->srb_mempool);
  80. sp = NULL;
  81. goto done;
  82. }
  83. iocb = kzalloc(sizeof(struct srb_iocb), GFP_KERNEL);
  84. if (!iocb) {
  85. mempool_free(sp, ha->srb_mempool);
  86. sp = NULL;
  87. kfree(ctx);
  88. goto done;
  89. }
  90. memset(sp, 0, sizeof(*sp));
  91. sp->fcport = fcport;
  92. sp->ctx = ctx;
  93. ctx->u.iocb_cmd = iocb;
  94. iocb->free = qla2x00_ctx_sp_free;
  95. init_timer(&iocb->timer);
  96. if (!tmo)
  97. goto done;
  98. iocb->timer.expires = jiffies + tmo * HZ;
  99. iocb->timer.data = (unsigned long)sp;
  100. iocb->timer.function = qla2x00_ctx_sp_timeout;
  101. add_timer(&iocb->timer);
  102. done:
  103. return sp;
  104. }
  105. /* Asynchronous Login/Logout Routines -------------------------------------- */
  106. #define ELS_TMO_2_RATOV(ha) ((ha)->r_a_tov / 10 * 2)
  107. static void
  108. qla2x00_async_iocb_timeout(srb_t *sp)
  109. {
  110. fc_port_t *fcport = sp->fcport;
  111. struct srb_ctx *ctx = sp->ctx;
  112. DEBUG2(printk(KERN_WARNING
  113. "scsi(%ld:%x): Async-%s timeout.\n",
  114. fcport->vha->host_no, sp->handle, ctx->name));
  115. fcport->flags &= ~FCF_ASYNC_SENT;
  116. if (ctx->type == SRB_LOGIN_CMD)
  117. qla2x00_post_async_logout_work(fcport->vha, fcport, NULL);
  118. }
  119. static void
  120. qla2x00_async_login_ctx_done(srb_t *sp)
  121. {
  122. struct srb_ctx *ctx = sp->ctx;
  123. struct srb_iocb *lio = ctx->u.iocb_cmd;
  124. qla2x00_post_async_login_done_work(sp->fcport->vha, sp->fcport,
  125. lio->u.logio.data);
  126. lio->free(sp);
  127. }
  128. int
  129. qla2x00_async_login(struct scsi_qla_host *vha, fc_port_t *fcport,
  130. uint16_t *data)
  131. {
  132. struct qla_hw_data *ha = vha->hw;
  133. srb_t *sp;
  134. struct srb_ctx *ctx;
  135. struct srb_iocb *lio;
  136. int rval;
  137. rval = QLA_FUNCTION_FAILED;
  138. sp = qla2x00_get_ctx_sp(vha, fcport, sizeof(struct srb_ctx),
  139. ELS_TMO_2_RATOV(ha) + 2);
  140. if (!sp)
  141. goto done;
  142. ctx = sp->ctx;
  143. ctx->type = SRB_LOGIN_CMD;
  144. ctx->name = "login";
  145. lio = ctx->u.iocb_cmd;
  146. lio->timeout = qla2x00_async_iocb_timeout;
  147. lio->done = qla2x00_async_login_ctx_done;
  148. lio->u.logio.flags |= SRB_LOGIN_COND_PLOGI;
  149. if (data[1] & QLA_LOGIO_LOGIN_RETRIED)
  150. lio->u.logio.flags |= SRB_LOGIN_RETRIED;
  151. rval = qla2x00_start_sp(sp);
  152. if (rval != QLA_SUCCESS)
  153. goto done_free_sp;
  154. DEBUG2(printk(KERN_DEBUG
  155. "scsi(%ld:%x): Async-login - loop-id=%x portid=%02x%02x%02x "
  156. "retries=%d.\n", fcport->vha->host_no, sp->handle, fcport->loop_id,
  157. fcport->d_id.b.domain, fcport->d_id.b.area, fcport->d_id.b.al_pa,
  158. fcport->login_retry));
  159. return rval;
  160. done_free_sp:
  161. lio->free(sp);
  162. done:
  163. return rval;
  164. }
  165. static void
  166. qla2x00_async_logout_ctx_done(srb_t *sp)
  167. {
  168. struct srb_ctx *ctx = sp->ctx;
  169. struct srb_iocb *lio = ctx->u.iocb_cmd;
  170. qla2x00_post_async_logout_done_work(sp->fcport->vha, sp->fcport,
  171. lio->u.logio.data);
  172. lio->free(sp);
  173. }
  174. int
  175. qla2x00_async_logout(struct scsi_qla_host *vha, fc_port_t *fcport)
  176. {
  177. struct qla_hw_data *ha = vha->hw;
  178. srb_t *sp;
  179. struct srb_ctx *ctx;
  180. struct srb_iocb *lio;
  181. int rval;
  182. rval = QLA_FUNCTION_FAILED;
  183. sp = qla2x00_get_ctx_sp(vha, fcport, sizeof(struct srb_ctx),
  184. ELS_TMO_2_RATOV(ha) + 2);
  185. if (!sp)
  186. goto done;
  187. ctx = sp->ctx;
  188. ctx->type = SRB_LOGOUT_CMD;
  189. ctx->name = "logout";
  190. lio = ctx->u.iocb_cmd;
  191. lio->timeout = qla2x00_async_iocb_timeout;
  192. lio->done = qla2x00_async_logout_ctx_done;
  193. rval = qla2x00_start_sp(sp);
  194. if (rval != QLA_SUCCESS)
  195. goto done_free_sp;
  196. DEBUG2(printk(KERN_DEBUG
  197. "scsi(%ld:%x): Async-logout - loop-id=%x portid=%02x%02x%02x.\n",
  198. fcport->vha->host_no, sp->handle, fcport->loop_id,
  199. fcport->d_id.b.domain, fcport->d_id.b.area, fcport->d_id.b.al_pa));
  200. return rval;
  201. done_free_sp:
  202. lio->free(sp);
  203. done:
  204. return rval;
  205. }
  206. static void
  207. qla2x00_async_adisc_ctx_done(srb_t *sp)
  208. {
  209. struct srb_ctx *ctx = sp->ctx;
  210. struct srb_iocb *lio = ctx->u.iocb_cmd;
  211. qla2x00_post_async_adisc_done_work(sp->fcport->vha, sp->fcport,
  212. lio->u.logio.data);
  213. lio->free(sp);
  214. }
  215. int
  216. qla2x00_async_adisc(struct scsi_qla_host *vha, fc_port_t *fcport,
  217. uint16_t *data)
  218. {
  219. struct qla_hw_data *ha = vha->hw;
  220. srb_t *sp;
  221. struct srb_ctx *ctx;
  222. struct srb_iocb *lio;
  223. int rval;
  224. rval = QLA_FUNCTION_FAILED;
  225. sp = qla2x00_get_ctx_sp(vha, fcport, sizeof(struct srb_ctx),
  226. ELS_TMO_2_RATOV(ha) + 2);
  227. if (!sp)
  228. goto done;
  229. ctx = sp->ctx;
  230. ctx->type = SRB_ADISC_CMD;
  231. ctx->name = "adisc";
  232. lio = ctx->u.iocb_cmd;
  233. lio->timeout = qla2x00_async_iocb_timeout;
  234. lio->done = qla2x00_async_adisc_ctx_done;
  235. if (data[1] & QLA_LOGIO_LOGIN_RETRIED)
  236. lio->u.logio.flags |= SRB_LOGIN_RETRIED;
  237. rval = qla2x00_start_sp(sp);
  238. if (rval != QLA_SUCCESS)
  239. goto done_free_sp;
  240. DEBUG2(printk(KERN_DEBUG
  241. "scsi(%ld:%x): Async-adisc - loop-id=%x portid=%02x%02x%02x.\n",
  242. fcport->vha->host_no, sp->handle, fcport->loop_id,
  243. fcport->d_id.b.domain, fcport->d_id.b.area, fcport->d_id.b.al_pa));
  244. return rval;
  245. done_free_sp:
  246. lio->free(sp);
  247. done:
  248. return rval;
  249. }
  250. static void
  251. qla2x00_async_tm_cmd_ctx_done(srb_t *sp)
  252. {
  253. struct srb_ctx *ctx = sp->ctx;
  254. struct srb_iocb *iocb = (struct srb_iocb *)ctx->u.iocb_cmd;
  255. qla2x00_async_tm_cmd_done(sp->fcport->vha, sp->fcport, iocb);
  256. iocb->free(sp);
  257. }
  258. int
  259. qla2x00_async_tm_cmd(fc_port_t *fcport, uint32_t flags, uint32_t lun,
  260. uint32_t tag)
  261. {
  262. struct scsi_qla_host *vha = fcport->vha;
  263. struct qla_hw_data *ha = vha->hw;
  264. srb_t *sp;
  265. struct srb_ctx *ctx;
  266. struct srb_iocb *tcf;
  267. int rval;
  268. rval = QLA_FUNCTION_FAILED;
  269. sp = qla2x00_get_ctx_sp(vha, fcport, sizeof(struct srb_ctx),
  270. ELS_TMO_2_RATOV(ha) + 2);
  271. if (!sp)
  272. goto done;
  273. ctx = sp->ctx;
  274. ctx->type = SRB_TM_CMD;
  275. ctx->name = "tmf";
  276. tcf = ctx->u.iocb_cmd;
  277. tcf->u.tmf.flags = flags;
  278. tcf->u.tmf.lun = lun;
  279. tcf->u.tmf.data = tag;
  280. tcf->timeout = qla2x00_async_iocb_timeout;
  281. tcf->done = qla2x00_async_tm_cmd_ctx_done;
  282. rval = qla2x00_start_sp(sp);
  283. if (rval != QLA_SUCCESS)
  284. goto done_free_sp;
  285. DEBUG2(printk(KERN_DEBUG
  286. "scsi(%ld:%x): Async-tmf - loop-id=%x portid=%02x%02x%02x.\n",
  287. fcport->vha->host_no, sp->handle, fcport->loop_id,
  288. fcport->d_id.b.domain, fcport->d_id.b.area, fcport->d_id.b.al_pa));
  289. return rval;
  290. done_free_sp:
  291. tcf->free(sp);
  292. done:
  293. return rval;
  294. }
  295. static void
  296. qla2x00_async_marker_ctx_done(srb_t *sp)
  297. {
  298. struct srb_ctx *ctx = sp->ctx;
  299. struct srb_iocb *iocb = (struct srb_iocb *)ctx->u.iocb_cmd;
  300. qla2x00_async_marker_done(sp->fcport->vha, sp->fcport, iocb);
  301. iocb->free(sp);
  302. }
  303. int
  304. qla2x00_async_marker(fc_port_t *fcport, uint16_t lun, uint8_t modif)
  305. {
  306. struct scsi_qla_host *vha = fcport->vha;
  307. srb_t *sp;
  308. struct srb_ctx *ctx;
  309. struct srb_iocb *mrk;
  310. int rval;
  311. rval = QLA_FUNCTION_FAILED;
  312. sp = qla2x00_get_ctx_sp(vha, fcport, sizeof(struct srb_ctx), 0);
  313. if (!sp)
  314. goto done;
  315. ctx = sp->ctx;
  316. ctx->type = SRB_MARKER_CMD;
  317. ctx->name = "marker";
  318. mrk = ctx->u.iocb_cmd;
  319. mrk->u.marker.lun = lun;
  320. mrk->u.marker.modif = modif;
  321. mrk->timeout = qla2x00_async_iocb_timeout;
  322. mrk->done = qla2x00_async_marker_ctx_done;
  323. rval = qla2x00_start_sp(sp);
  324. if (rval != QLA_SUCCESS)
  325. goto done_free_sp;
  326. DEBUG2(printk(KERN_DEBUG
  327. "scsi(%ld:%x): Async-marker - loop-id=%x "
  328. "portid=%02x%02x%02x.\n",
  329. fcport->vha->host_no, sp->handle, fcport->loop_id,
  330. fcport->d_id.b.domain, fcport->d_id.b.area,
  331. fcport->d_id.b.al_pa));
  332. return rval;
  333. done_free_sp:
  334. mrk->free(sp);
  335. done:
  336. return rval;
  337. }
  338. void
  339. qla2x00_async_login_done(struct scsi_qla_host *vha, fc_port_t *fcport,
  340. uint16_t *data)
  341. {
  342. int rval;
  343. switch (data[0]) {
  344. case MBS_COMMAND_COMPLETE:
  345. if (fcport->flags & FCF_FCP2_DEVICE) {
  346. fcport->flags |= FCF_ASYNC_SENT;
  347. qla2x00_post_async_adisc_work(vha, fcport, data);
  348. break;
  349. }
  350. qla2x00_update_fcport(vha, fcport);
  351. break;
  352. case MBS_COMMAND_ERROR:
  353. fcport->flags &= ~FCF_ASYNC_SENT;
  354. if (data[1] & QLA_LOGIO_LOGIN_RETRIED)
  355. set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
  356. else
  357. qla2x00_mark_device_lost(vha, fcport, 1, 0);
  358. break;
  359. case MBS_PORT_ID_USED:
  360. fcport->loop_id = data[1];
  361. qla2x00_post_async_login_work(vha, fcport, NULL);
  362. break;
  363. case MBS_LOOP_ID_USED:
  364. fcport->loop_id++;
  365. rval = qla2x00_find_new_loop_id(vha, fcport);
  366. if (rval != QLA_SUCCESS) {
  367. fcport->flags &= ~FCF_ASYNC_SENT;
  368. qla2x00_mark_device_lost(vha, fcport, 1, 0);
  369. break;
  370. }
  371. qla2x00_post_async_login_work(vha, fcport, NULL);
  372. break;
  373. }
  374. return;
  375. }
  376. void
  377. qla2x00_async_logout_done(struct scsi_qla_host *vha, fc_port_t *fcport,
  378. uint16_t *data)
  379. {
  380. qla2x00_mark_device_lost(vha, fcport, 1, 0);
  381. return;
  382. }
  383. void
  384. qla2x00_async_adisc_done(struct scsi_qla_host *vha, fc_port_t *fcport,
  385. uint16_t *data)
  386. {
  387. if (data[0] == MBS_COMMAND_COMPLETE) {
  388. qla2x00_update_fcport(vha, fcport);
  389. return;
  390. }
  391. /* Retry login. */
  392. fcport->flags &= ~FCF_ASYNC_SENT;
  393. if (data[1] & QLA_LOGIO_LOGIN_RETRIED)
  394. set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
  395. else
  396. qla2x00_mark_device_lost(vha, fcport, 1, 0);
  397. return;
  398. }
  399. void
  400. qla2x00_async_tm_cmd_done(struct scsi_qla_host *vha, fc_port_t *fcport,
  401. struct srb_iocb *iocb)
  402. {
  403. int rval;
  404. uint32_t flags;
  405. uint16_t lun;
  406. flags = iocb->u.tmf.flags;
  407. lun = (uint16_t)iocb->u.tmf.lun;
  408. /* Issue Marker IOCB */
  409. rval = qla2x00_async_marker(fcport, lun,
  410. flags == TCF_LUN_RESET ? MK_SYNC_ID_LUN : MK_SYNC_ID);
  411. if ((rval != QLA_SUCCESS) || iocb->u.tmf.data) {
  412. DEBUG2_3_11(printk(KERN_WARNING
  413. "%s(%ld): TM IOCB failed (%x).\n",
  414. __func__, vha->host_no, rval));
  415. }
  416. return;
  417. }
  418. void
  419. qla2x00_async_marker_done(struct scsi_qla_host *vha, fc_port_t *fcport,
  420. struct srb_iocb *iocb)
  421. {
  422. /*
  423. * Currently we dont have any specific post response processing
  424. * for this IOCB. We'll just return success or failed
  425. * depending on whether the IOCB command succeeded or failed.
  426. */
  427. if (iocb->u.tmf.data) {
  428. DEBUG2_3_11(printk(KERN_WARNING
  429. "%s(%ld): Marker IOCB failed (%x).\n",
  430. __func__, vha->host_no, iocb->u.tmf.data));
  431. }
  432. return;
  433. }
  434. /****************************************************************************/
  435. /* QLogic ISP2x00 Hardware Support Functions. */
  436. /****************************************************************************/
  437. /*
  438. * qla2x00_initialize_adapter
  439. * Initialize board.
  440. *
  441. * Input:
  442. * ha = adapter block pointer.
  443. *
  444. * Returns:
  445. * 0 = success
  446. */
  447. int
  448. qla2x00_initialize_adapter(scsi_qla_host_t *vha)
  449. {
  450. int rval;
  451. struct qla_hw_data *ha = vha->hw;
  452. struct req_que *req = ha->req_q_map[0];
  453. /* Clear adapter flags. */
  454. vha->flags.online = 0;
  455. ha->flags.chip_reset_done = 0;
  456. vha->flags.reset_active = 0;
  457. ha->flags.pci_channel_io_perm_failure = 0;
  458. ha->flags.eeh_busy = 0;
  459. atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
  460. atomic_set(&vha->loop_state, LOOP_DOWN);
  461. vha->device_flags = DFLG_NO_CABLE;
  462. vha->dpc_flags = 0;
  463. vha->flags.management_server_logged_in = 0;
  464. vha->marker_needed = 0;
  465. ha->isp_abort_cnt = 0;
  466. ha->beacon_blink_led = 0;
  467. set_bit(0, ha->req_qid_map);
  468. set_bit(0, ha->rsp_qid_map);
  469. qla_printk(KERN_INFO, ha, "Configuring PCI space...\n");
  470. rval = ha->isp_ops->pci_config(vha);
  471. if (rval) {
  472. DEBUG2(printk("scsi(%ld): Unable to configure PCI space.\n",
  473. vha->host_no));
  474. return (rval);
  475. }
  476. ha->isp_ops->reset_chip(vha);
  477. rval = qla2xxx_get_flash_info(vha);
  478. if (rval) {
  479. DEBUG2(printk("scsi(%ld): Unable to validate FLASH data.\n",
  480. vha->host_no));
  481. return (rval);
  482. }
  483. ha->isp_ops->get_flash_version(vha, req->ring);
  484. qla_printk(KERN_INFO, ha, "Configure NVRAM parameters...\n");
  485. ha->isp_ops->nvram_config(vha);
  486. if (ha->flags.disable_serdes) {
  487. /* Mask HBA via NVRAM settings? */
  488. qla_printk(KERN_INFO, ha, "Masking HBA WWPN "
  489. "%02x%02x%02x%02x%02x%02x%02x%02x (via NVRAM).\n",
  490. vha->port_name[0], vha->port_name[1],
  491. vha->port_name[2], vha->port_name[3],
  492. vha->port_name[4], vha->port_name[5],
  493. vha->port_name[6], vha->port_name[7]);
  494. return QLA_FUNCTION_FAILED;
  495. }
  496. qla_printk(KERN_INFO, ha, "Verifying loaded RISC code...\n");
  497. if (qla2x00_isp_firmware(vha) != QLA_SUCCESS) {
  498. rval = ha->isp_ops->chip_diag(vha);
  499. if (rval)
  500. return (rval);
  501. rval = qla2x00_setup_chip(vha);
  502. if (rval)
  503. return (rval);
  504. }
  505. if (IS_QLA84XX(ha)) {
  506. ha->cs84xx = qla84xx_get_chip(vha);
  507. if (!ha->cs84xx) {
  508. qla_printk(KERN_ERR, ha,
  509. "Unable to configure ISP84XX.\n");
  510. return QLA_FUNCTION_FAILED;
  511. }
  512. }
  513. rval = qla2x00_init_rings(vha);
  514. ha->flags.chip_reset_done = 1;
  515. if (rval == QLA_SUCCESS && IS_QLA84XX(ha)) {
  516. /* Issue verify 84xx FW IOCB to complete 84xx initialization */
  517. rval = qla84xx_init_chip(vha);
  518. if (rval != QLA_SUCCESS) {
  519. qla_printk(KERN_ERR, ha,
  520. "Unable to initialize ISP84XX.\n");
  521. qla84xx_put_chip(vha);
  522. }
  523. }
  524. if (IS_QLA24XX_TYPE(ha) || IS_QLA25XX(ha)) {
  525. if (qla24xx_read_fcp_prio_cfg(vha))
  526. qla_printk(KERN_ERR, ha,
  527. "Unable to read FCP priority data.\n");
  528. }
  529. return (rval);
  530. }
  531. /**
  532. * qla2100_pci_config() - Setup ISP21xx PCI configuration registers.
  533. * @ha: HA context
  534. *
  535. * Returns 0 on success.
  536. */
  537. int
  538. qla2100_pci_config(scsi_qla_host_t *vha)
  539. {
  540. uint16_t w;
  541. unsigned long flags;
  542. struct qla_hw_data *ha = vha->hw;
  543. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  544. pci_set_master(ha->pdev);
  545. pci_try_set_mwi(ha->pdev);
  546. pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
  547. w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
  548. pci_write_config_word(ha->pdev, PCI_COMMAND, w);
  549. pci_disable_rom(ha->pdev);
  550. /* Get PCI bus information. */
  551. spin_lock_irqsave(&ha->hardware_lock, flags);
  552. ha->pci_attr = RD_REG_WORD(&reg->ctrl_status);
  553. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  554. return QLA_SUCCESS;
  555. }
  556. /**
  557. * qla2300_pci_config() - Setup ISP23xx PCI configuration registers.
  558. * @ha: HA context
  559. *
  560. * Returns 0 on success.
  561. */
  562. int
  563. qla2300_pci_config(scsi_qla_host_t *vha)
  564. {
  565. uint16_t w;
  566. unsigned long flags = 0;
  567. uint32_t cnt;
  568. struct qla_hw_data *ha = vha->hw;
  569. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  570. pci_set_master(ha->pdev);
  571. pci_try_set_mwi(ha->pdev);
  572. pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
  573. w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
  574. if (IS_QLA2322(ha) || IS_QLA6322(ha))
  575. w &= ~PCI_COMMAND_INTX_DISABLE;
  576. pci_write_config_word(ha->pdev, PCI_COMMAND, w);
  577. /*
  578. * If this is a 2300 card and not 2312, reset the
  579. * COMMAND_INVALIDATE due to a bug in the 2300. Unfortunately,
  580. * the 2310 also reports itself as a 2300 so we need to get the
  581. * fb revision level -- a 6 indicates it really is a 2300 and
  582. * not a 2310.
  583. */
  584. if (IS_QLA2300(ha)) {
  585. spin_lock_irqsave(&ha->hardware_lock, flags);
  586. /* Pause RISC. */
  587. WRT_REG_WORD(&reg->hccr, HCCR_PAUSE_RISC);
  588. for (cnt = 0; cnt < 30000; cnt++) {
  589. if ((RD_REG_WORD(&reg->hccr) & HCCR_RISC_PAUSE) != 0)
  590. break;
  591. udelay(10);
  592. }
  593. /* Select FPM registers. */
  594. WRT_REG_WORD(&reg->ctrl_status, 0x20);
  595. RD_REG_WORD(&reg->ctrl_status);
  596. /* Get the fb rev level */
  597. ha->fb_rev = RD_FB_CMD_REG(ha, reg);
  598. if (ha->fb_rev == FPM_2300)
  599. pci_clear_mwi(ha->pdev);
  600. /* Deselect FPM registers. */
  601. WRT_REG_WORD(&reg->ctrl_status, 0x0);
  602. RD_REG_WORD(&reg->ctrl_status);
  603. /* Release RISC module. */
  604. WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
  605. for (cnt = 0; cnt < 30000; cnt++) {
  606. if ((RD_REG_WORD(&reg->hccr) & HCCR_RISC_PAUSE) == 0)
  607. break;
  608. udelay(10);
  609. }
  610. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  611. }
  612. pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80);
  613. pci_disable_rom(ha->pdev);
  614. /* Get PCI bus information. */
  615. spin_lock_irqsave(&ha->hardware_lock, flags);
  616. ha->pci_attr = RD_REG_WORD(&reg->ctrl_status);
  617. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  618. return QLA_SUCCESS;
  619. }
  620. /**
  621. * qla24xx_pci_config() - Setup ISP24xx PCI configuration registers.
  622. * @ha: HA context
  623. *
  624. * Returns 0 on success.
  625. */
  626. int
  627. qla24xx_pci_config(scsi_qla_host_t *vha)
  628. {
  629. uint16_t w;
  630. unsigned long flags = 0;
  631. struct qla_hw_data *ha = vha->hw;
  632. struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
  633. pci_set_master(ha->pdev);
  634. pci_try_set_mwi(ha->pdev);
  635. pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
  636. w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
  637. w &= ~PCI_COMMAND_INTX_DISABLE;
  638. pci_write_config_word(ha->pdev, PCI_COMMAND, w);
  639. pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80);
  640. /* PCI-X -- adjust Maximum Memory Read Byte Count (2048). */
  641. if (pci_find_capability(ha->pdev, PCI_CAP_ID_PCIX))
  642. pcix_set_mmrbc(ha->pdev, 2048);
  643. /* PCIe -- adjust Maximum Read Request Size (2048). */
  644. if (pci_find_capability(ha->pdev, PCI_CAP_ID_EXP))
  645. pcie_set_readrq(ha->pdev, 2048);
  646. pci_disable_rom(ha->pdev);
  647. ha->chip_revision = ha->pdev->revision;
  648. /* Get PCI bus information. */
  649. spin_lock_irqsave(&ha->hardware_lock, flags);
  650. ha->pci_attr = RD_REG_DWORD(&reg->ctrl_status);
  651. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  652. return QLA_SUCCESS;
  653. }
  654. /**
  655. * qla25xx_pci_config() - Setup ISP25xx PCI configuration registers.
  656. * @ha: HA context
  657. *
  658. * Returns 0 on success.
  659. */
  660. int
  661. qla25xx_pci_config(scsi_qla_host_t *vha)
  662. {
  663. uint16_t w;
  664. struct qla_hw_data *ha = vha->hw;
  665. pci_set_master(ha->pdev);
  666. pci_try_set_mwi(ha->pdev);
  667. pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
  668. w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
  669. w &= ~PCI_COMMAND_INTX_DISABLE;
  670. pci_write_config_word(ha->pdev, PCI_COMMAND, w);
  671. /* PCIe -- adjust Maximum Read Request Size (2048). */
  672. if (pci_find_capability(ha->pdev, PCI_CAP_ID_EXP))
  673. pcie_set_readrq(ha->pdev, 2048);
  674. pci_disable_rom(ha->pdev);
  675. ha->chip_revision = ha->pdev->revision;
  676. return QLA_SUCCESS;
  677. }
  678. /**
  679. * qla2x00_isp_firmware() - Choose firmware image.
  680. * @ha: HA context
  681. *
  682. * Returns 0 on success.
  683. */
  684. static int
  685. qla2x00_isp_firmware(scsi_qla_host_t *vha)
  686. {
  687. int rval;
  688. uint16_t loop_id, topo, sw_cap;
  689. uint8_t domain, area, al_pa;
  690. struct qla_hw_data *ha = vha->hw;
  691. /* Assume loading risc code */
  692. rval = QLA_FUNCTION_FAILED;
  693. if (ha->flags.disable_risc_code_load) {
  694. DEBUG2(printk("scsi(%ld): RISC CODE NOT loaded\n",
  695. vha->host_no));
  696. qla_printk(KERN_INFO, ha, "RISC CODE NOT loaded\n");
  697. /* Verify checksum of loaded RISC code. */
  698. rval = qla2x00_verify_checksum(vha, ha->fw_srisc_address);
  699. if (rval == QLA_SUCCESS) {
  700. /* And, verify we are not in ROM code. */
  701. rval = qla2x00_get_adapter_id(vha, &loop_id, &al_pa,
  702. &area, &domain, &topo, &sw_cap);
  703. }
  704. }
  705. if (rval) {
  706. DEBUG2_3(printk("scsi(%ld): **** Load RISC code ****\n",
  707. vha->host_no));
  708. }
  709. return (rval);
  710. }
  711. /**
  712. * qla2x00_reset_chip() - Reset ISP chip.
  713. * @ha: HA context
  714. *
  715. * Returns 0 on success.
  716. */
  717. void
  718. qla2x00_reset_chip(scsi_qla_host_t *vha)
  719. {
  720. unsigned long flags = 0;
  721. struct qla_hw_data *ha = vha->hw;
  722. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  723. uint32_t cnt;
  724. uint16_t cmd;
  725. if (unlikely(pci_channel_offline(ha->pdev)))
  726. return;
  727. ha->isp_ops->disable_intrs(ha);
  728. spin_lock_irqsave(&ha->hardware_lock, flags);
  729. /* Turn off master enable */
  730. cmd = 0;
  731. pci_read_config_word(ha->pdev, PCI_COMMAND, &cmd);
  732. cmd &= ~PCI_COMMAND_MASTER;
  733. pci_write_config_word(ha->pdev, PCI_COMMAND, cmd);
  734. if (!IS_QLA2100(ha)) {
  735. /* Pause RISC. */
  736. WRT_REG_WORD(&reg->hccr, HCCR_PAUSE_RISC);
  737. if (IS_QLA2200(ha) || IS_QLA2300(ha)) {
  738. for (cnt = 0; cnt < 30000; cnt++) {
  739. if ((RD_REG_WORD(&reg->hccr) &
  740. HCCR_RISC_PAUSE) != 0)
  741. break;
  742. udelay(100);
  743. }
  744. } else {
  745. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  746. udelay(10);
  747. }
  748. /* Select FPM registers. */
  749. WRT_REG_WORD(&reg->ctrl_status, 0x20);
  750. RD_REG_WORD(&reg->ctrl_status); /* PCI Posting. */
  751. /* FPM Soft Reset. */
  752. WRT_REG_WORD(&reg->fpm_diag_config, 0x100);
  753. RD_REG_WORD(&reg->fpm_diag_config); /* PCI Posting. */
  754. /* Toggle Fpm Reset. */
  755. if (!IS_QLA2200(ha)) {
  756. WRT_REG_WORD(&reg->fpm_diag_config, 0x0);
  757. RD_REG_WORD(&reg->fpm_diag_config); /* PCI Posting. */
  758. }
  759. /* Select frame buffer registers. */
  760. WRT_REG_WORD(&reg->ctrl_status, 0x10);
  761. RD_REG_WORD(&reg->ctrl_status); /* PCI Posting. */
  762. /* Reset frame buffer FIFOs. */
  763. if (IS_QLA2200(ha)) {
  764. WRT_FB_CMD_REG(ha, reg, 0xa000);
  765. RD_FB_CMD_REG(ha, reg); /* PCI Posting. */
  766. } else {
  767. WRT_FB_CMD_REG(ha, reg, 0x00fc);
  768. /* Read back fb_cmd until zero or 3 seconds max */
  769. for (cnt = 0; cnt < 3000; cnt++) {
  770. if ((RD_FB_CMD_REG(ha, reg) & 0xff) == 0)
  771. break;
  772. udelay(100);
  773. }
  774. }
  775. /* Select RISC module registers. */
  776. WRT_REG_WORD(&reg->ctrl_status, 0);
  777. RD_REG_WORD(&reg->ctrl_status); /* PCI Posting. */
  778. /* Reset RISC processor. */
  779. WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
  780. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  781. /* Release RISC processor. */
  782. WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
  783. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  784. }
  785. WRT_REG_WORD(&reg->hccr, HCCR_CLR_RISC_INT);
  786. WRT_REG_WORD(&reg->hccr, HCCR_CLR_HOST_INT);
  787. /* Reset ISP chip. */
  788. WRT_REG_WORD(&reg->ctrl_status, CSR_ISP_SOFT_RESET);
  789. /* Wait for RISC to recover from reset. */
  790. if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
  791. /*
  792. * It is necessary to for a delay here since the card doesn't
  793. * respond to PCI reads during a reset. On some architectures
  794. * this will result in an MCA.
  795. */
  796. udelay(20);
  797. for (cnt = 30000; cnt; cnt--) {
  798. if ((RD_REG_WORD(&reg->ctrl_status) &
  799. CSR_ISP_SOFT_RESET) == 0)
  800. break;
  801. udelay(100);
  802. }
  803. } else
  804. udelay(10);
  805. /* Reset RISC processor. */
  806. WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
  807. WRT_REG_WORD(&reg->semaphore, 0);
  808. /* Release RISC processor. */
  809. WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
  810. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  811. if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
  812. for (cnt = 0; cnt < 30000; cnt++) {
  813. if (RD_MAILBOX_REG(ha, reg, 0) != MBS_BUSY)
  814. break;
  815. udelay(100);
  816. }
  817. } else
  818. udelay(100);
  819. /* Turn on master enable */
  820. cmd |= PCI_COMMAND_MASTER;
  821. pci_write_config_word(ha->pdev, PCI_COMMAND, cmd);
  822. /* Disable RISC pause on FPM parity error. */
  823. if (!IS_QLA2100(ha)) {
  824. WRT_REG_WORD(&reg->hccr, HCCR_DISABLE_PARITY_PAUSE);
  825. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  826. }
  827. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  828. }
  829. /**
  830. * qla24xx_reset_risc() - Perform full reset of ISP24xx RISC.
  831. * @ha: HA context
  832. *
  833. * Returns 0 on success.
  834. */
  835. static inline void
  836. qla24xx_reset_risc(scsi_qla_host_t *vha)
  837. {
  838. unsigned long flags = 0;
  839. struct qla_hw_data *ha = vha->hw;
  840. struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
  841. uint32_t cnt, d2;
  842. uint16_t wd;
  843. spin_lock_irqsave(&ha->hardware_lock, flags);
  844. /* Reset RISC. */
  845. WRT_REG_DWORD(&reg->ctrl_status, CSRX_DMA_SHUTDOWN|MWB_4096_BYTES);
  846. for (cnt = 0; cnt < 30000; cnt++) {
  847. if ((RD_REG_DWORD(&reg->ctrl_status) & CSRX_DMA_ACTIVE) == 0)
  848. break;
  849. udelay(10);
  850. }
  851. WRT_REG_DWORD(&reg->ctrl_status,
  852. CSRX_ISP_SOFT_RESET|CSRX_DMA_SHUTDOWN|MWB_4096_BYTES);
  853. pci_read_config_word(ha->pdev, PCI_COMMAND, &wd);
  854. udelay(100);
  855. /* Wait for firmware to complete NVRAM accesses. */
  856. d2 = (uint32_t) RD_REG_WORD(&reg->mailbox0);
  857. for (cnt = 10000 ; cnt && d2; cnt--) {
  858. udelay(5);
  859. d2 = (uint32_t) RD_REG_WORD(&reg->mailbox0);
  860. barrier();
  861. }
  862. /* Wait for soft-reset to complete. */
  863. d2 = RD_REG_DWORD(&reg->ctrl_status);
  864. for (cnt = 6000000 ; cnt && (d2 & CSRX_ISP_SOFT_RESET); cnt--) {
  865. udelay(5);
  866. d2 = RD_REG_DWORD(&reg->ctrl_status);
  867. barrier();
  868. }
  869. WRT_REG_DWORD(&reg->hccr, HCCRX_SET_RISC_RESET);
  870. RD_REG_DWORD(&reg->hccr);
  871. WRT_REG_DWORD(&reg->hccr, HCCRX_REL_RISC_PAUSE);
  872. RD_REG_DWORD(&reg->hccr);
  873. WRT_REG_DWORD(&reg->hccr, HCCRX_CLR_RISC_RESET);
  874. RD_REG_DWORD(&reg->hccr);
  875. d2 = (uint32_t) RD_REG_WORD(&reg->mailbox0);
  876. for (cnt = 6000000 ; cnt && d2; cnt--) {
  877. udelay(5);
  878. d2 = (uint32_t) RD_REG_WORD(&reg->mailbox0);
  879. barrier();
  880. }
  881. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  882. if (IS_NOPOLLING_TYPE(ha))
  883. ha->isp_ops->enable_intrs(ha);
  884. }
  885. /**
  886. * qla24xx_reset_chip() - Reset ISP24xx chip.
  887. * @ha: HA context
  888. *
  889. * Returns 0 on success.
  890. */
  891. void
  892. qla24xx_reset_chip(scsi_qla_host_t *vha)
  893. {
  894. struct qla_hw_data *ha = vha->hw;
  895. if (pci_channel_offline(ha->pdev) &&
  896. ha->flags.pci_channel_io_perm_failure) {
  897. return;
  898. }
  899. ha->isp_ops->disable_intrs(ha);
  900. /* Perform RISC reset. */
  901. qla24xx_reset_risc(vha);
  902. }
  903. /**
  904. * qla2x00_chip_diag() - Test chip for proper operation.
  905. * @ha: HA context
  906. *
  907. * Returns 0 on success.
  908. */
  909. int
  910. qla2x00_chip_diag(scsi_qla_host_t *vha)
  911. {
  912. int rval;
  913. struct qla_hw_data *ha = vha->hw;
  914. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  915. unsigned long flags = 0;
  916. uint16_t data;
  917. uint32_t cnt;
  918. uint16_t mb[5];
  919. struct req_que *req = ha->req_q_map[0];
  920. /* Assume a failed state */
  921. rval = QLA_FUNCTION_FAILED;
  922. DEBUG3(printk("scsi(%ld): Testing device at %lx.\n",
  923. vha->host_no, (u_long)&reg->flash_address));
  924. spin_lock_irqsave(&ha->hardware_lock, flags);
  925. /* Reset ISP chip. */
  926. WRT_REG_WORD(&reg->ctrl_status, CSR_ISP_SOFT_RESET);
  927. /*
  928. * We need to have a delay here since the card will not respond while
  929. * in reset causing an MCA on some architectures.
  930. */
  931. udelay(20);
  932. data = qla2x00_debounce_register(&reg->ctrl_status);
  933. for (cnt = 6000000 ; cnt && (data & CSR_ISP_SOFT_RESET); cnt--) {
  934. udelay(5);
  935. data = RD_REG_WORD(&reg->ctrl_status);
  936. barrier();
  937. }
  938. if (!cnt)
  939. goto chip_diag_failed;
  940. DEBUG3(printk("scsi(%ld): Reset register cleared by chip reset\n",
  941. vha->host_no));
  942. /* Reset RISC processor. */
  943. WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
  944. WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
  945. /* Workaround for QLA2312 PCI parity error */
  946. if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
  947. data = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 0));
  948. for (cnt = 6000000; cnt && (data == MBS_BUSY); cnt--) {
  949. udelay(5);
  950. data = RD_MAILBOX_REG(ha, reg, 0);
  951. barrier();
  952. }
  953. } else
  954. udelay(10);
  955. if (!cnt)
  956. goto chip_diag_failed;
  957. /* Check product ID of chip */
  958. DEBUG3(printk("scsi(%ld): Checking product ID of chip\n", vha->host_no));
  959. mb[1] = RD_MAILBOX_REG(ha, reg, 1);
  960. mb[2] = RD_MAILBOX_REG(ha, reg, 2);
  961. mb[3] = RD_MAILBOX_REG(ha, reg, 3);
  962. mb[4] = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 4));
  963. if (mb[1] != PROD_ID_1 || (mb[2] != PROD_ID_2 && mb[2] != PROD_ID_2a) ||
  964. mb[3] != PROD_ID_3) {
  965. qla_printk(KERN_WARNING, ha,
  966. "Wrong product ID = 0x%x,0x%x,0x%x\n", mb[1], mb[2], mb[3]);
  967. goto chip_diag_failed;
  968. }
  969. ha->product_id[0] = mb[1];
  970. ha->product_id[1] = mb[2];
  971. ha->product_id[2] = mb[3];
  972. ha->product_id[3] = mb[4];
  973. /* Adjust fw RISC transfer size */
  974. if (req->length > 1024)
  975. ha->fw_transfer_size = REQUEST_ENTRY_SIZE * 1024;
  976. else
  977. ha->fw_transfer_size = REQUEST_ENTRY_SIZE *
  978. req->length;
  979. if (IS_QLA2200(ha) &&
  980. RD_MAILBOX_REG(ha, reg, 7) == QLA2200A_RISC_ROM_VER) {
  981. /* Limit firmware transfer size with a 2200A */
  982. DEBUG3(printk("scsi(%ld): Found QLA2200A chip.\n",
  983. vha->host_no));
  984. ha->device_type |= DT_ISP2200A;
  985. ha->fw_transfer_size = 128;
  986. }
  987. /* Wrap Incoming Mailboxes Test. */
  988. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  989. DEBUG3(printk("scsi(%ld): Checking mailboxes.\n", vha->host_no));
  990. rval = qla2x00_mbx_reg_test(vha);
  991. if (rval) {
  992. DEBUG(printk("scsi(%ld): Failed mailbox send register test\n",
  993. vha->host_no));
  994. qla_printk(KERN_WARNING, ha,
  995. "Failed mailbox send register test\n");
  996. }
  997. else {
  998. /* Flag a successful rval */
  999. rval = QLA_SUCCESS;
  1000. }
  1001. spin_lock_irqsave(&ha->hardware_lock, flags);
  1002. chip_diag_failed:
  1003. if (rval)
  1004. DEBUG2_3(printk("scsi(%ld): Chip diagnostics **** FAILED "
  1005. "****\n", vha->host_no));
  1006. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  1007. return (rval);
  1008. }
  1009. /**
  1010. * qla24xx_chip_diag() - Test ISP24xx for proper operation.
  1011. * @ha: HA context
  1012. *
  1013. * Returns 0 on success.
  1014. */
  1015. int
  1016. qla24xx_chip_diag(scsi_qla_host_t *vha)
  1017. {
  1018. int rval;
  1019. struct qla_hw_data *ha = vha->hw;
  1020. struct req_que *req = ha->req_q_map[0];
  1021. if (IS_QLA82XX(ha))
  1022. return QLA_SUCCESS;
  1023. ha->fw_transfer_size = REQUEST_ENTRY_SIZE * req->length;
  1024. rval = qla2x00_mbx_reg_test(vha);
  1025. if (rval) {
  1026. DEBUG(printk("scsi(%ld): Failed mailbox send register test\n",
  1027. vha->host_no));
  1028. qla_printk(KERN_WARNING, ha,
  1029. "Failed mailbox send register test\n");
  1030. } else {
  1031. /* Flag a successful rval */
  1032. rval = QLA_SUCCESS;
  1033. }
  1034. return rval;
  1035. }
  1036. void
  1037. qla2x00_alloc_fw_dump(scsi_qla_host_t *vha)
  1038. {
  1039. int rval;
  1040. uint32_t dump_size, fixed_size, mem_size, req_q_size, rsp_q_size,
  1041. eft_size, fce_size, mq_size;
  1042. dma_addr_t tc_dma;
  1043. void *tc;
  1044. struct qla_hw_data *ha = vha->hw;
  1045. struct req_que *req = ha->req_q_map[0];
  1046. struct rsp_que *rsp = ha->rsp_q_map[0];
  1047. if (ha->fw_dump) {
  1048. qla_printk(KERN_WARNING, ha,
  1049. "Firmware dump previously allocated.\n");
  1050. return;
  1051. }
  1052. ha->fw_dumped = 0;
  1053. fixed_size = mem_size = eft_size = fce_size = mq_size = 0;
  1054. if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
  1055. fixed_size = sizeof(struct qla2100_fw_dump);
  1056. } else if (IS_QLA23XX(ha)) {
  1057. fixed_size = offsetof(struct qla2300_fw_dump, data_ram);
  1058. mem_size = (ha->fw_memory_size - 0x11000 + 1) *
  1059. sizeof(uint16_t);
  1060. } else if (IS_FWI2_CAPABLE(ha)) {
  1061. if (IS_QLA81XX(ha))
  1062. fixed_size = offsetof(struct qla81xx_fw_dump, ext_mem);
  1063. else if (IS_QLA25XX(ha))
  1064. fixed_size = offsetof(struct qla25xx_fw_dump, ext_mem);
  1065. else
  1066. fixed_size = offsetof(struct qla24xx_fw_dump, ext_mem);
  1067. mem_size = (ha->fw_memory_size - 0x100000 + 1) *
  1068. sizeof(uint32_t);
  1069. if (ha->mqenable)
  1070. mq_size = sizeof(struct qla2xxx_mq_chain);
  1071. /* Allocate memory for Fibre Channel Event Buffer. */
  1072. if (!IS_QLA25XX(ha) && !IS_QLA81XX(ha))
  1073. goto try_eft;
  1074. tc = dma_alloc_coherent(&ha->pdev->dev, FCE_SIZE, &tc_dma,
  1075. GFP_KERNEL);
  1076. if (!tc) {
  1077. qla_printk(KERN_WARNING, ha, "Unable to allocate "
  1078. "(%d KB) for FCE.\n", FCE_SIZE / 1024);
  1079. goto try_eft;
  1080. }
  1081. memset(tc, 0, FCE_SIZE);
  1082. rval = qla2x00_enable_fce_trace(vha, tc_dma, FCE_NUM_BUFFERS,
  1083. ha->fce_mb, &ha->fce_bufs);
  1084. if (rval) {
  1085. qla_printk(KERN_WARNING, ha, "Unable to initialize "
  1086. "FCE (%d).\n", rval);
  1087. dma_free_coherent(&ha->pdev->dev, FCE_SIZE, tc,
  1088. tc_dma);
  1089. ha->flags.fce_enabled = 0;
  1090. goto try_eft;
  1091. }
  1092. qla_printk(KERN_INFO, ha, "Allocated (%d KB) for FCE...\n",
  1093. FCE_SIZE / 1024);
  1094. fce_size = sizeof(struct qla2xxx_fce_chain) + FCE_SIZE;
  1095. ha->flags.fce_enabled = 1;
  1096. ha->fce_dma = tc_dma;
  1097. ha->fce = tc;
  1098. try_eft:
  1099. /* Allocate memory for Extended Trace Buffer. */
  1100. tc = dma_alloc_coherent(&ha->pdev->dev, EFT_SIZE, &tc_dma,
  1101. GFP_KERNEL);
  1102. if (!tc) {
  1103. qla_printk(KERN_WARNING, ha, "Unable to allocate "
  1104. "(%d KB) for EFT.\n", EFT_SIZE / 1024);
  1105. goto cont_alloc;
  1106. }
  1107. memset(tc, 0, EFT_SIZE);
  1108. rval = qla2x00_enable_eft_trace(vha, tc_dma, EFT_NUM_BUFFERS);
  1109. if (rval) {
  1110. qla_printk(KERN_WARNING, ha, "Unable to initialize "
  1111. "EFT (%d).\n", rval);
  1112. dma_free_coherent(&ha->pdev->dev, EFT_SIZE, tc,
  1113. tc_dma);
  1114. goto cont_alloc;
  1115. }
  1116. qla_printk(KERN_INFO, ha, "Allocated (%d KB) for EFT...\n",
  1117. EFT_SIZE / 1024);
  1118. eft_size = EFT_SIZE;
  1119. ha->eft_dma = tc_dma;
  1120. ha->eft = tc;
  1121. }
  1122. cont_alloc:
  1123. req_q_size = req->length * sizeof(request_t);
  1124. rsp_q_size = rsp->length * sizeof(response_t);
  1125. dump_size = offsetof(struct qla2xxx_fw_dump, isp);
  1126. dump_size += fixed_size + mem_size + req_q_size + rsp_q_size + eft_size;
  1127. ha->chain_offset = dump_size;
  1128. dump_size += mq_size + fce_size;
  1129. ha->fw_dump = vmalloc(dump_size);
  1130. if (!ha->fw_dump) {
  1131. qla_printk(KERN_WARNING, ha, "Unable to allocate (%d KB) for "
  1132. "firmware dump!!!\n", dump_size / 1024);
  1133. if (ha->eft) {
  1134. dma_free_coherent(&ha->pdev->dev, eft_size, ha->eft,
  1135. ha->eft_dma);
  1136. ha->eft = NULL;
  1137. ha->eft_dma = 0;
  1138. }
  1139. return;
  1140. }
  1141. qla_printk(KERN_INFO, ha, "Allocated (%d KB) for firmware dump...\n",
  1142. dump_size / 1024);
  1143. ha->fw_dump_len = dump_size;
  1144. ha->fw_dump->signature[0] = 'Q';
  1145. ha->fw_dump->signature[1] = 'L';
  1146. ha->fw_dump->signature[2] = 'G';
  1147. ha->fw_dump->signature[3] = 'C';
  1148. ha->fw_dump->version = __constant_htonl(1);
  1149. ha->fw_dump->fixed_size = htonl(fixed_size);
  1150. ha->fw_dump->mem_size = htonl(mem_size);
  1151. ha->fw_dump->req_q_size = htonl(req_q_size);
  1152. ha->fw_dump->rsp_q_size = htonl(rsp_q_size);
  1153. ha->fw_dump->eft_size = htonl(eft_size);
  1154. ha->fw_dump->eft_addr_l = htonl(LSD(ha->eft_dma));
  1155. ha->fw_dump->eft_addr_h = htonl(MSD(ha->eft_dma));
  1156. ha->fw_dump->header_size =
  1157. htonl(offsetof(struct qla2xxx_fw_dump, isp));
  1158. }
  1159. static int
  1160. qla81xx_mpi_sync(scsi_qla_host_t *vha)
  1161. {
  1162. #define MPS_MASK 0xe0
  1163. int rval;
  1164. uint16_t dc;
  1165. uint32_t dw;
  1166. struct qla_hw_data *ha = vha->hw;
  1167. if (!IS_QLA81XX(vha->hw))
  1168. return QLA_SUCCESS;
  1169. rval = qla2x00_write_ram_word(vha, 0x7c00, 1);
  1170. if (rval != QLA_SUCCESS) {
  1171. DEBUG2(qla_printk(KERN_WARNING, ha,
  1172. "Sync-MPI: Unable to acquire semaphore.\n"));
  1173. goto done;
  1174. }
  1175. pci_read_config_word(vha->hw->pdev, 0x54, &dc);
  1176. rval = qla2x00_read_ram_word(vha, 0x7a15, &dw);
  1177. if (rval != QLA_SUCCESS) {
  1178. DEBUG2(qla_printk(KERN_WARNING, ha,
  1179. "Sync-MPI: Unable to read sync.\n"));
  1180. goto done_release;
  1181. }
  1182. dc &= MPS_MASK;
  1183. if (dc == (dw & MPS_MASK))
  1184. goto done_release;
  1185. dw &= ~MPS_MASK;
  1186. dw |= dc;
  1187. rval = qla2x00_write_ram_word(vha, 0x7a15, dw);
  1188. if (rval != QLA_SUCCESS) {
  1189. DEBUG2(qla_printk(KERN_WARNING, ha,
  1190. "Sync-MPI: Unable to gain sync.\n"));
  1191. }
  1192. done_release:
  1193. rval = qla2x00_write_ram_word(vha, 0x7c00, 0);
  1194. if (rval != QLA_SUCCESS) {
  1195. DEBUG2(qla_printk(KERN_WARNING, ha,
  1196. "Sync-MPI: Unable to release semaphore.\n"));
  1197. }
  1198. done:
  1199. return rval;
  1200. }
  1201. /**
  1202. * qla2x00_setup_chip() - Load and start RISC firmware.
  1203. * @ha: HA context
  1204. *
  1205. * Returns 0 on success.
  1206. */
  1207. static int
  1208. qla2x00_setup_chip(scsi_qla_host_t *vha)
  1209. {
  1210. int rval;
  1211. uint32_t srisc_address = 0;
  1212. struct qla_hw_data *ha = vha->hw;
  1213. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  1214. unsigned long flags;
  1215. uint16_t fw_major_version;
  1216. if (IS_QLA82XX(ha)) {
  1217. rval = ha->isp_ops->load_risc(vha, &srisc_address);
  1218. if (rval == QLA_SUCCESS)
  1219. goto enable_82xx_npiv;
  1220. }
  1221. if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) {
  1222. /* Disable SRAM, Instruction RAM and GP RAM parity. */
  1223. spin_lock_irqsave(&ha->hardware_lock, flags);
  1224. WRT_REG_WORD(&reg->hccr, (HCCR_ENABLE_PARITY + 0x0));
  1225. RD_REG_WORD(&reg->hccr);
  1226. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  1227. }
  1228. qla81xx_mpi_sync(vha);
  1229. /* Load firmware sequences */
  1230. rval = ha->isp_ops->load_risc(vha, &srisc_address);
  1231. if (rval == QLA_SUCCESS) {
  1232. DEBUG(printk("scsi(%ld): Verifying Checksum of loaded RISC "
  1233. "code.\n", vha->host_no));
  1234. rval = qla2x00_verify_checksum(vha, srisc_address);
  1235. if (rval == QLA_SUCCESS) {
  1236. /* Start firmware execution. */
  1237. DEBUG(printk("scsi(%ld): Checksum OK, start "
  1238. "firmware.\n", vha->host_no));
  1239. rval = qla2x00_execute_fw(vha, srisc_address);
  1240. /* Retrieve firmware information. */
  1241. if (rval == QLA_SUCCESS) {
  1242. enable_82xx_npiv:
  1243. fw_major_version = ha->fw_major_version;
  1244. rval = qla2x00_get_fw_version(vha,
  1245. &ha->fw_major_version,
  1246. &ha->fw_minor_version,
  1247. &ha->fw_subminor_version,
  1248. &ha->fw_attributes, &ha->fw_memory_size,
  1249. ha->mpi_version, &ha->mpi_capabilities,
  1250. ha->phy_version);
  1251. if (rval != QLA_SUCCESS)
  1252. goto failed;
  1253. ha->flags.npiv_supported = 0;
  1254. if (IS_QLA2XXX_MIDTYPE(ha) &&
  1255. (ha->fw_attributes & BIT_2)) {
  1256. ha->flags.npiv_supported = 1;
  1257. if ((!ha->max_npiv_vports) ||
  1258. ((ha->max_npiv_vports + 1) %
  1259. MIN_MULTI_ID_FABRIC))
  1260. ha->max_npiv_vports =
  1261. MIN_MULTI_ID_FABRIC - 1;
  1262. }
  1263. qla2x00_get_resource_cnts(vha, NULL,
  1264. &ha->fw_xcb_count, NULL, NULL,
  1265. &ha->max_npiv_vports, NULL);
  1266. if (!fw_major_version && ql2xallocfwdump) {
  1267. if (!IS_QLA82XX(ha))
  1268. qla2x00_alloc_fw_dump(vha);
  1269. }
  1270. }
  1271. } else {
  1272. DEBUG2(printk(KERN_INFO
  1273. "scsi(%ld): ISP Firmware failed checksum.\n",
  1274. vha->host_no));
  1275. }
  1276. }
  1277. if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) {
  1278. /* Enable proper parity. */
  1279. spin_lock_irqsave(&ha->hardware_lock, flags);
  1280. if (IS_QLA2300(ha))
  1281. /* SRAM parity */
  1282. WRT_REG_WORD(&reg->hccr, HCCR_ENABLE_PARITY + 0x1);
  1283. else
  1284. /* SRAM, Instruction RAM and GP RAM parity */
  1285. WRT_REG_WORD(&reg->hccr, HCCR_ENABLE_PARITY + 0x7);
  1286. RD_REG_WORD(&reg->hccr);
  1287. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  1288. }
  1289. if (rval == QLA_SUCCESS && IS_FAC_REQUIRED(ha)) {
  1290. uint32_t size;
  1291. rval = qla81xx_fac_get_sector_size(vha, &size);
  1292. if (rval == QLA_SUCCESS) {
  1293. ha->flags.fac_supported = 1;
  1294. ha->fdt_block_size = size << 2;
  1295. } else {
  1296. qla_printk(KERN_ERR, ha,
  1297. "Unsupported FAC firmware (%d.%02d.%02d).\n",
  1298. ha->fw_major_version, ha->fw_minor_version,
  1299. ha->fw_subminor_version);
  1300. }
  1301. }
  1302. failed:
  1303. if (rval) {
  1304. DEBUG2_3(printk("scsi(%ld): Setup chip **** FAILED ****.\n",
  1305. vha->host_no));
  1306. }
  1307. return (rval);
  1308. }
  1309. /**
  1310. * qla2x00_init_response_q_entries() - Initializes response queue entries.
  1311. * @ha: HA context
  1312. *
  1313. * Beginning of request ring has initialization control block already built
  1314. * by nvram config routine.
  1315. *
  1316. * Returns 0 on success.
  1317. */
  1318. void
  1319. qla2x00_init_response_q_entries(struct rsp_que *rsp)
  1320. {
  1321. uint16_t cnt;
  1322. response_t *pkt;
  1323. rsp->ring_ptr = rsp->ring;
  1324. rsp->ring_index = 0;
  1325. rsp->status_srb = NULL;
  1326. pkt = rsp->ring_ptr;
  1327. for (cnt = 0; cnt < rsp->length; cnt++) {
  1328. pkt->signature = RESPONSE_PROCESSED;
  1329. pkt++;
  1330. }
  1331. }
  1332. /**
  1333. * qla2x00_update_fw_options() - Read and process firmware options.
  1334. * @ha: HA context
  1335. *
  1336. * Returns 0 on success.
  1337. */
  1338. void
  1339. qla2x00_update_fw_options(scsi_qla_host_t *vha)
  1340. {
  1341. uint16_t swing, emphasis, tx_sens, rx_sens;
  1342. struct qla_hw_data *ha = vha->hw;
  1343. memset(ha->fw_options, 0, sizeof(ha->fw_options));
  1344. qla2x00_get_fw_options(vha, ha->fw_options);
  1345. if (IS_QLA2100(ha) || IS_QLA2200(ha))
  1346. return;
  1347. /* Serial Link options. */
  1348. DEBUG3(printk("scsi(%ld): Serial link options:\n",
  1349. vha->host_no));
  1350. DEBUG3(qla2x00_dump_buffer((uint8_t *)&ha->fw_seriallink_options,
  1351. sizeof(ha->fw_seriallink_options)));
  1352. ha->fw_options[1] &= ~FO1_SET_EMPHASIS_SWING;
  1353. if (ha->fw_seriallink_options[3] & BIT_2) {
  1354. ha->fw_options[1] |= FO1_SET_EMPHASIS_SWING;
  1355. /* 1G settings */
  1356. swing = ha->fw_seriallink_options[2] & (BIT_2 | BIT_1 | BIT_0);
  1357. emphasis = (ha->fw_seriallink_options[2] &
  1358. (BIT_4 | BIT_3)) >> 3;
  1359. tx_sens = ha->fw_seriallink_options[0] &
  1360. (BIT_3 | BIT_2 | BIT_1 | BIT_0);
  1361. rx_sens = (ha->fw_seriallink_options[0] &
  1362. (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4;
  1363. ha->fw_options[10] = (emphasis << 14) | (swing << 8);
  1364. if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
  1365. if (rx_sens == 0x0)
  1366. rx_sens = 0x3;
  1367. ha->fw_options[10] |= (tx_sens << 4) | rx_sens;
  1368. } else if (IS_QLA2322(ha) || IS_QLA6322(ha))
  1369. ha->fw_options[10] |= BIT_5 |
  1370. ((rx_sens & (BIT_1 | BIT_0)) << 2) |
  1371. (tx_sens & (BIT_1 | BIT_0));
  1372. /* 2G settings */
  1373. swing = (ha->fw_seriallink_options[2] &
  1374. (BIT_7 | BIT_6 | BIT_5)) >> 5;
  1375. emphasis = ha->fw_seriallink_options[3] & (BIT_1 | BIT_0);
  1376. tx_sens = ha->fw_seriallink_options[1] &
  1377. (BIT_3 | BIT_2 | BIT_1 | BIT_0);
  1378. rx_sens = (ha->fw_seriallink_options[1] &
  1379. (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4;
  1380. ha->fw_options[11] = (emphasis << 14) | (swing << 8);
  1381. if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
  1382. if (rx_sens == 0x0)
  1383. rx_sens = 0x3;
  1384. ha->fw_options[11] |= (tx_sens << 4) | rx_sens;
  1385. } else if (IS_QLA2322(ha) || IS_QLA6322(ha))
  1386. ha->fw_options[11] |= BIT_5 |
  1387. ((rx_sens & (BIT_1 | BIT_0)) << 2) |
  1388. (tx_sens & (BIT_1 | BIT_0));
  1389. }
  1390. /* FCP2 options. */
  1391. /* Return command IOCBs without waiting for an ABTS to complete. */
  1392. ha->fw_options[3] |= BIT_13;
  1393. /* LED scheme. */
  1394. if (ha->flags.enable_led_scheme)
  1395. ha->fw_options[2] |= BIT_12;
  1396. /* Detect ISP6312. */
  1397. if (IS_QLA6312(ha))
  1398. ha->fw_options[2] |= BIT_13;
  1399. /* Update firmware options. */
  1400. qla2x00_set_fw_options(vha, ha->fw_options);
  1401. }
  1402. void
  1403. qla24xx_update_fw_options(scsi_qla_host_t *vha)
  1404. {
  1405. int rval;
  1406. struct qla_hw_data *ha = vha->hw;
  1407. if (IS_QLA82XX(ha))
  1408. return;
  1409. /* Update Serial Link options. */
  1410. if ((le16_to_cpu(ha->fw_seriallink_options24[0]) & BIT_0) == 0)
  1411. return;
  1412. rval = qla2x00_set_serdes_params(vha,
  1413. le16_to_cpu(ha->fw_seriallink_options24[1]),
  1414. le16_to_cpu(ha->fw_seriallink_options24[2]),
  1415. le16_to_cpu(ha->fw_seriallink_options24[3]));
  1416. if (rval != QLA_SUCCESS) {
  1417. qla_printk(KERN_WARNING, ha,
  1418. "Unable to update Serial Link options (%x).\n", rval);
  1419. }
  1420. }
  1421. void
  1422. qla2x00_config_rings(struct scsi_qla_host *vha)
  1423. {
  1424. struct qla_hw_data *ha = vha->hw;
  1425. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  1426. struct req_que *req = ha->req_q_map[0];
  1427. struct rsp_que *rsp = ha->rsp_q_map[0];
  1428. /* Setup ring parameters in initialization control block. */
  1429. ha->init_cb->request_q_outpointer = __constant_cpu_to_le16(0);
  1430. ha->init_cb->response_q_inpointer = __constant_cpu_to_le16(0);
  1431. ha->init_cb->request_q_length = cpu_to_le16(req->length);
  1432. ha->init_cb->response_q_length = cpu_to_le16(rsp->length);
  1433. ha->init_cb->request_q_address[0] = cpu_to_le32(LSD(req->dma));
  1434. ha->init_cb->request_q_address[1] = cpu_to_le32(MSD(req->dma));
  1435. ha->init_cb->response_q_address[0] = cpu_to_le32(LSD(rsp->dma));
  1436. ha->init_cb->response_q_address[1] = cpu_to_le32(MSD(rsp->dma));
  1437. WRT_REG_WORD(ISP_REQ_Q_IN(ha, reg), 0);
  1438. WRT_REG_WORD(ISP_REQ_Q_OUT(ha, reg), 0);
  1439. WRT_REG_WORD(ISP_RSP_Q_IN(ha, reg), 0);
  1440. WRT_REG_WORD(ISP_RSP_Q_OUT(ha, reg), 0);
  1441. RD_REG_WORD(ISP_RSP_Q_OUT(ha, reg)); /* PCI Posting. */
  1442. }
  1443. void
  1444. qla24xx_config_rings(struct scsi_qla_host *vha)
  1445. {
  1446. struct qla_hw_data *ha = vha->hw;
  1447. device_reg_t __iomem *reg = ISP_QUE_REG(ha, 0);
  1448. struct device_reg_2xxx __iomem *ioreg = &ha->iobase->isp;
  1449. struct qla_msix_entry *msix;
  1450. struct init_cb_24xx *icb;
  1451. uint16_t rid = 0;
  1452. struct req_que *req = ha->req_q_map[0];
  1453. struct rsp_que *rsp = ha->rsp_q_map[0];
  1454. /* Setup ring parameters in initialization control block. */
  1455. icb = (struct init_cb_24xx *)ha->init_cb;
  1456. icb->request_q_outpointer = __constant_cpu_to_le16(0);
  1457. icb->response_q_inpointer = __constant_cpu_to_le16(0);
  1458. icb->request_q_length = cpu_to_le16(req->length);
  1459. icb->response_q_length = cpu_to_le16(rsp->length);
  1460. icb->request_q_address[0] = cpu_to_le32(LSD(req->dma));
  1461. icb->request_q_address[1] = cpu_to_le32(MSD(req->dma));
  1462. icb->response_q_address[0] = cpu_to_le32(LSD(rsp->dma));
  1463. icb->response_q_address[1] = cpu_to_le32(MSD(rsp->dma));
  1464. if (ha->mqenable) {
  1465. icb->qos = __constant_cpu_to_le16(QLA_DEFAULT_QUE_QOS);
  1466. icb->rid = __constant_cpu_to_le16(rid);
  1467. if (ha->flags.msix_enabled) {
  1468. msix = &ha->msix_entries[1];
  1469. DEBUG2_17(printk(KERN_INFO
  1470. "Registering vector 0x%x for base que\n", msix->entry));
  1471. icb->msix = cpu_to_le16(msix->entry);
  1472. }
  1473. /* Use alternate PCI bus number */
  1474. if (MSB(rid))
  1475. icb->firmware_options_2 |=
  1476. __constant_cpu_to_le32(BIT_19);
  1477. /* Use alternate PCI devfn */
  1478. if (LSB(rid))
  1479. icb->firmware_options_2 |=
  1480. __constant_cpu_to_le32(BIT_18);
  1481. /* Use Disable MSIX Handshake mode for capable adapters */
  1482. if (IS_MSIX_NACK_CAPABLE(ha)) {
  1483. icb->firmware_options_2 &=
  1484. __constant_cpu_to_le32(~BIT_22);
  1485. ha->flags.disable_msix_handshake = 1;
  1486. qla_printk(KERN_INFO, ha,
  1487. "MSIX Handshake Disable Mode turned on\n");
  1488. } else {
  1489. icb->firmware_options_2 |=
  1490. __constant_cpu_to_le32(BIT_22);
  1491. }
  1492. icb->firmware_options_2 |= __constant_cpu_to_le32(BIT_23);
  1493. WRT_REG_DWORD(&reg->isp25mq.req_q_in, 0);
  1494. WRT_REG_DWORD(&reg->isp25mq.req_q_out, 0);
  1495. WRT_REG_DWORD(&reg->isp25mq.rsp_q_in, 0);
  1496. WRT_REG_DWORD(&reg->isp25mq.rsp_q_out, 0);
  1497. } else {
  1498. WRT_REG_DWORD(&reg->isp24.req_q_in, 0);
  1499. WRT_REG_DWORD(&reg->isp24.req_q_out, 0);
  1500. WRT_REG_DWORD(&reg->isp24.rsp_q_in, 0);
  1501. WRT_REG_DWORD(&reg->isp24.rsp_q_out, 0);
  1502. }
  1503. /* PCI posting */
  1504. RD_REG_DWORD(&ioreg->hccr);
  1505. }
  1506. /**
  1507. * qla2x00_init_rings() - Initializes firmware.
  1508. * @ha: HA context
  1509. *
  1510. * Beginning of request ring has initialization control block already built
  1511. * by nvram config routine.
  1512. *
  1513. * Returns 0 on success.
  1514. */
  1515. static int
  1516. qla2x00_init_rings(scsi_qla_host_t *vha)
  1517. {
  1518. int rval;
  1519. unsigned long flags = 0;
  1520. int cnt, que;
  1521. struct qla_hw_data *ha = vha->hw;
  1522. struct req_que *req;
  1523. struct rsp_que *rsp;
  1524. struct scsi_qla_host *vp;
  1525. struct mid_init_cb_24xx *mid_init_cb =
  1526. (struct mid_init_cb_24xx *) ha->init_cb;
  1527. spin_lock_irqsave(&ha->hardware_lock, flags);
  1528. /* Clear outstanding commands array. */
  1529. for (que = 0; que < ha->max_req_queues; que++) {
  1530. req = ha->req_q_map[que];
  1531. if (!req)
  1532. continue;
  1533. for (cnt = 1; cnt < MAX_OUTSTANDING_COMMANDS; cnt++)
  1534. req->outstanding_cmds[cnt] = NULL;
  1535. req->current_outstanding_cmd = 1;
  1536. /* Initialize firmware. */
  1537. req->ring_ptr = req->ring;
  1538. req->ring_index = 0;
  1539. req->cnt = req->length;
  1540. }
  1541. for (que = 0; que < ha->max_rsp_queues; que++) {
  1542. rsp = ha->rsp_q_map[que];
  1543. if (!rsp)
  1544. continue;
  1545. /* Initialize response queue entries */
  1546. qla2x00_init_response_q_entries(rsp);
  1547. }
  1548. /* Clear RSCN queue. */
  1549. list_for_each_entry(vp, &ha->vp_list, list) {
  1550. vp->rscn_in_ptr = 0;
  1551. vp->rscn_out_ptr = 0;
  1552. }
  1553. ha->isp_ops->config_rings(vha);
  1554. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  1555. /* Update any ISP specific firmware options before initialization. */
  1556. ha->isp_ops->update_fw_options(vha);
  1557. DEBUG(printk("scsi(%ld): Issue init firmware.\n", vha->host_no));
  1558. if (ha->flags.npiv_supported) {
  1559. if (ha->operating_mode == LOOP)
  1560. ha->max_npiv_vports = MIN_MULTI_ID_FABRIC - 1;
  1561. mid_init_cb->count = cpu_to_le16(ha->max_npiv_vports);
  1562. }
  1563. if (IS_FWI2_CAPABLE(ha)) {
  1564. mid_init_cb->options = __constant_cpu_to_le16(BIT_1);
  1565. mid_init_cb->init_cb.execution_throttle =
  1566. cpu_to_le16(ha->fw_xcb_count);
  1567. }
  1568. rval = qla2x00_init_firmware(vha, ha->init_cb_size);
  1569. if (rval) {
  1570. DEBUG2_3(printk("scsi(%ld): Init firmware **** FAILED ****.\n",
  1571. vha->host_no));
  1572. } else {
  1573. DEBUG3(printk("scsi(%ld): Init firmware -- success.\n",
  1574. vha->host_no));
  1575. }
  1576. return (rval);
  1577. }
  1578. /**
  1579. * qla2x00_fw_ready() - Waits for firmware ready.
  1580. * @ha: HA context
  1581. *
  1582. * Returns 0 on success.
  1583. */
  1584. static int
  1585. qla2x00_fw_ready(scsi_qla_host_t *vha)
  1586. {
  1587. int rval;
  1588. unsigned long wtime, mtime, cs84xx_time;
  1589. uint16_t min_wait; /* Minimum wait time if loop is down */
  1590. uint16_t wait_time; /* Wait time if loop is coming ready */
  1591. uint16_t state[5];
  1592. struct qla_hw_data *ha = vha->hw;
  1593. rval = QLA_SUCCESS;
  1594. /* 20 seconds for loop down. */
  1595. min_wait = 20;
  1596. /*
  1597. * Firmware should take at most one RATOV to login, plus 5 seconds for
  1598. * our own processing.
  1599. */
  1600. if ((wait_time = (ha->retry_count*ha->login_timeout) + 5) < min_wait) {
  1601. wait_time = min_wait;
  1602. }
  1603. /* Min wait time if loop down */
  1604. mtime = jiffies + (min_wait * HZ);
  1605. /* wait time before firmware ready */
  1606. wtime = jiffies + (wait_time * HZ);
  1607. /* Wait for ISP to finish LIP */
  1608. if (!vha->flags.init_done)
  1609. qla_printk(KERN_INFO, ha, "Waiting for LIP to complete...\n");
  1610. DEBUG3(printk("scsi(%ld): Waiting for LIP to complete...\n",
  1611. vha->host_no));
  1612. do {
  1613. rval = qla2x00_get_firmware_state(vha, state);
  1614. if (rval == QLA_SUCCESS) {
  1615. if (state[0] < FSTATE_LOSS_OF_SYNC) {
  1616. vha->device_flags &= ~DFLG_NO_CABLE;
  1617. }
  1618. if (IS_QLA84XX(ha) && state[0] != FSTATE_READY) {
  1619. DEBUG16(printk("scsi(%ld): fw_state=%x "
  1620. "84xx=%x.\n", vha->host_no, state[0],
  1621. state[2]));
  1622. if ((state[2] & FSTATE_LOGGED_IN) &&
  1623. (state[2] & FSTATE_WAITING_FOR_VERIFY)) {
  1624. DEBUG16(printk("scsi(%ld): Sending "
  1625. "verify iocb.\n", vha->host_no));
  1626. cs84xx_time = jiffies;
  1627. rval = qla84xx_init_chip(vha);
  1628. if (rval != QLA_SUCCESS)
  1629. break;
  1630. /* Add time taken to initialize. */
  1631. cs84xx_time = jiffies - cs84xx_time;
  1632. wtime += cs84xx_time;
  1633. mtime += cs84xx_time;
  1634. DEBUG16(printk("scsi(%ld): Increasing "
  1635. "wait time by %ld. New time %ld\n",
  1636. vha->host_no, cs84xx_time, wtime));
  1637. }
  1638. } else if (state[0] == FSTATE_READY) {
  1639. DEBUG(printk("scsi(%ld): F/W Ready - OK \n",
  1640. vha->host_no));
  1641. qla2x00_get_retry_cnt(vha, &ha->retry_count,
  1642. &ha->login_timeout, &ha->r_a_tov);
  1643. rval = QLA_SUCCESS;
  1644. break;
  1645. }
  1646. rval = QLA_FUNCTION_FAILED;
  1647. if (atomic_read(&vha->loop_down_timer) &&
  1648. state[0] != FSTATE_READY) {
  1649. /* Loop down. Timeout on min_wait for states
  1650. * other than Wait for Login.
  1651. */
  1652. if (time_after_eq(jiffies, mtime)) {
  1653. qla_printk(KERN_INFO, ha,
  1654. "Cable is unplugged...\n");
  1655. vha->device_flags |= DFLG_NO_CABLE;
  1656. break;
  1657. }
  1658. }
  1659. } else {
  1660. /* Mailbox cmd failed. Timeout on min_wait. */
  1661. if (time_after_eq(jiffies, mtime))
  1662. break;
  1663. }
  1664. if (time_after_eq(jiffies, wtime))
  1665. break;
  1666. /* Delay for a while */
  1667. msleep(500);
  1668. DEBUG3(printk("scsi(%ld): fw_state=%x curr time=%lx.\n",
  1669. vha->host_no, state[0], jiffies));
  1670. } while (1);
  1671. DEBUG(printk("scsi(%ld): fw_state=%x (%x, %x, %x, %x) curr time=%lx.\n",
  1672. vha->host_no, state[0], state[1], state[2], state[3], state[4],
  1673. jiffies));
  1674. if (rval) {
  1675. DEBUG2_3(printk("scsi(%ld): Firmware ready **** FAILED ****.\n",
  1676. vha->host_no));
  1677. }
  1678. return (rval);
  1679. }
  1680. /*
  1681. * qla2x00_configure_hba
  1682. * Setup adapter context.
  1683. *
  1684. * Input:
  1685. * ha = adapter state pointer.
  1686. *
  1687. * Returns:
  1688. * 0 = success
  1689. *
  1690. * Context:
  1691. * Kernel context.
  1692. */
  1693. static int
  1694. qla2x00_configure_hba(scsi_qla_host_t *vha)
  1695. {
  1696. int rval;
  1697. uint16_t loop_id;
  1698. uint16_t topo;
  1699. uint16_t sw_cap;
  1700. uint8_t al_pa;
  1701. uint8_t area;
  1702. uint8_t domain;
  1703. char connect_type[22];
  1704. struct qla_hw_data *ha = vha->hw;
  1705. /* Get host addresses. */
  1706. rval = qla2x00_get_adapter_id(vha,
  1707. &loop_id, &al_pa, &area, &domain, &topo, &sw_cap);
  1708. if (rval != QLA_SUCCESS) {
  1709. if (LOOP_TRANSITION(vha) || atomic_read(&ha->loop_down_timer) ||
  1710. (rval == QLA_COMMAND_ERROR && loop_id == 0x7)) {
  1711. DEBUG2(printk("%s(%ld) Loop is in a transition state\n",
  1712. __func__, vha->host_no));
  1713. } else {
  1714. qla_printk(KERN_WARNING, ha,
  1715. "ERROR -- Unable to get host loop ID.\n");
  1716. set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
  1717. }
  1718. return (rval);
  1719. }
  1720. if (topo == 4) {
  1721. qla_printk(KERN_INFO, ha,
  1722. "Cannot get topology - retrying.\n");
  1723. return (QLA_FUNCTION_FAILED);
  1724. }
  1725. vha->loop_id = loop_id;
  1726. /* initialize */
  1727. ha->min_external_loopid = SNS_FIRST_LOOP_ID;
  1728. ha->operating_mode = LOOP;
  1729. ha->switch_cap = 0;
  1730. switch (topo) {
  1731. case 0:
  1732. DEBUG3(printk("scsi(%ld): HBA in NL topology.\n",
  1733. vha->host_no));
  1734. ha->current_topology = ISP_CFG_NL;
  1735. strcpy(connect_type, "(Loop)");
  1736. break;
  1737. case 1:
  1738. DEBUG3(printk("scsi(%ld): HBA in FL topology.\n",
  1739. vha->host_no));
  1740. ha->switch_cap = sw_cap;
  1741. ha->current_topology = ISP_CFG_FL;
  1742. strcpy(connect_type, "(FL_Port)");
  1743. break;
  1744. case 2:
  1745. DEBUG3(printk("scsi(%ld): HBA in N P2P topology.\n",
  1746. vha->host_no));
  1747. ha->operating_mode = P2P;
  1748. ha->current_topology = ISP_CFG_N;
  1749. strcpy(connect_type, "(N_Port-to-N_Port)");
  1750. break;
  1751. case 3:
  1752. DEBUG3(printk("scsi(%ld): HBA in F P2P topology.\n",
  1753. vha->host_no));
  1754. ha->switch_cap = sw_cap;
  1755. ha->operating_mode = P2P;
  1756. ha->current_topology = ISP_CFG_F;
  1757. strcpy(connect_type, "(F_Port)");
  1758. break;
  1759. default:
  1760. DEBUG3(printk("scsi(%ld): HBA in unknown topology %x. "
  1761. "Using NL.\n",
  1762. vha->host_no, topo));
  1763. ha->current_topology = ISP_CFG_NL;
  1764. strcpy(connect_type, "(Loop)");
  1765. break;
  1766. }
  1767. /* Save Host port and loop ID. */
  1768. /* byte order - Big Endian */
  1769. vha->d_id.b.domain = domain;
  1770. vha->d_id.b.area = area;
  1771. vha->d_id.b.al_pa = al_pa;
  1772. if (!vha->flags.init_done)
  1773. qla_printk(KERN_INFO, ha,
  1774. "Topology - %s, Host Loop address 0x%x\n",
  1775. connect_type, vha->loop_id);
  1776. if (rval) {
  1777. DEBUG2_3(printk("scsi(%ld): FAILED.\n", vha->host_no));
  1778. } else {
  1779. DEBUG3(printk("scsi(%ld): exiting normally.\n", vha->host_no));
  1780. }
  1781. return(rval);
  1782. }
  1783. inline void
  1784. qla2x00_set_model_info(scsi_qla_host_t *vha, uint8_t *model, size_t len,
  1785. char *def)
  1786. {
  1787. char *st, *en;
  1788. uint16_t index;
  1789. struct qla_hw_data *ha = vha->hw;
  1790. int use_tbl = !IS_QLA24XX_TYPE(ha) && !IS_QLA25XX(ha) &&
  1791. !IS_QLA8XXX_TYPE(ha);
  1792. if (memcmp(model, BINZERO, len) != 0) {
  1793. strncpy(ha->model_number, model, len);
  1794. st = en = ha->model_number;
  1795. en += len - 1;
  1796. while (en > st) {
  1797. if (*en != 0x20 && *en != 0x00)
  1798. break;
  1799. *en-- = '\0';
  1800. }
  1801. index = (ha->pdev->subsystem_device & 0xff);
  1802. if (use_tbl &&
  1803. ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC &&
  1804. index < QLA_MODEL_NAMES)
  1805. strncpy(ha->model_desc,
  1806. qla2x00_model_name[index * 2 + 1],
  1807. sizeof(ha->model_desc) - 1);
  1808. } else {
  1809. index = (ha->pdev->subsystem_device & 0xff);
  1810. if (use_tbl &&
  1811. ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC &&
  1812. index < QLA_MODEL_NAMES) {
  1813. strcpy(ha->model_number,
  1814. qla2x00_model_name[index * 2]);
  1815. strncpy(ha->model_desc,
  1816. qla2x00_model_name[index * 2 + 1],
  1817. sizeof(ha->model_desc) - 1);
  1818. } else {
  1819. strcpy(ha->model_number, def);
  1820. }
  1821. }
  1822. if (IS_FWI2_CAPABLE(ha))
  1823. qla2xxx_get_vpd_field(vha, "\x82", ha->model_desc,
  1824. sizeof(ha->model_desc));
  1825. }
  1826. /* On sparc systems, obtain port and node WWN from firmware
  1827. * properties.
  1828. */
  1829. static void qla2xxx_nvram_wwn_from_ofw(scsi_qla_host_t *vha, nvram_t *nv)
  1830. {
  1831. #ifdef CONFIG_SPARC
  1832. struct qla_hw_data *ha = vha->hw;
  1833. struct pci_dev *pdev = ha->pdev;
  1834. struct device_node *dp = pci_device_to_OF_node(pdev);
  1835. const u8 *val;
  1836. int len;
  1837. val = of_get_property(dp, "port-wwn", &len);
  1838. if (val && len >= WWN_SIZE)
  1839. memcpy(nv->port_name, val, WWN_SIZE);
  1840. val = of_get_property(dp, "node-wwn", &len);
  1841. if (val && len >= WWN_SIZE)
  1842. memcpy(nv->node_name, val, WWN_SIZE);
  1843. #endif
  1844. }
  1845. /*
  1846. * NVRAM configuration for ISP 2xxx
  1847. *
  1848. * Input:
  1849. * ha = adapter block pointer.
  1850. *
  1851. * Output:
  1852. * initialization control block in response_ring
  1853. * host adapters parameters in host adapter block
  1854. *
  1855. * Returns:
  1856. * 0 = success.
  1857. */
  1858. int
  1859. qla2x00_nvram_config(scsi_qla_host_t *vha)
  1860. {
  1861. int rval;
  1862. uint8_t chksum = 0;
  1863. uint16_t cnt;
  1864. uint8_t *dptr1, *dptr2;
  1865. struct qla_hw_data *ha = vha->hw;
  1866. init_cb_t *icb = ha->init_cb;
  1867. nvram_t *nv = ha->nvram;
  1868. uint8_t *ptr = ha->nvram;
  1869. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  1870. rval = QLA_SUCCESS;
  1871. /* Determine NVRAM starting address. */
  1872. ha->nvram_size = sizeof(nvram_t);
  1873. ha->nvram_base = 0;
  1874. if (!IS_QLA2100(ha) && !IS_QLA2200(ha) && !IS_QLA2300(ha))
  1875. if ((RD_REG_WORD(&reg->ctrl_status) >> 14) == 1)
  1876. ha->nvram_base = 0x80;
  1877. /* Get NVRAM data and calculate checksum. */
  1878. ha->isp_ops->read_nvram(vha, ptr, ha->nvram_base, ha->nvram_size);
  1879. for (cnt = 0, chksum = 0; cnt < ha->nvram_size; cnt++)
  1880. chksum += *ptr++;
  1881. DEBUG5(printk("scsi(%ld): Contents of NVRAM\n", vha->host_no));
  1882. DEBUG5(qla2x00_dump_buffer((uint8_t *)nv, ha->nvram_size));
  1883. /* Bad NVRAM data, set defaults parameters. */
  1884. if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' ||
  1885. nv->id[2] != 'P' || nv->id[3] != ' ' || nv->nvram_version < 1) {
  1886. /* Reset NVRAM data. */
  1887. qla_printk(KERN_WARNING, ha, "Inconsistent NVRAM detected: "
  1888. "checksum=0x%x id=%c version=0x%x.\n", chksum, nv->id[0],
  1889. nv->nvram_version);
  1890. qla_printk(KERN_WARNING, ha, "Falling back to functioning (yet "
  1891. "invalid -- WWPN) defaults.\n");
  1892. /*
  1893. * Set default initialization control block.
  1894. */
  1895. memset(nv, 0, ha->nvram_size);
  1896. nv->parameter_block_version = ICB_VERSION;
  1897. if (IS_QLA23XX(ha)) {
  1898. nv->firmware_options[0] = BIT_2 | BIT_1;
  1899. nv->firmware_options[1] = BIT_7 | BIT_5;
  1900. nv->add_firmware_options[0] = BIT_5;
  1901. nv->add_firmware_options[1] = BIT_5 | BIT_4;
  1902. nv->frame_payload_size = __constant_cpu_to_le16(2048);
  1903. nv->special_options[1] = BIT_7;
  1904. } else if (IS_QLA2200(ha)) {
  1905. nv->firmware_options[0] = BIT_2 | BIT_1;
  1906. nv->firmware_options[1] = BIT_7 | BIT_5;
  1907. nv->add_firmware_options[0] = BIT_5;
  1908. nv->add_firmware_options[1] = BIT_5 | BIT_4;
  1909. nv->frame_payload_size = __constant_cpu_to_le16(1024);
  1910. } else if (IS_QLA2100(ha)) {
  1911. nv->firmware_options[0] = BIT_3 | BIT_1;
  1912. nv->firmware_options[1] = BIT_5;
  1913. nv->frame_payload_size = __constant_cpu_to_le16(1024);
  1914. }
  1915. nv->max_iocb_allocation = __constant_cpu_to_le16(256);
  1916. nv->execution_throttle = __constant_cpu_to_le16(16);
  1917. nv->retry_count = 8;
  1918. nv->retry_delay = 1;
  1919. nv->port_name[0] = 33;
  1920. nv->port_name[3] = 224;
  1921. nv->port_name[4] = 139;
  1922. qla2xxx_nvram_wwn_from_ofw(vha, nv);
  1923. nv->login_timeout = 4;
  1924. /*
  1925. * Set default host adapter parameters
  1926. */
  1927. nv->host_p[1] = BIT_2;
  1928. nv->reset_delay = 5;
  1929. nv->port_down_retry_count = 8;
  1930. nv->max_luns_per_target = __constant_cpu_to_le16(8);
  1931. nv->link_down_timeout = 60;
  1932. rval = 1;
  1933. }
  1934. #if defined(CONFIG_IA64_GENERIC) || defined(CONFIG_IA64_SGI_SN2)
  1935. /*
  1936. * The SN2 does not provide BIOS emulation which means you can't change
  1937. * potentially bogus BIOS settings. Force the use of default settings
  1938. * for link rate and frame size. Hope that the rest of the settings
  1939. * are valid.
  1940. */
  1941. if (ia64_platform_is("sn2")) {
  1942. nv->frame_payload_size = __constant_cpu_to_le16(2048);
  1943. if (IS_QLA23XX(ha))
  1944. nv->special_options[1] = BIT_7;
  1945. }
  1946. #endif
  1947. /* Reset Initialization control block */
  1948. memset(icb, 0, ha->init_cb_size);
  1949. /*
  1950. * Setup driver NVRAM options.
  1951. */
  1952. nv->firmware_options[0] |= (BIT_6 | BIT_1);
  1953. nv->firmware_options[0] &= ~(BIT_5 | BIT_4);
  1954. nv->firmware_options[1] |= (BIT_5 | BIT_0);
  1955. nv->firmware_options[1] &= ~BIT_4;
  1956. if (IS_QLA23XX(ha)) {
  1957. nv->firmware_options[0] |= BIT_2;
  1958. nv->firmware_options[0] &= ~BIT_3;
  1959. nv->firmware_options[0] &= ~BIT_6;
  1960. nv->add_firmware_options[1] |= BIT_5 | BIT_4;
  1961. if (IS_QLA2300(ha)) {
  1962. if (ha->fb_rev == FPM_2310) {
  1963. strcpy(ha->model_number, "QLA2310");
  1964. } else {
  1965. strcpy(ha->model_number, "QLA2300");
  1966. }
  1967. } else {
  1968. qla2x00_set_model_info(vha, nv->model_number,
  1969. sizeof(nv->model_number), "QLA23xx");
  1970. }
  1971. } else if (IS_QLA2200(ha)) {
  1972. nv->firmware_options[0] |= BIT_2;
  1973. /*
  1974. * 'Point-to-point preferred, else loop' is not a safe
  1975. * connection mode setting.
  1976. */
  1977. if ((nv->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) ==
  1978. (BIT_5 | BIT_4)) {
  1979. /* Force 'loop preferred, else point-to-point'. */
  1980. nv->add_firmware_options[0] &= ~(BIT_6 | BIT_5 | BIT_4);
  1981. nv->add_firmware_options[0] |= BIT_5;
  1982. }
  1983. strcpy(ha->model_number, "QLA22xx");
  1984. } else /*if (IS_QLA2100(ha))*/ {
  1985. strcpy(ha->model_number, "QLA2100");
  1986. }
  1987. /*
  1988. * Copy over NVRAM RISC parameter block to initialization control block.
  1989. */
  1990. dptr1 = (uint8_t *)icb;
  1991. dptr2 = (uint8_t *)&nv->parameter_block_version;
  1992. cnt = (uint8_t *)&icb->request_q_outpointer - (uint8_t *)&icb->version;
  1993. while (cnt--)
  1994. *dptr1++ = *dptr2++;
  1995. /* Copy 2nd half. */
  1996. dptr1 = (uint8_t *)icb->add_firmware_options;
  1997. cnt = (uint8_t *)icb->reserved_3 - (uint8_t *)icb->add_firmware_options;
  1998. while (cnt--)
  1999. *dptr1++ = *dptr2++;
  2000. /* Use alternate WWN? */
  2001. if (nv->host_p[1] & BIT_7) {
  2002. memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
  2003. memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
  2004. }
  2005. /* Prepare nodename */
  2006. if ((icb->firmware_options[1] & BIT_6) == 0) {
  2007. /*
  2008. * Firmware will apply the following mask if the nodename was
  2009. * not provided.
  2010. */
  2011. memcpy(icb->node_name, icb->port_name, WWN_SIZE);
  2012. icb->node_name[0] &= 0xF0;
  2013. }
  2014. /*
  2015. * Set host adapter parameters.
  2016. */
  2017. if (nv->host_p[0] & BIT_7)
  2018. ql2xextended_error_logging = 1;
  2019. ha->flags.disable_risc_code_load = ((nv->host_p[0] & BIT_4) ? 1 : 0);
  2020. /* Always load RISC code on non ISP2[12]00 chips. */
  2021. if (!IS_QLA2100(ha) && !IS_QLA2200(ha))
  2022. ha->flags.disable_risc_code_load = 0;
  2023. ha->flags.enable_lip_reset = ((nv->host_p[1] & BIT_1) ? 1 : 0);
  2024. ha->flags.enable_lip_full_login = ((nv->host_p[1] & BIT_2) ? 1 : 0);
  2025. ha->flags.enable_target_reset = ((nv->host_p[1] & BIT_3) ? 1 : 0);
  2026. ha->flags.enable_led_scheme = (nv->special_options[1] & BIT_4) ? 1 : 0;
  2027. ha->flags.disable_serdes = 0;
  2028. ha->operating_mode =
  2029. (icb->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) >> 4;
  2030. memcpy(ha->fw_seriallink_options, nv->seriallink_options,
  2031. sizeof(ha->fw_seriallink_options));
  2032. /* save HBA serial number */
  2033. ha->serial0 = icb->port_name[5];
  2034. ha->serial1 = icb->port_name[6];
  2035. ha->serial2 = icb->port_name[7];
  2036. memcpy(vha->node_name, icb->node_name, WWN_SIZE);
  2037. memcpy(vha->port_name, icb->port_name, WWN_SIZE);
  2038. icb->execution_throttle = __constant_cpu_to_le16(0xFFFF);
  2039. ha->retry_count = nv->retry_count;
  2040. /* Set minimum login_timeout to 4 seconds. */
  2041. if (nv->login_timeout < ql2xlogintimeout)
  2042. nv->login_timeout = ql2xlogintimeout;
  2043. if (nv->login_timeout < 4)
  2044. nv->login_timeout = 4;
  2045. ha->login_timeout = nv->login_timeout;
  2046. icb->login_timeout = nv->login_timeout;
  2047. /* Set minimum RATOV to 100 tenths of a second. */
  2048. ha->r_a_tov = 100;
  2049. ha->loop_reset_delay = nv->reset_delay;
  2050. /* Link Down Timeout = 0:
  2051. *
  2052. * When Port Down timer expires we will start returning
  2053. * I/O's to OS with "DID_NO_CONNECT".
  2054. *
  2055. * Link Down Timeout != 0:
  2056. *
  2057. * The driver waits for the link to come up after link down
  2058. * before returning I/Os to OS with "DID_NO_CONNECT".
  2059. */
  2060. if (nv->link_down_timeout == 0) {
  2061. ha->loop_down_abort_time =
  2062. (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
  2063. } else {
  2064. ha->link_down_timeout = nv->link_down_timeout;
  2065. ha->loop_down_abort_time =
  2066. (LOOP_DOWN_TIME - ha->link_down_timeout);
  2067. }
  2068. /*
  2069. * Need enough time to try and get the port back.
  2070. */
  2071. ha->port_down_retry_count = nv->port_down_retry_count;
  2072. if (qlport_down_retry)
  2073. ha->port_down_retry_count = qlport_down_retry;
  2074. /* Set login_retry_count */
  2075. ha->login_retry_count = nv->retry_count;
  2076. if (ha->port_down_retry_count == nv->port_down_retry_count &&
  2077. ha->port_down_retry_count > 3)
  2078. ha->login_retry_count = ha->port_down_retry_count;
  2079. else if (ha->port_down_retry_count > (int)ha->login_retry_count)
  2080. ha->login_retry_count = ha->port_down_retry_count;
  2081. if (ql2xloginretrycount)
  2082. ha->login_retry_count = ql2xloginretrycount;
  2083. icb->lun_enables = __constant_cpu_to_le16(0);
  2084. icb->command_resource_count = 0;
  2085. icb->immediate_notify_resource_count = 0;
  2086. icb->timeout = __constant_cpu_to_le16(0);
  2087. if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
  2088. /* Enable RIO */
  2089. icb->firmware_options[0] &= ~BIT_3;
  2090. icb->add_firmware_options[0] &=
  2091. ~(BIT_3 | BIT_2 | BIT_1 | BIT_0);
  2092. icb->add_firmware_options[0] |= BIT_2;
  2093. icb->response_accumulation_timer = 3;
  2094. icb->interrupt_delay_timer = 5;
  2095. vha->flags.process_response_queue = 1;
  2096. } else {
  2097. /* Enable ZIO. */
  2098. if (!vha->flags.init_done) {
  2099. ha->zio_mode = icb->add_firmware_options[0] &
  2100. (BIT_3 | BIT_2 | BIT_1 | BIT_0);
  2101. ha->zio_timer = icb->interrupt_delay_timer ?
  2102. icb->interrupt_delay_timer: 2;
  2103. }
  2104. icb->add_firmware_options[0] &=
  2105. ~(BIT_3 | BIT_2 | BIT_1 | BIT_0);
  2106. vha->flags.process_response_queue = 0;
  2107. if (ha->zio_mode != QLA_ZIO_DISABLED) {
  2108. ha->zio_mode = QLA_ZIO_MODE_6;
  2109. DEBUG2(printk("scsi(%ld): ZIO mode %d enabled; timer "
  2110. "delay (%d us).\n", vha->host_no, ha->zio_mode,
  2111. ha->zio_timer * 100));
  2112. qla_printk(KERN_INFO, ha,
  2113. "ZIO mode %d enabled; timer delay (%d us).\n",
  2114. ha->zio_mode, ha->zio_timer * 100);
  2115. icb->add_firmware_options[0] |= (uint8_t)ha->zio_mode;
  2116. icb->interrupt_delay_timer = (uint8_t)ha->zio_timer;
  2117. vha->flags.process_response_queue = 1;
  2118. }
  2119. }
  2120. if (rval) {
  2121. DEBUG2_3(printk(KERN_WARNING
  2122. "scsi(%ld): NVRAM configuration failed!\n", vha->host_no));
  2123. }
  2124. return (rval);
  2125. }
  2126. static void
  2127. qla2x00_rport_del(void *data)
  2128. {
  2129. fc_port_t *fcport = data;
  2130. struct fc_rport *rport;
  2131. spin_lock_irq(fcport->vha->host->host_lock);
  2132. rport = fcport->drport ? fcport->drport: fcport->rport;
  2133. fcport->drport = NULL;
  2134. spin_unlock_irq(fcport->vha->host->host_lock);
  2135. if (rport)
  2136. fc_remote_port_delete(rport);
  2137. }
  2138. /**
  2139. * qla2x00_alloc_fcport() - Allocate a generic fcport.
  2140. * @ha: HA context
  2141. * @flags: allocation flags
  2142. *
  2143. * Returns a pointer to the allocated fcport, or NULL, if none available.
  2144. */
  2145. fc_port_t *
  2146. qla2x00_alloc_fcport(scsi_qla_host_t *vha, gfp_t flags)
  2147. {
  2148. fc_port_t *fcport;
  2149. fcport = kzalloc(sizeof(fc_port_t), flags);
  2150. if (!fcport)
  2151. return NULL;
  2152. /* Setup fcport template structure. */
  2153. fcport->vha = vha;
  2154. fcport->vp_idx = vha->vp_idx;
  2155. fcport->port_type = FCT_UNKNOWN;
  2156. fcport->loop_id = FC_NO_LOOP_ID;
  2157. atomic_set(&fcport->state, FCS_UNCONFIGURED);
  2158. fcport->supported_classes = FC_COS_UNSPECIFIED;
  2159. return fcport;
  2160. }
  2161. /*
  2162. * qla2x00_configure_loop
  2163. * Updates Fibre Channel Device Database with what is actually on loop.
  2164. *
  2165. * Input:
  2166. * ha = adapter block pointer.
  2167. *
  2168. * Returns:
  2169. * 0 = success.
  2170. * 1 = error.
  2171. * 2 = database was full and device was not configured.
  2172. */
  2173. static int
  2174. qla2x00_configure_loop(scsi_qla_host_t *vha)
  2175. {
  2176. int rval;
  2177. unsigned long flags, save_flags;
  2178. struct qla_hw_data *ha = vha->hw;
  2179. rval = QLA_SUCCESS;
  2180. /* Get Initiator ID */
  2181. if (test_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags)) {
  2182. rval = qla2x00_configure_hba(vha);
  2183. if (rval != QLA_SUCCESS) {
  2184. DEBUG(printk("scsi(%ld): Unable to configure HBA.\n",
  2185. vha->host_no));
  2186. return (rval);
  2187. }
  2188. }
  2189. save_flags = flags = vha->dpc_flags;
  2190. DEBUG(printk("scsi(%ld): Configure loop -- dpc flags =0x%lx\n",
  2191. vha->host_no, flags));
  2192. /*
  2193. * If we have both an RSCN and PORT UPDATE pending then handle them
  2194. * both at the same time.
  2195. */
  2196. clear_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
  2197. clear_bit(RSCN_UPDATE, &vha->dpc_flags);
  2198. qla2x00_get_data_rate(vha);
  2199. /* Determine what we need to do */
  2200. if (ha->current_topology == ISP_CFG_FL &&
  2201. (test_bit(LOCAL_LOOP_UPDATE, &flags))) {
  2202. vha->flags.rscn_queue_overflow = 1;
  2203. set_bit(RSCN_UPDATE, &flags);
  2204. } else if (ha->current_topology == ISP_CFG_F &&
  2205. (test_bit(LOCAL_LOOP_UPDATE, &flags))) {
  2206. vha->flags.rscn_queue_overflow = 1;
  2207. set_bit(RSCN_UPDATE, &flags);
  2208. clear_bit(LOCAL_LOOP_UPDATE, &flags);
  2209. } else if (ha->current_topology == ISP_CFG_N) {
  2210. clear_bit(RSCN_UPDATE, &flags);
  2211. } else if (!vha->flags.online ||
  2212. (test_bit(ABORT_ISP_ACTIVE, &flags))) {
  2213. vha->flags.rscn_queue_overflow = 1;
  2214. set_bit(RSCN_UPDATE, &flags);
  2215. set_bit(LOCAL_LOOP_UPDATE, &flags);
  2216. }
  2217. if (test_bit(LOCAL_LOOP_UPDATE, &flags)) {
  2218. if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
  2219. rval = QLA_FUNCTION_FAILED;
  2220. else
  2221. rval = qla2x00_configure_local_loop(vha);
  2222. }
  2223. if (rval == QLA_SUCCESS && test_bit(RSCN_UPDATE, &flags)) {
  2224. if (LOOP_TRANSITION(vha))
  2225. rval = QLA_FUNCTION_FAILED;
  2226. else
  2227. rval = qla2x00_configure_fabric(vha);
  2228. }
  2229. if (rval == QLA_SUCCESS) {
  2230. if (atomic_read(&vha->loop_down_timer) ||
  2231. test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) {
  2232. rval = QLA_FUNCTION_FAILED;
  2233. } else {
  2234. atomic_set(&vha->loop_state, LOOP_READY);
  2235. DEBUG(printk("scsi(%ld): LOOP READY\n", vha->host_no));
  2236. }
  2237. }
  2238. if (rval) {
  2239. DEBUG2_3(printk("%s(%ld): *** FAILED ***\n",
  2240. __func__, vha->host_no));
  2241. } else {
  2242. DEBUG3(printk("%s: exiting normally\n", __func__));
  2243. }
  2244. /* Restore state if a resync event occurred during processing */
  2245. if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) {
  2246. if (test_bit(LOCAL_LOOP_UPDATE, &save_flags))
  2247. set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
  2248. if (test_bit(RSCN_UPDATE, &save_flags)) {
  2249. set_bit(RSCN_UPDATE, &vha->dpc_flags);
  2250. vha->flags.rscn_queue_overflow = 1;
  2251. }
  2252. }
  2253. return (rval);
  2254. }
  2255. /*
  2256. * qla2x00_configure_local_loop
  2257. * Updates Fibre Channel Device Database with local loop devices.
  2258. *
  2259. * Input:
  2260. * ha = adapter block pointer.
  2261. *
  2262. * Returns:
  2263. * 0 = success.
  2264. */
  2265. static int
  2266. qla2x00_configure_local_loop(scsi_qla_host_t *vha)
  2267. {
  2268. int rval, rval2;
  2269. int found_devs;
  2270. int found;
  2271. fc_port_t *fcport, *new_fcport;
  2272. uint16_t index;
  2273. uint16_t entries;
  2274. char *id_iter;
  2275. uint16_t loop_id;
  2276. uint8_t domain, area, al_pa;
  2277. struct qla_hw_data *ha = vha->hw;
  2278. found_devs = 0;
  2279. new_fcport = NULL;
  2280. entries = MAX_FIBRE_DEVICES;
  2281. DEBUG3(printk("scsi(%ld): Getting FCAL position map\n", vha->host_no));
  2282. DEBUG3(qla2x00_get_fcal_position_map(vha, NULL));
  2283. /* Get list of logged in devices. */
  2284. memset(ha->gid_list, 0, GID_LIST_SIZE);
  2285. rval = qla2x00_get_id_list(vha, ha->gid_list, ha->gid_list_dma,
  2286. &entries);
  2287. if (rval != QLA_SUCCESS)
  2288. goto cleanup_allocation;
  2289. DEBUG3(printk("scsi(%ld): Entries in ID list (%d)\n",
  2290. vha->host_no, entries));
  2291. DEBUG3(qla2x00_dump_buffer((uint8_t *)ha->gid_list,
  2292. entries * sizeof(struct gid_list_info)));
  2293. /* Allocate temporary fcport for any new fcports discovered. */
  2294. new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
  2295. if (new_fcport == NULL) {
  2296. rval = QLA_MEMORY_ALLOC_FAILED;
  2297. goto cleanup_allocation;
  2298. }
  2299. new_fcport->flags &= ~FCF_FABRIC_DEVICE;
  2300. /*
  2301. * Mark local devices that were present with FCF_DEVICE_LOST for now.
  2302. */
  2303. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  2304. if (atomic_read(&fcport->state) == FCS_ONLINE &&
  2305. fcport->port_type != FCT_BROADCAST &&
  2306. (fcport->flags & FCF_FABRIC_DEVICE) == 0) {
  2307. DEBUG(printk("scsi(%ld): Marking port lost, "
  2308. "loop_id=0x%04x\n",
  2309. vha->host_no, fcport->loop_id));
  2310. atomic_set(&fcport->state, FCS_DEVICE_LOST);
  2311. }
  2312. }
  2313. /* Add devices to port list. */
  2314. id_iter = (char *)ha->gid_list;
  2315. for (index = 0; index < entries; index++) {
  2316. domain = ((struct gid_list_info *)id_iter)->domain;
  2317. area = ((struct gid_list_info *)id_iter)->area;
  2318. al_pa = ((struct gid_list_info *)id_iter)->al_pa;
  2319. if (IS_QLA2100(ha) || IS_QLA2200(ha))
  2320. loop_id = (uint16_t)
  2321. ((struct gid_list_info *)id_iter)->loop_id_2100;
  2322. else
  2323. loop_id = le16_to_cpu(
  2324. ((struct gid_list_info *)id_iter)->loop_id);
  2325. id_iter += ha->gid_list_info_size;
  2326. /* Bypass reserved domain fields. */
  2327. if ((domain & 0xf0) == 0xf0)
  2328. continue;
  2329. /* Bypass if not same domain and area of adapter. */
  2330. if (area && domain &&
  2331. (area != vha->d_id.b.area || domain != vha->d_id.b.domain))
  2332. continue;
  2333. /* Bypass invalid local loop ID. */
  2334. if (loop_id > LAST_LOCAL_LOOP_ID)
  2335. continue;
  2336. /* Fill in member data. */
  2337. new_fcport->d_id.b.domain = domain;
  2338. new_fcport->d_id.b.area = area;
  2339. new_fcport->d_id.b.al_pa = al_pa;
  2340. new_fcport->loop_id = loop_id;
  2341. new_fcport->vp_idx = vha->vp_idx;
  2342. rval2 = qla2x00_get_port_database(vha, new_fcport, 0);
  2343. if (rval2 != QLA_SUCCESS) {
  2344. DEBUG2(printk("scsi(%ld): Failed to retrieve fcport "
  2345. "information -- get_port_database=%x, "
  2346. "loop_id=0x%04x\n",
  2347. vha->host_no, rval2, new_fcport->loop_id));
  2348. DEBUG2(printk("scsi(%ld): Scheduling resync...\n",
  2349. vha->host_no));
  2350. set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
  2351. continue;
  2352. }
  2353. /* Check for matching device in port list. */
  2354. found = 0;
  2355. fcport = NULL;
  2356. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  2357. if (memcmp(new_fcport->port_name, fcport->port_name,
  2358. WWN_SIZE))
  2359. continue;
  2360. fcport->flags &= ~FCF_FABRIC_DEVICE;
  2361. fcport->loop_id = new_fcport->loop_id;
  2362. fcport->port_type = new_fcport->port_type;
  2363. fcport->d_id.b24 = new_fcport->d_id.b24;
  2364. memcpy(fcport->node_name, new_fcport->node_name,
  2365. WWN_SIZE);
  2366. found++;
  2367. break;
  2368. }
  2369. if (!found) {
  2370. /* New device, add to fcports list. */
  2371. if (vha->vp_idx) {
  2372. new_fcport->vha = vha;
  2373. new_fcport->vp_idx = vha->vp_idx;
  2374. }
  2375. list_add_tail(&new_fcport->list, &vha->vp_fcports);
  2376. /* Allocate a new replacement fcport. */
  2377. fcport = new_fcport;
  2378. new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
  2379. if (new_fcport == NULL) {
  2380. rval = QLA_MEMORY_ALLOC_FAILED;
  2381. goto cleanup_allocation;
  2382. }
  2383. new_fcport->flags &= ~FCF_FABRIC_DEVICE;
  2384. }
  2385. /* Base iIDMA settings on HBA port speed. */
  2386. fcport->fp_speed = ha->link_data_rate;
  2387. qla2x00_update_fcport(vha, fcport);
  2388. found_devs++;
  2389. }
  2390. cleanup_allocation:
  2391. kfree(new_fcport);
  2392. if (rval != QLA_SUCCESS) {
  2393. DEBUG2(printk("scsi(%ld): Configure local loop error exit: "
  2394. "rval=%x\n", vha->host_no, rval));
  2395. }
  2396. return (rval);
  2397. }
  2398. static void
  2399. qla2x00_iidma_fcport(scsi_qla_host_t *vha, fc_port_t *fcport)
  2400. {
  2401. #define LS_UNKNOWN 2
  2402. static char *link_speeds[] = { "1", "2", "?", "4", "8", "10" };
  2403. char *link_speed;
  2404. int rval;
  2405. uint16_t mb[4];
  2406. struct qla_hw_data *ha = vha->hw;
  2407. if (!IS_IIDMA_CAPABLE(ha))
  2408. return;
  2409. if (fcport->fp_speed == PORT_SPEED_UNKNOWN ||
  2410. fcport->fp_speed > ha->link_data_rate)
  2411. return;
  2412. rval = qla2x00_set_idma_speed(vha, fcport->loop_id, fcport->fp_speed,
  2413. mb);
  2414. if (rval != QLA_SUCCESS) {
  2415. DEBUG2(printk("scsi(%ld): Unable to adjust iIDMA "
  2416. "%02x%02x%02x%02x%02x%02x%02x%02x -- %04x %x %04x %04x.\n",
  2417. vha->host_no, fcport->port_name[0], fcport->port_name[1],
  2418. fcport->port_name[2], fcport->port_name[3],
  2419. fcport->port_name[4], fcport->port_name[5],
  2420. fcport->port_name[6], fcport->port_name[7], rval,
  2421. fcport->fp_speed, mb[0], mb[1]));
  2422. } else {
  2423. link_speed = link_speeds[LS_UNKNOWN];
  2424. if (fcport->fp_speed < 5)
  2425. link_speed = link_speeds[fcport->fp_speed];
  2426. else if (fcport->fp_speed == 0x13)
  2427. link_speed = link_speeds[5];
  2428. DEBUG2(qla_printk(KERN_INFO, ha,
  2429. "iIDMA adjusted to %s GB/s on "
  2430. "%02x%02x%02x%02x%02x%02x%02x%02x.\n",
  2431. link_speed, fcport->port_name[0],
  2432. fcport->port_name[1], fcport->port_name[2],
  2433. fcport->port_name[3], fcport->port_name[4],
  2434. fcport->port_name[5], fcport->port_name[6],
  2435. fcport->port_name[7]));
  2436. }
  2437. }
  2438. static void
  2439. qla2x00_reg_remote_port(scsi_qla_host_t *vha, fc_port_t *fcport)
  2440. {
  2441. struct fc_rport_identifiers rport_ids;
  2442. struct fc_rport *rport;
  2443. struct qla_hw_data *ha = vha->hw;
  2444. qla2x00_rport_del(fcport);
  2445. rport_ids.node_name = wwn_to_u64(fcport->node_name);
  2446. rport_ids.port_name = wwn_to_u64(fcport->port_name);
  2447. rport_ids.port_id = fcport->d_id.b.domain << 16 |
  2448. fcport->d_id.b.area << 8 | fcport->d_id.b.al_pa;
  2449. rport_ids.roles = FC_RPORT_ROLE_UNKNOWN;
  2450. fcport->rport = rport = fc_remote_port_add(vha->host, 0, &rport_ids);
  2451. if (!rport) {
  2452. qla_printk(KERN_WARNING, ha,
  2453. "Unable to allocate fc remote port!\n");
  2454. return;
  2455. }
  2456. spin_lock_irq(fcport->vha->host->host_lock);
  2457. *((fc_port_t **)rport->dd_data) = fcport;
  2458. spin_unlock_irq(fcport->vha->host->host_lock);
  2459. rport->supported_classes = fcport->supported_classes;
  2460. rport_ids.roles = FC_RPORT_ROLE_UNKNOWN;
  2461. if (fcport->port_type == FCT_INITIATOR)
  2462. rport_ids.roles |= FC_RPORT_ROLE_FCP_INITIATOR;
  2463. if (fcport->port_type == FCT_TARGET)
  2464. rport_ids.roles |= FC_RPORT_ROLE_FCP_TARGET;
  2465. fc_remote_port_rolechg(rport, rport_ids.roles);
  2466. }
  2467. /*
  2468. * qla2x00_update_fcport
  2469. * Updates device on list.
  2470. *
  2471. * Input:
  2472. * ha = adapter block pointer.
  2473. * fcport = port structure pointer.
  2474. *
  2475. * Return:
  2476. * 0 - Success
  2477. * BIT_0 - error
  2478. *
  2479. * Context:
  2480. * Kernel context.
  2481. */
  2482. void
  2483. qla2x00_update_fcport(scsi_qla_host_t *vha, fc_port_t *fcport)
  2484. {
  2485. struct qla_hw_data *ha = vha->hw;
  2486. fcport->vha = vha;
  2487. fcport->login_retry = 0;
  2488. fcport->port_login_retry_count = ha->port_down_retry_count *
  2489. PORT_RETRY_TIME;
  2490. atomic_set(&fcport->port_down_timer, ha->port_down_retry_count *
  2491. PORT_RETRY_TIME);
  2492. fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT);
  2493. qla2x00_iidma_fcport(vha, fcport);
  2494. atomic_set(&fcport->state, FCS_ONLINE);
  2495. qla2x00_reg_remote_port(vha, fcport);
  2496. }
  2497. /*
  2498. * qla2x00_configure_fabric
  2499. * Setup SNS devices with loop ID's.
  2500. *
  2501. * Input:
  2502. * ha = adapter block pointer.
  2503. *
  2504. * Returns:
  2505. * 0 = success.
  2506. * BIT_0 = error
  2507. */
  2508. static int
  2509. qla2x00_configure_fabric(scsi_qla_host_t *vha)
  2510. {
  2511. int rval, rval2;
  2512. fc_port_t *fcport, *fcptemp;
  2513. uint16_t next_loopid;
  2514. uint16_t mb[MAILBOX_REGISTER_COUNT];
  2515. uint16_t loop_id;
  2516. LIST_HEAD(new_fcports);
  2517. struct qla_hw_data *ha = vha->hw;
  2518. struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
  2519. /* If FL port exists, then SNS is present */
  2520. if (IS_FWI2_CAPABLE(ha))
  2521. loop_id = NPH_F_PORT;
  2522. else
  2523. loop_id = SNS_FL_PORT;
  2524. rval = qla2x00_get_port_name(vha, loop_id, vha->fabric_node_name, 1);
  2525. if (rval != QLA_SUCCESS) {
  2526. DEBUG2(printk("scsi(%ld): MBC_GET_PORT_NAME Failed, No FL "
  2527. "Port\n", vha->host_no));
  2528. vha->device_flags &= ~SWITCH_FOUND;
  2529. return (QLA_SUCCESS);
  2530. }
  2531. vha->device_flags |= SWITCH_FOUND;
  2532. /* Mark devices that need re-synchronization. */
  2533. rval2 = qla2x00_device_resync(vha);
  2534. if (rval2 == QLA_RSCNS_HANDLED) {
  2535. /* No point doing the scan, just continue. */
  2536. return (QLA_SUCCESS);
  2537. }
  2538. do {
  2539. /* FDMI support. */
  2540. if (ql2xfdmienable &&
  2541. test_and_clear_bit(REGISTER_FDMI_NEEDED, &vha->dpc_flags))
  2542. qla2x00_fdmi_register(vha);
  2543. /* Ensure we are logged into the SNS. */
  2544. if (IS_FWI2_CAPABLE(ha))
  2545. loop_id = NPH_SNS;
  2546. else
  2547. loop_id = SIMPLE_NAME_SERVER;
  2548. ha->isp_ops->fabric_login(vha, loop_id, 0xff, 0xff,
  2549. 0xfc, mb, BIT_1 | BIT_0);
  2550. if (mb[0] != MBS_COMMAND_COMPLETE) {
  2551. DEBUG2(qla_printk(KERN_INFO, ha,
  2552. "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x "
  2553. "mb[2]=%x mb[6]=%x mb[7]=%x\n", loop_id,
  2554. mb[0], mb[1], mb[2], mb[6], mb[7]));
  2555. return (QLA_SUCCESS);
  2556. }
  2557. if (test_and_clear_bit(REGISTER_FC4_NEEDED, &vha->dpc_flags)) {
  2558. if (qla2x00_rft_id(vha)) {
  2559. /* EMPTY */
  2560. DEBUG2(printk("scsi(%ld): Register FC-4 "
  2561. "TYPE failed.\n", vha->host_no));
  2562. }
  2563. if (qla2x00_rff_id(vha)) {
  2564. /* EMPTY */
  2565. DEBUG2(printk("scsi(%ld): Register FC-4 "
  2566. "Features failed.\n", vha->host_no));
  2567. }
  2568. if (qla2x00_rnn_id(vha)) {
  2569. /* EMPTY */
  2570. DEBUG2(printk("scsi(%ld): Register Node Name "
  2571. "failed.\n", vha->host_no));
  2572. } else if (qla2x00_rsnn_nn(vha)) {
  2573. /* EMPTY */
  2574. DEBUG2(printk("scsi(%ld): Register Symbolic "
  2575. "Node Name failed.\n", vha->host_no));
  2576. }
  2577. }
  2578. rval = qla2x00_find_all_fabric_devs(vha, &new_fcports);
  2579. if (rval != QLA_SUCCESS)
  2580. break;
  2581. /*
  2582. * Logout all previous fabric devices marked lost, except
  2583. * FCP2 devices.
  2584. */
  2585. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  2586. if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
  2587. break;
  2588. if ((fcport->flags & FCF_FABRIC_DEVICE) == 0)
  2589. continue;
  2590. if (atomic_read(&fcport->state) == FCS_DEVICE_LOST) {
  2591. qla2x00_mark_device_lost(vha, fcport,
  2592. ql2xplogiabsentdevice, 0);
  2593. if (fcport->loop_id != FC_NO_LOOP_ID &&
  2594. (fcport->flags & FCF_FCP2_DEVICE) == 0 &&
  2595. fcport->port_type != FCT_INITIATOR &&
  2596. fcport->port_type != FCT_BROADCAST) {
  2597. ha->isp_ops->fabric_logout(vha,
  2598. fcport->loop_id,
  2599. fcport->d_id.b.domain,
  2600. fcport->d_id.b.area,
  2601. fcport->d_id.b.al_pa);
  2602. fcport->loop_id = FC_NO_LOOP_ID;
  2603. }
  2604. }
  2605. }
  2606. /* Starting free loop ID. */
  2607. next_loopid = ha->min_external_loopid;
  2608. /*
  2609. * Scan through our port list and login entries that need to be
  2610. * logged in.
  2611. */
  2612. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  2613. if (atomic_read(&vha->loop_down_timer) ||
  2614. test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
  2615. break;
  2616. if ((fcport->flags & FCF_FABRIC_DEVICE) == 0 ||
  2617. (fcport->flags & FCF_LOGIN_NEEDED) == 0)
  2618. continue;
  2619. if (fcport->loop_id == FC_NO_LOOP_ID) {
  2620. fcport->loop_id = next_loopid;
  2621. rval = qla2x00_find_new_loop_id(
  2622. base_vha, fcport);
  2623. if (rval != QLA_SUCCESS) {
  2624. /* Ran out of IDs to use */
  2625. break;
  2626. }
  2627. }
  2628. /* Login and update database */
  2629. qla2x00_fabric_dev_login(vha, fcport, &next_loopid);
  2630. }
  2631. /* Exit if out of loop IDs. */
  2632. if (rval != QLA_SUCCESS) {
  2633. break;
  2634. }
  2635. /*
  2636. * Login and add the new devices to our port list.
  2637. */
  2638. list_for_each_entry_safe(fcport, fcptemp, &new_fcports, list) {
  2639. if (atomic_read(&vha->loop_down_timer) ||
  2640. test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
  2641. break;
  2642. /* Find a new loop ID to use. */
  2643. fcport->loop_id = next_loopid;
  2644. rval = qla2x00_find_new_loop_id(base_vha, fcport);
  2645. if (rval != QLA_SUCCESS) {
  2646. /* Ran out of IDs to use */
  2647. break;
  2648. }
  2649. /* Login and update database */
  2650. qla2x00_fabric_dev_login(vha, fcport, &next_loopid);
  2651. if (vha->vp_idx) {
  2652. fcport->vha = vha;
  2653. fcport->vp_idx = vha->vp_idx;
  2654. }
  2655. list_move_tail(&fcport->list, &vha->vp_fcports);
  2656. }
  2657. } while (0);
  2658. /* Free all new device structures not processed. */
  2659. list_for_each_entry_safe(fcport, fcptemp, &new_fcports, list) {
  2660. list_del(&fcport->list);
  2661. kfree(fcport);
  2662. }
  2663. if (rval) {
  2664. DEBUG2(printk("scsi(%ld): Configure fabric error exit: "
  2665. "rval=%d\n", vha->host_no, rval));
  2666. }
  2667. return (rval);
  2668. }
  2669. /*
  2670. * qla2x00_find_all_fabric_devs
  2671. *
  2672. * Input:
  2673. * ha = adapter block pointer.
  2674. * dev = database device entry pointer.
  2675. *
  2676. * Returns:
  2677. * 0 = success.
  2678. *
  2679. * Context:
  2680. * Kernel context.
  2681. */
  2682. static int
  2683. qla2x00_find_all_fabric_devs(scsi_qla_host_t *vha,
  2684. struct list_head *new_fcports)
  2685. {
  2686. int rval;
  2687. uint16_t loop_id;
  2688. fc_port_t *fcport, *new_fcport, *fcptemp;
  2689. int found;
  2690. sw_info_t *swl;
  2691. int swl_idx;
  2692. int first_dev, last_dev;
  2693. port_id_t wrap = {}, nxt_d_id;
  2694. struct qla_hw_data *ha = vha->hw;
  2695. struct scsi_qla_host *vp, *base_vha = pci_get_drvdata(ha->pdev);
  2696. struct scsi_qla_host *tvp;
  2697. rval = QLA_SUCCESS;
  2698. /* Try GID_PT to get device list, else GAN. */
  2699. swl = kcalloc(MAX_FIBRE_DEVICES, sizeof(sw_info_t), GFP_KERNEL);
  2700. if (!swl) {
  2701. /*EMPTY*/
  2702. DEBUG2(printk("scsi(%ld): GID_PT allocations failed, fallback "
  2703. "on GA_NXT\n", vha->host_no));
  2704. } else {
  2705. if (qla2x00_gid_pt(vha, swl) != QLA_SUCCESS) {
  2706. kfree(swl);
  2707. swl = NULL;
  2708. } else if (qla2x00_gpn_id(vha, swl) != QLA_SUCCESS) {
  2709. kfree(swl);
  2710. swl = NULL;
  2711. } else if (qla2x00_gnn_id(vha, swl) != QLA_SUCCESS) {
  2712. kfree(swl);
  2713. swl = NULL;
  2714. } else if (ql2xiidmaenable &&
  2715. qla2x00_gfpn_id(vha, swl) == QLA_SUCCESS) {
  2716. qla2x00_gpsc(vha, swl);
  2717. }
  2718. }
  2719. swl_idx = 0;
  2720. /* Allocate temporary fcport for any new fcports discovered. */
  2721. new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
  2722. if (new_fcport == NULL) {
  2723. kfree(swl);
  2724. return (QLA_MEMORY_ALLOC_FAILED);
  2725. }
  2726. new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED);
  2727. /* Set start port ID scan at adapter ID. */
  2728. first_dev = 1;
  2729. last_dev = 0;
  2730. /* Starting free loop ID. */
  2731. loop_id = ha->min_external_loopid;
  2732. for (; loop_id <= ha->max_loop_id; loop_id++) {
  2733. if (qla2x00_is_reserved_id(vha, loop_id))
  2734. continue;
  2735. if (atomic_read(&vha->loop_down_timer) ||
  2736. LOOP_TRANSITION(vha)) {
  2737. atomic_set(&vha->loop_down_timer, 0);
  2738. set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
  2739. set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
  2740. break;
  2741. }
  2742. if (swl != NULL) {
  2743. if (last_dev) {
  2744. wrap.b24 = new_fcport->d_id.b24;
  2745. } else {
  2746. new_fcport->d_id.b24 = swl[swl_idx].d_id.b24;
  2747. memcpy(new_fcport->node_name,
  2748. swl[swl_idx].node_name, WWN_SIZE);
  2749. memcpy(new_fcport->port_name,
  2750. swl[swl_idx].port_name, WWN_SIZE);
  2751. memcpy(new_fcport->fabric_port_name,
  2752. swl[swl_idx].fabric_port_name, WWN_SIZE);
  2753. new_fcport->fp_speed = swl[swl_idx].fp_speed;
  2754. if (swl[swl_idx].d_id.b.rsvd_1 != 0) {
  2755. last_dev = 1;
  2756. }
  2757. swl_idx++;
  2758. }
  2759. } else {
  2760. /* Send GA_NXT to the switch */
  2761. rval = qla2x00_ga_nxt(vha, new_fcport);
  2762. if (rval != QLA_SUCCESS) {
  2763. qla_printk(KERN_WARNING, ha,
  2764. "SNS scan failed -- assuming zero-entry "
  2765. "result...\n");
  2766. list_for_each_entry_safe(fcport, fcptemp,
  2767. new_fcports, list) {
  2768. list_del(&fcport->list);
  2769. kfree(fcport);
  2770. }
  2771. rval = QLA_SUCCESS;
  2772. break;
  2773. }
  2774. }
  2775. /* If wrap on switch device list, exit. */
  2776. if (first_dev) {
  2777. wrap.b24 = new_fcport->d_id.b24;
  2778. first_dev = 0;
  2779. } else if (new_fcport->d_id.b24 == wrap.b24) {
  2780. DEBUG2(printk("scsi(%ld): device wrap (%02x%02x%02x)\n",
  2781. vha->host_no, new_fcport->d_id.b.domain,
  2782. new_fcport->d_id.b.area, new_fcport->d_id.b.al_pa));
  2783. break;
  2784. }
  2785. /* Bypass if same physical adapter. */
  2786. if (new_fcport->d_id.b24 == base_vha->d_id.b24)
  2787. continue;
  2788. /* Bypass virtual ports of the same host. */
  2789. found = 0;
  2790. if (ha->num_vhosts) {
  2791. list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) {
  2792. if (new_fcport->d_id.b24 == vp->d_id.b24) {
  2793. found = 1;
  2794. break;
  2795. }
  2796. }
  2797. if (found)
  2798. continue;
  2799. }
  2800. /* Bypass if same domain and area of adapter. */
  2801. if (((new_fcport->d_id.b24 & 0xffff00) ==
  2802. (vha->d_id.b24 & 0xffff00)) && ha->current_topology ==
  2803. ISP_CFG_FL)
  2804. continue;
  2805. /* Bypass reserved domain fields. */
  2806. if ((new_fcport->d_id.b.domain & 0xf0) == 0xf0)
  2807. continue;
  2808. /* Locate matching device in database. */
  2809. found = 0;
  2810. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  2811. if (memcmp(new_fcport->port_name, fcport->port_name,
  2812. WWN_SIZE))
  2813. continue;
  2814. found++;
  2815. /* Update port state. */
  2816. memcpy(fcport->fabric_port_name,
  2817. new_fcport->fabric_port_name, WWN_SIZE);
  2818. fcport->fp_speed = new_fcport->fp_speed;
  2819. /*
  2820. * If address the same and state FCS_ONLINE, nothing
  2821. * changed.
  2822. */
  2823. if (fcport->d_id.b24 == new_fcport->d_id.b24 &&
  2824. atomic_read(&fcport->state) == FCS_ONLINE) {
  2825. break;
  2826. }
  2827. /*
  2828. * If device was not a fabric device before.
  2829. */
  2830. if ((fcport->flags & FCF_FABRIC_DEVICE) == 0) {
  2831. fcport->d_id.b24 = new_fcport->d_id.b24;
  2832. fcport->loop_id = FC_NO_LOOP_ID;
  2833. fcport->flags |= (FCF_FABRIC_DEVICE |
  2834. FCF_LOGIN_NEEDED);
  2835. break;
  2836. }
  2837. /*
  2838. * Port ID changed or device was marked to be updated;
  2839. * Log it out if still logged in and mark it for
  2840. * relogin later.
  2841. */
  2842. fcport->d_id.b24 = new_fcport->d_id.b24;
  2843. fcport->flags |= FCF_LOGIN_NEEDED;
  2844. if (fcport->loop_id != FC_NO_LOOP_ID &&
  2845. (fcport->flags & FCF_FCP2_DEVICE) == 0 &&
  2846. fcport->port_type != FCT_INITIATOR &&
  2847. fcport->port_type != FCT_BROADCAST) {
  2848. ha->isp_ops->fabric_logout(vha, fcport->loop_id,
  2849. fcport->d_id.b.domain, fcport->d_id.b.area,
  2850. fcport->d_id.b.al_pa);
  2851. fcport->loop_id = FC_NO_LOOP_ID;
  2852. }
  2853. break;
  2854. }
  2855. if (found)
  2856. continue;
  2857. /* If device was not in our fcports list, then add it. */
  2858. list_add_tail(&new_fcport->list, new_fcports);
  2859. /* Allocate a new replacement fcport. */
  2860. nxt_d_id.b24 = new_fcport->d_id.b24;
  2861. new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
  2862. if (new_fcport == NULL) {
  2863. kfree(swl);
  2864. return (QLA_MEMORY_ALLOC_FAILED);
  2865. }
  2866. new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED);
  2867. new_fcport->d_id.b24 = nxt_d_id.b24;
  2868. }
  2869. kfree(swl);
  2870. kfree(new_fcport);
  2871. return (rval);
  2872. }
  2873. /*
  2874. * qla2x00_find_new_loop_id
  2875. * Scan through our port list and find a new usable loop ID.
  2876. *
  2877. * Input:
  2878. * ha: adapter state pointer.
  2879. * dev: port structure pointer.
  2880. *
  2881. * Returns:
  2882. * qla2x00 local function return status code.
  2883. *
  2884. * Context:
  2885. * Kernel context.
  2886. */
  2887. static int
  2888. qla2x00_find_new_loop_id(scsi_qla_host_t *vha, fc_port_t *dev)
  2889. {
  2890. int rval;
  2891. int found;
  2892. fc_port_t *fcport;
  2893. uint16_t first_loop_id;
  2894. struct qla_hw_data *ha = vha->hw;
  2895. struct scsi_qla_host *vp;
  2896. struct scsi_qla_host *tvp;
  2897. rval = QLA_SUCCESS;
  2898. /* Save starting loop ID. */
  2899. first_loop_id = dev->loop_id;
  2900. for (;;) {
  2901. /* Skip loop ID if already used by adapter. */
  2902. if (dev->loop_id == vha->loop_id)
  2903. dev->loop_id++;
  2904. /* Skip reserved loop IDs. */
  2905. while (qla2x00_is_reserved_id(vha, dev->loop_id))
  2906. dev->loop_id++;
  2907. /* Reset loop ID if passed the end. */
  2908. if (dev->loop_id > ha->max_loop_id) {
  2909. /* first loop ID. */
  2910. dev->loop_id = ha->min_external_loopid;
  2911. }
  2912. /* Check for loop ID being already in use. */
  2913. found = 0;
  2914. fcport = NULL;
  2915. list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) {
  2916. list_for_each_entry(fcport, &vp->vp_fcports, list) {
  2917. if (fcport->loop_id == dev->loop_id &&
  2918. fcport != dev) {
  2919. /* ID possibly in use */
  2920. found++;
  2921. break;
  2922. }
  2923. }
  2924. if (found)
  2925. break;
  2926. }
  2927. /* If not in use then it is free to use. */
  2928. if (!found) {
  2929. break;
  2930. }
  2931. /* ID in use. Try next value. */
  2932. dev->loop_id++;
  2933. /* If wrap around. No free ID to use. */
  2934. if (dev->loop_id == first_loop_id) {
  2935. dev->loop_id = FC_NO_LOOP_ID;
  2936. rval = QLA_FUNCTION_FAILED;
  2937. break;
  2938. }
  2939. }
  2940. return (rval);
  2941. }
  2942. /*
  2943. * qla2x00_device_resync
  2944. * Marks devices in the database that needs resynchronization.
  2945. *
  2946. * Input:
  2947. * ha = adapter block pointer.
  2948. *
  2949. * Context:
  2950. * Kernel context.
  2951. */
  2952. static int
  2953. qla2x00_device_resync(scsi_qla_host_t *vha)
  2954. {
  2955. int rval;
  2956. uint32_t mask;
  2957. fc_port_t *fcport;
  2958. uint32_t rscn_entry;
  2959. uint8_t rscn_out_iter;
  2960. uint8_t format;
  2961. port_id_t d_id = {};
  2962. rval = QLA_RSCNS_HANDLED;
  2963. while (vha->rscn_out_ptr != vha->rscn_in_ptr ||
  2964. vha->flags.rscn_queue_overflow) {
  2965. rscn_entry = vha->rscn_queue[vha->rscn_out_ptr];
  2966. format = MSB(MSW(rscn_entry));
  2967. d_id.b.domain = LSB(MSW(rscn_entry));
  2968. d_id.b.area = MSB(LSW(rscn_entry));
  2969. d_id.b.al_pa = LSB(LSW(rscn_entry));
  2970. DEBUG(printk("scsi(%ld): RSCN queue entry[%d] = "
  2971. "[%02x/%02x%02x%02x].\n",
  2972. vha->host_no, vha->rscn_out_ptr, format, d_id.b.domain,
  2973. d_id.b.area, d_id.b.al_pa));
  2974. vha->rscn_out_ptr++;
  2975. if (vha->rscn_out_ptr == MAX_RSCN_COUNT)
  2976. vha->rscn_out_ptr = 0;
  2977. /* Skip duplicate entries. */
  2978. for (rscn_out_iter = vha->rscn_out_ptr;
  2979. !vha->flags.rscn_queue_overflow &&
  2980. rscn_out_iter != vha->rscn_in_ptr;
  2981. rscn_out_iter = (rscn_out_iter ==
  2982. (MAX_RSCN_COUNT - 1)) ? 0: rscn_out_iter + 1) {
  2983. if (rscn_entry != vha->rscn_queue[rscn_out_iter])
  2984. break;
  2985. DEBUG(printk("scsi(%ld): Skipping duplicate RSCN queue "
  2986. "entry found at [%d].\n", vha->host_no,
  2987. rscn_out_iter));
  2988. vha->rscn_out_ptr = rscn_out_iter;
  2989. }
  2990. /* Queue overflow, set switch default case. */
  2991. if (vha->flags.rscn_queue_overflow) {
  2992. DEBUG(printk("scsi(%ld): device_resync: rscn "
  2993. "overflow.\n", vha->host_no));
  2994. format = 3;
  2995. vha->flags.rscn_queue_overflow = 0;
  2996. }
  2997. switch (format) {
  2998. case 0:
  2999. mask = 0xffffff;
  3000. break;
  3001. case 1:
  3002. mask = 0xffff00;
  3003. break;
  3004. case 2:
  3005. mask = 0xff0000;
  3006. break;
  3007. default:
  3008. mask = 0x0;
  3009. d_id.b24 = 0;
  3010. vha->rscn_out_ptr = vha->rscn_in_ptr;
  3011. break;
  3012. }
  3013. rval = QLA_SUCCESS;
  3014. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  3015. if ((fcport->flags & FCF_FABRIC_DEVICE) == 0 ||
  3016. (fcport->d_id.b24 & mask) != d_id.b24 ||
  3017. fcport->port_type == FCT_BROADCAST)
  3018. continue;
  3019. if (atomic_read(&fcport->state) == FCS_ONLINE) {
  3020. if (format != 3 ||
  3021. fcport->port_type != FCT_INITIATOR) {
  3022. qla2x00_mark_device_lost(vha, fcport,
  3023. 0, 0);
  3024. }
  3025. }
  3026. }
  3027. }
  3028. return (rval);
  3029. }
  3030. /*
  3031. * qla2x00_fabric_dev_login
  3032. * Login fabric target device and update FC port database.
  3033. *
  3034. * Input:
  3035. * ha: adapter state pointer.
  3036. * fcport: port structure list pointer.
  3037. * next_loopid: contains value of a new loop ID that can be used
  3038. * by the next login attempt.
  3039. *
  3040. * Returns:
  3041. * qla2x00 local function return status code.
  3042. *
  3043. * Context:
  3044. * Kernel context.
  3045. */
  3046. static int
  3047. qla2x00_fabric_dev_login(scsi_qla_host_t *vha, fc_port_t *fcport,
  3048. uint16_t *next_loopid)
  3049. {
  3050. int rval;
  3051. int retry;
  3052. uint8_t opts;
  3053. struct qla_hw_data *ha = vha->hw;
  3054. rval = QLA_SUCCESS;
  3055. retry = 0;
  3056. if (IS_ALOGIO_CAPABLE(ha)) {
  3057. if (fcport->flags & FCF_ASYNC_SENT)
  3058. return rval;
  3059. fcport->flags |= FCF_ASYNC_SENT;
  3060. rval = qla2x00_post_async_login_work(vha, fcport, NULL);
  3061. if (!rval)
  3062. return rval;
  3063. }
  3064. fcport->flags &= ~FCF_ASYNC_SENT;
  3065. rval = qla2x00_fabric_login(vha, fcport, next_loopid);
  3066. if (rval == QLA_SUCCESS) {
  3067. /* Send an ADISC to FCP2 devices.*/
  3068. opts = 0;
  3069. if (fcport->flags & FCF_FCP2_DEVICE)
  3070. opts |= BIT_1;
  3071. rval = qla2x00_get_port_database(vha, fcport, opts);
  3072. if (rval != QLA_SUCCESS) {
  3073. ha->isp_ops->fabric_logout(vha, fcport->loop_id,
  3074. fcport->d_id.b.domain, fcport->d_id.b.area,
  3075. fcport->d_id.b.al_pa);
  3076. qla2x00_mark_device_lost(vha, fcport, 1, 0);
  3077. } else {
  3078. qla2x00_update_fcport(vha, fcport);
  3079. }
  3080. }
  3081. return (rval);
  3082. }
  3083. /*
  3084. * qla2x00_fabric_login
  3085. * Issue fabric login command.
  3086. *
  3087. * Input:
  3088. * ha = adapter block pointer.
  3089. * device = pointer to FC device type structure.
  3090. *
  3091. * Returns:
  3092. * 0 - Login successfully
  3093. * 1 - Login failed
  3094. * 2 - Initiator device
  3095. * 3 - Fatal error
  3096. */
  3097. int
  3098. qla2x00_fabric_login(scsi_qla_host_t *vha, fc_port_t *fcport,
  3099. uint16_t *next_loopid)
  3100. {
  3101. int rval;
  3102. int retry;
  3103. uint16_t tmp_loopid;
  3104. uint16_t mb[MAILBOX_REGISTER_COUNT];
  3105. struct qla_hw_data *ha = vha->hw;
  3106. retry = 0;
  3107. tmp_loopid = 0;
  3108. for (;;) {
  3109. DEBUG(printk("scsi(%ld): Trying Fabric Login w/loop id 0x%04x "
  3110. "for port %02x%02x%02x.\n",
  3111. vha->host_no, fcport->loop_id, fcport->d_id.b.domain,
  3112. fcport->d_id.b.area, fcport->d_id.b.al_pa));
  3113. /* Login fcport on switch. */
  3114. ha->isp_ops->fabric_login(vha, fcport->loop_id,
  3115. fcport->d_id.b.domain, fcport->d_id.b.area,
  3116. fcport->d_id.b.al_pa, mb, BIT_0);
  3117. if (mb[0] == MBS_PORT_ID_USED) {
  3118. /*
  3119. * Device has another loop ID. The firmware team
  3120. * recommends the driver perform an implicit login with
  3121. * the specified ID again. The ID we just used is save
  3122. * here so we return with an ID that can be tried by
  3123. * the next login.
  3124. */
  3125. retry++;
  3126. tmp_loopid = fcport->loop_id;
  3127. fcport->loop_id = mb[1];
  3128. DEBUG(printk("Fabric Login: port in use - next "
  3129. "loop id=0x%04x, port Id=%02x%02x%02x.\n",
  3130. fcport->loop_id, fcport->d_id.b.domain,
  3131. fcport->d_id.b.area, fcport->d_id.b.al_pa));
  3132. } else if (mb[0] == MBS_COMMAND_COMPLETE) {
  3133. /*
  3134. * Login succeeded.
  3135. */
  3136. if (retry) {
  3137. /* A retry occurred before. */
  3138. *next_loopid = tmp_loopid;
  3139. } else {
  3140. /*
  3141. * No retry occurred before. Just increment the
  3142. * ID value for next login.
  3143. */
  3144. *next_loopid = (fcport->loop_id + 1);
  3145. }
  3146. if (mb[1] & BIT_0) {
  3147. fcport->port_type = FCT_INITIATOR;
  3148. } else {
  3149. fcport->port_type = FCT_TARGET;
  3150. if (mb[1] & BIT_1) {
  3151. fcport->flags |= FCF_FCP2_DEVICE;
  3152. }
  3153. }
  3154. if (mb[10] & BIT_0)
  3155. fcport->supported_classes |= FC_COS_CLASS2;
  3156. if (mb[10] & BIT_1)
  3157. fcport->supported_classes |= FC_COS_CLASS3;
  3158. rval = QLA_SUCCESS;
  3159. break;
  3160. } else if (mb[0] == MBS_LOOP_ID_USED) {
  3161. /*
  3162. * Loop ID already used, try next loop ID.
  3163. */
  3164. fcport->loop_id++;
  3165. rval = qla2x00_find_new_loop_id(vha, fcport);
  3166. if (rval != QLA_SUCCESS) {
  3167. /* Ran out of loop IDs to use */
  3168. break;
  3169. }
  3170. } else if (mb[0] == MBS_COMMAND_ERROR) {
  3171. /*
  3172. * Firmware possibly timed out during login. If NO
  3173. * retries are left to do then the device is declared
  3174. * dead.
  3175. */
  3176. *next_loopid = fcport->loop_id;
  3177. ha->isp_ops->fabric_logout(vha, fcport->loop_id,
  3178. fcport->d_id.b.domain, fcport->d_id.b.area,
  3179. fcport->d_id.b.al_pa);
  3180. qla2x00_mark_device_lost(vha, fcport, 1, 0);
  3181. rval = 1;
  3182. break;
  3183. } else {
  3184. /*
  3185. * unrecoverable / not handled error
  3186. */
  3187. DEBUG2(printk("%s(%ld): failed=%x port_id=%02x%02x%02x "
  3188. "loop_id=%x jiffies=%lx.\n",
  3189. __func__, vha->host_no, mb[0],
  3190. fcport->d_id.b.domain, fcport->d_id.b.area,
  3191. fcport->d_id.b.al_pa, fcport->loop_id, jiffies));
  3192. *next_loopid = fcport->loop_id;
  3193. ha->isp_ops->fabric_logout(vha, fcport->loop_id,
  3194. fcport->d_id.b.domain, fcport->d_id.b.area,
  3195. fcport->d_id.b.al_pa);
  3196. fcport->loop_id = FC_NO_LOOP_ID;
  3197. fcport->login_retry = 0;
  3198. rval = 3;
  3199. break;
  3200. }
  3201. }
  3202. return (rval);
  3203. }
  3204. /*
  3205. * qla2x00_local_device_login
  3206. * Issue local device login command.
  3207. *
  3208. * Input:
  3209. * ha = adapter block pointer.
  3210. * loop_id = loop id of device to login to.
  3211. *
  3212. * Returns (Where's the #define!!!!):
  3213. * 0 - Login successfully
  3214. * 1 - Login failed
  3215. * 3 - Fatal error
  3216. */
  3217. int
  3218. qla2x00_local_device_login(scsi_qla_host_t *vha, fc_port_t *fcport)
  3219. {
  3220. int rval;
  3221. uint16_t mb[MAILBOX_REGISTER_COUNT];
  3222. memset(mb, 0, sizeof(mb));
  3223. rval = qla2x00_login_local_device(vha, fcport, mb, BIT_0);
  3224. if (rval == QLA_SUCCESS) {
  3225. /* Interrogate mailbox registers for any errors */
  3226. if (mb[0] == MBS_COMMAND_ERROR)
  3227. rval = 1;
  3228. else if (mb[0] == MBS_COMMAND_PARAMETER_ERROR)
  3229. /* device not in PCB table */
  3230. rval = 3;
  3231. }
  3232. return (rval);
  3233. }
  3234. /*
  3235. * qla2x00_loop_resync
  3236. * Resync with fibre channel devices.
  3237. *
  3238. * Input:
  3239. * ha = adapter block pointer.
  3240. *
  3241. * Returns:
  3242. * 0 = success
  3243. */
  3244. int
  3245. qla2x00_loop_resync(scsi_qla_host_t *vha)
  3246. {
  3247. int rval = QLA_SUCCESS;
  3248. uint32_t wait_time;
  3249. struct req_que *req;
  3250. struct rsp_que *rsp;
  3251. if (vha->hw->flags.cpu_affinity_enabled)
  3252. req = vha->hw->req_q_map[0];
  3253. else
  3254. req = vha->req;
  3255. rsp = req->rsp;
  3256. atomic_set(&vha->loop_state, LOOP_UPDATE);
  3257. clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
  3258. if (vha->flags.online) {
  3259. if (!(rval = qla2x00_fw_ready(vha))) {
  3260. /* Wait at most MAX_TARGET RSCNs for a stable link. */
  3261. wait_time = 256;
  3262. do {
  3263. atomic_set(&vha->loop_state, LOOP_UPDATE);
  3264. /* Issue a marker after FW becomes ready. */
  3265. qla2x00_marker(vha, req, rsp, 0, 0,
  3266. MK_SYNC_ALL);
  3267. vha->marker_needed = 0;
  3268. /* Remap devices on Loop. */
  3269. clear_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
  3270. qla2x00_configure_loop(vha);
  3271. wait_time--;
  3272. } while (!atomic_read(&vha->loop_down_timer) &&
  3273. !(test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags))
  3274. && wait_time && (test_bit(LOOP_RESYNC_NEEDED,
  3275. &vha->dpc_flags)));
  3276. }
  3277. }
  3278. if (test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags))
  3279. return (QLA_FUNCTION_FAILED);
  3280. if (rval)
  3281. DEBUG2_3(printk("%s(): **** FAILED ****\n", __func__));
  3282. return (rval);
  3283. }
  3284. void
  3285. qla2x00_update_fcports(scsi_qla_host_t *base_vha)
  3286. {
  3287. fc_port_t *fcport;
  3288. struct scsi_qla_host *tvp, *vha;
  3289. /* Go with deferred removal of rport references. */
  3290. list_for_each_entry_safe(vha, tvp, &base_vha->hw->vp_list, list)
  3291. list_for_each_entry(fcport, &vha->vp_fcports, list)
  3292. if (fcport && fcport->drport &&
  3293. atomic_read(&fcport->state) != FCS_UNCONFIGURED)
  3294. qla2x00_rport_del(fcport);
  3295. }
  3296. void
  3297. qla2x00_abort_isp_cleanup(scsi_qla_host_t *vha)
  3298. {
  3299. struct qla_hw_data *ha = vha->hw;
  3300. struct scsi_qla_host *vp, *base_vha = pci_get_drvdata(ha->pdev);
  3301. struct scsi_qla_host *tvp;
  3302. vha->flags.online = 0;
  3303. ha->flags.chip_reset_done = 0;
  3304. clear_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
  3305. ha->qla_stats.total_isp_aborts++;
  3306. qla_printk(KERN_INFO, ha,
  3307. "Performing ISP error recovery - ha= %p.\n", ha);
  3308. /* Chip reset does not apply to 82XX */
  3309. if (!IS_QLA82XX(ha))
  3310. ha->isp_ops->reset_chip(vha);
  3311. atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
  3312. if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
  3313. atomic_set(&vha->loop_state, LOOP_DOWN);
  3314. qla2x00_mark_all_devices_lost(vha, 0);
  3315. list_for_each_entry_safe(vp, tvp, &base_vha->hw->vp_list, list)
  3316. qla2x00_mark_all_devices_lost(vp, 0);
  3317. } else {
  3318. if (!atomic_read(&vha->loop_down_timer))
  3319. atomic_set(&vha->loop_down_timer,
  3320. LOOP_DOWN_TIME);
  3321. }
  3322. /* Make sure for ISP 82XX IO DMA is complete */
  3323. if (IS_QLA82XX(ha))
  3324. qla82xx_wait_for_pending_commands(vha);
  3325. /* Requeue all commands in outstanding command list. */
  3326. qla2x00_abort_all_cmds(vha, DID_RESET << 16);
  3327. }
  3328. /*
  3329. * qla2x00_abort_isp
  3330. * Resets ISP and aborts all outstanding commands.
  3331. *
  3332. * Input:
  3333. * ha = adapter block pointer.
  3334. *
  3335. * Returns:
  3336. * 0 = success
  3337. */
  3338. int
  3339. qla2x00_abort_isp(scsi_qla_host_t *vha)
  3340. {
  3341. int rval;
  3342. uint8_t status = 0;
  3343. struct qla_hw_data *ha = vha->hw;
  3344. struct scsi_qla_host *vp;
  3345. struct scsi_qla_host *tvp;
  3346. struct req_que *req = ha->req_q_map[0];
  3347. if (vha->flags.online) {
  3348. qla2x00_abort_isp_cleanup(vha);
  3349. if (unlikely(pci_channel_offline(ha->pdev) &&
  3350. ha->flags.pci_channel_io_perm_failure)) {
  3351. clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
  3352. status = 0;
  3353. return status;
  3354. }
  3355. ha->isp_ops->get_flash_version(vha, req->ring);
  3356. ha->isp_ops->nvram_config(vha);
  3357. if (!qla2x00_restart_isp(vha)) {
  3358. clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
  3359. if (!atomic_read(&vha->loop_down_timer)) {
  3360. /*
  3361. * Issue marker command only when we are going
  3362. * to start the I/O .
  3363. */
  3364. vha->marker_needed = 1;
  3365. }
  3366. vha->flags.online = 1;
  3367. ha->isp_ops->enable_intrs(ha);
  3368. ha->isp_abort_cnt = 0;
  3369. clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
  3370. if (IS_QLA81XX(ha))
  3371. qla2x00_get_fw_version(vha,
  3372. &ha->fw_major_version,
  3373. &ha->fw_minor_version,
  3374. &ha->fw_subminor_version,
  3375. &ha->fw_attributes, &ha->fw_memory_size,
  3376. ha->mpi_version, &ha->mpi_capabilities,
  3377. ha->phy_version);
  3378. if (ha->fce) {
  3379. ha->flags.fce_enabled = 1;
  3380. memset(ha->fce, 0,
  3381. fce_calc_size(ha->fce_bufs));
  3382. rval = qla2x00_enable_fce_trace(vha,
  3383. ha->fce_dma, ha->fce_bufs, ha->fce_mb,
  3384. &ha->fce_bufs);
  3385. if (rval) {
  3386. qla_printk(KERN_WARNING, ha,
  3387. "Unable to reinitialize FCE "
  3388. "(%d).\n", rval);
  3389. ha->flags.fce_enabled = 0;
  3390. }
  3391. }
  3392. if (ha->eft) {
  3393. memset(ha->eft, 0, EFT_SIZE);
  3394. rval = qla2x00_enable_eft_trace(vha,
  3395. ha->eft_dma, EFT_NUM_BUFFERS);
  3396. if (rval) {
  3397. qla_printk(KERN_WARNING, ha,
  3398. "Unable to reinitialize EFT "
  3399. "(%d).\n", rval);
  3400. }
  3401. }
  3402. } else { /* failed the ISP abort */
  3403. vha->flags.online = 1;
  3404. if (test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) {
  3405. if (ha->isp_abort_cnt == 0) {
  3406. qla_printk(KERN_WARNING, ha,
  3407. "ISP error recovery failed - "
  3408. "board disabled\n");
  3409. /*
  3410. * The next call disables the board
  3411. * completely.
  3412. */
  3413. ha->isp_ops->reset_adapter(vha);
  3414. vha->flags.online = 0;
  3415. clear_bit(ISP_ABORT_RETRY,
  3416. &vha->dpc_flags);
  3417. status = 0;
  3418. } else { /* schedule another ISP abort */
  3419. ha->isp_abort_cnt--;
  3420. DEBUG(printk("qla%ld: ISP abort - "
  3421. "retry remaining %d\n",
  3422. vha->host_no, ha->isp_abort_cnt));
  3423. status = 1;
  3424. }
  3425. } else {
  3426. ha->isp_abort_cnt = MAX_RETRIES_OF_ISP_ABORT;
  3427. DEBUG(printk("qla2x00(%ld): ISP error recovery "
  3428. "- retrying (%d) more times\n",
  3429. vha->host_no, ha->isp_abort_cnt));
  3430. set_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
  3431. status = 1;
  3432. }
  3433. }
  3434. }
  3435. if (!status) {
  3436. DEBUG(printk(KERN_INFO
  3437. "qla2x00_abort_isp(%ld): succeeded.\n",
  3438. vha->host_no));
  3439. list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) {
  3440. if (vp->vp_idx)
  3441. qla2x00_vp_abort_isp(vp);
  3442. }
  3443. } else {
  3444. qla_printk(KERN_INFO, ha,
  3445. "qla2x00_abort_isp: **** FAILED ****\n");
  3446. }
  3447. return(status);
  3448. }
  3449. /*
  3450. * qla2x00_restart_isp
  3451. * restarts the ISP after a reset
  3452. *
  3453. * Input:
  3454. * ha = adapter block pointer.
  3455. *
  3456. * Returns:
  3457. * 0 = success
  3458. */
  3459. static int
  3460. qla2x00_restart_isp(scsi_qla_host_t *vha)
  3461. {
  3462. int status = 0;
  3463. uint32_t wait_time;
  3464. struct qla_hw_data *ha = vha->hw;
  3465. struct req_que *req = ha->req_q_map[0];
  3466. struct rsp_que *rsp = ha->rsp_q_map[0];
  3467. /* If firmware needs to be loaded */
  3468. if (qla2x00_isp_firmware(vha)) {
  3469. vha->flags.online = 0;
  3470. status = ha->isp_ops->chip_diag(vha);
  3471. if (!status)
  3472. status = qla2x00_setup_chip(vha);
  3473. }
  3474. if (!status && !(status = qla2x00_init_rings(vha))) {
  3475. clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
  3476. ha->flags.chip_reset_done = 1;
  3477. /* Initialize the queues in use */
  3478. qla25xx_init_queues(ha);
  3479. status = qla2x00_fw_ready(vha);
  3480. if (!status) {
  3481. DEBUG(printk("%s(): Start configure loop, "
  3482. "status = %d\n", __func__, status));
  3483. /* Issue a marker after FW becomes ready. */
  3484. qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL);
  3485. vha->flags.online = 1;
  3486. /* Wait at most MAX_TARGET RSCNs for a stable link. */
  3487. wait_time = 256;
  3488. do {
  3489. clear_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
  3490. qla2x00_configure_loop(vha);
  3491. wait_time--;
  3492. } while (!atomic_read(&vha->loop_down_timer) &&
  3493. !(test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags))
  3494. && wait_time && (test_bit(LOOP_RESYNC_NEEDED,
  3495. &vha->dpc_flags)));
  3496. }
  3497. /* if no cable then assume it's good */
  3498. if ((vha->device_flags & DFLG_NO_CABLE))
  3499. status = 0;
  3500. DEBUG(printk("%s(): Configure loop done, status = 0x%x\n",
  3501. __func__,
  3502. status));
  3503. }
  3504. return (status);
  3505. }
  3506. static int
  3507. qla25xx_init_queues(struct qla_hw_data *ha)
  3508. {
  3509. struct rsp_que *rsp = NULL;
  3510. struct req_que *req = NULL;
  3511. struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
  3512. int ret = -1;
  3513. int i;
  3514. for (i = 1; i < ha->max_rsp_queues; i++) {
  3515. rsp = ha->rsp_q_map[i];
  3516. if (rsp) {
  3517. rsp->options &= ~BIT_0;
  3518. ret = qla25xx_init_rsp_que(base_vha, rsp);
  3519. if (ret != QLA_SUCCESS)
  3520. DEBUG2_17(printk(KERN_WARNING
  3521. "%s Rsp que:%d init failed\n", __func__,
  3522. rsp->id));
  3523. else
  3524. DEBUG2_17(printk(KERN_INFO
  3525. "%s Rsp que:%d inited\n", __func__,
  3526. rsp->id));
  3527. }
  3528. }
  3529. for (i = 1; i < ha->max_req_queues; i++) {
  3530. req = ha->req_q_map[i];
  3531. if (req) {
  3532. /* Clear outstanding commands array. */
  3533. req->options &= ~BIT_0;
  3534. ret = qla25xx_init_req_que(base_vha, req);
  3535. if (ret != QLA_SUCCESS)
  3536. DEBUG2_17(printk(KERN_WARNING
  3537. "%s Req que:%d init failed\n", __func__,
  3538. req->id));
  3539. else
  3540. DEBUG2_17(printk(KERN_WARNING
  3541. "%s Req que:%d inited\n", __func__,
  3542. req->id));
  3543. }
  3544. }
  3545. return ret;
  3546. }
  3547. /*
  3548. * qla2x00_reset_adapter
  3549. * Reset adapter.
  3550. *
  3551. * Input:
  3552. * ha = adapter block pointer.
  3553. */
  3554. void
  3555. qla2x00_reset_adapter(scsi_qla_host_t *vha)
  3556. {
  3557. unsigned long flags = 0;
  3558. struct qla_hw_data *ha = vha->hw;
  3559. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  3560. vha->flags.online = 0;
  3561. ha->isp_ops->disable_intrs(ha);
  3562. spin_lock_irqsave(&ha->hardware_lock, flags);
  3563. WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
  3564. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  3565. WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
  3566. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  3567. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  3568. }
  3569. void
  3570. qla24xx_reset_adapter(scsi_qla_host_t *vha)
  3571. {
  3572. unsigned long flags = 0;
  3573. struct qla_hw_data *ha = vha->hw;
  3574. struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
  3575. if (IS_QLA82XX(ha))
  3576. return;
  3577. vha->flags.online = 0;
  3578. ha->isp_ops->disable_intrs(ha);
  3579. spin_lock_irqsave(&ha->hardware_lock, flags);
  3580. WRT_REG_DWORD(&reg->hccr, HCCRX_SET_RISC_RESET);
  3581. RD_REG_DWORD(&reg->hccr);
  3582. WRT_REG_DWORD(&reg->hccr, HCCRX_REL_RISC_PAUSE);
  3583. RD_REG_DWORD(&reg->hccr);
  3584. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  3585. if (IS_NOPOLLING_TYPE(ha))
  3586. ha->isp_ops->enable_intrs(ha);
  3587. }
  3588. /* On sparc systems, obtain port and node WWN from firmware
  3589. * properties.
  3590. */
  3591. static void qla24xx_nvram_wwn_from_ofw(scsi_qla_host_t *vha,
  3592. struct nvram_24xx *nv)
  3593. {
  3594. #ifdef CONFIG_SPARC
  3595. struct qla_hw_data *ha = vha->hw;
  3596. struct pci_dev *pdev = ha->pdev;
  3597. struct device_node *dp = pci_device_to_OF_node(pdev);
  3598. const u8 *val;
  3599. int len;
  3600. val = of_get_property(dp, "port-wwn", &len);
  3601. if (val && len >= WWN_SIZE)
  3602. memcpy(nv->port_name, val, WWN_SIZE);
  3603. val = of_get_property(dp, "node-wwn", &len);
  3604. if (val && len >= WWN_SIZE)
  3605. memcpy(nv->node_name, val, WWN_SIZE);
  3606. #endif
  3607. }
  3608. int
  3609. qla24xx_nvram_config(scsi_qla_host_t *vha)
  3610. {
  3611. int rval;
  3612. struct init_cb_24xx *icb;
  3613. struct nvram_24xx *nv;
  3614. uint32_t *dptr;
  3615. uint8_t *dptr1, *dptr2;
  3616. uint32_t chksum;
  3617. uint16_t cnt;
  3618. struct qla_hw_data *ha = vha->hw;
  3619. rval = QLA_SUCCESS;
  3620. icb = (struct init_cb_24xx *)ha->init_cb;
  3621. nv = ha->nvram;
  3622. /* Determine NVRAM starting address. */
  3623. if (ha->flags.port0) {
  3624. ha->nvram_base = FA_NVRAM_FUNC0_ADDR;
  3625. ha->vpd_base = FA_NVRAM_VPD0_ADDR;
  3626. } else {
  3627. ha->nvram_base = FA_NVRAM_FUNC1_ADDR;
  3628. ha->vpd_base = FA_NVRAM_VPD1_ADDR;
  3629. }
  3630. ha->nvram_size = sizeof(struct nvram_24xx);
  3631. ha->vpd_size = FA_NVRAM_VPD_SIZE;
  3632. if (IS_QLA82XX(ha))
  3633. ha->vpd_size = FA_VPD_SIZE_82XX;
  3634. /* Get VPD data into cache */
  3635. ha->vpd = ha->nvram + VPD_OFFSET;
  3636. ha->isp_ops->read_nvram(vha, (uint8_t *)ha->vpd,
  3637. ha->nvram_base - FA_NVRAM_FUNC0_ADDR, FA_NVRAM_VPD_SIZE * 4);
  3638. /* Get NVRAM data into cache and calculate checksum. */
  3639. dptr = (uint32_t *)nv;
  3640. ha->isp_ops->read_nvram(vha, (uint8_t *)dptr, ha->nvram_base,
  3641. ha->nvram_size);
  3642. for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++)
  3643. chksum += le32_to_cpu(*dptr++);
  3644. DEBUG5(printk("scsi(%ld): Contents of NVRAM\n", vha->host_no));
  3645. DEBUG5(qla2x00_dump_buffer((uint8_t *)nv, ha->nvram_size));
  3646. /* Bad NVRAM data, set defaults parameters. */
  3647. if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || nv->id[2] != 'P'
  3648. || nv->id[3] != ' ' ||
  3649. nv->nvram_version < __constant_cpu_to_le16(ICB_VERSION)) {
  3650. /* Reset NVRAM data. */
  3651. qla_printk(KERN_WARNING, ha, "Inconsistent NVRAM detected: "
  3652. "checksum=0x%x id=%c version=0x%x.\n", chksum, nv->id[0],
  3653. le16_to_cpu(nv->nvram_version));
  3654. qla_printk(KERN_WARNING, ha, "Falling back to functioning (yet "
  3655. "invalid -- WWPN) defaults.\n");
  3656. /*
  3657. * Set default initialization control block.
  3658. */
  3659. memset(nv, 0, ha->nvram_size);
  3660. nv->nvram_version = __constant_cpu_to_le16(ICB_VERSION);
  3661. nv->version = __constant_cpu_to_le16(ICB_VERSION);
  3662. nv->frame_payload_size = __constant_cpu_to_le16(2048);
  3663. nv->execution_throttle = __constant_cpu_to_le16(0xFFFF);
  3664. nv->exchange_count = __constant_cpu_to_le16(0);
  3665. nv->hard_address = __constant_cpu_to_le16(124);
  3666. nv->port_name[0] = 0x21;
  3667. nv->port_name[1] = 0x00 + ha->port_no;
  3668. nv->port_name[2] = 0x00;
  3669. nv->port_name[3] = 0xe0;
  3670. nv->port_name[4] = 0x8b;
  3671. nv->port_name[5] = 0x1c;
  3672. nv->port_name[6] = 0x55;
  3673. nv->port_name[7] = 0x86;
  3674. nv->node_name[0] = 0x20;
  3675. nv->node_name[1] = 0x00;
  3676. nv->node_name[2] = 0x00;
  3677. nv->node_name[3] = 0xe0;
  3678. nv->node_name[4] = 0x8b;
  3679. nv->node_name[5] = 0x1c;
  3680. nv->node_name[6] = 0x55;
  3681. nv->node_name[7] = 0x86;
  3682. qla24xx_nvram_wwn_from_ofw(vha, nv);
  3683. nv->login_retry_count = __constant_cpu_to_le16(8);
  3684. nv->interrupt_delay_timer = __constant_cpu_to_le16(0);
  3685. nv->login_timeout = __constant_cpu_to_le16(0);
  3686. nv->firmware_options_1 =
  3687. __constant_cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1);
  3688. nv->firmware_options_2 = __constant_cpu_to_le32(2 << 4);
  3689. nv->firmware_options_2 |= __constant_cpu_to_le32(BIT_12);
  3690. nv->firmware_options_3 = __constant_cpu_to_le32(2 << 13);
  3691. nv->host_p = __constant_cpu_to_le32(BIT_11|BIT_10);
  3692. nv->efi_parameters = __constant_cpu_to_le32(0);
  3693. nv->reset_delay = 5;
  3694. nv->max_luns_per_target = __constant_cpu_to_le16(128);
  3695. nv->port_down_retry_count = __constant_cpu_to_le16(30);
  3696. nv->link_down_timeout = __constant_cpu_to_le16(30);
  3697. rval = 1;
  3698. }
  3699. /* Reset Initialization control block */
  3700. memset(icb, 0, ha->init_cb_size);
  3701. /* Copy 1st segment. */
  3702. dptr1 = (uint8_t *)icb;
  3703. dptr2 = (uint8_t *)&nv->version;
  3704. cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version;
  3705. while (cnt--)
  3706. *dptr1++ = *dptr2++;
  3707. icb->login_retry_count = nv->login_retry_count;
  3708. icb->link_down_on_nos = nv->link_down_on_nos;
  3709. /* Copy 2nd segment. */
  3710. dptr1 = (uint8_t *)&icb->interrupt_delay_timer;
  3711. dptr2 = (uint8_t *)&nv->interrupt_delay_timer;
  3712. cnt = (uint8_t *)&icb->reserved_3 -
  3713. (uint8_t *)&icb->interrupt_delay_timer;
  3714. while (cnt--)
  3715. *dptr1++ = *dptr2++;
  3716. /*
  3717. * Setup driver NVRAM options.
  3718. */
  3719. qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name),
  3720. "QLA2462");
  3721. /* Use alternate WWN? */
  3722. if (nv->host_p & __constant_cpu_to_le32(BIT_15)) {
  3723. memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
  3724. memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
  3725. }
  3726. /* Prepare nodename */
  3727. if ((icb->firmware_options_1 & __constant_cpu_to_le32(BIT_14)) == 0) {
  3728. /*
  3729. * Firmware will apply the following mask if the nodename was
  3730. * not provided.
  3731. */
  3732. memcpy(icb->node_name, icb->port_name, WWN_SIZE);
  3733. icb->node_name[0] &= 0xF0;
  3734. }
  3735. /* Set host adapter parameters. */
  3736. ha->flags.disable_risc_code_load = 0;
  3737. ha->flags.enable_lip_reset = 0;
  3738. ha->flags.enable_lip_full_login =
  3739. le32_to_cpu(nv->host_p) & BIT_10 ? 1: 0;
  3740. ha->flags.enable_target_reset =
  3741. le32_to_cpu(nv->host_p) & BIT_11 ? 1: 0;
  3742. ha->flags.enable_led_scheme = 0;
  3743. ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1: 0;
  3744. ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) &
  3745. (BIT_6 | BIT_5 | BIT_4)) >> 4;
  3746. memcpy(ha->fw_seriallink_options24, nv->seriallink_options,
  3747. sizeof(ha->fw_seriallink_options24));
  3748. /* save HBA serial number */
  3749. ha->serial0 = icb->port_name[5];
  3750. ha->serial1 = icb->port_name[6];
  3751. ha->serial2 = icb->port_name[7];
  3752. memcpy(vha->node_name, icb->node_name, WWN_SIZE);
  3753. memcpy(vha->port_name, icb->port_name, WWN_SIZE);
  3754. icb->execution_throttle = __constant_cpu_to_le16(0xFFFF);
  3755. ha->retry_count = le16_to_cpu(nv->login_retry_count);
  3756. /* Set minimum login_timeout to 4 seconds. */
  3757. if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout)
  3758. nv->login_timeout = cpu_to_le16(ql2xlogintimeout);
  3759. if (le16_to_cpu(nv->login_timeout) < 4)
  3760. nv->login_timeout = __constant_cpu_to_le16(4);
  3761. ha->login_timeout = le16_to_cpu(nv->login_timeout);
  3762. icb->login_timeout = nv->login_timeout;
  3763. /* Set minimum RATOV to 100 tenths of a second. */
  3764. ha->r_a_tov = 100;
  3765. ha->loop_reset_delay = nv->reset_delay;
  3766. /* Link Down Timeout = 0:
  3767. *
  3768. * When Port Down timer expires we will start returning
  3769. * I/O's to OS with "DID_NO_CONNECT".
  3770. *
  3771. * Link Down Timeout != 0:
  3772. *
  3773. * The driver waits for the link to come up after link down
  3774. * before returning I/Os to OS with "DID_NO_CONNECT".
  3775. */
  3776. if (le16_to_cpu(nv->link_down_timeout) == 0) {
  3777. ha->loop_down_abort_time =
  3778. (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
  3779. } else {
  3780. ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout);
  3781. ha->loop_down_abort_time =
  3782. (LOOP_DOWN_TIME - ha->link_down_timeout);
  3783. }
  3784. /* Need enough time to try and get the port back. */
  3785. ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count);
  3786. if (qlport_down_retry)
  3787. ha->port_down_retry_count = qlport_down_retry;
  3788. /* Set login_retry_count */
  3789. ha->login_retry_count = le16_to_cpu(nv->login_retry_count);
  3790. if (ha->port_down_retry_count ==
  3791. le16_to_cpu(nv->port_down_retry_count) &&
  3792. ha->port_down_retry_count > 3)
  3793. ha->login_retry_count = ha->port_down_retry_count;
  3794. else if (ha->port_down_retry_count > (int)ha->login_retry_count)
  3795. ha->login_retry_count = ha->port_down_retry_count;
  3796. if (ql2xloginretrycount)
  3797. ha->login_retry_count = ql2xloginretrycount;
  3798. /* Enable ZIO. */
  3799. if (!vha->flags.init_done) {
  3800. ha->zio_mode = le32_to_cpu(icb->firmware_options_2) &
  3801. (BIT_3 | BIT_2 | BIT_1 | BIT_0);
  3802. ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ?
  3803. le16_to_cpu(icb->interrupt_delay_timer): 2;
  3804. }
  3805. icb->firmware_options_2 &= __constant_cpu_to_le32(
  3806. ~(BIT_3 | BIT_2 | BIT_1 | BIT_0));
  3807. vha->flags.process_response_queue = 0;
  3808. if (ha->zio_mode != QLA_ZIO_DISABLED) {
  3809. ha->zio_mode = QLA_ZIO_MODE_6;
  3810. DEBUG2(printk("scsi(%ld): ZIO mode %d enabled; timer delay "
  3811. "(%d us).\n", vha->host_no, ha->zio_mode,
  3812. ha->zio_timer * 100));
  3813. qla_printk(KERN_INFO, ha,
  3814. "ZIO mode %d enabled; timer delay (%d us).\n",
  3815. ha->zio_mode, ha->zio_timer * 100);
  3816. icb->firmware_options_2 |= cpu_to_le32(
  3817. (uint32_t)ha->zio_mode);
  3818. icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer);
  3819. vha->flags.process_response_queue = 1;
  3820. }
  3821. if (rval) {
  3822. DEBUG2_3(printk(KERN_WARNING
  3823. "scsi(%ld): NVRAM configuration failed!\n", vha->host_no));
  3824. }
  3825. return (rval);
  3826. }
  3827. static int
  3828. qla24xx_load_risc_flash(scsi_qla_host_t *vha, uint32_t *srisc_addr,
  3829. uint32_t faddr)
  3830. {
  3831. int rval = QLA_SUCCESS;
  3832. int segments, fragment;
  3833. uint32_t *dcode, dlen;
  3834. uint32_t risc_addr;
  3835. uint32_t risc_size;
  3836. uint32_t i;
  3837. struct qla_hw_data *ha = vha->hw;
  3838. struct req_que *req = ha->req_q_map[0];
  3839. qla_printk(KERN_INFO, ha,
  3840. "FW: Loading from flash (%x)...\n", faddr);
  3841. rval = QLA_SUCCESS;
  3842. segments = FA_RISC_CODE_SEGMENTS;
  3843. dcode = (uint32_t *)req->ring;
  3844. *srisc_addr = 0;
  3845. /* Validate firmware image by checking version. */
  3846. qla24xx_read_flash_data(vha, dcode, faddr + 4, 4);
  3847. for (i = 0; i < 4; i++)
  3848. dcode[i] = be32_to_cpu(dcode[i]);
  3849. if ((dcode[0] == 0xffffffff && dcode[1] == 0xffffffff &&
  3850. dcode[2] == 0xffffffff && dcode[3] == 0xffffffff) ||
  3851. (dcode[0] == 0 && dcode[1] == 0 && dcode[2] == 0 &&
  3852. dcode[3] == 0)) {
  3853. qla_printk(KERN_WARNING, ha,
  3854. "Unable to verify integrity of flash firmware image!\n");
  3855. qla_printk(KERN_WARNING, ha,
  3856. "Firmware data: %08x %08x %08x %08x!\n", dcode[0],
  3857. dcode[1], dcode[2], dcode[3]);
  3858. return QLA_FUNCTION_FAILED;
  3859. }
  3860. while (segments && rval == QLA_SUCCESS) {
  3861. /* Read segment's load information. */
  3862. qla24xx_read_flash_data(vha, dcode, faddr, 4);
  3863. risc_addr = be32_to_cpu(dcode[2]);
  3864. *srisc_addr = *srisc_addr == 0 ? risc_addr : *srisc_addr;
  3865. risc_size = be32_to_cpu(dcode[3]);
  3866. fragment = 0;
  3867. while (risc_size > 0 && rval == QLA_SUCCESS) {
  3868. dlen = (uint32_t)(ha->fw_transfer_size >> 2);
  3869. if (dlen > risc_size)
  3870. dlen = risc_size;
  3871. DEBUG7(printk("scsi(%ld): Loading risc segment@ risc "
  3872. "addr %x, number of dwords 0x%x, offset 0x%x.\n",
  3873. vha->host_no, risc_addr, dlen, faddr));
  3874. qla24xx_read_flash_data(vha, dcode, faddr, dlen);
  3875. for (i = 0; i < dlen; i++)
  3876. dcode[i] = swab32(dcode[i]);
  3877. rval = qla2x00_load_ram(vha, req->dma, risc_addr,
  3878. dlen);
  3879. if (rval) {
  3880. DEBUG(printk("scsi(%ld):[ERROR] Failed to load "
  3881. "segment %d of firmware\n", vha->host_no,
  3882. fragment));
  3883. qla_printk(KERN_WARNING, ha,
  3884. "[ERROR] Failed to load segment %d of "
  3885. "firmware\n", fragment);
  3886. break;
  3887. }
  3888. faddr += dlen;
  3889. risc_addr += dlen;
  3890. risc_size -= dlen;
  3891. fragment++;
  3892. }
  3893. /* Next segment. */
  3894. segments--;
  3895. }
  3896. return rval;
  3897. }
  3898. #define QLA_FW_URL "ftp://ftp.qlogic.com/outgoing/linux/firmware/"
  3899. int
  3900. qla2x00_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr)
  3901. {
  3902. int rval;
  3903. int i, fragment;
  3904. uint16_t *wcode, *fwcode;
  3905. uint32_t risc_addr, risc_size, fwclen, wlen, *seg;
  3906. struct fw_blob *blob;
  3907. struct qla_hw_data *ha = vha->hw;
  3908. struct req_que *req = ha->req_q_map[0];
  3909. /* Load firmware blob. */
  3910. blob = qla2x00_request_firmware(vha);
  3911. if (!blob) {
  3912. qla_printk(KERN_ERR, ha, "Firmware image unavailable.\n");
  3913. qla_printk(KERN_ERR, ha, "Firmware images can be retrieved "
  3914. "from: " QLA_FW_URL ".\n");
  3915. return QLA_FUNCTION_FAILED;
  3916. }
  3917. rval = QLA_SUCCESS;
  3918. wcode = (uint16_t *)req->ring;
  3919. *srisc_addr = 0;
  3920. fwcode = (uint16_t *)blob->fw->data;
  3921. fwclen = 0;
  3922. /* Validate firmware image by checking version. */
  3923. if (blob->fw->size < 8 * sizeof(uint16_t)) {
  3924. qla_printk(KERN_WARNING, ha,
  3925. "Unable to verify integrity of firmware image (%Zd)!\n",
  3926. blob->fw->size);
  3927. goto fail_fw_integrity;
  3928. }
  3929. for (i = 0; i < 4; i++)
  3930. wcode[i] = be16_to_cpu(fwcode[i + 4]);
  3931. if ((wcode[0] == 0xffff && wcode[1] == 0xffff && wcode[2] == 0xffff &&
  3932. wcode[3] == 0xffff) || (wcode[0] == 0 && wcode[1] == 0 &&
  3933. wcode[2] == 0 && wcode[3] == 0)) {
  3934. qla_printk(KERN_WARNING, ha,
  3935. "Unable to verify integrity of firmware image!\n");
  3936. qla_printk(KERN_WARNING, ha,
  3937. "Firmware data: %04x %04x %04x %04x!\n", wcode[0],
  3938. wcode[1], wcode[2], wcode[3]);
  3939. goto fail_fw_integrity;
  3940. }
  3941. seg = blob->segs;
  3942. while (*seg && rval == QLA_SUCCESS) {
  3943. risc_addr = *seg;
  3944. *srisc_addr = *srisc_addr == 0 ? *seg : *srisc_addr;
  3945. risc_size = be16_to_cpu(fwcode[3]);
  3946. /* Validate firmware image size. */
  3947. fwclen += risc_size * sizeof(uint16_t);
  3948. if (blob->fw->size < fwclen) {
  3949. qla_printk(KERN_WARNING, ha,
  3950. "Unable to verify integrity of firmware image "
  3951. "(%Zd)!\n", blob->fw->size);
  3952. goto fail_fw_integrity;
  3953. }
  3954. fragment = 0;
  3955. while (risc_size > 0 && rval == QLA_SUCCESS) {
  3956. wlen = (uint16_t)(ha->fw_transfer_size >> 1);
  3957. if (wlen > risc_size)
  3958. wlen = risc_size;
  3959. DEBUG7(printk("scsi(%ld): Loading risc segment@ risc "
  3960. "addr %x, number of words 0x%x.\n", vha->host_no,
  3961. risc_addr, wlen));
  3962. for (i = 0; i < wlen; i++)
  3963. wcode[i] = swab16(fwcode[i]);
  3964. rval = qla2x00_load_ram(vha, req->dma, risc_addr,
  3965. wlen);
  3966. if (rval) {
  3967. DEBUG(printk("scsi(%ld):[ERROR] Failed to load "
  3968. "segment %d of firmware\n", vha->host_no,
  3969. fragment));
  3970. qla_printk(KERN_WARNING, ha,
  3971. "[ERROR] Failed to load segment %d of "
  3972. "firmware\n", fragment);
  3973. break;
  3974. }
  3975. fwcode += wlen;
  3976. risc_addr += wlen;
  3977. risc_size -= wlen;
  3978. fragment++;
  3979. }
  3980. /* Next segment. */
  3981. seg++;
  3982. }
  3983. return rval;
  3984. fail_fw_integrity:
  3985. return QLA_FUNCTION_FAILED;
  3986. }
  3987. static int
  3988. qla24xx_load_risc_blob(scsi_qla_host_t *vha, uint32_t *srisc_addr)
  3989. {
  3990. int rval;
  3991. int segments, fragment;
  3992. uint32_t *dcode, dlen;
  3993. uint32_t risc_addr;
  3994. uint32_t risc_size;
  3995. uint32_t i;
  3996. struct fw_blob *blob;
  3997. uint32_t *fwcode, fwclen;
  3998. struct qla_hw_data *ha = vha->hw;
  3999. struct req_que *req = ha->req_q_map[0];
  4000. /* Load firmware blob. */
  4001. blob = qla2x00_request_firmware(vha);
  4002. if (!blob) {
  4003. qla_printk(KERN_ERR, ha, "Firmware image unavailable.\n");
  4004. qla_printk(KERN_ERR, ha, "Firmware images can be retrieved "
  4005. "from: " QLA_FW_URL ".\n");
  4006. return QLA_FUNCTION_FAILED;
  4007. }
  4008. qla_printk(KERN_INFO, ha,
  4009. "FW: Loading via request-firmware...\n");
  4010. rval = QLA_SUCCESS;
  4011. segments = FA_RISC_CODE_SEGMENTS;
  4012. dcode = (uint32_t *)req->ring;
  4013. *srisc_addr = 0;
  4014. fwcode = (uint32_t *)blob->fw->data;
  4015. fwclen = 0;
  4016. /* Validate firmware image by checking version. */
  4017. if (blob->fw->size < 8 * sizeof(uint32_t)) {
  4018. qla_printk(KERN_WARNING, ha,
  4019. "Unable to verify integrity of firmware image (%Zd)!\n",
  4020. blob->fw->size);
  4021. goto fail_fw_integrity;
  4022. }
  4023. for (i = 0; i < 4; i++)
  4024. dcode[i] = be32_to_cpu(fwcode[i + 4]);
  4025. if ((dcode[0] == 0xffffffff && dcode[1] == 0xffffffff &&
  4026. dcode[2] == 0xffffffff && dcode[3] == 0xffffffff) ||
  4027. (dcode[0] == 0 && dcode[1] == 0 && dcode[2] == 0 &&
  4028. dcode[3] == 0)) {
  4029. qla_printk(KERN_WARNING, ha,
  4030. "Unable to verify integrity of firmware image!\n");
  4031. qla_printk(KERN_WARNING, ha,
  4032. "Firmware data: %08x %08x %08x %08x!\n", dcode[0],
  4033. dcode[1], dcode[2], dcode[3]);
  4034. goto fail_fw_integrity;
  4035. }
  4036. while (segments && rval == QLA_SUCCESS) {
  4037. risc_addr = be32_to_cpu(fwcode[2]);
  4038. *srisc_addr = *srisc_addr == 0 ? risc_addr : *srisc_addr;
  4039. risc_size = be32_to_cpu(fwcode[3]);
  4040. /* Validate firmware image size. */
  4041. fwclen += risc_size * sizeof(uint32_t);
  4042. if (blob->fw->size < fwclen) {
  4043. qla_printk(KERN_WARNING, ha,
  4044. "Unable to verify integrity of firmware image "
  4045. "(%Zd)!\n", blob->fw->size);
  4046. goto fail_fw_integrity;
  4047. }
  4048. fragment = 0;
  4049. while (risc_size > 0 && rval == QLA_SUCCESS) {
  4050. dlen = (uint32_t)(ha->fw_transfer_size >> 2);
  4051. if (dlen > risc_size)
  4052. dlen = risc_size;
  4053. DEBUG7(printk("scsi(%ld): Loading risc segment@ risc "
  4054. "addr %x, number of dwords 0x%x.\n", vha->host_no,
  4055. risc_addr, dlen));
  4056. for (i = 0; i < dlen; i++)
  4057. dcode[i] = swab32(fwcode[i]);
  4058. rval = qla2x00_load_ram(vha, req->dma, risc_addr,
  4059. dlen);
  4060. if (rval) {
  4061. DEBUG(printk("scsi(%ld):[ERROR] Failed to load "
  4062. "segment %d of firmware\n", vha->host_no,
  4063. fragment));
  4064. qla_printk(KERN_WARNING, ha,
  4065. "[ERROR] Failed to load segment %d of "
  4066. "firmware\n", fragment);
  4067. break;
  4068. }
  4069. fwcode += dlen;
  4070. risc_addr += dlen;
  4071. risc_size -= dlen;
  4072. fragment++;
  4073. }
  4074. /* Next segment. */
  4075. segments--;
  4076. }
  4077. return rval;
  4078. fail_fw_integrity:
  4079. return QLA_FUNCTION_FAILED;
  4080. }
  4081. int
  4082. qla24xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr)
  4083. {
  4084. int rval;
  4085. if (ql2xfwloadbin == 1)
  4086. return qla81xx_load_risc(vha, srisc_addr);
  4087. /*
  4088. * FW Load priority:
  4089. * 1) Firmware via request-firmware interface (.bin file).
  4090. * 2) Firmware residing in flash.
  4091. */
  4092. rval = qla24xx_load_risc_blob(vha, srisc_addr);
  4093. if (rval == QLA_SUCCESS)
  4094. return rval;
  4095. return qla24xx_load_risc_flash(vha, srisc_addr,
  4096. vha->hw->flt_region_fw);
  4097. }
  4098. int
  4099. qla81xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr)
  4100. {
  4101. int rval;
  4102. struct qla_hw_data *ha = vha->hw;
  4103. if (ql2xfwloadbin == 2)
  4104. goto try_blob_fw;
  4105. /*
  4106. * FW Load priority:
  4107. * 1) Firmware residing in flash.
  4108. * 2) Firmware via request-firmware interface (.bin file).
  4109. * 3) Golden-Firmware residing in flash -- limited operation.
  4110. */
  4111. rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_fw);
  4112. if (rval == QLA_SUCCESS)
  4113. return rval;
  4114. try_blob_fw:
  4115. rval = qla24xx_load_risc_blob(vha, srisc_addr);
  4116. if (rval == QLA_SUCCESS || !ha->flt_region_gold_fw)
  4117. return rval;
  4118. qla_printk(KERN_ERR, ha,
  4119. "FW: Attempting to fallback to golden firmware...\n");
  4120. rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_gold_fw);
  4121. if (rval != QLA_SUCCESS)
  4122. return rval;
  4123. qla_printk(KERN_ERR, ha,
  4124. "FW: Please update operational firmware...\n");
  4125. ha->flags.running_gold_fw = 1;
  4126. return rval;
  4127. }
  4128. void
  4129. qla2x00_try_to_stop_firmware(scsi_qla_host_t *vha)
  4130. {
  4131. int ret, retries;
  4132. struct qla_hw_data *ha = vha->hw;
  4133. if (ha->flags.pci_channel_io_perm_failure)
  4134. return;
  4135. if (!IS_FWI2_CAPABLE(ha))
  4136. return;
  4137. if (!ha->fw_major_version)
  4138. return;
  4139. ret = qla2x00_stop_firmware(vha);
  4140. for (retries = 5; ret != QLA_SUCCESS && ret != QLA_FUNCTION_TIMEOUT &&
  4141. ret != QLA_INVALID_COMMAND && retries ; retries--) {
  4142. ha->isp_ops->reset_chip(vha);
  4143. if (ha->isp_ops->chip_diag(vha) != QLA_SUCCESS)
  4144. continue;
  4145. if (qla2x00_setup_chip(vha) != QLA_SUCCESS)
  4146. continue;
  4147. qla_printk(KERN_INFO, ha,
  4148. "Attempting retry of stop-firmware command...\n");
  4149. ret = qla2x00_stop_firmware(vha);
  4150. }
  4151. }
  4152. int
  4153. qla24xx_configure_vhba(scsi_qla_host_t *vha)
  4154. {
  4155. int rval = QLA_SUCCESS;
  4156. uint16_t mb[MAILBOX_REGISTER_COUNT];
  4157. struct qla_hw_data *ha = vha->hw;
  4158. struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
  4159. struct req_que *req;
  4160. struct rsp_que *rsp;
  4161. if (!vha->vp_idx)
  4162. return -EINVAL;
  4163. rval = qla2x00_fw_ready(base_vha);
  4164. if (ha->flags.cpu_affinity_enabled)
  4165. req = ha->req_q_map[0];
  4166. else
  4167. req = vha->req;
  4168. rsp = req->rsp;
  4169. if (rval == QLA_SUCCESS) {
  4170. clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
  4171. qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL);
  4172. }
  4173. vha->flags.management_server_logged_in = 0;
  4174. /* Login to SNS first */
  4175. ha->isp_ops->fabric_login(vha, NPH_SNS, 0xff, 0xff, 0xfc, mb, BIT_1);
  4176. if (mb[0] != MBS_COMMAND_COMPLETE) {
  4177. DEBUG15(qla_printk(KERN_INFO, ha,
  4178. "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x "
  4179. "mb[2]=%x mb[6]=%x mb[7]=%x\n", NPH_SNS,
  4180. mb[0], mb[1], mb[2], mb[6], mb[7]));
  4181. return (QLA_FUNCTION_FAILED);
  4182. }
  4183. atomic_set(&vha->loop_down_timer, 0);
  4184. atomic_set(&vha->loop_state, LOOP_UP);
  4185. set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
  4186. set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
  4187. rval = qla2x00_loop_resync(base_vha);
  4188. return rval;
  4189. }
  4190. /* 84XX Support **************************************************************/
  4191. static LIST_HEAD(qla_cs84xx_list);
  4192. static DEFINE_MUTEX(qla_cs84xx_mutex);
  4193. static struct qla_chip_state_84xx *
  4194. qla84xx_get_chip(struct scsi_qla_host *vha)
  4195. {
  4196. struct qla_chip_state_84xx *cs84xx;
  4197. struct qla_hw_data *ha = vha->hw;
  4198. mutex_lock(&qla_cs84xx_mutex);
  4199. /* Find any shared 84xx chip. */
  4200. list_for_each_entry(cs84xx, &qla_cs84xx_list, list) {
  4201. if (cs84xx->bus == ha->pdev->bus) {
  4202. kref_get(&cs84xx->kref);
  4203. goto done;
  4204. }
  4205. }
  4206. cs84xx = kzalloc(sizeof(*cs84xx), GFP_KERNEL);
  4207. if (!cs84xx)
  4208. goto done;
  4209. kref_init(&cs84xx->kref);
  4210. spin_lock_init(&cs84xx->access_lock);
  4211. mutex_init(&cs84xx->fw_update_mutex);
  4212. cs84xx->bus = ha->pdev->bus;
  4213. list_add_tail(&cs84xx->list, &qla_cs84xx_list);
  4214. done:
  4215. mutex_unlock(&qla_cs84xx_mutex);
  4216. return cs84xx;
  4217. }
  4218. static void
  4219. __qla84xx_chip_release(struct kref *kref)
  4220. {
  4221. struct qla_chip_state_84xx *cs84xx =
  4222. container_of(kref, struct qla_chip_state_84xx, kref);
  4223. mutex_lock(&qla_cs84xx_mutex);
  4224. list_del(&cs84xx->list);
  4225. mutex_unlock(&qla_cs84xx_mutex);
  4226. kfree(cs84xx);
  4227. }
  4228. void
  4229. qla84xx_put_chip(struct scsi_qla_host *vha)
  4230. {
  4231. struct qla_hw_data *ha = vha->hw;
  4232. if (ha->cs84xx)
  4233. kref_put(&ha->cs84xx->kref, __qla84xx_chip_release);
  4234. }
  4235. static int
  4236. qla84xx_init_chip(scsi_qla_host_t *vha)
  4237. {
  4238. int rval;
  4239. uint16_t status[2];
  4240. struct qla_hw_data *ha = vha->hw;
  4241. mutex_lock(&ha->cs84xx->fw_update_mutex);
  4242. rval = qla84xx_verify_chip(vha, status);
  4243. mutex_unlock(&ha->cs84xx->fw_update_mutex);
  4244. return rval != QLA_SUCCESS || status[0] ? QLA_FUNCTION_FAILED:
  4245. QLA_SUCCESS;
  4246. }
  4247. /* 81XX Support **************************************************************/
  4248. int
  4249. qla81xx_nvram_config(scsi_qla_host_t *vha)
  4250. {
  4251. int rval;
  4252. struct init_cb_81xx *icb;
  4253. struct nvram_81xx *nv;
  4254. uint32_t *dptr;
  4255. uint8_t *dptr1, *dptr2;
  4256. uint32_t chksum;
  4257. uint16_t cnt;
  4258. struct qla_hw_data *ha = vha->hw;
  4259. rval = QLA_SUCCESS;
  4260. icb = (struct init_cb_81xx *)ha->init_cb;
  4261. nv = ha->nvram;
  4262. /* Determine NVRAM starting address. */
  4263. ha->nvram_size = sizeof(struct nvram_81xx);
  4264. ha->vpd_size = FA_NVRAM_VPD_SIZE;
  4265. /* Get VPD data into cache */
  4266. ha->vpd = ha->nvram + VPD_OFFSET;
  4267. ha->isp_ops->read_optrom(vha, ha->vpd, ha->flt_region_vpd << 2,
  4268. ha->vpd_size);
  4269. /* Get NVRAM data into cache and calculate checksum. */
  4270. ha->isp_ops->read_optrom(vha, ha->nvram, ha->flt_region_nvram << 2,
  4271. ha->nvram_size);
  4272. dptr = (uint32_t *)nv;
  4273. for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++)
  4274. chksum += le32_to_cpu(*dptr++);
  4275. DEBUG5(printk("scsi(%ld): Contents of NVRAM\n", vha->host_no));
  4276. DEBUG5(qla2x00_dump_buffer((uint8_t *)nv, ha->nvram_size));
  4277. /* Bad NVRAM data, set defaults parameters. */
  4278. if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || nv->id[2] != 'P'
  4279. || nv->id[3] != ' ' ||
  4280. nv->nvram_version < __constant_cpu_to_le16(ICB_VERSION)) {
  4281. /* Reset NVRAM data. */
  4282. qla_printk(KERN_WARNING, ha, "Inconsistent NVRAM detected: "
  4283. "checksum=0x%x id=%c version=0x%x.\n", chksum, nv->id[0],
  4284. le16_to_cpu(nv->nvram_version));
  4285. qla_printk(KERN_WARNING, ha, "Falling back to functioning (yet "
  4286. "invalid -- WWPN) defaults.\n");
  4287. /*
  4288. * Set default initialization control block.
  4289. */
  4290. memset(nv, 0, ha->nvram_size);
  4291. nv->nvram_version = __constant_cpu_to_le16(ICB_VERSION);
  4292. nv->version = __constant_cpu_to_le16(ICB_VERSION);
  4293. nv->frame_payload_size = __constant_cpu_to_le16(2048);
  4294. nv->execution_throttle = __constant_cpu_to_le16(0xFFFF);
  4295. nv->exchange_count = __constant_cpu_to_le16(0);
  4296. nv->port_name[0] = 0x21;
  4297. nv->port_name[1] = 0x00 + ha->port_no;
  4298. nv->port_name[2] = 0x00;
  4299. nv->port_name[3] = 0xe0;
  4300. nv->port_name[4] = 0x8b;
  4301. nv->port_name[5] = 0x1c;
  4302. nv->port_name[6] = 0x55;
  4303. nv->port_name[7] = 0x86;
  4304. nv->node_name[0] = 0x20;
  4305. nv->node_name[1] = 0x00;
  4306. nv->node_name[2] = 0x00;
  4307. nv->node_name[3] = 0xe0;
  4308. nv->node_name[4] = 0x8b;
  4309. nv->node_name[5] = 0x1c;
  4310. nv->node_name[6] = 0x55;
  4311. nv->node_name[7] = 0x86;
  4312. nv->login_retry_count = __constant_cpu_to_le16(8);
  4313. nv->interrupt_delay_timer = __constant_cpu_to_le16(0);
  4314. nv->login_timeout = __constant_cpu_to_le16(0);
  4315. nv->firmware_options_1 =
  4316. __constant_cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1);
  4317. nv->firmware_options_2 = __constant_cpu_to_le32(2 << 4);
  4318. nv->firmware_options_2 |= __constant_cpu_to_le32(BIT_12);
  4319. nv->firmware_options_3 = __constant_cpu_to_le32(2 << 13);
  4320. nv->host_p = __constant_cpu_to_le32(BIT_11|BIT_10);
  4321. nv->efi_parameters = __constant_cpu_to_le32(0);
  4322. nv->reset_delay = 5;
  4323. nv->max_luns_per_target = __constant_cpu_to_le16(128);
  4324. nv->port_down_retry_count = __constant_cpu_to_le16(30);
  4325. nv->link_down_timeout = __constant_cpu_to_le16(30);
  4326. nv->enode_mac[0] = 0x00;
  4327. nv->enode_mac[1] = 0x02;
  4328. nv->enode_mac[2] = 0x03;
  4329. nv->enode_mac[3] = 0x04;
  4330. nv->enode_mac[4] = 0x05;
  4331. nv->enode_mac[5] = 0x06 + ha->port_no;
  4332. rval = 1;
  4333. }
  4334. /* Reset Initialization control block */
  4335. memset(icb, 0, sizeof(struct init_cb_81xx));
  4336. /* Copy 1st segment. */
  4337. dptr1 = (uint8_t *)icb;
  4338. dptr2 = (uint8_t *)&nv->version;
  4339. cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version;
  4340. while (cnt--)
  4341. *dptr1++ = *dptr2++;
  4342. icb->login_retry_count = nv->login_retry_count;
  4343. /* Copy 2nd segment. */
  4344. dptr1 = (uint8_t *)&icb->interrupt_delay_timer;
  4345. dptr2 = (uint8_t *)&nv->interrupt_delay_timer;
  4346. cnt = (uint8_t *)&icb->reserved_5 -
  4347. (uint8_t *)&icb->interrupt_delay_timer;
  4348. while (cnt--)
  4349. *dptr1++ = *dptr2++;
  4350. memcpy(icb->enode_mac, nv->enode_mac, sizeof(icb->enode_mac));
  4351. /* Some boards (with valid NVRAMs) still have NULL enode_mac!! */
  4352. if (!memcmp(icb->enode_mac, "\0\0\0\0\0\0", sizeof(icb->enode_mac))) {
  4353. icb->enode_mac[0] = 0x01;
  4354. icb->enode_mac[1] = 0x02;
  4355. icb->enode_mac[2] = 0x03;
  4356. icb->enode_mac[3] = 0x04;
  4357. icb->enode_mac[4] = 0x05;
  4358. icb->enode_mac[5] = 0x06 + ha->port_no;
  4359. }
  4360. /* Use extended-initialization control block. */
  4361. memcpy(ha->ex_init_cb, &nv->ex_version, sizeof(*ha->ex_init_cb));
  4362. /*
  4363. * Setup driver NVRAM options.
  4364. */
  4365. qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name),
  4366. "QLE8XXX");
  4367. /* Use alternate WWN? */
  4368. if (nv->host_p & __constant_cpu_to_le32(BIT_15)) {
  4369. memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
  4370. memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
  4371. }
  4372. /* Prepare nodename */
  4373. if ((icb->firmware_options_1 & __constant_cpu_to_le32(BIT_14)) == 0) {
  4374. /*
  4375. * Firmware will apply the following mask if the nodename was
  4376. * not provided.
  4377. */
  4378. memcpy(icb->node_name, icb->port_name, WWN_SIZE);
  4379. icb->node_name[0] &= 0xF0;
  4380. }
  4381. /* Set host adapter parameters. */
  4382. ha->flags.disable_risc_code_load = 0;
  4383. ha->flags.enable_lip_reset = 0;
  4384. ha->flags.enable_lip_full_login =
  4385. le32_to_cpu(nv->host_p) & BIT_10 ? 1: 0;
  4386. ha->flags.enable_target_reset =
  4387. le32_to_cpu(nv->host_p) & BIT_11 ? 1: 0;
  4388. ha->flags.enable_led_scheme = 0;
  4389. ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1: 0;
  4390. ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) &
  4391. (BIT_6 | BIT_5 | BIT_4)) >> 4;
  4392. /* save HBA serial number */
  4393. ha->serial0 = icb->port_name[5];
  4394. ha->serial1 = icb->port_name[6];
  4395. ha->serial2 = icb->port_name[7];
  4396. memcpy(vha->node_name, icb->node_name, WWN_SIZE);
  4397. memcpy(vha->port_name, icb->port_name, WWN_SIZE);
  4398. icb->execution_throttle = __constant_cpu_to_le16(0xFFFF);
  4399. ha->retry_count = le16_to_cpu(nv->login_retry_count);
  4400. /* Set minimum login_timeout to 4 seconds. */
  4401. if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout)
  4402. nv->login_timeout = cpu_to_le16(ql2xlogintimeout);
  4403. if (le16_to_cpu(nv->login_timeout) < 4)
  4404. nv->login_timeout = __constant_cpu_to_le16(4);
  4405. ha->login_timeout = le16_to_cpu(nv->login_timeout);
  4406. icb->login_timeout = nv->login_timeout;
  4407. /* Set minimum RATOV to 100 tenths of a second. */
  4408. ha->r_a_tov = 100;
  4409. ha->loop_reset_delay = nv->reset_delay;
  4410. /* Link Down Timeout = 0:
  4411. *
  4412. * When Port Down timer expires we will start returning
  4413. * I/O's to OS with "DID_NO_CONNECT".
  4414. *
  4415. * Link Down Timeout != 0:
  4416. *
  4417. * The driver waits for the link to come up after link down
  4418. * before returning I/Os to OS with "DID_NO_CONNECT".
  4419. */
  4420. if (le16_to_cpu(nv->link_down_timeout) == 0) {
  4421. ha->loop_down_abort_time =
  4422. (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
  4423. } else {
  4424. ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout);
  4425. ha->loop_down_abort_time =
  4426. (LOOP_DOWN_TIME - ha->link_down_timeout);
  4427. }
  4428. /* Need enough time to try and get the port back. */
  4429. ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count);
  4430. if (qlport_down_retry)
  4431. ha->port_down_retry_count = qlport_down_retry;
  4432. /* Set login_retry_count */
  4433. ha->login_retry_count = le16_to_cpu(nv->login_retry_count);
  4434. if (ha->port_down_retry_count ==
  4435. le16_to_cpu(nv->port_down_retry_count) &&
  4436. ha->port_down_retry_count > 3)
  4437. ha->login_retry_count = ha->port_down_retry_count;
  4438. else if (ha->port_down_retry_count > (int)ha->login_retry_count)
  4439. ha->login_retry_count = ha->port_down_retry_count;
  4440. if (ql2xloginretrycount)
  4441. ha->login_retry_count = ql2xloginretrycount;
  4442. /* Enable ZIO. */
  4443. if (!vha->flags.init_done) {
  4444. ha->zio_mode = le32_to_cpu(icb->firmware_options_2) &
  4445. (BIT_3 | BIT_2 | BIT_1 | BIT_0);
  4446. ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ?
  4447. le16_to_cpu(icb->interrupt_delay_timer): 2;
  4448. }
  4449. icb->firmware_options_2 &= __constant_cpu_to_le32(
  4450. ~(BIT_3 | BIT_2 | BIT_1 | BIT_0));
  4451. vha->flags.process_response_queue = 0;
  4452. if (ha->zio_mode != QLA_ZIO_DISABLED) {
  4453. ha->zio_mode = QLA_ZIO_MODE_6;
  4454. DEBUG2(printk("scsi(%ld): ZIO mode %d enabled; timer delay "
  4455. "(%d us).\n", vha->host_no, ha->zio_mode,
  4456. ha->zio_timer * 100));
  4457. qla_printk(KERN_INFO, ha,
  4458. "ZIO mode %d enabled; timer delay (%d us).\n",
  4459. ha->zio_mode, ha->zio_timer * 100);
  4460. icb->firmware_options_2 |= cpu_to_le32(
  4461. (uint32_t)ha->zio_mode);
  4462. icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer);
  4463. vha->flags.process_response_queue = 1;
  4464. }
  4465. if (rval) {
  4466. DEBUG2_3(printk(KERN_WARNING
  4467. "scsi(%ld): NVRAM configuration failed!\n", vha->host_no));
  4468. }
  4469. return (rval);
  4470. }
  4471. int
  4472. qla82xx_restart_isp(scsi_qla_host_t *vha)
  4473. {
  4474. int status, rval;
  4475. uint32_t wait_time;
  4476. struct qla_hw_data *ha = vha->hw;
  4477. struct req_que *req = ha->req_q_map[0];
  4478. struct rsp_que *rsp = ha->rsp_q_map[0];
  4479. struct scsi_qla_host *vp;
  4480. struct scsi_qla_host *tvp;
  4481. status = qla2x00_init_rings(vha);
  4482. if (!status) {
  4483. clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
  4484. ha->flags.chip_reset_done = 1;
  4485. status = qla2x00_fw_ready(vha);
  4486. if (!status) {
  4487. qla_printk(KERN_INFO, ha,
  4488. "%s(): Start configure loop, "
  4489. "status = %d\n", __func__, status);
  4490. /* Issue a marker after FW becomes ready. */
  4491. qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL);
  4492. vha->flags.online = 1;
  4493. /* Wait at most MAX_TARGET RSCNs for a stable link. */
  4494. wait_time = 256;
  4495. do {
  4496. clear_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
  4497. qla2x00_configure_loop(vha);
  4498. wait_time--;
  4499. } while (!atomic_read(&vha->loop_down_timer) &&
  4500. !(test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags)) &&
  4501. wait_time &&
  4502. (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)));
  4503. }
  4504. /* if no cable then assume it's good */
  4505. if ((vha->device_flags & DFLG_NO_CABLE))
  4506. status = 0;
  4507. qla_printk(KERN_INFO, ha,
  4508. "%s(): Configure loop done, status = 0x%x\n",
  4509. __func__, status);
  4510. }
  4511. if (!status) {
  4512. clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
  4513. if (!atomic_read(&vha->loop_down_timer)) {
  4514. /*
  4515. * Issue marker command only when we are going
  4516. * to start the I/O .
  4517. */
  4518. vha->marker_needed = 1;
  4519. }
  4520. vha->flags.online = 1;
  4521. ha->isp_ops->enable_intrs(ha);
  4522. ha->isp_abort_cnt = 0;
  4523. clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
  4524. if (ha->fce) {
  4525. ha->flags.fce_enabled = 1;
  4526. memset(ha->fce, 0,
  4527. fce_calc_size(ha->fce_bufs));
  4528. rval = qla2x00_enable_fce_trace(vha,
  4529. ha->fce_dma, ha->fce_bufs, ha->fce_mb,
  4530. &ha->fce_bufs);
  4531. if (rval) {
  4532. qla_printk(KERN_WARNING, ha,
  4533. "Unable to reinitialize FCE "
  4534. "(%d).\n", rval);
  4535. ha->flags.fce_enabled = 0;
  4536. }
  4537. }
  4538. if (ha->eft) {
  4539. memset(ha->eft, 0, EFT_SIZE);
  4540. rval = qla2x00_enable_eft_trace(vha,
  4541. ha->eft_dma, EFT_NUM_BUFFERS);
  4542. if (rval) {
  4543. qla_printk(KERN_WARNING, ha,
  4544. "Unable to reinitialize EFT "
  4545. "(%d).\n", rval);
  4546. }
  4547. }
  4548. }
  4549. if (!status) {
  4550. DEBUG(printk(KERN_INFO
  4551. "qla82xx_restart_isp(%ld): succeeded.\n",
  4552. vha->host_no));
  4553. list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) {
  4554. if (vp->vp_idx)
  4555. qla2x00_vp_abort_isp(vp);
  4556. }
  4557. } else {
  4558. qla_printk(KERN_INFO, ha,
  4559. "qla82xx_restart_isp: **** FAILED ****\n");
  4560. }
  4561. return status;
  4562. }
  4563. void
  4564. qla81xx_update_fw_options(scsi_qla_host_t *vha)
  4565. {
  4566. struct qla_hw_data *ha = vha->hw;
  4567. if (!ql2xetsenable)
  4568. return;
  4569. /* Enable ETS Burst. */
  4570. memset(ha->fw_options, 0, sizeof(ha->fw_options));
  4571. ha->fw_options[2] |= BIT_9;
  4572. qla2x00_set_fw_options(vha, ha->fw_options);
  4573. }
  4574. /*
  4575. * qla24xx_get_fcp_prio
  4576. * Gets the fcp cmd priority value for the logged in port.
  4577. * Looks for a match of the port descriptors within
  4578. * each of the fcp prio config entries. If a match is found,
  4579. * the tag (priority) value is returned.
  4580. *
  4581. * Input:
  4582. * ha = adapter block po
  4583. * fcport = port structure pointer.
  4584. *
  4585. * Return:
  4586. * non-zero (if found)
  4587. * 0 (if not found)
  4588. *
  4589. * Context:
  4590. * Kernel context
  4591. */
  4592. uint8_t
  4593. qla24xx_get_fcp_prio(scsi_qla_host_t *vha, fc_port_t *fcport)
  4594. {
  4595. int i, entries;
  4596. uint8_t pid_match, wwn_match;
  4597. uint8_t priority;
  4598. uint32_t pid1, pid2;
  4599. uint64_t wwn1, wwn2;
  4600. struct qla_fcp_prio_entry *pri_entry;
  4601. struct qla_hw_data *ha = vha->hw;
  4602. if (!ha->fcp_prio_cfg || !ha->flags.fcp_prio_enabled)
  4603. return 0;
  4604. priority = 0;
  4605. entries = ha->fcp_prio_cfg->num_entries;
  4606. pri_entry = &ha->fcp_prio_cfg->entry[0];
  4607. for (i = 0; i < entries; i++) {
  4608. pid_match = wwn_match = 0;
  4609. if (!(pri_entry->flags & FCP_PRIO_ENTRY_VALID)) {
  4610. pri_entry++;
  4611. continue;
  4612. }
  4613. /* check source pid for a match */
  4614. if (pri_entry->flags & FCP_PRIO_ENTRY_SPID_VALID) {
  4615. pid1 = pri_entry->src_pid & INVALID_PORT_ID;
  4616. pid2 = vha->d_id.b24 & INVALID_PORT_ID;
  4617. if (pid1 == INVALID_PORT_ID)
  4618. pid_match++;
  4619. else if (pid1 == pid2)
  4620. pid_match++;
  4621. }
  4622. /* check destination pid for a match */
  4623. if (pri_entry->flags & FCP_PRIO_ENTRY_DPID_VALID) {
  4624. pid1 = pri_entry->dst_pid & INVALID_PORT_ID;
  4625. pid2 = fcport->d_id.b24 & INVALID_PORT_ID;
  4626. if (pid1 == INVALID_PORT_ID)
  4627. pid_match++;
  4628. else if (pid1 == pid2)
  4629. pid_match++;
  4630. }
  4631. /* check source WWN for a match */
  4632. if (pri_entry->flags & FCP_PRIO_ENTRY_SWWN_VALID) {
  4633. wwn1 = wwn_to_u64(vha->port_name);
  4634. wwn2 = wwn_to_u64(pri_entry->src_wwpn);
  4635. if (wwn2 == (uint64_t)-1)
  4636. wwn_match++;
  4637. else if (wwn1 == wwn2)
  4638. wwn_match++;
  4639. }
  4640. /* check destination WWN for a match */
  4641. if (pri_entry->flags & FCP_PRIO_ENTRY_DWWN_VALID) {
  4642. wwn1 = wwn_to_u64(fcport->port_name);
  4643. wwn2 = wwn_to_u64(pri_entry->dst_wwpn);
  4644. if (wwn2 == (uint64_t)-1)
  4645. wwn_match++;
  4646. else if (wwn1 == wwn2)
  4647. wwn_match++;
  4648. }
  4649. if (pid_match == 2 || wwn_match == 2) {
  4650. /* Found a matching entry */
  4651. if (pri_entry->flags & FCP_PRIO_ENTRY_TAG_VALID)
  4652. priority = pri_entry->tag;
  4653. break;
  4654. }
  4655. pri_entry++;
  4656. }
  4657. return priority;
  4658. }
  4659. /*
  4660. * qla24xx_update_fcport_fcp_prio
  4661. * Activates fcp priority for the logged in fc port
  4662. *
  4663. * Input:
  4664. * ha = adapter block pointer.
  4665. * fcp = port structure pointer.
  4666. *
  4667. * Return:
  4668. * QLA_SUCCESS or QLA_FUNCTION_FAILED
  4669. *
  4670. * Context:
  4671. * Kernel context.
  4672. */
  4673. int
  4674. qla24xx_update_fcport_fcp_prio(scsi_qla_host_t *ha, fc_port_t *fcport)
  4675. {
  4676. int ret;
  4677. uint8_t priority;
  4678. uint16_t mb[5];
  4679. if (atomic_read(&fcport->state) == FCS_UNCONFIGURED ||
  4680. fcport->port_type != FCT_TARGET ||
  4681. fcport->loop_id == FC_NO_LOOP_ID)
  4682. return QLA_FUNCTION_FAILED;
  4683. priority = qla24xx_get_fcp_prio(ha, fcport);
  4684. ret = qla24xx_set_fcp_prio(ha, fcport->loop_id, priority, mb);
  4685. if (ret == QLA_SUCCESS)
  4686. fcport->fcp_prio = priority;
  4687. else
  4688. DEBUG2(printk(KERN_WARNING
  4689. "scsi(%ld): Unable to activate fcp priority, "
  4690. " ret=0x%x\n", ha->host_no, ret));
  4691. return ret;
  4692. }
  4693. /*
  4694. * qla24xx_update_all_fcp_prio
  4695. * Activates fcp priority for all the logged in ports
  4696. *
  4697. * Input:
  4698. * ha = adapter block pointer.
  4699. *
  4700. * Return:
  4701. * QLA_SUCCESS or QLA_FUNCTION_FAILED
  4702. *
  4703. * Context:
  4704. * Kernel context.
  4705. */
  4706. int
  4707. qla24xx_update_all_fcp_prio(scsi_qla_host_t *vha)
  4708. {
  4709. int ret;
  4710. fc_port_t *fcport;
  4711. ret = QLA_FUNCTION_FAILED;
  4712. /* We need to set priority for all logged in ports */
  4713. list_for_each_entry(fcport, &vha->vp_fcports, list)
  4714. ret = qla24xx_update_fcport_fcp_prio(vha, fcport);
  4715. return ret;
  4716. }