setup.c 30 KB

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  1. /*
  2. * Copyright (C) 2009 Renesas Solutions Corp.
  3. *
  4. * Kuninori Morimoto <morimoto.kuninori@renesas.com>
  5. *
  6. * This file is subject to the terms and conditions of the GNU General Public
  7. * License. See the file "COPYING" in the main directory of this archive
  8. * for more details.
  9. */
  10. #include <linux/init.h>
  11. #include <linux/device.h>
  12. #include <linux/platform_device.h>
  13. #include <linux/mfd/sh_mobile_sdhi.h>
  14. #include <linux/mtd/physmap.h>
  15. #include <linux/gpio.h>
  16. #include <linux/interrupt.h>
  17. #include <linux/io.h>
  18. #include <linux/delay.h>
  19. #include <linux/usb/r8a66597.h>
  20. #include <linux/i2c.h>
  21. #include <linux/i2c/tsc2007.h>
  22. #include <linux/spi/spi.h>
  23. #include <linux/spi/sh_msiof.h>
  24. #include <linux/spi/mmc_spi.h>
  25. #include <linux/mmc/host.h>
  26. #include <linux/input.h>
  27. #include <linux/input/sh_keysc.h>
  28. #include <linux/mfd/sh_mobile_sdhi.h>
  29. #include <video/sh_mobile_lcdc.h>
  30. #include <sound/sh_fsi.h>
  31. #include <media/sh_mobile_ceu.h>
  32. #include <media/tw9910.h>
  33. #include <media/mt9t112.h>
  34. #include <asm/heartbeat.h>
  35. #include <asm/sh_eth.h>
  36. #include <asm/clock.h>
  37. #include <asm/suspend.h>
  38. #include <cpu/sh7724.h>
  39. /*
  40. * Address Interface BusWidth
  41. *-----------------------------------------
  42. * 0x0000_0000 uboot 16bit
  43. * 0x0004_0000 Linux romImage 16bit
  44. * 0x0014_0000 MTD for Linux 16bit
  45. * 0x0400_0000 Internal I/O 16/32bit
  46. * 0x0800_0000 DRAM 32bit
  47. * 0x1800_0000 MFI 16bit
  48. */
  49. /* SWITCH
  50. *------------------------------
  51. * DS2[1] = FlashROM write protect ON : write protect
  52. * OFF : No write protect
  53. * DS2[2] = RMII / TS, SCIF ON : RMII
  54. * OFF : TS, SCIF3
  55. * DS2[3] = Camera / Video ON : Camera
  56. * OFF : NTSC/PAL (IN)
  57. * DS2[5] = NTSC_OUT Clock ON : On board OSC
  58. * OFF : SH7724 DV_CLK
  59. * DS2[6-7] = MMC / SD ON-OFF : SD
  60. * OFF-ON : MMC
  61. */
  62. /* Heartbeat */
  63. static unsigned char led_pos[] = { 0, 1, 2, 3 };
  64. static struct heartbeat_data heartbeat_data = {
  65. .nr_bits = 4,
  66. .bit_pos = led_pos,
  67. };
  68. static struct resource heartbeat_resource = {
  69. .start = 0xA405012C, /* PTG */
  70. .end = 0xA405012E - 1,
  71. .flags = IORESOURCE_MEM | IORESOURCE_MEM_8BIT,
  72. };
  73. static struct platform_device heartbeat_device = {
  74. .name = "heartbeat",
  75. .id = -1,
  76. .dev = {
  77. .platform_data = &heartbeat_data,
  78. },
  79. .num_resources = 1,
  80. .resource = &heartbeat_resource,
  81. };
  82. /* MTD */
  83. static struct mtd_partition nor_flash_partitions[] = {
  84. {
  85. .name = "boot loader",
  86. .offset = 0,
  87. .size = (5 * 1024 * 1024),
  88. .mask_flags = MTD_WRITEABLE, /* force read-only */
  89. }, {
  90. .name = "free-area",
  91. .offset = MTDPART_OFS_APPEND,
  92. .size = MTDPART_SIZ_FULL,
  93. },
  94. };
  95. static struct physmap_flash_data nor_flash_data = {
  96. .width = 2,
  97. .parts = nor_flash_partitions,
  98. .nr_parts = ARRAY_SIZE(nor_flash_partitions),
  99. };
  100. static struct resource nor_flash_resources[] = {
  101. [0] = {
  102. .name = "NOR Flash",
  103. .start = 0x00000000,
  104. .end = 0x03ffffff,
  105. .flags = IORESOURCE_MEM,
  106. }
  107. };
  108. static struct platform_device nor_flash_device = {
  109. .name = "physmap-flash",
  110. .resource = nor_flash_resources,
  111. .num_resources = ARRAY_SIZE(nor_flash_resources),
  112. .dev = {
  113. .platform_data = &nor_flash_data,
  114. },
  115. };
  116. /* SH Eth */
  117. #define SH_ETH_ADDR (0xA4600000)
  118. static struct resource sh_eth_resources[] = {
  119. [0] = {
  120. .start = SH_ETH_ADDR,
  121. .end = SH_ETH_ADDR + 0x1FC,
  122. .flags = IORESOURCE_MEM,
  123. },
  124. [1] = {
  125. .start = 91,
  126. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  127. },
  128. };
  129. struct sh_eth_plat_data sh_eth_plat = {
  130. .phy = 0x1f, /* SMSC LAN8700 */
  131. .edmac_endian = EDMAC_LITTLE_ENDIAN,
  132. .ether_link_active_low = 1
  133. };
  134. static struct platform_device sh_eth_device = {
  135. .name = "sh-eth",
  136. .id = 0,
  137. .dev = {
  138. .platform_data = &sh_eth_plat,
  139. },
  140. .num_resources = ARRAY_SIZE(sh_eth_resources),
  141. .resource = sh_eth_resources,
  142. .archdata = {
  143. .hwblk_id = HWBLK_ETHER,
  144. },
  145. };
  146. /* USB0 host */
  147. void usb0_port_power(int port, int power)
  148. {
  149. gpio_set_value(GPIO_PTB4, power);
  150. }
  151. static struct r8a66597_platdata usb0_host_data = {
  152. .on_chip = 1,
  153. .port_power = usb0_port_power,
  154. };
  155. static struct resource usb0_host_resources[] = {
  156. [0] = {
  157. .start = 0xa4d80000,
  158. .end = 0xa4d80124 - 1,
  159. .flags = IORESOURCE_MEM,
  160. },
  161. [1] = {
  162. .start = 65,
  163. .end = 65,
  164. .flags = IORESOURCE_IRQ | IRQF_TRIGGER_LOW,
  165. },
  166. };
  167. static struct platform_device usb0_host_device = {
  168. .name = "r8a66597_hcd",
  169. .id = 0,
  170. .dev = {
  171. .dma_mask = NULL, /* not use dma */
  172. .coherent_dma_mask = 0xffffffff,
  173. .platform_data = &usb0_host_data,
  174. },
  175. .num_resources = ARRAY_SIZE(usb0_host_resources),
  176. .resource = usb0_host_resources,
  177. };
  178. /* USB1 host/function */
  179. void usb1_port_power(int port, int power)
  180. {
  181. gpio_set_value(GPIO_PTB5, power);
  182. }
  183. static struct r8a66597_platdata usb1_common_data = {
  184. .on_chip = 1,
  185. .port_power = usb1_port_power,
  186. };
  187. static struct resource usb1_common_resources[] = {
  188. [0] = {
  189. .start = 0xa4d90000,
  190. .end = 0xa4d90124 - 1,
  191. .flags = IORESOURCE_MEM,
  192. },
  193. [1] = {
  194. .start = 66,
  195. .end = 66,
  196. .flags = IORESOURCE_IRQ | IRQF_TRIGGER_LOW,
  197. },
  198. };
  199. static struct platform_device usb1_common_device = {
  200. /* .name will be added in arch_setup */
  201. .id = 1,
  202. .dev = {
  203. .dma_mask = NULL, /* not use dma */
  204. .coherent_dma_mask = 0xffffffff,
  205. .platform_data = &usb1_common_data,
  206. },
  207. .num_resources = ARRAY_SIZE(usb1_common_resources),
  208. .resource = usb1_common_resources,
  209. };
  210. /* LCDC */
  211. static struct sh_mobile_lcdc_info lcdc_info = {
  212. .ch[0] = {
  213. .interface_type = RGB18,
  214. .chan = LCDC_CHAN_MAINLCD,
  215. .bpp = 16,
  216. .lcd_cfg = {
  217. .sync = 0, /* hsync and vsync are active low */
  218. },
  219. .lcd_size_cfg = { /* 7.0 inch */
  220. .width = 152,
  221. .height = 91,
  222. },
  223. .board_cfg = {
  224. },
  225. }
  226. };
  227. static struct resource lcdc_resources[] = {
  228. [0] = {
  229. .name = "LCDC",
  230. .start = 0xfe940000,
  231. .end = 0xfe942fff,
  232. .flags = IORESOURCE_MEM,
  233. },
  234. [1] = {
  235. .start = 106,
  236. .flags = IORESOURCE_IRQ,
  237. },
  238. };
  239. static struct platform_device lcdc_device = {
  240. .name = "sh_mobile_lcdc_fb",
  241. .num_resources = ARRAY_SIZE(lcdc_resources),
  242. .resource = lcdc_resources,
  243. .dev = {
  244. .platform_data = &lcdc_info,
  245. },
  246. .archdata = {
  247. .hwblk_id = HWBLK_LCDC,
  248. },
  249. };
  250. /* CEU0 */
  251. static struct sh_mobile_ceu_info sh_mobile_ceu0_info = {
  252. .flags = SH_CEU_FLAG_USE_8BIT_BUS,
  253. };
  254. static struct resource ceu0_resources[] = {
  255. [0] = {
  256. .name = "CEU0",
  257. .start = 0xfe910000,
  258. .end = 0xfe91009f,
  259. .flags = IORESOURCE_MEM,
  260. },
  261. [1] = {
  262. .start = 52,
  263. .flags = IORESOURCE_IRQ,
  264. },
  265. [2] = {
  266. /* place holder for contiguous memory */
  267. },
  268. };
  269. static struct platform_device ceu0_device = {
  270. .name = "sh_mobile_ceu",
  271. .id = 0, /* "ceu0" clock */
  272. .num_resources = ARRAY_SIZE(ceu0_resources),
  273. .resource = ceu0_resources,
  274. .dev = {
  275. .platform_data = &sh_mobile_ceu0_info,
  276. },
  277. .archdata = {
  278. .hwblk_id = HWBLK_CEU0,
  279. },
  280. };
  281. /* CEU1 */
  282. static struct sh_mobile_ceu_info sh_mobile_ceu1_info = {
  283. .flags = SH_CEU_FLAG_USE_8BIT_BUS,
  284. };
  285. static struct resource ceu1_resources[] = {
  286. [0] = {
  287. .name = "CEU1",
  288. .start = 0xfe914000,
  289. .end = 0xfe91409f,
  290. .flags = IORESOURCE_MEM,
  291. },
  292. [1] = {
  293. .start = 63,
  294. .flags = IORESOURCE_IRQ,
  295. },
  296. [2] = {
  297. /* place holder for contiguous memory */
  298. },
  299. };
  300. static struct platform_device ceu1_device = {
  301. .name = "sh_mobile_ceu",
  302. .id = 1, /* "ceu1" clock */
  303. .num_resources = ARRAY_SIZE(ceu1_resources),
  304. .resource = ceu1_resources,
  305. .dev = {
  306. .platform_data = &sh_mobile_ceu1_info,
  307. },
  308. .archdata = {
  309. .hwblk_id = HWBLK_CEU1,
  310. },
  311. };
  312. /* I2C device */
  313. static struct i2c_board_info i2c0_devices[] = {
  314. {
  315. I2C_BOARD_INFO("da7210", 0x1a),
  316. },
  317. };
  318. static struct i2c_board_info i2c1_devices[] = {
  319. {
  320. I2C_BOARD_INFO("r2025sd", 0x32),
  321. },
  322. {
  323. I2C_BOARD_INFO("lis3lv02d", 0x1c),
  324. .irq = 33,
  325. }
  326. };
  327. /* KEYSC */
  328. static struct sh_keysc_info keysc_info = {
  329. .mode = SH_KEYSC_MODE_1,
  330. .scan_timing = 3,
  331. .delay = 50,
  332. .kycr2_delay = 100,
  333. .keycodes = { KEY_1, 0, 0, 0, 0,
  334. KEY_2, 0, 0, 0, 0,
  335. KEY_3, 0, 0, 0, 0,
  336. KEY_4, 0, 0, 0, 0,
  337. KEY_5, 0, 0, 0, 0,
  338. KEY_6, 0, 0, 0, 0, },
  339. };
  340. static struct resource keysc_resources[] = {
  341. [0] = {
  342. .name = "KEYSC",
  343. .start = 0x044b0000,
  344. .end = 0x044b000f,
  345. .flags = IORESOURCE_MEM,
  346. },
  347. [1] = {
  348. .start = 79,
  349. .flags = IORESOURCE_IRQ,
  350. },
  351. };
  352. static struct platform_device keysc_device = {
  353. .name = "sh_keysc",
  354. .id = 0, /* keysc0 clock */
  355. .num_resources = ARRAY_SIZE(keysc_resources),
  356. .resource = keysc_resources,
  357. .dev = {
  358. .platform_data = &keysc_info,
  359. },
  360. .archdata = {
  361. .hwblk_id = HWBLK_KEYSC,
  362. },
  363. };
  364. /* TouchScreen */
  365. #define IRQ0 32
  366. static int ts_get_pendown_state(void)
  367. {
  368. int val = 0;
  369. gpio_free(GPIO_FN_INTC_IRQ0);
  370. gpio_request(GPIO_PTZ0, NULL);
  371. gpio_direction_input(GPIO_PTZ0);
  372. val = gpio_get_value(GPIO_PTZ0);
  373. gpio_free(GPIO_PTZ0);
  374. gpio_request(GPIO_FN_INTC_IRQ0, NULL);
  375. return val ? 0 : 1;
  376. }
  377. static int ts_init(void)
  378. {
  379. gpio_request(GPIO_FN_INTC_IRQ0, NULL);
  380. return 0;
  381. }
  382. struct tsc2007_platform_data tsc2007_info = {
  383. .model = 2007,
  384. .x_plate_ohms = 180,
  385. .get_pendown_state = ts_get_pendown_state,
  386. .init_platform_hw = ts_init,
  387. };
  388. static struct i2c_board_info ts_i2c_clients = {
  389. I2C_BOARD_INFO("tsc2007", 0x48),
  390. .type = "tsc2007",
  391. .platform_data = &tsc2007_info,
  392. .irq = IRQ0,
  393. };
  394. #ifdef CONFIG_MFD_SH_MOBILE_SDHI
  395. /* SHDI0 */
  396. static void sdhi0_set_pwr(struct platform_device *pdev, int state)
  397. {
  398. gpio_set_value(GPIO_PTB6, state);
  399. }
  400. static struct sh_mobile_sdhi_info sdhi0_info = {
  401. .dma_slave_tx = SHDMA_SLAVE_SDHI0_TX,
  402. .dma_slave_rx = SHDMA_SLAVE_SDHI0_RX,
  403. .set_pwr = sdhi0_set_pwr,
  404. };
  405. static struct resource sdhi0_resources[] = {
  406. [0] = {
  407. .name = "SDHI0",
  408. .start = 0x04ce0000,
  409. .end = 0x04ce01ff,
  410. .flags = IORESOURCE_MEM,
  411. },
  412. [1] = {
  413. .start = 100,
  414. .flags = IORESOURCE_IRQ,
  415. },
  416. };
  417. static struct platform_device sdhi0_device = {
  418. .name = "sh_mobile_sdhi",
  419. .num_resources = ARRAY_SIZE(sdhi0_resources),
  420. .resource = sdhi0_resources,
  421. .id = 0,
  422. .dev = {
  423. .platform_data = &sdhi0_info,
  424. },
  425. .archdata = {
  426. .hwblk_id = HWBLK_SDHI0,
  427. },
  428. };
  429. /* SHDI1 */
  430. static void sdhi1_set_pwr(struct platform_device *pdev, int state)
  431. {
  432. gpio_set_value(GPIO_PTB7, state);
  433. }
  434. static struct sh_mobile_sdhi_info sdhi1_info = {
  435. .dma_slave_tx = SHDMA_SLAVE_SDHI1_TX,
  436. .dma_slave_rx = SHDMA_SLAVE_SDHI1_RX,
  437. .set_pwr = sdhi1_set_pwr,
  438. };
  439. static struct resource sdhi1_resources[] = {
  440. [0] = {
  441. .name = "SDHI1",
  442. .start = 0x04cf0000,
  443. .end = 0x04cf01ff,
  444. .flags = IORESOURCE_MEM,
  445. },
  446. [1] = {
  447. .start = 23,
  448. .flags = IORESOURCE_IRQ,
  449. },
  450. };
  451. static struct platform_device sdhi1_device = {
  452. .name = "sh_mobile_sdhi",
  453. .num_resources = ARRAY_SIZE(sdhi1_resources),
  454. .resource = sdhi1_resources,
  455. .id = 1,
  456. .dev = {
  457. .platform_data = &sdhi1_info,
  458. },
  459. .archdata = {
  460. .hwblk_id = HWBLK_SDHI1,
  461. },
  462. };
  463. #else
  464. /* MMC SPI */
  465. static int mmc_spi_get_ro(struct device *dev)
  466. {
  467. return gpio_get_value(GPIO_PTY6);
  468. }
  469. static int mmc_spi_get_cd(struct device *dev)
  470. {
  471. return !gpio_get_value(GPIO_PTY7);
  472. }
  473. static void mmc_spi_setpower(struct device *dev, unsigned int maskval)
  474. {
  475. gpio_set_value(GPIO_PTB6, maskval ? 1 : 0);
  476. }
  477. static struct mmc_spi_platform_data mmc_spi_info = {
  478. .get_ro = mmc_spi_get_ro,
  479. .get_cd = mmc_spi_get_cd,
  480. .caps = MMC_CAP_NEEDS_POLL,
  481. .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34, /* 3.3V only */
  482. .setpower = mmc_spi_setpower,
  483. };
  484. static struct spi_board_info spi_bus[] = {
  485. {
  486. .modalias = "mmc_spi",
  487. .platform_data = &mmc_spi_info,
  488. .max_speed_hz = 5000000,
  489. .mode = SPI_MODE_0,
  490. .controller_data = (void *) GPIO_PTM4,
  491. },
  492. };
  493. /* MSIOF0 */
  494. static struct sh_msiof_spi_info msiof0_data = {
  495. .num_chipselect = 1,
  496. };
  497. static struct resource msiof0_resources[] = {
  498. [0] = {
  499. .name = "MSIOF0",
  500. .start = 0xa4c40000,
  501. .end = 0xa4c40063,
  502. .flags = IORESOURCE_MEM,
  503. },
  504. [1] = {
  505. .start = 84,
  506. .flags = IORESOURCE_IRQ,
  507. },
  508. };
  509. static struct platform_device msiof0_device = {
  510. .name = "spi_sh_msiof",
  511. .id = 0, /* MSIOF0 */
  512. .dev = {
  513. .platform_data = &msiof0_data,
  514. },
  515. .num_resources = ARRAY_SIZE(msiof0_resources),
  516. .resource = msiof0_resources,
  517. .archdata = {
  518. .hwblk_id = HWBLK_MSIOF0,
  519. },
  520. };
  521. #endif
  522. /* I2C Video/Camera */
  523. static struct i2c_board_info i2c_camera[] = {
  524. {
  525. I2C_BOARD_INFO("tw9910", 0x45),
  526. },
  527. {
  528. /* 1st camera */
  529. I2C_BOARD_INFO("mt9t112", 0x3c),
  530. },
  531. {
  532. /* 2nd camera */
  533. I2C_BOARD_INFO("mt9t112", 0x3c),
  534. },
  535. };
  536. /* tw9910 */
  537. static int tw9910_power(struct device *dev, int mode)
  538. {
  539. int val = mode ? 0 : 1;
  540. gpio_set_value(GPIO_PTU2, val);
  541. if (mode)
  542. mdelay(100);
  543. return 0;
  544. }
  545. static struct tw9910_video_info tw9910_info = {
  546. .buswidth = SOCAM_DATAWIDTH_8,
  547. .mpout = TW9910_MPO_FIELD,
  548. };
  549. static struct soc_camera_link tw9910_link = {
  550. .i2c_adapter_id = 0,
  551. .bus_id = 1,
  552. .power = tw9910_power,
  553. .board_info = &i2c_camera[0],
  554. .module_name = "tw9910",
  555. .priv = &tw9910_info,
  556. };
  557. /* mt9t112 */
  558. static int mt9t112_power1(struct device *dev, int mode)
  559. {
  560. gpio_set_value(GPIO_PTA3, mode);
  561. if (mode)
  562. mdelay(100);
  563. return 0;
  564. }
  565. static struct mt9t112_camera_info mt9t112_info1 = {
  566. .flags = MT9T112_FLAG_PCLK_RISING_EDGE | MT9T112_FLAG_DATAWIDTH_8,
  567. .divider = { 0x49, 0x6, 0, 6, 0, 9, 9, 6, 0 }, /* for 24MHz */
  568. };
  569. static struct soc_camera_link mt9t112_link1 = {
  570. .i2c_adapter_id = 0,
  571. .power = mt9t112_power1,
  572. .bus_id = 0,
  573. .board_info = &i2c_camera[1],
  574. .module_name = "mt9t112",
  575. .priv = &mt9t112_info1,
  576. };
  577. static int mt9t112_power2(struct device *dev, int mode)
  578. {
  579. gpio_set_value(GPIO_PTA4, mode);
  580. if (mode)
  581. mdelay(100);
  582. return 0;
  583. }
  584. static struct mt9t112_camera_info mt9t112_info2 = {
  585. .flags = MT9T112_FLAG_PCLK_RISING_EDGE | MT9T112_FLAG_DATAWIDTH_8,
  586. .divider = { 0x49, 0x6, 0, 6, 0, 9, 9, 6, 0 }, /* for 24MHz */
  587. };
  588. static struct soc_camera_link mt9t112_link2 = {
  589. .i2c_adapter_id = 1,
  590. .power = mt9t112_power2,
  591. .bus_id = 1,
  592. .board_info = &i2c_camera[2],
  593. .module_name = "mt9t112",
  594. .priv = &mt9t112_info2,
  595. };
  596. static struct platform_device camera_devices[] = {
  597. {
  598. .name = "soc-camera-pdrv",
  599. .id = 0,
  600. .dev = {
  601. .platform_data = &tw9910_link,
  602. },
  603. },
  604. {
  605. .name = "soc-camera-pdrv",
  606. .id = 1,
  607. .dev = {
  608. .platform_data = &mt9t112_link1,
  609. },
  610. },
  611. {
  612. .name = "soc-camera-pdrv",
  613. .id = 2,
  614. .dev = {
  615. .platform_data = &mt9t112_link2,
  616. },
  617. },
  618. };
  619. /* FSI */
  620. /*
  621. * FSI-B use external clock which came from da7210.
  622. * So, we should change parent of fsi
  623. */
  624. #define FCLKBCR 0xa415000c
  625. static void fsimck_init(struct clk *clk)
  626. {
  627. u32 status = __raw_readl(clk->enable_reg);
  628. /* use external clock */
  629. status &= ~0x000000ff;
  630. status |= 0x00000080;
  631. __raw_writel(status, clk->enable_reg);
  632. }
  633. static struct clk_ops fsimck_clk_ops = {
  634. .init = fsimck_init,
  635. };
  636. static struct clk fsimckb_clk = {
  637. .ops = &fsimck_clk_ops,
  638. .enable_reg = (void __iomem *)FCLKBCR,
  639. .rate = 0, /* unknown */
  640. };
  641. struct sh_fsi_platform_info fsi_info = {
  642. .portb_flags = SH_FSI_BRS_INV |
  643. SH_FSI_OUT_SLAVE_MODE |
  644. SH_FSI_IN_SLAVE_MODE |
  645. SH_FSI_OFMT(I2S) |
  646. SH_FSI_IFMT(I2S),
  647. };
  648. static struct resource fsi_resources[] = {
  649. [0] = {
  650. .name = "FSI",
  651. .start = 0xFE3C0000,
  652. .end = 0xFE3C021d,
  653. .flags = IORESOURCE_MEM,
  654. },
  655. [1] = {
  656. .start = 108,
  657. .flags = IORESOURCE_IRQ,
  658. },
  659. };
  660. static struct platform_device fsi_device = {
  661. .name = "sh_fsi",
  662. .id = 0,
  663. .num_resources = ARRAY_SIZE(fsi_resources),
  664. .resource = fsi_resources,
  665. .dev = {
  666. .platform_data = &fsi_info,
  667. },
  668. .archdata = {
  669. .hwblk_id = HWBLK_SPU, /* FSI needs SPU hwblk */
  670. },
  671. };
  672. /* IrDA */
  673. static struct resource irda_resources[] = {
  674. [0] = {
  675. .name = "IrDA",
  676. .start = 0xA45D0000,
  677. .end = 0xA45D0049,
  678. .flags = IORESOURCE_MEM,
  679. },
  680. [1] = {
  681. .start = 20,
  682. .flags = IORESOURCE_IRQ,
  683. },
  684. };
  685. static struct platform_device irda_device = {
  686. .name = "sh_sir",
  687. .num_resources = ARRAY_SIZE(irda_resources),
  688. .resource = irda_resources,
  689. };
  690. #include <media/ak881x.h>
  691. #include <media/sh_vou.h>
  692. struct ak881x_pdata ak881x_pdata = {
  693. .flags = AK881X_IF_MODE_SLAVE,
  694. };
  695. static struct i2c_board_info ak8813 = {
  696. I2C_BOARD_INFO("ak8813", 0x20),
  697. .platform_data = &ak881x_pdata,
  698. };
  699. struct sh_vou_pdata sh_vou_pdata = {
  700. .bus_fmt = SH_VOU_BUS_8BIT,
  701. .flags = SH_VOU_HSYNC_LOW | SH_VOU_VSYNC_LOW,
  702. .board_info = &ak8813,
  703. .i2c_adap = 0,
  704. .module_name = "ak881x",
  705. };
  706. static struct resource sh_vou_resources[] = {
  707. [0] = {
  708. .start = 0xfe960000,
  709. .end = 0xfe962043,
  710. .flags = IORESOURCE_MEM,
  711. },
  712. [1] = {
  713. .start = 55,
  714. .flags = IORESOURCE_IRQ,
  715. },
  716. };
  717. static struct platform_device vou_device = {
  718. .name = "sh-vou",
  719. .id = -1,
  720. .num_resources = ARRAY_SIZE(sh_vou_resources),
  721. .resource = sh_vou_resources,
  722. .dev = {
  723. .platform_data = &sh_vou_pdata,
  724. },
  725. .archdata = {
  726. .hwblk_id = HWBLK_VOU,
  727. },
  728. };
  729. static struct platform_device *ecovec_devices[] __initdata = {
  730. &heartbeat_device,
  731. &nor_flash_device,
  732. &sh_eth_device,
  733. &usb0_host_device,
  734. &usb1_common_device,
  735. &lcdc_device,
  736. &ceu0_device,
  737. &ceu1_device,
  738. &keysc_device,
  739. #ifdef CONFIG_MFD_SH_MOBILE_SDHI
  740. &sdhi0_device,
  741. &sdhi1_device,
  742. #else
  743. &msiof0_device,
  744. #endif
  745. &camera_devices[0],
  746. &camera_devices[1],
  747. &camera_devices[2],
  748. &fsi_device,
  749. &irda_device,
  750. &vou_device,
  751. };
  752. #ifdef CONFIG_I2C
  753. #define EEPROM_ADDR 0x50
  754. static u8 mac_read(struct i2c_adapter *a, u8 command)
  755. {
  756. struct i2c_msg msg[2];
  757. u8 buf;
  758. int ret;
  759. msg[0].addr = EEPROM_ADDR;
  760. msg[0].flags = 0;
  761. msg[0].len = 1;
  762. msg[0].buf = &command;
  763. msg[1].addr = EEPROM_ADDR;
  764. msg[1].flags = I2C_M_RD;
  765. msg[1].len = 1;
  766. msg[1].buf = &buf;
  767. ret = i2c_transfer(a, msg, 2);
  768. if (ret < 0) {
  769. printk(KERN_ERR "error %d\n", ret);
  770. buf = 0xff;
  771. }
  772. return buf;
  773. }
  774. static void __init sh_eth_init(struct sh_eth_plat_data *pd)
  775. {
  776. struct i2c_adapter *a = i2c_get_adapter(1);
  777. int i;
  778. if (!a) {
  779. pr_err("can not get I2C 1\n");
  780. return;
  781. }
  782. /* read MAC address frome EEPROM */
  783. for (i = 0; i < sizeof(pd->mac_addr); i++) {
  784. pd->mac_addr[i] = mac_read(a, 0x10 + i);
  785. msleep(10);
  786. }
  787. i2c_put_adapter(a);
  788. }
  789. #else
  790. static void __init sh_eth_init(struct sh_eth_plat_data *pd)
  791. {
  792. pr_err("unable to read sh_eth MAC address\n");
  793. }
  794. #endif
  795. #define PORT_HIZA 0xA4050158
  796. #define IODRIVEA 0xA405018A
  797. extern char ecovec24_sdram_enter_start;
  798. extern char ecovec24_sdram_enter_end;
  799. extern char ecovec24_sdram_leave_start;
  800. extern char ecovec24_sdram_leave_end;
  801. static int __init arch_setup(void)
  802. {
  803. struct clk *clk;
  804. /* register board specific self-refresh code */
  805. sh_mobile_register_self_refresh(SUSP_SH_STANDBY | SUSP_SH_SF |
  806. SUSP_SH_RSTANDBY,
  807. &ecovec24_sdram_enter_start,
  808. &ecovec24_sdram_enter_end,
  809. &ecovec24_sdram_leave_start,
  810. &ecovec24_sdram_leave_end);
  811. /* enable STATUS0, STATUS2 and PDSTATUS */
  812. gpio_request(GPIO_FN_STATUS0, NULL);
  813. gpio_request(GPIO_FN_STATUS2, NULL);
  814. gpio_request(GPIO_FN_PDSTATUS, NULL);
  815. /* enable SCIFA0 */
  816. gpio_request(GPIO_FN_SCIF0_TXD, NULL);
  817. gpio_request(GPIO_FN_SCIF0_RXD, NULL);
  818. /* enable debug LED */
  819. gpio_request(GPIO_PTG0, NULL);
  820. gpio_request(GPIO_PTG1, NULL);
  821. gpio_request(GPIO_PTG2, NULL);
  822. gpio_request(GPIO_PTG3, NULL);
  823. gpio_direction_output(GPIO_PTG0, 0);
  824. gpio_direction_output(GPIO_PTG1, 0);
  825. gpio_direction_output(GPIO_PTG2, 0);
  826. gpio_direction_output(GPIO_PTG3, 0);
  827. __raw_writew((__raw_readw(PORT_HIZA) & ~(0x1 << 1)) , PORT_HIZA);
  828. /* enable SH-Eth */
  829. gpio_request(GPIO_PTA1, NULL);
  830. gpio_direction_output(GPIO_PTA1, 1);
  831. mdelay(20);
  832. gpio_request(GPIO_FN_RMII_RXD0, NULL);
  833. gpio_request(GPIO_FN_RMII_RXD1, NULL);
  834. gpio_request(GPIO_FN_RMII_TXD0, NULL);
  835. gpio_request(GPIO_FN_RMII_TXD1, NULL);
  836. gpio_request(GPIO_FN_RMII_REF_CLK, NULL);
  837. gpio_request(GPIO_FN_RMII_TX_EN, NULL);
  838. gpio_request(GPIO_FN_RMII_RX_ER, NULL);
  839. gpio_request(GPIO_FN_RMII_CRS_DV, NULL);
  840. gpio_request(GPIO_FN_MDIO, NULL);
  841. gpio_request(GPIO_FN_MDC, NULL);
  842. gpio_request(GPIO_FN_LNKSTA, NULL);
  843. /* enable USB */
  844. __raw_writew(0x0000, 0xA4D80000);
  845. __raw_writew(0x0000, 0xA4D90000);
  846. gpio_request(GPIO_PTB3, NULL);
  847. gpio_request(GPIO_PTB4, NULL);
  848. gpio_request(GPIO_PTB5, NULL);
  849. gpio_direction_input(GPIO_PTB3);
  850. gpio_direction_output(GPIO_PTB4, 0);
  851. gpio_direction_output(GPIO_PTB5, 0);
  852. __raw_writew(0x0600, 0xa40501d4);
  853. __raw_writew(0x0600, 0xa4050192);
  854. if (gpio_get_value(GPIO_PTB3)) {
  855. printk(KERN_INFO "USB1 function is selected\n");
  856. usb1_common_device.name = "r8a66597_udc";
  857. } else {
  858. printk(KERN_INFO "USB1 host is selected\n");
  859. usb1_common_device.name = "r8a66597_hcd";
  860. }
  861. /* enable LCDC */
  862. gpio_request(GPIO_FN_LCDD23, NULL);
  863. gpio_request(GPIO_FN_LCDD22, NULL);
  864. gpio_request(GPIO_FN_LCDD21, NULL);
  865. gpio_request(GPIO_FN_LCDD20, NULL);
  866. gpio_request(GPIO_FN_LCDD19, NULL);
  867. gpio_request(GPIO_FN_LCDD18, NULL);
  868. gpio_request(GPIO_FN_LCDD17, NULL);
  869. gpio_request(GPIO_FN_LCDD16, NULL);
  870. gpio_request(GPIO_FN_LCDD15, NULL);
  871. gpio_request(GPIO_FN_LCDD14, NULL);
  872. gpio_request(GPIO_FN_LCDD13, NULL);
  873. gpio_request(GPIO_FN_LCDD12, NULL);
  874. gpio_request(GPIO_FN_LCDD11, NULL);
  875. gpio_request(GPIO_FN_LCDD10, NULL);
  876. gpio_request(GPIO_FN_LCDD9, NULL);
  877. gpio_request(GPIO_FN_LCDD8, NULL);
  878. gpio_request(GPIO_FN_LCDD7, NULL);
  879. gpio_request(GPIO_FN_LCDD6, NULL);
  880. gpio_request(GPIO_FN_LCDD5, NULL);
  881. gpio_request(GPIO_FN_LCDD4, NULL);
  882. gpio_request(GPIO_FN_LCDD3, NULL);
  883. gpio_request(GPIO_FN_LCDD2, NULL);
  884. gpio_request(GPIO_FN_LCDD1, NULL);
  885. gpio_request(GPIO_FN_LCDD0, NULL);
  886. gpio_request(GPIO_FN_LCDDISP, NULL);
  887. gpio_request(GPIO_FN_LCDHSYN, NULL);
  888. gpio_request(GPIO_FN_LCDDCK, NULL);
  889. gpio_request(GPIO_FN_LCDVSYN, NULL);
  890. gpio_request(GPIO_FN_LCDDON, NULL);
  891. gpio_request(GPIO_FN_LCDLCLK, NULL);
  892. __raw_writew((__raw_readw(PORT_HIZA) & ~0x0001), PORT_HIZA);
  893. gpio_request(GPIO_PTE6, NULL);
  894. gpio_request(GPIO_PTU1, NULL);
  895. gpio_request(GPIO_PTR1, NULL);
  896. gpio_request(GPIO_PTA2, NULL);
  897. gpio_direction_input(GPIO_PTE6);
  898. gpio_direction_output(GPIO_PTU1, 0);
  899. gpio_direction_output(GPIO_PTR1, 0);
  900. gpio_direction_output(GPIO_PTA2, 0);
  901. /* I/O buffer drive ability is high */
  902. __raw_writew((__raw_readw(IODRIVEA) & ~0x00c0) | 0x0080 , IODRIVEA);
  903. if (gpio_get_value(GPIO_PTE6)) {
  904. /* DVI */
  905. lcdc_info.clock_source = LCDC_CLK_EXTERNAL;
  906. lcdc_info.ch[0].clock_divider = 1,
  907. lcdc_info.ch[0].lcd_cfg.name = "DVI";
  908. lcdc_info.ch[0].lcd_cfg.xres = 1280;
  909. lcdc_info.ch[0].lcd_cfg.yres = 720;
  910. lcdc_info.ch[0].lcd_cfg.left_margin = 220;
  911. lcdc_info.ch[0].lcd_cfg.right_margin = 110;
  912. lcdc_info.ch[0].lcd_cfg.hsync_len = 40;
  913. lcdc_info.ch[0].lcd_cfg.upper_margin = 20;
  914. lcdc_info.ch[0].lcd_cfg.lower_margin = 5;
  915. lcdc_info.ch[0].lcd_cfg.vsync_len = 5;
  916. gpio_set_value(GPIO_PTA2, 1);
  917. gpio_set_value(GPIO_PTU1, 1);
  918. } else {
  919. /* Panel */
  920. lcdc_info.clock_source = LCDC_CLK_PERIPHERAL;
  921. lcdc_info.ch[0].clock_divider = 2,
  922. lcdc_info.ch[0].lcd_cfg.name = "Panel";
  923. lcdc_info.ch[0].lcd_cfg.xres = 800;
  924. lcdc_info.ch[0].lcd_cfg.yres = 480;
  925. lcdc_info.ch[0].lcd_cfg.left_margin = 220;
  926. lcdc_info.ch[0].lcd_cfg.right_margin = 110;
  927. lcdc_info.ch[0].lcd_cfg.hsync_len = 70;
  928. lcdc_info.ch[0].lcd_cfg.upper_margin = 20;
  929. lcdc_info.ch[0].lcd_cfg.lower_margin = 5;
  930. lcdc_info.ch[0].lcd_cfg.vsync_len = 5;
  931. gpio_set_value(GPIO_PTR1, 1);
  932. /* FIXME
  933. *
  934. * LCDDON control is needed for Panel,
  935. * but current sh_mobile_lcdc driver doesn't control it.
  936. * It is temporary correspondence
  937. */
  938. gpio_request(GPIO_PTF4, NULL);
  939. gpio_direction_output(GPIO_PTF4, 1);
  940. /* enable TouchScreen */
  941. i2c_register_board_info(0, &ts_i2c_clients, 1);
  942. set_irq_type(IRQ0, IRQ_TYPE_LEVEL_LOW);
  943. }
  944. /* enable CEU0 */
  945. gpio_request(GPIO_FN_VIO0_D15, NULL);
  946. gpio_request(GPIO_FN_VIO0_D14, NULL);
  947. gpio_request(GPIO_FN_VIO0_D13, NULL);
  948. gpio_request(GPIO_FN_VIO0_D12, NULL);
  949. gpio_request(GPIO_FN_VIO0_D11, NULL);
  950. gpio_request(GPIO_FN_VIO0_D10, NULL);
  951. gpio_request(GPIO_FN_VIO0_D9, NULL);
  952. gpio_request(GPIO_FN_VIO0_D8, NULL);
  953. gpio_request(GPIO_FN_VIO0_D7, NULL);
  954. gpio_request(GPIO_FN_VIO0_D6, NULL);
  955. gpio_request(GPIO_FN_VIO0_D5, NULL);
  956. gpio_request(GPIO_FN_VIO0_D4, NULL);
  957. gpio_request(GPIO_FN_VIO0_D3, NULL);
  958. gpio_request(GPIO_FN_VIO0_D2, NULL);
  959. gpio_request(GPIO_FN_VIO0_D1, NULL);
  960. gpio_request(GPIO_FN_VIO0_D0, NULL);
  961. gpio_request(GPIO_FN_VIO0_VD, NULL);
  962. gpio_request(GPIO_FN_VIO0_CLK, NULL);
  963. gpio_request(GPIO_FN_VIO0_FLD, NULL);
  964. gpio_request(GPIO_FN_VIO0_HD, NULL);
  965. platform_resource_setup_memory(&ceu0_device, "ceu0", 4 << 20);
  966. /* enable CEU1 */
  967. gpio_request(GPIO_FN_VIO1_D7, NULL);
  968. gpio_request(GPIO_FN_VIO1_D6, NULL);
  969. gpio_request(GPIO_FN_VIO1_D5, NULL);
  970. gpio_request(GPIO_FN_VIO1_D4, NULL);
  971. gpio_request(GPIO_FN_VIO1_D3, NULL);
  972. gpio_request(GPIO_FN_VIO1_D2, NULL);
  973. gpio_request(GPIO_FN_VIO1_D1, NULL);
  974. gpio_request(GPIO_FN_VIO1_D0, NULL);
  975. gpio_request(GPIO_FN_VIO1_FLD, NULL);
  976. gpio_request(GPIO_FN_VIO1_HD, NULL);
  977. gpio_request(GPIO_FN_VIO1_VD, NULL);
  978. gpio_request(GPIO_FN_VIO1_CLK, NULL);
  979. platform_resource_setup_memory(&ceu1_device, "ceu1", 4 << 20);
  980. /* enable KEYSC */
  981. gpio_request(GPIO_FN_KEYOUT5_IN5, NULL);
  982. gpio_request(GPIO_FN_KEYOUT4_IN6, NULL);
  983. gpio_request(GPIO_FN_KEYOUT3, NULL);
  984. gpio_request(GPIO_FN_KEYOUT2, NULL);
  985. gpio_request(GPIO_FN_KEYOUT1, NULL);
  986. gpio_request(GPIO_FN_KEYOUT0, NULL);
  987. gpio_request(GPIO_FN_KEYIN0, NULL);
  988. /* enable user debug switch */
  989. gpio_request(GPIO_PTR0, NULL);
  990. gpio_request(GPIO_PTR4, NULL);
  991. gpio_request(GPIO_PTR5, NULL);
  992. gpio_request(GPIO_PTR6, NULL);
  993. gpio_direction_input(GPIO_PTR0);
  994. gpio_direction_input(GPIO_PTR4);
  995. gpio_direction_input(GPIO_PTR5);
  996. gpio_direction_input(GPIO_PTR6);
  997. #ifdef CONFIG_MFD_SH_MOBILE_SDHI
  998. /* enable SDHI0 on CN11 (needs DS2.4 set to ON) */
  999. gpio_request(GPIO_FN_SDHI0CD, NULL);
  1000. gpio_request(GPIO_FN_SDHI0WP, NULL);
  1001. gpio_request(GPIO_FN_SDHI0CMD, NULL);
  1002. gpio_request(GPIO_FN_SDHI0CLK, NULL);
  1003. gpio_request(GPIO_FN_SDHI0D3, NULL);
  1004. gpio_request(GPIO_FN_SDHI0D2, NULL);
  1005. gpio_request(GPIO_FN_SDHI0D1, NULL);
  1006. gpio_request(GPIO_FN_SDHI0D0, NULL);
  1007. gpio_request(GPIO_PTB6, NULL);
  1008. gpio_direction_output(GPIO_PTB6, 0);
  1009. /* enable SDHI1 on CN12 (needs DS2.6,7 set to ON,OFF) */
  1010. gpio_request(GPIO_FN_SDHI1CD, NULL);
  1011. gpio_request(GPIO_FN_SDHI1WP, NULL);
  1012. gpio_request(GPIO_FN_SDHI1CMD, NULL);
  1013. gpio_request(GPIO_FN_SDHI1CLK, NULL);
  1014. gpio_request(GPIO_FN_SDHI1D3, NULL);
  1015. gpio_request(GPIO_FN_SDHI1D2, NULL);
  1016. gpio_request(GPIO_FN_SDHI1D1, NULL);
  1017. gpio_request(GPIO_FN_SDHI1D0, NULL);
  1018. gpio_request(GPIO_PTB7, NULL);
  1019. gpio_direction_output(GPIO_PTB7, 0);
  1020. /* I/O buffer drive ability is high for SDHI1 */
  1021. __raw_writew((__raw_readw(IODRIVEA) & ~0x3000) | 0x2000 , IODRIVEA);
  1022. #else
  1023. /* enable MSIOF0 on CN11 (needs DS2.4 set to OFF) */
  1024. gpio_request(GPIO_FN_MSIOF0_TXD, NULL);
  1025. gpio_request(GPIO_FN_MSIOF0_RXD, NULL);
  1026. gpio_request(GPIO_FN_MSIOF0_TSCK, NULL);
  1027. gpio_request(GPIO_PTM4, NULL); /* software CS control of TSYNC pin */
  1028. gpio_direction_output(GPIO_PTM4, 1); /* active low CS */
  1029. gpio_request(GPIO_PTB6, NULL); /* 3.3V power control */
  1030. gpio_direction_output(GPIO_PTB6, 0); /* disable power by default */
  1031. gpio_request(GPIO_PTY6, NULL); /* write protect */
  1032. gpio_direction_input(GPIO_PTY6);
  1033. gpio_request(GPIO_PTY7, NULL); /* card detect */
  1034. gpio_direction_input(GPIO_PTY7);
  1035. spi_register_board_info(spi_bus, ARRAY_SIZE(spi_bus));
  1036. #endif
  1037. /* enable Video */
  1038. gpio_request(GPIO_PTU2, NULL);
  1039. gpio_direction_output(GPIO_PTU2, 1);
  1040. /* enable Camera */
  1041. gpio_request(GPIO_PTA3, NULL);
  1042. gpio_request(GPIO_PTA4, NULL);
  1043. gpio_direction_output(GPIO_PTA3, 0);
  1044. gpio_direction_output(GPIO_PTA4, 0);
  1045. /* enable FSI */
  1046. gpio_request(GPIO_FN_FSIMCKB, NULL);
  1047. gpio_request(GPIO_FN_FSIIBSD, NULL);
  1048. gpio_request(GPIO_FN_FSIOBSD, NULL);
  1049. gpio_request(GPIO_FN_FSIIBBCK, NULL);
  1050. gpio_request(GPIO_FN_FSIIBLRCK, NULL);
  1051. gpio_request(GPIO_FN_FSIOBBCK, NULL);
  1052. gpio_request(GPIO_FN_FSIOBLRCK, NULL);
  1053. gpio_request(GPIO_FN_CLKAUDIOBO, NULL);
  1054. /* set SPU2 clock to 83.4 MHz */
  1055. clk = clk_get(NULL, "spu_clk");
  1056. if (clk) {
  1057. clk_set_rate(clk, clk_round_rate(clk, 83333333));
  1058. clk_put(clk);
  1059. }
  1060. /* change parent of FSI B */
  1061. clk = clk_get(NULL, "fsib_clk");
  1062. if (clk) {
  1063. clk_register(&fsimckb_clk);
  1064. clk_set_parent(clk, &fsimckb_clk);
  1065. clk_set_rate(clk, 11000);
  1066. clk_set_rate(&fsimckb_clk, 11000);
  1067. clk_put(clk);
  1068. }
  1069. gpio_request(GPIO_PTU0, NULL);
  1070. gpio_direction_output(GPIO_PTU0, 0);
  1071. mdelay(20);
  1072. /* enable motion sensor */
  1073. gpio_request(GPIO_FN_INTC_IRQ1, NULL);
  1074. gpio_direction_input(GPIO_FN_INTC_IRQ1);
  1075. /* set VPU clock to 166 MHz */
  1076. clk = clk_get(NULL, "vpu_clk");
  1077. if (clk) {
  1078. clk_set_rate(clk, clk_round_rate(clk, 166000000));
  1079. clk_put(clk);
  1080. }
  1081. /* enable IrDA */
  1082. gpio_request(GPIO_FN_IRDA_OUT, NULL);
  1083. gpio_request(GPIO_FN_IRDA_IN, NULL);
  1084. gpio_request(GPIO_PTU5, NULL);
  1085. gpio_direction_output(GPIO_PTU5, 0);
  1086. /* enable I2C device */
  1087. i2c_register_board_info(0, i2c0_devices,
  1088. ARRAY_SIZE(i2c0_devices));
  1089. i2c_register_board_info(1, i2c1_devices,
  1090. ARRAY_SIZE(i2c1_devices));
  1091. /* VOU */
  1092. gpio_request(GPIO_FN_DV_D15, NULL);
  1093. gpio_request(GPIO_FN_DV_D14, NULL);
  1094. gpio_request(GPIO_FN_DV_D13, NULL);
  1095. gpio_request(GPIO_FN_DV_D12, NULL);
  1096. gpio_request(GPIO_FN_DV_D11, NULL);
  1097. gpio_request(GPIO_FN_DV_D10, NULL);
  1098. gpio_request(GPIO_FN_DV_D9, NULL);
  1099. gpio_request(GPIO_FN_DV_D8, NULL);
  1100. gpio_request(GPIO_FN_DV_CLKI, NULL);
  1101. gpio_request(GPIO_FN_DV_CLK, NULL);
  1102. gpio_request(GPIO_FN_DV_VSYNC, NULL);
  1103. gpio_request(GPIO_FN_DV_HSYNC, NULL);
  1104. /* AK8813 power / reset sequence */
  1105. gpio_request(GPIO_PTG4, NULL);
  1106. gpio_request(GPIO_PTU3, NULL);
  1107. /* Reset */
  1108. gpio_direction_output(GPIO_PTG4, 0);
  1109. /* Power down */
  1110. gpio_direction_output(GPIO_PTU3, 1);
  1111. udelay(10);
  1112. /* Power up, reset */
  1113. gpio_set_value(GPIO_PTU3, 0);
  1114. udelay(10);
  1115. /* Remove reset */
  1116. gpio_set_value(GPIO_PTG4, 1);
  1117. return platform_add_devices(ecovec_devices,
  1118. ARRAY_SIZE(ecovec_devices));
  1119. }
  1120. arch_initcall(arch_setup);
  1121. static int __init devices_setup(void)
  1122. {
  1123. sh_eth_init(&sh_eth_plat);
  1124. return 0;
  1125. }
  1126. device_initcall(devices_setup);
  1127. static struct sh_machine_vector mv_ecovec __initmv = {
  1128. .mv_name = "R0P7724 (EcoVec)",
  1129. };