book3s_64_mmu_host.c 11 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440
  1. /*
  2. * Copyright (C) 2009 SUSE Linux Products GmbH. All rights reserved.
  3. *
  4. * Authors:
  5. * Alexander Graf <agraf@suse.de>
  6. * Kevin Wolf <mail@kevin-wolf.de>
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License, version 2, as
  10. * published by the Free Software Foundation.
  11. *
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License
  18. * along with this program; if not, write to the Free Software
  19. * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
  20. */
  21. #include <linux/kvm_host.h>
  22. #include <asm/kvm_ppc.h>
  23. #include <asm/kvm_book3s.h>
  24. #include <asm/mmu-hash64.h>
  25. #include <asm/machdep.h>
  26. #include <asm/mmu_context.h>
  27. #include <asm/hw_irq.h>
  28. #define PTE_SIZE 12
  29. #define VSID_ALL 0
  30. /* #define DEBUG_MMU */
  31. /* #define DEBUG_SLB */
  32. #ifdef DEBUG_MMU
  33. #define dprintk_mmu(a, ...) printk(KERN_INFO a, __VA_ARGS__)
  34. #else
  35. #define dprintk_mmu(a, ...) do { } while(0)
  36. #endif
  37. #ifdef DEBUG_SLB
  38. #define dprintk_slb(a, ...) printk(KERN_INFO a, __VA_ARGS__)
  39. #else
  40. #define dprintk_slb(a, ...) do { } while(0)
  41. #endif
  42. static void invalidate_pte(struct hpte_cache *pte)
  43. {
  44. dprintk_mmu("KVM: Flushing SPT: 0x%lx (0x%llx) -> 0x%llx\n",
  45. pte->pte.eaddr, pte->pte.vpage, pte->host_va);
  46. ppc_md.hpte_invalidate(pte->slot, pte->host_va,
  47. MMU_PAGE_4K, MMU_SEGSIZE_256M,
  48. false);
  49. pte->host_va = 0;
  50. if (pte->pte.may_write)
  51. kvm_release_pfn_dirty(pte->pfn);
  52. else
  53. kvm_release_pfn_clean(pte->pfn);
  54. }
  55. void kvmppc_mmu_pte_flush(struct kvm_vcpu *vcpu, ulong guest_ea, ulong ea_mask)
  56. {
  57. int i;
  58. dprintk_mmu("KVM: Flushing %d Shadow PTEs: 0x%lx & 0x%lx\n",
  59. vcpu->arch.hpte_cache_offset, guest_ea, ea_mask);
  60. BUG_ON(vcpu->arch.hpte_cache_offset > HPTEG_CACHE_NUM);
  61. guest_ea &= ea_mask;
  62. for (i = 0; i < vcpu->arch.hpte_cache_offset; i++) {
  63. struct hpte_cache *pte;
  64. pte = &vcpu->arch.hpte_cache[i];
  65. if (!pte->host_va)
  66. continue;
  67. if ((pte->pte.eaddr & ea_mask) == guest_ea) {
  68. invalidate_pte(pte);
  69. }
  70. }
  71. /* Doing a complete flush -> start from scratch */
  72. if (!ea_mask)
  73. vcpu->arch.hpte_cache_offset = 0;
  74. }
  75. void kvmppc_mmu_pte_vflush(struct kvm_vcpu *vcpu, u64 guest_vp, u64 vp_mask)
  76. {
  77. int i;
  78. dprintk_mmu("KVM: Flushing %d Shadow vPTEs: 0x%llx & 0x%llx\n",
  79. vcpu->arch.hpte_cache_offset, guest_vp, vp_mask);
  80. BUG_ON(vcpu->arch.hpte_cache_offset > HPTEG_CACHE_NUM);
  81. guest_vp &= vp_mask;
  82. for (i = 0; i < vcpu->arch.hpte_cache_offset; i++) {
  83. struct hpte_cache *pte;
  84. pte = &vcpu->arch.hpte_cache[i];
  85. if (!pte->host_va)
  86. continue;
  87. if ((pte->pte.vpage & vp_mask) == guest_vp) {
  88. invalidate_pte(pte);
  89. }
  90. }
  91. }
  92. void kvmppc_mmu_pte_pflush(struct kvm_vcpu *vcpu, ulong pa_start, ulong pa_end)
  93. {
  94. int i;
  95. dprintk_mmu("KVM: Flushing %d Shadow pPTEs: 0x%lx & 0x%lx\n",
  96. vcpu->arch.hpte_cache_offset, pa_start, pa_end);
  97. BUG_ON(vcpu->arch.hpte_cache_offset > HPTEG_CACHE_NUM);
  98. for (i = 0; i < vcpu->arch.hpte_cache_offset; i++) {
  99. struct hpte_cache *pte;
  100. pte = &vcpu->arch.hpte_cache[i];
  101. if (!pte->host_va)
  102. continue;
  103. if ((pte->pte.raddr >= pa_start) &&
  104. (pte->pte.raddr < pa_end)) {
  105. invalidate_pte(pte);
  106. }
  107. }
  108. }
  109. struct kvmppc_pte *kvmppc_mmu_find_pte(struct kvm_vcpu *vcpu, u64 ea, bool data)
  110. {
  111. int i;
  112. u64 guest_vp;
  113. guest_vp = vcpu->arch.mmu.ea_to_vp(vcpu, ea, false);
  114. for (i=0; i<vcpu->arch.hpte_cache_offset; i++) {
  115. struct hpte_cache *pte;
  116. pte = &vcpu->arch.hpte_cache[i];
  117. if (!pte->host_va)
  118. continue;
  119. if (pte->pte.vpage == guest_vp)
  120. return &pte->pte;
  121. }
  122. return NULL;
  123. }
  124. static int kvmppc_mmu_hpte_cache_next(struct kvm_vcpu *vcpu)
  125. {
  126. if (vcpu->arch.hpte_cache_offset == HPTEG_CACHE_NUM)
  127. kvmppc_mmu_pte_flush(vcpu, 0, 0);
  128. return vcpu->arch.hpte_cache_offset++;
  129. }
  130. /* We keep 512 gvsid->hvsid entries, mapping the guest ones to the array using
  131. * a hash, so we don't waste cycles on looping */
  132. static u16 kvmppc_sid_hash(struct kvm_vcpu *vcpu, u64 gvsid)
  133. {
  134. return (u16)(((gvsid >> (SID_MAP_BITS * 7)) & SID_MAP_MASK) ^
  135. ((gvsid >> (SID_MAP_BITS * 6)) & SID_MAP_MASK) ^
  136. ((gvsid >> (SID_MAP_BITS * 5)) & SID_MAP_MASK) ^
  137. ((gvsid >> (SID_MAP_BITS * 4)) & SID_MAP_MASK) ^
  138. ((gvsid >> (SID_MAP_BITS * 3)) & SID_MAP_MASK) ^
  139. ((gvsid >> (SID_MAP_BITS * 2)) & SID_MAP_MASK) ^
  140. ((gvsid >> (SID_MAP_BITS * 1)) & SID_MAP_MASK) ^
  141. ((gvsid >> (SID_MAP_BITS * 0)) & SID_MAP_MASK));
  142. }
  143. static struct kvmppc_sid_map *find_sid_vsid(struct kvm_vcpu *vcpu, u64 gvsid)
  144. {
  145. struct kvmppc_sid_map *map;
  146. u16 sid_map_mask;
  147. if (vcpu->arch.msr & MSR_PR)
  148. gvsid |= VSID_PR;
  149. sid_map_mask = kvmppc_sid_hash(vcpu, gvsid);
  150. map = &to_book3s(vcpu)->sid_map[sid_map_mask];
  151. if (map->guest_vsid == gvsid) {
  152. dprintk_slb("SLB: Searching: 0x%llx -> 0x%llx\n",
  153. gvsid, map->host_vsid);
  154. return map;
  155. }
  156. map = &to_book3s(vcpu)->sid_map[SID_MAP_MASK - sid_map_mask];
  157. if (map->guest_vsid == gvsid) {
  158. dprintk_slb("SLB: Searching 0x%llx -> 0x%llx\n",
  159. gvsid, map->host_vsid);
  160. return map;
  161. }
  162. dprintk_slb("SLB: Searching %d/%d: 0x%llx -> not found\n",
  163. sid_map_mask, SID_MAP_MASK - sid_map_mask, gvsid);
  164. return NULL;
  165. }
  166. int kvmppc_mmu_map_page(struct kvm_vcpu *vcpu, struct kvmppc_pte *orig_pte)
  167. {
  168. pfn_t hpaddr;
  169. ulong hash, hpteg, va;
  170. u64 vsid;
  171. int ret;
  172. int rflags = 0x192;
  173. int vflags = 0;
  174. int attempt = 0;
  175. struct kvmppc_sid_map *map;
  176. /* Get host physical address for gpa */
  177. hpaddr = gfn_to_pfn(vcpu->kvm, orig_pte->raddr >> PAGE_SHIFT);
  178. if (kvm_is_error_hva(hpaddr)) {
  179. printk(KERN_INFO "Couldn't get guest page for gfn %lx!\n", orig_pte->eaddr);
  180. return -EINVAL;
  181. }
  182. hpaddr <<= PAGE_SHIFT;
  183. #if PAGE_SHIFT == 12
  184. #elif PAGE_SHIFT == 16
  185. hpaddr |= orig_pte->raddr & 0xf000;
  186. #else
  187. #error Unknown page size
  188. #endif
  189. /* and write the mapping ea -> hpa into the pt */
  190. vcpu->arch.mmu.esid_to_vsid(vcpu, orig_pte->eaddr >> SID_SHIFT, &vsid);
  191. map = find_sid_vsid(vcpu, vsid);
  192. if (!map) {
  193. ret = kvmppc_mmu_map_segment(vcpu, orig_pte->eaddr);
  194. WARN_ON(ret < 0);
  195. map = find_sid_vsid(vcpu, vsid);
  196. }
  197. if (!map) {
  198. printk(KERN_ERR "KVM: Segment map for 0x%llx (0x%lx) failed\n",
  199. vsid, orig_pte->eaddr);
  200. WARN_ON(true);
  201. return -EINVAL;
  202. }
  203. vsid = map->host_vsid;
  204. va = hpt_va(orig_pte->eaddr, vsid, MMU_SEGSIZE_256M);
  205. if (!orig_pte->may_write)
  206. rflags |= HPTE_R_PP;
  207. else
  208. mark_page_dirty(vcpu->kvm, orig_pte->raddr >> PAGE_SHIFT);
  209. if (!orig_pte->may_execute)
  210. rflags |= HPTE_R_N;
  211. hash = hpt_hash(va, PTE_SIZE, MMU_SEGSIZE_256M);
  212. map_again:
  213. hpteg = ((hash & htab_hash_mask) * HPTES_PER_GROUP);
  214. /* In case we tried normal mapping already, let's nuke old entries */
  215. if (attempt > 1)
  216. if (ppc_md.hpte_remove(hpteg) < 0)
  217. return -1;
  218. ret = ppc_md.hpte_insert(hpteg, va, hpaddr, rflags, vflags, MMU_PAGE_4K, MMU_SEGSIZE_256M);
  219. if (ret < 0) {
  220. /* If we couldn't map a primary PTE, try a secondary */
  221. hash = ~hash;
  222. vflags ^= HPTE_V_SECONDARY;
  223. attempt++;
  224. goto map_again;
  225. } else {
  226. int hpte_id = kvmppc_mmu_hpte_cache_next(vcpu);
  227. struct hpte_cache *pte = &vcpu->arch.hpte_cache[hpte_id];
  228. dprintk_mmu("KVM: %c%c Map 0x%lx: [%lx] 0x%lx (0x%llx) -> %lx\n",
  229. ((rflags & HPTE_R_PP) == 3) ? '-' : 'w',
  230. (rflags & HPTE_R_N) ? '-' : 'x',
  231. orig_pte->eaddr, hpteg, va, orig_pte->vpage, hpaddr);
  232. /* The ppc_md code may give us a secondary entry even though we
  233. asked for a primary. Fix up. */
  234. if ((ret & _PTEIDX_SECONDARY) && !(vflags & HPTE_V_SECONDARY)) {
  235. hash = ~hash;
  236. hpteg = ((hash & htab_hash_mask) * HPTES_PER_GROUP);
  237. }
  238. pte->slot = hpteg + (ret & 7);
  239. pte->host_va = va;
  240. pte->pte = *orig_pte;
  241. pte->pfn = hpaddr >> PAGE_SHIFT;
  242. }
  243. return 0;
  244. }
  245. static struct kvmppc_sid_map *create_sid_map(struct kvm_vcpu *vcpu, u64 gvsid)
  246. {
  247. struct kvmppc_sid_map *map;
  248. struct kvmppc_vcpu_book3s *vcpu_book3s = to_book3s(vcpu);
  249. u16 sid_map_mask;
  250. static int backwards_map = 0;
  251. if (vcpu->arch.msr & MSR_PR)
  252. gvsid |= VSID_PR;
  253. /* We might get collisions that trap in preceding order, so let's
  254. map them differently */
  255. sid_map_mask = kvmppc_sid_hash(vcpu, gvsid);
  256. if (backwards_map)
  257. sid_map_mask = SID_MAP_MASK - sid_map_mask;
  258. map = &to_book3s(vcpu)->sid_map[sid_map_mask];
  259. /* Make sure we're taking the other map next time */
  260. backwards_map = !backwards_map;
  261. /* Uh-oh ... out of mappings. Let's flush! */
  262. if (vcpu_book3s->vsid_next == vcpu_book3s->vsid_max) {
  263. vcpu_book3s->vsid_next = vcpu_book3s->vsid_first;
  264. memset(vcpu_book3s->sid_map, 0,
  265. sizeof(struct kvmppc_sid_map) * SID_MAP_NUM);
  266. kvmppc_mmu_pte_flush(vcpu, 0, 0);
  267. kvmppc_mmu_flush_segments(vcpu);
  268. }
  269. map->host_vsid = vcpu_book3s->vsid_next++;
  270. map->guest_vsid = gvsid;
  271. map->valid = true;
  272. dprintk_slb("SLB: New mapping at %d: 0x%llx -> 0x%llx\n",
  273. sid_map_mask, gvsid, map->host_vsid);
  274. return map;
  275. }
  276. static int kvmppc_mmu_next_segment(struct kvm_vcpu *vcpu, ulong esid)
  277. {
  278. int i;
  279. int max_slb_size = 64;
  280. int found_inval = -1;
  281. int r;
  282. if (!to_svcpu(vcpu)->slb_max)
  283. to_svcpu(vcpu)->slb_max = 1;
  284. /* Are we overwriting? */
  285. for (i = 1; i < to_svcpu(vcpu)->slb_max; i++) {
  286. if (!(to_svcpu(vcpu)->slb[i].esid & SLB_ESID_V))
  287. found_inval = i;
  288. else if ((to_svcpu(vcpu)->slb[i].esid & ESID_MASK) == esid)
  289. return i;
  290. }
  291. /* Found a spare entry that was invalidated before */
  292. if (found_inval > 0)
  293. return found_inval;
  294. /* No spare invalid entry, so create one */
  295. if (mmu_slb_size < 64)
  296. max_slb_size = mmu_slb_size;
  297. /* Overflowing -> purge */
  298. if ((to_svcpu(vcpu)->slb_max) == max_slb_size)
  299. kvmppc_mmu_flush_segments(vcpu);
  300. r = to_svcpu(vcpu)->slb_max;
  301. to_svcpu(vcpu)->slb_max++;
  302. return r;
  303. }
  304. int kvmppc_mmu_map_segment(struct kvm_vcpu *vcpu, ulong eaddr)
  305. {
  306. u64 esid = eaddr >> SID_SHIFT;
  307. u64 slb_esid = (eaddr & ESID_MASK) | SLB_ESID_V;
  308. u64 slb_vsid = SLB_VSID_USER;
  309. u64 gvsid;
  310. int slb_index;
  311. struct kvmppc_sid_map *map;
  312. slb_index = kvmppc_mmu_next_segment(vcpu, eaddr & ESID_MASK);
  313. if (vcpu->arch.mmu.esid_to_vsid(vcpu, esid, &gvsid)) {
  314. /* Invalidate an entry */
  315. to_svcpu(vcpu)->slb[slb_index].esid = 0;
  316. return -ENOENT;
  317. }
  318. map = find_sid_vsid(vcpu, gvsid);
  319. if (!map)
  320. map = create_sid_map(vcpu, gvsid);
  321. map->guest_esid = esid;
  322. slb_vsid |= (map->host_vsid << 12);
  323. slb_vsid &= ~SLB_VSID_KP;
  324. slb_esid |= slb_index;
  325. to_svcpu(vcpu)->slb[slb_index].esid = slb_esid;
  326. to_svcpu(vcpu)->slb[slb_index].vsid = slb_vsid;
  327. dprintk_slb("slbmte %#llx, %#llx\n", slb_vsid, slb_esid);
  328. return 0;
  329. }
  330. void kvmppc_mmu_flush_segments(struct kvm_vcpu *vcpu)
  331. {
  332. to_svcpu(vcpu)->slb_max = 1;
  333. to_svcpu(vcpu)->slb[0].esid = 0;
  334. }
  335. void kvmppc_mmu_destroy(struct kvm_vcpu *vcpu)
  336. {
  337. kvmppc_mmu_pte_flush(vcpu, 0, 0);
  338. __destroy_context(to_book3s(vcpu)->context_id);
  339. }
  340. int kvmppc_mmu_init(struct kvm_vcpu *vcpu)
  341. {
  342. struct kvmppc_vcpu_book3s *vcpu3s = to_book3s(vcpu);
  343. int err;
  344. err = __init_new_context();
  345. if (err < 0)
  346. return -1;
  347. vcpu3s->context_id = err;
  348. vcpu3s->vsid_max = ((vcpu3s->context_id + 1) << USER_ESID_BITS) - 1;
  349. vcpu3s->vsid_first = vcpu3s->context_id << USER_ESID_BITS;
  350. vcpu3s->vsid_next = vcpu3s->vsid_first;
  351. return 0;
  352. }