mach-mx31lilly.c 10 KB

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  1. /*
  2. * LILLY-1131 module support
  3. *
  4. * Copyright (c) 2009 Daniel Mack <daniel@caiaq.de>
  5. *
  6. * based on code for other MX31 boards,
  7. *
  8. * Copyright 2005-2007 Freescale Semiconductor
  9. * Copyright (c) 2009 Alberto Panizzo <maramaopercheseimorto@gmail.com>
  10. * Copyright (C) 2009 Valentin Longchamp, EPFL Mobots group
  11. *
  12. * This program is free software; you can redistribute it and/or modify
  13. * it under the terms of the GNU General Public License as published by
  14. * the Free Software Foundation; either version 2 of the License, or
  15. * (at your option) any later version.
  16. *
  17. * This program is distributed in the hope that it will be useful,
  18. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  19. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  20. * GNU General Public License for more details.
  21. *
  22. * You should have received a copy of the GNU General Public License
  23. * along with this program; if not, write to the Free Software
  24. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  25. */
  26. #include <linux/types.h>
  27. #include <linux/init.h>
  28. #include <linux/clk.h>
  29. #include <linux/gpio.h>
  30. #include <linux/platform_device.h>
  31. #include <linux/interrupt.h>
  32. #include <linux/smsc911x.h>
  33. #include <linux/mtd/physmap.h>
  34. #include <linux/spi/spi.h>
  35. #include <linux/mfd/mc13783.h>
  36. #include <linux/usb/otg.h>
  37. #include <linux/usb/ulpi.h>
  38. #include <asm/mach-types.h>
  39. #include <asm/mach/arch.h>
  40. #include <asm/mach/time.h>
  41. #include <asm/mach/map.h>
  42. #include <mach/hardware.h>
  43. #include <mach/common.h>
  44. #include <mach/iomux-mx3.h>
  45. #include <mach/board-mx31lilly.h>
  46. #include <mach/spi.h>
  47. #include <mach/mxc_ehci.h>
  48. #include <mach/ulpi.h>
  49. #include "devices.h"
  50. /*
  51. * This file contains module-specific initialization routines for LILLY-1131.
  52. * Initialization of peripherals found on the baseboard is implemented in the
  53. * appropriate baseboard support code.
  54. */
  55. /* SMSC ethernet support */
  56. static struct resource smsc91x_resources[] = {
  57. {
  58. .start = MX31_CS4_BASE_ADDR,
  59. .end = MX31_CS4_BASE_ADDR + 0xffff,
  60. .flags = IORESOURCE_MEM,
  61. },
  62. {
  63. .start = IOMUX_TO_IRQ(MX31_PIN_GPIO1_0),
  64. .end = IOMUX_TO_IRQ(MX31_PIN_GPIO1_0),
  65. .flags = IORESOURCE_IRQ | IRQF_TRIGGER_FALLING,
  66. }
  67. };
  68. static struct smsc911x_platform_config smsc911x_config = {
  69. .phy_interface = PHY_INTERFACE_MODE_MII,
  70. .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
  71. .irq_type = SMSC911X_IRQ_TYPE_OPEN_DRAIN,
  72. .flags = SMSC911X_USE_32BIT |
  73. SMSC911X_SAVE_MAC_ADDRESS |
  74. SMSC911X_FORCE_INTERNAL_PHY,
  75. };
  76. static struct platform_device smsc91x_device = {
  77. .name = "smsc911x",
  78. .id = -1,
  79. .num_resources = ARRAY_SIZE(smsc91x_resources),
  80. .resource = smsc91x_resources,
  81. .dev = {
  82. .platform_data = &smsc911x_config,
  83. }
  84. };
  85. /* NOR flash */
  86. static struct physmap_flash_data nor_flash_data = {
  87. .width = 2,
  88. };
  89. static struct resource nor_flash_resource = {
  90. .start = 0xa0000000,
  91. .end = 0xa1ffffff,
  92. .flags = IORESOURCE_MEM,
  93. };
  94. static struct platform_device physmap_flash_device = {
  95. .name = "physmap-flash",
  96. .id = 0,
  97. .dev = {
  98. .platform_data = &nor_flash_data,
  99. },
  100. .resource = &nor_flash_resource,
  101. .num_resources = 1,
  102. };
  103. /* USB */
  104. #define USB_PAD_CFG (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST | PAD_CTL_HYS_CMOS | \
  105. PAD_CTL_ODE_CMOS | PAD_CTL_100K_PU)
  106. static int usbotg_init(struct platform_device *pdev)
  107. {
  108. unsigned int pins[] = {
  109. MX31_PIN_USBOTG_DATA0__USBOTG_DATA0,
  110. MX31_PIN_USBOTG_DATA1__USBOTG_DATA1,
  111. MX31_PIN_USBOTG_DATA2__USBOTG_DATA2,
  112. MX31_PIN_USBOTG_DATA3__USBOTG_DATA3,
  113. MX31_PIN_USBOTG_DATA4__USBOTG_DATA4,
  114. MX31_PIN_USBOTG_DATA5__USBOTG_DATA5,
  115. MX31_PIN_USBOTG_DATA6__USBOTG_DATA6,
  116. MX31_PIN_USBOTG_DATA7__USBOTG_DATA7,
  117. MX31_PIN_USBOTG_CLK__USBOTG_CLK,
  118. MX31_PIN_USBOTG_DIR__USBOTG_DIR,
  119. MX31_PIN_USBOTG_NXT__USBOTG_NXT,
  120. MX31_PIN_USBOTG_STP__USBOTG_STP,
  121. };
  122. mxc_iomux_setup_multiple_pins(pins, ARRAY_SIZE(pins), "USB OTG");
  123. mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA0, USB_PAD_CFG);
  124. mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA1, USB_PAD_CFG);
  125. mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA2, USB_PAD_CFG);
  126. mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA3, USB_PAD_CFG);
  127. mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA4, USB_PAD_CFG);
  128. mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA5, USB_PAD_CFG);
  129. mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA6, USB_PAD_CFG);
  130. mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA7, USB_PAD_CFG);
  131. mxc_iomux_set_pad(MX31_PIN_USBOTG_CLK, USB_PAD_CFG);
  132. mxc_iomux_set_pad(MX31_PIN_USBOTG_DIR, USB_PAD_CFG);
  133. mxc_iomux_set_pad(MX31_PIN_USBOTG_NXT, USB_PAD_CFG);
  134. mxc_iomux_set_pad(MX31_PIN_USBOTG_STP, USB_PAD_CFG);
  135. mxc_iomux_set_gpr(MUX_PGP_USB_4WIRE, true);
  136. mxc_iomux_set_gpr(MUX_PGP_USB_COMMON, true);
  137. /* chip select */
  138. mxc_iomux_alloc_pin(IOMUX_MODE(MX31_PIN_DTR_DCE2, IOMUX_CONFIG_GPIO),
  139. "USBOTG_CS");
  140. gpio_request(IOMUX_TO_GPIO(MX31_PIN_DTR_DCE2), "USBH1 CS");
  141. gpio_direction_output(IOMUX_TO_GPIO(MX31_PIN_DTR_DCE2), 0);
  142. return 0;
  143. }
  144. static int usbh1_init(struct platform_device *pdev)
  145. {
  146. int pins[] = {
  147. MX31_PIN_CSPI1_MOSI__USBH1_RXDM,
  148. MX31_PIN_CSPI1_MISO__USBH1_RXDP,
  149. MX31_PIN_CSPI1_SS0__USBH1_TXDM,
  150. MX31_PIN_CSPI1_SS1__USBH1_TXDP,
  151. MX31_PIN_CSPI1_SS2__USBH1_RCV,
  152. MX31_PIN_CSPI1_SCLK__USBH1_OEB,
  153. MX31_PIN_CSPI1_SPI_RDY__USBH1_FS,
  154. };
  155. mxc_iomux_setup_multiple_pins(pins, ARRAY_SIZE(pins), "USB H1");
  156. mxc_iomux_set_pad(MX31_PIN_CSPI1_MOSI, USB_PAD_CFG);
  157. mxc_iomux_set_pad(MX31_PIN_CSPI1_MISO, USB_PAD_CFG);
  158. mxc_iomux_set_pad(MX31_PIN_CSPI1_SS0, USB_PAD_CFG);
  159. mxc_iomux_set_pad(MX31_PIN_CSPI1_SS1, USB_PAD_CFG);
  160. mxc_iomux_set_pad(MX31_PIN_CSPI1_SS2, USB_PAD_CFG);
  161. mxc_iomux_set_pad(MX31_PIN_CSPI1_SCLK, USB_PAD_CFG);
  162. mxc_iomux_set_pad(MX31_PIN_CSPI1_SPI_RDY, USB_PAD_CFG);
  163. mxc_iomux_set_gpr(MUX_PGP_USB_SUSPEND, true);
  164. return 0;
  165. }
  166. static int usbh2_init(struct platform_device *pdev)
  167. {
  168. int pins[] = {
  169. MX31_PIN_USBH2_DATA0__USBH2_DATA0,
  170. MX31_PIN_USBH2_DATA1__USBH2_DATA1,
  171. MX31_PIN_USBH2_CLK__USBH2_CLK,
  172. MX31_PIN_USBH2_DIR__USBH2_DIR,
  173. MX31_PIN_USBH2_NXT__USBH2_NXT,
  174. MX31_PIN_USBH2_STP__USBH2_STP,
  175. };
  176. mxc_iomux_setup_multiple_pins(pins, ARRAY_SIZE(pins), "USB H2");
  177. mxc_iomux_set_pad(MX31_PIN_USBH2_CLK, USB_PAD_CFG);
  178. mxc_iomux_set_pad(MX31_PIN_USBH2_DIR, USB_PAD_CFG);
  179. mxc_iomux_set_pad(MX31_PIN_USBH2_NXT, USB_PAD_CFG);
  180. mxc_iomux_set_pad(MX31_PIN_USBH2_STP, USB_PAD_CFG);
  181. mxc_iomux_set_pad(MX31_PIN_USBH2_DATA0, USB_PAD_CFG);
  182. mxc_iomux_set_pad(MX31_PIN_USBH2_DATA1, USB_PAD_CFG);
  183. mxc_iomux_set_pad(MX31_PIN_SRXD6, USB_PAD_CFG);
  184. mxc_iomux_set_pad(MX31_PIN_STXD6, USB_PAD_CFG);
  185. mxc_iomux_set_pad(MX31_PIN_SFS3, USB_PAD_CFG);
  186. mxc_iomux_set_pad(MX31_PIN_SCK3, USB_PAD_CFG);
  187. mxc_iomux_set_pad(MX31_PIN_SRXD3, USB_PAD_CFG);
  188. mxc_iomux_set_pad(MX31_PIN_STXD3, USB_PAD_CFG);
  189. mxc_iomux_set_gpr(MUX_PGP_UH2, true);
  190. /* chip select */
  191. mxc_iomux_alloc_pin(IOMUX_MODE(MX31_PIN_DTR_DCE1, IOMUX_CONFIG_GPIO),
  192. "USBH2_CS");
  193. gpio_request(IOMUX_TO_GPIO(MX31_PIN_DTR_DCE1), "USBH2 CS");
  194. gpio_direction_output(IOMUX_TO_GPIO(MX31_PIN_DTR_DCE1), 0);
  195. return 0;
  196. }
  197. static struct mxc_usbh_platform_data usbotg_pdata = {
  198. .init = usbotg_init,
  199. .portsc = MXC_EHCI_MODE_ULPI | MXC_EHCI_UTMI_8BIT,
  200. .flags = MXC_EHCI_POWER_PINS_ENABLED,
  201. };
  202. static struct mxc_usbh_platform_data usbh1_pdata = {
  203. .init = usbh1_init,
  204. .portsc = MXC_EHCI_MODE_UTMI | MXC_EHCI_SERIAL,
  205. .flags = MXC_EHCI_POWER_PINS_ENABLED | MXC_EHCI_INTERFACE_SINGLE_UNI,
  206. };
  207. static struct mxc_usbh_platform_data usbh2_pdata = {
  208. .init = usbh2_init,
  209. .portsc = MXC_EHCI_MODE_ULPI | MXC_EHCI_UTMI_8BIT,
  210. .flags = MXC_EHCI_POWER_PINS_ENABLED,
  211. };
  212. static struct platform_device *devices[] __initdata = {
  213. &smsc91x_device,
  214. &physmap_flash_device,
  215. };
  216. /* SPI */
  217. static int spi_internal_chipselect[] = {
  218. MXC_SPI_CS(0),
  219. MXC_SPI_CS(1),
  220. MXC_SPI_CS(2),
  221. };
  222. static struct spi_imx_master spi0_pdata = {
  223. .chipselect = spi_internal_chipselect,
  224. .num_chipselect = ARRAY_SIZE(spi_internal_chipselect),
  225. };
  226. static struct spi_imx_master spi1_pdata = {
  227. .chipselect = spi_internal_chipselect,
  228. .num_chipselect = ARRAY_SIZE(spi_internal_chipselect),
  229. };
  230. static struct mc13783_platform_data mc13783_pdata __initdata = {
  231. .flags = MC13783_USE_RTC | MC13783_USE_TOUCHSCREEN,
  232. };
  233. static struct spi_board_info mc13783_dev __initdata = {
  234. .modalias = "mc13783",
  235. .max_speed_hz = 1000000,
  236. .bus_num = 1,
  237. .chip_select = 0,
  238. .platform_data = &mc13783_pdata,
  239. };
  240. static int mx31lilly_baseboard;
  241. core_param(mx31lilly_baseboard, mx31lilly_baseboard, int, 0444);
  242. static void __init mx31lilly_board_init(void)
  243. {
  244. switch (mx31lilly_baseboard) {
  245. case MX31LILLY_NOBOARD:
  246. break;
  247. case MX31LILLY_DB:
  248. mx31lilly_db_init();
  249. break;
  250. default:
  251. printk(KERN_ERR "Illegal mx31lilly_baseboard type %d\n",
  252. mx31lilly_baseboard);
  253. }
  254. mxc_iomux_alloc_pin(MX31_PIN_CS4__CS4, "Ethernet CS");
  255. /* SPI */
  256. mxc_iomux_alloc_pin(MX31_PIN_CSPI1_SCLK__SCLK, "SPI1_CLK");
  257. mxc_iomux_alloc_pin(MX31_PIN_CSPI1_MOSI__MOSI, "SPI1_TX");
  258. mxc_iomux_alloc_pin(MX31_PIN_CSPI1_MISO__MISO, "SPI1_RX");
  259. mxc_iomux_alloc_pin(MX31_PIN_CSPI1_SPI_RDY__SPI_RDY, "SPI1_RDY");
  260. mxc_iomux_alloc_pin(MX31_PIN_CSPI1_SS0__SS0, "SPI1_SS0");
  261. mxc_iomux_alloc_pin(MX31_PIN_CSPI1_SS1__SS1, "SPI1_SS1");
  262. mxc_iomux_alloc_pin(MX31_PIN_CSPI1_SS2__SS2, "SPI1_SS2");
  263. mxc_iomux_alloc_pin(MX31_PIN_CSPI2_SCLK__SCLK, "SPI2_CLK");
  264. mxc_iomux_alloc_pin(MX31_PIN_CSPI2_MOSI__MOSI, "SPI2_TX");
  265. mxc_iomux_alloc_pin(MX31_PIN_CSPI2_MISO__MISO, "SPI2_RX");
  266. mxc_iomux_alloc_pin(MX31_PIN_CSPI2_SPI_RDY__SPI_RDY, "SPI2_RDY");
  267. mxc_iomux_alloc_pin(MX31_PIN_CSPI2_SS0__SS0, "SPI2_SS0");
  268. mxc_iomux_alloc_pin(MX31_PIN_CSPI2_SS1__SS1, "SPI2_SS1");
  269. mxc_iomux_alloc_pin(MX31_PIN_CSPI2_SS2__SS2, "SPI2_SS2");
  270. mxc_register_device(&mxc_spi_device0, &spi0_pdata);
  271. mxc_register_device(&mxc_spi_device1, &spi1_pdata);
  272. spi_register_board_info(&mc13783_dev, 1);
  273. platform_add_devices(devices, ARRAY_SIZE(devices));
  274. /* USB */
  275. usbotg_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops,
  276. USB_OTG_DRV_VBUS | USB_OTG_DRV_VBUS_EXT);
  277. usbh2_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops,
  278. USB_OTG_DRV_VBUS | USB_OTG_DRV_VBUS_EXT);
  279. mxc_register_device(&mxc_usbh1, &usbh1_pdata);
  280. mxc_register_device(&mxc_usbh2, &usbh2_pdata);
  281. }
  282. static void __init mx31lilly_timer_init(void)
  283. {
  284. mx31_clocks_init(26000000);
  285. }
  286. static struct sys_timer mx31lilly_timer = {
  287. .init = mx31lilly_timer_init,
  288. };
  289. MACHINE_START(LILLY1131, "INCO startec LILLY-1131")
  290. .phys_io = MX31_AIPS1_BASE_ADDR,
  291. .io_pg_offst = (MX31_AIPS1_BASE_ADDR_VIRT >> 18) & 0xfffc,
  292. .boot_params = MX3x_PHYS_OFFSET + 0x100,
  293. .map_io = mx31_map_io,
  294. .init_irq = mx31_init_irq,
  295. .init_machine = mx31lilly_board_init,
  296. .timer = &mx31lilly_timer,
  297. MACHINE_END