scx200_acb.c 12 KB

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  1. /*
  2. Copyright (c) 2001,2002 Christer Weinigel <wingel@nano-system.com>
  3. National Semiconductor SCx200 ACCESS.bus support
  4. Based on i2c-keywest.c which is:
  5. Copyright (c) 2001 Benjamin Herrenschmidt <benh@kernel.crashing.org>
  6. Copyright (c) 2000 Philip Edelbrock <phil@stimpy.netroedge.com>
  7. This program is free software; you can redistribute it and/or
  8. modify it under the terms of the GNU General Public License as
  9. published by the Free Software Foundation; either version 2 of the
  10. License, or (at your option) any later version.
  11. This program is distributed in the hope that it will be useful,
  12. but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  14. General Public License for more details.
  15. You should have received a copy of the GNU General Public License
  16. along with this program; if not, write to the Free Software
  17. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  18. */
  19. #include <linux/module.h>
  20. #include <linux/errno.h>
  21. #include <linux/kernel.h>
  22. #include <linux/init.h>
  23. #include <linux/i2c.h>
  24. #include <linux/smp_lock.h>
  25. #include <linux/pci.h>
  26. #include <linux/delay.h>
  27. #include <asm/io.h>
  28. #include <linux/scx200.h>
  29. #define NAME "scx200_acb"
  30. MODULE_AUTHOR("Christer Weinigel <wingel@nano-system.com>");
  31. MODULE_DESCRIPTION("NatSemi SCx200 ACCESS.bus Driver");
  32. MODULE_LICENSE("GPL");
  33. #define MAX_DEVICES 4
  34. static int base[MAX_DEVICES] = { 0x820, 0x840 };
  35. module_param_array(base, int, NULL, 0);
  36. MODULE_PARM_DESC(base, "Base addresses for the ACCESS.bus controllers");
  37. #ifdef DEBUG
  38. #define DBG(x...) printk(KERN_DEBUG NAME ": " x)
  39. #else
  40. #define DBG(x...)
  41. #endif
  42. /* The hardware supports interrupt driven mode too, but I haven't
  43. implemented that. */
  44. #define POLLED_MODE 1
  45. #define POLL_TIMEOUT (HZ)
  46. enum scx200_acb_state {
  47. state_idle,
  48. state_address,
  49. state_command,
  50. state_repeat_start,
  51. state_quick,
  52. state_read,
  53. state_write,
  54. };
  55. static const char *scx200_acb_state_name[] = {
  56. "idle",
  57. "address",
  58. "command",
  59. "repeat_start",
  60. "quick",
  61. "read",
  62. "write",
  63. };
  64. /* Physical interface */
  65. struct scx200_acb_iface {
  66. struct scx200_acb_iface *next;
  67. struct i2c_adapter adapter;
  68. unsigned base;
  69. struct semaphore sem;
  70. /* State machine data */
  71. enum scx200_acb_state state;
  72. int result;
  73. u8 address_byte;
  74. u8 command;
  75. u8 *ptr;
  76. char needs_reset;
  77. unsigned len;
  78. };
  79. /* Register Definitions */
  80. #define ACBSDA (iface->base + 0)
  81. #define ACBST (iface->base + 1)
  82. #define ACBST_SDAST 0x40 /* SDA Status */
  83. #define ACBST_BER 0x20
  84. #define ACBST_NEGACK 0x10 /* Negative Acknowledge */
  85. #define ACBST_STASTR 0x08 /* Stall After Start */
  86. #define ACBST_MASTER 0x02
  87. #define ACBCST (iface->base + 2)
  88. #define ACBCST_BB 0x02
  89. #define ACBCTL1 (iface->base + 3)
  90. #define ACBCTL1_STASTRE 0x80
  91. #define ACBCTL1_NMINTE 0x40
  92. #define ACBCTL1_ACK 0x10
  93. #define ACBCTL1_STOP 0x02
  94. #define ACBCTL1_START 0x01
  95. #define ACBADDR (iface->base + 4)
  96. #define ACBCTL2 (iface->base + 5)
  97. #define ACBCTL2_ENABLE 0x01
  98. /************************************************************************/
  99. static void scx200_acb_machine(struct scx200_acb_iface *iface, u8 status)
  100. {
  101. const char *errmsg;
  102. DBG("state %s, status = 0x%02x\n",
  103. scx200_acb_state_name[iface->state], status);
  104. if (status & ACBST_BER) {
  105. errmsg = "bus error";
  106. goto error;
  107. }
  108. if (!(status & ACBST_MASTER)) {
  109. errmsg = "not master";
  110. goto error;
  111. }
  112. if (status & ACBST_NEGACK)
  113. goto negack;
  114. switch (iface->state) {
  115. case state_idle:
  116. dev_warn(&iface->adapter.dev, "interrupt in idle state\n");
  117. break;
  118. case state_address:
  119. /* Do a pointer write first */
  120. outb(iface->address_byte & ~1, ACBSDA);
  121. iface->state = state_command;
  122. break;
  123. case state_command:
  124. outb(iface->command, ACBSDA);
  125. if (iface->address_byte & 1)
  126. iface->state = state_repeat_start;
  127. else
  128. iface->state = state_write;
  129. break;
  130. case state_repeat_start:
  131. outb(inb(ACBCTL1) | ACBCTL1_START, ACBCTL1);
  132. /* fallthrough */
  133. case state_quick:
  134. if (iface->address_byte & 1) {
  135. if (iface->len == 1)
  136. outb(inb(ACBCTL1) | ACBCTL1_ACK, ACBCTL1);
  137. else
  138. outb(inb(ACBCTL1) & ~ACBCTL1_ACK, ACBCTL1);
  139. outb(iface->address_byte, ACBSDA);
  140. iface->state = state_read;
  141. } else {
  142. outb(iface->address_byte, ACBSDA);
  143. iface->state = state_write;
  144. }
  145. break;
  146. case state_read:
  147. /* Set ACK if receiving the last byte */
  148. if (iface->len == 1)
  149. outb(inb(ACBCTL1) | ACBCTL1_ACK, ACBCTL1);
  150. else
  151. outb(inb(ACBCTL1) & ~ACBCTL1_ACK, ACBCTL1);
  152. *iface->ptr++ = inb(ACBSDA);
  153. --iface->len;
  154. if (iface->len == 0) {
  155. iface->result = 0;
  156. iface->state = state_idle;
  157. outb(inb(ACBCTL1) | ACBCTL1_STOP, ACBCTL1);
  158. }
  159. break;
  160. case state_write:
  161. if (iface->len == 0) {
  162. iface->result = 0;
  163. iface->state = state_idle;
  164. outb(inb(ACBCTL1) | ACBCTL1_STOP, ACBCTL1);
  165. break;
  166. }
  167. outb(*iface->ptr++, ACBSDA);
  168. --iface->len;
  169. break;
  170. }
  171. return;
  172. negack:
  173. DBG("negative acknowledge in state %s\n",
  174. scx200_acb_state_name[iface->state]);
  175. iface->state = state_idle;
  176. iface->result = -ENXIO;
  177. outb(inb(ACBCTL1) | ACBCTL1_STOP, ACBCTL1);
  178. outb(ACBST_STASTR | ACBST_NEGACK, ACBST);
  179. return;
  180. error:
  181. dev_err(&iface->adapter.dev, "%s in state %s\n", errmsg,
  182. scx200_acb_state_name[iface->state]);
  183. iface->state = state_idle;
  184. iface->result = -EIO;
  185. iface->needs_reset = 1;
  186. }
  187. static void scx200_acb_timeout(struct scx200_acb_iface *iface)
  188. {
  189. dev_err(&iface->adapter.dev, "timeout in state %s\n",
  190. scx200_acb_state_name[iface->state]);
  191. iface->state = state_idle;
  192. iface->result = -EIO;
  193. iface->needs_reset = 1;
  194. }
  195. #ifdef POLLED_MODE
  196. static void scx200_acb_poll(struct scx200_acb_iface *iface)
  197. {
  198. u8 status = 0;
  199. unsigned long timeout;
  200. timeout = jiffies + POLL_TIMEOUT;
  201. while (time_before(jiffies, timeout)) {
  202. status = inb(ACBST);
  203. if ((status & (ACBST_SDAST|ACBST_BER|ACBST_NEGACK)) != 0) {
  204. scx200_acb_machine(iface, status);
  205. return;
  206. }
  207. msleep(10);
  208. }
  209. scx200_acb_timeout(iface);
  210. }
  211. #endif /* POLLED_MODE */
  212. static void scx200_acb_reset(struct scx200_acb_iface *iface)
  213. {
  214. /* Disable the ACCESS.bus device and Configure the SCL
  215. frequency: 16 clock cycles */
  216. outb(0x70, ACBCTL2);
  217. /* Polling mode */
  218. outb(0, ACBCTL1);
  219. /* Disable slave address */
  220. outb(0, ACBADDR);
  221. /* Enable the ACCESS.bus device */
  222. outb(inb(ACBCTL2) | ACBCTL2_ENABLE, ACBCTL2);
  223. /* Free STALL after START */
  224. outb(inb(ACBCTL1) & ~(ACBCTL1_STASTRE | ACBCTL1_NMINTE), ACBCTL1);
  225. /* Send a STOP */
  226. outb(inb(ACBCTL1) | ACBCTL1_STOP, ACBCTL1);
  227. /* Clear BER, NEGACK and STASTR bits */
  228. outb(ACBST_BER | ACBST_NEGACK | ACBST_STASTR, ACBST);
  229. /* Clear BB bit */
  230. outb(inb(ACBCST) | ACBCST_BB, ACBCST);
  231. }
  232. static s32 scx200_acb_smbus_xfer(struct i2c_adapter *adapter,
  233. u16 address, unsigned short flags,
  234. char rw, u8 command, int size,
  235. union i2c_smbus_data *data)
  236. {
  237. struct scx200_acb_iface *iface = i2c_get_adapdata(adapter);
  238. int len;
  239. u8 *buffer;
  240. u16 cur_word;
  241. int rc;
  242. switch (size) {
  243. case I2C_SMBUS_QUICK:
  244. len = 0;
  245. buffer = NULL;
  246. break;
  247. case I2C_SMBUS_BYTE:
  248. if (rw == I2C_SMBUS_READ) {
  249. len = 1;
  250. buffer = &data->byte;
  251. } else {
  252. len = 1;
  253. buffer = &command;
  254. }
  255. break;
  256. case I2C_SMBUS_BYTE_DATA:
  257. len = 1;
  258. buffer = &data->byte;
  259. break;
  260. case I2C_SMBUS_WORD_DATA:
  261. len = 2;
  262. cur_word = cpu_to_le16(data->word);
  263. buffer = (u8 *)&cur_word;
  264. break;
  265. case I2C_SMBUS_BLOCK_DATA:
  266. len = data->block[0];
  267. buffer = &data->block[1];
  268. break;
  269. default:
  270. return -EINVAL;
  271. }
  272. DBG("size=%d, address=0x%x, command=0x%x, len=%d, read=%d\n",
  273. size, address, command, len, rw == I2C_SMBUS_READ);
  274. if (!len && rw == I2C_SMBUS_READ) {
  275. dev_warn(&adapter->dev, "zero length read\n");
  276. return -EINVAL;
  277. }
  278. if (len && !buffer) {
  279. dev_warn(&adapter->dev, "nonzero length but no buffer\n");
  280. return -EFAULT;
  281. }
  282. down(&iface->sem);
  283. iface->address_byte = address<<1;
  284. if (rw == I2C_SMBUS_READ)
  285. iface->address_byte |= 1;
  286. iface->command = command;
  287. iface->ptr = buffer;
  288. iface->len = len;
  289. iface->result = -EINVAL;
  290. iface->needs_reset = 0;
  291. outb(inb(ACBCTL1) | ACBCTL1_START, ACBCTL1);
  292. if (size == I2C_SMBUS_QUICK || size == I2C_SMBUS_BYTE)
  293. iface->state = state_quick;
  294. else
  295. iface->state = state_address;
  296. #ifdef POLLED_MODE
  297. while (iface->state != state_idle)
  298. scx200_acb_poll(iface);
  299. #else /* POLLED_MODE */
  300. #error Interrupt driven mode not implemented
  301. #endif /* POLLED_MODE */
  302. if (iface->needs_reset)
  303. scx200_acb_reset(iface);
  304. rc = iface->result;
  305. up(&iface->sem);
  306. if (rc == 0 && size == I2C_SMBUS_WORD_DATA && rw == I2C_SMBUS_READ)
  307. data->word = le16_to_cpu(cur_word);
  308. #ifdef DEBUG
  309. DBG(": transfer done, result: %d", rc);
  310. if (buffer) {
  311. int i;
  312. printk(" data:");
  313. for (i = 0; i < len; ++i)
  314. printk(" %02x", buffer[i]);
  315. }
  316. printk("\n");
  317. #endif
  318. return rc;
  319. }
  320. static u32 scx200_acb_func(struct i2c_adapter *adapter)
  321. {
  322. return I2C_FUNC_SMBUS_QUICK | I2C_FUNC_SMBUS_BYTE |
  323. I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA |
  324. I2C_FUNC_SMBUS_BLOCK_DATA;
  325. }
  326. /* For now, we only handle combined mode (smbus) */
  327. static struct i2c_algorithm scx200_acb_algorithm = {
  328. .smbus_xfer = scx200_acb_smbus_xfer,
  329. .functionality = scx200_acb_func,
  330. };
  331. static struct scx200_acb_iface *scx200_acb_list;
  332. static int scx200_acb_probe(struct scx200_acb_iface *iface)
  333. {
  334. u8 val;
  335. /* Disable the ACCESS.bus device and Configure the SCL
  336. frequency: 16 clock cycles */
  337. outb(0x70, ACBCTL2);
  338. if (inb(ACBCTL2) != 0x70) {
  339. DBG("ACBCTL2 readback failed\n");
  340. return -ENXIO;
  341. }
  342. outb(inb(ACBCTL1) | ACBCTL1_NMINTE, ACBCTL1);
  343. val = inb(ACBCTL1);
  344. if (val) {
  345. DBG("disabled, but ACBCTL1=0x%02x\n", val);
  346. return -ENXIO;
  347. }
  348. outb(inb(ACBCTL2) | ACBCTL2_ENABLE, ACBCTL2);
  349. outb(inb(ACBCTL1) | ACBCTL1_NMINTE, ACBCTL1);
  350. val = inb(ACBCTL1);
  351. if ((val & ACBCTL1_NMINTE) != ACBCTL1_NMINTE) {
  352. DBG("enabled, but NMINTE won't be set, ACBCTL1=0x%02x\n", val);
  353. return -ENXIO;
  354. }
  355. return 0;
  356. }
  357. static int __init scx200_acb_create(int base, int index)
  358. {
  359. struct scx200_acb_iface *iface;
  360. struct i2c_adapter *adapter;
  361. int rc = 0;
  362. char description[64];
  363. iface = kzalloc(sizeof(*iface), GFP_KERNEL);
  364. if (!iface) {
  365. printk(KERN_ERR NAME ": can't allocate memory\n");
  366. rc = -ENOMEM;
  367. goto errout;
  368. }
  369. adapter = &iface->adapter;
  370. i2c_set_adapdata(adapter, iface);
  371. snprintf(adapter->name, I2C_NAME_SIZE, "SCx200 ACB%d", index);
  372. adapter->owner = THIS_MODULE;
  373. adapter->id = I2C_HW_SMBUS_SCX200;
  374. adapter->algo = &scx200_acb_algorithm;
  375. adapter->class = I2C_CLASS_HWMON;
  376. init_MUTEX(&iface->sem);
  377. snprintf(description, sizeof(description),
  378. "NatSemi SCx200 ACCESS.bus [%s]", adapter->name);
  379. if (request_region(base, 8, description) == 0) {
  380. dev_err(&adapter->dev, "can't allocate io 0x%x-0x%x\n",
  381. base, base + 8-1);
  382. rc = -EBUSY;
  383. goto errout;
  384. }
  385. iface->base = base;
  386. rc = scx200_acb_probe(iface);
  387. if (rc) {
  388. dev_warn(&adapter->dev, "probe failed\n");
  389. goto errout;
  390. }
  391. scx200_acb_reset(iface);
  392. if (i2c_add_adapter(adapter) < 0) {
  393. dev_err(&adapter->dev, "failed to register\n");
  394. rc = -ENODEV;
  395. goto errout;
  396. }
  397. lock_kernel();
  398. iface->next = scx200_acb_list;
  399. scx200_acb_list = iface;
  400. unlock_kernel();
  401. return 0;
  402. errout:
  403. if (iface) {
  404. if (iface->base)
  405. release_region(iface->base, 8);
  406. kfree(iface);
  407. }
  408. return rc;
  409. }
  410. static struct pci_device_id scx200[] = {
  411. { PCI_DEVICE(PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_SCx200_BRIDGE) },
  412. { PCI_DEVICE(PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_SC1100_BRIDGE) },
  413. { },
  414. };
  415. static int __init scx200_acb_init(void)
  416. {
  417. int i;
  418. int rc;
  419. pr_debug(NAME ": NatSemi SCx200 ACCESS.bus Driver\n");
  420. /* Verify that this really is a SCx200 processor */
  421. if (pci_dev_present(scx200) == 0)
  422. return -ENODEV;
  423. rc = -ENXIO;
  424. for (i = 0; i < MAX_DEVICES; ++i) {
  425. if (base[i] > 0)
  426. rc = scx200_acb_create(base[i], i);
  427. }
  428. if (scx200_acb_list)
  429. return 0;
  430. return rc;
  431. }
  432. static void __exit scx200_acb_cleanup(void)
  433. {
  434. struct scx200_acb_iface *iface;
  435. lock_kernel();
  436. while ((iface = scx200_acb_list) != NULL) {
  437. scx200_acb_list = iface->next;
  438. unlock_kernel();
  439. i2c_del_adapter(&iface->adapter);
  440. release_region(iface->base, 8);
  441. kfree(iface);
  442. lock_kernel();
  443. }
  444. unlock_kernel();
  445. }
  446. module_init(scx200_acb_init);
  447. module_exit(scx200_acb_cleanup);