iwl-agn.c 106 KB

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  1. /******************************************************************************
  2. *
  3. * Copyright(c) 2003 - 2011 Intel Corporation. All rights reserved.
  4. *
  5. * Portions of this file are derived from the ipw3945 project, as well
  6. * as portions of the ieee80211 subsystem header files.
  7. *
  8. * This program is free software; you can redistribute it and/or modify it
  9. * under the terms of version 2 of the GNU General Public License as
  10. * published by the Free Software Foundation.
  11. *
  12. * This program is distributed in the hope that it will be useful, but WITHOUT
  13. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  14. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  15. * more details.
  16. *
  17. * You should have received a copy of the GNU General Public License along with
  18. * this program; if not, write to the Free Software Foundation, Inc.,
  19. * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  20. *
  21. * The full GNU General Public License is included in this distribution in the
  22. * file called LICENSE.
  23. *
  24. * Contact Information:
  25. * Intel Linux Wireless <ilw@linux.intel.com>
  26. * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  27. *
  28. *****************************************************************************/
  29. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  30. #include <linux/kernel.h>
  31. #include <linux/module.h>
  32. #include <linux/init.h>
  33. #include <linux/slab.h>
  34. #include <linux/dma-mapping.h>
  35. #include <linux/delay.h>
  36. #include <linux/sched.h>
  37. #include <linux/skbuff.h>
  38. #include <linux/netdevice.h>
  39. #include <linux/wireless.h>
  40. #include <linux/firmware.h>
  41. #include <linux/etherdevice.h>
  42. #include <linux/if_arp.h>
  43. #include <net/mac80211.h>
  44. #include <asm/div64.h>
  45. #include "iwl-eeprom.h"
  46. #include "iwl-dev.h"
  47. #include "iwl-core.h"
  48. #include "iwl-io.h"
  49. #include "iwl-helpers.h"
  50. #include "iwl-sta.h"
  51. #include "iwl-agn-calib.h"
  52. #include "iwl-agn.h"
  53. #include "iwl-pci.h"
  54. /******************************************************************************
  55. *
  56. * module boiler plate
  57. *
  58. ******************************************************************************/
  59. /*
  60. * module name, copyright, version, etc.
  61. */
  62. #define DRV_DESCRIPTION "Intel(R) Wireless WiFi Link AGN driver for Linux"
  63. #ifdef CONFIG_IWLWIFI_DEBUG
  64. #define VD "d"
  65. #else
  66. #define VD
  67. #endif
  68. #define DRV_VERSION IWLWIFI_VERSION VD
  69. MODULE_DESCRIPTION(DRV_DESCRIPTION);
  70. MODULE_VERSION(DRV_VERSION);
  71. MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
  72. MODULE_LICENSE("GPL");
  73. static int iwlagn_ant_coupling;
  74. static bool iwlagn_bt_ch_announce = 1;
  75. void iwl_update_chain_flags(struct iwl_priv *priv)
  76. {
  77. struct iwl_rxon_context *ctx;
  78. if (priv->cfg->ops->hcmd->set_rxon_chain) {
  79. for_each_context(priv, ctx) {
  80. priv->cfg->ops->hcmd->set_rxon_chain(priv, ctx);
  81. if (ctx->active.rx_chain != ctx->staging.rx_chain)
  82. iwlagn_commit_rxon(priv, ctx);
  83. }
  84. }
  85. }
  86. /* Parse the beacon frame to find the TIM element and set tim_idx & tim_size */
  87. static void iwl_set_beacon_tim(struct iwl_priv *priv,
  88. struct iwl_tx_beacon_cmd *tx_beacon_cmd,
  89. u8 *beacon, u32 frame_size)
  90. {
  91. u16 tim_idx;
  92. struct ieee80211_mgmt *mgmt = (struct ieee80211_mgmt *)beacon;
  93. /*
  94. * The index is relative to frame start but we start looking at the
  95. * variable-length part of the beacon.
  96. */
  97. tim_idx = mgmt->u.beacon.variable - beacon;
  98. /* Parse variable-length elements of beacon to find WLAN_EID_TIM */
  99. while ((tim_idx < (frame_size - 2)) &&
  100. (beacon[tim_idx] != WLAN_EID_TIM))
  101. tim_idx += beacon[tim_idx+1] + 2;
  102. /* If TIM field was found, set variables */
  103. if ((tim_idx < (frame_size - 1)) && (beacon[tim_idx] == WLAN_EID_TIM)) {
  104. tx_beacon_cmd->tim_idx = cpu_to_le16(tim_idx);
  105. tx_beacon_cmd->tim_size = beacon[tim_idx+1];
  106. } else
  107. IWL_WARN(priv, "Unable to find TIM Element in beacon\n");
  108. }
  109. int iwlagn_send_beacon_cmd(struct iwl_priv *priv)
  110. {
  111. struct iwl_tx_beacon_cmd *tx_beacon_cmd;
  112. struct iwl_host_cmd cmd = {
  113. .id = REPLY_TX_BEACON,
  114. };
  115. struct ieee80211_tx_info *info;
  116. u32 frame_size;
  117. u32 rate_flags;
  118. u32 rate;
  119. /*
  120. * We have to set up the TX command, the TX Beacon command, and the
  121. * beacon contents.
  122. */
  123. lockdep_assert_held(&priv->mutex);
  124. if (!priv->beacon_ctx) {
  125. IWL_ERR(priv, "trying to build beacon w/o beacon context!\n");
  126. return 0;
  127. }
  128. if (WARN_ON(!priv->beacon_skb))
  129. return -EINVAL;
  130. /* Allocate beacon command */
  131. if (!priv->beacon_cmd)
  132. priv->beacon_cmd = kzalloc(sizeof(*tx_beacon_cmd), GFP_KERNEL);
  133. tx_beacon_cmd = priv->beacon_cmd;
  134. if (!tx_beacon_cmd)
  135. return -ENOMEM;
  136. frame_size = priv->beacon_skb->len;
  137. /* Set up TX command fields */
  138. tx_beacon_cmd->tx.len = cpu_to_le16((u16)frame_size);
  139. tx_beacon_cmd->tx.sta_id = priv->beacon_ctx->bcast_sta_id;
  140. tx_beacon_cmd->tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
  141. tx_beacon_cmd->tx.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK |
  142. TX_CMD_FLG_TSF_MSK | TX_CMD_FLG_STA_RATE_MSK;
  143. /* Set up TX beacon command fields */
  144. iwl_set_beacon_tim(priv, tx_beacon_cmd, priv->beacon_skb->data,
  145. frame_size);
  146. /* Set up packet rate and flags */
  147. info = IEEE80211_SKB_CB(priv->beacon_skb);
  148. /*
  149. * Let's set up the rate at least somewhat correctly;
  150. * it will currently not actually be used by the uCode,
  151. * it uses the broadcast station's rate instead.
  152. */
  153. if (info->control.rates[0].idx < 0 ||
  154. info->control.rates[0].flags & IEEE80211_TX_RC_MCS)
  155. rate = 0;
  156. else
  157. rate = info->control.rates[0].idx;
  158. priv->mgmt_tx_ant = iwl_toggle_tx_ant(priv, priv->mgmt_tx_ant,
  159. priv->hw_params.valid_tx_ant);
  160. rate_flags = iwl_ant_idx_to_flags(priv->mgmt_tx_ant);
  161. /* In mac80211, rates for 5 GHz start at 0 */
  162. if (info->band == IEEE80211_BAND_5GHZ)
  163. rate += IWL_FIRST_OFDM_RATE;
  164. else if (rate >= IWL_FIRST_CCK_RATE && rate <= IWL_LAST_CCK_RATE)
  165. rate_flags |= RATE_MCS_CCK_MSK;
  166. tx_beacon_cmd->tx.rate_n_flags =
  167. iwl_hw_set_rate_n_flags(rate, rate_flags);
  168. /* Submit command */
  169. cmd.len[0] = sizeof(*tx_beacon_cmd);
  170. cmd.data[0] = tx_beacon_cmd;
  171. cmd.dataflags[0] = IWL_HCMD_DFL_NOCOPY;
  172. cmd.len[1] = frame_size;
  173. cmd.data[1] = priv->beacon_skb->data;
  174. cmd.dataflags[1] = IWL_HCMD_DFL_NOCOPY;
  175. return iwl_send_cmd_sync(priv, &cmd);
  176. }
  177. static void iwl_bg_beacon_update(struct work_struct *work)
  178. {
  179. struct iwl_priv *priv =
  180. container_of(work, struct iwl_priv, beacon_update);
  181. struct sk_buff *beacon;
  182. mutex_lock(&priv->mutex);
  183. if (!priv->beacon_ctx) {
  184. IWL_ERR(priv, "updating beacon w/o beacon context!\n");
  185. goto out;
  186. }
  187. if (priv->beacon_ctx->vif->type != NL80211_IFTYPE_AP) {
  188. /*
  189. * The ucode will send beacon notifications even in
  190. * IBSS mode, but we don't want to process them. But
  191. * we need to defer the type check to here due to
  192. * requiring locking around the beacon_ctx access.
  193. */
  194. goto out;
  195. }
  196. /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
  197. beacon = ieee80211_beacon_get(priv->hw, priv->beacon_ctx->vif);
  198. if (!beacon) {
  199. IWL_ERR(priv, "update beacon failed -- keeping old\n");
  200. goto out;
  201. }
  202. /* new beacon skb is allocated every time; dispose previous.*/
  203. dev_kfree_skb(priv->beacon_skb);
  204. priv->beacon_skb = beacon;
  205. iwlagn_send_beacon_cmd(priv);
  206. out:
  207. mutex_unlock(&priv->mutex);
  208. }
  209. static void iwl_bg_bt_runtime_config(struct work_struct *work)
  210. {
  211. struct iwl_priv *priv =
  212. container_of(work, struct iwl_priv, bt_runtime_config);
  213. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  214. return;
  215. /* dont send host command if rf-kill is on */
  216. if (!iwl_is_ready_rf(priv))
  217. return;
  218. priv->cfg->ops->hcmd->send_bt_config(priv);
  219. }
  220. static void iwl_bg_bt_full_concurrency(struct work_struct *work)
  221. {
  222. struct iwl_priv *priv =
  223. container_of(work, struct iwl_priv, bt_full_concurrency);
  224. struct iwl_rxon_context *ctx;
  225. mutex_lock(&priv->mutex);
  226. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  227. goto out;
  228. /* dont send host command if rf-kill is on */
  229. if (!iwl_is_ready_rf(priv))
  230. goto out;
  231. IWL_DEBUG_INFO(priv, "BT coex in %s mode\n",
  232. priv->bt_full_concurrent ?
  233. "full concurrency" : "3-wire");
  234. /*
  235. * LQ & RXON updated cmds must be sent before BT Config cmd
  236. * to avoid 3-wire collisions
  237. */
  238. for_each_context(priv, ctx) {
  239. if (priv->cfg->ops->hcmd->set_rxon_chain)
  240. priv->cfg->ops->hcmd->set_rxon_chain(priv, ctx);
  241. iwlagn_commit_rxon(priv, ctx);
  242. }
  243. priv->cfg->ops->hcmd->send_bt_config(priv);
  244. out:
  245. mutex_unlock(&priv->mutex);
  246. }
  247. /**
  248. * iwl_bg_statistics_periodic - Timer callback to queue statistics
  249. *
  250. * This callback is provided in order to send a statistics request.
  251. *
  252. * This timer function is continually reset to execute within
  253. * REG_RECALIB_PERIOD seconds since the last STATISTICS_NOTIFICATION
  254. * was received. We need to ensure we receive the statistics in order
  255. * to update the temperature used for calibrating the TXPOWER.
  256. */
  257. static void iwl_bg_statistics_periodic(unsigned long data)
  258. {
  259. struct iwl_priv *priv = (struct iwl_priv *)data;
  260. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  261. return;
  262. /* dont send host command if rf-kill is on */
  263. if (!iwl_is_ready_rf(priv))
  264. return;
  265. iwl_send_statistics_request(priv, CMD_ASYNC, false);
  266. }
  267. static void iwl_print_cont_event_trace(struct iwl_priv *priv, u32 base,
  268. u32 start_idx, u32 num_events,
  269. u32 mode)
  270. {
  271. u32 i;
  272. u32 ptr; /* SRAM byte address of log data */
  273. u32 ev, time, data; /* event log data */
  274. unsigned long reg_flags;
  275. if (mode == 0)
  276. ptr = base + (4 * sizeof(u32)) + (start_idx * 2 * sizeof(u32));
  277. else
  278. ptr = base + (4 * sizeof(u32)) + (start_idx * 3 * sizeof(u32));
  279. /* Make sure device is powered up for SRAM reads */
  280. spin_lock_irqsave(&priv->reg_lock, reg_flags);
  281. if (iwl_grab_nic_access(priv)) {
  282. spin_unlock_irqrestore(&priv->reg_lock, reg_flags);
  283. return;
  284. }
  285. /* Set starting address; reads will auto-increment */
  286. iwl_write32(priv, HBUS_TARG_MEM_RADDR, ptr);
  287. rmb();
  288. /*
  289. * "time" is actually "data" for mode 0 (no timestamp).
  290. * place event id # at far right for easier visual parsing.
  291. */
  292. for (i = 0; i < num_events; i++) {
  293. ev = iwl_read32(priv, HBUS_TARG_MEM_RDAT);
  294. time = iwl_read32(priv, HBUS_TARG_MEM_RDAT);
  295. if (mode == 0) {
  296. trace_iwlwifi_dev_ucode_cont_event(priv,
  297. 0, time, ev);
  298. } else {
  299. data = iwl_read32(priv, HBUS_TARG_MEM_RDAT);
  300. trace_iwlwifi_dev_ucode_cont_event(priv,
  301. time, data, ev);
  302. }
  303. }
  304. /* Allow device to power down */
  305. iwl_release_nic_access(priv);
  306. spin_unlock_irqrestore(&priv->reg_lock, reg_flags);
  307. }
  308. static void iwl_continuous_event_trace(struct iwl_priv *priv)
  309. {
  310. u32 capacity; /* event log capacity in # entries */
  311. u32 base; /* SRAM byte address of event log header */
  312. u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */
  313. u32 num_wraps; /* # times uCode wrapped to top of log */
  314. u32 next_entry; /* index of next entry to be written by uCode */
  315. base = priv->device_pointers.error_event_table;
  316. if (priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
  317. capacity = iwl_read_targ_mem(priv, base);
  318. num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
  319. mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
  320. next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32)));
  321. } else
  322. return;
  323. if (num_wraps == priv->event_log.num_wraps) {
  324. iwl_print_cont_event_trace(priv,
  325. base, priv->event_log.next_entry,
  326. next_entry - priv->event_log.next_entry,
  327. mode);
  328. priv->event_log.non_wraps_count++;
  329. } else {
  330. if ((num_wraps - priv->event_log.num_wraps) > 1)
  331. priv->event_log.wraps_more_count++;
  332. else
  333. priv->event_log.wraps_once_count++;
  334. trace_iwlwifi_dev_ucode_wrap_event(priv,
  335. num_wraps - priv->event_log.num_wraps,
  336. next_entry, priv->event_log.next_entry);
  337. if (next_entry < priv->event_log.next_entry) {
  338. iwl_print_cont_event_trace(priv, base,
  339. priv->event_log.next_entry,
  340. capacity - priv->event_log.next_entry,
  341. mode);
  342. iwl_print_cont_event_trace(priv, base, 0,
  343. next_entry, mode);
  344. } else {
  345. iwl_print_cont_event_trace(priv, base,
  346. next_entry, capacity - next_entry,
  347. mode);
  348. iwl_print_cont_event_trace(priv, base, 0,
  349. next_entry, mode);
  350. }
  351. }
  352. priv->event_log.num_wraps = num_wraps;
  353. priv->event_log.next_entry = next_entry;
  354. }
  355. /**
  356. * iwl_bg_ucode_trace - Timer callback to log ucode event
  357. *
  358. * The timer is continually set to execute every
  359. * UCODE_TRACE_PERIOD milliseconds after the last timer expired
  360. * this function is to perform continuous uCode event logging operation
  361. * if enabled
  362. */
  363. static void iwl_bg_ucode_trace(unsigned long data)
  364. {
  365. struct iwl_priv *priv = (struct iwl_priv *)data;
  366. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  367. return;
  368. if (priv->event_log.ucode_trace) {
  369. iwl_continuous_event_trace(priv);
  370. /* Reschedule the timer to occur in UCODE_TRACE_PERIOD */
  371. mod_timer(&priv->ucode_trace,
  372. jiffies + msecs_to_jiffies(UCODE_TRACE_PERIOD));
  373. }
  374. }
  375. static void iwl_bg_tx_flush(struct work_struct *work)
  376. {
  377. struct iwl_priv *priv =
  378. container_of(work, struct iwl_priv, tx_flush);
  379. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  380. return;
  381. /* do nothing if rf-kill is on */
  382. if (!iwl_is_ready_rf(priv))
  383. return;
  384. IWL_DEBUG_INFO(priv, "device request: flush all tx frames\n");
  385. iwlagn_dev_txfifo_flush(priv, IWL_DROP_ALL);
  386. }
  387. /**
  388. * iwl_rx_handle - Main entry function for receiving responses from uCode
  389. *
  390. * Uses the priv->rx_handlers callback function array to invoke
  391. * the appropriate handlers, including command responses,
  392. * frame-received notifications, and other notifications.
  393. */
  394. static void iwl_rx_handle(struct iwl_priv *priv)
  395. {
  396. struct iwl_rx_mem_buffer *rxb;
  397. struct iwl_rx_packet *pkt;
  398. struct iwl_rx_queue *rxq = &priv->rxq;
  399. u32 r, i;
  400. int reclaim;
  401. unsigned long flags;
  402. u8 fill_rx = 0;
  403. u32 count = 8;
  404. int total_empty;
  405. /* uCode's read index (stored in shared DRAM) indicates the last Rx
  406. * buffer that the driver may process (last buffer filled by ucode). */
  407. r = le16_to_cpu(rxq->rb_stts->closed_rb_num) & 0x0FFF;
  408. i = rxq->read;
  409. /* Rx interrupt, but nothing sent from uCode */
  410. if (i == r)
  411. IWL_DEBUG_RX(priv, "r = %d, i = %d\n", r, i);
  412. /* calculate total frames need to be restock after handling RX */
  413. total_empty = r - rxq->write_actual;
  414. if (total_empty < 0)
  415. total_empty += RX_QUEUE_SIZE;
  416. if (total_empty > (RX_QUEUE_SIZE / 2))
  417. fill_rx = 1;
  418. while (i != r) {
  419. int len;
  420. rxb = rxq->queue[i];
  421. /* If an RXB doesn't have a Rx queue slot associated with it,
  422. * then a bug has been introduced in the queue refilling
  423. * routines -- catch it here */
  424. if (WARN_ON(rxb == NULL)) {
  425. i = (i + 1) & RX_QUEUE_MASK;
  426. continue;
  427. }
  428. rxq->queue[i] = NULL;
  429. dma_unmap_page(priv->bus.dev, rxb->page_dma,
  430. PAGE_SIZE << priv->hw_params.rx_page_order,
  431. DMA_FROM_DEVICE);
  432. pkt = rxb_addr(rxb);
  433. len = le32_to_cpu(pkt->len_n_flags) & FH_RSCSR_FRAME_SIZE_MSK;
  434. len += sizeof(u32); /* account for status word */
  435. trace_iwlwifi_dev_rx(priv, pkt, len);
  436. /* Reclaim a command buffer only if this packet is a response
  437. * to a (driver-originated) command.
  438. * If the packet (e.g. Rx frame) originated from uCode,
  439. * there is no command buffer to reclaim.
  440. * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
  441. * but apparently a few don't get set; catch them here. */
  442. reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
  443. (pkt->hdr.cmd != REPLY_RX_PHY_CMD) &&
  444. (pkt->hdr.cmd != REPLY_RX) &&
  445. (pkt->hdr.cmd != REPLY_RX_MPDU_CMD) &&
  446. (pkt->hdr.cmd != REPLY_COMPRESSED_BA) &&
  447. (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
  448. (pkt->hdr.cmd != REPLY_TX);
  449. /*
  450. * Do the notification wait before RX handlers so
  451. * even if the RX handler consumes the RXB we have
  452. * access to it in the notification wait entry.
  453. */
  454. if (!list_empty(&priv->_agn.notif_waits)) {
  455. struct iwl_notification_wait *w;
  456. spin_lock(&priv->_agn.notif_wait_lock);
  457. list_for_each_entry(w, &priv->_agn.notif_waits, list) {
  458. if (w->cmd == pkt->hdr.cmd) {
  459. w->triggered = true;
  460. if (w->fn)
  461. w->fn(priv, pkt, w->fn_data);
  462. }
  463. }
  464. spin_unlock(&priv->_agn.notif_wait_lock);
  465. wake_up_all(&priv->_agn.notif_waitq);
  466. }
  467. if (priv->pre_rx_handler)
  468. priv->pre_rx_handler(priv, rxb);
  469. /* Based on type of command response or notification,
  470. * handle those that need handling via function in
  471. * rx_handlers table. See iwl_setup_rx_handlers() */
  472. if (priv->rx_handlers[pkt->hdr.cmd]) {
  473. IWL_DEBUG_RX(priv, "r = %d, i = %d, %s, 0x%02x\n", r,
  474. i, get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
  475. priv->isr_stats.rx_handlers[pkt->hdr.cmd]++;
  476. priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
  477. } else {
  478. /* No handling needed */
  479. IWL_DEBUG_RX(priv,
  480. "r %d i %d No handler needed for %s, 0x%02x\n",
  481. r, i, get_cmd_string(pkt->hdr.cmd),
  482. pkt->hdr.cmd);
  483. }
  484. /*
  485. * XXX: After here, we should always check rxb->page
  486. * against NULL before touching it or its virtual
  487. * memory (pkt). Because some rx_handler might have
  488. * already taken or freed the pages.
  489. */
  490. if (reclaim) {
  491. /* Invoke any callbacks, transfer the buffer to caller,
  492. * and fire off the (possibly) blocking iwl_send_cmd()
  493. * as we reclaim the driver command queue */
  494. if (rxb->page)
  495. iwl_tx_cmd_complete(priv, rxb);
  496. else
  497. IWL_WARN(priv, "Claim null rxb?\n");
  498. }
  499. /* Reuse the page if possible. For notification packets and
  500. * SKBs that fail to Rx correctly, add them back into the
  501. * rx_free list for reuse later. */
  502. spin_lock_irqsave(&rxq->lock, flags);
  503. if (rxb->page != NULL) {
  504. rxb->page_dma = dma_map_page(priv->bus.dev, rxb->page,
  505. 0, PAGE_SIZE << priv->hw_params.rx_page_order,
  506. DMA_FROM_DEVICE);
  507. list_add_tail(&rxb->list, &rxq->rx_free);
  508. rxq->free_count++;
  509. } else
  510. list_add_tail(&rxb->list, &rxq->rx_used);
  511. spin_unlock_irqrestore(&rxq->lock, flags);
  512. i = (i + 1) & RX_QUEUE_MASK;
  513. /* If there are a lot of unused frames,
  514. * restock the Rx queue so ucode wont assert. */
  515. if (fill_rx) {
  516. count++;
  517. if (count >= 8) {
  518. rxq->read = i;
  519. iwlagn_rx_replenish_now(priv);
  520. count = 0;
  521. }
  522. }
  523. }
  524. /* Backtrack one entry */
  525. rxq->read = i;
  526. if (fill_rx)
  527. iwlagn_rx_replenish_now(priv);
  528. else
  529. iwlagn_rx_queue_restock(priv);
  530. }
  531. /* tasklet for iwlagn interrupt */
  532. static void iwl_irq_tasklet(struct iwl_priv *priv)
  533. {
  534. u32 inta = 0;
  535. u32 handled = 0;
  536. unsigned long flags;
  537. u32 i;
  538. #ifdef CONFIG_IWLWIFI_DEBUG
  539. u32 inta_mask;
  540. #endif
  541. spin_lock_irqsave(&priv->lock, flags);
  542. /* Ack/clear/reset pending uCode interrupts.
  543. * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
  544. */
  545. /* There is a hardware bug in the interrupt mask function that some
  546. * interrupts (i.e. CSR_INT_BIT_SCD) can still be generated even if
  547. * they are disabled in the CSR_INT_MASK register. Furthermore the
  548. * ICT interrupt handling mechanism has another bug that might cause
  549. * these unmasked interrupts fail to be detected. We workaround the
  550. * hardware bugs here by ACKing all the possible interrupts so that
  551. * interrupt coalescing can still be achieved.
  552. */
  553. iwl_write32(priv, CSR_INT, priv->_agn.inta | ~priv->inta_mask);
  554. inta = priv->_agn.inta;
  555. #ifdef CONFIG_IWLWIFI_DEBUG
  556. if (iwl_get_debug_level(priv) & IWL_DL_ISR) {
  557. /* just for debug */
  558. inta_mask = iwl_read32(priv, CSR_INT_MASK);
  559. IWL_DEBUG_ISR(priv, "inta 0x%08x, enabled 0x%08x\n ",
  560. inta, inta_mask);
  561. }
  562. #endif
  563. spin_unlock_irqrestore(&priv->lock, flags);
  564. /* saved interrupt in inta variable now we can reset priv->_agn.inta */
  565. priv->_agn.inta = 0;
  566. /* Now service all interrupt bits discovered above. */
  567. if (inta & CSR_INT_BIT_HW_ERR) {
  568. IWL_ERR(priv, "Hardware error detected. Restarting.\n");
  569. /* Tell the device to stop sending interrupts */
  570. iwl_disable_interrupts(priv);
  571. priv->isr_stats.hw++;
  572. iwl_irq_handle_error(priv);
  573. handled |= CSR_INT_BIT_HW_ERR;
  574. return;
  575. }
  576. #ifdef CONFIG_IWLWIFI_DEBUG
  577. if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
  578. /* NIC fires this, but we don't use it, redundant with WAKEUP */
  579. if (inta & CSR_INT_BIT_SCD) {
  580. IWL_DEBUG_ISR(priv, "Scheduler finished to transmit "
  581. "the frame/frames.\n");
  582. priv->isr_stats.sch++;
  583. }
  584. /* Alive notification via Rx interrupt will do the real work */
  585. if (inta & CSR_INT_BIT_ALIVE) {
  586. IWL_DEBUG_ISR(priv, "Alive interrupt\n");
  587. priv->isr_stats.alive++;
  588. }
  589. }
  590. #endif
  591. /* Safely ignore these bits for debug checks below */
  592. inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
  593. /* HW RF KILL switch toggled */
  594. if (inta & CSR_INT_BIT_RF_KILL) {
  595. int hw_rf_kill = 0;
  596. if (!(iwl_read32(priv, CSR_GP_CNTRL) &
  597. CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
  598. hw_rf_kill = 1;
  599. IWL_WARN(priv, "RF_KILL bit toggled to %s.\n",
  600. hw_rf_kill ? "disable radio" : "enable radio");
  601. priv->isr_stats.rfkill++;
  602. /* driver only loads ucode once setting the interface up.
  603. * the driver allows loading the ucode even if the radio
  604. * is killed. Hence update the killswitch state here. The
  605. * rfkill handler will care about restarting if needed.
  606. */
  607. if (!test_bit(STATUS_ALIVE, &priv->status)) {
  608. if (hw_rf_kill)
  609. set_bit(STATUS_RF_KILL_HW, &priv->status);
  610. else
  611. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  612. wiphy_rfkill_set_hw_state(priv->hw->wiphy, hw_rf_kill);
  613. }
  614. handled |= CSR_INT_BIT_RF_KILL;
  615. }
  616. /* Chip got too hot and stopped itself */
  617. if (inta & CSR_INT_BIT_CT_KILL) {
  618. IWL_ERR(priv, "Microcode CT kill error detected.\n");
  619. priv->isr_stats.ctkill++;
  620. handled |= CSR_INT_BIT_CT_KILL;
  621. }
  622. /* Error detected by uCode */
  623. if (inta & CSR_INT_BIT_SW_ERR) {
  624. IWL_ERR(priv, "Microcode SW error detected. "
  625. " Restarting 0x%X.\n", inta);
  626. priv->isr_stats.sw++;
  627. iwl_irq_handle_error(priv);
  628. handled |= CSR_INT_BIT_SW_ERR;
  629. }
  630. /* uCode wakes up after power-down sleep */
  631. if (inta & CSR_INT_BIT_WAKEUP) {
  632. IWL_DEBUG_ISR(priv, "Wakeup interrupt\n");
  633. iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
  634. for (i = 0; i < priv->hw_params.max_txq_num; i++)
  635. iwl_txq_update_write_ptr(priv, &priv->txq[i]);
  636. priv->isr_stats.wakeup++;
  637. handled |= CSR_INT_BIT_WAKEUP;
  638. }
  639. /* All uCode command responses, including Tx command responses,
  640. * Rx "responses" (frame-received notification), and other
  641. * notifications from uCode come through here*/
  642. if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX |
  643. CSR_INT_BIT_RX_PERIODIC)) {
  644. IWL_DEBUG_ISR(priv, "Rx interrupt\n");
  645. if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
  646. handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
  647. iwl_write32(priv, CSR_FH_INT_STATUS,
  648. CSR_FH_INT_RX_MASK);
  649. }
  650. if (inta & CSR_INT_BIT_RX_PERIODIC) {
  651. handled |= CSR_INT_BIT_RX_PERIODIC;
  652. iwl_write32(priv, CSR_INT, CSR_INT_BIT_RX_PERIODIC);
  653. }
  654. /* Sending RX interrupt require many steps to be done in the
  655. * the device:
  656. * 1- write interrupt to current index in ICT table.
  657. * 2- dma RX frame.
  658. * 3- update RX shared data to indicate last write index.
  659. * 4- send interrupt.
  660. * This could lead to RX race, driver could receive RX interrupt
  661. * but the shared data changes does not reflect this;
  662. * periodic interrupt will detect any dangling Rx activity.
  663. */
  664. /* Disable periodic interrupt; we use it as just a one-shot. */
  665. iwl_write8(priv, CSR_INT_PERIODIC_REG,
  666. CSR_INT_PERIODIC_DIS);
  667. iwl_rx_handle(priv);
  668. /*
  669. * Enable periodic interrupt in 8 msec only if we received
  670. * real RX interrupt (instead of just periodic int), to catch
  671. * any dangling Rx interrupt. If it was just the periodic
  672. * interrupt, there was no dangling Rx activity, and no need
  673. * to extend the periodic interrupt; one-shot is enough.
  674. */
  675. if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX))
  676. iwl_write8(priv, CSR_INT_PERIODIC_REG,
  677. CSR_INT_PERIODIC_ENA);
  678. priv->isr_stats.rx++;
  679. }
  680. /* This "Tx" DMA channel is used only for loading uCode */
  681. if (inta & CSR_INT_BIT_FH_TX) {
  682. iwl_write32(priv, CSR_FH_INT_STATUS, CSR_FH_INT_TX_MASK);
  683. IWL_DEBUG_ISR(priv, "uCode load interrupt\n");
  684. priv->isr_stats.tx++;
  685. handled |= CSR_INT_BIT_FH_TX;
  686. /* Wake up uCode load routine, now that load is complete */
  687. priv->ucode_write_complete = 1;
  688. wake_up_interruptible(&priv->wait_command_queue);
  689. }
  690. if (inta & ~handled) {
  691. IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
  692. priv->isr_stats.unhandled++;
  693. }
  694. if (inta & ~(priv->inta_mask)) {
  695. IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
  696. inta & ~priv->inta_mask);
  697. }
  698. /* Re-enable all interrupts */
  699. /* only Re-enable if disabled by irq */
  700. if (test_bit(STATUS_INT_ENABLED, &priv->status))
  701. iwl_enable_interrupts(priv);
  702. /* Re-enable RF_KILL if it occurred */
  703. else if (handled & CSR_INT_BIT_RF_KILL)
  704. iwl_enable_rfkill_int(priv);
  705. }
  706. /*****************************************************************************
  707. *
  708. * sysfs attributes
  709. *
  710. *****************************************************************************/
  711. #ifdef CONFIG_IWLWIFI_DEBUG
  712. /*
  713. * The following adds a new attribute to the sysfs representation
  714. * of this device driver (i.e. a new file in /sys/class/net/wlan0/device/)
  715. * used for controlling the debug level.
  716. *
  717. * See the level definitions in iwl for details.
  718. *
  719. * The debug_level being managed using sysfs below is a per device debug
  720. * level that is used instead of the global debug level if it (the per
  721. * device debug level) is set.
  722. */
  723. static ssize_t show_debug_level(struct device *d,
  724. struct device_attribute *attr, char *buf)
  725. {
  726. struct iwl_priv *priv = dev_get_drvdata(d);
  727. return sprintf(buf, "0x%08X\n", iwl_get_debug_level(priv));
  728. }
  729. static ssize_t store_debug_level(struct device *d,
  730. struct device_attribute *attr,
  731. const char *buf, size_t count)
  732. {
  733. struct iwl_priv *priv = dev_get_drvdata(d);
  734. unsigned long val;
  735. int ret;
  736. ret = strict_strtoul(buf, 0, &val);
  737. if (ret)
  738. IWL_ERR(priv, "%s is not in hex or decimal form.\n", buf);
  739. else {
  740. priv->debug_level = val;
  741. if (iwl_alloc_traffic_mem(priv))
  742. IWL_ERR(priv,
  743. "Not enough memory to generate traffic log\n");
  744. }
  745. return strnlen(buf, count);
  746. }
  747. static DEVICE_ATTR(debug_level, S_IWUSR | S_IRUGO,
  748. show_debug_level, store_debug_level);
  749. #endif /* CONFIG_IWLWIFI_DEBUG */
  750. static ssize_t show_temperature(struct device *d,
  751. struct device_attribute *attr, char *buf)
  752. {
  753. struct iwl_priv *priv = dev_get_drvdata(d);
  754. if (!iwl_is_alive(priv))
  755. return -EAGAIN;
  756. return sprintf(buf, "%d\n", priv->temperature);
  757. }
  758. static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
  759. static ssize_t show_tx_power(struct device *d,
  760. struct device_attribute *attr, char *buf)
  761. {
  762. struct iwl_priv *priv = dev_get_drvdata(d);
  763. if (!iwl_is_ready_rf(priv))
  764. return sprintf(buf, "off\n");
  765. else
  766. return sprintf(buf, "%d\n", priv->tx_power_user_lmt);
  767. }
  768. static ssize_t store_tx_power(struct device *d,
  769. struct device_attribute *attr,
  770. const char *buf, size_t count)
  771. {
  772. struct iwl_priv *priv = dev_get_drvdata(d);
  773. unsigned long val;
  774. int ret;
  775. ret = strict_strtoul(buf, 10, &val);
  776. if (ret)
  777. IWL_INFO(priv, "%s is not in decimal form.\n", buf);
  778. else {
  779. ret = iwl_set_tx_power(priv, val, false);
  780. if (ret)
  781. IWL_ERR(priv, "failed setting tx power (0x%d).\n",
  782. ret);
  783. else
  784. ret = count;
  785. }
  786. return ret;
  787. }
  788. static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
  789. static struct attribute *iwl_sysfs_entries[] = {
  790. &dev_attr_temperature.attr,
  791. &dev_attr_tx_power.attr,
  792. #ifdef CONFIG_IWLWIFI_DEBUG
  793. &dev_attr_debug_level.attr,
  794. #endif
  795. NULL
  796. };
  797. static struct attribute_group iwl_attribute_group = {
  798. .name = NULL, /* put in device directory */
  799. .attrs = iwl_sysfs_entries,
  800. };
  801. /******************************************************************************
  802. *
  803. * uCode download functions
  804. *
  805. ******************************************************************************/
  806. static void iwl_free_fw_desc(struct iwl_priv *priv, struct fw_desc *desc)
  807. {
  808. if (desc->v_addr)
  809. dma_free_coherent(priv->bus.dev, desc->len,
  810. desc->v_addr, desc->p_addr);
  811. desc->v_addr = NULL;
  812. desc->len = 0;
  813. }
  814. static void iwl_free_fw_img(struct iwl_priv *priv, struct fw_img *img)
  815. {
  816. iwl_free_fw_desc(priv, &img->code);
  817. iwl_free_fw_desc(priv, &img->data);
  818. }
  819. static void iwl_dealloc_ucode(struct iwl_priv *priv)
  820. {
  821. iwl_free_fw_img(priv, &priv->ucode_rt);
  822. iwl_free_fw_img(priv, &priv->ucode_init);
  823. }
  824. static int iwl_alloc_fw_desc(struct iwl_priv *priv, struct fw_desc *desc,
  825. const void *data, size_t len)
  826. {
  827. if (!len) {
  828. desc->v_addr = NULL;
  829. return -EINVAL;
  830. }
  831. desc->v_addr = dma_alloc_coherent(priv->bus.dev, len,
  832. &desc->p_addr, GFP_KERNEL);
  833. if (!desc->v_addr)
  834. return -ENOMEM;
  835. desc->len = len;
  836. memcpy(desc->v_addr, data, len);
  837. return 0;
  838. }
  839. struct iwlagn_ucode_capabilities {
  840. u32 max_probe_length;
  841. u32 standard_phy_calibration_size;
  842. u32 flags;
  843. };
  844. static void iwl_ucode_callback(const struct firmware *ucode_raw, void *context);
  845. static int iwl_mac_setup_register(struct iwl_priv *priv,
  846. struct iwlagn_ucode_capabilities *capa);
  847. #define UCODE_EXPERIMENTAL_INDEX 100
  848. #define UCODE_EXPERIMENTAL_TAG "exp"
  849. static int __must_check iwl_request_firmware(struct iwl_priv *priv, bool first)
  850. {
  851. const char *name_pre = priv->cfg->fw_name_pre;
  852. char tag[8];
  853. if (first) {
  854. #ifdef CONFIG_IWLWIFI_DEBUG_EXPERIMENTAL_UCODE
  855. priv->fw_index = UCODE_EXPERIMENTAL_INDEX;
  856. strcpy(tag, UCODE_EXPERIMENTAL_TAG);
  857. } else if (priv->fw_index == UCODE_EXPERIMENTAL_INDEX) {
  858. #endif
  859. priv->fw_index = priv->cfg->ucode_api_max;
  860. sprintf(tag, "%d", priv->fw_index);
  861. } else {
  862. priv->fw_index--;
  863. sprintf(tag, "%d", priv->fw_index);
  864. }
  865. if (priv->fw_index < priv->cfg->ucode_api_min) {
  866. IWL_ERR(priv, "no suitable firmware found!\n");
  867. return -ENOENT;
  868. }
  869. sprintf(priv->firmware_name, "%s%s%s", name_pre, tag, ".ucode");
  870. IWL_DEBUG_INFO(priv, "attempting to load firmware %s'%s'\n",
  871. (priv->fw_index == UCODE_EXPERIMENTAL_INDEX)
  872. ? "EXPERIMENTAL " : "",
  873. priv->firmware_name);
  874. return request_firmware_nowait(THIS_MODULE, 1, priv->firmware_name,
  875. priv->bus.dev,
  876. GFP_KERNEL, priv, iwl_ucode_callback);
  877. }
  878. struct iwlagn_firmware_pieces {
  879. const void *inst, *data, *init, *init_data;
  880. size_t inst_size, data_size, init_size, init_data_size;
  881. u32 build;
  882. u32 init_evtlog_ptr, init_evtlog_size, init_errlog_ptr;
  883. u32 inst_evtlog_ptr, inst_evtlog_size, inst_errlog_ptr;
  884. };
  885. static int iwlagn_load_legacy_firmware(struct iwl_priv *priv,
  886. const struct firmware *ucode_raw,
  887. struct iwlagn_firmware_pieces *pieces)
  888. {
  889. struct iwl_ucode_header *ucode = (void *)ucode_raw->data;
  890. u32 api_ver, hdr_size;
  891. const u8 *src;
  892. priv->ucode_ver = le32_to_cpu(ucode->ver);
  893. api_ver = IWL_UCODE_API(priv->ucode_ver);
  894. switch (api_ver) {
  895. default:
  896. hdr_size = 28;
  897. if (ucode_raw->size < hdr_size) {
  898. IWL_ERR(priv, "File size too small!\n");
  899. return -EINVAL;
  900. }
  901. pieces->build = le32_to_cpu(ucode->u.v2.build);
  902. pieces->inst_size = le32_to_cpu(ucode->u.v2.inst_size);
  903. pieces->data_size = le32_to_cpu(ucode->u.v2.data_size);
  904. pieces->init_size = le32_to_cpu(ucode->u.v2.init_size);
  905. pieces->init_data_size = le32_to_cpu(ucode->u.v2.init_data_size);
  906. src = ucode->u.v2.data;
  907. break;
  908. case 0:
  909. case 1:
  910. case 2:
  911. hdr_size = 24;
  912. if (ucode_raw->size < hdr_size) {
  913. IWL_ERR(priv, "File size too small!\n");
  914. return -EINVAL;
  915. }
  916. pieces->build = 0;
  917. pieces->inst_size = le32_to_cpu(ucode->u.v1.inst_size);
  918. pieces->data_size = le32_to_cpu(ucode->u.v1.data_size);
  919. pieces->init_size = le32_to_cpu(ucode->u.v1.init_size);
  920. pieces->init_data_size = le32_to_cpu(ucode->u.v1.init_data_size);
  921. src = ucode->u.v1.data;
  922. break;
  923. }
  924. /* Verify size of file vs. image size info in file's header */
  925. if (ucode_raw->size != hdr_size + pieces->inst_size +
  926. pieces->data_size + pieces->init_size +
  927. pieces->init_data_size) {
  928. IWL_ERR(priv,
  929. "uCode file size %d does not match expected size\n",
  930. (int)ucode_raw->size);
  931. return -EINVAL;
  932. }
  933. pieces->inst = src;
  934. src += pieces->inst_size;
  935. pieces->data = src;
  936. src += pieces->data_size;
  937. pieces->init = src;
  938. src += pieces->init_size;
  939. pieces->init_data = src;
  940. src += pieces->init_data_size;
  941. return 0;
  942. }
  943. static int iwlagn_wanted_ucode_alternative = 1;
  944. static int iwlagn_load_firmware(struct iwl_priv *priv,
  945. const struct firmware *ucode_raw,
  946. struct iwlagn_firmware_pieces *pieces,
  947. struct iwlagn_ucode_capabilities *capa)
  948. {
  949. struct iwl_tlv_ucode_header *ucode = (void *)ucode_raw->data;
  950. struct iwl_ucode_tlv *tlv;
  951. size_t len = ucode_raw->size;
  952. const u8 *data;
  953. int wanted_alternative = iwlagn_wanted_ucode_alternative, tmp;
  954. u64 alternatives;
  955. u32 tlv_len;
  956. enum iwl_ucode_tlv_type tlv_type;
  957. const u8 *tlv_data;
  958. if (len < sizeof(*ucode)) {
  959. IWL_ERR(priv, "uCode has invalid length: %zd\n", len);
  960. return -EINVAL;
  961. }
  962. if (ucode->magic != cpu_to_le32(IWL_TLV_UCODE_MAGIC)) {
  963. IWL_ERR(priv, "invalid uCode magic: 0X%x\n",
  964. le32_to_cpu(ucode->magic));
  965. return -EINVAL;
  966. }
  967. /*
  968. * Check which alternatives are present, and "downgrade"
  969. * when the chosen alternative is not present, warning
  970. * the user when that happens. Some files may not have
  971. * any alternatives, so don't warn in that case.
  972. */
  973. alternatives = le64_to_cpu(ucode->alternatives);
  974. tmp = wanted_alternative;
  975. if (wanted_alternative > 63)
  976. wanted_alternative = 63;
  977. while (wanted_alternative && !(alternatives & BIT(wanted_alternative)))
  978. wanted_alternative--;
  979. if (wanted_alternative && wanted_alternative != tmp)
  980. IWL_WARN(priv,
  981. "uCode alternative %d not available, choosing %d\n",
  982. tmp, wanted_alternative);
  983. priv->ucode_ver = le32_to_cpu(ucode->ver);
  984. pieces->build = le32_to_cpu(ucode->build);
  985. data = ucode->data;
  986. len -= sizeof(*ucode);
  987. while (len >= sizeof(*tlv)) {
  988. u16 tlv_alt;
  989. len -= sizeof(*tlv);
  990. tlv = (void *)data;
  991. tlv_len = le32_to_cpu(tlv->length);
  992. tlv_type = le16_to_cpu(tlv->type);
  993. tlv_alt = le16_to_cpu(tlv->alternative);
  994. tlv_data = tlv->data;
  995. if (len < tlv_len) {
  996. IWL_ERR(priv, "invalid TLV len: %zd/%u\n",
  997. len, tlv_len);
  998. return -EINVAL;
  999. }
  1000. len -= ALIGN(tlv_len, 4);
  1001. data += sizeof(*tlv) + ALIGN(tlv_len, 4);
  1002. /*
  1003. * Alternative 0 is always valid.
  1004. *
  1005. * Skip alternative TLVs that are not selected.
  1006. */
  1007. if (tlv_alt != 0 && tlv_alt != wanted_alternative)
  1008. continue;
  1009. switch (tlv_type) {
  1010. case IWL_UCODE_TLV_INST:
  1011. pieces->inst = tlv_data;
  1012. pieces->inst_size = tlv_len;
  1013. break;
  1014. case IWL_UCODE_TLV_DATA:
  1015. pieces->data = tlv_data;
  1016. pieces->data_size = tlv_len;
  1017. break;
  1018. case IWL_UCODE_TLV_INIT:
  1019. pieces->init = tlv_data;
  1020. pieces->init_size = tlv_len;
  1021. break;
  1022. case IWL_UCODE_TLV_INIT_DATA:
  1023. pieces->init_data = tlv_data;
  1024. pieces->init_data_size = tlv_len;
  1025. break;
  1026. case IWL_UCODE_TLV_BOOT:
  1027. IWL_ERR(priv, "Found unexpected BOOT ucode\n");
  1028. break;
  1029. case IWL_UCODE_TLV_PROBE_MAX_LEN:
  1030. if (tlv_len != sizeof(u32))
  1031. goto invalid_tlv_len;
  1032. capa->max_probe_length =
  1033. le32_to_cpup((__le32 *)tlv_data);
  1034. break;
  1035. case IWL_UCODE_TLV_PAN:
  1036. if (tlv_len)
  1037. goto invalid_tlv_len;
  1038. capa->flags |= IWL_UCODE_TLV_FLAGS_PAN;
  1039. break;
  1040. case IWL_UCODE_TLV_FLAGS:
  1041. /* must be at least one u32 */
  1042. if (tlv_len < sizeof(u32))
  1043. goto invalid_tlv_len;
  1044. /* and a proper number of u32s */
  1045. if (tlv_len % sizeof(u32))
  1046. goto invalid_tlv_len;
  1047. /*
  1048. * This driver only reads the first u32 as
  1049. * right now no more features are defined,
  1050. * if that changes then either the driver
  1051. * will not work with the new firmware, or
  1052. * it'll not take advantage of new features.
  1053. */
  1054. capa->flags = le32_to_cpup((__le32 *)tlv_data);
  1055. break;
  1056. case IWL_UCODE_TLV_INIT_EVTLOG_PTR:
  1057. if (tlv_len != sizeof(u32))
  1058. goto invalid_tlv_len;
  1059. pieces->init_evtlog_ptr =
  1060. le32_to_cpup((__le32 *)tlv_data);
  1061. break;
  1062. case IWL_UCODE_TLV_INIT_EVTLOG_SIZE:
  1063. if (tlv_len != sizeof(u32))
  1064. goto invalid_tlv_len;
  1065. pieces->init_evtlog_size =
  1066. le32_to_cpup((__le32 *)tlv_data);
  1067. break;
  1068. case IWL_UCODE_TLV_INIT_ERRLOG_PTR:
  1069. if (tlv_len != sizeof(u32))
  1070. goto invalid_tlv_len;
  1071. pieces->init_errlog_ptr =
  1072. le32_to_cpup((__le32 *)tlv_data);
  1073. break;
  1074. case IWL_UCODE_TLV_RUNT_EVTLOG_PTR:
  1075. if (tlv_len != sizeof(u32))
  1076. goto invalid_tlv_len;
  1077. pieces->inst_evtlog_ptr =
  1078. le32_to_cpup((__le32 *)tlv_data);
  1079. break;
  1080. case IWL_UCODE_TLV_RUNT_EVTLOG_SIZE:
  1081. if (tlv_len != sizeof(u32))
  1082. goto invalid_tlv_len;
  1083. pieces->inst_evtlog_size =
  1084. le32_to_cpup((__le32 *)tlv_data);
  1085. break;
  1086. case IWL_UCODE_TLV_RUNT_ERRLOG_PTR:
  1087. if (tlv_len != sizeof(u32))
  1088. goto invalid_tlv_len;
  1089. pieces->inst_errlog_ptr =
  1090. le32_to_cpup((__le32 *)tlv_data);
  1091. break;
  1092. case IWL_UCODE_TLV_ENHANCE_SENS_TBL:
  1093. if (tlv_len)
  1094. goto invalid_tlv_len;
  1095. priv->enhance_sensitivity_table = true;
  1096. break;
  1097. case IWL_UCODE_TLV_PHY_CALIBRATION_SIZE:
  1098. if (tlv_len != sizeof(u32))
  1099. goto invalid_tlv_len;
  1100. capa->standard_phy_calibration_size =
  1101. le32_to_cpup((__le32 *)tlv_data);
  1102. break;
  1103. default:
  1104. IWL_DEBUG_INFO(priv, "unknown TLV: %d\n", tlv_type);
  1105. break;
  1106. }
  1107. }
  1108. if (len) {
  1109. IWL_ERR(priv, "invalid TLV after parsing: %zd\n", len);
  1110. iwl_print_hex_dump(priv, IWL_DL_FW, (u8 *)data, len);
  1111. return -EINVAL;
  1112. }
  1113. return 0;
  1114. invalid_tlv_len:
  1115. IWL_ERR(priv, "TLV %d has invalid size: %u\n", tlv_type, tlv_len);
  1116. iwl_print_hex_dump(priv, IWL_DL_FW, tlv_data, tlv_len);
  1117. return -EINVAL;
  1118. }
  1119. /**
  1120. * iwl_ucode_callback - callback when firmware was loaded
  1121. *
  1122. * If loaded successfully, copies the firmware into buffers
  1123. * for the card to fetch (via DMA).
  1124. */
  1125. static void iwl_ucode_callback(const struct firmware *ucode_raw, void *context)
  1126. {
  1127. struct iwl_priv *priv = context;
  1128. struct iwl_ucode_header *ucode;
  1129. int err;
  1130. struct iwlagn_firmware_pieces pieces;
  1131. const unsigned int api_max = priv->cfg->ucode_api_max;
  1132. const unsigned int api_min = priv->cfg->ucode_api_min;
  1133. u32 api_ver;
  1134. char buildstr[25];
  1135. u32 build;
  1136. struct iwlagn_ucode_capabilities ucode_capa = {
  1137. .max_probe_length = 200,
  1138. .standard_phy_calibration_size =
  1139. IWL_DEFAULT_STANDARD_PHY_CALIBRATE_TBL_SIZE,
  1140. };
  1141. memset(&pieces, 0, sizeof(pieces));
  1142. if (!ucode_raw) {
  1143. if (priv->fw_index <= priv->cfg->ucode_api_max)
  1144. IWL_ERR(priv,
  1145. "request for firmware file '%s' failed.\n",
  1146. priv->firmware_name);
  1147. goto try_again;
  1148. }
  1149. IWL_DEBUG_INFO(priv, "Loaded firmware file '%s' (%zd bytes).\n",
  1150. priv->firmware_name, ucode_raw->size);
  1151. /* Make sure that we got at least the API version number */
  1152. if (ucode_raw->size < 4) {
  1153. IWL_ERR(priv, "File size way too small!\n");
  1154. goto try_again;
  1155. }
  1156. /* Data from ucode file: header followed by uCode images */
  1157. ucode = (struct iwl_ucode_header *)ucode_raw->data;
  1158. if (ucode->ver)
  1159. err = iwlagn_load_legacy_firmware(priv, ucode_raw, &pieces);
  1160. else
  1161. err = iwlagn_load_firmware(priv, ucode_raw, &pieces,
  1162. &ucode_capa);
  1163. if (err)
  1164. goto try_again;
  1165. api_ver = IWL_UCODE_API(priv->ucode_ver);
  1166. build = pieces.build;
  1167. /*
  1168. * api_ver should match the api version forming part of the
  1169. * firmware filename ... but we don't check for that and only rely
  1170. * on the API version read from firmware header from here on forward
  1171. */
  1172. /* no api version check required for experimental uCode */
  1173. if (priv->fw_index != UCODE_EXPERIMENTAL_INDEX) {
  1174. if (api_ver < api_min || api_ver > api_max) {
  1175. IWL_ERR(priv,
  1176. "Driver unable to support your firmware API. "
  1177. "Driver supports v%u, firmware is v%u.\n",
  1178. api_max, api_ver);
  1179. goto try_again;
  1180. }
  1181. if (api_ver != api_max)
  1182. IWL_ERR(priv,
  1183. "Firmware has old API version. Expected v%u, "
  1184. "got v%u. New firmware can be obtained "
  1185. "from http://www.intellinuxwireless.org.\n",
  1186. api_max, api_ver);
  1187. }
  1188. if (build)
  1189. sprintf(buildstr, " build %u%s", build,
  1190. (priv->fw_index == UCODE_EXPERIMENTAL_INDEX)
  1191. ? " (EXP)" : "");
  1192. else
  1193. buildstr[0] = '\0';
  1194. IWL_INFO(priv, "loaded firmware version %u.%u.%u.%u%s\n",
  1195. IWL_UCODE_MAJOR(priv->ucode_ver),
  1196. IWL_UCODE_MINOR(priv->ucode_ver),
  1197. IWL_UCODE_API(priv->ucode_ver),
  1198. IWL_UCODE_SERIAL(priv->ucode_ver),
  1199. buildstr);
  1200. snprintf(priv->hw->wiphy->fw_version,
  1201. sizeof(priv->hw->wiphy->fw_version),
  1202. "%u.%u.%u.%u%s",
  1203. IWL_UCODE_MAJOR(priv->ucode_ver),
  1204. IWL_UCODE_MINOR(priv->ucode_ver),
  1205. IWL_UCODE_API(priv->ucode_ver),
  1206. IWL_UCODE_SERIAL(priv->ucode_ver),
  1207. buildstr);
  1208. /*
  1209. * For any of the failures below (before allocating pci memory)
  1210. * we will try to load a version with a smaller API -- maybe the
  1211. * user just got a corrupted version of the latest API.
  1212. */
  1213. IWL_DEBUG_INFO(priv, "f/w package hdr ucode version raw = 0x%x\n",
  1214. priv->ucode_ver);
  1215. IWL_DEBUG_INFO(priv, "f/w package hdr runtime inst size = %Zd\n",
  1216. pieces.inst_size);
  1217. IWL_DEBUG_INFO(priv, "f/w package hdr runtime data size = %Zd\n",
  1218. pieces.data_size);
  1219. IWL_DEBUG_INFO(priv, "f/w package hdr init inst size = %Zd\n",
  1220. pieces.init_size);
  1221. IWL_DEBUG_INFO(priv, "f/w package hdr init data size = %Zd\n",
  1222. pieces.init_data_size);
  1223. /* Verify that uCode images will fit in card's SRAM */
  1224. if (pieces.inst_size > priv->hw_params.max_inst_size) {
  1225. IWL_ERR(priv, "uCode instr len %Zd too large to fit in\n",
  1226. pieces.inst_size);
  1227. goto try_again;
  1228. }
  1229. if (pieces.data_size > priv->hw_params.max_data_size) {
  1230. IWL_ERR(priv, "uCode data len %Zd too large to fit in\n",
  1231. pieces.data_size);
  1232. goto try_again;
  1233. }
  1234. if (pieces.init_size > priv->hw_params.max_inst_size) {
  1235. IWL_ERR(priv, "uCode init instr len %Zd too large to fit in\n",
  1236. pieces.init_size);
  1237. goto try_again;
  1238. }
  1239. if (pieces.init_data_size > priv->hw_params.max_data_size) {
  1240. IWL_ERR(priv, "uCode init data len %Zd too large to fit in\n",
  1241. pieces.init_data_size);
  1242. goto try_again;
  1243. }
  1244. /* Allocate ucode buffers for card's bus-master loading ... */
  1245. /* Runtime instructions and 2 copies of data:
  1246. * 1) unmodified from disk
  1247. * 2) backup cache for save/restore during power-downs */
  1248. if (iwl_alloc_fw_desc(priv, &priv->ucode_rt.code,
  1249. pieces.inst, pieces.inst_size))
  1250. goto err_pci_alloc;
  1251. if (iwl_alloc_fw_desc(priv, &priv->ucode_rt.data,
  1252. pieces.data, pieces.data_size))
  1253. goto err_pci_alloc;
  1254. /* Initialization instructions and data */
  1255. if (pieces.init_size && pieces.init_data_size) {
  1256. if (iwl_alloc_fw_desc(priv, &priv->ucode_init.code,
  1257. pieces.init, pieces.init_size))
  1258. goto err_pci_alloc;
  1259. if (iwl_alloc_fw_desc(priv, &priv->ucode_init.data,
  1260. pieces.init_data, pieces.init_data_size))
  1261. goto err_pci_alloc;
  1262. }
  1263. /* Now that we can no longer fail, copy information */
  1264. /*
  1265. * The (size - 16) / 12 formula is based on the information recorded
  1266. * for each event, which is of mode 1 (including timestamp) for all
  1267. * new microcodes that include this information.
  1268. */
  1269. priv->_agn.init_evtlog_ptr = pieces.init_evtlog_ptr;
  1270. if (pieces.init_evtlog_size)
  1271. priv->_agn.init_evtlog_size = (pieces.init_evtlog_size - 16)/12;
  1272. else
  1273. priv->_agn.init_evtlog_size =
  1274. priv->cfg->base_params->max_event_log_size;
  1275. priv->_agn.init_errlog_ptr = pieces.init_errlog_ptr;
  1276. priv->_agn.inst_evtlog_ptr = pieces.inst_evtlog_ptr;
  1277. if (pieces.inst_evtlog_size)
  1278. priv->_agn.inst_evtlog_size = (pieces.inst_evtlog_size - 16)/12;
  1279. else
  1280. priv->_agn.inst_evtlog_size =
  1281. priv->cfg->base_params->max_event_log_size;
  1282. priv->_agn.inst_errlog_ptr = pieces.inst_errlog_ptr;
  1283. priv->new_scan_threshold_behaviour =
  1284. !!(ucode_capa.flags & IWL_UCODE_TLV_FLAGS_NEWSCAN);
  1285. if ((priv->cfg->sku & EEPROM_SKU_CAP_IPAN_ENABLE) &&
  1286. (ucode_capa.flags & IWL_UCODE_TLV_FLAGS_PAN)) {
  1287. priv->valid_contexts |= BIT(IWL_RXON_CTX_PAN);
  1288. priv->sta_key_max_num = STA_KEY_MAX_NUM_PAN;
  1289. } else
  1290. priv->sta_key_max_num = STA_KEY_MAX_NUM;
  1291. if (priv->valid_contexts != BIT(IWL_RXON_CTX_BSS))
  1292. priv->cmd_queue = IWL_IPAN_CMD_QUEUE_NUM;
  1293. else
  1294. priv->cmd_queue = IWL_DEFAULT_CMD_QUEUE_NUM;
  1295. /*
  1296. * figure out the offset of chain noise reset and gain commands
  1297. * base on the size of standard phy calibration commands table size
  1298. */
  1299. if (ucode_capa.standard_phy_calibration_size >
  1300. IWL_MAX_PHY_CALIBRATE_TBL_SIZE)
  1301. ucode_capa.standard_phy_calibration_size =
  1302. IWL_MAX_STANDARD_PHY_CALIBRATE_TBL_SIZE;
  1303. priv->_agn.phy_calib_chain_noise_reset_cmd =
  1304. ucode_capa.standard_phy_calibration_size;
  1305. priv->_agn.phy_calib_chain_noise_gain_cmd =
  1306. ucode_capa.standard_phy_calibration_size + 1;
  1307. /**************************************************
  1308. * This is still part of probe() in a sense...
  1309. *
  1310. * 9. Setup and register with mac80211 and debugfs
  1311. **************************************************/
  1312. err = iwl_mac_setup_register(priv, &ucode_capa);
  1313. if (err)
  1314. goto out_unbind;
  1315. err = iwl_dbgfs_register(priv, DRV_NAME);
  1316. if (err)
  1317. IWL_ERR(priv, "failed to create debugfs files. Ignoring error: %d\n", err);
  1318. err = sysfs_create_group(&(priv->bus.dev->kobj),
  1319. &iwl_attribute_group);
  1320. if (err) {
  1321. IWL_ERR(priv, "failed to create sysfs device attributes\n");
  1322. goto out_unbind;
  1323. }
  1324. /* We have our copies now, allow OS release its copies */
  1325. release_firmware(ucode_raw);
  1326. complete(&priv->_agn.firmware_loading_complete);
  1327. return;
  1328. try_again:
  1329. /* try next, if any */
  1330. if (iwl_request_firmware(priv, false))
  1331. goto out_unbind;
  1332. release_firmware(ucode_raw);
  1333. return;
  1334. err_pci_alloc:
  1335. IWL_ERR(priv, "failed to allocate pci memory\n");
  1336. iwl_dealloc_ucode(priv);
  1337. out_unbind:
  1338. complete(&priv->_agn.firmware_loading_complete);
  1339. device_release_driver(priv->bus.dev);
  1340. release_firmware(ucode_raw);
  1341. }
  1342. static const char *desc_lookup_text[] = {
  1343. "OK",
  1344. "FAIL",
  1345. "BAD_PARAM",
  1346. "BAD_CHECKSUM",
  1347. "NMI_INTERRUPT_WDG",
  1348. "SYSASSERT",
  1349. "FATAL_ERROR",
  1350. "BAD_COMMAND",
  1351. "HW_ERROR_TUNE_LOCK",
  1352. "HW_ERROR_TEMPERATURE",
  1353. "ILLEGAL_CHAN_FREQ",
  1354. "VCC_NOT_STABLE",
  1355. "FH_ERROR",
  1356. "NMI_INTERRUPT_HOST",
  1357. "NMI_INTERRUPT_ACTION_PT",
  1358. "NMI_INTERRUPT_UNKNOWN",
  1359. "UCODE_VERSION_MISMATCH",
  1360. "HW_ERROR_ABS_LOCK",
  1361. "HW_ERROR_CAL_LOCK_FAIL",
  1362. "NMI_INTERRUPT_INST_ACTION_PT",
  1363. "NMI_INTERRUPT_DATA_ACTION_PT",
  1364. "NMI_TRM_HW_ER",
  1365. "NMI_INTERRUPT_TRM",
  1366. "NMI_INTERRUPT_BREAK_POINT"
  1367. "DEBUG_0",
  1368. "DEBUG_1",
  1369. "DEBUG_2",
  1370. "DEBUG_3",
  1371. };
  1372. static struct { char *name; u8 num; } advanced_lookup[] = {
  1373. { "NMI_INTERRUPT_WDG", 0x34 },
  1374. { "SYSASSERT", 0x35 },
  1375. { "UCODE_VERSION_MISMATCH", 0x37 },
  1376. { "BAD_COMMAND", 0x38 },
  1377. { "NMI_INTERRUPT_DATA_ACTION_PT", 0x3C },
  1378. { "FATAL_ERROR", 0x3D },
  1379. { "NMI_TRM_HW_ERR", 0x46 },
  1380. { "NMI_INTERRUPT_TRM", 0x4C },
  1381. { "NMI_INTERRUPT_BREAK_POINT", 0x54 },
  1382. { "NMI_INTERRUPT_WDG_RXF_FULL", 0x5C },
  1383. { "NMI_INTERRUPT_WDG_NO_RBD_RXF_FULL", 0x64 },
  1384. { "NMI_INTERRUPT_HOST", 0x66 },
  1385. { "NMI_INTERRUPT_ACTION_PT", 0x7C },
  1386. { "NMI_INTERRUPT_UNKNOWN", 0x84 },
  1387. { "NMI_INTERRUPT_INST_ACTION_PT", 0x86 },
  1388. { "ADVANCED_SYSASSERT", 0 },
  1389. };
  1390. static const char *desc_lookup(u32 num)
  1391. {
  1392. int i;
  1393. int max = ARRAY_SIZE(desc_lookup_text);
  1394. if (num < max)
  1395. return desc_lookup_text[num];
  1396. max = ARRAY_SIZE(advanced_lookup) - 1;
  1397. for (i = 0; i < max; i++) {
  1398. if (advanced_lookup[i].num == num)
  1399. break;
  1400. }
  1401. return advanced_lookup[i].name;
  1402. }
  1403. #define ERROR_START_OFFSET (1 * sizeof(u32))
  1404. #define ERROR_ELEM_SIZE (7 * sizeof(u32))
  1405. void iwl_dump_nic_error_log(struct iwl_priv *priv)
  1406. {
  1407. u32 base;
  1408. struct iwl_error_event_table table;
  1409. base = priv->device_pointers.error_event_table;
  1410. if (priv->ucode_type == IWL_UCODE_INIT) {
  1411. if (!base)
  1412. base = priv->_agn.init_errlog_ptr;
  1413. } else {
  1414. if (!base)
  1415. base = priv->_agn.inst_errlog_ptr;
  1416. }
  1417. if (!priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
  1418. IWL_ERR(priv,
  1419. "Not valid error log pointer 0x%08X for %s uCode\n",
  1420. base,
  1421. (priv->ucode_type == IWL_UCODE_INIT)
  1422. ? "Init" : "RT");
  1423. return;
  1424. }
  1425. iwl_read_targ_mem_words(priv, base, &table, sizeof(table));
  1426. if (ERROR_START_OFFSET <= table.valid * ERROR_ELEM_SIZE) {
  1427. IWL_ERR(priv, "Start IWL Error Log Dump:\n");
  1428. IWL_ERR(priv, "Status: 0x%08lX, count: %d\n",
  1429. priv->status, table.valid);
  1430. }
  1431. priv->isr_stats.err_code = table.error_id;
  1432. trace_iwlwifi_dev_ucode_error(priv, table.error_id, table.tsf_low,
  1433. table.data1, table.data2, table.line,
  1434. table.blink1, table.blink2, table.ilink1,
  1435. table.ilink2, table.bcon_time, table.gp1,
  1436. table.gp2, table.gp3, table.ucode_ver,
  1437. table.hw_ver, table.brd_ver);
  1438. IWL_ERR(priv, "0x%08X | %-28s\n", table.error_id,
  1439. desc_lookup(table.error_id));
  1440. IWL_ERR(priv, "0x%08X | uPc\n", table.pc);
  1441. IWL_ERR(priv, "0x%08X | branchlink1\n", table.blink1);
  1442. IWL_ERR(priv, "0x%08X | branchlink2\n", table.blink2);
  1443. IWL_ERR(priv, "0x%08X | interruptlink1\n", table.ilink1);
  1444. IWL_ERR(priv, "0x%08X | interruptlink2\n", table.ilink2);
  1445. IWL_ERR(priv, "0x%08X | data1\n", table.data1);
  1446. IWL_ERR(priv, "0x%08X | data2\n", table.data2);
  1447. IWL_ERR(priv, "0x%08X | line\n", table.line);
  1448. IWL_ERR(priv, "0x%08X | beacon time\n", table.bcon_time);
  1449. IWL_ERR(priv, "0x%08X | tsf low\n", table.tsf_low);
  1450. IWL_ERR(priv, "0x%08X | tsf hi\n", table.tsf_hi);
  1451. IWL_ERR(priv, "0x%08X | time gp1\n", table.gp1);
  1452. IWL_ERR(priv, "0x%08X | time gp2\n", table.gp2);
  1453. IWL_ERR(priv, "0x%08X | time gp3\n", table.gp3);
  1454. IWL_ERR(priv, "0x%08X | uCode version\n", table.ucode_ver);
  1455. IWL_ERR(priv, "0x%08X | hw version\n", table.hw_ver);
  1456. IWL_ERR(priv, "0x%08X | board version\n", table.brd_ver);
  1457. IWL_ERR(priv, "0x%08X | hcmd\n", table.hcmd);
  1458. }
  1459. #define EVENT_START_OFFSET (4 * sizeof(u32))
  1460. /**
  1461. * iwl_print_event_log - Dump error event log to syslog
  1462. *
  1463. */
  1464. static int iwl_print_event_log(struct iwl_priv *priv, u32 start_idx,
  1465. u32 num_events, u32 mode,
  1466. int pos, char **buf, size_t bufsz)
  1467. {
  1468. u32 i;
  1469. u32 base; /* SRAM byte address of event log header */
  1470. u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
  1471. u32 ptr; /* SRAM byte address of log data */
  1472. u32 ev, time, data; /* event log data */
  1473. unsigned long reg_flags;
  1474. if (num_events == 0)
  1475. return pos;
  1476. base = priv->device_pointers.log_event_table;
  1477. if (priv->ucode_type == IWL_UCODE_INIT) {
  1478. if (!base)
  1479. base = priv->_agn.init_evtlog_ptr;
  1480. } else {
  1481. if (!base)
  1482. base = priv->_agn.inst_evtlog_ptr;
  1483. }
  1484. if (mode == 0)
  1485. event_size = 2 * sizeof(u32);
  1486. else
  1487. event_size = 3 * sizeof(u32);
  1488. ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
  1489. /* Make sure device is powered up for SRAM reads */
  1490. spin_lock_irqsave(&priv->reg_lock, reg_flags);
  1491. iwl_grab_nic_access(priv);
  1492. /* Set starting address; reads will auto-increment */
  1493. iwl_write32(priv, HBUS_TARG_MEM_RADDR, ptr);
  1494. rmb();
  1495. /* "time" is actually "data" for mode 0 (no timestamp).
  1496. * place event id # at far right for easier visual parsing. */
  1497. for (i = 0; i < num_events; i++) {
  1498. ev = iwl_read32(priv, HBUS_TARG_MEM_RDAT);
  1499. time = iwl_read32(priv, HBUS_TARG_MEM_RDAT);
  1500. if (mode == 0) {
  1501. /* data, ev */
  1502. if (bufsz) {
  1503. pos += scnprintf(*buf + pos, bufsz - pos,
  1504. "EVT_LOG:0x%08x:%04u\n",
  1505. time, ev);
  1506. } else {
  1507. trace_iwlwifi_dev_ucode_event(priv, 0,
  1508. time, ev);
  1509. IWL_ERR(priv, "EVT_LOG:0x%08x:%04u\n",
  1510. time, ev);
  1511. }
  1512. } else {
  1513. data = iwl_read32(priv, HBUS_TARG_MEM_RDAT);
  1514. if (bufsz) {
  1515. pos += scnprintf(*buf + pos, bufsz - pos,
  1516. "EVT_LOGT:%010u:0x%08x:%04u\n",
  1517. time, data, ev);
  1518. } else {
  1519. IWL_ERR(priv, "EVT_LOGT:%010u:0x%08x:%04u\n",
  1520. time, data, ev);
  1521. trace_iwlwifi_dev_ucode_event(priv, time,
  1522. data, ev);
  1523. }
  1524. }
  1525. }
  1526. /* Allow device to power down */
  1527. iwl_release_nic_access(priv);
  1528. spin_unlock_irqrestore(&priv->reg_lock, reg_flags);
  1529. return pos;
  1530. }
  1531. /**
  1532. * iwl_print_last_event_logs - Dump the newest # of event log to syslog
  1533. */
  1534. static int iwl_print_last_event_logs(struct iwl_priv *priv, u32 capacity,
  1535. u32 num_wraps, u32 next_entry,
  1536. u32 size, u32 mode,
  1537. int pos, char **buf, size_t bufsz)
  1538. {
  1539. /*
  1540. * display the newest DEFAULT_LOG_ENTRIES entries
  1541. * i.e the entries just before the next ont that uCode would fill.
  1542. */
  1543. if (num_wraps) {
  1544. if (next_entry < size) {
  1545. pos = iwl_print_event_log(priv,
  1546. capacity - (size - next_entry),
  1547. size - next_entry, mode,
  1548. pos, buf, bufsz);
  1549. pos = iwl_print_event_log(priv, 0,
  1550. next_entry, mode,
  1551. pos, buf, bufsz);
  1552. } else
  1553. pos = iwl_print_event_log(priv, next_entry - size,
  1554. size, mode, pos, buf, bufsz);
  1555. } else {
  1556. if (next_entry < size) {
  1557. pos = iwl_print_event_log(priv, 0, next_entry,
  1558. mode, pos, buf, bufsz);
  1559. } else {
  1560. pos = iwl_print_event_log(priv, next_entry - size,
  1561. size, mode, pos, buf, bufsz);
  1562. }
  1563. }
  1564. return pos;
  1565. }
  1566. #define DEFAULT_DUMP_EVENT_LOG_ENTRIES (20)
  1567. int iwl_dump_nic_event_log(struct iwl_priv *priv, bool full_log,
  1568. char **buf, bool display)
  1569. {
  1570. u32 base; /* SRAM byte address of event log header */
  1571. u32 capacity; /* event log capacity in # entries */
  1572. u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */
  1573. u32 num_wraps; /* # times uCode wrapped to top of log */
  1574. u32 next_entry; /* index of next entry to be written by uCode */
  1575. u32 size; /* # entries that we'll print */
  1576. u32 logsize;
  1577. int pos = 0;
  1578. size_t bufsz = 0;
  1579. base = priv->device_pointers.log_event_table;
  1580. if (priv->ucode_type == IWL_UCODE_INIT) {
  1581. logsize = priv->_agn.init_evtlog_size;
  1582. if (!base)
  1583. base = priv->_agn.init_evtlog_ptr;
  1584. } else {
  1585. logsize = priv->_agn.inst_evtlog_size;
  1586. if (!base)
  1587. base = priv->_agn.inst_evtlog_ptr;
  1588. }
  1589. if (!priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
  1590. IWL_ERR(priv,
  1591. "Invalid event log pointer 0x%08X for %s uCode\n",
  1592. base,
  1593. (priv->ucode_type == IWL_UCODE_INIT)
  1594. ? "Init" : "RT");
  1595. return -EINVAL;
  1596. }
  1597. /* event log header */
  1598. capacity = iwl_read_targ_mem(priv, base);
  1599. mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
  1600. num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
  1601. next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32)));
  1602. if (capacity > logsize) {
  1603. IWL_ERR(priv, "Log capacity %d is bogus, limit to %d entries\n",
  1604. capacity, logsize);
  1605. capacity = logsize;
  1606. }
  1607. if (next_entry > logsize) {
  1608. IWL_ERR(priv, "Log write index %d is bogus, limit to %d\n",
  1609. next_entry, logsize);
  1610. next_entry = logsize;
  1611. }
  1612. size = num_wraps ? capacity : next_entry;
  1613. /* bail out if nothing in log */
  1614. if (size == 0) {
  1615. IWL_ERR(priv, "Start IWL Event Log Dump: nothing in log\n");
  1616. return pos;
  1617. }
  1618. /* enable/disable bt channel inhibition */
  1619. priv->bt_ch_announce = iwlagn_bt_ch_announce;
  1620. #ifdef CONFIG_IWLWIFI_DEBUG
  1621. if (!(iwl_get_debug_level(priv) & IWL_DL_FW_ERRORS) && !full_log)
  1622. size = (size > DEFAULT_DUMP_EVENT_LOG_ENTRIES)
  1623. ? DEFAULT_DUMP_EVENT_LOG_ENTRIES : size;
  1624. #else
  1625. size = (size > DEFAULT_DUMP_EVENT_LOG_ENTRIES)
  1626. ? DEFAULT_DUMP_EVENT_LOG_ENTRIES : size;
  1627. #endif
  1628. IWL_ERR(priv, "Start IWL Event Log Dump: display last %u entries\n",
  1629. size);
  1630. #ifdef CONFIG_IWLWIFI_DEBUG
  1631. if (display) {
  1632. if (full_log)
  1633. bufsz = capacity * 48;
  1634. else
  1635. bufsz = size * 48;
  1636. *buf = kmalloc(bufsz, GFP_KERNEL);
  1637. if (!*buf)
  1638. return -ENOMEM;
  1639. }
  1640. if ((iwl_get_debug_level(priv) & IWL_DL_FW_ERRORS) || full_log) {
  1641. /*
  1642. * if uCode has wrapped back to top of log,
  1643. * start at the oldest entry,
  1644. * i.e the next one that uCode would fill.
  1645. */
  1646. if (num_wraps)
  1647. pos = iwl_print_event_log(priv, next_entry,
  1648. capacity - next_entry, mode,
  1649. pos, buf, bufsz);
  1650. /* (then/else) start at top of log */
  1651. pos = iwl_print_event_log(priv, 0,
  1652. next_entry, mode, pos, buf, bufsz);
  1653. } else
  1654. pos = iwl_print_last_event_logs(priv, capacity, num_wraps,
  1655. next_entry, size, mode,
  1656. pos, buf, bufsz);
  1657. #else
  1658. pos = iwl_print_last_event_logs(priv, capacity, num_wraps,
  1659. next_entry, size, mode,
  1660. pos, buf, bufsz);
  1661. #endif
  1662. return pos;
  1663. }
  1664. static void iwl_rf_kill_ct_config(struct iwl_priv *priv)
  1665. {
  1666. struct iwl_ct_kill_config cmd;
  1667. struct iwl_ct_kill_throttling_config adv_cmd;
  1668. unsigned long flags;
  1669. int ret = 0;
  1670. spin_lock_irqsave(&priv->lock, flags);
  1671. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
  1672. CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT);
  1673. spin_unlock_irqrestore(&priv->lock, flags);
  1674. priv->thermal_throttle.ct_kill_toggle = false;
  1675. if (priv->cfg->base_params->support_ct_kill_exit) {
  1676. adv_cmd.critical_temperature_enter =
  1677. cpu_to_le32(priv->hw_params.ct_kill_threshold);
  1678. adv_cmd.critical_temperature_exit =
  1679. cpu_to_le32(priv->hw_params.ct_kill_exit_threshold);
  1680. ret = iwl_send_cmd_pdu(priv, REPLY_CT_KILL_CONFIG_CMD,
  1681. sizeof(adv_cmd), &adv_cmd);
  1682. if (ret)
  1683. IWL_ERR(priv, "REPLY_CT_KILL_CONFIG_CMD failed\n");
  1684. else
  1685. IWL_DEBUG_INFO(priv, "REPLY_CT_KILL_CONFIG_CMD "
  1686. "succeeded, "
  1687. "critical temperature enter is %d,"
  1688. "exit is %d\n",
  1689. priv->hw_params.ct_kill_threshold,
  1690. priv->hw_params.ct_kill_exit_threshold);
  1691. } else {
  1692. cmd.critical_temperature_R =
  1693. cpu_to_le32(priv->hw_params.ct_kill_threshold);
  1694. ret = iwl_send_cmd_pdu(priv, REPLY_CT_KILL_CONFIG_CMD,
  1695. sizeof(cmd), &cmd);
  1696. if (ret)
  1697. IWL_ERR(priv, "REPLY_CT_KILL_CONFIG_CMD failed\n");
  1698. else
  1699. IWL_DEBUG_INFO(priv, "REPLY_CT_KILL_CONFIG_CMD "
  1700. "succeeded, "
  1701. "critical temperature is %d\n",
  1702. priv->hw_params.ct_kill_threshold);
  1703. }
  1704. }
  1705. static int iwlagn_send_calib_cfg_rt(struct iwl_priv *priv, u32 cfg)
  1706. {
  1707. struct iwl_calib_cfg_cmd calib_cfg_cmd;
  1708. struct iwl_host_cmd cmd = {
  1709. .id = CALIBRATION_CFG_CMD,
  1710. .len = { sizeof(struct iwl_calib_cfg_cmd), },
  1711. .data = { &calib_cfg_cmd, },
  1712. };
  1713. memset(&calib_cfg_cmd, 0, sizeof(calib_cfg_cmd));
  1714. calib_cfg_cmd.ucd_calib_cfg.once.is_enable = IWL_CALIB_INIT_CFG_ALL;
  1715. calib_cfg_cmd.ucd_calib_cfg.once.start = cpu_to_le32(cfg);
  1716. return iwl_send_cmd(priv, &cmd);
  1717. }
  1718. /**
  1719. * iwl_alive_start - called after REPLY_ALIVE notification received
  1720. * from protocol/runtime uCode (initialization uCode's
  1721. * Alive gets handled by iwl_init_alive_start()).
  1722. */
  1723. int iwl_alive_start(struct iwl_priv *priv)
  1724. {
  1725. int ret = 0;
  1726. struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_BSS];
  1727. iwl_reset_ict(priv);
  1728. IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
  1729. /* After the ALIVE response, we can send host commands to the uCode */
  1730. set_bit(STATUS_ALIVE, &priv->status);
  1731. /* Enable watchdog to monitor the driver tx queues */
  1732. iwl_setup_watchdog(priv);
  1733. if (iwl_is_rfkill(priv))
  1734. return -ERFKILL;
  1735. /* download priority table before any calibration request */
  1736. if (priv->cfg->bt_params &&
  1737. priv->cfg->bt_params->advanced_bt_coexist) {
  1738. /* Configure Bluetooth device coexistence support */
  1739. priv->bt_valid = IWLAGN_BT_ALL_VALID_MSK;
  1740. priv->kill_ack_mask = IWLAGN_BT_KILL_ACK_MASK_DEFAULT;
  1741. priv->kill_cts_mask = IWLAGN_BT_KILL_CTS_MASK_DEFAULT;
  1742. priv->cfg->ops->hcmd->send_bt_config(priv);
  1743. priv->bt_valid = IWLAGN_BT_VALID_ENABLE_FLAGS;
  1744. iwlagn_send_prio_tbl(priv);
  1745. /* FIXME: w/a to force change uCode BT state machine */
  1746. ret = iwlagn_send_bt_env(priv, IWL_BT_COEX_ENV_OPEN,
  1747. BT_COEX_PRIO_TBL_EVT_INIT_CALIB2);
  1748. if (ret)
  1749. return ret;
  1750. ret = iwlagn_send_bt_env(priv, IWL_BT_COEX_ENV_CLOSE,
  1751. BT_COEX_PRIO_TBL_EVT_INIT_CALIB2);
  1752. if (ret)
  1753. return ret;
  1754. }
  1755. if (priv->hw_params.calib_rt_cfg)
  1756. iwlagn_send_calib_cfg_rt(priv, priv->hw_params.calib_rt_cfg);
  1757. ieee80211_wake_queues(priv->hw);
  1758. priv->active_rate = IWL_RATES_MASK;
  1759. /* Configure Tx antenna selection based on H/W config */
  1760. if (priv->cfg->ops->hcmd->set_tx_ant)
  1761. priv->cfg->ops->hcmd->set_tx_ant(priv, priv->cfg->valid_tx_ant);
  1762. if (iwl_is_associated_ctx(ctx)) {
  1763. struct iwl_rxon_cmd *active_rxon =
  1764. (struct iwl_rxon_cmd *)&ctx->active;
  1765. /* apply any changes in staging */
  1766. ctx->staging.filter_flags |= RXON_FILTER_ASSOC_MSK;
  1767. active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  1768. } else {
  1769. struct iwl_rxon_context *tmp;
  1770. /* Initialize our rx_config data */
  1771. for_each_context(priv, tmp)
  1772. iwl_connection_init_rx_config(priv, tmp);
  1773. if (priv->cfg->ops->hcmd->set_rxon_chain)
  1774. priv->cfg->ops->hcmd->set_rxon_chain(priv, ctx);
  1775. }
  1776. if (!priv->cfg->bt_params || (priv->cfg->bt_params &&
  1777. !priv->cfg->bt_params->advanced_bt_coexist)) {
  1778. /*
  1779. * default is 2-wire BT coexexistence support
  1780. */
  1781. priv->cfg->ops->hcmd->send_bt_config(priv);
  1782. }
  1783. iwl_reset_run_time_calib(priv);
  1784. set_bit(STATUS_READY, &priv->status);
  1785. /* Configure the adapter for unassociated operation */
  1786. ret = iwlagn_commit_rxon(priv, ctx);
  1787. if (ret)
  1788. return ret;
  1789. /* At this point, the NIC is initialized and operational */
  1790. iwl_rf_kill_ct_config(priv);
  1791. IWL_DEBUG_INFO(priv, "ALIVE processing complete.\n");
  1792. return iwl_power_update_mode(priv, true);
  1793. }
  1794. static void iwl_cancel_deferred_work(struct iwl_priv *priv);
  1795. static void __iwl_down(struct iwl_priv *priv)
  1796. {
  1797. int exit_pending;
  1798. IWL_DEBUG_INFO(priv, DRV_NAME " is going down\n");
  1799. iwl_scan_cancel_timeout(priv, 200);
  1800. exit_pending = test_and_set_bit(STATUS_EXIT_PENDING, &priv->status);
  1801. /* Stop TX queues watchdog. We need to have STATUS_EXIT_PENDING bit set
  1802. * to prevent rearm timer */
  1803. del_timer_sync(&priv->watchdog);
  1804. iwl_clear_ucode_stations(priv, NULL);
  1805. iwl_dealloc_bcast_stations(priv);
  1806. iwl_clear_driver_stations(priv);
  1807. /* reset BT coex data */
  1808. priv->bt_status = 0;
  1809. if (priv->cfg->bt_params)
  1810. priv->bt_traffic_load =
  1811. priv->cfg->bt_params->bt_init_traffic_load;
  1812. else
  1813. priv->bt_traffic_load = 0;
  1814. priv->bt_full_concurrent = false;
  1815. priv->bt_ci_compliance = 0;
  1816. /* Wipe out the EXIT_PENDING status bit if we are not actually
  1817. * exiting the module */
  1818. if (!exit_pending)
  1819. clear_bit(STATUS_EXIT_PENDING, &priv->status);
  1820. if (priv->mac80211_registered)
  1821. ieee80211_stop_queues(priv->hw);
  1822. /* Clear out all status bits but a few that are stable across reset */
  1823. priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
  1824. STATUS_RF_KILL_HW |
  1825. test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
  1826. STATUS_GEO_CONFIGURED |
  1827. test_bit(STATUS_FW_ERROR, &priv->status) <<
  1828. STATUS_FW_ERROR |
  1829. test_bit(STATUS_EXIT_PENDING, &priv->status) <<
  1830. STATUS_EXIT_PENDING;
  1831. iwlagn_stop_device(priv);
  1832. dev_kfree_skb(priv->beacon_skb);
  1833. priv->beacon_skb = NULL;
  1834. }
  1835. static void iwl_down(struct iwl_priv *priv)
  1836. {
  1837. mutex_lock(&priv->mutex);
  1838. __iwl_down(priv);
  1839. mutex_unlock(&priv->mutex);
  1840. iwl_cancel_deferred_work(priv);
  1841. }
  1842. #define HW_READY_TIMEOUT (50)
  1843. /* Note: returns poll_bit return value, which is >= 0 if success */
  1844. static int iwl_set_hw_ready(struct iwl_priv *priv)
  1845. {
  1846. int ret;
  1847. iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
  1848. CSR_HW_IF_CONFIG_REG_BIT_NIC_READY);
  1849. /* See if we got it */
  1850. ret = iwl_poll_bit(priv, CSR_HW_IF_CONFIG_REG,
  1851. CSR_HW_IF_CONFIG_REG_BIT_NIC_READY,
  1852. CSR_HW_IF_CONFIG_REG_BIT_NIC_READY,
  1853. HW_READY_TIMEOUT);
  1854. IWL_DEBUG_INFO(priv, "hardware%s ready\n", ret < 0 ? " not" : "");
  1855. return ret;
  1856. }
  1857. /* Note: returns standard 0/-ERROR code */
  1858. int iwl_prepare_card_hw(struct iwl_priv *priv)
  1859. {
  1860. int ret;
  1861. IWL_DEBUG_INFO(priv, "iwl_prepare_card_hw enter\n");
  1862. ret = iwl_set_hw_ready(priv);
  1863. if (ret >= 0)
  1864. return 0;
  1865. /* If HW is not ready, prepare the conditions to check again */
  1866. iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
  1867. CSR_HW_IF_CONFIG_REG_PREPARE);
  1868. ret = iwl_poll_bit(priv, CSR_HW_IF_CONFIG_REG,
  1869. ~CSR_HW_IF_CONFIG_REG_BIT_NIC_PREPARE_DONE,
  1870. CSR_HW_IF_CONFIG_REG_BIT_NIC_PREPARE_DONE, 150000);
  1871. if (ret < 0)
  1872. return ret;
  1873. /* HW should be ready by now, check again. */
  1874. ret = iwl_set_hw_ready(priv);
  1875. if (ret >= 0)
  1876. return 0;
  1877. return ret;
  1878. }
  1879. #define MAX_HW_RESTARTS 5
  1880. static int __iwl_up(struct iwl_priv *priv)
  1881. {
  1882. struct iwl_rxon_context *ctx;
  1883. int ret;
  1884. lockdep_assert_held(&priv->mutex);
  1885. if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  1886. IWL_WARN(priv, "Exit pending; will not bring the NIC up\n");
  1887. return -EIO;
  1888. }
  1889. for_each_context(priv, ctx) {
  1890. ret = iwlagn_alloc_bcast_station(priv, ctx);
  1891. if (ret) {
  1892. iwl_dealloc_bcast_stations(priv);
  1893. return ret;
  1894. }
  1895. }
  1896. ret = iwlagn_run_init_ucode(priv);
  1897. if (ret) {
  1898. IWL_ERR(priv, "Failed to run INIT ucode: %d\n", ret);
  1899. goto error;
  1900. }
  1901. ret = iwlagn_load_ucode_wait_alive(priv,
  1902. &priv->ucode_rt,
  1903. IWL_UCODE_REGULAR);
  1904. if (ret) {
  1905. IWL_ERR(priv, "Failed to start RT ucode: %d\n", ret);
  1906. goto error;
  1907. }
  1908. ret = iwl_alive_start(priv);
  1909. if (ret)
  1910. goto error;
  1911. return 0;
  1912. error:
  1913. set_bit(STATUS_EXIT_PENDING, &priv->status);
  1914. __iwl_down(priv);
  1915. clear_bit(STATUS_EXIT_PENDING, &priv->status);
  1916. IWL_ERR(priv, "Unable to initialize device.\n");
  1917. return ret;
  1918. }
  1919. /*****************************************************************************
  1920. *
  1921. * Workqueue callbacks
  1922. *
  1923. *****************************************************************************/
  1924. static void iwl_bg_run_time_calib_work(struct work_struct *work)
  1925. {
  1926. struct iwl_priv *priv = container_of(work, struct iwl_priv,
  1927. run_time_calib_work);
  1928. mutex_lock(&priv->mutex);
  1929. if (test_bit(STATUS_EXIT_PENDING, &priv->status) ||
  1930. test_bit(STATUS_SCANNING, &priv->status)) {
  1931. mutex_unlock(&priv->mutex);
  1932. return;
  1933. }
  1934. if (priv->start_calib) {
  1935. iwl_chain_noise_calibration(priv);
  1936. iwl_sensitivity_calibration(priv);
  1937. }
  1938. mutex_unlock(&priv->mutex);
  1939. }
  1940. static void iwlagn_prepare_restart(struct iwl_priv *priv)
  1941. {
  1942. struct iwl_rxon_context *ctx;
  1943. bool bt_full_concurrent;
  1944. u8 bt_ci_compliance;
  1945. u8 bt_load;
  1946. u8 bt_status;
  1947. lockdep_assert_held(&priv->mutex);
  1948. for_each_context(priv, ctx)
  1949. ctx->vif = NULL;
  1950. priv->is_open = 0;
  1951. /*
  1952. * __iwl_down() will clear the BT status variables,
  1953. * which is correct, but when we restart we really
  1954. * want to keep them so restore them afterwards.
  1955. *
  1956. * The restart process will later pick them up and
  1957. * re-configure the hw when we reconfigure the BT
  1958. * command.
  1959. */
  1960. bt_full_concurrent = priv->bt_full_concurrent;
  1961. bt_ci_compliance = priv->bt_ci_compliance;
  1962. bt_load = priv->bt_traffic_load;
  1963. bt_status = priv->bt_status;
  1964. __iwl_down(priv);
  1965. priv->bt_full_concurrent = bt_full_concurrent;
  1966. priv->bt_ci_compliance = bt_ci_compliance;
  1967. priv->bt_traffic_load = bt_load;
  1968. priv->bt_status = bt_status;
  1969. }
  1970. static void iwl_bg_restart(struct work_struct *data)
  1971. {
  1972. struct iwl_priv *priv = container_of(data, struct iwl_priv, restart);
  1973. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  1974. return;
  1975. if (test_and_clear_bit(STATUS_FW_ERROR, &priv->status)) {
  1976. mutex_lock(&priv->mutex);
  1977. iwlagn_prepare_restart(priv);
  1978. mutex_unlock(&priv->mutex);
  1979. iwl_cancel_deferred_work(priv);
  1980. ieee80211_restart_hw(priv->hw);
  1981. } else {
  1982. WARN_ON(1);
  1983. }
  1984. }
  1985. static void iwl_bg_rx_replenish(struct work_struct *data)
  1986. {
  1987. struct iwl_priv *priv =
  1988. container_of(data, struct iwl_priv, rx_replenish);
  1989. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  1990. return;
  1991. mutex_lock(&priv->mutex);
  1992. iwlagn_rx_replenish(priv);
  1993. mutex_unlock(&priv->mutex);
  1994. }
  1995. static int iwl_mac_offchannel_tx(struct ieee80211_hw *hw, struct sk_buff *skb,
  1996. struct ieee80211_channel *chan,
  1997. enum nl80211_channel_type channel_type,
  1998. unsigned int wait)
  1999. {
  2000. struct iwl_priv *priv = hw->priv;
  2001. int ret;
  2002. /* Not supported if we don't have PAN */
  2003. if (!(priv->valid_contexts & BIT(IWL_RXON_CTX_PAN))) {
  2004. ret = -EOPNOTSUPP;
  2005. goto free;
  2006. }
  2007. /* Not supported on pre-P2P firmware */
  2008. if (!(priv->contexts[IWL_RXON_CTX_PAN].interface_modes &
  2009. BIT(NL80211_IFTYPE_P2P_CLIENT))) {
  2010. ret = -EOPNOTSUPP;
  2011. goto free;
  2012. }
  2013. mutex_lock(&priv->mutex);
  2014. if (!priv->contexts[IWL_RXON_CTX_PAN].is_active) {
  2015. /*
  2016. * If the PAN context is free, use the normal
  2017. * way of doing remain-on-channel offload + TX.
  2018. */
  2019. ret = 1;
  2020. goto out;
  2021. }
  2022. /* TODO: queue up if scanning? */
  2023. if (test_bit(STATUS_SCANNING, &priv->status) ||
  2024. priv->_agn.offchan_tx_skb) {
  2025. ret = -EBUSY;
  2026. goto out;
  2027. }
  2028. /*
  2029. * max_scan_ie_len doesn't include the blank SSID or the header,
  2030. * so need to add that again here.
  2031. */
  2032. if (skb->len > hw->wiphy->max_scan_ie_len + 24 + 2) {
  2033. ret = -ENOBUFS;
  2034. goto out;
  2035. }
  2036. priv->_agn.offchan_tx_skb = skb;
  2037. priv->_agn.offchan_tx_timeout = wait;
  2038. priv->_agn.offchan_tx_chan = chan;
  2039. ret = iwl_scan_initiate(priv, priv->contexts[IWL_RXON_CTX_PAN].vif,
  2040. IWL_SCAN_OFFCH_TX, chan->band);
  2041. if (ret)
  2042. priv->_agn.offchan_tx_skb = NULL;
  2043. out:
  2044. mutex_unlock(&priv->mutex);
  2045. free:
  2046. if (ret < 0)
  2047. kfree_skb(skb);
  2048. return ret;
  2049. }
  2050. static int iwl_mac_offchannel_tx_cancel_wait(struct ieee80211_hw *hw)
  2051. {
  2052. struct iwl_priv *priv = hw->priv;
  2053. int ret;
  2054. mutex_lock(&priv->mutex);
  2055. if (!priv->_agn.offchan_tx_skb) {
  2056. ret = -EINVAL;
  2057. goto unlock;
  2058. }
  2059. priv->_agn.offchan_tx_skb = NULL;
  2060. ret = iwl_scan_cancel_timeout(priv, 200);
  2061. if (ret)
  2062. ret = -EIO;
  2063. unlock:
  2064. mutex_unlock(&priv->mutex);
  2065. return ret;
  2066. }
  2067. /*****************************************************************************
  2068. *
  2069. * mac80211 entry point functions
  2070. *
  2071. *****************************************************************************/
  2072. static const struct ieee80211_iface_limit iwlagn_sta_ap_limits[] = {
  2073. {
  2074. .max = 1,
  2075. .types = BIT(NL80211_IFTYPE_STATION),
  2076. },
  2077. {
  2078. .max = 1,
  2079. .types = BIT(NL80211_IFTYPE_AP),
  2080. },
  2081. };
  2082. static const struct ieee80211_iface_limit iwlagn_2sta_limits[] = {
  2083. {
  2084. .max = 2,
  2085. .types = BIT(NL80211_IFTYPE_STATION),
  2086. },
  2087. };
  2088. static const struct ieee80211_iface_limit iwlagn_p2p_sta_go_limits[] = {
  2089. {
  2090. .max = 1,
  2091. .types = BIT(NL80211_IFTYPE_STATION),
  2092. },
  2093. {
  2094. .max = 1,
  2095. .types = BIT(NL80211_IFTYPE_P2P_GO) |
  2096. BIT(NL80211_IFTYPE_AP),
  2097. },
  2098. };
  2099. static const struct ieee80211_iface_limit iwlagn_p2p_2sta_limits[] = {
  2100. {
  2101. .max = 2,
  2102. .types = BIT(NL80211_IFTYPE_STATION),
  2103. },
  2104. {
  2105. .max = 1,
  2106. .types = BIT(NL80211_IFTYPE_P2P_CLIENT),
  2107. },
  2108. };
  2109. static const struct ieee80211_iface_combination
  2110. iwlagn_iface_combinations_dualmode[] = {
  2111. { .num_different_channels = 1,
  2112. .max_interfaces = 2,
  2113. .beacon_int_infra_match = true,
  2114. .limits = iwlagn_sta_ap_limits,
  2115. .n_limits = ARRAY_SIZE(iwlagn_sta_ap_limits),
  2116. },
  2117. { .num_different_channels = 1,
  2118. .max_interfaces = 2,
  2119. .limits = iwlagn_2sta_limits,
  2120. .n_limits = ARRAY_SIZE(iwlagn_2sta_limits),
  2121. },
  2122. };
  2123. static const struct ieee80211_iface_combination
  2124. iwlagn_iface_combinations_p2p[] = {
  2125. { .num_different_channels = 1,
  2126. .max_interfaces = 2,
  2127. .beacon_int_infra_match = true,
  2128. .limits = iwlagn_p2p_sta_go_limits,
  2129. .n_limits = ARRAY_SIZE(iwlagn_p2p_sta_go_limits),
  2130. },
  2131. { .num_different_channels = 1,
  2132. .max_interfaces = 2,
  2133. .limits = iwlagn_p2p_2sta_limits,
  2134. .n_limits = ARRAY_SIZE(iwlagn_p2p_2sta_limits),
  2135. },
  2136. };
  2137. /*
  2138. * Not a mac80211 entry point function, but it fits in with all the
  2139. * other mac80211 functions grouped here.
  2140. */
  2141. static int iwl_mac_setup_register(struct iwl_priv *priv,
  2142. struct iwlagn_ucode_capabilities *capa)
  2143. {
  2144. int ret;
  2145. struct ieee80211_hw *hw = priv->hw;
  2146. struct iwl_rxon_context *ctx;
  2147. hw->rate_control_algorithm = "iwl-agn-rs";
  2148. /* Tell mac80211 our characteristics */
  2149. hw->flags = IEEE80211_HW_SIGNAL_DBM |
  2150. IEEE80211_HW_AMPDU_AGGREGATION |
  2151. IEEE80211_HW_NEED_DTIM_PERIOD |
  2152. IEEE80211_HW_SPECTRUM_MGMT |
  2153. IEEE80211_HW_REPORTS_TX_ACK_STATUS;
  2154. hw->max_tx_aggregation_subframes = LINK_QUAL_AGG_FRAME_LIMIT_DEF;
  2155. hw->flags |= IEEE80211_HW_SUPPORTS_PS |
  2156. IEEE80211_HW_SUPPORTS_DYNAMIC_PS;
  2157. if (priv->cfg->sku & EEPROM_SKU_CAP_11N_ENABLE)
  2158. hw->flags |= IEEE80211_HW_SUPPORTS_DYNAMIC_SMPS |
  2159. IEEE80211_HW_SUPPORTS_STATIC_SMPS;
  2160. if (capa->flags & IWL_UCODE_TLV_FLAGS_MFP)
  2161. hw->flags |= IEEE80211_HW_MFP_CAPABLE;
  2162. hw->sta_data_size = sizeof(struct iwl_station_priv);
  2163. hw->vif_data_size = sizeof(struct iwl_vif_priv);
  2164. for_each_context(priv, ctx) {
  2165. hw->wiphy->interface_modes |= ctx->interface_modes;
  2166. hw->wiphy->interface_modes |= ctx->exclusive_interface_modes;
  2167. }
  2168. BUILD_BUG_ON(NUM_IWL_RXON_CTX != 2);
  2169. if (hw->wiphy->interface_modes & BIT(NL80211_IFTYPE_P2P_CLIENT)) {
  2170. hw->wiphy->iface_combinations = iwlagn_iface_combinations_p2p;
  2171. hw->wiphy->n_iface_combinations =
  2172. ARRAY_SIZE(iwlagn_iface_combinations_p2p);
  2173. } else if (hw->wiphy->interface_modes & BIT(NL80211_IFTYPE_AP)) {
  2174. hw->wiphy->iface_combinations = iwlagn_iface_combinations_dualmode;
  2175. hw->wiphy->n_iface_combinations =
  2176. ARRAY_SIZE(iwlagn_iface_combinations_dualmode);
  2177. }
  2178. hw->wiphy->max_remain_on_channel_duration = 1000;
  2179. hw->wiphy->flags |= WIPHY_FLAG_CUSTOM_REGULATORY |
  2180. WIPHY_FLAG_DISABLE_BEACON_HINTS |
  2181. WIPHY_FLAG_IBSS_RSN;
  2182. if (iwlagn_mod_params.power_save)
  2183. hw->wiphy->flags |= WIPHY_FLAG_PS_ON_BY_DEFAULT;
  2184. else
  2185. hw->wiphy->flags &= ~WIPHY_FLAG_PS_ON_BY_DEFAULT;
  2186. hw->wiphy->max_scan_ssids = PROBE_OPTION_MAX;
  2187. /* we create the 802.11 header and a zero-length SSID element */
  2188. hw->wiphy->max_scan_ie_len = capa->max_probe_length - 24 - 2;
  2189. /* Default value; 4 EDCA QOS priorities */
  2190. hw->queues = 4;
  2191. hw->max_listen_interval = IWL_CONN_MAX_LISTEN_INTERVAL;
  2192. if (priv->bands[IEEE80211_BAND_2GHZ].n_channels)
  2193. priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
  2194. &priv->bands[IEEE80211_BAND_2GHZ];
  2195. if (priv->bands[IEEE80211_BAND_5GHZ].n_channels)
  2196. priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
  2197. &priv->bands[IEEE80211_BAND_5GHZ];
  2198. iwl_leds_init(priv);
  2199. ret = ieee80211_register_hw(priv->hw);
  2200. if (ret) {
  2201. IWL_ERR(priv, "Failed to register hw (error %d)\n", ret);
  2202. return ret;
  2203. }
  2204. priv->mac80211_registered = 1;
  2205. return 0;
  2206. }
  2207. static int iwlagn_mac_start(struct ieee80211_hw *hw)
  2208. {
  2209. struct iwl_priv *priv = hw->priv;
  2210. int ret;
  2211. IWL_DEBUG_MAC80211(priv, "enter\n");
  2212. /* we should be verifying the device is ready to be opened */
  2213. mutex_lock(&priv->mutex);
  2214. ret = __iwl_up(priv);
  2215. mutex_unlock(&priv->mutex);
  2216. if (ret)
  2217. return ret;
  2218. IWL_DEBUG_INFO(priv, "Start UP work done.\n");
  2219. /* Now we should be done, and the READY bit should be set. */
  2220. if (WARN_ON(!test_bit(STATUS_READY, &priv->status)))
  2221. ret = -EIO;
  2222. iwlagn_led_enable(priv);
  2223. priv->is_open = 1;
  2224. IWL_DEBUG_MAC80211(priv, "leave\n");
  2225. return 0;
  2226. }
  2227. static void iwlagn_mac_stop(struct ieee80211_hw *hw)
  2228. {
  2229. struct iwl_priv *priv = hw->priv;
  2230. IWL_DEBUG_MAC80211(priv, "enter\n");
  2231. if (!priv->is_open)
  2232. return;
  2233. priv->is_open = 0;
  2234. iwl_down(priv);
  2235. flush_workqueue(priv->workqueue);
  2236. /* User space software may expect getting rfkill changes
  2237. * even if interface is down */
  2238. iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
  2239. iwl_enable_rfkill_int(priv);
  2240. IWL_DEBUG_MAC80211(priv, "leave\n");
  2241. }
  2242. static void iwlagn_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
  2243. {
  2244. struct iwl_priv *priv = hw->priv;
  2245. IWL_DEBUG_MACDUMP(priv, "enter\n");
  2246. IWL_DEBUG_TX(priv, "dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
  2247. ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate);
  2248. if (iwlagn_tx_skb(priv, skb))
  2249. dev_kfree_skb_any(skb);
  2250. IWL_DEBUG_MACDUMP(priv, "leave\n");
  2251. }
  2252. static void iwlagn_mac_update_tkip_key(struct ieee80211_hw *hw,
  2253. struct ieee80211_vif *vif,
  2254. struct ieee80211_key_conf *keyconf,
  2255. struct ieee80211_sta *sta,
  2256. u32 iv32, u16 *phase1key)
  2257. {
  2258. struct iwl_priv *priv = hw->priv;
  2259. struct iwl_vif_priv *vif_priv = (void *)vif->drv_priv;
  2260. IWL_DEBUG_MAC80211(priv, "enter\n");
  2261. iwl_update_tkip_key(priv, vif_priv->ctx, keyconf, sta,
  2262. iv32, phase1key);
  2263. IWL_DEBUG_MAC80211(priv, "leave\n");
  2264. }
  2265. static int iwlagn_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
  2266. struct ieee80211_vif *vif,
  2267. struct ieee80211_sta *sta,
  2268. struct ieee80211_key_conf *key)
  2269. {
  2270. struct iwl_priv *priv = hw->priv;
  2271. struct iwl_vif_priv *vif_priv = (void *)vif->drv_priv;
  2272. struct iwl_rxon_context *ctx = vif_priv->ctx;
  2273. int ret;
  2274. u8 sta_id;
  2275. bool is_default_wep_key = false;
  2276. IWL_DEBUG_MAC80211(priv, "enter\n");
  2277. if (iwlagn_mod_params.sw_crypto) {
  2278. IWL_DEBUG_MAC80211(priv, "leave - hwcrypto disabled\n");
  2279. return -EOPNOTSUPP;
  2280. }
  2281. /*
  2282. * To support IBSS RSN, don't program group keys in IBSS, the
  2283. * hardware will then not attempt to decrypt the frames.
  2284. */
  2285. if (vif->type == NL80211_IFTYPE_ADHOC &&
  2286. !(key->flags & IEEE80211_KEY_FLAG_PAIRWISE))
  2287. return -EOPNOTSUPP;
  2288. sta_id = iwl_sta_id_or_broadcast(priv, vif_priv->ctx, sta);
  2289. if (sta_id == IWL_INVALID_STATION)
  2290. return -EINVAL;
  2291. mutex_lock(&priv->mutex);
  2292. iwl_scan_cancel_timeout(priv, 100);
  2293. /*
  2294. * If we are getting WEP group key and we didn't receive any key mapping
  2295. * so far, we are in legacy wep mode (group key only), otherwise we are
  2296. * in 1X mode.
  2297. * In legacy wep mode, we use another host command to the uCode.
  2298. */
  2299. if ((key->cipher == WLAN_CIPHER_SUITE_WEP40 ||
  2300. key->cipher == WLAN_CIPHER_SUITE_WEP104) &&
  2301. !sta) {
  2302. if (cmd == SET_KEY)
  2303. is_default_wep_key = !ctx->key_mapping_keys;
  2304. else
  2305. is_default_wep_key =
  2306. (key->hw_key_idx == HW_KEY_DEFAULT);
  2307. }
  2308. switch (cmd) {
  2309. case SET_KEY:
  2310. if (is_default_wep_key)
  2311. ret = iwl_set_default_wep_key(priv, vif_priv->ctx, key);
  2312. else
  2313. ret = iwl_set_dynamic_key(priv, vif_priv->ctx,
  2314. key, sta_id);
  2315. IWL_DEBUG_MAC80211(priv, "enable hwcrypto key\n");
  2316. break;
  2317. case DISABLE_KEY:
  2318. if (is_default_wep_key)
  2319. ret = iwl_remove_default_wep_key(priv, ctx, key);
  2320. else
  2321. ret = iwl_remove_dynamic_key(priv, ctx, key, sta_id);
  2322. IWL_DEBUG_MAC80211(priv, "disable hwcrypto key\n");
  2323. break;
  2324. default:
  2325. ret = -EINVAL;
  2326. }
  2327. mutex_unlock(&priv->mutex);
  2328. IWL_DEBUG_MAC80211(priv, "leave\n");
  2329. return ret;
  2330. }
  2331. static int iwlagn_mac_ampdu_action(struct ieee80211_hw *hw,
  2332. struct ieee80211_vif *vif,
  2333. enum ieee80211_ampdu_mlme_action action,
  2334. struct ieee80211_sta *sta, u16 tid, u16 *ssn,
  2335. u8 buf_size)
  2336. {
  2337. struct iwl_priv *priv = hw->priv;
  2338. int ret = -EINVAL;
  2339. struct iwl_station_priv *sta_priv = (void *) sta->drv_priv;
  2340. IWL_DEBUG_HT(priv, "A-MPDU action on addr %pM tid %d\n",
  2341. sta->addr, tid);
  2342. if (!(priv->cfg->sku & EEPROM_SKU_CAP_11N_ENABLE))
  2343. return -EACCES;
  2344. mutex_lock(&priv->mutex);
  2345. switch (action) {
  2346. case IEEE80211_AMPDU_RX_START:
  2347. IWL_DEBUG_HT(priv, "start Rx\n");
  2348. ret = iwl_sta_rx_agg_start(priv, sta, tid, *ssn);
  2349. break;
  2350. case IEEE80211_AMPDU_RX_STOP:
  2351. IWL_DEBUG_HT(priv, "stop Rx\n");
  2352. ret = iwl_sta_rx_agg_stop(priv, sta, tid);
  2353. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2354. ret = 0;
  2355. break;
  2356. case IEEE80211_AMPDU_TX_START:
  2357. IWL_DEBUG_HT(priv, "start Tx\n");
  2358. ret = iwlagn_tx_agg_start(priv, vif, sta, tid, ssn);
  2359. if (ret == 0) {
  2360. priv->_agn.agg_tids_count++;
  2361. IWL_DEBUG_HT(priv, "priv->_agn.agg_tids_count = %u\n",
  2362. priv->_agn.agg_tids_count);
  2363. }
  2364. break;
  2365. case IEEE80211_AMPDU_TX_STOP:
  2366. IWL_DEBUG_HT(priv, "stop Tx\n");
  2367. ret = iwlagn_tx_agg_stop(priv, vif, sta, tid);
  2368. if ((ret == 0) && (priv->_agn.agg_tids_count > 0)) {
  2369. priv->_agn.agg_tids_count--;
  2370. IWL_DEBUG_HT(priv, "priv->_agn.agg_tids_count = %u\n",
  2371. priv->_agn.agg_tids_count);
  2372. }
  2373. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2374. ret = 0;
  2375. if (priv->cfg->ht_params &&
  2376. priv->cfg->ht_params->use_rts_for_aggregation) {
  2377. /*
  2378. * switch off RTS/CTS if it was previously enabled
  2379. */
  2380. sta_priv->lq_sta.lq.general_params.flags &=
  2381. ~LINK_QUAL_FLAGS_SET_STA_TLC_RTS_MSK;
  2382. iwl_send_lq_cmd(priv, iwl_rxon_ctx_from_vif(vif),
  2383. &sta_priv->lq_sta.lq, CMD_ASYNC, false);
  2384. }
  2385. break;
  2386. case IEEE80211_AMPDU_TX_OPERATIONAL:
  2387. buf_size = min_t(int, buf_size, LINK_QUAL_AGG_FRAME_LIMIT_DEF);
  2388. iwlagn_txq_agg_queue_setup(priv, sta, tid, buf_size);
  2389. /*
  2390. * If the limit is 0, then it wasn't initialised yet,
  2391. * use the default. We can do that since we take the
  2392. * minimum below, and we don't want to go above our
  2393. * default due to hardware restrictions.
  2394. */
  2395. if (sta_priv->max_agg_bufsize == 0)
  2396. sta_priv->max_agg_bufsize =
  2397. LINK_QUAL_AGG_FRAME_LIMIT_DEF;
  2398. /*
  2399. * Even though in theory the peer could have different
  2400. * aggregation reorder buffer sizes for different sessions,
  2401. * our ucode doesn't allow for that and has a global limit
  2402. * for each station. Therefore, use the minimum of all the
  2403. * aggregation sessions and our default value.
  2404. */
  2405. sta_priv->max_agg_bufsize =
  2406. min(sta_priv->max_agg_bufsize, buf_size);
  2407. if (priv->cfg->ht_params &&
  2408. priv->cfg->ht_params->use_rts_for_aggregation) {
  2409. /*
  2410. * switch to RTS/CTS if it is the prefer protection
  2411. * method for HT traffic
  2412. */
  2413. sta_priv->lq_sta.lq.general_params.flags |=
  2414. LINK_QUAL_FLAGS_SET_STA_TLC_RTS_MSK;
  2415. }
  2416. sta_priv->lq_sta.lq.agg_params.agg_frame_cnt_limit =
  2417. sta_priv->max_agg_bufsize;
  2418. iwl_send_lq_cmd(priv, iwl_rxon_ctx_from_vif(vif),
  2419. &sta_priv->lq_sta.lq, CMD_ASYNC, false);
  2420. IWL_INFO(priv, "Tx aggregation enabled on ra = %pM tid = %d\n",
  2421. sta->addr, tid);
  2422. ret = 0;
  2423. break;
  2424. }
  2425. mutex_unlock(&priv->mutex);
  2426. return ret;
  2427. }
  2428. static int iwlagn_mac_sta_add(struct ieee80211_hw *hw,
  2429. struct ieee80211_vif *vif,
  2430. struct ieee80211_sta *sta)
  2431. {
  2432. struct iwl_priv *priv = hw->priv;
  2433. struct iwl_station_priv *sta_priv = (void *)sta->drv_priv;
  2434. struct iwl_vif_priv *vif_priv = (void *)vif->drv_priv;
  2435. bool is_ap = vif->type == NL80211_IFTYPE_STATION;
  2436. int ret;
  2437. u8 sta_id;
  2438. IWL_DEBUG_INFO(priv, "received request to add station %pM\n",
  2439. sta->addr);
  2440. mutex_lock(&priv->mutex);
  2441. IWL_DEBUG_INFO(priv, "proceeding to add station %pM\n",
  2442. sta->addr);
  2443. sta_priv->common.sta_id = IWL_INVALID_STATION;
  2444. atomic_set(&sta_priv->pending_frames, 0);
  2445. if (vif->type == NL80211_IFTYPE_AP)
  2446. sta_priv->client = true;
  2447. ret = iwl_add_station_common(priv, vif_priv->ctx, sta->addr,
  2448. is_ap, sta, &sta_id);
  2449. if (ret) {
  2450. IWL_ERR(priv, "Unable to add station %pM (%d)\n",
  2451. sta->addr, ret);
  2452. /* Should we return success if return code is EEXIST ? */
  2453. mutex_unlock(&priv->mutex);
  2454. return ret;
  2455. }
  2456. sta_priv->common.sta_id = sta_id;
  2457. /* Initialize rate scaling */
  2458. IWL_DEBUG_INFO(priv, "Initializing rate scaling for station %pM\n",
  2459. sta->addr);
  2460. iwl_rs_rate_init(priv, sta, sta_id);
  2461. mutex_unlock(&priv->mutex);
  2462. return 0;
  2463. }
  2464. static void iwlagn_mac_channel_switch(struct ieee80211_hw *hw,
  2465. struct ieee80211_channel_switch *ch_switch)
  2466. {
  2467. struct iwl_priv *priv = hw->priv;
  2468. const struct iwl_channel_info *ch_info;
  2469. struct ieee80211_conf *conf = &hw->conf;
  2470. struct ieee80211_channel *channel = ch_switch->channel;
  2471. struct iwl_ht_config *ht_conf = &priv->current_ht_config;
  2472. /*
  2473. * MULTI-FIXME
  2474. * When we add support for multiple interfaces, we need to
  2475. * revisit this. The channel switch command in the device
  2476. * only affects the BSS context, but what does that really
  2477. * mean? And what if we get a CSA on the second interface?
  2478. * This needs a lot of work.
  2479. */
  2480. struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_BSS];
  2481. u16 ch;
  2482. IWL_DEBUG_MAC80211(priv, "enter\n");
  2483. mutex_lock(&priv->mutex);
  2484. if (iwl_is_rfkill(priv))
  2485. goto out;
  2486. if (test_bit(STATUS_EXIT_PENDING, &priv->status) ||
  2487. test_bit(STATUS_SCANNING, &priv->status) ||
  2488. test_bit(STATUS_CHANNEL_SWITCH_PENDING, &priv->status))
  2489. goto out;
  2490. if (!iwl_is_associated_ctx(ctx))
  2491. goto out;
  2492. if (!priv->cfg->ops->lib->set_channel_switch)
  2493. goto out;
  2494. ch = channel->hw_value;
  2495. if (le16_to_cpu(ctx->active.channel) == ch)
  2496. goto out;
  2497. ch_info = iwl_get_channel_info(priv, channel->band, ch);
  2498. if (!is_channel_valid(ch_info)) {
  2499. IWL_DEBUG_MAC80211(priv, "invalid channel\n");
  2500. goto out;
  2501. }
  2502. spin_lock_irq(&priv->lock);
  2503. priv->current_ht_config.smps = conf->smps_mode;
  2504. /* Configure HT40 channels */
  2505. ctx->ht.enabled = conf_is_ht(conf);
  2506. if (ctx->ht.enabled) {
  2507. if (conf_is_ht40_minus(conf)) {
  2508. ctx->ht.extension_chan_offset =
  2509. IEEE80211_HT_PARAM_CHA_SEC_BELOW;
  2510. ctx->ht.is_40mhz = true;
  2511. } else if (conf_is_ht40_plus(conf)) {
  2512. ctx->ht.extension_chan_offset =
  2513. IEEE80211_HT_PARAM_CHA_SEC_ABOVE;
  2514. ctx->ht.is_40mhz = true;
  2515. } else {
  2516. ctx->ht.extension_chan_offset =
  2517. IEEE80211_HT_PARAM_CHA_SEC_NONE;
  2518. ctx->ht.is_40mhz = false;
  2519. }
  2520. } else
  2521. ctx->ht.is_40mhz = false;
  2522. if ((le16_to_cpu(ctx->staging.channel) != ch))
  2523. ctx->staging.flags = 0;
  2524. iwl_set_rxon_channel(priv, channel, ctx);
  2525. iwl_set_rxon_ht(priv, ht_conf);
  2526. iwl_set_flags_for_band(priv, ctx, channel->band, ctx->vif);
  2527. spin_unlock_irq(&priv->lock);
  2528. iwl_set_rate(priv);
  2529. /*
  2530. * at this point, staging_rxon has the
  2531. * configuration for channel switch
  2532. */
  2533. set_bit(STATUS_CHANNEL_SWITCH_PENDING, &priv->status);
  2534. priv->switch_channel = cpu_to_le16(ch);
  2535. if (priv->cfg->ops->lib->set_channel_switch(priv, ch_switch)) {
  2536. clear_bit(STATUS_CHANNEL_SWITCH_PENDING, &priv->status);
  2537. priv->switch_channel = 0;
  2538. ieee80211_chswitch_done(ctx->vif, false);
  2539. }
  2540. out:
  2541. mutex_unlock(&priv->mutex);
  2542. IWL_DEBUG_MAC80211(priv, "leave\n");
  2543. }
  2544. static void iwlagn_configure_filter(struct ieee80211_hw *hw,
  2545. unsigned int changed_flags,
  2546. unsigned int *total_flags,
  2547. u64 multicast)
  2548. {
  2549. struct iwl_priv *priv = hw->priv;
  2550. __le32 filter_or = 0, filter_nand = 0;
  2551. struct iwl_rxon_context *ctx;
  2552. #define CHK(test, flag) do { \
  2553. if (*total_flags & (test)) \
  2554. filter_or |= (flag); \
  2555. else \
  2556. filter_nand |= (flag); \
  2557. } while (0)
  2558. IWL_DEBUG_MAC80211(priv, "Enter: changed: 0x%x, total: 0x%x\n",
  2559. changed_flags, *total_flags);
  2560. CHK(FIF_OTHER_BSS | FIF_PROMISC_IN_BSS, RXON_FILTER_PROMISC_MSK);
  2561. /* Setting _just_ RXON_FILTER_CTL2HOST_MSK causes FH errors */
  2562. CHK(FIF_CONTROL, RXON_FILTER_CTL2HOST_MSK | RXON_FILTER_PROMISC_MSK);
  2563. CHK(FIF_BCN_PRBRESP_PROMISC, RXON_FILTER_BCON_AWARE_MSK);
  2564. #undef CHK
  2565. mutex_lock(&priv->mutex);
  2566. for_each_context(priv, ctx) {
  2567. ctx->staging.filter_flags &= ~filter_nand;
  2568. ctx->staging.filter_flags |= filter_or;
  2569. /*
  2570. * Not committing directly because hardware can perform a scan,
  2571. * but we'll eventually commit the filter flags change anyway.
  2572. */
  2573. }
  2574. mutex_unlock(&priv->mutex);
  2575. /*
  2576. * Receiving all multicast frames is always enabled by the
  2577. * default flags setup in iwl_connection_init_rx_config()
  2578. * since we currently do not support programming multicast
  2579. * filters into the device.
  2580. */
  2581. *total_flags &= FIF_OTHER_BSS | FIF_ALLMULTI | FIF_PROMISC_IN_BSS |
  2582. FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL;
  2583. }
  2584. static void iwlagn_mac_flush(struct ieee80211_hw *hw, bool drop)
  2585. {
  2586. struct iwl_priv *priv = hw->priv;
  2587. mutex_lock(&priv->mutex);
  2588. IWL_DEBUG_MAC80211(priv, "enter\n");
  2589. if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  2590. IWL_DEBUG_TX(priv, "Aborting flush due to device shutdown\n");
  2591. goto done;
  2592. }
  2593. if (iwl_is_rfkill(priv)) {
  2594. IWL_DEBUG_TX(priv, "Aborting flush due to RF Kill\n");
  2595. goto done;
  2596. }
  2597. /*
  2598. * mac80211 will not push any more frames for transmit
  2599. * until the flush is completed
  2600. */
  2601. if (drop) {
  2602. IWL_DEBUG_MAC80211(priv, "send flush command\n");
  2603. if (iwlagn_txfifo_flush(priv, IWL_DROP_ALL)) {
  2604. IWL_ERR(priv, "flush request fail\n");
  2605. goto done;
  2606. }
  2607. }
  2608. IWL_DEBUG_MAC80211(priv, "wait transmit/flush all frames\n");
  2609. iwlagn_wait_tx_queue_empty(priv);
  2610. done:
  2611. mutex_unlock(&priv->mutex);
  2612. IWL_DEBUG_MAC80211(priv, "leave\n");
  2613. }
  2614. static void iwlagn_disable_roc(struct iwl_priv *priv)
  2615. {
  2616. struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_PAN];
  2617. struct ieee80211_channel *chan = ACCESS_ONCE(priv->hw->conf.channel);
  2618. lockdep_assert_held(&priv->mutex);
  2619. if (!ctx->is_active)
  2620. return;
  2621. ctx->staging.dev_type = RXON_DEV_TYPE_2STA;
  2622. ctx->staging.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  2623. iwl_set_rxon_channel(priv, chan, ctx);
  2624. iwl_set_flags_for_band(priv, ctx, chan->band, NULL);
  2625. priv->_agn.hw_roc_channel = NULL;
  2626. iwlagn_commit_rxon(priv, ctx);
  2627. ctx->is_active = false;
  2628. }
  2629. static void iwlagn_bg_roc_done(struct work_struct *work)
  2630. {
  2631. struct iwl_priv *priv = container_of(work, struct iwl_priv,
  2632. _agn.hw_roc_work.work);
  2633. mutex_lock(&priv->mutex);
  2634. ieee80211_remain_on_channel_expired(priv->hw);
  2635. iwlagn_disable_roc(priv);
  2636. mutex_unlock(&priv->mutex);
  2637. }
  2638. static int iwl_mac_remain_on_channel(struct ieee80211_hw *hw,
  2639. struct ieee80211_channel *channel,
  2640. enum nl80211_channel_type channel_type,
  2641. int duration)
  2642. {
  2643. struct iwl_priv *priv = hw->priv;
  2644. int err = 0;
  2645. if (!(priv->valid_contexts & BIT(IWL_RXON_CTX_PAN)))
  2646. return -EOPNOTSUPP;
  2647. if (!(priv->contexts[IWL_RXON_CTX_PAN].interface_modes &
  2648. BIT(NL80211_IFTYPE_P2P_CLIENT)))
  2649. return -EOPNOTSUPP;
  2650. mutex_lock(&priv->mutex);
  2651. if (priv->contexts[IWL_RXON_CTX_PAN].is_active ||
  2652. test_bit(STATUS_SCAN_HW, &priv->status)) {
  2653. err = -EBUSY;
  2654. goto out;
  2655. }
  2656. priv->contexts[IWL_RXON_CTX_PAN].is_active = true;
  2657. priv->_agn.hw_roc_channel = channel;
  2658. priv->_agn.hw_roc_chantype = channel_type;
  2659. priv->_agn.hw_roc_duration = DIV_ROUND_UP(duration * 1000, 1024);
  2660. iwlagn_commit_rxon(priv, &priv->contexts[IWL_RXON_CTX_PAN]);
  2661. queue_delayed_work(priv->workqueue, &priv->_agn.hw_roc_work,
  2662. msecs_to_jiffies(duration + 20));
  2663. msleep(IWL_MIN_SLOT_TIME); /* TU is almost ms */
  2664. ieee80211_ready_on_channel(priv->hw);
  2665. out:
  2666. mutex_unlock(&priv->mutex);
  2667. return err;
  2668. }
  2669. static int iwl_mac_cancel_remain_on_channel(struct ieee80211_hw *hw)
  2670. {
  2671. struct iwl_priv *priv = hw->priv;
  2672. if (!(priv->valid_contexts & BIT(IWL_RXON_CTX_PAN)))
  2673. return -EOPNOTSUPP;
  2674. cancel_delayed_work_sync(&priv->_agn.hw_roc_work);
  2675. mutex_lock(&priv->mutex);
  2676. iwlagn_disable_roc(priv);
  2677. mutex_unlock(&priv->mutex);
  2678. return 0;
  2679. }
  2680. /*****************************************************************************
  2681. *
  2682. * driver setup and teardown
  2683. *
  2684. *****************************************************************************/
  2685. static void iwl_setup_deferred_work(struct iwl_priv *priv)
  2686. {
  2687. priv->workqueue = create_singlethread_workqueue(DRV_NAME);
  2688. init_waitqueue_head(&priv->wait_command_queue);
  2689. INIT_WORK(&priv->restart, iwl_bg_restart);
  2690. INIT_WORK(&priv->rx_replenish, iwl_bg_rx_replenish);
  2691. INIT_WORK(&priv->beacon_update, iwl_bg_beacon_update);
  2692. INIT_WORK(&priv->run_time_calib_work, iwl_bg_run_time_calib_work);
  2693. INIT_WORK(&priv->tx_flush, iwl_bg_tx_flush);
  2694. INIT_WORK(&priv->bt_full_concurrency, iwl_bg_bt_full_concurrency);
  2695. INIT_WORK(&priv->bt_runtime_config, iwl_bg_bt_runtime_config);
  2696. INIT_DELAYED_WORK(&priv->_agn.hw_roc_work, iwlagn_bg_roc_done);
  2697. iwl_setup_scan_deferred_work(priv);
  2698. if (priv->cfg->ops->lib->setup_deferred_work)
  2699. priv->cfg->ops->lib->setup_deferred_work(priv);
  2700. init_timer(&priv->statistics_periodic);
  2701. priv->statistics_periodic.data = (unsigned long)priv;
  2702. priv->statistics_periodic.function = iwl_bg_statistics_periodic;
  2703. init_timer(&priv->ucode_trace);
  2704. priv->ucode_trace.data = (unsigned long)priv;
  2705. priv->ucode_trace.function = iwl_bg_ucode_trace;
  2706. init_timer(&priv->watchdog);
  2707. priv->watchdog.data = (unsigned long)priv;
  2708. priv->watchdog.function = iwl_bg_watchdog;
  2709. tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
  2710. iwl_irq_tasklet, (unsigned long)priv);
  2711. }
  2712. static void iwl_cancel_deferred_work(struct iwl_priv *priv)
  2713. {
  2714. if (priv->cfg->ops->lib->cancel_deferred_work)
  2715. priv->cfg->ops->lib->cancel_deferred_work(priv);
  2716. cancel_work_sync(&priv->run_time_calib_work);
  2717. cancel_work_sync(&priv->beacon_update);
  2718. iwl_cancel_scan_deferred_work(priv);
  2719. cancel_work_sync(&priv->bt_full_concurrency);
  2720. cancel_work_sync(&priv->bt_runtime_config);
  2721. del_timer_sync(&priv->statistics_periodic);
  2722. del_timer_sync(&priv->ucode_trace);
  2723. }
  2724. static void iwl_init_hw_rates(struct iwl_priv *priv,
  2725. struct ieee80211_rate *rates)
  2726. {
  2727. int i;
  2728. for (i = 0; i < IWL_RATE_COUNT_LEGACY; i++) {
  2729. rates[i].bitrate = iwl_rates[i].ieee * 5;
  2730. rates[i].hw_value = i; /* Rate scaling will work on indexes */
  2731. rates[i].hw_value_short = i;
  2732. rates[i].flags = 0;
  2733. if ((i >= IWL_FIRST_CCK_RATE) && (i <= IWL_LAST_CCK_RATE)) {
  2734. /*
  2735. * If CCK != 1M then set short preamble rate flag.
  2736. */
  2737. rates[i].flags |=
  2738. (iwl_rates[i].plcp == IWL_RATE_1M_PLCP) ?
  2739. 0 : IEEE80211_RATE_SHORT_PREAMBLE;
  2740. }
  2741. }
  2742. }
  2743. static int iwl_init_drv(struct iwl_priv *priv)
  2744. {
  2745. int ret;
  2746. spin_lock_init(&priv->sta_lock);
  2747. spin_lock_init(&priv->hcmd_lock);
  2748. mutex_init(&priv->mutex);
  2749. priv->ieee_channels = NULL;
  2750. priv->ieee_rates = NULL;
  2751. priv->band = IEEE80211_BAND_2GHZ;
  2752. priv->iw_mode = NL80211_IFTYPE_STATION;
  2753. priv->current_ht_config.smps = IEEE80211_SMPS_STATIC;
  2754. priv->missed_beacon_threshold = IWL_MISSED_BEACON_THRESHOLD_DEF;
  2755. priv->_agn.agg_tids_count = 0;
  2756. /* initialize force reset */
  2757. priv->force_reset[IWL_RF_RESET].reset_duration =
  2758. IWL_DELAY_NEXT_FORCE_RF_RESET;
  2759. priv->force_reset[IWL_FW_RESET].reset_duration =
  2760. IWL_DELAY_NEXT_FORCE_FW_RELOAD;
  2761. priv->rx_statistics_jiffies = jiffies;
  2762. /* Choose which receivers/antennas to use */
  2763. if (priv->cfg->ops->hcmd->set_rxon_chain)
  2764. priv->cfg->ops->hcmd->set_rxon_chain(priv,
  2765. &priv->contexts[IWL_RXON_CTX_BSS]);
  2766. iwl_init_scan_params(priv);
  2767. /* init bt coex */
  2768. if (priv->cfg->bt_params &&
  2769. priv->cfg->bt_params->advanced_bt_coexist) {
  2770. priv->kill_ack_mask = IWLAGN_BT_KILL_ACK_MASK_DEFAULT;
  2771. priv->kill_cts_mask = IWLAGN_BT_KILL_CTS_MASK_DEFAULT;
  2772. priv->bt_valid = IWLAGN_BT_ALL_VALID_MSK;
  2773. priv->bt_on_thresh = BT_ON_THRESHOLD_DEF;
  2774. priv->bt_duration = BT_DURATION_LIMIT_DEF;
  2775. priv->dynamic_frag_thresh = BT_FRAG_THRESHOLD_DEF;
  2776. }
  2777. ret = iwl_init_channel_map(priv);
  2778. if (ret) {
  2779. IWL_ERR(priv, "initializing regulatory failed: %d\n", ret);
  2780. goto err;
  2781. }
  2782. ret = iwlcore_init_geos(priv);
  2783. if (ret) {
  2784. IWL_ERR(priv, "initializing geos failed: %d\n", ret);
  2785. goto err_free_channel_map;
  2786. }
  2787. iwl_init_hw_rates(priv, priv->ieee_rates);
  2788. return 0;
  2789. err_free_channel_map:
  2790. iwl_free_channel_map(priv);
  2791. err:
  2792. return ret;
  2793. }
  2794. static void iwl_uninit_drv(struct iwl_priv *priv)
  2795. {
  2796. iwl_calib_free_results(priv);
  2797. iwlcore_free_geos(priv);
  2798. iwl_free_channel_map(priv);
  2799. kfree(priv->scan_cmd);
  2800. kfree(priv->beacon_cmd);
  2801. }
  2802. struct ieee80211_ops iwlagn_hw_ops = {
  2803. .tx = iwlagn_mac_tx,
  2804. .start = iwlagn_mac_start,
  2805. .stop = iwlagn_mac_stop,
  2806. .add_interface = iwl_mac_add_interface,
  2807. .remove_interface = iwl_mac_remove_interface,
  2808. .change_interface = iwl_mac_change_interface,
  2809. .config = iwlagn_mac_config,
  2810. .configure_filter = iwlagn_configure_filter,
  2811. .set_key = iwlagn_mac_set_key,
  2812. .update_tkip_key = iwlagn_mac_update_tkip_key,
  2813. .conf_tx = iwl_mac_conf_tx,
  2814. .bss_info_changed = iwlagn_bss_info_changed,
  2815. .ampdu_action = iwlagn_mac_ampdu_action,
  2816. .hw_scan = iwl_mac_hw_scan,
  2817. .sta_notify = iwlagn_mac_sta_notify,
  2818. .sta_add = iwlagn_mac_sta_add,
  2819. .sta_remove = iwl_mac_sta_remove,
  2820. .channel_switch = iwlagn_mac_channel_switch,
  2821. .flush = iwlagn_mac_flush,
  2822. .tx_last_beacon = iwl_mac_tx_last_beacon,
  2823. .remain_on_channel = iwl_mac_remain_on_channel,
  2824. .cancel_remain_on_channel = iwl_mac_cancel_remain_on_channel,
  2825. .offchannel_tx = iwl_mac_offchannel_tx,
  2826. .offchannel_tx_cancel_wait = iwl_mac_offchannel_tx_cancel_wait,
  2827. CFG80211_TESTMODE_CMD(iwl_testmode_cmd)
  2828. CFG80211_TESTMODE_DUMP(iwl_testmode_dump)
  2829. };
  2830. static u32 iwl_hw_detect(struct iwl_priv *priv)
  2831. {
  2832. return iwl_read32(priv, CSR_HW_REV);
  2833. }
  2834. static int iwl_set_hw_params(struct iwl_priv *priv)
  2835. {
  2836. priv->hw_params.max_rxq_size = RX_QUEUE_SIZE;
  2837. priv->hw_params.max_rxq_log = RX_QUEUE_SIZE_LOG;
  2838. if (iwlagn_mod_params.amsdu_size_8K)
  2839. priv->hw_params.rx_page_order = get_order(IWL_RX_BUF_SIZE_8K);
  2840. else
  2841. priv->hw_params.rx_page_order = get_order(IWL_RX_BUF_SIZE_4K);
  2842. priv->hw_params.max_beacon_itrvl = IWL_MAX_UCODE_BEACON_INTERVAL;
  2843. if (iwlagn_mod_params.disable_11n)
  2844. priv->cfg->sku &= ~EEPROM_SKU_CAP_11N_ENABLE;
  2845. /* Device-specific setup */
  2846. return priv->cfg->ops->lib->set_hw_params(priv);
  2847. }
  2848. static const u8 iwlagn_bss_ac_to_fifo[] = {
  2849. IWL_TX_FIFO_VO,
  2850. IWL_TX_FIFO_VI,
  2851. IWL_TX_FIFO_BE,
  2852. IWL_TX_FIFO_BK,
  2853. };
  2854. static const u8 iwlagn_bss_ac_to_queue[] = {
  2855. 0, 1, 2, 3,
  2856. };
  2857. static const u8 iwlagn_pan_ac_to_fifo[] = {
  2858. IWL_TX_FIFO_VO_IPAN,
  2859. IWL_TX_FIFO_VI_IPAN,
  2860. IWL_TX_FIFO_BE_IPAN,
  2861. IWL_TX_FIFO_BK_IPAN,
  2862. };
  2863. static const u8 iwlagn_pan_ac_to_queue[] = {
  2864. 7, 6, 5, 4,
  2865. };
  2866. /* This function both allocates and initializes hw and priv. */
  2867. static struct ieee80211_hw *iwl_alloc_all(struct iwl_cfg *cfg)
  2868. {
  2869. struct iwl_priv *priv;
  2870. /* mac80211 allocates memory for this device instance, including
  2871. * space for this driver's private structure */
  2872. struct ieee80211_hw *hw;
  2873. hw = ieee80211_alloc_hw(sizeof(struct iwl_priv), &iwlagn_hw_ops);
  2874. if (hw == NULL) {
  2875. pr_err("%s: Can not allocate network device\n",
  2876. cfg->name);
  2877. goto out;
  2878. }
  2879. priv = hw->priv;
  2880. priv->hw = hw;
  2881. out:
  2882. return hw;
  2883. }
  2884. static void iwl_init_context(struct iwl_priv *priv)
  2885. {
  2886. int i;
  2887. /*
  2888. * The default context is always valid,
  2889. * more may be discovered when firmware
  2890. * is loaded.
  2891. */
  2892. priv->valid_contexts = BIT(IWL_RXON_CTX_BSS);
  2893. for (i = 0; i < NUM_IWL_RXON_CTX; i++)
  2894. priv->contexts[i].ctxid = i;
  2895. priv->contexts[IWL_RXON_CTX_BSS].always_active = true;
  2896. priv->contexts[IWL_RXON_CTX_BSS].is_active = true;
  2897. priv->contexts[IWL_RXON_CTX_BSS].rxon_cmd = REPLY_RXON;
  2898. priv->contexts[IWL_RXON_CTX_BSS].rxon_timing_cmd = REPLY_RXON_TIMING;
  2899. priv->contexts[IWL_RXON_CTX_BSS].rxon_assoc_cmd = REPLY_RXON_ASSOC;
  2900. priv->contexts[IWL_RXON_CTX_BSS].qos_cmd = REPLY_QOS_PARAM;
  2901. priv->contexts[IWL_RXON_CTX_BSS].ap_sta_id = IWL_AP_ID;
  2902. priv->contexts[IWL_RXON_CTX_BSS].wep_key_cmd = REPLY_WEPKEY;
  2903. priv->contexts[IWL_RXON_CTX_BSS].ac_to_fifo = iwlagn_bss_ac_to_fifo;
  2904. priv->contexts[IWL_RXON_CTX_BSS].ac_to_queue = iwlagn_bss_ac_to_queue;
  2905. priv->contexts[IWL_RXON_CTX_BSS].exclusive_interface_modes =
  2906. BIT(NL80211_IFTYPE_ADHOC);
  2907. priv->contexts[IWL_RXON_CTX_BSS].interface_modes =
  2908. BIT(NL80211_IFTYPE_STATION);
  2909. priv->contexts[IWL_RXON_CTX_BSS].ap_devtype = RXON_DEV_TYPE_AP;
  2910. priv->contexts[IWL_RXON_CTX_BSS].ibss_devtype = RXON_DEV_TYPE_IBSS;
  2911. priv->contexts[IWL_RXON_CTX_BSS].station_devtype = RXON_DEV_TYPE_ESS;
  2912. priv->contexts[IWL_RXON_CTX_BSS].unused_devtype = RXON_DEV_TYPE_ESS;
  2913. priv->contexts[IWL_RXON_CTX_PAN].rxon_cmd = REPLY_WIPAN_RXON;
  2914. priv->contexts[IWL_RXON_CTX_PAN].rxon_timing_cmd =
  2915. REPLY_WIPAN_RXON_TIMING;
  2916. priv->contexts[IWL_RXON_CTX_PAN].rxon_assoc_cmd =
  2917. REPLY_WIPAN_RXON_ASSOC;
  2918. priv->contexts[IWL_RXON_CTX_PAN].qos_cmd = REPLY_WIPAN_QOS_PARAM;
  2919. priv->contexts[IWL_RXON_CTX_PAN].ap_sta_id = IWL_AP_ID_PAN;
  2920. priv->contexts[IWL_RXON_CTX_PAN].wep_key_cmd = REPLY_WIPAN_WEPKEY;
  2921. priv->contexts[IWL_RXON_CTX_PAN].bcast_sta_id = IWLAGN_PAN_BCAST_ID;
  2922. priv->contexts[IWL_RXON_CTX_PAN].station_flags = STA_FLG_PAN_STATION;
  2923. priv->contexts[IWL_RXON_CTX_PAN].ac_to_fifo = iwlagn_pan_ac_to_fifo;
  2924. priv->contexts[IWL_RXON_CTX_PAN].ac_to_queue = iwlagn_pan_ac_to_queue;
  2925. priv->contexts[IWL_RXON_CTX_PAN].mcast_queue = IWL_IPAN_MCAST_QUEUE;
  2926. priv->contexts[IWL_RXON_CTX_PAN].interface_modes =
  2927. BIT(NL80211_IFTYPE_STATION) | BIT(NL80211_IFTYPE_AP);
  2928. #ifdef CONFIG_IWL_P2P
  2929. priv->contexts[IWL_RXON_CTX_PAN].interface_modes |=
  2930. BIT(NL80211_IFTYPE_P2P_CLIENT) | BIT(NL80211_IFTYPE_P2P_GO);
  2931. #endif
  2932. priv->contexts[IWL_RXON_CTX_PAN].ap_devtype = RXON_DEV_TYPE_CP;
  2933. priv->contexts[IWL_RXON_CTX_PAN].station_devtype = RXON_DEV_TYPE_2STA;
  2934. priv->contexts[IWL_RXON_CTX_PAN].unused_devtype = RXON_DEV_TYPE_P2P;
  2935. BUILD_BUG_ON(NUM_IWL_RXON_CTX != 2);
  2936. }
  2937. int iwl_probe(void *bus_specific, struct iwl_bus_ops *bus_ops,
  2938. struct iwl_cfg *cfg)
  2939. {
  2940. int err = 0;
  2941. struct iwl_priv *priv;
  2942. struct ieee80211_hw *hw;
  2943. u16 num_mac;
  2944. u32 hw_rev;
  2945. /************************
  2946. * 1. Allocating HW data
  2947. ************************/
  2948. hw = iwl_alloc_all(cfg);
  2949. if (!hw) {
  2950. err = -ENOMEM;
  2951. goto out;
  2952. }
  2953. priv = hw->priv;
  2954. priv->bus.priv = priv;
  2955. priv->bus.bus_specific = bus_specific;
  2956. priv->bus.ops = bus_ops;
  2957. priv->bus.irq = priv->bus.ops->get_irq(&priv->bus);
  2958. priv->bus.ops->set_drv_data(&priv->bus, priv);
  2959. priv->bus.dev = priv->bus.ops->get_dev(&priv->bus);
  2960. /* At this point both hw and priv are allocated. */
  2961. SET_IEEE80211_DEV(hw, priv->bus.dev);
  2962. IWL_DEBUG_INFO(priv, "*** LOAD DRIVER ***\n");
  2963. priv->cfg = cfg;
  2964. priv->inta_mask = CSR_INI_SET_MASK;
  2965. /* is antenna coupling more than 35dB ? */
  2966. priv->bt_ant_couple_ok =
  2967. (iwlagn_ant_coupling > IWL_BT_ANTENNA_COUPLING_THRESHOLD) ?
  2968. true : false;
  2969. /* enable/disable bt channel inhibition */
  2970. priv->bt_ch_announce = iwlagn_bt_ch_announce;
  2971. IWL_DEBUG_INFO(priv, "BT channel inhibition is %s\n",
  2972. (priv->bt_ch_announce) ? "On" : "Off");
  2973. if (iwl_alloc_traffic_mem(priv))
  2974. IWL_ERR(priv, "Not enough memory to generate traffic log\n");
  2975. /* these spin locks will be used in apm_ops.init and EEPROM access
  2976. * we should init now
  2977. */
  2978. spin_lock_init(&priv->reg_lock);
  2979. spin_lock_init(&priv->lock);
  2980. /*
  2981. * stop and reset the on-board processor just in case it is in a
  2982. * strange state ... like being left stranded by a primary kernel
  2983. * and this is now the kdump kernel trying to start up
  2984. */
  2985. iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
  2986. /***********************
  2987. * 3. Read REV register
  2988. ***********************/
  2989. hw_rev = iwl_hw_detect(priv);
  2990. IWL_INFO(priv, "Detected %s, REV=0x%X\n",
  2991. priv->cfg->name, hw_rev);
  2992. if (iwl_prepare_card_hw(priv)) {
  2993. err = -EIO;
  2994. IWL_WARN(priv, "Failed, HW not ready\n");
  2995. goto out_free_traffic_mem;
  2996. }
  2997. /*****************
  2998. * 4. Read EEPROM
  2999. *****************/
  3000. /* Read the EEPROM */
  3001. err = iwl_eeprom_init(priv, hw_rev);
  3002. if (err) {
  3003. IWL_ERR(priv, "Unable to init EEPROM\n");
  3004. goto out_free_traffic_mem;
  3005. }
  3006. err = iwl_eeprom_check_version(priv);
  3007. if (err)
  3008. goto out_free_eeprom;
  3009. err = iwl_eeprom_check_sku(priv);
  3010. if (err)
  3011. goto out_free_eeprom;
  3012. /* extract MAC Address */
  3013. iwl_eeprom_get_mac(priv, priv->addresses[0].addr);
  3014. IWL_DEBUG_INFO(priv, "MAC address: %pM\n", priv->addresses[0].addr);
  3015. priv->hw->wiphy->addresses = priv->addresses;
  3016. priv->hw->wiphy->n_addresses = 1;
  3017. num_mac = iwl_eeprom_query16(priv, EEPROM_NUM_MAC_ADDRESS);
  3018. if (num_mac > 1) {
  3019. memcpy(priv->addresses[1].addr, priv->addresses[0].addr,
  3020. ETH_ALEN);
  3021. priv->addresses[1].addr[5]++;
  3022. priv->hw->wiphy->n_addresses++;
  3023. }
  3024. /* initialize all valid contexts */
  3025. iwl_init_context(priv);
  3026. /************************
  3027. * 5. Setup HW constants
  3028. ************************/
  3029. if (iwl_set_hw_params(priv)) {
  3030. err = -ENOENT;
  3031. IWL_ERR(priv, "failed to set hw parameters\n");
  3032. goto out_free_eeprom;
  3033. }
  3034. /*******************
  3035. * 6. Setup priv
  3036. *******************/
  3037. err = iwl_init_drv(priv);
  3038. if (err)
  3039. goto out_free_eeprom;
  3040. /* At this point both hw and priv are initialized. */
  3041. /********************
  3042. * 7. Setup services
  3043. ********************/
  3044. iwl_alloc_isr_ict(priv);
  3045. err = request_irq(priv->bus.irq, iwl_isr_ict, IRQF_SHARED,
  3046. DRV_NAME, priv);
  3047. if (err) {
  3048. IWL_ERR(priv, "Error allocating IRQ %d\n", priv->bus.irq);
  3049. goto out_uninit_drv;
  3050. }
  3051. iwl_setup_deferred_work(priv);
  3052. iwl_setup_rx_handlers(priv);
  3053. iwl_testmode_init(priv);
  3054. /*********************************************
  3055. * 8. Enable interrupts
  3056. *********************************************/
  3057. iwl_enable_rfkill_int(priv);
  3058. /* If platform's RF_KILL switch is NOT set to KILL */
  3059. if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
  3060. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  3061. else
  3062. set_bit(STATUS_RF_KILL_HW, &priv->status);
  3063. wiphy_rfkill_set_hw_state(priv->hw->wiphy,
  3064. test_bit(STATUS_RF_KILL_HW, &priv->status));
  3065. iwl_power_initialize(priv);
  3066. iwl_tt_initialize(priv);
  3067. init_completion(&priv->_agn.firmware_loading_complete);
  3068. err = iwl_request_firmware(priv, true);
  3069. if (err)
  3070. goto out_destroy_workqueue;
  3071. return 0;
  3072. out_destroy_workqueue:
  3073. destroy_workqueue(priv->workqueue);
  3074. priv->workqueue = NULL;
  3075. free_irq(priv->bus.irq, priv);
  3076. iwl_free_isr_ict(priv);
  3077. out_uninit_drv:
  3078. iwl_uninit_drv(priv);
  3079. out_free_eeprom:
  3080. iwl_eeprom_free(priv);
  3081. out_free_traffic_mem:
  3082. iwl_free_traffic_mem(priv);
  3083. ieee80211_free_hw(priv->hw);
  3084. out:
  3085. return err;
  3086. }
  3087. void __devexit iwl_remove(struct iwl_priv * priv)
  3088. {
  3089. unsigned long flags;
  3090. wait_for_completion(&priv->_agn.firmware_loading_complete);
  3091. IWL_DEBUG_INFO(priv, "*** UNLOAD DRIVER ***\n");
  3092. iwl_dbgfs_unregister(priv);
  3093. sysfs_remove_group(&priv->bus.dev->kobj,
  3094. &iwl_attribute_group);
  3095. /* ieee80211_unregister_hw call wil cause iwl_mac_stop to
  3096. * to be called and iwl_down since we are removing the device
  3097. * we need to set STATUS_EXIT_PENDING bit.
  3098. */
  3099. set_bit(STATUS_EXIT_PENDING, &priv->status);
  3100. iwl_testmode_cleanup(priv);
  3101. iwl_leds_exit(priv);
  3102. if (priv->mac80211_registered) {
  3103. ieee80211_unregister_hw(priv->hw);
  3104. priv->mac80211_registered = 0;
  3105. }
  3106. /* Reset to low power before unloading driver. */
  3107. iwl_apm_stop(priv);
  3108. iwl_tt_exit(priv);
  3109. /* make sure we flush any pending irq or
  3110. * tasklet for the driver
  3111. */
  3112. spin_lock_irqsave(&priv->lock, flags);
  3113. iwl_disable_interrupts(priv);
  3114. spin_unlock_irqrestore(&priv->lock, flags);
  3115. iwl_synchronize_irq(priv);
  3116. iwl_dealloc_ucode(priv);
  3117. if (priv->rxq.bd)
  3118. iwlagn_rx_queue_free(priv, &priv->rxq);
  3119. iwlagn_hw_txq_ctx_free(priv);
  3120. iwl_eeprom_free(priv);
  3121. /*netif_stop_queue(dev); */
  3122. flush_workqueue(priv->workqueue);
  3123. /* ieee80211_unregister_hw calls iwl_mac_stop, which flushes
  3124. * priv->workqueue... so we can't take down the workqueue
  3125. * until now... */
  3126. destroy_workqueue(priv->workqueue);
  3127. priv->workqueue = NULL;
  3128. iwl_free_traffic_mem(priv);
  3129. free_irq(priv->bus.irq, priv);
  3130. priv->bus.ops->set_drv_data(&priv->bus, NULL);
  3131. iwl_uninit_drv(priv);
  3132. iwl_free_isr_ict(priv);
  3133. dev_kfree_skb(priv->beacon_skb);
  3134. ieee80211_free_hw(priv->hw);
  3135. }
  3136. /*****************************************************************************
  3137. *
  3138. * driver and module entry point
  3139. *
  3140. *****************************************************************************/
  3141. static int __init iwl_init(void)
  3142. {
  3143. int ret;
  3144. pr_info(DRV_DESCRIPTION ", " DRV_VERSION "\n");
  3145. pr_info(DRV_COPYRIGHT "\n");
  3146. ret = iwlagn_rate_control_register();
  3147. if (ret) {
  3148. pr_err("Unable to register rate control algorithm: %d\n", ret);
  3149. return ret;
  3150. }
  3151. ret = iwl_pci_register_driver();
  3152. if (ret)
  3153. goto error_register;
  3154. return ret;
  3155. error_register:
  3156. iwlagn_rate_control_unregister();
  3157. return ret;
  3158. }
  3159. static void __exit iwl_exit(void)
  3160. {
  3161. iwl_pci_unregister_driver();
  3162. iwlagn_rate_control_unregister();
  3163. }
  3164. module_exit(iwl_exit);
  3165. module_init(iwl_init);
  3166. #ifdef CONFIG_IWLWIFI_DEBUG
  3167. module_param_named(debug, iwl_debug_level, uint, S_IRUGO | S_IWUSR);
  3168. MODULE_PARM_DESC(debug, "debug output mask");
  3169. #endif
  3170. module_param_named(swcrypto, iwlagn_mod_params.sw_crypto, int, S_IRUGO);
  3171. MODULE_PARM_DESC(swcrypto, "using crypto in software (default 0 [hardware])");
  3172. module_param_named(queues_num, iwlagn_mod_params.num_of_queues, int, S_IRUGO);
  3173. MODULE_PARM_DESC(queues_num, "number of hw queues.");
  3174. module_param_named(11n_disable, iwlagn_mod_params.disable_11n, int, S_IRUGO);
  3175. MODULE_PARM_DESC(11n_disable, "disable 11n functionality");
  3176. module_param_named(amsdu_size_8K, iwlagn_mod_params.amsdu_size_8K,
  3177. int, S_IRUGO);
  3178. MODULE_PARM_DESC(amsdu_size_8K, "enable 8K amsdu size");
  3179. module_param_named(fw_restart, iwlagn_mod_params.restart_fw, int, S_IRUGO);
  3180. MODULE_PARM_DESC(fw_restart, "restart firmware in case of error");
  3181. module_param_named(ucode_alternative, iwlagn_wanted_ucode_alternative, int,
  3182. S_IRUGO);
  3183. MODULE_PARM_DESC(ucode_alternative,
  3184. "specify ucode alternative to use from ucode file");
  3185. module_param_named(antenna_coupling, iwlagn_ant_coupling, int, S_IRUGO);
  3186. MODULE_PARM_DESC(antenna_coupling,
  3187. "specify antenna coupling in dB (defualt: 0 dB)");
  3188. module_param_named(bt_ch_inhibition, iwlagn_bt_ch_announce, bool, S_IRUGO);
  3189. MODULE_PARM_DESC(bt_ch_inhibition,
  3190. "Disable BT channel inhibition (default: enable)");
  3191. module_param_named(plcp_check, iwlagn_mod_params.plcp_check, bool, S_IRUGO);
  3192. MODULE_PARM_DESC(plcp_check, "Check plcp health (default: 1 [enabled])");
  3193. module_param_named(ack_check, iwlagn_mod_params.ack_check, bool, S_IRUGO);
  3194. MODULE_PARM_DESC(ack_check, "Check ack health (default: 0 [disabled])");
  3195. /*
  3196. * set bt_coex_active to true, uCode will do kill/defer
  3197. * every time the priority line is asserted (BT is sending signals on the
  3198. * priority line in the PCIx).
  3199. * set bt_coex_active to false, uCode will ignore the BT activity and
  3200. * perform the normal operation
  3201. *
  3202. * User might experience transmit issue on some platform due to WiFi/BT
  3203. * co-exist problem. The possible behaviors are:
  3204. * Able to scan and finding all the available AP
  3205. * Not able to associate with any AP
  3206. * On those platforms, WiFi communication can be restored by set
  3207. * "bt_coex_active" module parameter to "false"
  3208. *
  3209. * default: bt_coex_active = true (BT_COEX_ENABLE)
  3210. */
  3211. module_param_named(bt_coex_active, iwlagn_mod_params.bt_coex_active,
  3212. bool, S_IRUGO);
  3213. MODULE_PARM_DESC(bt_coex_active, "enable wifi/bt co-exist (default: enable)");
  3214. module_param_named(led_mode, iwlagn_mod_params.led_mode, int, S_IRUGO);
  3215. MODULE_PARM_DESC(led_mode, "0=system default, "
  3216. "1=On(RF On)/Off(RF Off), 2=blinking (default: 0)");
  3217. module_param_named(power_save, iwlagn_mod_params.power_save,
  3218. bool, S_IRUGO);
  3219. MODULE_PARM_DESC(power_save,
  3220. "enable WiFi power management (default: disable)");
  3221. module_param_named(power_level, iwlagn_mod_params.power_level,
  3222. int, S_IRUGO);
  3223. MODULE_PARM_DESC(power_level,
  3224. "default power save level (range from 1 - 5, default: 1)");
  3225. /*
  3226. * For now, keep using power level 1 instead of automatically
  3227. * adjusting ...
  3228. */
  3229. module_param_named(no_sleep_autoadjust, iwlagn_mod_params.no_sleep_autoadjust,
  3230. bool, S_IRUGO);
  3231. MODULE_PARM_DESC(no_sleep_autoadjust,
  3232. "don't automatically adjust sleep level "
  3233. "according to maximum network latency (default: true)");