common.c 148 KB

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  1. /******************************************************************************
  2. *
  3. * GPL LICENSE SUMMARY
  4. *
  5. * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of version 2 of the GNU General Public License as
  9. * published by the Free Software Foundation.
  10. *
  11. * This program is distributed in the hope that it will be useful, but
  12. * WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  14. * General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program; if not, write to the Free Software
  18. * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
  19. * USA
  20. *
  21. * The full GNU General Public License is included in this distribution
  22. * in the file called LICENSE.GPL.
  23. *
  24. * Contact Information:
  25. * Intel Linux Wireless <ilw@linux.intel.com>
  26. * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  27. *****************************************************************************/
  28. #include <linux/kernel.h>
  29. #include <linux/module.h>
  30. #include <linux/etherdevice.h>
  31. #include <linux/sched.h>
  32. #include <linux/slab.h>
  33. #include <linux/types.h>
  34. #include <linux/lockdep.h>
  35. #include <linux/init.h>
  36. #include <linux/pci.h>
  37. #include <linux/dma-mapping.h>
  38. #include <linux/delay.h>
  39. #include <linux/skbuff.h>
  40. #include <net/mac80211.h>
  41. #include "iwl-eeprom.h"
  42. #include "iwl-debug.h"
  43. #include "common.h"
  44. const char *il_get_cmd_string(u8 cmd)
  45. {
  46. switch (cmd) {
  47. IL_CMD(N_ALIVE);
  48. IL_CMD(N_ERROR);
  49. IL_CMD(C_RXON);
  50. IL_CMD(C_RXON_ASSOC);
  51. IL_CMD(C_QOS_PARAM);
  52. IL_CMD(C_RXON_TIMING);
  53. IL_CMD(C_ADD_STA);
  54. IL_CMD(C_REM_STA);
  55. IL_CMD(C_WEPKEY);
  56. IL_CMD(N_3945_RX);
  57. IL_CMD(C_TX);
  58. IL_CMD(C_RATE_SCALE);
  59. IL_CMD(C_LEDS);
  60. IL_CMD(C_TX_LINK_QUALITY_CMD);
  61. IL_CMD(C_CHANNEL_SWITCH);
  62. IL_CMD(N_CHANNEL_SWITCH);
  63. IL_CMD(C_SPECTRUM_MEASUREMENT);
  64. IL_CMD(N_SPECTRUM_MEASUREMENT);
  65. IL_CMD(C_POWER_TBL);
  66. IL_CMD(N_PM_SLEEP);
  67. IL_CMD(N_PM_DEBUG_STATS);
  68. IL_CMD(C_SCAN);
  69. IL_CMD(C_SCAN_ABORT);
  70. IL_CMD(N_SCAN_START);
  71. IL_CMD(N_SCAN_RESULTS);
  72. IL_CMD(N_SCAN_COMPLETE);
  73. IL_CMD(N_BEACON);
  74. IL_CMD(C_TX_BEACON);
  75. IL_CMD(C_TX_PWR_TBL);
  76. IL_CMD(C_BT_CONFIG);
  77. IL_CMD(C_STATS);
  78. IL_CMD(N_STATS);
  79. IL_CMD(N_CARD_STATE);
  80. IL_CMD(N_MISSED_BEACONS);
  81. IL_CMD(C_CT_KILL_CONFIG);
  82. IL_CMD(C_SENSITIVITY);
  83. IL_CMD(C_PHY_CALIBRATION);
  84. IL_CMD(N_RX_PHY);
  85. IL_CMD(N_RX_MPDU);
  86. IL_CMD(N_RX);
  87. IL_CMD(N_COMPRESSED_BA);
  88. default:
  89. return "UNKNOWN";
  90. }
  91. }
  92. EXPORT_SYMBOL(il_get_cmd_string);
  93. #define HOST_COMPLETE_TIMEOUT (HZ / 2)
  94. static void il_generic_cmd_callback(struct il_priv *il,
  95. struct il_device_cmd *cmd,
  96. struct il_rx_pkt *pkt)
  97. {
  98. if (pkt->hdr.flags & IL_CMD_FAILED_MSK) {
  99. IL_ERR("Bad return from %s (0x%08X)\n",
  100. il_get_cmd_string(cmd->hdr.cmd), pkt->hdr.flags);
  101. return;
  102. }
  103. #ifdef CONFIG_IWLEGACY_DEBUG
  104. switch (cmd->hdr.cmd) {
  105. case C_TX_LINK_QUALITY_CMD:
  106. case C_SENSITIVITY:
  107. D_HC_DUMP("back from %s (0x%08X)\n",
  108. il_get_cmd_string(cmd->hdr.cmd), pkt->hdr.flags);
  109. break;
  110. default:
  111. D_HC("back from %s (0x%08X)\n",
  112. il_get_cmd_string(cmd->hdr.cmd), pkt->hdr.flags);
  113. }
  114. #endif
  115. }
  116. static int
  117. il_send_cmd_async(struct il_priv *il, struct il_host_cmd *cmd)
  118. {
  119. int ret;
  120. BUG_ON(!(cmd->flags & CMD_ASYNC));
  121. /* An asynchronous command can not expect an SKB to be set. */
  122. BUG_ON(cmd->flags & CMD_WANT_SKB);
  123. /* Assign a generic callback if one is not provided */
  124. if (!cmd->callback)
  125. cmd->callback = il_generic_cmd_callback;
  126. if (test_bit(S_EXIT_PENDING, &il->status))
  127. return -EBUSY;
  128. ret = il_enqueue_hcmd(il, cmd);
  129. if (ret < 0) {
  130. IL_ERR("Error sending %s: enqueue_hcmd failed: %d\n",
  131. il_get_cmd_string(cmd->id), ret);
  132. return ret;
  133. }
  134. return 0;
  135. }
  136. int il_send_cmd_sync(struct il_priv *il, struct il_host_cmd *cmd)
  137. {
  138. int cmd_idx;
  139. int ret;
  140. lockdep_assert_held(&il->mutex);
  141. BUG_ON(cmd->flags & CMD_ASYNC);
  142. /* A synchronous command can not have a callback set. */
  143. BUG_ON(cmd->callback);
  144. D_INFO("Attempting to send sync command %s\n",
  145. il_get_cmd_string(cmd->id));
  146. set_bit(S_HCMD_ACTIVE, &il->status);
  147. D_INFO("Setting HCMD_ACTIVE for command %s\n",
  148. il_get_cmd_string(cmd->id));
  149. cmd_idx = il_enqueue_hcmd(il, cmd);
  150. if (cmd_idx < 0) {
  151. ret = cmd_idx;
  152. IL_ERR("Error sending %s: enqueue_hcmd failed: %d\n",
  153. il_get_cmd_string(cmd->id), ret);
  154. goto out;
  155. }
  156. ret = wait_event_timeout(il->wait_command_queue,
  157. !test_bit(S_HCMD_ACTIVE, &il->status),
  158. HOST_COMPLETE_TIMEOUT);
  159. if (!ret) {
  160. if (test_bit(S_HCMD_ACTIVE, &il->status)) {
  161. IL_ERR(
  162. "Error sending %s: time out after %dms.\n",
  163. il_get_cmd_string(cmd->id),
  164. jiffies_to_msecs(HOST_COMPLETE_TIMEOUT));
  165. clear_bit(S_HCMD_ACTIVE, &il->status);
  166. D_INFO(
  167. "Clearing HCMD_ACTIVE for command %s\n",
  168. il_get_cmd_string(cmd->id));
  169. ret = -ETIMEDOUT;
  170. goto cancel;
  171. }
  172. }
  173. if (test_bit(S_RF_KILL_HW, &il->status)) {
  174. IL_ERR("Command %s aborted: RF KILL Switch\n",
  175. il_get_cmd_string(cmd->id));
  176. ret = -ECANCELED;
  177. goto fail;
  178. }
  179. if (test_bit(S_FW_ERROR, &il->status)) {
  180. IL_ERR("Command %s failed: FW Error\n",
  181. il_get_cmd_string(cmd->id));
  182. ret = -EIO;
  183. goto fail;
  184. }
  185. if ((cmd->flags & CMD_WANT_SKB) && !cmd->reply_page) {
  186. IL_ERR("Error: Response NULL in '%s'\n",
  187. il_get_cmd_string(cmd->id));
  188. ret = -EIO;
  189. goto cancel;
  190. }
  191. ret = 0;
  192. goto out;
  193. cancel:
  194. if (cmd->flags & CMD_WANT_SKB) {
  195. /*
  196. * Cancel the CMD_WANT_SKB flag for the cmd in the
  197. * TX cmd queue. Otherwise in case the cmd comes
  198. * in later, it will possibly set an invalid
  199. * address (cmd->meta.source).
  200. */
  201. il->txq[il->cmd_queue].meta[cmd_idx].flags &=
  202. ~CMD_WANT_SKB;
  203. }
  204. fail:
  205. if (cmd->reply_page) {
  206. il_free_pages(il, cmd->reply_page);
  207. cmd->reply_page = 0;
  208. }
  209. out:
  210. return ret;
  211. }
  212. EXPORT_SYMBOL(il_send_cmd_sync);
  213. int il_send_cmd(struct il_priv *il, struct il_host_cmd *cmd)
  214. {
  215. if (cmd->flags & CMD_ASYNC)
  216. return il_send_cmd_async(il, cmd);
  217. return il_send_cmd_sync(il, cmd);
  218. }
  219. EXPORT_SYMBOL(il_send_cmd);
  220. int
  221. il_send_cmd_pdu(struct il_priv *il, u8 id, u16 len, const void *data)
  222. {
  223. struct il_host_cmd cmd = {
  224. .id = id,
  225. .len = len,
  226. .data = data,
  227. };
  228. return il_send_cmd_sync(il, &cmd);
  229. }
  230. EXPORT_SYMBOL(il_send_cmd_pdu);
  231. int il_send_cmd_pdu_async(struct il_priv *il,
  232. u8 id, u16 len, const void *data,
  233. void (*callback)(struct il_priv *il,
  234. struct il_device_cmd *cmd,
  235. struct il_rx_pkt *pkt))
  236. {
  237. struct il_host_cmd cmd = {
  238. .id = id,
  239. .len = len,
  240. .data = data,
  241. };
  242. cmd.flags |= CMD_ASYNC;
  243. cmd.callback = callback;
  244. return il_send_cmd_async(il, &cmd);
  245. }
  246. EXPORT_SYMBOL(il_send_cmd_pdu_async);
  247. /* default: IL_LED_BLINK(0) using blinking idx table */
  248. static int led_mode;
  249. module_param(led_mode, int, S_IRUGO);
  250. MODULE_PARM_DESC(led_mode, "0=system default, "
  251. "1=On(RF On)/Off(RF Off), 2=blinking");
  252. /* Throughput OFF time(ms) ON time (ms)
  253. * >300 25 25
  254. * >200 to 300 40 40
  255. * >100 to 200 55 55
  256. * >70 to 100 65 65
  257. * >50 to 70 75 75
  258. * >20 to 50 85 85
  259. * >10 to 20 95 95
  260. * >5 to 10 110 110
  261. * >1 to 5 130 130
  262. * >0 to 1 167 167
  263. * <=0 SOLID ON
  264. */
  265. static const struct ieee80211_tpt_blink il_blink[] = {
  266. { .throughput = 0, .blink_time = 334 },
  267. { .throughput = 1 * 1024 - 1, .blink_time = 260 },
  268. { .throughput = 5 * 1024 - 1, .blink_time = 220 },
  269. { .throughput = 10 * 1024 - 1, .blink_time = 190 },
  270. { .throughput = 20 * 1024 - 1, .blink_time = 170 },
  271. { .throughput = 50 * 1024 - 1, .blink_time = 150 },
  272. { .throughput = 70 * 1024 - 1, .blink_time = 130 },
  273. { .throughput = 100 * 1024 - 1, .blink_time = 110 },
  274. { .throughput = 200 * 1024 - 1, .blink_time = 80 },
  275. { .throughput = 300 * 1024 - 1, .blink_time = 50 },
  276. };
  277. /*
  278. * Adjust led blink rate to compensate on a MAC Clock difference on every HW
  279. * Led blink rate analysis showed an average deviation of 0% on 3945,
  280. * 5% on 4965 HW.
  281. * Need to compensate on the led on/off time per HW according to the deviation
  282. * to achieve the desired led frequency
  283. * The calculation is: (100-averageDeviation)/100 * blinkTime
  284. * For code efficiency the calculation will be:
  285. * compensation = (100 - averageDeviation) * 64 / 100
  286. * NewBlinkTime = (compensation * BlinkTime) / 64
  287. */
  288. static inline u8 il_blink_compensation(struct il_priv *il,
  289. u8 time, u16 compensation)
  290. {
  291. if (!compensation) {
  292. IL_ERR("undefined blink compensation: "
  293. "use pre-defined blinking time\n");
  294. return time;
  295. }
  296. return (u8)((time * compensation) >> 6);
  297. }
  298. /* Set led pattern command */
  299. static int il_led_cmd(struct il_priv *il,
  300. unsigned long on,
  301. unsigned long off)
  302. {
  303. struct il_led_cmd led_cmd = {
  304. .id = IL_LED_LINK,
  305. .interval = IL_DEF_LED_INTRVL
  306. };
  307. int ret;
  308. if (!test_bit(S_READY, &il->status))
  309. return -EBUSY;
  310. if (il->blink_on == on && il->blink_off == off)
  311. return 0;
  312. if (off == 0) {
  313. /* led is SOLID_ON */
  314. on = IL_LED_SOLID;
  315. }
  316. D_LED("Led blink time compensation=%u\n",
  317. il->cfg->base_params->led_compensation);
  318. led_cmd.on = il_blink_compensation(il, on,
  319. il->cfg->base_params->led_compensation);
  320. led_cmd.off = il_blink_compensation(il, off,
  321. il->cfg->base_params->led_compensation);
  322. ret = il->cfg->ops->led->cmd(il, &led_cmd);
  323. if (!ret) {
  324. il->blink_on = on;
  325. il->blink_off = off;
  326. }
  327. return ret;
  328. }
  329. static void il_led_brightness_set(struct led_classdev *led_cdev,
  330. enum led_brightness brightness)
  331. {
  332. struct il_priv *il = container_of(led_cdev, struct il_priv, led);
  333. unsigned long on = 0;
  334. if (brightness > 0)
  335. on = IL_LED_SOLID;
  336. il_led_cmd(il, on, 0);
  337. }
  338. static int il_led_blink_set(struct led_classdev *led_cdev,
  339. unsigned long *delay_on,
  340. unsigned long *delay_off)
  341. {
  342. struct il_priv *il = container_of(led_cdev, struct il_priv, led);
  343. return il_led_cmd(il, *delay_on, *delay_off);
  344. }
  345. void il_leds_init(struct il_priv *il)
  346. {
  347. int mode = led_mode;
  348. int ret;
  349. if (mode == IL_LED_DEFAULT)
  350. mode = il->cfg->led_mode;
  351. il->led.name = kasprintf(GFP_KERNEL, "%s-led",
  352. wiphy_name(il->hw->wiphy));
  353. il->led.brightness_set = il_led_brightness_set;
  354. il->led.blink_set = il_led_blink_set;
  355. il->led.max_brightness = 1;
  356. switch (mode) {
  357. case IL_LED_DEFAULT:
  358. WARN_ON(1);
  359. break;
  360. case IL_LED_BLINK:
  361. il->led.default_trigger =
  362. ieee80211_create_tpt_led_trigger(il->hw,
  363. IEEE80211_TPT_LEDTRIG_FL_CONNECTED,
  364. il_blink, ARRAY_SIZE(il_blink));
  365. break;
  366. case IL_LED_RF_STATE:
  367. il->led.default_trigger =
  368. ieee80211_get_radio_led_name(il->hw);
  369. break;
  370. }
  371. ret = led_classdev_register(&il->pci_dev->dev, &il->led);
  372. if (ret) {
  373. kfree(il->led.name);
  374. return;
  375. }
  376. il->led_registered = true;
  377. }
  378. EXPORT_SYMBOL(il_leds_init);
  379. void il_leds_exit(struct il_priv *il)
  380. {
  381. if (!il->led_registered)
  382. return;
  383. led_classdev_unregister(&il->led);
  384. kfree(il->led.name);
  385. }
  386. EXPORT_SYMBOL(il_leds_exit);
  387. /************************** EEPROM BANDS ****************************
  388. *
  389. * The il_eeprom_band definitions below provide the mapping from the
  390. * EEPROM contents to the specific channel number supported for each
  391. * band.
  392. *
  393. * For example, il_priv->eeprom.band_3_channels[4] from the band_3
  394. * definition below maps to physical channel 42 in the 5.2GHz spectrum.
  395. * The specific geography and calibration information for that channel
  396. * is contained in the eeprom map itself.
  397. *
  398. * During init, we copy the eeprom information and channel map
  399. * information into il->channel_info_24/52 and il->channel_map_24/52
  400. *
  401. * channel_map_24/52 provides the idx in the channel_info array for a
  402. * given channel. We have to have two separate maps as there is channel
  403. * overlap with the 2.4GHz and 5.2GHz spectrum as seen in band_1 and
  404. * band_2
  405. *
  406. * A value of 0xff stored in the channel_map indicates that the channel
  407. * is not supported by the hardware at all.
  408. *
  409. * A value of 0xfe in the channel_map indicates that the channel is not
  410. * valid for Tx with the current hardware. This means that
  411. * while the system can tune and receive on a given channel, it may not
  412. * be able to associate or transmit any frames on that
  413. * channel. There is no corresponding channel information for that
  414. * entry.
  415. *
  416. *********************************************************************/
  417. /* 2.4 GHz */
  418. const u8 il_eeprom_band_1[14] = {
  419. 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14
  420. };
  421. /* 5.2 GHz bands */
  422. static const u8 il_eeprom_band_2[] = { /* 4915-5080MHz */
  423. 183, 184, 185, 187, 188, 189, 192, 196, 7, 8, 11, 12, 16
  424. };
  425. static const u8 il_eeprom_band_3[] = { /* 5170-5320MHz */
  426. 34, 36, 38, 40, 42, 44, 46, 48, 52, 56, 60, 64
  427. };
  428. static const u8 il_eeprom_band_4[] = { /* 5500-5700MHz */
  429. 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140
  430. };
  431. static const u8 il_eeprom_band_5[] = { /* 5725-5825MHz */
  432. 145, 149, 153, 157, 161, 165
  433. };
  434. static const u8 il_eeprom_band_6[] = { /* 2.4 ht40 channel */
  435. 1, 2, 3, 4, 5, 6, 7
  436. };
  437. static const u8 il_eeprom_band_7[] = { /* 5.2 ht40 channel */
  438. 36, 44, 52, 60, 100, 108, 116, 124, 132, 149, 157
  439. };
  440. /******************************************************************************
  441. *
  442. * EEPROM related functions
  443. *
  444. ******************************************************************************/
  445. static int il_eeprom_verify_signature(struct il_priv *il)
  446. {
  447. u32 gp = _il_rd(il, CSR_EEPROM_GP) & CSR_EEPROM_GP_VALID_MSK;
  448. int ret = 0;
  449. D_EEPROM("EEPROM signature=0x%08x\n", gp);
  450. switch (gp) {
  451. case CSR_EEPROM_GP_GOOD_SIG_EEP_LESS_THAN_4K:
  452. case CSR_EEPROM_GP_GOOD_SIG_EEP_MORE_THAN_4K:
  453. break;
  454. default:
  455. IL_ERR("bad EEPROM signature,"
  456. "EEPROM_GP=0x%08x\n", gp);
  457. ret = -ENOENT;
  458. break;
  459. }
  460. return ret;
  461. }
  462. const u8
  463. *il_eeprom_query_addr(const struct il_priv *il, size_t offset)
  464. {
  465. BUG_ON(offset >= il->cfg->base_params->eeprom_size);
  466. return &il->eeprom[offset];
  467. }
  468. EXPORT_SYMBOL(il_eeprom_query_addr);
  469. u16 il_eeprom_query16(const struct il_priv *il, size_t offset)
  470. {
  471. if (!il->eeprom)
  472. return 0;
  473. return (u16)il->eeprom[offset] | ((u16)il->eeprom[offset + 1] << 8);
  474. }
  475. EXPORT_SYMBOL(il_eeprom_query16);
  476. /**
  477. * il_eeprom_init - read EEPROM contents
  478. *
  479. * Load the EEPROM contents from adapter into il->eeprom
  480. *
  481. * NOTE: This routine uses the non-debug IO access functions.
  482. */
  483. int il_eeprom_init(struct il_priv *il)
  484. {
  485. __le16 *e;
  486. u32 gp = _il_rd(il, CSR_EEPROM_GP);
  487. int sz;
  488. int ret;
  489. u16 addr;
  490. /* allocate eeprom */
  491. sz = il->cfg->base_params->eeprom_size;
  492. D_EEPROM("NVM size = %d\n", sz);
  493. il->eeprom = kzalloc(sz, GFP_KERNEL);
  494. if (!il->eeprom) {
  495. ret = -ENOMEM;
  496. goto alloc_err;
  497. }
  498. e = (__le16 *)il->eeprom;
  499. il->cfg->ops->lib->apm_ops.init(il);
  500. ret = il_eeprom_verify_signature(il);
  501. if (ret < 0) {
  502. IL_ERR("EEPROM not found, EEPROM_GP=0x%08x\n", gp);
  503. ret = -ENOENT;
  504. goto err;
  505. }
  506. /* Make sure driver (instead of uCode) is allowed to read EEPROM */
  507. ret = il->cfg->ops->lib->eeprom_ops.acquire_semaphore(il);
  508. if (ret < 0) {
  509. IL_ERR("Failed to acquire EEPROM semaphore.\n");
  510. ret = -ENOENT;
  511. goto err;
  512. }
  513. /* eeprom is an array of 16bit values */
  514. for (addr = 0; addr < sz; addr += sizeof(u16)) {
  515. u32 r;
  516. _il_wr(il, CSR_EEPROM_REG,
  517. CSR_EEPROM_REG_MSK_ADDR & (addr << 1));
  518. ret = _il_poll_bit(il, CSR_EEPROM_REG,
  519. CSR_EEPROM_REG_READ_VALID_MSK,
  520. CSR_EEPROM_REG_READ_VALID_MSK,
  521. IL_EEPROM_ACCESS_TIMEOUT);
  522. if (ret < 0) {
  523. IL_ERR("Time out reading EEPROM[%d]\n",
  524. addr);
  525. goto done;
  526. }
  527. r = _il_rd(il, CSR_EEPROM_REG);
  528. e[addr / 2] = cpu_to_le16(r >> 16);
  529. }
  530. D_EEPROM("NVM Type: %s, version: 0x%x\n",
  531. "EEPROM",
  532. il_eeprom_query16(il, EEPROM_VERSION));
  533. ret = 0;
  534. done:
  535. il->cfg->ops->lib->eeprom_ops.release_semaphore(il);
  536. err:
  537. if (ret)
  538. il_eeprom_free(il);
  539. /* Reset chip to save power until we load uCode during "up". */
  540. il_apm_stop(il);
  541. alloc_err:
  542. return ret;
  543. }
  544. EXPORT_SYMBOL(il_eeprom_init);
  545. void il_eeprom_free(struct il_priv *il)
  546. {
  547. kfree(il->eeprom);
  548. il->eeprom = NULL;
  549. }
  550. EXPORT_SYMBOL(il_eeprom_free);
  551. static void il_init_band_reference(const struct il_priv *il,
  552. int eep_band, int *eeprom_ch_count,
  553. const struct il_eeprom_channel **eeprom_ch_info,
  554. const u8 **eeprom_ch_idx)
  555. {
  556. u32 offset = il->cfg->ops->lib->
  557. eeprom_ops.regulatory_bands[eep_band - 1];
  558. switch (eep_band) {
  559. case 1: /* 2.4GHz band */
  560. *eeprom_ch_count = ARRAY_SIZE(il_eeprom_band_1);
  561. *eeprom_ch_info = (struct il_eeprom_channel *)
  562. il_eeprom_query_addr(il, offset);
  563. *eeprom_ch_idx = il_eeprom_band_1;
  564. break;
  565. case 2: /* 4.9GHz band */
  566. *eeprom_ch_count = ARRAY_SIZE(il_eeprom_band_2);
  567. *eeprom_ch_info = (struct il_eeprom_channel *)
  568. il_eeprom_query_addr(il, offset);
  569. *eeprom_ch_idx = il_eeprom_band_2;
  570. break;
  571. case 3: /* 5.2GHz band */
  572. *eeprom_ch_count = ARRAY_SIZE(il_eeprom_band_3);
  573. *eeprom_ch_info = (struct il_eeprom_channel *)
  574. il_eeprom_query_addr(il, offset);
  575. *eeprom_ch_idx = il_eeprom_band_3;
  576. break;
  577. case 4: /* 5.5GHz band */
  578. *eeprom_ch_count = ARRAY_SIZE(il_eeprom_band_4);
  579. *eeprom_ch_info = (struct il_eeprom_channel *)
  580. il_eeprom_query_addr(il, offset);
  581. *eeprom_ch_idx = il_eeprom_band_4;
  582. break;
  583. case 5: /* 5.7GHz band */
  584. *eeprom_ch_count = ARRAY_SIZE(il_eeprom_band_5);
  585. *eeprom_ch_info = (struct il_eeprom_channel *)
  586. il_eeprom_query_addr(il, offset);
  587. *eeprom_ch_idx = il_eeprom_band_5;
  588. break;
  589. case 6: /* 2.4GHz ht40 channels */
  590. *eeprom_ch_count = ARRAY_SIZE(il_eeprom_band_6);
  591. *eeprom_ch_info = (struct il_eeprom_channel *)
  592. il_eeprom_query_addr(il, offset);
  593. *eeprom_ch_idx = il_eeprom_band_6;
  594. break;
  595. case 7: /* 5 GHz ht40 channels */
  596. *eeprom_ch_count = ARRAY_SIZE(il_eeprom_band_7);
  597. *eeprom_ch_info = (struct il_eeprom_channel *)
  598. il_eeprom_query_addr(il, offset);
  599. *eeprom_ch_idx = il_eeprom_band_7;
  600. break;
  601. default:
  602. BUG();
  603. }
  604. }
  605. #define CHECK_AND_PRINT(x) ((eeprom_ch->flags & EEPROM_CHANNEL_##x) \
  606. ? # x " " : "")
  607. /**
  608. * il_mod_ht40_chan_info - Copy ht40 channel info into driver's il.
  609. *
  610. * Does not set up a command, or touch hardware.
  611. */
  612. static int il_mod_ht40_chan_info(struct il_priv *il,
  613. enum ieee80211_band band, u16 channel,
  614. const struct il_eeprom_channel *eeprom_ch,
  615. u8 clear_ht40_extension_channel)
  616. {
  617. struct il_channel_info *ch_info;
  618. ch_info = (struct il_channel_info *)
  619. il_get_channel_info(il, band, channel);
  620. if (!il_is_channel_valid(ch_info))
  621. return -1;
  622. D_EEPROM("HT40 Ch. %d [%sGHz] %s%s%s%s%s(0x%02x %ddBm):"
  623. " Ad-Hoc %ssupported\n",
  624. ch_info->channel,
  625. il_is_channel_a_band(ch_info) ?
  626. "5.2" : "2.4",
  627. CHECK_AND_PRINT(IBSS),
  628. CHECK_AND_PRINT(ACTIVE),
  629. CHECK_AND_PRINT(RADAR),
  630. CHECK_AND_PRINT(WIDE),
  631. CHECK_AND_PRINT(DFS),
  632. eeprom_ch->flags,
  633. eeprom_ch->max_power_avg,
  634. ((eeprom_ch->flags & EEPROM_CHANNEL_IBSS)
  635. && !(eeprom_ch->flags & EEPROM_CHANNEL_RADAR)) ?
  636. "" : "not ");
  637. ch_info->ht40_eeprom = *eeprom_ch;
  638. ch_info->ht40_max_power_avg = eeprom_ch->max_power_avg;
  639. ch_info->ht40_flags = eeprom_ch->flags;
  640. if (eeprom_ch->flags & EEPROM_CHANNEL_VALID)
  641. ch_info->ht40_extension_channel &=
  642. ~clear_ht40_extension_channel;
  643. return 0;
  644. }
  645. #define CHECK_AND_PRINT_I(x) ((eeprom_ch_info[ch].flags & EEPROM_CHANNEL_##x) \
  646. ? # x " " : "")
  647. /**
  648. * il_init_channel_map - Set up driver's info for all possible channels
  649. */
  650. int il_init_channel_map(struct il_priv *il)
  651. {
  652. int eeprom_ch_count = 0;
  653. const u8 *eeprom_ch_idx = NULL;
  654. const struct il_eeprom_channel *eeprom_ch_info = NULL;
  655. int band, ch;
  656. struct il_channel_info *ch_info;
  657. if (il->channel_count) {
  658. D_EEPROM("Channel map already initialized.\n");
  659. return 0;
  660. }
  661. D_EEPROM("Initializing regulatory info from EEPROM\n");
  662. il->channel_count =
  663. ARRAY_SIZE(il_eeprom_band_1) +
  664. ARRAY_SIZE(il_eeprom_band_2) +
  665. ARRAY_SIZE(il_eeprom_band_3) +
  666. ARRAY_SIZE(il_eeprom_band_4) +
  667. ARRAY_SIZE(il_eeprom_band_5);
  668. D_EEPROM("Parsing data for %d channels.\n",
  669. il->channel_count);
  670. il->channel_info = kzalloc(sizeof(struct il_channel_info) *
  671. il->channel_count, GFP_KERNEL);
  672. if (!il->channel_info) {
  673. IL_ERR("Could not allocate channel_info\n");
  674. il->channel_count = 0;
  675. return -ENOMEM;
  676. }
  677. ch_info = il->channel_info;
  678. /* Loop through the 5 EEPROM bands adding them in order to the
  679. * channel map we maintain (that contains additional information than
  680. * what just in the EEPROM) */
  681. for (band = 1; band <= 5; band++) {
  682. il_init_band_reference(il, band, &eeprom_ch_count,
  683. &eeprom_ch_info, &eeprom_ch_idx);
  684. /* Loop through each band adding each of the channels */
  685. for (ch = 0; ch < eeprom_ch_count; ch++) {
  686. ch_info->channel = eeprom_ch_idx[ch];
  687. ch_info->band = (band == 1) ? IEEE80211_BAND_2GHZ :
  688. IEEE80211_BAND_5GHZ;
  689. /* permanently store EEPROM's channel regulatory flags
  690. * and max power in channel info database. */
  691. ch_info->eeprom = eeprom_ch_info[ch];
  692. /* Copy the run-time flags so they are there even on
  693. * invalid channels */
  694. ch_info->flags = eeprom_ch_info[ch].flags;
  695. /* First write that ht40 is not enabled, and then enable
  696. * one by one */
  697. ch_info->ht40_extension_channel =
  698. IEEE80211_CHAN_NO_HT40;
  699. if (!(il_is_channel_valid(ch_info))) {
  700. D_EEPROM(
  701. "Ch. %d Flags %x [%sGHz] - "
  702. "No traffic\n",
  703. ch_info->channel,
  704. ch_info->flags,
  705. il_is_channel_a_band(ch_info) ?
  706. "5.2" : "2.4");
  707. ch_info++;
  708. continue;
  709. }
  710. /* Initialize regulatory-based run-time data */
  711. ch_info->max_power_avg = ch_info->curr_txpow =
  712. eeprom_ch_info[ch].max_power_avg;
  713. ch_info->scan_power = eeprom_ch_info[ch].max_power_avg;
  714. ch_info->min_power = 0;
  715. D_EEPROM("Ch. %d [%sGHz] "
  716. "%s%s%s%s%s%s(0x%02x %ddBm):"
  717. " Ad-Hoc %ssupported\n",
  718. ch_info->channel,
  719. il_is_channel_a_band(ch_info) ?
  720. "5.2" : "2.4",
  721. CHECK_AND_PRINT_I(VALID),
  722. CHECK_AND_PRINT_I(IBSS),
  723. CHECK_AND_PRINT_I(ACTIVE),
  724. CHECK_AND_PRINT_I(RADAR),
  725. CHECK_AND_PRINT_I(WIDE),
  726. CHECK_AND_PRINT_I(DFS),
  727. eeprom_ch_info[ch].flags,
  728. eeprom_ch_info[ch].max_power_avg,
  729. ((eeprom_ch_info[ch].
  730. flags & EEPROM_CHANNEL_IBSS)
  731. && !(eeprom_ch_info[ch].
  732. flags & EEPROM_CHANNEL_RADAR))
  733. ? "" : "not ");
  734. ch_info++;
  735. }
  736. }
  737. /* Check if we do have HT40 channels */
  738. if (il->cfg->ops->lib->eeprom_ops.regulatory_bands[5] ==
  739. EEPROM_REGULATORY_BAND_NO_HT40 &&
  740. il->cfg->ops->lib->eeprom_ops.regulatory_bands[6] ==
  741. EEPROM_REGULATORY_BAND_NO_HT40)
  742. return 0;
  743. /* Two additional EEPROM bands for 2.4 and 5 GHz HT40 channels */
  744. for (band = 6; band <= 7; band++) {
  745. enum ieee80211_band ieeeband;
  746. il_init_band_reference(il, band, &eeprom_ch_count,
  747. &eeprom_ch_info, &eeprom_ch_idx);
  748. /* EEPROM band 6 is 2.4, band 7 is 5 GHz */
  749. ieeeband =
  750. (band == 6) ? IEEE80211_BAND_2GHZ : IEEE80211_BAND_5GHZ;
  751. /* Loop through each band adding each of the channels */
  752. for (ch = 0; ch < eeprom_ch_count; ch++) {
  753. /* Set up driver's info for lower half */
  754. il_mod_ht40_chan_info(il, ieeeband,
  755. eeprom_ch_idx[ch],
  756. &eeprom_ch_info[ch],
  757. IEEE80211_CHAN_NO_HT40PLUS);
  758. /* Set up driver's info for upper half */
  759. il_mod_ht40_chan_info(il, ieeeband,
  760. eeprom_ch_idx[ch] + 4,
  761. &eeprom_ch_info[ch],
  762. IEEE80211_CHAN_NO_HT40MINUS);
  763. }
  764. }
  765. return 0;
  766. }
  767. EXPORT_SYMBOL(il_init_channel_map);
  768. /*
  769. * il_free_channel_map - undo allocations in il_init_channel_map
  770. */
  771. void il_free_channel_map(struct il_priv *il)
  772. {
  773. kfree(il->channel_info);
  774. il->channel_count = 0;
  775. }
  776. EXPORT_SYMBOL(il_free_channel_map);
  777. /**
  778. * il_get_channel_info - Find driver's ilate channel info
  779. *
  780. * Based on band and channel number.
  781. */
  782. const struct
  783. il_channel_info *il_get_channel_info(const struct il_priv *il,
  784. enum ieee80211_band band, u16 channel)
  785. {
  786. int i;
  787. switch (band) {
  788. case IEEE80211_BAND_5GHZ:
  789. for (i = 14; i < il->channel_count; i++) {
  790. if (il->channel_info[i].channel == channel)
  791. return &il->channel_info[i];
  792. }
  793. break;
  794. case IEEE80211_BAND_2GHZ:
  795. if (channel >= 1 && channel <= 14)
  796. return &il->channel_info[channel - 1];
  797. break;
  798. default:
  799. BUG();
  800. }
  801. return NULL;
  802. }
  803. EXPORT_SYMBOL(il_get_channel_info);
  804. /*
  805. * Setting power level allows the card to go to sleep when not busy.
  806. *
  807. * We calculate a sleep command based on the required latency, which
  808. * we get from mac80211. In order to handle thermal throttling, we can
  809. * also use pre-defined power levels.
  810. */
  811. /*
  812. * This defines the old power levels. They are still used by default
  813. * (level 1) and for thermal throttle (levels 3 through 5)
  814. */
  815. struct il_power_vec_entry {
  816. struct il_powertable_cmd cmd;
  817. u8 no_dtim; /* number of skip dtim */
  818. };
  819. static void il_power_sleep_cam_cmd(struct il_priv *il,
  820. struct il_powertable_cmd *cmd)
  821. {
  822. memset(cmd, 0, sizeof(*cmd));
  823. if (il->power_data.pci_pm)
  824. cmd->flags |= IL_POWER_PCI_PM_MSK;
  825. D_POWER("Sleep command for CAM\n");
  826. }
  827. static int
  828. il_set_power(struct il_priv *il, struct il_powertable_cmd *cmd)
  829. {
  830. D_POWER("Sending power/sleep command\n");
  831. D_POWER("Flags value = 0x%08X\n", cmd->flags);
  832. D_POWER("Tx timeout = %u\n",
  833. le32_to_cpu(cmd->tx_data_timeout));
  834. D_POWER("Rx timeout = %u\n",
  835. le32_to_cpu(cmd->rx_data_timeout));
  836. D_POWER(
  837. "Sleep interval vector = { %d , %d , %d , %d , %d }\n",
  838. le32_to_cpu(cmd->sleep_interval[0]),
  839. le32_to_cpu(cmd->sleep_interval[1]),
  840. le32_to_cpu(cmd->sleep_interval[2]),
  841. le32_to_cpu(cmd->sleep_interval[3]),
  842. le32_to_cpu(cmd->sleep_interval[4]));
  843. return il_send_cmd_pdu(il, C_POWER_TBL,
  844. sizeof(struct il_powertable_cmd), cmd);
  845. }
  846. int
  847. il_power_set_mode(struct il_priv *il, struct il_powertable_cmd *cmd,
  848. bool force)
  849. {
  850. int ret;
  851. bool update_chains;
  852. lockdep_assert_held(&il->mutex);
  853. /* Don't update the RX chain when chain noise calibration is running */
  854. update_chains = il->chain_noise_data.state == IL_CHAIN_NOISE_DONE ||
  855. il->chain_noise_data.state == IL_CHAIN_NOISE_ALIVE;
  856. if (!memcmp(&il->power_data.sleep_cmd, cmd, sizeof(*cmd)) && !force)
  857. return 0;
  858. if (!il_is_ready_rf(il))
  859. return -EIO;
  860. /* scan complete use sleep_power_next, need to be updated */
  861. memcpy(&il->power_data.sleep_cmd_next, cmd, sizeof(*cmd));
  862. if (test_bit(S_SCANNING, &il->status) && !force) {
  863. D_INFO("Defer power set mode while scanning\n");
  864. return 0;
  865. }
  866. if (cmd->flags & IL_POWER_DRIVER_ALLOW_SLEEP_MSK)
  867. set_bit(S_POWER_PMI, &il->status);
  868. ret = il_set_power(il, cmd);
  869. if (!ret) {
  870. if (!(cmd->flags & IL_POWER_DRIVER_ALLOW_SLEEP_MSK))
  871. clear_bit(S_POWER_PMI, &il->status);
  872. if (il->cfg->ops->lib->update_chain_flags && update_chains)
  873. il->cfg->ops->lib->update_chain_flags(il);
  874. else if (il->cfg->ops->lib->update_chain_flags)
  875. D_POWER(
  876. "Cannot update the power, chain noise "
  877. "calibration running: %d\n",
  878. il->chain_noise_data.state);
  879. memcpy(&il->power_data.sleep_cmd, cmd, sizeof(*cmd));
  880. } else
  881. IL_ERR("set power fail, ret = %d", ret);
  882. return ret;
  883. }
  884. int il_power_update_mode(struct il_priv *il, bool force)
  885. {
  886. struct il_powertable_cmd cmd;
  887. il_power_sleep_cam_cmd(il, &cmd);
  888. return il_power_set_mode(il, &cmd, force);
  889. }
  890. EXPORT_SYMBOL(il_power_update_mode);
  891. /* initialize to default */
  892. void il_power_initialize(struct il_priv *il)
  893. {
  894. u16 lctl = il_pcie_link_ctl(il);
  895. il->power_data.pci_pm = !(lctl & PCI_CFG_LINK_CTRL_VAL_L0S_EN);
  896. il->power_data.debug_sleep_level_override = -1;
  897. memset(&il->power_data.sleep_cmd, 0,
  898. sizeof(il->power_data.sleep_cmd));
  899. }
  900. EXPORT_SYMBOL(il_power_initialize);
  901. /* For active scan, listen ACTIVE_DWELL_TIME (msec) on each channel after
  902. * sending probe req. This should be set long enough to hear probe responses
  903. * from more than one AP. */
  904. #define IL_ACTIVE_DWELL_TIME_24 (30) /* all times in msec */
  905. #define IL_ACTIVE_DWELL_TIME_52 (20)
  906. #define IL_ACTIVE_DWELL_FACTOR_24GHZ (3)
  907. #define IL_ACTIVE_DWELL_FACTOR_52GHZ (2)
  908. /* For passive scan, listen PASSIVE_DWELL_TIME (msec) on each channel.
  909. * Must be set longer than active dwell time.
  910. * For the most reliable scan, set > AP beacon interval (typically 100msec). */
  911. #define IL_PASSIVE_DWELL_TIME_24 (20) /* all times in msec */
  912. #define IL_PASSIVE_DWELL_TIME_52 (10)
  913. #define IL_PASSIVE_DWELL_BASE (100)
  914. #define IL_CHANNEL_TUNE_TIME 5
  915. static int il_send_scan_abort(struct il_priv *il)
  916. {
  917. int ret;
  918. struct il_rx_pkt *pkt;
  919. struct il_host_cmd cmd = {
  920. .id = C_SCAN_ABORT,
  921. .flags = CMD_WANT_SKB,
  922. };
  923. /* Exit instantly with error when device is not ready
  924. * to receive scan abort command or it does not perform
  925. * hardware scan currently */
  926. if (!test_bit(S_READY, &il->status) ||
  927. !test_bit(S_GEO_CONFIGURED, &il->status) ||
  928. !test_bit(S_SCAN_HW, &il->status) ||
  929. test_bit(S_FW_ERROR, &il->status) ||
  930. test_bit(S_EXIT_PENDING, &il->status))
  931. return -EIO;
  932. ret = il_send_cmd_sync(il, &cmd);
  933. if (ret)
  934. return ret;
  935. pkt = (struct il_rx_pkt *)cmd.reply_page;
  936. if (pkt->u.status != CAN_ABORT_STATUS) {
  937. /* The scan abort will return 1 for success or
  938. * 2 for "failure". A failure condition can be
  939. * due to simply not being in an active scan which
  940. * can occur if we send the scan abort before we
  941. * the microcode has notified us that a scan is
  942. * completed. */
  943. D_SCAN("SCAN_ABORT ret %d.\n", pkt->u.status);
  944. ret = -EIO;
  945. }
  946. il_free_pages(il, cmd.reply_page);
  947. return ret;
  948. }
  949. static void il_complete_scan(struct il_priv *il, bool aborted)
  950. {
  951. /* check if scan was requested from mac80211 */
  952. if (il->scan_request) {
  953. D_SCAN("Complete scan in mac80211\n");
  954. ieee80211_scan_completed(il->hw, aborted);
  955. }
  956. il->scan_vif = NULL;
  957. il->scan_request = NULL;
  958. }
  959. void il_force_scan_end(struct il_priv *il)
  960. {
  961. lockdep_assert_held(&il->mutex);
  962. if (!test_bit(S_SCANNING, &il->status)) {
  963. D_SCAN("Forcing scan end while not scanning\n");
  964. return;
  965. }
  966. D_SCAN("Forcing scan end\n");
  967. clear_bit(S_SCANNING, &il->status);
  968. clear_bit(S_SCAN_HW, &il->status);
  969. clear_bit(S_SCAN_ABORTING, &il->status);
  970. il_complete_scan(il, true);
  971. }
  972. static void il_do_scan_abort(struct il_priv *il)
  973. {
  974. int ret;
  975. lockdep_assert_held(&il->mutex);
  976. if (!test_bit(S_SCANNING, &il->status)) {
  977. D_SCAN("Not performing scan to abort\n");
  978. return;
  979. }
  980. if (test_and_set_bit(S_SCAN_ABORTING, &il->status)) {
  981. D_SCAN("Scan abort in progress\n");
  982. return;
  983. }
  984. ret = il_send_scan_abort(il);
  985. if (ret) {
  986. D_SCAN("Send scan abort failed %d\n", ret);
  987. il_force_scan_end(il);
  988. } else
  989. D_SCAN("Successfully send scan abort\n");
  990. }
  991. /**
  992. * il_scan_cancel - Cancel any currently executing HW scan
  993. */
  994. int il_scan_cancel(struct il_priv *il)
  995. {
  996. D_SCAN("Queuing abort scan\n");
  997. queue_work(il->workqueue, &il->abort_scan);
  998. return 0;
  999. }
  1000. EXPORT_SYMBOL(il_scan_cancel);
  1001. /**
  1002. * il_scan_cancel_timeout - Cancel any currently executing HW scan
  1003. * @ms: amount of time to wait (in milliseconds) for scan to abort
  1004. *
  1005. */
  1006. int il_scan_cancel_timeout(struct il_priv *il, unsigned long ms)
  1007. {
  1008. unsigned long timeout = jiffies + msecs_to_jiffies(ms);
  1009. lockdep_assert_held(&il->mutex);
  1010. D_SCAN("Scan cancel timeout\n");
  1011. il_do_scan_abort(il);
  1012. while (time_before_eq(jiffies, timeout)) {
  1013. if (!test_bit(S_SCAN_HW, &il->status))
  1014. break;
  1015. msleep(20);
  1016. }
  1017. return test_bit(S_SCAN_HW, &il->status);
  1018. }
  1019. EXPORT_SYMBOL(il_scan_cancel_timeout);
  1020. /* Service response to C_SCAN (0x80) */
  1021. static void il_hdl_scan(struct il_priv *il,
  1022. struct il_rx_buf *rxb)
  1023. {
  1024. #ifdef CONFIG_IWLEGACY_DEBUG
  1025. struct il_rx_pkt *pkt = rxb_addr(rxb);
  1026. struct il_scanreq_notification *notif =
  1027. (struct il_scanreq_notification *)pkt->u.raw;
  1028. D_SCAN("Scan request status = 0x%x\n", notif->status);
  1029. #endif
  1030. }
  1031. /* Service N_SCAN_START (0x82) */
  1032. static void il_hdl_scan_start(struct il_priv *il,
  1033. struct il_rx_buf *rxb)
  1034. {
  1035. struct il_rx_pkt *pkt = rxb_addr(rxb);
  1036. struct il_scanstart_notification *notif =
  1037. (struct il_scanstart_notification *)pkt->u.raw;
  1038. il->scan_start_tsf = le32_to_cpu(notif->tsf_low);
  1039. D_SCAN("Scan start: "
  1040. "%d [802.11%s] "
  1041. "(TSF: 0x%08X:%08X) - %d (beacon timer %u)\n",
  1042. notif->channel,
  1043. notif->band ? "bg" : "a",
  1044. le32_to_cpu(notif->tsf_high),
  1045. le32_to_cpu(notif->tsf_low),
  1046. notif->status, notif->beacon_timer);
  1047. }
  1048. /* Service N_SCAN_RESULTS (0x83) */
  1049. static void il_hdl_scan_results(struct il_priv *il,
  1050. struct il_rx_buf *rxb)
  1051. {
  1052. #ifdef CONFIG_IWLEGACY_DEBUG
  1053. struct il_rx_pkt *pkt = rxb_addr(rxb);
  1054. struct il_scanresults_notification *notif =
  1055. (struct il_scanresults_notification *)pkt->u.raw;
  1056. D_SCAN("Scan ch.res: "
  1057. "%d [802.11%s] "
  1058. "(TSF: 0x%08X:%08X) - %d "
  1059. "elapsed=%lu usec\n",
  1060. notif->channel,
  1061. notif->band ? "bg" : "a",
  1062. le32_to_cpu(notif->tsf_high),
  1063. le32_to_cpu(notif->tsf_low),
  1064. le32_to_cpu(notif->stats[0]),
  1065. le32_to_cpu(notif->tsf_low) - il->scan_start_tsf);
  1066. #endif
  1067. }
  1068. /* Service N_SCAN_COMPLETE (0x84) */
  1069. static void il_hdl_scan_complete(struct il_priv *il,
  1070. struct il_rx_buf *rxb)
  1071. {
  1072. #ifdef CONFIG_IWLEGACY_DEBUG
  1073. struct il_rx_pkt *pkt = rxb_addr(rxb);
  1074. struct il_scancomplete_notification *scan_notif = (void *)pkt->u.raw;
  1075. #endif
  1076. D_SCAN(
  1077. "Scan complete: %d channels (TSF 0x%08X:%08X) - %d\n",
  1078. scan_notif->scanned_channels,
  1079. scan_notif->tsf_low,
  1080. scan_notif->tsf_high, scan_notif->status);
  1081. /* The HW is no longer scanning */
  1082. clear_bit(S_SCAN_HW, &il->status);
  1083. D_SCAN("Scan on %sGHz took %dms\n",
  1084. (il->scan_band == IEEE80211_BAND_2GHZ) ? "2.4" : "5.2",
  1085. jiffies_to_msecs(jiffies - il->scan_start));
  1086. queue_work(il->workqueue, &il->scan_completed);
  1087. }
  1088. void il_setup_rx_scan_handlers(struct il_priv *il)
  1089. {
  1090. /* scan handlers */
  1091. il->handlers[C_SCAN] = il_hdl_scan;
  1092. il->handlers[N_SCAN_START] =
  1093. il_hdl_scan_start;
  1094. il->handlers[N_SCAN_RESULTS] =
  1095. il_hdl_scan_results;
  1096. il->handlers[N_SCAN_COMPLETE] =
  1097. il_hdl_scan_complete;
  1098. }
  1099. EXPORT_SYMBOL(il_setup_rx_scan_handlers);
  1100. inline u16 il_get_active_dwell_time(struct il_priv *il,
  1101. enum ieee80211_band band,
  1102. u8 n_probes)
  1103. {
  1104. if (band == IEEE80211_BAND_5GHZ)
  1105. return IL_ACTIVE_DWELL_TIME_52 +
  1106. IL_ACTIVE_DWELL_FACTOR_52GHZ * (n_probes + 1);
  1107. else
  1108. return IL_ACTIVE_DWELL_TIME_24 +
  1109. IL_ACTIVE_DWELL_FACTOR_24GHZ * (n_probes + 1);
  1110. }
  1111. EXPORT_SYMBOL(il_get_active_dwell_time);
  1112. u16 il_get_passive_dwell_time(struct il_priv *il,
  1113. enum ieee80211_band band,
  1114. struct ieee80211_vif *vif)
  1115. {
  1116. struct il_rxon_context *ctx = &il->ctx;
  1117. u16 value;
  1118. u16 passive = (band == IEEE80211_BAND_2GHZ) ?
  1119. IL_PASSIVE_DWELL_BASE + IL_PASSIVE_DWELL_TIME_24 :
  1120. IL_PASSIVE_DWELL_BASE + IL_PASSIVE_DWELL_TIME_52;
  1121. if (il_is_any_associated(il)) {
  1122. /*
  1123. * If we're associated, we clamp the maximum passive
  1124. * dwell time to be 98% of the smallest beacon interval
  1125. * (minus 2 * channel tune time)
  1126. */
  1127. value = ctx->vif ? ctx->vif->bss_conf.beacon_int : 0;
  1128. if (value > IL_PASSIVE_DWELL_BASE || !value)
  1129. value = IL_PASSIVE_DWELL_BASE;
  1130. value = (value * 98) / 100 - IL_CHANNEL_TUNE_TIME * 2;
  1131. passive = min(value, passive);
  1132. }
  1133. return passive;
  1134. }
  1135. EXPORT_SYMBOL(il_get_passive_dwell_time);
  1136. void il_init_scan_params(struct il_priv *il)
  1137. {
  1138. u8 ant_idx = fls(il->hw_params.valid_tx_ant) - 1;
  1139. if (!il->scan_tx_ant[IEEE80211_BAND_5GHZ])
  1140. il->scan_tx_ant[IEEE80211_BAND_5GHZ] = ant_idx;
  1141. if (!il->scan_tx_ant[IEEE80211_BAND_2GHZ])
  1142. il->scan_tx_ant[IEEE80211_BAND_2GHZ] = ant_idx;
  1143. }
  1144. EXPORT_SYMBOL(il_init_scan_params);
  1145. static int il_scan_initiate(struct il_priv *il,
  1146. struct ieee80211_vif *vif)
  1147. {
  1148. int ret;
  1149. lockdep_assert_held(&il->mutex);
  1150. if (WARN_ON(!il->cfg->ops->utils->request_scan))
  1151. return -EOPNOTSUPP;
  1152. cancel_delayed_work(&il->scan_check);
  1153. if (!il_is_ready_rf(il)) {
  1154. IL_WARN("Request scan called when driver not ready.\n");
  1155. return -EIO;
  1156. }
  1157. if (test_bit(S_SCAN_HW, &il->status)) {
  1158. D_SCAN(
  1159. "Multiple concurrent scan requests in parallel.\n");
  1160. return -EBUSY;
  1161. }
  1162. if (test_bit(S_SCAN_ABORTING, &il->status)) {
  1163. D_SCAN("Scan request while abort pending.\n");
  1164. return -EBUSY;
  1165. }
  1166. D_SCAN("Starting scan...\n");
  1167. set_bit(S_SCANNING, &il->status);
  1168. il->scan_start = jiffies;
  1169. ret = il->cfg->ops->utils->request_scan(il, vif);
  1170. if (ret) {
  1171. clear_bit(S_SCANNING, &il->status);
  1172. return ret;
  1173. }
  1174. queue_delayed_work(il->workqueue, &il->scan_check,
  1175. IL_SCAN_CHECK_WATCHDOG);
  1176. return 0;
  1177. }
  1178. int il_mac_hw_scan(struct ieee80211_hw *hw,
  1179. struct ieee80211_vif *vif,
  1180. struct cfg80211_scan_request *req)
  1181. {
  1182. struct il_priv *il = hw->priv;
  1183. int ret;
  1184. D_MAC80211("enter\n");
  1185. if (req->n_channels == 0)
  1186. return -EINVAL;
  1187. mutex_lock(&il->mutex);
  1188. if (test_bit(S_SCANNING, &il->status)) {
  1189. D_SCAN("Scan already in progress.\n");
  1190. ret = -EAGAIN;
  1191. goto out_unlock;
  1192. }
  1193. /* mac80211 will only ask for one band at a time */
  1194. il->scan_request = req;
  1195. il->scan_vif = vif;
  1196. il->scan_band = req->channels[0]->band;
  1197. ret = il_scan_initiate(il, vif);
  1198. D_MAC80211("leave\n");
  1199. out_unlock:
  1200. mutex_unlock(&il->mutex);
  1201. return ret;
  1202. }
  1203. EXPORT_SYMBOL(il_mac_hw_scan);
  1204. static void il_bg_scan_check(struct work_struct *data)
  1205. {
  1206. struct il_priv *il =
  1207. container_of(data, struct il_priv, scan_check.work);
  1208. D_SCAN("Scan check work\n");
  1209. /* Since we are here firmware does not finish scan and
  1210. * most likely is in bad shape, so we don't bother to
  1211. * send abort command, just force scan complete to mac80211 */
  1212. mutex_lock(&il->mutex);
  1213. il_force_scan_end(il);
  1214. mutex_unlock(&il->mutex);
  1215. }
  1216. /**
  1217. * il_fill_probe_req - fill in all required fields and IE for probe request
  1218. */
  1219. u16
  1220. il_fill_probe_req(struct il_priv *il, struct ieee80211_mgmt *frame,
  1221. const u8 *ta, const u8 *ies, int ie_len, int left)
  1222. {
  1223. int len = 0;
  1224. u8 *pos = NULL;
  1225. /* Make sure there is enough space for the probe request,
  1226. * two mandatory IEs and the data */
  1227. left -= 24;
  1228. if (left < 0)
  1229. return 0;
  1230. frame->frame_control = cpu_to_le16(IEEE80211_STYPE_PROBE_REQ);
  1231. memcpy(frame->da, il_bcast_addr, ETH_ALEN);
  1232. memcpy(frame->sa, ta, ETH_ALEN);
  1233. memcpy(frame->bssid, il_bcast_addr, ETH_ALEN);
  1234. frame->seq_ctrl = 0;
  1235. len += 24;
  1236. /* ...next IE... */
  1237. pos = &frame->u.probe_req.variable[0];
  1238. /* fill in our indirect SSID IE */
  1239. left -= 2;
  1240. if (left < 0)
  1241. return 0;
  1242. *pos++ = WLAN_EID_SSID;
  1243. *pos++ = 0;
  1244. len += 2;
  1245. if (WARN_ON(left < ie_len))
  1246. return len;
  1247. if (ies && ie_len) {
  1248. memcpy(pos, ies, ie_len);
  1249. len += ie_len;
  1250. }
  1251. return (u16)len;
  1252. }
  1253. EXPORT_SYMBOL(il_fill_probe_req);
  1254. static void il_bg_abort_scan(struct work_struct *work)
  1255. {
  1256. struct il_priv *il = container_of(work, struct il_priv, abort_scan);
  1257. D_SCAN("Abort scan work\n");
  1258. /* We keep scan_check work queued in case when firmware will not
  1259. * report back scan completed notification */
  1260. mutex_lock(&il->mutex);
  1261. il_scan_cancel_timeout(il, 200);
  1262. mutex_unlock(&il->mutex);
  1263. }
  1264. static void il_bg_scan_completed(struct work_struct *work)
  1265. {
  1266. struct il_priv *il =
  1267. container_of(work, struct il_priv, scan_completed);
  1268. bool aborted;
  1269. D_SCAN("Completed scan.\n");
  1270. cancel_delayed_work(&il->scan_check);
  1271. mutex_lock(&il->mutex);
  1272. aborted = test_and_clear_bit(S_SCAN_ABORTING, &il->status);
  1273. if (aborted)
  1274. D_SCAN("Aborted scan completed.\n");
  1275. if (!test_and_clear_bit(S_SCANNING, &il->status)) {
  1276. D_SCAN("Scan already completed.\n");
  1277. goto out_settings;
  1278. }
  1279. il_complete_scan(il, aborted);
  1280. out_settings:
  1281. /* Can we still talk to firmware ? */
  1282. if (!il_is_ready_rf(il))
  1283. goto out;
  1284. /*
  1285. * We do not commit power settings while scan is pending,
  1286. * do it now if the settings changed.
  1287. */
  1288. il_power_set_mode(il, &il->power_data.sleep_cmd_next, false);
  1289. il_set_tx_power(il, il->tx_power_next, false);
  1290. il->cfg->ops->utils->post_scan(il);
  1291. out:
  1292. mutex_unlock(&il->mutex);
  1293. }
  1294. void il_setup_scan_deferred_work(struct il_priv *il)
  1295. {
  1296. INIT_WORK(&il->scan_completed, il_bg_scan_completed);
  1297. INIT_WORK(&il->abort_scan, il_bg_abort_scan);
  1298. INIT_DELAYED_WORK(&il->scan_check, il_bg_scan_check);
  1299. }
  1300. EXPORT_SYMBOL(il_setup_scan_deferred_work);
  1301. void il_cancel_scan_deferred_work(struct il_priv *il)
  1302. {
  1303. cancel_work_sync(&il->abort_scan);
  1304. cancel_work_sync(&il->scan_completed);
  1305. if (cancel_delayed_work_sync(&il->scan_check)) {
  1306. mutex_lock(&il->mutex);
  1307. il_force_scan_end(il);
  1308. mutex_unlock(&il->mutex);
  1309. }
  1310. }
  1311. EXPORT_SYMBOL(il_cancel_scan_deferred_work);
  1312. /* il->sta_lock must be held */
  1313. static void il_sta_ucode_activate(struct il_priv *il, u8 sta_id)
  1314. {
  1315. if (!(il->stations[sta_id].used & IL_STA_DRIVER_ACTIVE))
  1316. IL_ERR(
  1317. "ACTIVATE a non DRIVER active station id %u addr %pM\n",
  1318. sta_id, il->stations[sta_id].sta.sta.addr);
  1319. if (il->stations[sta_id].used & IL_STA_UCODE_ACTIVE) {
  1320. D_ASSOC(
  1321. "STA id %u addr %pM already present"
  1322. " in uCode (according to driver)\n",
  1323. sta_id, il->stations[sta_id].sta.sta.addr);
  1324. } else {
  1325. il->stations[sta_id].used |= IL_STA_UCODE_ACTIVE;
  1326. D_ASSOC("Added STA id %u addr %pM to uCode\n",
  1327. sta_id, il->stations[sta_id].sta.sta.addr);
  1328. }
  1329. }
  1330. static int il_process_add_sta_resp(struct il_priv *il,
  1331. struct il_addsta_cmd *addsta,
  1332. struct il_rx_pkt *pkt,
  1333. bool sync)
  1334. {
  1335. u8 sta_id = addsta->sta.sta_id;
  1336. unsigned long flags;
  1337. int ret = -EIO;
  1338. if (pkt->hdr.flags & IL_CMD_FAILED_MSK) {
  1339. IL_ERR("Bad return from C_ADD_STA (0x%08X)\n",
  1340. pkt->hdr.flags);
  1341. return ret;
  1342. }
  1343. D_INFO("Processing response for adding station %u\n",
  1344. sta_id);
  1345. spin_lock_irqsave(&il->sta_lock, flags);
  1346. switch (pkt->u.add_sta.status) {
  1347. case ADD_STA_SUCCESS_MSK:
  1348. D_INFO("C_ADD_STA PASSED\n");
  1349. il_sta_ucode_activate(il, sta_id);
  1350. ret = 0;
  1351. break;
  1352. case ADD_STA_NO_ROOM_IN_TBL:
  1353. IL_ERR("Adding station %d failed, no room in table.\n",
  1354. sta_id);
  1355. break;
  1356. case ADD_STA_NO_BLOCK_ACK_RESOURCE:
  1357. IL_ERR(
  1358. "Adding station %d failed, no block ack resource.\n",
  1359. sta_id);
  1360. break;
  1361. case ADD_STA_MODIFY_NON_EXIST_STA:
  1362. IL_ERR("Attempting to modify non-existing station %d\n",
  1363. sta_id);
  1364. break;
  1365. default:
  1366. D_ASSOC("Received C_ADD_STA:(0x%08X)\n",
  1367. pkt->u.add_sta.status);
  1368. break;
  1369. }
  1370. D_INFO("%s station id %u addr %pM\n",
  1371. il->stations[sta_id].sta.mode ==
  1372. STA_CONTROL_MODIFY_MSK ? "Modified" : "Added",
  1373. sta_id, il->stations[sta_id].sta.sta.addr);
  1374. /*
  1375. * XXX: The MAC address in the command buffer is often changed from
  1376. * the original sent to the device. That is, the MAC address
  1377. * written to the command buffer often is not the same MAC address
  1378. * read from the command buffer when the command returns. This
  1379. * issue has not yet been resolved and this debugging is left to
  1380. * observe the problem.
  1381. */
  1382. D_INFO("%s station according to cmd buffer %pM\n",
  1383. il->stations[sta_id].sta.mode ==
  1384. STA_CONTROL_MODIFY_MSK ? "Modified" : "Added",
  1385. addsta->sta.addr);
  1386. spin_unlock_irqrestore(&il->sta_lock, flags);
  1387. return ret;
  1388. }
  1389. static void il_add_sta_callback(struct il_priv *il,
  1390. struct il_device_cmd *cmd,
  1391. struct il_rx_pkt *pkt)
  1392. {
  1393. struct il_addsta_cmd *addsta =
  1394. (struct il_addsta_cmd *)cmd->cmd.payload;
  1395. il_process_add_sta_resp(il, addsta, pkt, false);
  1396. }
  1397. int il_send_add_sta(struct il_priv *il,
  1398. struct il_addsta_cmd *sta, u8 flags)
  1399. {
  1400. struct il_rx_pkt *pkt = NULL;
  1401. int ret = 0;
  1402. u8 data[sizeof(*sta)];
  1403. struct il_host_cmd cmd = {
  1404. .id = C_ADD_STA,
  1405. .flags = flags,
  1406. .data = data,
  1407. };
  1408. u8 sta_id __maybe_unused = sta->sta.sta_id;
  1409. D_INFO("Adding sta %u (%pM) %ssynchronously\n",
  1410. sta_id, sta->sta.addr, flags & CMD_ASYNC ? "a" : "");
  1411. if (flags & CMD_ASYNC)
  1412. cmd.callback = il_add_sta_callback;
  1413. else {
  1414. cmd.flags |= CMD_WANT_SKB;
  1415. might_sleep();
  1416. }
  1417. cmd.len = il->cfg->ops->utils->build_addsta_hcmd(sta, data);
  1418. ret = il_send_cmd(il, &cmd);
  1419. if (ret || (flags & CMD_ASYNC))
  1420. return ret;
  1421. if (ret == 0) {
  1422. pkt = (struct il_rx_pkt *)cmd.reply_page;
  1423. ret = il_process_add_sta_resp(il, sta, pkt, true);
  1424. }
  1425. il_free_pages(il, cmd.reply_page);
  1426. return ret;
  1427. }
  1428. EXPORT_SYMBOL(il_send_add_sta);
  1429. static void il_set_ht_add_station(struct il_priv *il, u8 idx,
  1430. struct ieee80211_sta *sta,
  1431. struct il_rxon_context *ctx)
  1432. {
  1433. struct ieee80211_sta_ht_cap *sta_ht_inf = &sta->ht_cap;
  1434. __le32 sta_flags;
  1435. u8 mimo_ps_mode;
  1436. if (!sta || !sta_ht_inf->ht_supported)
  1437. goto done;
  1438. mimo_ps_mode = (sta_ht_inf->cap & IEEE80211_HT_CAP_SM_PS) >> 2;
  1439. D_ASSOC("spatial multiplexing power save mode: %s\n",
  1440. (mimo_ps_mode == WLAN_HT_CAP_SM_PS_STATIC) ?
  1441. "static" :
  1442. (mimo_ps_mode == WLAN_HT_CAP_SM_PS_DYNAMIC) ?
  1443. "dynamic" : "disabled");
  1444. sta_flags = il->stations[idx].sta.station_flags;
  1445. sta_flags &= ~(STA_FLG_RTS_MIMO_PROT_MSK | STA_FLG_MIMO_DIS_MSK);
  1446. switch (mimo_ps_mode) {
  1447. case WLAN_HT_CAP_SM_PS_STATIC:
  1448. sta_flags |= STA_FLG_MIMO_DIS_MSK;
  1449. break;
  1450. case WLAN_HT_CAP_SM_PS_DYNAMIC:
  1451. sta_flags |= STA_FLG_RTS_MIMO_PROT_MSK;
  1452. break;
  1453. case WLAN_HT_CAP_SM_PS_DISABLED:
  1454. break;
  1455. default:
  1456. IL_WARN("Invalid MIMO PS mode %d\n", mimo_ps_mode);
  1457. break;
  1458. }
  1459. sta_flags |= cpu_to_le32(
  1460. (u32)sta_ht_inf->ampdu_factor << STA_FLG_MAX_AGG_SIZE_POS);
  1461. sta_flags |= cpu_to_le32(
  1462. (u32)sta_ht_inf->ampdu_density << STA_FLG_AGG_MPDU_DENSITY_POS);
  1463. if (il_is_ht40_tx_allowed(il, ctx, &sta->ht_cap))
  1464. sta_flags |= STA_FLG_HT40_EN_MSK;
  1465. else
  1466. sta_flags &= ~STA_FLG_HT40_EN_MSK;
  1467. il->stations[idx].sta.station_flags = sta_flags;
  1468. done:
  1469. return;
  1470. }
  1471. /**
  1472. * il_prep_station - Prepare station information for addition
  1473. *
  1474. * should be called with sta_lock held
  1475. */
  1476. u8 il_prep_station(struct il_priv *il, struct il_rxon_context *ctx,
  1477. const u8 *addr, bool is_ap, struct ieee80211_sta *sta)
  1478. {
  1479. struct il_station_entry *station;
  1480. int i;
  1481. u8 sta_id = IL_INVALID_STATION;
  1482. u16 rate;
  1483. if (is_ap)
  1484. sta_id = ctx->ap_sta_id;
  1485. else if (is_broadcast_ether_addr(addr))
  1486. sta_id = ctx->bcast_sta_id;
  1487. else
  1488. for (i = IL_STA_ID; i < il->hw_params.max_stations; i++) {
  1489. if (!compare_ether_addr(il->stations[i].sta.sta.addr,
  1490. addr)) {
  1491. sta_id = i;
  1492. break;
  1493. }
  1494. if (!il->stations[i].used &&
  1495. sta_id == IL_INVALID_STATION)
  1496. sta_id = i;
  1497. }
  1498. /*
  1499. * These two conditions have the same outcome, but keep them
  1500. * separate
  1501. */
  1502. if (unlikely(sta_id == IL_INVALID_STATION))
  1503. return sta_id;
  1504. /*
  1505. * uCode is not able to deal with multiple requests to add a
  1506. * station. Keep track if one is in progress so that we do not send
  1507. * another.
  1508. */
  1509. if (il->stations[sta_id].used & IL_STA_UCODE_INPROGRESS) {
  1510. D_INFO(
  1511. "STA %d already in process of being added.\n",
  1512. sta_id);
  1513. return sta_id;
  1514. }
  1515. if ((il->stations[sta_id].used & IL_STA_DRIVER_ACTIVE) &&
  1516. (il->stations[sta_id].used & IL_STA_UCODE_ACTIVE) &&
  1517. !compare_ether_addr(il->stations[sta_id].sta.sta.addr, addr)) {
  1518. D_ASSOC(
  1519. "STA %d (%pM) already added, not adding again.\n",
  1520. sta_id, addr);
  1521. return sta_id;
  1522. }
  1523. station = &il->stations[sta_id];
  1524. station->used = IL_STA_DRIVER_ACTIVE;
  1525. D_ASSOC("Add STA to driver ID %d: %pM\n",
  1526. sta_id, addr);
  1527. il->num_stations++;
  1528. /* Set up the C_ADD_STA command to send to device */
  1529. memset(&station->sta, 0, sizeof(struct il_addsta_cmd));
  1530. memcpy(station->sta.sta.addr, addr, ETH_ALEN);
  1531. station->sta.mode = 0;
  1532. station->sta.sta.sta_id = sta_id;
  1533. station->sta.station_flags = ctx->station_flags;
  1534. station->ctxid = ctx->ctxid;
  1535. if (sta) {
  1536. struct il_station_priv_common *sta_priv;
  1537. sta_priv = (void *)sta->drv_priv;
  1538. sta_priv->ctx = ctx;
  1539. }
  1540. /*
  1541. * OK to call unconditionally, since local stations (IBSS BSSID
  1542. * STA and broadcast STA) pass in a NULL sta, and mac80211
  1543. * doesn't allow HT IBSS.
  1544. */
  1545. il_set_ht_add_station(il, sta_id, sta, ctx);
  1546. /* 3945 only */
  1547. rate = (il->band == IEEE80211_BAND_5GHZ) ?
  1548. RATE_6M_PLCP : RATE_1M_PLCP;
  1549. /* Turn on both antennas for the station... */
  1550. station->sta.rate_n_flags = cpu_to_le16(rate | RATE_MCS_ANT_AB_MSK);
  1551. return sta_id;
  1552. }
  1553. EXPORT_SYMBOL_GPL(il_prep_station);
  1554. #define STA_WAIT_TIMEOUT (HZ/2)
  1555. /**
  1556. * il_add_station_common -
  1557. */
  1558. int
  1559. il_add_station_common(struct il_priv *il,
  1560. struct il_rxon_context *ctx,
  1561. const u8 *addr, bool is_ap,
  1562. struct ieee80211_sta *sta, u8 *sta_id_r)
  1563. {
  1564. unsigned long flags_spin;
  1565. int ret = 0;
  1566. u8 sta_id;
  1567. struct il_addsta_cmd sta_cmd;
  1568. *sta_id_r = 0;
  1569. spin_lock_irqsave(&il->sta_lock, flags_spin);
  1570. sta_id = il_prep_station(il, ctx, addr, is_ap, sta);
  1571. if (sta_id == IL_INVALID_STATION) {
  1572. IL_ERR("Unable to prepare station %pM for addition\n",
  1573. addr);
  1574. spin_unlock_irqrestore(&il->sta_lock, flags_spin);
  1575. return -EINVAL;
  1576. }
  1577. /*
  1578. * uCode is not able to deal with multiple requests to add a
  1579. * station. Keep track if one is in progress so that we do not send
  1580. * another.
  1581. */
  1582. if (il->stations[sta_id].used & IL_STA_UCODE_INPROGRESS) {
  1583. D_INFO(
  1584. "STA %d already in process of being added.\n",
  1585. sta_id);
  1586. spin_unlock_irqrestore(&il->sta_lock, flags_spin);
  1587. return -EEXIST;
  1588. }
  1589. if ((il->stations[sta_id].used & IL_STA_DRIVER_ACTIVE) &&
  1590. (il->stations[sta_id].used & IL_STA_UCODE_ACTIVE)) {
  1591. D_ASSOC(
  1592. "STA %d (%pM) already added, not adding again.\n",
  1593. sta_id, addr);
  1594. spin_unlock_irqrestore(&il->sta_lock, flags_spin);
  1595. return -EEXIST;
  1596. }
  1597. il->stations[sta_id].used |= IL_STA_UCODE_INPROGRESS;
  1598. memcpy(&sta_cmd, &il->stations[sta_id].sta,
  1599. sizeof(struct il_addsta_cmd));
  1600. spin_unlock_irqrestore(&il->sta_lock, flags_spin);
  1601. /* Add station to device's station table */
  1602. ret = il_send_add_sta(il, &sta_cmd, CMD_SYNC);
  1603. if (ret) {
  1604. spin_lock_irqsave(&il->sta_lock, flags_spin);
  1605. IL_ERR("Adding station %pM failed.\n",
  1606. il->stations[sta_id].sta.sta.addr);
  1607. il->stations[sta_id].used &= ~IL_STA_DRIVER_ACTIVE;
  1608. il->stations[sta_id].used &= ~IL_STA_UCODE_INPROGRESS;
  1609. spin_unlock_irqrestore(&il->sta_lock, flags_spin);
  1610. }
  1611. *sta_id_r = sta_id;
  1612. return ret;
  1613. }
  1614. EXPORT_SYMBOL(il_add_station_common);
  1615. /**
  1616. * il_sta_ucode_deactivate - deactivate ucode status for a station
  1617. *
  1618. * il->sta_lock must be held
  1619. */
  1620. static void il_sta_ucode_deactivate(struct il_priv *il, u8 sta_id)
  1621. {
  1622. /* Ucode must be active and driver must be non active */
  1623. if ((il->stations[sta_id].used &
  1624. (IL_STA_UCODE_ACTIVE | IL_STA_DRIVER_ACTIVE)) !=
  1625. IL_STA_UCODE_ACTIVE)
  1626. IL_ERR("removed non active STA %u\n", sta_id);
  1627. il->stations[sta_id].used &= ~IL_STA_UCODE_ACTIVE;
  1628. memset(&il->stations[sta_id], 0, sizeof(struct il_station_entry));
  1629. D_ASSOC("Removed STA %u\n", sta_id);
  1630. }
  1631. static int il_send_remove_station(struct il_priv *il,
  1632. const u8 *addr, int sta_id,
  1633. bool temporary)
  1634. {
  1635. struct il_rx_pkt *pkt;
  1636. int ret;
  1637. unsigned long flags_spin;
  1638. struct il_rem_sta_cmd rm_sta_cmd;
  1639. struct il_host_cmd cmd = {
  1640. .id = C_REM_STA,
  1641. .len = sizeof(struct il_rem_sta_cmd),
  1642. .flags = CMD_SYNC,
  1643. .data = &rm_sta_cmd,
  1644. };
  1645. memset(&rm_sta_cmd, 0, sizeof(rm_sta_cmd));
  1646. rm_sta_cmd.num_sta = 1;
  1647. memcpy(&rm_sta_cmd.addr, addr, ETH_ALEN);
  1648. cmd.flags |= CMD_WANT_SKB;
  1649. ret = il_send_cmd(il, &cmd);
  1650. if (ret)
  1651. return ret;
  1652. pkt = (struct il_rx_pkt *)cmd.reply_page;
  1653. if (pkt->hdr.flags & IL_CMD_FAILED_MSK) {
  1654. IL_ERR("Bad return from C_REM_STA (0x%08X)\n",
  1655. pkt->hdr.flags);
  1656. ret = -EIO;
  1657. }
  1658. if (!ret) {
  1659. switch (pkt->u.rem_sta.status) {
  1660. case REM_STA_SUCCESS_MSK:
  1661. if (!temporary) {
  1662. spin_lock_irqsave(&il->sta_lock, flags_spin);
  1663. il_sta_ucode_deactivate(il, sta_id);
  1664. spin_unlock_irqrestore(&il->sta_lock,
  1665. flags_spin);
  1666. }
  1667. D_ASSOC("C_REM_STA PASSED\n");
  1668. break;
  1669. default:
  1670. ret = -EIO;
  1671. IL_ERR("C_REM_STA failed\n");
  1672. break;
  1673. }
  1674. }
  1675. il_free_pages(il, cmd.reply_page);
  1676. return ret;
  1677. }
  1678. /**
  1679. * il_remove_station - Remove driver's knowledge of station.
  1680. */
  1681. int il_remove_station(struct il_priv *il, const u8 sta_id,
  1682. const u8 *addr)
  1683. {
  1684. unsigned long flags;
  1685. if (!il_is_ready(il)) {
  1686. D_INFO(
  1687. "Unable to remove station %pM, device not ready.\n",
  1688. addr);
  1689. /*
  1690. * It is typical for stations to be removed when we are
  1691. * going down. Return success since device will be down
  1692. * soon anyway
  1693. */
  1694. return 0;
  1695. }
  1696. D_ASSOC("Removing STA from driver:%d %pM\n",
  1697. sta_id, addr);
  1698. if (WARN_ON(sta_id == IL_INVALID_STATION))
  1699. return -EINVAL;
  1700. spin_lock_irqsave(&il->sta_lock, flags);
  1701. if (!(il->stations[sta_id].used & IL_STA_DRIVER_ACTIVE)) {
  1702. D_INFO("Removing %pM but non DRIVER active\n",
  1703. addr);
  1704. goto out_err;
  1705. }
  1706. if (!(il->stations[sta_id].used & IL_STA_UCODE_ACTIVE)) {
  1707. D_INFO("Removing %pM but non UCODE active\n",
  1708. addr);
  1709. goto out_err;
  1710. }
  1711. if (il->stations[sta_id].used & IL_STA_LOCAL) {
  1712. kfree(il->stations[sta_id].lq);
  1713. il->stations[sta_id].lq = NULL;
  1714. }
  1715. il->stations[sta_id].used &= ~IL_STA_DRIVER_ACTIVE;
  1716. il->num_stations--;
  1717. BUG_ON(il->num_stations < 0);
  1718. spin_unlock_irqrestore(&il->sta_lock, flags);
  1719. return il_send_remove_station(il, addr, sta_id, false);
  1720. out_err:
  1721. spin_unlock_irqrestore(&il->sta_lock, flags);
  1722. return -EINVAL;
  1723. }
  1724. EXPORT_SYMBOL_GPL(il_remove_station);
  1725. /**
  1726. * il_clear_ucode_stations - clear ucode station table bits
  1727. *
  1728. * This function clears all the bits in the driver indicating
  1729. * which stations are active in the ucode. Call when something
  1730. * other than explicit station management would cause this in
  1731. * the ucode, e.g. unassociated RXON.
  1732. */
  1733. void il_clear_ucode_stations(struct il_priv *il,
  1734. struct il_rxon_context *ctx)
  1735. {
  1736. int i;
  1737. unsigned long flags_spin;
  1738. bool cleared = false;
  1739. D_INFO("Clearing ucode stations in driver\n");
  1740. spin_lock_irqsave(&il->sta_lock, flags_spin);
  1741. for (i = 0; i < il->hw_params.max_stations; i++) {
  1742. if (ctx && ctx->ctxid != il->stations[i].ctxid)
  1743. continue;
  1744. if (il->stations[i].used & IL_STA_UCODE_ACTIVE) {
  1745. D_INFO(
  1746. "Clearing ucode active for station %d\n", i);
  1747. il->stations[i].used &= ~IL_STA_UCODE_ACTIVE;
  1748. cleared = true;
  1749. }
  1750. }
  1751. spin_unlock_irqrestore(&il->sta_lock, flags_spin);
  1752. if (!cleared)
  1753. D_INFO(
  1754. "No active stations found to be cleared\n");
  1755. }
  1756. EXPORT_SYMBOL(il_clear_ucode_stations);
  1757. /**
  1758. * il_restore_stations() - Restore driver known stations to device
  1759. *
  1760. * All stations considered active by driver, but not present in ucode, is
  1761. * restored.
  1762. *
  1763. * Function sleeps.
  1764. */
  1765. void
  1766. il_restore_stations(struct il_priv *il, struct il_rxon_context *ctx)
  1767. {
  1768. struct il_addsta_cmd sta_cmd;
  1769. struct il_link_quality_cmd lq;
  1770. unsigned long flags_spin;
  1771. int i;
  1772. bool found = false;
  1773. int ret;
  1774. bool send_lq;
  1775. if (!il_is_ready(il)) {
  1776. D_INFO(
  1777. "Not ready yet, not restoring any stations.\n");
  1778. return;
  1779. }
  1780. D_ASSOC("Restoring all known stations ... start.\n");
  1781. spin_lock_irqsave(&il->sta_lock, flags_spin);
  1782. for (i = 0; i < il->hw_params.max_stations; i++) {
  1783. if (ctx->ctxid != il->stations[i].ctxid)
  1784. continue;
  1785. if ((il->stations[i].used & IL_STA_DRIVER_ACTIVE) &&
  1786. !(il->stations[i].used & IL_STA_UCODE_ACTIVE)) {
  1787. D_ASSOC("Restoring sta %pM\n",
  1788. il->stations[i].sta.sta.addr);
  1789. il->stations[i].sta.mode = 0;
  1790. il->stations[i].used |= IL_STA_UCODE_INPROGRESS;
  1791. found = true;
  1792. }
  1793. }
  1794. for (i = 0; i < il->hw_params.max_stations; i++) {
  1795. if ((il->stations[i].used & IL_STA_UCODE_INPROGRESS)) {
  1796. memcpy(&sta_cmd, &il->stations[i].sta,
  1797. sizeof(struct il_addsta_cmd));
  1798. send_lq = false;
  1799. if (il->stations[i].lq) {
  1800. memcpy(&lq, il->stations[i].lq,
  1801. sizeof(struct il_link_quality_cmd));
  1802. send_lq = true;
  1803. }
  1804. spin_unlock_irqrestore(&il->sta_lock, flags_spin);
  1805. ret = il_send_add_sta(il, &sta_cmd, CMD_SYNC);
  1806. if (ret) {
  1807. spin_lock_irqsave(&il->sta_lock, flags_spin);
  1808. IL_ERR("Adding station %pM failed.\n",
  1809. il->stations[i].sta.sta.addr);
  1810. il->stations[i].used &=
  1811. ~IL_STA_DRIVER_ACTIVE;
  1812. il->stations[i].used &=
  1813. ~IL_STA_UCODE_INPROGRESS;
  1814. spin_unlock_irqrestore(&il->sta_lock,
  1815. flags_spin);
  1816. }
  1817. /*
  1818. * Rate scaling has already been initialized, send
  1819. * current LQ command
  1820. */
  1821. if (send_lq)
  1822. il_send_lq_cmd(il, ctx, &lq,
  1823. CMD_SYNC, true);
  1824. spin_lock_irqsave(&il->sta_lock, flags_spin);
  1825. il->stations[i].used &= ~IL_STA_UCODE_INPROGRESS;
  1826. }
  1827. }
  1828. spin_unlock_irqrestore(&il->sta_lock, flags_spin);
  1829. if (!found)
  1830. D_INFO("Restoring all known stations"
  1831. " .... no stations to be restored.\n");
  1832. else
  1833. D_INFO("Restoring all known stations"
  1834. " .... complete.\n");
  1835. }
  1836. EXPORT_SYMBOL(il_restore_stations);
  1837. int il_get_free_ucode_key_idx(struct il_priv *il)
  1838. {
  1839. int i;
  1840. for (i = 0; i < il->sta_key_max_num; i++)
  1841. if (!test_and_set_bit(i, &il->ucode_key_table))
  1842. return i;
  1843. return WEP_INVALID_OFFSET;
  1844. }
  1845. EXPORT_SYMBOL(il_get_free_ucode_key_idx);
  1846. void il_dealloc_bcast_stations(struct il_priv *il)
  1847. {
  1848. unsigned long flags;
  1849. int i;
  1850. spin_lock_irqsave(&il->sta_lock, flags);
  1851. for (i = 0; i < il->hw_params.max_stations; i++) {
  1852. if (!(il->stations[i].used & IL_STA_BCAST))
  1853. continue;
  1854. il->stations[i].used &= ~IL_STA_UCODE_ACTIVE;
  1855. il->num_stations--;
  1856. BUG_ON(il->num_stations < 0);
  1857. kfree(il->stations[i].lq);
  1858. il->stations[i].lq = NULL;
  1859. }
  1860. spin_unlock_irqrestore(&il->sta_lock, flags);
  1861. }
  1862. EXPORT_SYMBOL_GPL(il_dealloc_bcast_stations);
  1863. #ifdef CONFIG_IWLEGACY_DEBUG
  1864. static void il_dump_lq_cmd(struct il_priv *il,
  1865. struct il_link_quality_cmd *lq)
  1866. {
  1867. int i;
  1868. D_RATE("lq station id 0x%x\n", lq->sta_id);
  1869. D_RATE("lq ant 0x%X 0x%X\n",
  1870. lq->general_params.single_stream_ant_msk,
  1871. lq->general_params.dual_stream_ant_msk);
  1872. for (i = 0; i < LINK_QUAL_MAX_RETRY_NUM; i++)
  1873. D_RATE("lq idx %d 0x%X\n",
  1874. i, lq->rs_table[i].rate_n_flags);
  1875. }
  1876. #else
  1877. static inline void il_dump_lq_cmd(struct il_priv *il,
  1878. struct il_link_quality_cmd *lq)
  1879. {
  1880. }
  1881. #endif
  1882. /**
  1883. * il_is_lq_table_valid() - Test one aspect of LQ cmd for validity
  1884. *
  1885. * It sometimes happens when a HT rate has been in use and we
  1886. * loose connectivity with AP then mac80211 will first tell us that the
  1887. * current channel is not HT anymore before removing the station. In such a
  1888. * scenario the RXON flags will be updated to indicate we are not
  1889. * communicating HT anymore, but the LQ command may still contain HT rates.
  1890. * Test for this to prevent driver from sending LQ command between the time
  1891. * RXON flags are updated and when LQ command is updated.
  1892. */
  1893. static bool il_is_lq_table_valid(struct il_priv *il,
  1894. struct il_rxon_context *ctx,
  1895. struct il_link_quality_cmd *lq)
  1896. {
  1897. int i;
  1898. if (ctx->ht.enabled)
  1899. return true;
  1900. D_INFO("Channel %u is not an HT channel\n",
  1901. ctx->active.channel);
  1902. for (i = 0; i < LINK_QUAL_MAX_RETRY_NUM; i++) {
  1903. if (le32_to_cpu(lq->rs_table[i].rate_n_flags) &
  1904. RATE_MCS_HT_MSK) {
  1905. D_INFO(
  1906. "idx %d of LQ expects HT channel\n",
  1907. i);
  1908. return false;
  1909. }
  1910. }
  1911. return true;
  1912. }
  1913. /**
  1914. * il_send_lq_cmd() - Send link quality command
  1915. * @init: This command is sent as part of station initialization right
  1916. * after station has been added.
  1917. *
  1918. * The link quality command is sent as the last step of station creation.
  1919. * This is the special case in which init is set and we call a callback in
  1920. * this case to clear the state indicating that station creation is in
  1921. * progress.
  1922. */
  1923. int il_send_lq_cmd(struct il_priv *il, struct il_rxon_context *ctx,
  1924. struct il_link_quality_cmd *lq, u8 flags, bool init)
  1925. {
  1926. int ret = 0;
  1927. unsigned long flags_spin;
  1928. struct il_host_cmd cmd = {
  1929. .id = C_TX_LINK_QUALITY_CMD,
  1930. .len = sizeof(struct il_link_quality_cmd),
  1931. .flags = flags,
  1932. .data = lq,
  1933. };
  1934. if (WARN_ON(lq->sta_id == IL_INVALID_STATION))
  1935. return -EINVAL;
  1936. spin_lock_irqsave(&il->sta_lock, flags_spin);
  1937. if (!(il->stations[lq->sta_id].used & IL_STA_DRIVER_ACTIVE)) {
  1938. spin_unlock_irqrestore(&il->sta_lock, flags_spin);
  1939. return -EINVAL;
  1940. }
  1941. spin_unlock_irqrestore(&il->sta_lock, flags_spin);
  1942. il_dump_lq_cmd(il, lq);
  1943. BUG_ON(init && (cmd.flags & CMD_ASYNC));
  1944. if (il_is_lq_table_valid(il, ctx, lq))
  1945. ret = il_send_cmd(il, &cmd);
  1946. else
  1947. ret = -EINVAL;
  1948. if (cmd.flags & CMD_ASYNC)
  1949. return ret;
  1950. if (init) {
  1951. D_INFO("init LQ command complete,"
  1952. " clearing sta addition status for sta %d\n",
  1953. lq->sta_id);
  1954. spin_lock_irqsave(&il->sta_lock, flags_spin);
  1955. il->stations[lq->sta_id].used &= ~IL_STA_UCODE_INPROGRESS;
  1956. spin_unlock_irqrestore(&il->sta_lock, flags_spin);
  1957. }
  1958. return ret;
  1959. }
  1960. EXPORT_SYMBOL(il_send_lq_cmd);
  1961. int il_mac_sta_remove(struct ieee80211_hw *hw,
  1962. struct ieee80211_vif *vif,
  1963. struct ieee80211_sta *sta)
  1964. {
  1965. struct il_priv *il = hw->priv;
  1966. struct il_station_priv_common *sta_common = (void *)sta->drv_priv;
  1967. int ret;
  1968. D_INFO("received request to remove station %pM\n",
  1969. sta->addr);
  1970. mutex_lock(&il->mutex);
  1971. D_INFO("proceeding to remove station %pM\n",
  1972. sta->addr);
  1973. ret = il_remove_station(il, sta_common->sta_id, sta->addr);
  1974. if (ret)
  1975. IL_ERR("Error removing station %pM\n",
  1976. sta->addr);
  1977. mutex_unlock(&il->mutex);
  1978. return ret;
  1979. }
  1980. EXPORT_SYMBOL(il_mac_sta_remove);
  1981. /************************** RX-FUNCTIONS ****************************/
  1982. /*
  1983. * Rx theory of operation
  1984. *
  1985. * Driver allocates a circular buffer of Receive Buffer Descriptors (RBDs),
  1986. * each of which point to Receive Buffers to be filled by the NIC. These get
  1987. * used not only for Rx frames, but for any command response or notification
  1988. * from the NIC. The driver and NIC manage the Rx buffers by means
  1989. * of idxes into the circular buffer.
  1990. *
  1991. * Rx Queue Indexes
  1992. * The host/firmware share two idx registers for managing the Rx buffers.
  1993. *
  1994. * The READ idx maps to the first position that the firmware may be writing
  1995. * to -- the driver can read up to (but not including) this position and get
  1996. * good data.
  1997. * The READ idx is managed by the firmware once the card is enabled.
  1998. *
  1999. * The WRITE idx maps to the last position the driver has read from -- the
  2000. * position preceding WRITE is the last slot the firmware can place a packet.
  2001. *
  2002. * The queue is empty (no good data) if WRITE = READ - 1, and is full if
  2003. * WRITE = READ.
  2004. *
  2005. * During initialization, the host sets up the READ queue position to the first
  2006. * IDX position, and WRITE to the last (READ - 1 wrapped)
  2007. *
  2008. * When the firmware places a packet in a buffer, it will advance the READ idx
  2009. * and fire the RX interrupt. The driver can then query the READ idx and
  2010. * process as many packets as possible, moving the WRITE idx forward as it
  2011. * resets the Rx queue buffers with new memory.
  2012. *
  2013. * The management in the driver is as follows:
  2014. * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When
  2015. * iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
  2016. * to replenish the iwl->rxq->rx_free.
  2017. * + In il_rx_replenish (scheduled) if 'processed' != 'read' then the
  2018. * iwl->rxq is replenished and the READ IDX is updated (updating the
  2019. * 'processed' and 'read' driver idxes as well)
  2020. * + A received packet is processed and handed to the kernel network stack,
  2021. * detached from the iwl->rxq. The driver 'processed' idx is updated.
  2022. * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
  2023. * list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
  2024. * IDX is not incremented and iwl->status(RX_STALLED) is set. If there
  2025. * were enough free buffers and RX_STALLED is set it is cleared.
  2026. *
  2027. *
  2028. * Driver sequence:
  2029. *
  2030. * il_rx_queue_alloc() Allocates rx_free
  2031. * il_rx_replenish() Replenishes rx_free list from rx_used, and calls
  2032. * il_rx_queue_restock
  2033. * il_rx_queue_restock() Moves available buffers from rx_free into Rx
  2034. * queue, updates firmware pointers, and updates
  2035. * the WRITE idx. If insufficient rx_free buffers
  2036. * are available, schedules il_rx_replenish
  2037. *
  2038. * -- enable interrupts --
  2039. * ISR - il_rx() Detach il_rx_bufs from pool up to the
  2040. * READ IDX, detaching the SKB from the pool.
  2041. * Moves the packet buffer from queue to rx_used.
  2042. * Calls il_rx_queue_restock to refill any empty
  2043. * slots.
  2044. * ...
  2045. *
  2046. */
  2047. /**
  2048. * il_rx_queue_space - Return number of free slots available in queue.
  2049. */
  2050. int il_rx_queue_space(const struct il_rx_queue *q)
  2051. {
  2052. int s = q->read - q->write;
  2053. if (s <= 0)
  2054. s += RX_QUEUE_SIZE;
  2055. /* keep some buffer to not confuse full and empty queue */
  2056. s -= 2;
  2057. if (s < 0)
  2058. s = 0;
  2059. return s;
  2060. }
  2061. EXPORT_SYMBOL(il_rx_queue_space);
  2062. /**
  2063. * il_rx_queue_update_write_ptr - Update the write pointer for the RX queue
  2064. */
  2065. void
  2066. il_rx_queue_update_write_ptr(struct il_priv *il,
  2067. struct il_rx_queue *q)
  2068. {
  2069. unsigned long flags;
  2070. u32 rx_wrt_ptr_reg = il->hw_params.rx_wrt_ptr_reg;
  2071. u32 reg;
  2072. spin_lock_irqsave(&q->lock, flags);
  2073. if (q->need_update == 0)
  2074. goto exit_unlock;
  2075. /* If power-saving is in use, make sure device is awake */
  2076. if (test_bit(S_POWER_PMI, &il->status)) {
  2077. reg = _il_rd(il, CSR_UCODE_DRV_GP1);
  2078. if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
  2079. D_INFO(
  2080. "Rx queue requesting wakeup,"
  2081. " GP1 = 0x%x\n", reg);
  2082. il_set_bit(il, CSR_GP_CNTRL,
  2083. CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
  2084. goto exit_unlock;
  2085. }
  2086. q->write_actual = (q->write & ~0x7);
  2087. il_wr(il, rx_wrt_ptr_reg,
  2088. q->write_actual);
  2089. /* Else device is assumed to be awake */
  2090. } else {
  2091. /* Device expects a multiple of 8 */
  2092. q->write_actual = (q->write & ~0x7);
  2093. il_wr(il, rx_wrt_ptr_reg,
  2094. q->write_actual);
  2095. }
  2096. q->need_update = 0;
  2097. exit_unlock:
  2098. spin_unlock_irqrestore(&q->lock, flags);
  2099. }
  2100. EXPORT_SYMBOL(il_rx_queue_update_write_ptr);
  2101. int il_rx_queue_alloc(struct il_priv *il)
  2102. {
  2103. struct il_rx_queue *rxq = &il->rxq;
  2104. struct device *dev = &il->pci_dev->dev;
  2105. int i;
  2106. spin_lock_init(&rxq->lock);
  2107. INIT_LIST_HEAD(&rxq->rx_free);
  2108. INIT_LIST_HEAD(&rxq->rx_used);
  2109. /* Alloc the circular buffer of Read Buffer Descriptors (RBDs) */
  2110. rxq->bd = dma_alloc_coherent(dev, 4 * RX_QUEUE_SIZE, &rxq->bd_dma,
  2111. GFP_KERNEL);
  2112. if (!rxq->bd)
  2113. goto err_bd;
  2114. rxq->rb_stts = dma_alloc_coherent(dev, sizeof(struct il_rb_status),
  2115. &rxq->rb_stts_dma, GFP_KERNEL);
  2116. if (!rxq->rb_stts)
  2117. goto err_rb;
  2118. /* Fill the rx_used queue with _all_ of the Rx buffers */
  2119. for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++)
  2120. list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
  2121. /* Set us so that we have processed and used all buffers, but have
  2122. * not restocked the Rx queue with fresh buffers */
  2123. rxq->read = rxq->write = 0;
  2124. rxq->write_actual = 0;
  2125. rxq->free_count = 0;
  2126. rxq->need_update = 0;
  2127. return 0;
  2128. err_rb:
  2129. dma_free_coherent(&il->pci_dev->dev, 4 * RX_QUEUE_SIZE, rxq->bd,
  2130. rxq->bd_dma);
  2131. err_bd:
  2132. return -ENOMEM;
  2133. }
  2134. EXPORT_SYMBOL(il_rx_queue_alloc);
  2135. void il_hdl_spectrum_measurement(struct il_priv *il,
  2136. struct il_rx_buf *rxb)
  2137. {
  2138. struct il_rx_pkt *pkt = rxb_addr(rxb);
  2139. struct il_spectrum_notification *report = &(pkt->u.spectrum_notif);
  2140. if (!report->state) {
  2141. D_11H(
  2142. "Spectrum Measure Notification: Start\n");
  2143. return;
  2144. }
  2145. memcpy(&il->measure_report, report, sizeof(*report));
  2146. il->measurement_status |= MEASUREMENT_READY;
  2147. }
  2148. EXPORT_SYMBOL(il_hdl_spectrum_measurement);
  2149. /*
  2150. * returns non-zero if packet should be dropped
  2151. */
  2152. int il_set_decrypted_flag(struct il_priv *il,
  2153. struct ieee80211_hdr *hdr,
  2154. u32 decrypt_res,
  2155. struct ieee80211_rx_status *stats)
  2156. {
  2157. u16 fc = le16_to_cpu(hdr->frame_control);
  2158. /*
  2159. * All contexts have the same setting here due to it being
  2160. * a module parameter, so OK to check any context.
  2161. */
  2162. if (il->ctx.active.filter_flags &
  2163. RXON_FILTER_DIS_DECRYPT_MSK)
  2164. return 0;
  2165. if (!(fc & IEEE80211_FCTL_PROTECTED))
  2166. return 0;
  2167. D_RX("decrypt_res:0x%x\n", decrypt_res);
  2168. switch (decrypt_res & RX_RES_STATUS_SEC_TYPE_MSK) {
  2169. case RX_RES_STATUS_SEC_TYPE_TKIP:
  2170. /* The uCode has got a bad phase 1 Key, pushes the packet.
  2171. * Decryption will be done in SW. */
  2172. if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
  2173. RX_RES_STATUS_BAD_KEY_TTAK)
  2174. break;
  2175. case RX_RES_STATUS_SEC_TYPE_WEP:
  2176. if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
  2177. RX_RES_STATUS_BAD_ICV_MIC) {
  2178. /* bad ICV, the packet is destroyed since the
  2179. * decryption is inplace, drop it */
  2180. D_RX("Packet destroyed\n");
  2181. return -1;
  2182. }
  2183. case RX_RES_STATUS_SEC_TYPE_CCMP:
  2184. if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
  2185. RX_RES_STATUS_DECRYPT_OK) {
  2186. D_RX("hw decrypt successfully!!!\n");
  2187. stats->flag |= RX_FLAG_DECRYPTED;
  2188. }
  2189. break;
  2190. default:
  2191. break;
  2192. }
  2193. return 0;
  2194. }
  2195. EXPORT_SYMBOL(il_set_decrypted_flag);
  2196. /**
  2197. * il_txq_update_write_ptr - Send new write idx to hardware
  2198. */
  2199. void
  2200. il_txq_update_write_ptr(struct il_priv *il, struct il_tx_queue *txq)
  2201. {
  2202. u32 reg = 0;
  2203. int txq_id = txq->q.id;
  2204. if (txq->need_update == 0)
  2205. return;
  2206. /* if we're trying to save power */
  2207. if (test_bit(S_POWER_PMI, &il->status)) {
  2208. /* wake up nic if it's powered down ...
  2209. * uCode will wake up, and interrupt us again, so next
  2210. * time we'll skip this part. */
  2211. reg = _il_rd(il, CSR_UCODE_DRV_GP1);
  2212. if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
  2213. D_INFO(
  2214. "Tx queue %d requesting wakeup,"
  2215. " GP1 = 0x%x\n", txq_id, reg);
  2216. il_set_bit(il, CSR_GP_CNTRL,
  2217. CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
  2218. return;
  2219. }
  2220. il_wr(il, HBUS_TARG_WRPTR,
  2221. txq->q.write_ptr | (txq_id << 8));
  2222. /*
  2223. * else not in power-save mode,
  2224. * uCode will never sleep when we're
  2225. * trying to tx (during RFKILL, we're not trying to tx).
  2226. */
  2227. } else
  2228. _il_wr(il, HBUS_TARG_WRPTR,
  2229. txq->q.write_ptr | (txq_id << 8));
  2230. txq->need_update = 0;
  2231. }
  2232. EXPORT_SYMBOL(il_txq_update_write_ptr);
  2233. /**
  2234. * il_tx_queue_unmap - Unmap any remaining DMA mappings and free skb's
  2235. */
  2236. void il_tx_queue_unmap(struct il_priv *il, int txq_id)
  2237. {
  2238. struct il_tx_queue *txq = &il->txq[txq_id];
  2239. struct il_queue *q = &txq->q;
  2240. if (q->n_bd == 0)
  2241. return;
  2242. while (q->write_ptr != q->read_ptr) {
  2243. il->cfg->ops->lib->txq_free_tfd(il, txq);
  2244. q->read_ptr = il_queue_inc_wrap(q->read_ptr, q->n_bd);
  2245. }
  2246. }
  2247. EXPORT_SYMBOL(il_tx_queue_unmap);
  2248. /**
  2249. * il_tx_queue_free - Deallocate DMA queue.
  2250. * @txq: Transmit queue to deallocate.
  2251. *
  2252. * Empty queue by removing and destroying all BD's.
  2253. * Free all buffers.
  2254. * 0-fill, but do not free "txq" descriptor structure.
  2255. */
  2256. void il_tx_queue_free(struct il_priv *il, int txq_id)
  2257. {
  2258. struct il_tx_queue *txq = &il->txq[txq_id];
  2259. struct device *dev = &il->pci_dev->dev;
  2260. int i;
  2261. il_tx_queue_unmap(il, txq_id);
  2262. /* De-alloc array of command/tx buffers */
  2263. for (i = 0; i < TFD_TX_CMD_SLOTS; i++)
  2264. kfree(txq->cmd[i]);
  2265. /* De-alloc circular buffer of TFDs */
  2266. if (txq->q.n_bd)
  2267. dma_free_coherent(dev, il->hw_params.tfd_size *
  2268. txq->q.n_bd, txq->tfds, txq->q.dma_addr);
  2269. /* De-alloc array of per-TFD driver data */
  2270. kfree(txq->txb);
  2271. txq->txb = NULL;
  2272. /* deallocate arrays */
  2273. kfree(txq->cmd);
  2274. kfree(txq->meta);
  2275. txq->cmd = NULL;
  2276. txq->meta = NULL;
  2277. /* 0-fill queue descriptor structure */
  2278. memset(txq, 0, sizeof(*txq));
  2279. }
  2280. EXPORT_SYMBOL(il_tx_queue_free);
  2281. /**
  2282. * il_cmd_queue_unmap - Unmap any remaining DMA mappings from command queue
  2283. */
  2284. void il_cmd_queue_unmap(struct il_priv *il)
  2285. {
  2286. struct il_tx_queue *txq = &il->txq[il->cmd_queue];
  2287. struct il_queue *q = &txq->q;
  2288. int i;
  2289. if (q->n_bd == 0)
  2290. return;
  2291. while (q->read_ptr != q->write_ptr) {
  2292. i = il_get_cmd_idx(q, q->read_ptr, 0);
  2293. if (txq->meta[i].flags & CMD_MAPPED) {
  2294. pci_unmap_single(il->pci_dev,
  2295. dma_unmap_addr(&txq->meta[i], mapping),
  2296. dma_unmap_len(&txq->meta[i], len),
  2297. PCI_DMA_BIDIRECTIONAL);
  2298. txq->meta[i].flags = 0;
  2299. }
  2300. q->read_ptr = il_queue_inc_wrap(q->read_ptr, q->n_bd);
  2301. }
  2302. i = q->n_win;
  2303. if (txq->meta[i].flags & CMD_MAPPED) {
  2304. pci_unmap_single(il->pci_dev,
  2305. dma_unmap_addr(&txq->meta[i], mapping),
  2306. dma_unmap_len(&txq->meta[i], len),
  2307. PCI_DMA_BIDIRECTIONAL);
  2308. txq->meta[i].flags = 0;
  2309. }
  2310. }
  2311. EXPORT_SYMBOL(il_cmd_queue_unmap);
  2312. /**
  2313. * il_cmd_queue_free - Deallocate DMA queue.
  2314. * @txq: Transmit queue to deallocate.
  2315. *
  2316. * Empty queue by removing and destroying all BD's.
  2317. * Free all buffers.
  2318. * 0-fill, but do not free "txq" descriptor structure.
  2319. */
  2320. void il_cmd_queue_free(struct il_priv *il)
  2321. {
  2322. struct il_tx_queue *txq = &il->txq[il->cmd_queue];
  2323. struct device *dev = &il->pci_dev->dev;
  2324. int i;
  2325. il_cmd_queue_unmap(il);
  2326. /* De-alloc array of command/tx buffers */
  2327. for (i = 0; i <= TFD_CMD_SLOTS; i++)
  2328. kfree(txq->cmd[i]);
  2329. /* De-alloc circular buffer of TFDs */
  2330. if (txq->q.n_bd)
  2331. dma_free_coherent(dev, il->hw_params.tfd_size * txq->q.n_bd,
  2332. txq->tfds, txq->q.dma_addr);
  2333. /* deallocate arrays */
  2334. kfree(txq->cmd);
  2335. kfree(txq->meta);
  2336. txq->cmd = NULL;
  2337. txq->meta = NULL;
  2338. /* 0-fill queue descriptor structure */
  2339. memset(txq, 0, sizeof(*txq));
  2340. }
  2341. EXPORT_SYMBOL(il_cmd_queue_free);
  2342. /*************** DMA-QUEUE-GENERAL-FUNCTIONS *****
  2343. * DMA services
  2344. *
  2345. * Theory of operation
  2346. *
  2347. * A Tx or Rx queue resides in host DRAM, and is comprised of a circular buffer
  2348. * of buffer descriptors, each of which points to one or more data buffers for
  2349. * the device to read from or fill. Driver and device exchange status of each
  2350. * queue via "read" and "write" pointers. Driver keeps minimum of 2 empty
  2351. * entries in each circular buffer, to protect against confusing empty and full
  2352. * queue states.
  2353. *
  2354. * The device reads or writes the data in the queues via the device's several
  2355. * DMA/FIFO channels. Each queue is mapped to a single DMA channel.
  2356. *
  2357. * For Tx queue, there are low mark and high mark limits. If, after queuing
  2358. * the packet for Tx, free space become < low mark, Tx queue stopped. When
  2359. * reclaiming packets (on 'tx done IRQ), if free space become > high mark,
  2360. * Tx queue resumed.
  2361. *
  2362. * See more detailed info in 4965.h.
  2363. ***************************************************/
  2364. int il_queue_space(const struct il_queue *q)
  2365. {
  2366. int s = q->read_ptr - q->write_ptr;
  2367. if (q->read_ptr > q->write_ptr)
  2368. s -= q->n_bd;
  2369. if (s <= 0)
  2370. s += q->n_win;
  2371. /* keep some reserve to not confuse empty and full situations */
  2372. s -= 2;
  2373. if (s < 0)
  2374. s = 0;
  2375. return s;
  2376. }
  2377. EXPORT_SYMBOL(il_queue_space);
  2378. /**
  2379. * il_queue_init - Initialize queue's high/low-water and read/write idxes
  2380. */
  2381. static int il_queue_init(struct il_priv *il, struct il_queue *q,
  2382. int count, int slots_num, u32 id)
  2383. {
  2384. q->n_bd = count;
  2385. q->n_win = slots_num;
  2386. q->id = id;
  2387. /* count must be power-of-two size, otherwise il_queue_inc_wrap
  2388. * and il_queue_dec_wrap are broken. */
  2389. BUG_ON(!is_power_of_2(count));
  2390. /* slots_num must be power-of-two size, otherwise
  2391. * il_get_cmd_idx is broken. */
  2392. BUG_ON(!is_power_of_2(slots_num));
  2393. q->low_mark = q->n_win / 4;
  2394. if (q->low_mark < 4)
  2395. q->low_mark = 4;
  2396. q->high_mark = q->n_win / 8;
  2397. if (q->high_mark < 2)
  2398. q->high_mark = 2;
  2399. q->write_ptr = q->read_ptr = 0;
  2400. return 0;
  2401. }
  2402. /**
  2403. * il_tx_queue_alloc - Alloc driver data and TFD CB for one Tx/cmd queue
  2404. */
  2405. static int il_tx_queue_alloc(struct il_priv *il,
  2406. struct il_tx_queue *txq, u32 id)
  2407. {
  2408. struct device *dev = &il->pci_dev->dev;
  2409. size_t tfd_sz = il->hw_params.tfd_size * TFD_QUEUE_SIZE_MAX;
  2410. /* Driver ilate data, only for Tx (not command) queues,
  2411. * not shared with device. */
  2412. if (id != il->cmd_queue) {
  2413. txq->txb = kzalloc(sizeof(txq->txb[0]) *
  2414. TFD_QUEUE_SIZE_MAX, GFP_KERNEL);
  2415. if (!txq->txb) {
  2416. IL_ERR("kmalloc for auxiliary BD "
  2417. "structures failed\n");
  2418. goto error;
  2419. }
  2420. } else {
  2421. txq->txb = NULL;
  2422. }
  2423. /* Circular buffer of transmit frame descriptors (TFDs),
  2424. * shared with device */
  2425. txq->tfds = dma_alloc_coherent(dev, tfd_sz, &txq->q.dma_addr,
  2426. GFP_KERNEL);
  2427. if (!txq->tfds) {
  2428. IL_ERR("pci_alloc_consistent(%zd) failed\n", tfd_sz);
  2429. goto error;
  2430. }
  2431. txq->q.id = id;
  2432. return 0;
  2433. error:
  2434. kfree(txq->txb);
  2435. txq->txb = NULL;
  2436. return -ENOMEM;
  2437. }
  2438. /**
  2439. * il_tx_queue_init - Allocate and initialize one tx/cmd queue
  2440. */
  2441. int il_tx_queue_init(struct il_priv *il, struct il_tx_queue *txq,
  2442. int slots_num, u32 txq_id)
  2443. {
  2444. int i, len;
  2445. int ret;
  2446. int actual_slots = slots_num;
  2447. /*
  2448. * Alloc buffer array for commands (Tx or other types of commands).
  2449. * For the command queue (#4/#9), allocate command space + one big
  2450. * command for scan, since scan command is very huge; the system will
  2451. * not have two scans at the same time, so only one is needed.
  2452. * For normal Tx queues (all other queues), no super-size command
  2453. * space is needed.
  2454. */
  2455. if (txq_id == il->cmd_queue)
  2456. actual_slots++;
  2457. txq->meta = kzalloc(sizeof(struct il_cmd_meta) * actual_slots,
  2458. GFP_KERNEL);
  2459. txq->cmd = kzalloc(sizeof(struct il_device_cmd *) * actual_slots,
  2460. GFP_KERNEL);
  2461. if (!txq->meta || !txq->cmd)
  2462. goto out_free_arrays;
  2463. len = sizeof(struct il_device_cmd);
  2464. for (i = 0; i < actual_slots; i++) {
  2465. /* only happens for cmd queue */
  2466. if (i == slots_num)
  2467. len = IL_MAX_CMD_SIZE;
  2468. txq->cmd[i] = kmalloc(len, GFP_KERNEL);
  2469. if (!txq->cmd[i])
  2470. goto err;
  2471. }
  2472. /* Alloc driver data array and TFD circular buffer */
  2473. ret = il_tx_queue_alloc(il, txq, txq_id);
  2474. if (ret)
  2475. goto err;
  2476. txq->need_update = 0;
  2477. /*
  2478. * For the default queues 0-3, set up the swq_id
  2479. * already -- all others need to get one later
  2480. * (if they need one at all).
  2481. */
  2482. if (txq_id < 4)
  2483. il_set_swq_id(txq, txq_id, txq_id);
  2484. /* TFD_QUEUE_SIZE_MAX must be power-of-two size, otherwise
  2485. * il_queue_inc_wrap and il_queue_dec_wrap are broken. */
  2486. BUILD_BUG_ON(TFD_QUEUE_SIZE_MAX & (TFD_QUEUE_SIZE_MAX - 1));
  2487. /* Initialize queue's high/low-water marks, and head/tail idxes */
  2488. il_queue_init(il, &txq->q,
  2489. TFD_QUEUE_SIZE_MAX, slots_num, txq_id);
  2490. /* Tell device where to find queue */
  2491. il->cfg->ops->lib->txq_init(il, txq);
  2492. return 0;
  2493. err:
  2494. for (i = 0; i < actual_slots; i++)
  2495. kfree(txq->cmd[i]);
  2496. out_free_arrays:
  2497. kfree(txq->meta);
  2498. kfree(txq->cmd);
  2499. return -ENOMEM;
  2500. }
  2501. EXPORT_SYMBOL(il_tx_queue_init);
  2502. void il_tx_queue_reset(struct il_priv *il, struct il_tx_queue *txq,
  2503. int slots_num, u32 txq_id)
  2504. {
  2505. int actual_slots = slots_num;
  2506. if (txq_id == il->cmd_queue)
  2507. actual_slots++;
  2508. memset(txq->meta, 0, sizeof(struct il_cmd_meta) * actual_slots);
  2509. txq->need_update = 0;
  2510. /* Initialize queue's high/low-water marks, and head/tail idxes */
  2511. il_queue_init(il, &txq->q,
  2512. TFD_QUEUE_SIZE_MAX, slots_num, txq_id);
  2513. /* Tell device where to find queue */
  2514. il->cfg->ops->lib->txq_init(il, txq);
  2515. }
  2516. EXPORT_SYMBOL(il_tx_queue_reset);
  2517. /*************** HOST COMMAND QUEUE FUNCTIONS *****/
  2518. /**
  2519. * il_enqueue_hcmd - enqueue a uCode command
  2520. * @il: device ilate data point
  2521. * @cmd: a point to the ucode command structure
  2522. *
  2523. * The function returns < 0 values to indicate the operation is
  2524. * failed. On success, it turns the idx (> 0) of command in the
  2525. * command queue.
  2526. */
  2527. int il_enqueue_hcmd(struct il_priv *il, struct il_host_cmd *cmd)
  2528. {
  2529. struct il_tx_queue *txq = &il->txq[il->cmd_queue];
  2530. struct il_queue *q = &txq->q;
  2531. struct il_device_cmd *out_cmd;
  2532. struct il_cmd_meta *out_meta;
  2533. dma_addr_t phys_addr;
  2534. unsigned long flags;
  2535. int len;
  2536. u32 idx;
  2537. u16 fix_size;
  2538. cmd->len = il->cfg->ops->utils->get_hcmd_size(cmd->id, cmd->len);
  2539. fix_size = (u16)(cmd->len + sizeof(out_cmd->hdr));
  2540. /* If any of the command structures end up being larger than
  2541. * the TFD_MAX_PAYLOAD_SIZE, and it sent as a 'small' command then
  2542. * we will need to increase the size of the TFD entries
  2543. * Also, check to see if command buffer should not exceed the size
  2544. * of device_cmd and max_cmd_size. */
  2545. BUG_ON((fix_size > TFD_MAX_PAYLOAD_SIZE) &&
  2546. !(cmd->flags & CMD_SIZE_HUGE));
  2547. BUG_ON(fix_size > IL_MAX_CMD_SIZE);
  2548. if (il_is_rfkill(il) || il_is_ctkill(il)) {
  2549. IL_WARN("Not sending command - %s KILL\n",
  2550. il_is_rfkill(il) ? "RF" : "CT");
  2551. return -EIO;
  2552. }
  2553. spin_lock_irqsave(&il->hcmd_lock, flags);
  2554. if (il_queue_space(q) < ((cmd->flags & CMD_ASYNC) ? 2 : 1)) {
  2555. spin_unlock_irqrestore(&il->hcmd_lock, flags);
  2556. IL_ERR("Restarting adapter due to command queue full\n");
  2557. queue_work(il->workqueue, &il->restart);
  2558. return -ENOSPC;
  2559. }
  2560. idx = il_get_cmd_idx(q, q->write_ptr, cmd->flags & CMD_SIZE_HUGE);
  2561. out_cmd = txq->cmd[idx];
  2562. out_meta = &txq->meta[idx];
  2563. if (WARN_ON(out_meta->flags & CMD_MAPPED)) {
  2564. spin_unlock_irqrestore(&il->hcmd_lock, flags);
  2565. return -ENOSPC;
  2566. }
  2567. memset(out_meta, 0, sizeof(*out_meta)); /* re-initialize to NULL */
  2568. out_meta->flags = cmd->flags | CMD_MAPPED;
  2569. if (cmd->flags & CMD_WANT_SKB)
  2570. out_meta->source = cmd;
  2571. if (cmd->flags & CMD_ASYNC)
  2572. out_meta->callback = cmd->callback;
  2573. out_cmd->hdr.cmd = cmd->id;
  2574. memcpy(&out_cmd->cmd.payload, cmd->data, cmd->len);
  2575. /* At this point, the out_cmd now has all of the incoming cmd
  2576. * information */
  2577. out_cmd->hdr.flags = 0;
  2578. out_cmd->hdr.sequence = cpu_to_le16(QUEUE_TO_SEQ(il->cmd_queue) |
  2579. IDX_TO_SEQ(q->write_ptr));
  2580. if (cmd->flags & CMD_SIZE_HUGE)
  2581. out_cmd->hdr.sequence |= SEQ_HUGE_FRAME;
  2582. len = sizeof(struct il_device_cmd);
  2583. if (idx == TFD_CMD_SLOTS)
  2584. len = IL_MAX_CMD_SIZE;
  2585. #ifdef CONFIG_IWLEGACY_DEBUG
  2586. switch (out_cmd->hdr.cmd) {
  2587. case C_TX_LINK_QUALITY_CMD:
  2588. case C_SENSITIVITY:
  2589. D_HC_DUMP(
  2590. "Sending command %s (#%x), seq: 0x%04X, "
  2591. "%d bytes at %d[%d]:%d\n",
  2592. il_get_cmd_string(out_cmd->hdr.cmd),
  2593. out_cmd->hdr.cmd,
  2594. le16_to_cpu(out_cmd->hdr.sequence), fix_size,
  2595. q->write_ptr, idx, il->cmd_queue);
  2596. break;
  2597. default:
  2598. D_HC("Sending command %s (#%x), seq: 0x%04X, "
  2599. "%d bytes at %d[%d]:%d\n",
  2600. il_get_cmd_string(out_cmd->hdr.cmd),
  2601. out_cmd->hdr.cmd,
  2602. le16_to_cpu(out_cmd->hdr.sequence), fix_size,
  2603. q->write_ptr, idx, il->cmd_queue);
  2604. }
  2605. #endif
  2606. txq->need_update = 1;
  2607. if (il->cfg->ops->lib->txq_update_byte_cnt_tbl)
  2608. /* Set up entry in queue's byte count circular buffer */
  2609. il->cfg->ops->lib->txq_update_byte_cnt_tbl(il, txq, 0);
  2610. phys_addr = pci_map_single(il->pci_dev, &out_cmd->hdr,
  2611. fix_size, PCI_DMA_BIDIRECTIONAL);
  2612. dma_unmap_addr_set(out_meta, mapping, phys_addr);
  2613. dma_unmap_len_set(out_meta, len, fix_size);
  2614. il->cfg->ops->lib->txq_attach_buf_to_tfd(il, txq,
  2615. phys_addr, fix_size, 1,
  2616. U32_PAD(cmd->len));
  2617. /* Increment and update queue's write idx */
  2618. q->write_ptr = il_queue_inc_wrap(q->write_ptr, q->n_bd);
  2619. il_txq_update_write_ptr(il, txq);
  2620. spin_unlock_irqrestore(&il->hcmd_lock, flags);
  2621. return idx;
  2622. }
  2623. /**
  2624. * il_hcmd_queue_reclaim - Reclaim TX command queue entries already Tx'd
  2625. *
  2626. * When FW advances 'R' idx, all entries between old and new 'R' idx
  2627. * need to be reclaimed. As result, some free space forms. If there is
  2628. * enough free space (> low mark), wake the stack that feeds us.
  2629. */
  2630. static void il_hcmd_queue_reclaim(struct il_priv *il, int txq_id,
  2631. int idx, int cmd_idx)
  2632. {
  2633. struct il_tx_queue *txq = &il->txq[txq_id];
  2634. struct il_queue *q = &txq->q;
  2635. int nfreed = 0;
  2636. if (idx >= q->n_bd || il_queue_used(q, idx) == 0) {
  2637. IL_ERR("Read idx for DMA queue txq id (%d), idx %d, "
  2638. "is out of range [0-%d] %d %d.\n", txq_id,
  2639. idx, q->n_bd, q->write_ptr, q->read_ptr);
  2640. return;
  2641. }
  2642. for (idx = il_queue_inc_wrap(idx, q->n_bd); q->read_ptr != idx;
  2643. q->read_ptr = il_queue_inc_wrap(q->read_ptr, q->n_bd)) {
  2644. if (nfreed++ > 0) {
  2645. IL_ERR("HCMD skipped: idx (%d) %d %d\n", idx,
  2646. q->write_ptr, q->read_ptr);
  2647. queue_work(il->workqueue, &il->restart);
  2648. }
  2649. }
  2650. }
  2651. /**
  2652. * il_tx_cmd_complete - Pull unused buffers off the queue and reclaim them
  2653. * @rxb: Rx buffer to reclaim
  2654. *
  2655. * If an Rx buffer has an async callback associated with it the callback
  2656. * will be executed. The attached skb (if present) will only be freed
  2657. * if the callback returns 1
  2658. */
  2659. void
  2660. il_tx_cmd_complete(struct il_priv *il, struct il_rx_buf *rxb)
  2661. {
  2662. struct il_rx_pkt *pkt = rxb_addr(rxb);
  2663. u16 sequence = le16_to_cpu(pkt->hdr.sequence);
  2664. int txq_id = SEQ_TO_QUEUE(sequence);
  2665. int idx = SEQ_TO_IDX(sequence);
  2666. int cmd_idx;
  2667. bool huge = !!(pkt->hdr.sequence & SEQ_HUGE_FRAME);
  2668. struct il_device_cmd *cmd;
  2669. struct il_cmd_meta *meta;
  2670. struct il_tx_queue *txq = &il->txq[il->cmd_queue];
  2671. unsigned long flags;
  2672. /* If a Tx command is being handled and it isn't in the actual
  2673. * command queue then there a command routing bug has been introduced
  2674. * in the queue management code. */
  2675. if (WARN(txq_id != il->cmd_queue,
  2676. "wrong command queue %d (should be %d), sequence 0x%X readp=%d writep=%d\n",
  2677. txq_id, il->cmd_queue, sequence,
  2678. il->txq[il->cmd_queue].q.read_ptr,
  2679. il->txq[il->cmd_queue].q.write_ptr)) {
  2680. il_print_hex_error(il, pkt, 32);
  2681. return;
  2682. }
  2683. cmd_idx = il_get_cmd_idx(&txq->q, idx, huge);
  2684. cmd = txq->cmd[cmd_idx];
  2685. meta = &txq->meta[cmd_idx];
  2686. txq->time_stamp = jiffies;
  2687. pci_unmap_single(il->pci_dev,
  2688. dma_unmap_addr(meta, mapping),
  2689. dma_unmap_len(meta, len),
  2690. PCI_DMA_BIDIRECTIONAL);
  2691. /* Input error checking is done when commands are added to queue. */
  2692. if (meta->flags & CMD_WANT_SKB) {
  2693. meta->source->reply_page = (unsigned long)rxb_addr(rxb);
  2694. rxb->page = NULL;
  2695. } else if (meta->callback)
  2696. meta->callback(il, cmd, pkt);
  2697. spin_lock_irqsave(&il->hcmd_lock, flags);
  2698. il_hcmd_queue_reclaim(il, txq_id, idx, cmd_idx);
  2699. if (!(meta->flags & CMD_ASYNC)) {
  2700. clear_bit(S_HCMD_ACTIVE, &il->status);
  2701. D_INFO("Clearing HCMD_ACTIVE for command %s\n",
  2702. il_get_cmd_string(cmd->hdr.cmd));
  2703. wake_up(&il->wait_command_queue);
  2704. }
  2705. /* Mark as unmapped */
  2706. meta->flags = 0;
  2707. spin_unlock_irqrestore(&il->hcmd_lock, flags);
  2708. }
  2709. EXPORT_SYMBOL(il_tx_cmd_complete);
  2710. MODULE_DESCRIPTION("iwl-legacy: common functions for 3945 and 4965");
  2711. MODULE_VERSION(IWLWIFI_VERSION);
  2712. MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
  2713. MODULE_LICENSE("GPL");
  2714. /*
  2715. * set bt_coex_active to true, uCode will do kill/defer
  2716. * every time the priority line is asserted (BT is sending signals on the
  2717. * priority line in the PCIx).
  2718. * set bt_coex_active to false, uCode will ignore the BT activity and
  2719. * perform the normal operation
  2720. *
  2721. * User might experience transmit issue on some platform due to WiFi/BT
  2722. * co-exist problem. The possible behaviors are:
  2723. * Able to scan and finding all the available AP
  2724. * Not able to associate with any AP
  2725. * On those platforms, WiFi communication can be restored by set
  2726. * "bt_coex_active" module parameter to "false"
  2727. *
  2728. * default: bt_coex_active = true (BT_COEX_ENABLE)
  2729. */
  2730. static bool bt_coex_active = true;
  2731. module_param(bt_coex_active, bool, S_IRUGO);
  2732. MODULE_PARM_DESC(bt_coex_active, "enable wifi/bluetooth co-exist");
  2733. u32 il_debug_level;
  2734. EXPORT_SYMBOL(il_debug_level);
  2735. const u8 il_bcast_addr[ETH_ALEN] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF };
  2736. EXPORT_SYMBOL(il_bcast_addr);
  2737. /* This function both allocates and initializes hw and il. */
  2738. struct ieee80211_hw *il_alloc_all(struct il_cfg *cfg)
  2739. {
  2740. struct il_priv *il;
  2741. /* mac80211 allocates memory for this device instance, including
  2742. * space for this driver's ilate structure */
  2743. struct ieee80211_hw *hw;
  2744. hw = ieee80211_alloc_hw(sizeof(struct il_priv),
  2745. cfg->ops->ieee80211_ops);
  2746. if (hw == NULL) {
  2747. pr_err("%s: Can not allocate network device\n",
  2748. cfg->name);
  2749. goto out;
  2750. }
  2751. il = hw->priv;
  2752. il->hw = hw;
  2753. out:
  2754. return hw;
  2755. }
  2756. EXPORT_SYMBOL(il_alloc_all);
  2757. #define MAX_BIT_RATE_40_MHZ 150 /* Mbps */
  2758. #define MAX_BIT_RATE_20_MHZ 72 /* Mbps */
  2759. static void il_init_ht_hw_capab(const struct il_priv *il,
  2760. struct ieee80211_sta_ht_cap *ht_info,
  2761. enum ieee80211_band band)
  2762. {
  2763. u16 max_bit_rate = 0;
  2764. u8 rx_chains_num = il->hw_params.rx_chains_num;
  2765. u8 tx_chains_num = il->hw_params.tx_chains_num;
  2766. ht_info->cap = 0;
  2767. memset(&ht_info->mcs, 0, sizeof(ht_info->mcs));
  2768. ht_info->ht_supported = true;
  2769. ht_info->cap |= IEEE80211_HT_CAP_SGI_20;
  2770. max_bit_rate = MAX_BIT_RATE_20_MHZ;
  2771. if (il->hw_params.ht40_channel & BIT(band)) {
  2772. ht_info->cap |= IEEE80211_HT_CAP_SUP_WIDTH_20_40;
  2773. ht_info->cap |= IEEE80211_HT_CAP_SGI_40;
  2774. ht_info->mcs.rx_mask[4] = 0x01;
  2775. max_bit_rate = MAX_BIT_RATE_40_MHZ;
  2776. }
  2777. if (il->cfg->mod_params->amsdu_size_8K)
  2778. ht_info->cap |= IEEE80211_HT_CAP_MAX_AMSDU;
  2779. ht_info->ampdu_factor = CFG_HT_RX_AMPDU_FACTOR_DEF;
  2780. ht_info->ampdu_density = CFG_HT_MPDU_DENSITY_DEF;
  2781. ht_info->mcs.rx_mask[0] = 0xFF;
  2782. if (rx_chains_num >= 2)
  2783. ht_info->mcs.rx_mask[1] = 0xFF;
  2784. if (rx_chains_num >= 3)
  2785. ht_info->mcs.rx_mask[2] = 0xFF;
  2786. /* Highest supported Rx data rate */
  2787. max_bit_rate *= rx_chains_num;
  2788. WARN_ON(max_bit_rate & ~IEEE80211_HT_MCS_RX_HIGHEST_MASK);
  2789. ht_info->mcs.rx_highest = cpu_to_le16(max_bit_rate);
  2790. /* Tx MCS capabilities */
  2791. ht_info->mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED;
  2792. if (tx_chains_num != rx_chains_num) {
  2793. ht_info->mcs.tx_params |= IEEE80211_HT_MCS_TX_RX_DIFF;
  2794. ht_info->mcs.tx_params |= ((tx_chains_num - 1) <<
  2795. IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT);
  2796. }
  2797. }
  2798. /**
  2799. * il_init_geos - Initialize mac80211's geo/channel info based from eeprom
  2800. */
  2801. int il_init_geos(struct il_priv *il)
  2802. {
  2803. struct il_channel_info *ch;
  2804. struct ieee80211_supported_band *sband;
  2805. struct ieee80211_channel *channels;
  2806. struct ieee80211_channel *geo_ch;
  2807. struct ieee80211_rate *rates;
  2808. int i = 0;
  2809. s8 max_tx_power = 0;
  2810. if (il->bands[IEEE80211_BAND_2GHZ].n_bitrates ||
  2811. il->bands[IEEE80211_BAND_5GHZ].n_bitrates) {
  2812. D_INFO("Geography modes already initialized.\n");
  2813. set_bit(S_GEO_CONFIGURED, &il->status);
  2814. return 0;
  2815. }
  2816. channels = kzalloc(sizeof(struct ieee80211_channel) *
  2817. il->channel_count, GFP_KERNEL);
  2818. if (!channels)
  2819. return -ENOMEM;
  2820. rates = kzalloc((sizeof(struct ieee80211_rate) * RATE_COUNT_LEGACY),
  2821. GFP_KERNEL);
  2822. if (!rates) {
  2823. kfree(channels);
  2824. return -ENOMEM;
  2825. }
  2826. /* 5.2GHz channels start after the 2.4GHz channels */
  2827. sband = &il->bands[IEEE80211_BAND_5GHZ];
  2828. sband->channels = &channels[ARRAY_SIZE(il_eeprom_band_1)];
  2829. /* just OFDM */
  2830. sband->bitrates = &rates[IL_FIRST_OFDM_RATE];
  2831. sband->n_bitrates = RATE_COUNT_LEGACY - IL_FIRST_OFDM_RATE;
  2832. if (il->cfg->sku & IL_SKU_N)
  2833. il_init_ht_hw_capab(il, &sband->ht_cap,
  2834. IEEE80211_BAND_5GHZ);
  2835. sband = &il->bands[IEEE80211_BAND_2GHZ];
  2836. sband->channels = channels;
  2837. /* OFDM & CCK */
  2838. sband->bitrates = rates;
  2839. sband->n_bitrates = RATE_COUNT_LEGACY;
  2840. if (il->cfg->sku & IL_SKU_N)
  2841. il_init_ht_hw_capab(il, &sband->ht_cap,
  2842. IEEE80211_BAND_2GHZ);
  2843. il->ieee_channels = channels;
  2844. il->ieee_rates = rates;
  2845. for (i = 0; i < il->channel_count; i++) {
  2846. ch = &il->channel_info[i];
  2847. if (!il_is_channel_valid(ch))
  2848. continue;
  2849. sband = &il->bands[ch->band];
  2850. geo_ch = &sband->channels[sband->n_channels++];
  2851. geo_ch->center_freq =
  2852. ieee80211_channel_to_frequency(ch->channel, ch->band);
  2853. geo_ch->max_power = ch->max_power_avg;
  2854. geo_ch->max_antenna_gain = 0xff;
  2855. geo_ch->hw_value = ch->channel;
  2856. if (il_is_channel_valid(ch)) {
  2857. if (!(ch->flags & EEPROM_CHANNEL_IBSS))
  2858. geo_ch->flags |= IEEE80211_CHAN_NO_IBSS;
  2859. if (!(ch->flags & EEPROM_CHANNEL_ACTIVE))
  2860. geo_ch->flags |= IEEE80211_CHAN_PASSIVE_SCAN;
  2861. if (ch->flags & EEPROM_CHANNEL_RADAR)
  2862. geo_ch->flags |= IEEE80211_CHAN_RADAR;
  2863. geo_ch->flags |= ch->ht40_extension_channel;
  2864. if (ch->max_power_avg > max_tx_power)
  2865. max_tx_power = ch->max_power_avg;
  2866. } else {
  2867. geo_ch->flags |= IEEE80211_CHAN_DISABLED;
  2868. }
  2869. D_INFO("Channel %d Freq=%d[%sGHz] %s flag=0x%X\n",
  2870. ch->channel, geo_ch->center_freq,
  2871. il_is_channel_a_band(ch) ? "5.2" : "2.4",
  2872. geo_ch->flags & IEEE80211_CHAN_DISABLED ?
  2873. "restricted" : "valid",
  2874. geo_ch->flags);
  2875. }
  2876. il->tx_power_device_lmt = max_tx_power;
  2877. il->tx_power_user_lmt = max_tx_power;
  2878. il->tx_power_next = max_tx_power;
  2879. if (il->bands[IEEE80211_BAND_5GHZ].n_channels == 0 &&
  2880. (il->cfg->sku & IL_SKU_A)) {
  2881. IL_INFO("Incorrectly detected BG card as ABG. "
  2882. "Please send your PCI ID 0x%04X:0x%04X to maintainer.\n",
  2883. il->pci_dev->device,
  2884. il->pci_dev->subsystem_device);
  2885. il->cfg->sku &= ~IL_SKU_A;
  2886. }
  2887. IL_INFO("Tunable channels: %d 802.11bg, %d 802.11a channels\n",
  2888. il->bands[IEEE80211_BAND_2GHZ].n_channels,
  2889. il->bands[IEEE80211_BAND_5GHZ].n_channels);
  2890. set_bit(S_GEO_CONFIGURED, &il->status);
  2891. return 0;
  2892. }
  2893. EXPORT_SYMBOL(il_init_geos);
  2894. /*
  2895. * il_free_geos - undo allocations in il_init_geos
  2896. */
  2897. void il_free_geos(struct il_priv *il)
  2898. {
  2899. kfree(il->ieee_channels);
  2900. kfree(il->ieee_rates);
  2901. clear_bit(S_GEO_CONFIGURED, &il->status);
  2902. }
  2903. EXPORT_SYMBOL(il_free_geos);
  2904. static bool il_is_channel_extension(struct il_priv *il,
  2905. enum ieee80211_band band,
  2906. u16 channel, u8 extension_chan_offset)
  2907. {
  2908. const struct il_channel_info *ch_info;
  2909. ch_info = il_get_channel_info(il, band, channel);
  2910. if (!il_is_channel_valid(ch_info))
  2911. return false;
  2912. if (extension_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_ABOVE)
  2913. return !(ch_info->ht40_extension_channel &
  2914. IEEE80211_CHAN_NO_HT40PLUS);
  2915. else if (extension_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_BELOW)
  2916. return !(ch_info->ht40_extension_channel &
  2917. IEEE80211_CHAN_NO_HT40MINUS);
  2918. return false;
  2919. }
  2920. bool il_is_ht40_tx_allowed(struct il_priv *il,
  2921. struct il_rxon_context *ctx,
  2922. struct ieee80211_sta_ht_cap *ht_cap)
  2923. {
  2924. if (!ctx->ht.enabled || !ctx->ht.is_40mhz)
  2925. return false;
  2926. /*
  2927. * We do not check for IEEE80211_HT_CAP_SUP_WIDTH_20_40
  2928. * the bit will not set if it is pure 40MHz case
  2929. */
  2930. if (ht_cap && !ht_cap->ht_supported)
  2931. return false;
  2932. #ifdef CONFIG_IWLEGACY_DEBUGFS
  2933. if (il->disable_ht40)
  2934. return false;
  2935. #endif
  2936. return il_is_channel_extension(il, il->band,
  2937. le16_to_cpu(ctx->staging.channel),
  2938. ctx->ht.extension_chan_offset);
  2939. }
  2940. EXPORT_SYMBOL(il_is_ht40_tx_allowed);
  2941. static u16 il_adjust_beacon_interval(u16 beacon_val, u16 max_beacon_val)
  2942. {
  2943. u16 new_val;
  2944. u16 beacon_factor;
  2945. /*
  2946. * If mac80211 hasn't given us a beacon interval, program
  2947. * the default into the device.
  2948. */
  2949. if (!beacon_val)
  2950. return DEFAULT_BEACON_INTERVAL;
  2951. /*
  2952. * If the beacon interval we obtained from the peer
  2953. * is too large, we'll have to wake up more often
  2954. * (and in IBSS case, we'll beacon too much)
  2955. *
  2956. * For example, if max_beacon_val is 4096, and the
  2957. * requested beacon interval is 7000, we'll have to
  2958. * use 3500 to be able to wake up on the beacons.
  2959. *
  2960. * This could badly influence beacon detection stats.
  2961. */
  2962. beacon_factor = (beacon_val + max_beacon_val) / max_beacon_val;
  2963. new_val = beacon_val / beacon_factor;
  2964. if (!new_val)
  2965. new_val = max_beacon_val;
  2966. return new_val;
  2967. }
  2968. int
  2969. il_send_rxon_timing(struct il_priv *il, struct il_rxon_context *ctx)
  2970. {
  2971. u64 tsf;
  2972. s32 interval_tm, rem;
  2973. struct ieee80211_conf *conf = NULL;
  2974. u16 beacon_int;
  2975. struct ieee80211_vif *vif = ctx->vif;
  2976. conf = &il->hw->conf;
  2977. lockdep_assert_held(&il->mutex);
  2978. memset(&ctx->timing, 0, sizeof(struct il_rxon_time_cmd));
  2979. ctx->timing.timestamp = cpu_to_le64(il->timestamp);
  2980. ctx->timing.listen_interval = cpu_to_le16(conf->listen_interval);
  2981. beacon_int = vif ? vif->bss_conf.beacon_int : 0;
  2982. /*
  2983. * TODO: For IBSS we need to get atim_win from mac80211,
  2984. * for now just always use 0
  2985. */
  2986. ctx->timing.atim_win = 0;
  2987. beacon_int = il_adjust_beacon_interval(beacon_int,
  2988. il->hw_params.max_beacon_itrvl * TIME_UNIT);
  2989. ctx->timing.beacon_interval = cpu_to_le16(beacon_int);
  2990. tsf = il->timestamp; /* tsf is modifed by do_div: copy it */
  2991. interval_tm = beacon_int * TIME_UNIT;
  2992. rem = do_div(tsf, interval_tm);
  2993. ctx->timing.beacon_init_val = cpu_to_le32(interval_tm - rem);
  2994. ctx->timing.dtim_period = vif ? (vif->bss_conf.dtim_period ?: 1) : 1;
  2995. D_ASSOC(
  2996. "beacon interval %d beacon timer %d beacon tim %d\n",
  2997. le16_to_cpu(ctx->timing.beacon_interval),
  2998. le32_to_cpu(ctx->timing.beacon_init_val),
  2999. le16_to_cpu(ctx->timing.atim_win));
  3000. return il_send_cmd_pdu(il, ctx->rxon_timing_cmd,
  3001. sizeof(ctx->timing), &ctx->timing);
  3002. }
  3003. EXPORT_SYMBOL(il_send_rxon_timing);
  3004. void
  3005. il_set_rxon_hwcrypto(struct il_priv *il,
  3006. struct il_rxon_context *ctx,
  3007. int hw_decrypt)
  3008. {
  3009. struct il_rxon_cmd *rxon = &ctx->staging;
  3010. if (hw_decrypt)
  3011. rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK;
  3012. else
  3013. rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK;
  3014. }
  3015. EXPORT_SYMBOL(il_set_rxon_hwcrypto);
  3016. /* validate RXON structure is valid */
  3017. int
  3018. il_check_rxon_cmd(struct il_priv *il, struct il_rxon_context *ctx)
  3019. {
  3020. struct il_rxon_cmd *rxon = &ctx->staging;
  3021. bool error = false;
  3022. if (rxon->flags & RXON_FLG_BAND_24G_MSK) {
  3023. if (rxon->flags & RXON_FLG_TGJ_NARROW_BAND_MSK) {
  3024. IL_WARN("check 2.4G: wrong narrow\n");
  3025. error = true;
  3026. }
  3027. if (rxon->flags & RXON_FLG_RADAR_DETECT_MSK) {
  3028. IL_WARN("check 2.4G: wrong radar\n");
  3029. error = true;
  3030. }
  3031. } else {
  3032. if (!(rxon->flags & RXON_FLG_SHORT_SLOT_MSK)) {
  3033. IL_WARN("check 5.2G: not short slot!\n");
  3034. error = true;
  3035. }
  3036. if (rxon->flags & RXON_FLG_CCK_MSK) {
  3037. IL_WARN("check 5.2G: CCK!\n");
  3038. error = true;
  3039. }
  3040. }
  3041. if ((rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1) {
  3042. IL_WARN("mac/bssid mcast!\n");
  3043. error = true;
  3044. }
  3045. /* make sure basic rates 6Mbps and 1Mbps are supported */
  3046. if ((rxon->ofdm_basic_rates & RATE_6M_MASK) == 0 &&
  3047. (rxon->cck_basic_rates & RATE_1M_MASK) == 0) {
  3048. IL_WARN("neither 1 nor 6 are basic\n");
  3049. error = true;
  3050. }
  3051. if (le16_to_cpu(rxon->assoc_id) > 2007) {
  3052. IL_WARN("aid > 2007\n");
  3053. error = true;
  3054. }
  3055. if ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK))
  3056. == (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK)) {
  3057. IL_WARN("CCK and short slot\n");
  3058. error = true;
  3059. }
  3060. if ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK))
  3061. == (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK)) {
  3062. IL_WARN("CCK and auto detect");
  3063. error = true;
  3064. }
  3065. if ((rxon->flags & (RXON_FLG_AUTO_DETECT_MSK |
  3066. RXON_FLG_TGG_PROTECT_MSK)) ==
  3067. RXON_FLG_TGG_PROTECT_MSK) {
  3068. IL_WARN("TGg but no auto-detect\n");
  3069. error = true;
  3070. }
  3071. if (error)
  3072. IL_WARN("Tuning to channel %d\n",
  3073. le16_to_cpu(rxon->channel));
  3074. if (error) {
  3075. IL_ERR("Invalid RXON\n");
  3076. return -EINVAL;
  3077. }
  3078. return 0;
  3079. }
  3080. EXPORT_SYMBOL(il_check_rxon_cmd);
  3081. /**
  3082. * il_full_rxon_required - check if full RXON (vs RXON_ASSOC) cmd is needed
  3083. * @il: staging_rxon is compared to active_rxon
  3084. *
  3085. * If the RXON structure is changing enough to require a new tune,
  3086. * or is clearing the RXON_FILTER_ASSOC_MSK, then return 1 to indicate that
  3087. * a new tune (full RXON command, rather than RXON_ASSOC cmd) is required.
  3088. */
  3089. int il_full_rxon_required(struct il_priv *il,
  3090. struct il_rxon_context *ctx)
  3091. {
  3092. const struct il_rxon_cmd *staging = &ctx->staging;
  3093. const struct il_rxon_cmd *active = &ctx->active;
  3094. #define CHK(cond) \
  3095. if ((cond)) { \
  3096. D_INFO("need full RXON - " #cond "\n"); \
  3097. return 1; \
  3098. }
  3099. #define CHK_NEQ(c1, c2) \
  3100. if ((c1) != (c2)) { \
  3101. D_INFO("need full RXON - " \
  3102. #c1 " != " #c2 " - %d != %d\n", \
  3103. (c1), (c2)); \
  3104. return 1; \
  3105. }
  3106. /* These items are only settable from the full RXON command */
  3107. CHK(!il_is_associated_ctx(ctx));
  3108. CHK(compare_ether_addr(staging->bssid_addr, active->bssid_addr));
  3109. CHK(compare_ether_addr(staging->node_addr, active->node_addr));
  3110. CHK(compare_ether_addr(staging->wlap_bssid_addr,
  3111. active->wlap_bssid_addr));
  3112. CHK_NEQ(staging->dev_type, active->dev_type);
  3113. CHK_NEQ(staging->channel, active->channel);
  3114. CHK_NEQ(staging->air_propagation, active->air_propagation);
  3115. CHK_NEQ(staging->ofdm_ht_single_stream_basic_rates,
  3116. active->ofdm_ht_single_stream_basic_rates);
  3117. CHK_NEQ(staging->ofdm_ht_dual_stream_basic_rates,
  3118. active->ofdm_ht_dual_stream_basic_rates);
  3119. CHK_NEQ(staging->assoc_id, active->assoc_id);
  3120. /* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can
  3121. * be updated with the RXON_ASSOC command -- however only some
  3122. * flag transitions are allowed using RXON_ASSOC */
  3123. /* Check if we are not switching bands */
  3124. CHK_NEQ(staging->flags & RXON_FLG_BAND_24G_MSK,
  3125. active->flags & RXON_FLG_BAND_24G_MSK);
  3126. /* Check if we are switching association toggle */
  3127. CHK_NEQ(staging->filter_flags & RXON_FILTER_ASSOC_MSK,
  3128. active->filter_flags & RXON_FILTER_ASSOC_MSK);
  3129. #undef CHK
  3130. #undef CHK_NEQ
  3131. return 0;
  3132. }
  3133. EXPORT_SYMBOL(il_full_rxon_required);
  3134. u8 il_get_lowest_plcp(struct il_priv *il,
  3135. struct il_rxon_context *ctx)
  3136. {
  3137. /*
  3138. * Assign the lowest rate -- should really get this from
  3139. * the beacon skb from mac80211.
  3140. */
  3141. if (ctx->staging.flags & RXON_FLG_BAND_24G_MSK)
  3142. return RATE_1M_PLCP;
  3143. else
  3144. return RATE_6M_PLCP;
  3145. }
  3146. EXPORT_SYMBOL(il_get_lowest_plcp);
  3147. static void _il_set_rxon_ht(struct il_priv *il,
  3148. struct il_ht_config *ht_conf,
  3149. struct il_rxon_context *ctx)
  3150. {
  3151. struct il_rxon_cmd *rxon = &ctx->staging;
  3152. if (!ctx->ht.enabled) {
  3153. rxon->flags &= ~(RXON_FLG_CHANNEL_MODE_MSK |
  3154. RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK |
  3155. RXON_FLG_HT40_PROT_MSK |
  3156. RXON_FLG_HT_PROT_MSK);
  3157. return;
  3158. }
  3159. rxon->flags |= cpu_to_le32(ctx->ht.protection <<
  3160. RXON_FLG_HT_OPERATING_MODE_POS);
  3161. /* Set up channel bandwidth:
  3162. * 20 MHz only, 20/40 mixed or pure 40 if ht40 ok */
  3163. /* clear the HT channel mode before set the mode */
  3164. rxon->flags &= ~(RXON_FLG_CHANNEL_MODE_MSK |
  3165. RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK);
  3166. if (il_is_ht40_tx_allowed(il, ctx, NULL)) {
  3167. /* pure ht40 */
  3168. if (ctx->ht.protection ==
  3169. IEEE80211_HT_OP_MODE_PROTECTION_20MHZ) {
  3170. rxon->flags |= RXON_FLG_CHANNEL_MODE_PURE_40;
  3171. /* Note: control channel is opposite of extension channel */
  3172. switch (ctx->ht.extension_chan_offset) {
  3173. case IEEE80211_HT_PARAM_CHA_SEC_ABOVE:
  3174. rxon->flags &=
  3175. ~RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
  3176. break;
  3177. case IEEE80211_HT_PARAM_CHA_SEC_BELOW:
  3178. rxon->flags |=
  3179. RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
  3180. break;
  3181. }
  3182. } else {
  3183. /* Note: control channel is opposite of extension channel */
  3184. switch (ctx->ht.extension_chan_offset) {
  3185. case IEEE80211_HT_PARAM_CHA_SEC_ABOVE:
  3186. rxon->flags &=
  3187. ~(RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK);
  3188. rxon->flags |= RXON_FLG_CHANNEL_MODE_MIXED;
  3189. break;
  3190. case IEEE80211_HT_PARAM_CHA_SEC_BELOW:
  3191. rxon->flags |=
  3192. RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
  3193. rxon->flags |= RXON_FLG_CHANNEL_MODE_MIXED;
  3194. break;
  3195. case IEEE80211_HT_PARAM_CHA_SEC_NONE:
  3196. default:
  3197. /* channel location only valid if in Mixed mode */
  3198. IL_ERR(
  3199. "invalid extension channel offset\n");
  3200. break;
  3201. }
  3202. }
  3203. } else {
  3204. rxon->flags |= RXON_FLG_CHANNEL_MODE_LEGACY;
  3205. }
  3206. if (il->cfg->ops->hcmd->set_rxon_chain)
  3207. il->cfg->ops->hcmd->set_rxon_chain(il, ctx);
  3208. D_ASSOC("rxon flags 0x%X operation mode :0x%X "
  3209. "extension channel offset 0x%x\n",
  3210. le32_to_cpu(rxon->flags), ctx->ht.protection,
  3211. ctx->ht.extension_chan_offset);
  3212. }
  3213. void il_set_rxon_ht(struct il_priv *il, struct il_ht_config *ht_conf)
  3214. {
  3215. _il_set_rxon_ht(il, ht_conf, &il->ctx);
  3216. }
  3217. EXPORT_SYMBOL(il_set_rxon_ht);
  3218. /* Return valid, unused, channel for a passive scan to reset the RF */
  3219. u8 il_get_single_channel_number(struct il_priv *il,
  3220. enum ieee80211_band band)
  3221. {
  3222. const struct il_channel_info *ch_info;
  3223. int i;
  3224. u8 channel = 0;
  3225. u8 min, max;
  3226. if (band == IEEE80211_BAND_5GHZ) {
  3227. min = 14;
  3228. max = il->channel_count;
  3229. } else {
  3230. min = 0;
  3231. max = 14;
  3232. }
  3233. for (i = min; i < max; i++) {
  3234. channel = il->channel_info[i].channel;
  3235. if (channel == le16_to_cpu(il->ctx.staging.channel))
  3236. continue;
  3237. ch_info = il_get_channel_info(il, band, channel);
  3238. if (il_is_channel_valid(ch_info))
  3239. break;
  3240. }
  3241. return channel;
  3242. }
  3243. EXPORT_SYMBOL(il_get_single_channel_number);
  3244. /**
  3245. * il_set_rxon_channel - Set the band and channel values in staging RXON
  3246. * @ch: requested channel as a pointer to struct ieee80211_channel
  3247. * NOTE: Does not commit to the hardware; it sets appropriate bit fields
  3248. * in the staging RXON flag structure based on the ch->band
  3249. */
  3250. int
  3251. il_set_rxon_channel(struct il_priv *il, struct ieee80211_channel *ch,
  3252. struct il_rxon_context *ctx)
  3253. {
  3254. enum ieee80211_band band = ch->band;
  3255. u16 channel = ch->hw_value;
  3256. if (le16_to_cpu(ctx->staging.channel) == channel && il->band == band)
  3257. return 0;
  3258. ctx->staging.channel = cpu_to_le16(channel);
  3259. if (band == IEEE80211_BAND_5GHZ)
  3260. ctx->staging.flags &= ~RXON_FLG_BAND_24G_MSK;
  3261. else
  3262. ctx->staging.flags |= RXON_FLG_BAND_24G_MSK;
  3263. il->band = band;
  3264. D_INFO("Staging channel set to %d [%d]\n", channel, band);
  3265. return 0;
  3266. }
  3267. EXPORT_SYMBOL(il_set_rxon_channel);
  3268. void il_set_flags_for_band(struct il_priv *il,
  3269. struct il_rxon_context *ctx,
  3270. enum ieee80211_band band,
  3271. struct ieee80211_vif *vif)
  3272. {
  3273. if (band == IEEE80211_BAND_5GHZ) {
  3274. ctx->staging.flags &=
  3275. ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK
  3276. | RXON_FLG_CCK_MSK);
  3277. ctx->staging.flags |= RXON_FLG_SHORT_SLOT_MSK;
  3278. } else {
  3279. /* Copied from il_post_associate() */
  3280. if (vif && vif->bss_conf.use_short_slot)
  3281. ctx->staging.flags |= RXON_FLG_SHORT_SLOT_MSK;
  3282. else
  3283. ctx->staging.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  3284. ctx->staging.flags |= RXON_FLG_BAND_24G_MSK;
  3285. ctx->staging.flags |= RXON_FLG_AUTO_DETECT_MSK;
  3286. ctx->staging.flags &= ~RXON_FLG_CCK_MSK;
  3287. }
  3288. }
  3289. EXPORT_SYMBOL(il_set_flags_for_band);
  3290. /*
  3291. * initialize rxon structure with default values from eeprom
  3292. */
  3293. void il_connection_init_rx_config(struct il_priv *il,
  3294. struct il_rxon_context *ctx)
  3295. {
  3296. const struct il_channel_info *ch_info;
  3297. memset(&ctx->staging, 0, sizeof(ctx->staging));
  3298. if (!ctx->vif) {
  3299. ctx->staging.dev_type = ctx->unused_devtype;
  3300. } else
  3301. switch (ctx->vif->type) {
  3302. case NL80211_IFTYPE_STATION:
  3303. ctx->staging.dev_type = ctx->station_devtype;
  3304. ctx->staging.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK;
  3305. break;
  3306. case NL80211_IFTYPE_ADHOC:
  3307. ctx->staging.dev_type = ctx->ibss_devtype;
  3308. ctx->staging.flags = RXON_FLG_SHORT_PREAMBLE_MSK;
  3309. ctx->staging.filter_flags = RXON_FILTER_BCON_AWARE_MSK |
  3310. RXON_FILTER_ACCEPT_GRP_MSK;
  3311. break;
  3312. default:
  3313. IL_ERR("Unsupported interface type %d\n",
  3314. ctx->vif->type);
  3315. break;
  3316. }
  3317. #if 0
  3318. /* TODO: Figure out when short_preamble would be set and cache from
  3319. * that */
  3320. if (!hw_to_local(il->hw)->short_preamble)
  3321. ctx->staging.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  3322. else
  3323. ctx->staging.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  3324. #endif
  3325. ch_info = il_get_channel_info(il, il->band,
  3326. le16_to_cpu(ctx->active.channel));
  3327. if (!ch_info)
  3328. ch_info = &il->channel_info[0];
  3329. ctx->staging.channel = cpu_to_le16(ch_info->channel);
  3330. il->band = ch_info->band;
  3331. il_set_flags_for_band(il, ctx, il->band, ctx->vif);
  3332. ctx->staging.ofdm_basic_rates =
  3333. (IL_OFDM_RATES_MASK >> IL_FIRST_OFDM_RATE) & 0xFF;
  3334. ctx->staging.cck_basic_rates =
  3335. (IL_CCK_RATES_MASK >> IL_FIRST_CCK_RATE) & 0xF;
  3336. /* clear both MIX and PURE40 mode flag */
  3337. ctx->staging.flags &= ~(RXON_FLG_CHANNEL_MODE_MIXED |
  3338. RXON_FLG_CHANNEL_MODE_PURE_40);
  3339. if (ctx->vif)
  3340. memcpy(ctx->staging.node_addr, ctx->vif->addr, ETH_ALEN);
  3341. ctx->staging.ofdm_ht_single_stream_basic_rates = 0xff;
  3342. ctx->staging.ofdm_ht_dual_stream_basic_rates = 0xff;
  3343. }
  3344. EXPORT_SYMBOL(il_connection_init_rx_config);
  3345. void il_set_rate(struct il_priv *il)
  3346. {
  3347. const struct ieee80211_supported_band *hw = NULL;
  3348. struct ieee80211_rate *rate;
  3349. int i;
  3350. hw = il_get_hw_mode(il, il->band);
  3351. if (!hw) {
  3352. IL_ERR("Failed to set rate: unable to get hw mode\n");
  3353. return;
  3354. }
  3355. il->active_rate = 0;
  3356. for (i = 0; i < hw->n_bitrates; i++) {
  3357. rate = &(hw->bitrates[i]);
  3358. if (rate->hw_value < RATE_COUNT_LEGACY)
  3359. il->active_rate |= (1 << rate->hw_value);
  3360. }
  3361. D_RATE("Set active_rate = %0x\n", il->active_rate);
  3362. il->ctx.staging.cck_basic_rates =
  3363. (IL_CCK_BASIC_RATES_MASK >> IL_FIRST_CCK_RATE) & 0xF;
  3364. il->ctx.staging.ofdm_basic_rates =
  3365. (IL_OFDM_BASIC_RATES_MASK >> IL_FIRST_OFDM_RATE) & 0xFF;
  3366. }
  3367. EXPORT_SYMBOL(il_set_rate);
  3368. void il_chswitch_done(struct il_priv *il, bool is_success)
  3369. {
  3370. struct il_rxon_context *ctx = &il->ctx;
  3371. if (test_bit(S_EXIT_PENDING, &il->status))
  3372. return;
  3373. if (test_and_clear_bit(S_CHANNEL_SWITCH_PENDING, &il->status))
  3374. ieee80211_chswitch_done(ctx->vif, is_success);
  3375. }
  3376. EXPORT_SYMBOL(il_chswitch_done);
  3377. void il_hdl_csa(struct il_priv *il, struct il_rx_buf *rxb)
  3378. {
  3379. struct il_rx_pkt *pkt = rxb_addr(rxb);
  3380. struct il_csa_notification *csa = &(pkt->u.csa_notif);
  3381. struct il_rxon_context *ctx = &il->ctx;
  3382. struct il_rxon_cmd *rxon = (void *)&ctx->active;
  3383. if (!test_bit(S_CHANNEL_SWITCH_PENDING, &il->status))
  3384. return;
  3385. if (!le32_to_cpu(csa->status) && csa->channel == il->switch_channel) {
  3386. rxon->channel = csa->channel;
  3387. ctx->staging.channel = csa->channel;
  3388. D_11H("CSA notif: channel %d\n",
  3389. le16_to_cpu(csa->channel));
  3390. il_chswitch_done(il, true);
  3391. } else {
  3392. IL_ERR("CSA notif (fail) : channel %d\n",
  3393. le16_to_cpu(csa->channel));
  3394. il_chswitch_done(il, false);
  3395. }
  3396. }
  3397. EXPORT_SYMBOL(il_hdl_csa);
  3398. #ifdef CONFIG_IWLEGACY_DEBUG
  3399. void il_print_rx_config_cmd(struct il_priv *il,
  3400. struct il_rxon_context *ctx)
  3401. {
  3402. struct il_rxon_cmd *rxon = &ctx->staging;
  3403. D_RADIO("RX CONFIG:\n");
  3404. il_print_hex_dump(il, IL_DL_RADIO, (u8 *) rxon, sizeof(*rxon));
  3405. D_RADIO("u16 channel: 0x%x\n",
  3406. le16_to_cpu(rxon->channel));
  3407. D_RADIO("u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags));
  3408. D_RADIO("u32 filter_flags: 0x%08x\n",
  3409. le32_to_cpu(rxon->filter_flags));
  3410. D_RADIO("u8 dev_type: 0x%x\n", rxon->dev_type);
  3411. D_RADIO("u8 ofdm_basic_rates: 0x%02x\n",
  3412. rxon->ofdm_basic_rates);
  3413. D_RADIO("u8 cck_basic_rates: 0x%02x\n",
  3414. rxon->cck_basic_rates);
  3415. D_RADIO("u8[6] node_addr: %pM\n", rxon->node_addr);
  3416. D_RADIO("u8[6] bssid_addr: %pM\n", rxon->bssid_addr);
  3417. D_RADIO("u16 assoc_id: 0x%x\n",
  3418. le16_to_cpu(rxon->assoc_id));
  3419. }
  3420. EXPORT_SYMBOL(il_print_rx_config_cmd);
  3421. #endif
  3422. /**
  3423. * il_irq_handle_error - called for HW or SW error interrupt from card
  3424. */
  3425. void il_irq_handle_error(struct il_priv *il)
  3426. {
  3427. /* Set the FW error flag -- cleared on il_down */
  3428. set_bit(S_FW_ERROR, &il->status);
  3429. /* Cancel currently queued command. */
  3430. clear_bit(S_HCMD_ACTIVE, &il->status);
  3431. IL_ERR("Loaded firmware version: %s\n",
  3432. il->hw->wiphy->fw_version);
  3433. il->cfg->ops->lib->dump_nic_error_log(il);
  3434. if (il->cfg->ops->lib->dump_fh)
  3435. il->cfg->ops->lib->dump_fh(il, NULL, false);
  3436. #ifdef CONFIG_IWLEGACY_DEBUG
  3437. if (il_get_debug_level(il) & IL_DL_FW_ERRORS)
  3438. il_print_rx_config_cmd(il,
  3439. &il->ctx);
  3440. #endif
  3441. wake_up(&il->wait_command_queue);
  3442. /* Keep the restart process from trying to send host
  3443. * commands by clearing the INIT status bit */
  3444. clear_bit(S_READY, &il->status);
  3445. if (!test_bit(S_EXIT_PENDING, &il->status)) {
  3446. IL_DBG(IL_DL_FW_ERRORS,
  3447. "Restarting adapter due to uCode error.\n");
  3448. if (il->cfg->mod_params->restart_fw)
  3449. queue_work(il->workqueue, &il->restart);
  3450. }
  3451. }
  3452. EXPORT_SYMBOL(il_irq_handle_error);
  3453. static int il_apm_stop_master(struct il_priv *il)
  3454. {
  3455. int ret = 0;
  3456. /* stop device's busmaster DMA activity */
  3457. il_set_bit(il, CSR_RESET, CSR_RESET_REG_FLAG_STOP_MASTER);
  3458. ret = _il_poll_bit(il, CSR_RESET, CSR_RESET_REG_FLAG_MASTER_DISABLED,
  3459. CSR_RESET_REG_FLAG_MASTER_DISABLED, 100);
  3460. if (ret)
  3461. IL_WARN("Master Disable Timed Out, 100 usec\n");
  3462. D_INFO("stop master\n");
  3463. return ret;
  3464. }
  3465. void il_apm_stop(struct il_priv *il)
  3466. {
  3467. D_INFO("Stop card, put in low power state\n");
  3468. /* Stop device's DMA activity */
  3469. il_apm_stop_master(il);
  3470. /* Reset the entire device */
  3471. il_set_bit(il, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
  3472. udelay(10);
  3473. /*
  3474. * Clear "initialization complete" bit to move adapter from
  3475. * D0A* (powered-up Active) --> D0U* (Uninitialized) state.
  3476. */
  3477. il_clear_bit(il, CSR_GP_CNTRL,
  3478. CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
  3479. }
  3480. EXPORT_SYMBOL(il_apm_stop);
  3481. /*
  3482. * Start up NIC's basic functionality after it has been reset
  3483. * (e.g. after platform boot, or shutdown via il_apm_stop())
  3484. * NOTE: This does not load uCode nor start the embedded processor
  3485. */
  3486. int il_apm_init(struct il_priv *il)
  3487. {
  3488. int ret = 0;
  3489. u16 lctl;
  3490. D_INFO("Init card's basic functions\n");
  3491. /*
  3492. * Use "set_bit" below rather than "write", to preserve any hardware
  3493. * bits already set by default after reset.
  3494. */
  3495. /* Disable L0S exit timer (platform NMI Work/Around) */
  3496. il_set_bit(il, CSR_GIO_CHICKEN_BITS,
  3497. CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER);
  3498. /*
  3499. * Disable L0s without affecting L1;
  3500. * don't wait for ICH L0s (ICH bug W/A)
  3501. */
  3502. il_set_bit(il, CSR_GIO_CHICKEN_BITS,
  3503. CSR_GIO_CHICKEN_BITS_REG_BIT_L1A_NO_L0S_RX);
  3504. /* Set FH wait threshold to maximum (HW error during stress W/A) */
  3505. il_set_bit(il, CSR_DBG_HPET_MEM_REG,
  3506. CSR_DBG_HPET_MEM_REG_VAL);
  3507. /*
  3508. * Enable HAP INTA (interrupt from management bus) to
  3509. * wake device's PCI Express link L1a -> L0s
  3510. * NOTE: This is no-op for 3945 (non-existent bit)
  3511. */
  3512. il_set_bit(il, CSR_HW_IF_CONFIG_REG,
  3513. CSR_HW_IF_CONFIG_REG_BIT_HAP_WAKE_L1A);
  3514. /*
  3515. * HW bug W/A for instability in PCIe bus L0->L0S->L1 transition.
  3516. * Check if BIOS (or OS) enabled L1-ASPM on this device.
  3517. * If so (likely), disable L0S, so device moves directly L0->L1;
  3518. * costs negligible amount of power savings.
  3519. * If not (unlikely), enable L0S, so there is at least some
  3520. * power savings, even without L1.
  3521. */
  3522. if (il->cfg->base_params->set_l0s) {
  3523. lctl = il_pcie_link_ctl(il);
  3524. if ((lctl & PCI_CFG_LINK_CTRL_VAL_L1_EN) ==
  3525. PCI_CFG_LINK_CTRL_VAL_L1_EN) {
  3526. /* L1-ASPM enabled; disable(!) L0S */
  3527. il_set_bit(il, CSR_GIO_REG,
  3528. CSR_GIO_REG_VAL_L0S_ENABLED);
  3529. D_POWER("L1 Enabled; Disabling L0S\n");
  3530. } else {
  3531. /* L1-ASPM disabled; enable(!) L0S */
  3532. il_clear_bit(il, CSR_GIO_REG,
  3533. CSR_GIO_REG_VAL_L0S_ENABLED);
  3534. D_POWER("L1 Disabled; Enabling L0S\n");
  3535. }
  3536. }
  3537. /* Configure analog phase-lock-loop before activating to D0A */
  3538. if (il->cfg->base_params->pll_cfg_val)
  3539. il_set_bit(il, CSR_ANA_PLL_CFG,
  3540. il->cfg->base_params->pll_cfg_val);
  3541. /*
  3542. * Set "initialization complete" bit to move adapter from
  3543. * D0U* --> D0A* (powered-up active) state.
  3544. */
  3545. il_set_bit(il, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
  3546. /*
  3547. * Wait for clock stabilization; once stabilized, access to
  3548. * device-internal resources is supported, e.g. il_wr_prph()
  3549. * and accesses to uCode SRAM.
  3550. */
  3551. ret = _il_poll_bit(il, CSR_GP_CNTRL,
  3552. CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
  3553. CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
  3554. if (ret < 0) {
  3555. D_INFO("Failed to init the card\n");
  3556. goto out;
  3557. }
  3558. /*
  3559. * Enable DMA and BSM (if used) clocks, wait for them to stabilize.
  3560. * BSM (Boostrap State Machine) is only in 3945 and 4965.
  3561. *
  3562. * Write to "CLK_EN_REG"; "1" bits enable clocks, while "0" bits
  3563. * do not disable clocks. This preserves any hardware bits already
  3564. * set by default in "CLK_CTRL_REG" after reset.
  3565. */
  3566. if (il->cfg->base_params->use_bsm)
  3567. il_wr_prph(il, APMG_CLK_EN_REG,
  3568. APMG_CLK_VAL_DMA_CLK_RQT | APMG_CLK_VAL_BSM_CLK_RQT);
  3569. else
  3570. il_wr_prph(il, APMG_CLK_EN_REG,
  3571. APMG_CLK_VAL_DMA_CLK_RQT);
  3572. udelay(20);
  3573. /* Disable L1-Active */
  3574. il_set_bits_prph(il, APMG_PCIDEV_STT_REG,
  3575. APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
  3576. out:
  3577. return ret;
  3578. }
  3579. EXPORT_SYMBOL(il_apm_init);
  3580. int il_set_tx_power(struct il_priv *il, s8 tx_power, bool force)
  3581. {
  3582. int ret;
  3583. s8 prev_tx_power;
  3584. bool defer;
  3585. struct il_rxon_context *ctx = &il->ctx;
  3586. lockdep_assert_held(&il->mutex);
  3587. if (il->tx_power_user_lmt == tx_power && !force)
  3588. return 0;
  3589. if (!il->cfg->ops->lib->send_tx_power)
  3590. return -EOPNOTSUPP;
  3591. /* 0 dBm mean 1 milliwatt */
  3592. if (tx_power < 0) {
  3593. IL_WARN(
  3594. "Requested user TXPOWER %d below 1 mW.\n",
  3595. tx_power);
  3596. return -EINVAL;
  3597. }
  3598. if (tx_power > il->tx_power_device_lmt) {
  3599. IL_WARN(
  3600. "Requested user TXPOWER %d above upper limit %d.\n",
  3601. tx_power, il->tx_power_device_lmt);
  3602. return -EINVAL;
  3603. }
  3604. if (!il_is_ready_rf(il))
  3605. return -EIO;
  3606. /* scan complete and commit_rxon use tx_power_next value,
  3607. * it always need to be updated for newest request */
  3608. il->tx_power_next = tx_power;
  3609. /* do not set tx power when scanning or channel changing */
  3610. defer = test_bit(S_SCANNING, &il->status) ||
  3611. memcmp(&ctx->active, &ctx->staging, sizeof(ctx->staging));
  3612. if (defer && !force) {
  3613. D_INFO("Deferring tx power set\n");
  3614. return 0;
  3615. }
  3616. prev_tx_power = il->tx_power_user_lmt;
  3617. il->tx_power_user_lmt = tx_power;
  3618. ret = il->cfg->ops->lib->send_tx_power(il);
  3619. /* if fail to set tx_power, restore the orig. tx power */
  3620. if (ret) {
  3621. il->tx_power_user_lmt = prev_tx_power;
  3622. il->tx_power_next = prev_tx_power;
  3623. }
  3624. return ret;
  3625. }
  3626. EXPORT_SYMBOL(il_set_tx_power);
  3627. void il_send_bt_config(struct il_priv *il)
  3628. {
  3629. struct il_bt_cmd bt_cmd = {
  3630. .lead_time = BT_LEAD_TIME_DEF,
  3631. .max_kill = BT_MAX_KILL_DEF,
  3632. .kill_ack_mask = 0,
  3633. .kill_cts_mask = 0,
  3634. };
  3635. if (!bt_coex_active)
  3636. bt_cmd.flags = BT_COEX_DISABLE;
  3637. else
  3638. bt_cmd.flags = BT_COEX_ENABLE;
  3639. D_INFO("BT coex %s\n",
  3640. (bt_cmd.flags == BT_COEX_DISABLE) ? "disable" : "active");
  3641. if (il_send_cmd_pdu(il, C_BT_CONFIG,
  3642. sizeof(struct il_bt_cmd), &bt_cmd))
  3643. IL_ERR("failed to send BT Coex Config\n");
  3644. }
  3645. EXPORT_SYMBOL(il_send_bt_config);
  3646. int il_send_stats_request(struct il_priv *il, u8 flags, bool clear)
  3647. {
  3648. struct il_stats_cmd stats_cmd = {
  3649. .configuration_flags =
  3650. clear ? IL_STATS_CONF_CLEAR_STATS : 0,
  3651. };
  3652. if (flags & CMD_ASYNC)
  3653. return il_send_cmd_pdu_async(il, C_STATS,
  3654. sizeof(struct il_stats_cmd),
  3655. &stats_cmd, NULL);
  3656. else
  3657. return il_send_cmd_pdu(il, C_STATS,
  3658. sizeof(struct il_stats_cmd),
  3659. &stats_cmd);
  3660. }
  3661. EXPORT_SYMBOL(il_send_stats_request);
  3662. void il_hdl_pm_sleep(struct il_priv *il,
  3663. struct il_rx_buf *rxb)
  3664. {
  3665. #ifdef CONFIG_IWLEGACY_DEBUG
  3666. struct il_rx_pkt *pkt = rxb_addr(rxb);
  3667. struct il_sleep_notification *sleep = &(pkt->u.sleep_notif);
  3668. D_RX("sleep mode: %d, src: %d\n",
  3669. sleep->pm_sleep_mode, sleep->pm_wakeup_src);
  3670. #endif
  3671. }
  3672. EXPORT_SYMBOL(il_hdl_pm_sleep);
  3673. void il_hdl_pm_debug_stats(struct il_priv *il,
  3674. struct il_rx_buf *rxb)
  3675. {
  3676. struct il_rx_pkt *pkt = rxb_addr(rxb);
  3677. u32 len = le32_to_cpu(pkt->len_n_flags) & IL_RX_FRAME_SIZE_MSK;
  3678. D_RADIO("Dumping %d bytes of unhandled "
  3679. "notification for %s:\n", len,
  3680. il_get_cmd_string(pkt->hdr.cmd));
  3681. il_print_hex_dump(il, IL_DL_RADIO, pkt->u.raw, len);
  3682. }
  3683. EXPORT_SYMBOL(il_hdl_pm_debug_stats);
  3684. void il_hdl_error(struct il_priv *il,
  3685. struct il_rx_buf *rxb)
  3686. {
  3687. struct il_rx_pkt *pkt = rxb_addr(rxb);
  3688. IL_ERR("Error Reply type 0x%08X cmd %s (0x%02X) "
  3689. "seq 0x%04X ser 0x%08X\n",
  3690. le32_to_cpu(pkt->u.err_resp.error_type),
  3691. il_get_cmd_string(pkt->u.err_resp.cmd_id),
  3692. pkt->u.err_resp.cmd_id,
  3693. le16_to_cpu(pkt->u.err_resp.bad_cmd_seq_num),
  3694. le32_to_cpu(pkt->u.err_resp.error_info));
  3695. }
  3696. EXPORT_SYMBOL(il_hdl_error);
  3697. void il_clear_isr_stats(struct il_priv *il)
  3698. {
  3699. memset(&il->isr_stats, 0, sizeof(il->isr_stats));
  3700. }
  3701. int il_mac_conf_tx(struct ieee80211_hw *hw,
  3702. struct ieee80211_vif *vif, u16 queue,
  3703. const struct ieee80211_tx_queue_params *params)
  3704. {
  3705. struct il_priv *il = hw->priv;
  3706. unsigned long flags;
  3707. int q;
  3708. D_MAC80211("enter\n");
  3709. if (!il_is_ready_rf(il)) {
  3710. D_MAC80211("leave - RF not ready\n");
  3711. return -EIO;
  3712. }
  3713. if (queue >= AC_NUM) {
  3714. D_MAC80211("leave - queue >= AC_NUM %d\n", queue);
  3715. return 0;
  3716. }
  3717. q = AC_NUM - 1 - queue;
  3718. spin_lock_irqsave(&il->lock, flags);
  3719. il->ctx.qos_data.def_qos_parm.ac[q].cw_min =
  3720. cpu_to_le16(params->cw_min);
  3721. il->ctx.qos_data.def_qos_parm.ac[q].cw_max =
  3722. cpu_to_le16(params->cw_max);
  3723. il->ctx.qos_data.def_qos_parm.ac[q].aifsn = params->aifs;
  3724. il->ctx.qos_data.def_qos_parm.ac[q].edca_txop =
  3725. cpu_to_le16((params->txop * 32));
  3726. il->ctx.qos_data.def_qos_parm.ac[q].reserved1 = 0;
  3727. spin_unlock_irqrestore(&il->lock, flags);
  3728. D_MAC80211("leave\n");
  3729. return 0;
  3730. }
  3731. EXPORT_SYMBOL(il_mac_conf_tx);
  3732. int il_mac_tx_last_beacon(struct ieee80211_hw *hw)
  3733. {
  3734. struct il_priv *il = hw->priv;
  3735. return il->ibss_manager == IL_IBSS_MANAGER;
  3736. }
  3737. EXPORT_SYMBOL_GPL(il_mac_tx_last_beacon);
  3738. static int
  3739. il_set_mode(struct il_priv *il, struct il_rxon_context *ctx)
  3740. {
  3741. il_connection_init_rx_config(il, ctx);
  3742. if (il->cfg->ops->hcmd->set_rxon_chain)
  3743. il->cfg->ops->hcmd->set_rxon_chain(il, ctx);
  3744. return il_commit_rxon(il, ctx);
  3745. }
  3746. static int il_setup_interface(struct il_priv *il,
  3747. struct il_rxon_context *ctx)
  3748. {
  3749. struct ieee80211_vif *vif = ctx->vif;
  3750. int err;
  3751. lockdep_assert_held(&il->mutex);
  3752. /*
  3753. * This variable will be correct only when there's just
  3754. * a single context, but all code using it is for hardware
  3755. * that supports only one context.
  3756. */
  3757. il->iw_mode = vif->type;
  3758. ctx->is_active = true;
  3759. err = il_set_mode(il, ctx);
  3760. if (err) {
  3761. if (!ctx->always_active)
  3762. ctx->is_active = false;
  3763. return err;
  3764. }
  3765. return 0;
  3766. }
  3767. int
  3768. il_mac_add_interface(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
  3769. {
  3770. struct il_priv *il = hw->priv;
  3771. struct il_vif_priv *vif_priv = (void *)vif->drv_priv;
  3772. int err;
  3773. u32 modes;
  3774. D_MAC80211("enter: type %d, addr %pM\n",
  3775. vif->type, vif->addr);
  3776. mutex_lock(&il->mutex);
  3777. if (!il_is_ready_rf(il)) {
  3778. IL_WARN("Try to add interface when device not ready\n");
  3779. err = -EINVAL;
  3780. goto out;
  3781. }
  3782. /* check if busy context is exclusive */
  3783. if (il->ctx.vif &&
  3784. (il->ctx.exclusive_interface_modes & BIT(il->ctx.vif->type))) {
  3785. err = -EINVAL;
  3786. goto out;
  3787. }
  3788. modes = il->ctx.interface_modes | il->ctx.exclusive_interface_modes;
  3789. if (!(modes & BIT(vif->type))) {
  3790. err = -EOPNOTSUPP;
  3791. goto out;
  3792. }
  3793. vif_priv->ctx = &il->ctx;
  3794. il->ctx.vif = vif;
  3795. err = il_setup_interface(il, &il->ctx);
  3796. if (err) {
  3797. il->ctx.vif = NULL;
  3798. il->iw_mode = NL80211_IFTYPE_STATION;
  3799. }
  3800. out:
  3801. mutex_unlock(&il->mutex);
  3802. D_MAC80211("leave\n");
  3803. return err;
  3804. }
  3805. EXPORT_SYMBOL(il_mac_add_interface);
  3806. static void il_teardown_interface(struct il_priv *il,
  3807. struct ieee80211_vif *vif,
  3808. bool mode_change)
  3809. {
  3810. struct il_rxon_context *ctx = il_rxon_ctx_from_vif(vif);
  3811. lockdep_assert_held(&il->mutex);
  3812. if (il->scan_vif == vif) {
  3813. il_scan_cancel_timeout(il, 200);
  3814. il_force_scan_end(il);
  3815. }
  3816. if (!mode_change) {
  3817. il_set_mode(il, ctx);
  3818. if (!ctx->always_active)
  3819. ctx->is_active = false;
  3820. }
  3821. }
  3822. void il_mac_remove_interface(struct ieee80211_hw *hw,
  3823. struct ieee80211_vif *vif)
  3824. {
  3825. struct il_priv *il = hw->priv;
  3826. struct il_rxon_context *ctx = il_rxon_ctx_from_vif(vif);
  3827. D_MAC80211("enter\n");
  3828. mutex_lock(&il->mutex);
  3829. WARN_ON(ctx->vif != vif);
  3830. ctx->vif = NULL;
  3831. il_teardown_interface(il, vif, false);
  3832. memset(il->bssid, 0, ETH_ALEN);
  3833. mutex_unlock(&il->mutex);
  3834. D_MAC80211("leave\n");
  3835. }
  3836. EXPORT_SYMBOL(il_mac_remove_interface);
  3837. int il_alloc_txq_mem(struct il_priv *il)
  3838. {
  3839. if (!il->txq)
  3840. il->txq = kzalloc(
  3841. sizeof(struct il_tx_queue) *
  3842. il->cfg->base_params->num_of_queues,
  3843. GFP_KERNEL);
  3844. if (!il->txq) {
  3845. IL_ERR("Not enough memory for txq\n");
  3846. return -ENOMEM;
  3847. }
  3848. return 0;
  3849. }
  3850. EXPORT_SYMBOL(il_alloc_txq_mem);
  3851. void il_txq_mem(struct il_priv *il)
  3852. {
  3853. kfree(il->txq);
  3854. il->txq = NULL;
  3855. }
  3856. EXPORT_SYMBOL(il_txq_mem);
  3857. #ifdef CONFIG_IWLEGACY_DEBUGFS
  3858. #define IL_TRAFFIC_DUMP_SIZE (IL_TRAFFIC_ENTRY_SIZE * IL_TRAFFIC_ENTRIES)
  3859. void il_reset_traffic_log(struct il_priv *il)
  3860. {
  3861. il->tx_traffic_idx = 0;
  3862. il->rx_traffic_idx = 0;
  3863. if (il->tx_traffic)
  3864. memset(il->tx_traffic, 0, IL_TRAFFIC_DUMP_SIZE);
  3865. if (il->rx_traffic)
  3866. memset(il->rx_traffic, 0, IL_TRAFFIC_DUMP_SIZE);
  3867. }
  3868. int il_alloc_traffic_mem(struct il_priv *il)
  3869. {
  3870. u32 traffic_size = IL_TRAFFIC_DUMP_SIZE;
  3871. if (il_debug_level & IL_DL_TX) {
  3872. if (!il->tx_traffic) {
  3873. il->tx_traffic =
  3874. kzalloc(traffic_size, GFP_KERNEL);
  3875. if (!il->tx_traffic)
  3876. return -ENOMEM;
  3877. }
  3878. }
  3879. if (il_debug_level & IL_DL_RX) {
  3880. if (!il->rx_traffic) {
  3881. il->rx_traffic =
  3882. kzalloc(traffic_size, GFP_KERNEL);
  3883. if (!il->rx_traffic)
  3884. return -ENOMEM;
  3885. }
  3886. }
  3887. il_reset_traffic_log(il);
  3888. return 0;
  3889. }
  3890. EXPORT_SYMBOL(il_alloc_traffic_mem);
  3891. void il_free_traffic_mem(struct il_priv *il)
  3892. {
  3893. kfree(il->tx_traffic);
  3894. il->tx_traffic = NULL;
  3895. kfree(il->rx_traffic);
  3896. il->rx_traffic = NULL;
  3897. }
  3898. EXPORT_SYMBOL(il_free_traffic_mem);
  3899. void il_dbg_log_tx_data_frame(struct il_priv *il,
  3900. u16 length, struct ieee80211_hdr *header)
  3901. {
  3902. __le16 fc;
  3903. u16 len;
  3904. if (likely(!(il_debug_level & IL_DL_TX)))
  3905. return;
  3906. if (!il->tx_traffic)
  3907. return;
  3908. fc = header->frame_control;
  3909. if (ieee80211_is_data(fc)) {
  3910. len = (length > IL_TRAFFIC_ENTRY_SIZE)
  3911. ? IL_TRAFFIC_ENTRY_SIZE : length;
  3912. memcpy((il->tx_traffic +
  3913. (il->tx_traffic_idx * IL_TRAFFIC_ENTRY_SIZE)),
  3914. header, len);
  3915. il->tx_traffic_idx =
  3916. (il->tx_traffic_idx + 1) % IL_TRAFFIC_ENTRIES;
  3917. }
  3918. }
  3919. EXPORT_SYMBOL(il_dbg_log_tx_data_frame);
  3920. void il_dbg_log_rx_data_frame(struct il_priv *il,
  3921. u16 length, struct ieee80211_hdr *header)
  3922. {
  3923. __le16 fc;
  3924. u16 len;
  3925. if (likely(!(il_debug_level & IL_DL_RX)))
  3926. return;
  3927. if (!il->rx_traffic)
  3928. return;
  3929. fc = header->frame_control;
  3930. if (ieee80211_is_data(fc)) {
  3931. len = (length > IL_TRAFFIC_ENTRY_SIZE)
  3932. ? IL_TRAFFIC_ENTRY_SIZE : length;
  3933. memcpy((il->rx_traffic +
  3934. (il->rx_traffic_idx * IL_TRAFFIC_ENTRY_SIZE)),
  3935. header, len);
  3936. il->rx_traffic_idx =
  3937. (il->rx_traffic_idx + 1) % IL_TRAFFIC_ENTRIES;
  3938. }
  3939. }
  3940. EXPORT_SYMBOL(il_dbg_log_rx_data_frame);
  3941. const char *il_get_mgmt_string(int cmd)
  3942. {
  3943. switch (cmd) {
  3944. IL_CMD(MANAGEMENT_ASSOC_REQ);
  3945. IL_CMD(MANAGEMENT_ASSOC_RESP);
  3946. IL_CMD(MANAGEMENT_REASSOC_REQ);
  3947. IL_CMD(MANAGEMENT_REASSOC_RESP);
  3948. IL_CMD(MANAGEMENT_PROBE_REQ);
  3949. IL_CMD(MANAGEMENT_PROBE_RESP);
  3950. IL_CMD(MANAGEMENT_BEACON);
  3951. IL_CMD(MANAGEMENT_ATIM);
  3952. IL_CMD(MANAGEMENT_DISASSOC);
  3953. IL_CMD(MANAGEMENT_AUTH);
  3954. IL_CMD(MANAGEMENT_DEAUTH);
  3955. IL_CMD(MANAGEMENT_ACTION);
  3956. default:
  3957. return "UNKNOWN";
  3958. }
  3959. }
  3960. const char *il_get_ctrl_string(int cmd)
  3961. {
  3962. switch (cmd) {
  3963. IL_CMD(CONTROL_BACK_REQ);
  3964. IL_CMD(CONTROL_BACK);
  3965. IL_CMD(CONTROL_PSPOLL);
  3966. IL_CMD(CONTROL_RTS);
  3967. IL_CMD(CONTROL_CTS);
  3968. IL_CMD(CONTROL_ACK);
  3969. IL_CMD(CONTROL_CFEND);
  3970. IL_CMD(CONTROL_CFENDACK);
  3971. default:
  3972. return "UNKNOWN";
  3973. }
  3974. }
  3975. void il_clear_traffic_stats(struct il_priv *il)
  3976. {
  3977. memset(&il->tx_stats, 0, sizeof(struct traffic_stats));
  3978. memset(&il->rx_stats, 0, sizeof(struct traffic_stats));
  3979. }
  3980. /*
  3981. * if CONFIG_IWLEGACY_DEBUGFS defined,
  3982. * il_update_stats function will
  3983. * record all the MGMT, CTRL and DATA pkt for both TX and Rx pass
  3984. * Use debugFs to display the rx/rx_stats
  3985. * if CONFIG_IWLEGACY_DEBUGFS not being defined, then no MGMT and CTRL
  3986. * information will be recorded, but DATA pkt still will be recorded
  3987. * for the reason of il_led.c need to control the led blinking based on
  3988. * number of tx and rx data.
  3989. *
  3990. */
  3991. void
  3992. il_update_stats(struct il_priv *il, bool is_tx, __le16 fc, u16 len)
  3993. {
  3994. struct traffic_stats *stats;
  3995. if (is_tx)
  3996. stats = &il->tx_stats;
  3997. else
  3998. stats = &il->rx_stats;
  3999. if (ieee80211_is_mgmt(fc)) {
  4000. switch (fc & cpu_to_le16(IEEE80211_FCTL_STYPE)) {
  4001. case cpu_to_le16(IEEE80211_STYPE_ASSOC_REQ):
  4002. stats->mgmt[MANAGEMENT_ASSOC_REQ]++;
  4003. break;
  4004. case cpu_to_le16(IEEE80211_STYPE_ASSOC_RESP):
  4005. stats->mgmt[MANAGEMENT_ASSOC_RESP]++;
  4006. break;
  4007. case cpu_to_le16(IEEE80211_STYPE_REASSOC_REQ):
  4008. stats->mgmt[MANAGEMENT_REASSOC_REQ]++;
  4009. break;
  4010. case cpu_to_le16(IEEE80211_STYPE_REASSOC_RESP):
  4011. stats->mgmt[MANAGEMENT_REASSOC_RESP]++;
  4012. break;
  4013. case cpu_to_le16(IEEE80211_STYPE_PROBE_REQ):
  4014. stats->mgmt[MANAGEMENT_PROBE_REQ]++;
  4015. break;
  4016. case cpu_to_le16(IEEE80211_STYPE_PROBE_RESP):
  4017. stats->mgmt[MANAGEMENT_PROBE_RESP]++;
  4018. break;
  4019. case cpu_to_le16(IEEE80211_STYPE_BEACON):
  4020. stats->mgmt[MANAGEMENT_BEACON]++;
  4021. break;
  4022. case cpu_to_le16(IEEE80211_STYPE_ATIM):
  4023. stats->mgmt[MANAGEMENT_ATIM]++;
  4024. break;
  4025. case cpu_to_le16(IEEE80211_STYPE_DISASSOC):
  4026. stats->mgmt[MANAGEMENT_DISASSOC]++;
  4027. break;
  4028. case cpu_to_le16(IEEE80211_STYPE_AUTH):
  4029. stats->mgmt[MANAGEMENT_AUTH]++;
  4030. break;
  4031. case cpu_to_le16(IEEE80211_STYPE_DEAUTH):
  4032. stats->mgmt[MANAGEMENT_DEAUTH]++;
  4033. break;
  4034. case cpu_to_le16(IEEE80211_STYPE_ACTION):
  4035. stats->mgmt[MANAGEMENT_ACTION]++;
  4036. break;
  4037. }
  4038. } else if (ieee80211_is_ctl(fc)) {
  4039. switch (fc & cpu_to_le16(IEEE80211_FCTL_STYPE)) {
  4040. case cpu_to_le16(IEEE80211_STYPE_BACK_REQ):
  4041. stats->ctrl[CONTROL_BACK_REQ]++;
  4042. break;
  4043. case cpu_to_le16(IEEE80211_STYPE_BACK):
  4044. stats->ctrl[CONTROL_BACK]++;
  4045. break;
  4046. case cpu_to_le16(IEEE80211_STYPE_PSPOLL):
  4047. stats->ctrl[CONTROL_PSPOLL]++;
  4048. break;
  4049. case cpu_to_le16(IEEE80211_STYPE_RTS):
  4050. stats->ctrl[CONTROL_RTS]++;
  4051. break;
  4052. case cpu_to_le16(IEEE80211_STYPE_CTS):
  4053. stats->ctrl[CONTROL_CTS]++;
  4054. break;
  4055. case cpu_to_le16(IEEE80211_STYPE_ACK):
  4056. stats->ctrl[CONTROL_ACK]++;
  4057. break;
  4058. case cpu_to_le16(IEEE80211_STYPE_CFEND):
  4059. stats->ctrl[CONTROL_CFEND]++;
  4060. break;
  4061. case cpu_to_le16(IEEE80211_STYPE_CFENDACK):
  4062. stats->ctrl[CONTROL_CFENDACK]++;
  4063. break;
  4064. }
  4065. } else {
  4066. /* data */
  4067. stats->data_cnt++;
  4068. stats->data_bytes += len;
  4069. }
  4070. }
  4071. EXPORT_SYMBOL(il_update_stats);
  4072. #endif
  4073. int il_force_reset(struct il_priv *il, bool external)
  4074. {
  4075. struct il_force_reset *force_reset;
  4076. if (test_bit(S_EXIT_PENDING, &il->status))
  4077. return -EINVAL;
  4078. force_reset = &il->force_reset;
  4079. force_reset->reset_request_count++;
  4080. if (!external) {
  4081. if (force_reset->last_force_reset_jiffies &&
  4082. time_after(force_reset->last_force_reset_jiffies +
  4083. force_reset->reset_duration, jiffies)) {
  4084. D_INFO("force reset rejected\n");
  4085. force_reset->reset_reject_count++;
  4086. return -EAGAIN;
  4087. }
  4088. }
  4089. force_reset->reset_success_count++;
  4090. force_reset->last_force_reset_jiffies = jiffies;
  4091. /*
  4092. * if the request is from external(ex: debugfs),
  4093. * then always perform the request in regardless the module
  4094. * parameter setting
  4095. * if the request is from internal (uCode error or driver
  4096. * detect failure), then fw_restart module parameter
  4097. * need to be check before performing firmware reload
  4098. */
  4099. if (!external && !il->cfg->mod_params->restart_fw) {
  4100. D_INFO("Cancel firmware reload based on "
  4101. "module parameter setting\n");
  4102. return 0;
  4103. }
  4104. IL_ERR("On demand firmware reload\n");
  4105. /* Set the FW error flag -- cleared on il_down */
  4106. set_bit(S_FW_ERROR, &il->status);
  4107. wake_up(&il->wait_command_queue);
  4108. /*
  4109. * Keep the restart process from trying to send host
  4110. * commands by clearing the INIT status bit
  4111. */
  4112. clear_bit(S_READY, &il->status);
  4113. queue_work(il->workqueue, &il->restart);
  4114. return 0;
  4115. }
  4116. int
  4117. il_mac_change_interface(struct ieee80211_hw *hw,
  4118. struct ieee80211_vif *vif,
  4119. enum nl80211_iftype newtype, bool newp2p)
  4120. {
  4121. struct il_priv *il = hw->priv;
  4122. struct il_rxon_context *ctx = il_rxon_ctx_from_vif(vif);
  4123. u32 modes;
  4124. int err;
  4125. newtype = ieee80211_iftype_p2p(newtype, newp2p);
  4126. mutex_lock(&il->mutex);
  4127. if (!ctx->vif || !il_is_ready_rf(il)) {
  4128. /*
  4129. * Huh? But wait ... this can maybe happen when
  4130. * we're in the middle of a firmware restart!
  4131. */
  4132. err = -EBUSY;
  4133. goto out;
  4134. }
  4135. modes = ctx->interface_modes | ctx->exclusive_interface_modes;
  4136. if (!(modes & BIT(newtype))) {
  4137. err = -EOPNOTSUPP;
  4138. goto out;
  4139. }
  4140. if ((il->ctx.exclusive_interface_modes & BIT(il->ctx.vif->type)) ||
  4141. (il->ctx.exclusive_interface_modes & BIT(newtype))) {
  4142. err = -EINVAL;
  4143. goto out;
  4144. }
  4145. /* success */
  4146. il_teardown_interface(il, vif, true);
  4147. vif->type = newtype;
  4148. vif->p2p = newp2p;
  4149. err = il_setup_interface(il, ctx);
  4150. WARN_ON(err);
  4151. /*
  4152. * We've switched internally, but submitting to the
  4153. * device may have failed for some reason. Mask this
  4154. * error, because otherwise mac80211 will not switch
  4155. * (and set the interface type back) and we'll be
  4156. * out of sync with it.
  4157. */
  4158. err = 0;
  4159. out:
  4160. mutex_unlock(&il->mutex);
  4161. return err;
  4162. }
  4163. EXPORT_SYMBOL(il_mac_change_interface);
  4164. /*
  4165. * On every watchdog tick we check (latest) time stamp. If it does not
  4166. * change during timeout period and queue is not empty we reset firmware.
  4167. */
  4168. static int il_check_stuck_queue(struct il_priv *il, int cnt)
  4169. {
  4170. struct il_tx_queue *txq = &il->txq[cnt];
  4171. struct il_queue *q = &txq->q;
  4172. unsigned long timeout;
  4173. int ret;
  4174. if (q->read_ptr == q->write_ptr) {
  4175. txq->time_stamp = jiffies;
  4176. return 0;
  4177. }
  4178. timeout = txq->time_stamp +
  4179. msecs_to_jiffies(il->cfg->base_params->wd_timeout);
  4180. if (time_after(jiffies, timeout)) {
  4181. IL_ERR("Queue %d stuck for %u ms.\n",
  4182. q->id, il->cfg->base_params->wd_timeout);
  4183. ret = il_force_reset(il, false);
  4184. return (ret == -EAGAIN) ? 0 : 1;
  4185. }
  4186. return 0;
  4187. }
  4188. /*
  4189. * Making watchdog tick be a quarter of timeout assure we will
  4190. * discover the queue hung between timeout and 1.25*timeout
  4191. */
  4192. #define IL_WD_TICK(timeout) ((timeout) / 4)
  4193. /*
  4194. * Watchdog timer callback, we check each tx queue for stuck, if if hung
  4195. * we reset the firmware. If everything is fine just rearm the timer.
  4196. */
  4197. void il_bg_watchdog(unsigned long data)
  4198. {
  4199. struct il_priv *il = (struct il_priv *)data;
  4200. int cnt;
  4201. unsigned long timeout;
  4202. if (test_bit(S_EXIT_PENDING, &il->status))
  4203. return;
  4204. timeout = il->cfg->base_params->wd_timeout;
  4205. if (timeout == 0)
  4206. return;
  4207. /* monitor and check for stuck cmd queue */
  4208. if (il_check_stuck_queue(il, il->cmd_queue))
  4209. return;
  4210. /* monitor and check for other stuck queues */
  4211. if (il_is_any_associated(il)) {
  4212. for (cnt = 0; cnt < il->hw_params.max_txq_num; cnt++) {
  4213. /* skip as we already checked the command queue */
  4214. if (cnt == il->cmd_queue)
  4215. continue;
  4216. if (il_check_stuck_queue(il, cnt))
  4217. return;
  4218. }
  4219. }
  4220. mod_timer(&il->watchdog, jiffies +
  4221. msecs_to_jiffies(IL_WD_TICK(timeout)));
  4222. }
  4223. EXPORT_SYMBOL(il_bg_watchdog);
  4224. void il_setup_watchdog(struct il_priv *il)
  4225. {
  4226. unsigned int timeout = il->cfg->base_params->wd_timeout;
  4227. if (timeout)
  4228. mod_timer(&il->watchdog,
  4229. jiffies + msecs_to_jiffies(IL_WD_TICK(timeout)));
  4230. else
  4231. del_timer(&il->watchdog);
  4232. }
  4233. EXPORT_SYMBOL(il_setup_watchdog);
  4234. /*
  4235. * extended beacon time format
  4236. * time in usec will be changed into a 32-bit value in extended:internal format
  4237. * the extended part is the beacon counts
  4238. * the internal part is the time in usec within one beacon interval
  4239. */
  4240. u32
  4241. il_usecs_to_beacons(struct il_priv *il,
  4242. u32 usec, u32 beacon_interval)
  4243. {
  4244. u32 quot;
  4245. u32 rem;
  4246. u32 interval = beacon_interval * TIME_UNIT;
  4247. if (!interval || !usec)
  4248. return 0;
  4249. quot = (usec / interval) &
  4250. (il_beacon_time_mask_high(il,
  4251. il->hw_params.beacon_time_tsf_bits) >>
  4252. il->hw_params.beacon_time_tsf_bits);
  4253. rem = (usec % interval) & il_beacon_time_mask_low(il,
  4254. il->hw_params.beacon_time_tsf_bits);
  4255. return (quot << il->hw_params.beacon_time_tsf_bits) + rem;
  4256. }
  4257. EXPORT_SYMBOL(il_usecs_to_beacons);
  4258. /* base is usually what we get from ucode with each received frame,
  4259. * the same as HW timer counter counting down
  4260. */
  4261. __le32 il_add_beacon_time(struct il_priv *il, u32 base,
  4262. u32 addon, u32 beacon_interval)
  4263. {
  4264. u32 base_low = base & il_beacon_time_mask_low(il,
  4265. il->hw_params.beacon_time_tsf_bits);
  4266. u32 addon_low = addon & il_beacon_time_mask_low(il,
  4267. il->hw_params.beacon_time_tsf_bits);
  4268. u32 interval = beacon_interval * TIME_UNIT;
  4269. u32 res = (base & il_beacon_time_mask_high(il,
  4270. il->hw_params.beacon_time_tsf_bits)) +
  4271. (addon & il_beacon_time_mask_high(il,
  4272. il->hw_params.beacon_time_tsf_bits));
  4273. if (base_low > addon_low)
  4274. res += base_low - addon_low;
  4275. else if (base_low < addon_low) {
  4276. res += interval + base_low - addon_low;
  4277. res += (1 << il->hw_params.beacon_time_tsf_bits);
  4278. } else
  4279. res += (1 << il->hw_params.beacon_time_tsf_bits);
  4280. return cpu_to_le32(res);
  4281. }
  4282. EXPORT_SYMBOL(il_add_beacon_time);
  4283. #ifdef CONFIG_PM
  4284. int il_pci_suspend(struct device *device)
  4285. {
  4286. struct pci_dev *pdev = to_pci_dev(device);
  4287. struct il_priv *il = pci_get_drvdata(pdev);
  4288. /*
  4289. * This function is called when system goes into suspend state
  4290. * mac80211 will call il_mac_stop() from the mac80211 suspend function
  4291. * first but since il_mac_stop() has no knowledge of who the caller is,
  4292. * it will not call apm_ops.stop() to stop the DMA operation.
  4293. * Calling apm_ops.stop here to make sure we stop the DMA.
  4294. */
  4295. il_apm_stop(il);
  4296. return 0;
  4297. }
  4298. EXPORT_SYMBOL(il_pci_suspend);
  4299. int il_pci_resume(struct device *device)
  4300. {
  4301. struct pci_dev *pdev = to_pci_dev(device);
  4302. struct il_priv *il = pci_get_drvdata(pdev);
  4303. bool hw_rfkill = false;
  4304. /*
  4305. * We disable the RETRY_TIMEOUT register (0x41) to keep
  4306. * PCI Tx retries from interfering with C3 CPU state.
  4307. */
  4308. pci_write_config_byte(pdev, PCI_CFG_RETRY_TIMEOUT, 0x00);
  4309. il_enable_interrupts(il);
  4310. if (!(_il_rd(il, CSR_GP_CNTRL) &
  4311. CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
  4312. hw_rfkill = true;
  4313. if (hw_rfkill)
  4314. set_bit(S_RF_KILL_HW, &il->status);
  4315. else
  4316. clear_bit(S_RF_KILL_HW, &il->status);
  4317. wiphy_rfkill_set_hw_state(il->hw->wiphy, hw_rfkill);
  4318. return 0;
  4319. }
  4320. EXPORT_SYMBOL(il_pci_resume);
  4321. const struct dev_pm_ops il_pm_ops = {
  4322. .suspend = il_pci_suspend,
  4323. .resume = il_pci_resume,
  4324. .freeze = il_pci_suspend,
  4325. .thaw = il_pci_resume,
  4326. .poweroff = il_pci_suspend,
  4327. .restore = il_pci_resume,
  4328. };
  4329. EXPORT_SYMBOL(il_pm_ops);
  4330. #endif /* CONFIG_PM */
  4331. static void
  4332. il_update_qos(struct il_priv *il, struct il_rxon_context *ctx)
  4333. {
  4334. if (test_bit(S_EXIT_PENDING, &il->status))
  4335. return;
  4336. if (!ctx->is_active)
  4337. return;
  4338. ctx->qos_data.def_qos_parm.qos_flags = 0;
  4339. if (ctx->qos_data.qos_active)
  4340. ctx->qos_data.def_qos_parm.qos_flags |=
  4341. QOS_PARAM_FLG_UPDATE_EDCA_MSK;
  4342. if (ctx->ht.enabled)
  4343. ctx->qos_data.def_qos_parm.qos_flags |= QOS_PARAM_FLG_TGN_MSK;
  4344. D_QOS("send QoS cmd with Qos active=%d FLAGS=0x%X\n",
  4345. ctx->qos_data.qos_active,
  4346. ctx->qos_data.def_qos_parm.qos_flags);
  4347. il_send_cmd_pdu_async(il, ctx->qos_cmd,
  4348. sizeof(struct il_qosparam_cmd),
  4349. &ctx->qos_data.def_qos_parm, NULL);
  4350. }
  4351. /**
  4352. * il_mac_config - mac80211 config callback
  4353. */
  4354. int il_mac_config(struct ieee80211_hw *hw, u32 changed)
  4355. {
  4356. struct il_priv *il = hw->priv;
  4357. const struct il_channel_info *ch_info;
  4358. struct ieee80211_conf *conf = &hw->conf;
  4359. struct ieee80211_channel *channel = conf->channel;
  4360. struct il_ht_config *ht_conf = &il->current_ht_config;
  4361. struct il_rxon_context *ctx = &il->ctx;
  4362. unsigned long flags = 0;
  4363. int ret = 0;
  4364. u16 ch;
  4365. int scan_active = 0;
  4366. bool ht_changed = false;
  4367. if (WARN_ON(!il->cfg->ops->legacy))
  4368. return -EOPNOTSUPP;
  4369. mutex_lock(&il->mutex);
  4370. D_MAC80211("enter to channel %d changed 0x%X\n",
  4371. channel->hw_value, changed);
  4372. if (unlikely(test_bit(S_SCANNING, &il->status))) {
  4373. scan_active = 1;
  4374. D_MAC80211("scan active\n");
  4375. }
  4376. if (changed & (IEEE80211_CONF_CHANGE_SMPS |
  4377. IEEE80211_CONF_CHANGE_CHANNEL)) {
  4378. /* mac80211 uses static for non-HT which is what we want */
  4379. il->current_ht_config.smps = conf->smps_mode;
  4380. /*
  4381. * Recalculate chain counts.
  4382. *
  4383. * If monitor mode is enabled then mac80211 will
  4384. * set up the SM PS mode to OFF if an HT channel is
  4385. * configured.
  4386. */
  4387. if (il->cfg->ops->hcmd->set_rxon_chain)
  4388. il->cfg->ops->hcmd->set_rxon_chain(il, &il->ctx);
  4389. }
  4390. /* during scanning mac80211 will delay channel setting until
  4391. * scan finish with changed = 0
  4392. */
  4393. if (!changed || (changed & IEEE80211_CONF_CHANGE_CHANNEL)) {
  4394. if (scan_active)
  4395. goto set_ch_out;
  4396. ch = channel->hw_value;
  4397. ch_info = il_get_channel_info(il, channel->band, ch);
  4398. if (!il_is_channel_valid(ch_info)) {
  4399. D_MAC80211("leave - invalid channel\n");
  4400. ret = -EINVAL;
  4401. goto set_ch_out;
  4402. }
  4403. if (il->iw_mode == NL80211_IFTYPE_ADHOC &&
  4404. !il_is_channel_ibss(ch_info)) {
  4405. D_MAC80211("leave - not IBSS channel\n");
  4406. ret = -EINVAL;
  4407. goto set_ch_out;
  4408. }
  4409. spin_lock_irqsave(&il->lock, flags);
  4410. /* Configure HT40 channels */
  4411. if (ctx->ht.enabled != conf_is_ht(conf)) {
  4412. ctx->ht.enabled = conf_is_ht(conf);
  4413. ht_changed = true;
  4414. }
  4415. if (ctx->ht.enabled) {
  4416. if (conf_is_ht40_minus(conf)) {
  4417. ctx->ht.extension_chan_offset =
  4418. IEEE80211_HT_PARAM_CHA_SEC_BELOW;
  4419. ctx->ht.is_40mhz = true;
  4420. } else if (conf_is_ht40_plus(conf)) {
  4421. ctx->ht.extension_chan_offset =
  4422. IEEE80211_HT_PARAM_CHA_SEC_ABOVE;
  4423. ctx->ht.is_40mhz = true;
  4424. } else {
  4425. ctx->ht.extension_chan_offset =
  4426. IEEE80211_HT_PARAM_CHA_SEC_NONE;
  4427. ctx->ht.is_40mhz = false;
  4428. }
  4429. } else
  4430. ctx->ht.is_40mhz = false;
  4431. /*
  4432. * Default to no protection. Protection mode will
  4433. * later be set from BSS config in il_ht_conf
  4434. */
  4435. ctx->ht.protection =
  4436. IEEE80211_HT_OP_MODE_PROTECTION_NONE;
  4437. /* if we are switching from ht to 2.4 clear flags
  4438. * from any ht related info since 2.4 does not
  4439. * support ht */
  4440. if ((le16_to_cpu(ctx->staging.channel) != ch))
  4441. ctx->staging.flags = 0;
  4442. il_set_rxon_channel(il, channel, ctx);
  4443. il_set_rxon_ht(il, ht_conf);
  4444. il_set_flags_for_band(il, ctx, channel->band,
  4445. ctx->vif);
  4446. spin_unlock_irqrestore(&il->lock, flags);
  4447. if (il->cfg->ops->legacy->update_bcast_stations)
  4448. ret =
  4449. il->cfg->ops->legacy->update_bcast_stations(il);
  4450. set_ch_out:
  4451. /* The list of supported rates and rate mask can be different
  4452. * for each band; since the band may have changed, reset
  4453. * the rate mask to what mac80211 lists */
  4454. il_set_rate(il);
  4455. }
  4456. if (changed & (IEEE80211_CONF_CHANGE_PS |
  4457. IEEE80211_CONF_CHANGE_IDLE)) {
  4458. ret = il_power_update_mode(il, false);
  4459. if (ret)
  4460. D_MAC80211("Error setting sleep level\n");
  4461. }
  4462. if (changed & IEEE80211_CONF_CHANGE_POWER) {
  4463. D_MAC80211("TX Power old=%d new=%d\n",
  4464. il->tx_power_user_lmt, conf->power_level);
  4465. il_set_tx_power(il, conf->power_level, false);
  4466. }
  4467. if (!il_is_ready(il)) {
  4468. D_MAC80211("leave - not ready\n");
  4469. goto out;
  4470. }
  4471. if (scan_active)
  4472. goto out;
  4473. if (memcmp(&ctx->active, &ctx->staging, sizeof(ctx->staging)))
  4474. il_commit_rxon(il, ctx);
  4475. else
  4476. D_INFO("Not re-sending same RXON configuration.\n");
  4477. if (ht_changed)
  4478. il_update_qos(il, ctx);
  4479. out:
  4480. D_MAC80211("leave\n");
  4481. mutex_unlock(&il->mutex);
  4482. return ret;
  4483. }
  4484. EXPORT_SYMBOL(il_mac_config);
  4485. void il_mac_reset_tsf(struct ieee80211_hw *hw,
  4486. struct ieee80211_vif *vif)
  4487. {
  4488. struct il_priv *il = hw->priv;
  4489. unsigned long flags;
  4490. struct il_rxon_context *ctx = &il->ctx;
  4491. if (WARN_ON(!il->cfg->ops->legacy))
  4492. return;
  4493. mutex_lock(&il->mutex);
  4494. D_MAC80211("enter\n");
  4495. spin_lock_irqsave(&il->lock, flags);
  4496. memset(&il->current_ht_config, 0, sizeof(struct il_ht_config));
  4497. spin_unlock_irqrestore(&il->lock, flags);
  4498. spin_lock_irqsave(&il->lock, flags);
  4499. /* new association get rid of ibss beacon skb */
  4500. if (il->beacon_skb)
  4501. dev_kfree_skb(il->beacon_skb);
  4502. il->beacon_skb = NULL;
  4503. il->timestamp = 0;
  4504. spin_unlock_irqrestore(&il->lock, flags);
  4505. il_scan_cancel_timeout(il, 100);
  4506. if (!il_is_ready_rf(il)) {
  4507. D_MAC80211("leave - not ready\n");
  4508. mutex_unlock(&il->mutex);
  4509. return;
  4510. }
  4511. /* we are restarting association process
  4512. * clear RXON_FILTER_ASSOC_MSK bit
  4513. */
  4514. ctx->staging.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  4515. il_commit_rxon(il, ctx);
  4516. il_set_rate(il);
  4517. mutex_unlock(&il->mutex);
  4518. D_MAC80211("leave\n");
  4519. }
  4520. EXPORT_SYMBOL(il_mac_reset_tsf);
  4521. static void il_ht_conf(struct il_priv *il,
  4522. struct ieee80211_vif *vif)
  4523. {
  4524. struct il_ht_config *ht_conf = &il->current_ht_config;
  4525. struct ieee80211_sta *sta;
  4526. struct ieee80211_bss_conf *bss_conf = &vif->bss_conf;
  4527. struct il_rxon_context *ctx = il_rxon_ctx_from_vif(vif);
  4528. D_ASSOC("enter:\n");
  4529. if (!ctx->ht.enabled)
  4530. return;
  4531. ctx->ht.protection =
  4532. bss_conf->ht_operation_mode & IEEE80211_HT_OP_MODE_PROTECTION;
  4533. ctx->ht.non_gf_sta_present =
  4534. !!(bss_conf->ht_operation_mode &
  4535. IEEE80211_HT_OP_MODE_NON_GF_STA_PRSNT);
  4536. ht_conf->single_chain_sufficient = false;
  4537. switch (vif->type) {
  4538. case NL80211_IFTYPE_STATION:
  4539. rcu_read_lock();
  4540. sta = ieee80211_find_sta(vif, bss_conf->bssid);
  4541. if (sta) {
  4542. struct ieee80211_sta_ht_cap *ht_cap = &sta->ht_cap;
  4543. int maxstreams;
  4544. maxstreams = (ht_cap->mcs.tx_params &
  4545. IEEE80211_HT_MCS_TX_MAX_STREAMS_MASK)
  4546. >> IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT;
  4547. maxstreams += 1;
  4548. if (ht_cap->mcs.rx_mask[1] == 0 &&
  4549. ht_cap->mcs.rx_mask[2] == 0)
  4550. ht_conf->single_chain_sufficient = true;
  4551. if (maxstreams <= 1)
  4552. ht_conf->single_chain_sufficient = true;
  4553. } else {
  4554. /*
  4555. * If at all, this can only happen through a race
  4556. * when the AP disconnects us while we're still
  4557. * setting up the connection, in that case mac80211
  4558. * will soon tell us about that.
  4559. */
  4560. ht_conf->single_chain_sufficient = true;
  4561. }
  4562. rcu_read_unlock();
  4563. break;
  4564. case NL80211_IFTYPE_ADHOC:
  4565. ht_conf->single_chain_sufficient = true;
  4566. break;
  4567. default:
  4568. break;
  4569. }
  4570. D_ASSOC("leave\n");
  4571. }
  4572. static inline void il_set_no_assoc(struct il_priv *il,
  4573. struct ieee80211_vif *vif)
  4574. {
  4575. struct il_rxon_context *ctx = il_rxon_ctx_from_vif(vif);
  4576. /*
  4577. * inform the ucode that there is no longer an
  4578. * association and that no more packets should be
  4579. * sent
  4580. */
  4581. ctx->staging.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  4582. ctx->staging.assoc_id = 0;
  4583. il_commit_rxon(il, ctx);
  4584. }
  4585. static void il_beacon_update(struct ieee80211_hw *hw,
  4586. struct ieee80211_vif *vif)
  4587. {
  4588. struct il_priv *il = hw->priv;
  4589. unsigned long flags;
  4590. __le64 timestamp;
  4591. struct sk_buff *skb = ieee80211_beacon_get(hw, vif);
  4592. if (!skb)
  4593. return;
  4594. D_MAC80211("enter\n");
  4595. lockdep_assert_held(&il->mutex);
  4596. if (!il->beacon_ctx) {
  4597. IL_ERR("update beacon but no beacon context!\n");
  4598. dev_kfree_skb(skb);
  4599. return;
  4600. }
  4601. spin_lock_irqsave(&il->lock, flags);
  4602. if (il->beacon_skb)
  4603. dev_kfree_skb(il->beacon_skb);
  4604. il->beacon_skb = skb;
  4605. timestamp = ((struct ieee80211_mgmt *)skb->data)->u.beacon.timestamp;
  4606. il->timestamp = le64_to_cpu(timestamp);
  4607. D_MAC80211("leave\n");
  4608. spin_unlock_irqrestore(&il->lock, flags);
  4609. if (!il_is_ready_rf(il)) {
  4610. D_MAC80211("leave - RF not ready\n");
  4611. return;
  4612. }
  4613. il->cfg->ops->legacy->post_associate(il);
  4614. }
  4615. void il_mac_bss_info_changed(struct ieee80211_hw *hw,
  4616. struct ieee80211_vif *vif,
  4617. struct ieee80211_bss_conf *bss_conf,
  4618. u32 changes)
  4619. {
  4620. struct il_priv *il = hw->priv;
  4621. struct il_rxon_context *ctx = il_rxon_ctx_from_vif(vif);
  4622. int ret;
  4623. if (WARN_ON(!il->cfg->ops->legacy))
  4624. return;
  4625. D_MAC80211("changes = 0x%X\n", changes);
  4626. mutex_lock(&il->mutex);
  4627. if (!il_is_alive(il)) {
  4628. mutex_unlock(&il->mutex);
  4629. return;
  4630. }
  4631. if (changes & BSS_CHANGED_QOS) {
  4632. unsigned long flags;
  4633. spin_lock_irqsave(&il->lock, flags);
  4634. ctx->qos_data.qos_active = bss_conf->qos;
  4635. il_update_qos(il, ctx);
  4636. spin_unlock_irqrestore(&il->lock, flags);
  4637. }
  4638. if (changes & BSS_CHANGED_BEACON_ENABLED) {
  4639. /*
  4640. * the add_interface code must make sure we only ever
  4641. * have a single interface that could be beaconing at
  4642. * any time.
  4643. */
  4644. if (vif->bss_conf.enable_beacon)
  4645. il->beacon_ctx = ctx;
  4646. else
  4647. il->beacon_ctx = NULL;
  4648. }
  4649. if (changes & BSS_CHANGED_BSSID) {
  4650. D_MAC80211("BSSID %pM\n", bss_conf->bssid);
  4651. /*
  4652. * If there is currently a HW scan going on in the
  4653. * background then we need to cancel it else the RXON
  4654. * below/in post_associate will fail.
  4655. */
  4656. if (il_scan_cancel_timeout(il, 100)) {
  4657. IL_WARN(
  4658. "Aborted scan still in progress after 100ms\n");
  4659. D_MAC80211(
  4660. "leaving - scan abort failed.\n");
  4661. mutex_unlock(&il->mutex);
  4662. return;
  4663. }
  4664. /* mac80211 only sets assoc when in STATION mode */
  4665. if (vif->type == NL80211_IFTYPE_ADHOC || bss_conf->assoc) {
  4666. memcpy(ctx->staging.bssid_addr,
  4667. bss_conf->bssid, ETH_ALEN);
  4668. /* currently needed in a few places */
  4669. memcpy(il->bssid, bss_conf->bssid, ETH_ALEN);
  4670. } else {
  4671. ctx->staging.filter_flags &=
  4672. ~RXON_FILTER_ASSOC_MSK;
  4673. }
  4674. }
  4675. /*
  4676. * This needs to be after setting the BSSID in case
  4677. * mac80211 decides to do both changes at once because
  4678. * it will invoke post_associate.
  4679. */
  4680. if (vif->type == NL80211_IFTYPE_ADHOC && (changes & BSS_CHANGED_BEACON))
  4681. il_beacon_update(hw, vif);
  4682. if (changes & BSS_CHANGED_ERP_PREAMBLE) {
  4683. D_MAC80211("ERP_PREAMBLE %d\n",
  4684. bss_conf->use_short_preamble);
  4685. if (bss_conf->use_short_preamble)
  4686. ctx->staging.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  4687. else
  4688. ctx->staging.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  4689. }
  4690. if (changes & BSS_CHANGED_ERP_CTS_PROT) {
  4691. D_MAC80211(
  4692. "ERP_CTS %d\n", bss_conf->use_cts_prot);
  4693. if (bss_conf->use_cts_prot && il->band != IEEE80211_BAND_5GHZ)
  4694. ctx->staging.flags |= RXON_FLG_TGG_PROTECT_MSK;
  4695. else
  4696. ctx->staging.flags &= ~RXON_FLG_TGG_PROTECT_MSK;
  4697. if (bss_conf->use_cts_prot)
  4698. ctx->staging.flags |= RXON_FLG_SELF_CTS_EN;
  4699. else
  4700. ctx->staging.flags &= ~RXON_FLG_SELF_CTS_EN;
  4701. }
  4702. if (changes & BSS_CHANGED_BASIC_RATES) {
  4703. /* XXX use this information
  4704. *
  4705. * To do that, remove code from il_set_rate() and put something
  4706. * like this here:
  4707. *
  4708. if (A-band)
  4709. ctx->staging.ofdm_basic_rates =
  4710. bss_conf->basic_rates;
  4711. else
  4712. ctx->staging.ofdm_basic_rates =
  4713. bss_conf->basic_rates >> 4;
  4714. ctx->staging.cck_basic_rates =
  4715. bss_conf->basic_rates & 0xF;
  4716. */
  4717. }
  4718. if (changes & BSS_CHANGED_HT) {
  4719. il_ht_conf(il, vif);
  4720. if (il->cfg->ops->hcmd->set_rxon_chain)
  4721. il->cfg->ops->hcmd->set_rxon_chain(il, ctx);
  4722. }
  4723. if (changes & BSS_CHANGED_ASSOC) {
  4724. D_MAC80211("ASSOC %d\n", bss_conf->assoc);
  4725. if (bss_conf->assoc) {
  4726. il->timestamp = bss_conf->timestamp;
  4727. if (!il_is_rfkill(il))
  4728. il->cfg->ops->legacy->post_associate(il);
  4729. } else
  4730. il_set_no_assoc(il, vif);
  4731. }
  4732. if (changes && il_is_associated_ctx(ctx) && bss_conf->aid) {
  4733. D_MAC80211("Changes (%#x) while associated\n",
  4734. changes);
  4735. ret = il_send_rxon_assoc(il, ctx);
  4736. if (!ret) {
  4737. /* Sync active_rxon with latest change. */
  4738. memcpy((void *)&ctx->active,
  4739. &ctx->staging,
  4740. sizeof(struct il_rxon_cmd));
  4741. }
  4742. }
  4743. if (changes & BSS_CHANGED_BEACON_ENABLED) {
  4744. if (vif->bss_conf.enable_beacon) {
  4745. memcpy(ctx->staging.bssid_addr,
  4746. bss_conf->bssid, ETH_ALEN);
  4747. memcpy(il->bssid, bss_conf->bssid, ETH_ALEN);
  4748. il->cfg->ops->legacy->config_ap(il);
  4749. } else
  4750. il_set_no_assoc(il, vif);
  4751. }
  4752. if (changes & BSS_CHANGED_IBSS) {
  4753. ret = il->cfg->ops->legacy->manage_ibss_station(il, vif,
  4754. bss_conf->ibss_joined);
  4755. if (ret)
  4756. IL_ERR("failed to %s IBSS station %pM\n",
  4757. bss_conf->ibss_joined ? "add" : "remove",
  4758. bss_conf->bssid);
  4759. }
  4760. mutex_unlock(&il->mutex);
  4761. D_MAC80211("leave\n");
  4762. }
  4763. EXPORT_SYMBOL(il_mac_bss_info_changed);
  4764. irqreturn_t il_isr(int irq, void *data)
  4765. {
  4766. struct il_priv *il = data;
  4767. u32 inta, inta_mask;
  4768. u32 inta_fh;
  4769. unsigned long flags;
  4770. if (!il)
  4771. return IRQ_NONE;
  4772. spin_lock_irqsave(&il->lock, flags);
  4773. /* Disable (but don't clear!) interrupts here to avoid
  4774. * back-to-back ISRs and sporadic interrupts from our NIC.
  4775. * If we have something to service, the tasklet will re-enable ints.
  4776. * If we *don't* have something, we'll re-enable before leaving here. */
  4777. inta_mask = _il_rd(il, CSR_INT_MASK); /* just for debug */
  4778. _il_wr(il, CSR_INT_MASK, 0x00000000);
  4779. /* Discover which interrupts are active/pending */
  4780. inta = _il_rd(il, CSR_INT);
  4781. inta_fh = _il_rd(il, CSR_FH_INT_STATUS);
  4782. /* Ignore interrupt if there's nothing in NIC to service.
  4783. * This may be due to IRQ shared with another device,
  4784. * or due to sporadic interrupts thrown from our NIC. */
  4785. if (!inta && !inta_fh) {
  4786. D_ISR(
  4787. "Ignore interrupt, inta == 0, inta_fh == 0\n");
  4788. goto none;
  4789. }
  4790. if (inta == 0xFFFFFFFF || (inta & 0xFFFFFFF0) == 0xa5a5a5a0) {
  4791. /* Hardware disappeared. It might have already raised
  4792. * an interrupt */
  4793. IL_WARN("HARDWARE GONE?? INTA == 0x%08x\n", inta);
  4794. goto unplugged;
  4795. }
  4796. D_ISR("ISR inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
  4797. inta, inta_mask, inta_fh);
  4798. inta &= ~CSR_INT_BIT_SCD;
  4799. /* il_irq_tasklet() will service interrupts and re-enable them */
  4800. if (likely(inta || inta_fh))
  4801. tasklet_schedule(&il->irq_tasklet);
  4802. unplugged:
  4803. spin_unlock_irqrestore(&il->lock, flags);
  4804. return IRQ_HANDLED;
  4805. none:
  4806. /* re-enable interrupts here since we don't have anything to service. */
  4807. /* only Re-enable if disabled by irq */
  4808. if (test_bit(S_INT_ENABLED, &il->status))
  4809. il_enable_interrupts(il);
  4810. spin_unlock_irqrestore(&il->lock, flags);
  4811. return IRQ_NONE;
  4812. }
  4813. EXPORT_SYMBOL(il_isr);
  4814. /*
  4815. * il_tx_cmd_protection: Set rts/cts. 3945 and 4965 only share this
  4816. * function.
  4817. */
  4818. void il_tx_cmd_protection(struct il_priv *il,
  4819. struct ieee80211_tx_info *info,
  4820. __le16 fc, __le32 *tx_flags)
  4821. {
  4822. if (info->control.rates[0].flags & IEEE80211_TX_RC_USE_RTS_CTS) {
  4823. *tx_flags |= TX_CMD_FLG_RTS_MSK;
  4824. *tx_flags &= ~TX_CMD_FLG_CTS_MSK;
  4825. *tx_flags |= TX_CMD_FLG_FULL_TXOP_PROT_MSK;
  4826. if (!ieee80211_is_mgmt(fc))
  4827. return;
  4828. switch (fc & cpu_to_le16(IEEE80211_FCTL_STYPE)) {
  4829. case cpu_to_le16(IEEE80211_STYPE_AUTH):
  4830. case cpu_to_le16(IEEE80211_STYPE_DEAUTH):
  4831. case cpu_to_le16(IEEE80211_STYPE_ASSOC_REQ):
  4832. case cpu_to_le16(IEEE80211_STYPE_REASSOC_REQ):
  4833. *tx_flags &= ~TX_CMD_FLG_RTS_MSK;
  4834. *tx_flags |= TX_CMD_FLG_CTS_MSK;
  4835. break;
  4836. }
  4837. } else if (info->control.rates[0].flags &
  4838. IEEE80211_TX_RC_USE_CTS_PROTECT) {
  4839. *tx_flags &= ~TX_CMD_FLG_RTS_MSK;
  4840. *tx_flags |= TX_CMD_FLG_CTS_MSK;
  4841. *tx_flags |= TX_CMD_FLG_FULL_TXOP_PROT_MSK;
  4842. }
  4843. }
  4844. EXPORT_SYMBOL(il_tx_cmd_protection);