netxen_nic_init.c 40 KB

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  1. /*
  2. * Copyright (C) 2003 - 2006 NetXen, Inc.
  3. * All rights reserved.
  4. *
  5. * This program is free software; you can redistribute it and/or
  6. * modify it under the terms of the GNU General Public License
  7. * as published by the Free Software Foundation; either version 2
  8. * of the License, or (at your option) any later version.
  9. *
  10. * This program is distributed in the hope that it will be useful, but
  11. * WITHOUT ANY WARRANTY; without even the implied warranty of
  12. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. * GNU General Public License for more details.
  14. *
  15. * You should have received a copy of the GNU General Public License
  16. * along with this program; if not, write to the Free Software
  17. * Foundation, Inc., 59 Temple Place - Suite 330, Boston,
  18. * MA 02111-1307, USA.
  19. *
  20. * The full GNU General Public License is included in this distribution
  21. * in the file called LICENSE.
  22. *
  23. * Contact Information:
  24. * info@netxen.com
  25. * NetXen,
  26. * 3965 Freedom Circle, Fourth floor,
  27. * Santa Clara, CA 95054
  28. *
  29. *
  30. * Source file for NIC routines to initialize the Phantom Hardware
  31. *
  32. */
  33. #include <linux/netdevice.h>
  34. #include <linux/delay.h>
  35. #include "netxen_nic.h"
  36. #include "netxen_nic_hw.h"
  37. #include "netxen_nic_phan_reg.h"
  38. struct crb_addr_pair {
  39. u32 addr;
  40. u32 data;
  41. };
  42. unsigned long last_schedule_time;
  43. #define NETXEN_MAX_CRB_XFORM 60
  44. static unsigned int crb_addr_xform[NETXEN_MAX_CRB_XFORM];
  45. #define NETXEN_ADDR_ERROR (0xffffffff)
  46. #define crb_addr_transform(name) \
  47. crb_addr_xform[NETXEN_HW_PX_MAP_CRB_##name] = \
  48. NETXEN_HW_CRB_HUB_AGT_ADR_##name << 20
  49. #define NETXEN_NIC_XDMA_RESET 0x8000ff
  50. static void netxen_post_rx_buffers_nodb(struct netxen_adapter *adapter,
  51. uint32_t ctx, uint32_t ringid);
  52. #if 0
  53. static void netxen_nic_locked_write_reg(struct netxen_adapter *adapter,
  54. unsigned long off, int *data)
  55. {
  56. void __iomem *addr = pci_base_offset(adapter, off);
  57. writel(*data, addr);
  58. }
  59. #endif /* 0 */
  60. static void crb_addr_transform_setup(void)
  61. {
  62. crb_addr_transform(XDMA);
  63. crb_addr_transform(TIMR);
  64. crb_addr_transform(SRE);
  65. crb_addr_transform(SQN3);
  66. crb_addr_transform(SQN2);
  67. crb_addr_transform(SQN1);
  68. crb_addr_transform(SQN0);
  69. crb_addr_transform(SQS3);
  70. crb_addr_transform(SQS2);
  71. crb_addr_transform(SQS1);
  72. crb_addr_transform(SQS0);
  73. crb_addr_transform(RPMX7);
  74. crb_addr_transform(RPMX6);
  75. crb_addr_transform(RPMX5);
  76. crb_addr_transform(RPMX4);
  77. crb_addr_transform(RPMX3);
  78. crb_addr_transform(RPMX2);
  79. crb_addr_transform(RPMX1);
  80. crb_addr_transform(RPMX0);
  81. crb_addr_transform(ROMUSB);
  82. crb_addr_transform(SN);
  83. crb_addr_transform(QMN);
  84. crb_addr_transform(QMS);
  85. crb_addr_transform(PGNI);
  86. crb_addr_transform(PGND);
  87. crb_addr_transform(PGN3);
  88. crb_addr_transform(PGN2);
  89. crb_addr_transform(PGN1);
  90. crb_addr_transform(PGN0);
  91. crb_addr_transform(PGSI);
  92. crb_addr_transform(PGSD);
  93. crb_addr_transform(PGS3);
  94. crb_addr_transform(PGS2);
  95. crb_addr_transform(PGS1);
  96. crb_addr_transform(PGS0);
  97. crb_addr_transform(PS);
  98. crb_addr_transform(PH);
  99. crb_addr_transform(NIU);
  100. crb_addr_transform(I2Q);
  101. crb_addr_transform(EG);
  102. crb_addr_transform(MN);
  103. crb_addr_transform(MS);
  104. crb_addr_transform(CAS2);
  105. crb_addr_transform(CAS1);
  106. crb_addr_transform(CAS0);
  107. crb_addr_transform(CAM);
  108. crb_addr_transform(C2C1);
  109. crb_addr_transform(C2C0);
  110. crb_addr_transform(SMB);
  111. }
  112. int netxen_init_firmware(struct netxen_adapter *adapter)
  113. {
  114. u32 state = 0, loops = 0, err = 0;
  115. /* Window 1 call */
  116. state = readl(NETXEN_CRB_NORMALIZE(adapter, CRB_CMDPEG_STATE));
  117. if (state == PHAN_INITIALIZE_ACK)
  118. return 0;
  119. while (state != PHAN_INITIALIZE_COMPLETE && loops < 2000) {
  120. udelay(100);
  121. /* Window 1 call */
  122. state = readl(NETXEN_CRB_NORMALIZE(adapter, CRB_CMDPEG_STATE));
  123. loops++;
  124. }
  125. if (loops >= 2000) {
  126. printk(KERN_ERR "Cmd Peg initialization not complete:%x.\n",
  127. state);
  128. err = -EIO;
  129. return err;
  130. }
  131. /* Window 1 call */
  132. writel(INTR_SCHEME_PERPORT,
  133. NETXEN_CRB_NORMALIZE(adapter, CRB_NIC_CAPABILITIES_HOST));
  134. writel(MPORT_MULTI_FUNCTION_MODE,
  135. NETXEN_CRB_NORMALIZE(adapter, CRB_MPORT_MODE));
  136. writel(PHAN_INITIALIZE_ACK,
  137. NETXEN_CRB_NORMALIZE(adapter, CRB_CMDPEG_STATE));
  138. return err;
  139. }
  140. #define NETXEN_ADDR_LIMIT 0xffffffffULL
  141. void *netxen_alloc(struct pci_dev *pdev, size_t sz, dma_addr_t * ptr,
  142. struct pci_dev **used_dev)
  143. {
  144. void *addr;
  145. addr = pci_alloc_consistent(pdev, sz, ptr);
  146. if ((unsigned long long)(*ptr) < NETXEN_ADDR_LIMIT) {
  147. *used_dev = pdev;
  148. return addr;
  149. }
  150. pci_free_consistent(pdev, sz, addr, *ptr);
  151. addr = pci_alloc_consistent(NULL, sz, ptr);
  152. *used_dev = NULL;
  153. return addr;
  154. }
  155. void netxen_initialize_adapter_sw(struct netxen_adapter *adapter)
  156. {
  157. int ctxid, ring;
  158. u32 i;
  159. u32 num_rx_bufs = 0;
  160. struct netxen_rcv_desc_ctx *rcv_desc;
  161. DPRINTK(INFO, "initializing some queues: %p\n", adapter);
  162. for (ctxid = 0; ctxid < MAX_RCV_CTX; ++ctxid) {
  163. for (ring = 0; ring < NUM_RCV_DESC_RINGS; ring++) {
  164. struct netxen_rx_buffer *rx_buf;
  165. rcv_desc = &adapter->recv_ctx[ctxid].rcv_desc[ring];
  166. rcv_desc->rcv_free = rcv_desc->max_rx_desc_count;
  167. rcv_desc->begin_alloc = 0;
  168. rx_buf = rcv_desc->rx_buf_arr;
  169. num_rx_bufs = rcv_desc->max_rx_desc_count;
  170. /*
  171. * Now go through all of them, set reference handles
  172. * and put them in the queues.
  173. */
  174. for (i = 0; i < num_rx_bufs; i++) {
  175. rx_buf->ref_handle = i;
  176. rx_buf->state = NETXEN_BUFFER_FREE;
  177. DPRINTK(INFO, "Rx buf:ctx%d i(%d) rx_buf:"
  178. "%p\n", ctxid, i, rx_buf);
  179. rx_buf++;
  180. }
  181. }
  182. }
  183. }
  184. void netxen_initialize_adapter_hw(struct netxen_adapter *adapter)
  185. {
  186. int ports = 0;
  187. struct netxen_board_info *board_info = &(adapter->ahw.boardcfg);
  188. if (netxen_nic_get_board_info(adapter) != 0)
  189. printk("%s: Error getting board config info.\n",
  190. netxen_nic_driver_name);
  191. get_brd_port_by_type(board_info->board_type, &ports);
  192. if (ports == 0)
  193. printk(KERN_ERR "%s: Unknown board type\n",
  194. netxen_nic_driver_name);
  195. adapter->ahw.max_ports = ports;
  196. }
  197. void netxen_initialize_adapter_ops(struct netxen_adapter *adapter)
  198. {
  199. switch (adapter->ahw.board_type) {
  200. case NETXEN_NIC_GBE:
  201. adapter->enable_phy_interrupts =
  202. netxen_niu_gbe_enable_phy_interrupts;
  203. adapter->disable_phy_interrupts =
  204. netxen_niu_gbe_disable_phy_interrupts;
  205. adapter->handle_phy_intr = netxen_nic_gbe_handle_phy_intr;
  206. adapter->macaddr_set = netxen_niu_macaddr_set;
  207. adapter->set_mtu = netxen_nic_set_mtu_gb;
  208. adapter->set_promisc = netxen_niu_set_promiscuous_mode;
  209. adapter->unset_promisc = netxen_niu_set_promiscuous_mode;
  210. adapter->phy_read = netxen_niu_gbe_phy_read;
  211. adapter->phy_write = netxen_niu_gbe_phy_write;
  212. adapter->init_niu = netxen_nic_init_niu_gb;
  213. adapter->stop_port = netxen_niu_disable_gbe_port;
  214. break;
  215. case NETXEN_NIC_XGBE:
  216. adapter->enable_phy_interrupts =
  217. netxen_niu_xgbe_enable_phy_interrupts;
  218. adapter->disable_phy_interrupts =
  219. netxen_niu_xgbe_disable_phy_interrupts;
  220. adapter->handle_phy_intr = netxen_nic_xgbe_handle_phy_intr;
  221. adapter->macaddr_set = netxen_niu_xg_macaddr_set;
  222. adapter->set_mtu = netxen_nic_set_mtu_xgb;
  223. adapter->init_port = netxen_niu_xg_init_port;
  224. adapter->set_promisc = netxen_niu_xg_set_promiscuous_mode;
  225. adapter->unset_promisc = netxen_niu_xg_set_promiscuous_mode;
  226. adapter->stop_port = netxen_niu_disable_xg_port;
  227. break;
  228. default:
  229. break;
  230. }
  231. }
  232. /*
  233. * netxen_decode_crb_addr(0 - utility to translate from internal Phantom CRB
  234. * address to external PCI CRB address.
  235. */
  236. static u32 netxen_decode_crb_addr(u32 addr)
  237. {
  238. int i;
  239. u32 base_addr, offset, pci_base;
  240. crb_addr_transform_setup();
  241. pci_base = NETXEN_ADDR_ERROR;
  242. base_addr = addr & 0xfff00000;
  243. offset = addr & 0x000fffff;
  244. for (i = 0; i < NETXEN_MAX_CRB_XFORM; i++) {
  245. if (crb_addr_xform[i] == base_addr) {
  246. pci_base = i << 20;
  247. break;
  248. }
  249. }
  250. if (pci_base == NETXEN_ADDR_ERROR)
  251. return pci_base;
  252. else
  253. return (pci_base + offset);
  254. }
  255. static long rom_max_timeout = 100;
  256. static long rom_lock_timeout = 10000;
  257. static long rom_write_timeout = 700;
  258. static int rom_lock(struct netxen_adapter *adapter)
  259. {
  260. int iter;
  261. u32 done = 0;
  262. int timeout = 0;
  263. while (!done) {
  264. /* acquire semaphore2 from PCI HW block */
  265. netxen_nic_read_w0(adapter, NETXEN_PCIE_REG(PCIE_SEM2_LOCK),
  266. &done);
  267. if (done == 1)
  268. break;
  269. if (timeout >= rom_lock_timeout)
  270. return -EIO;
  271. timeout++;
  272. /*
  273. * Yield CPU
  274. */
  275. if (!in_atomic())
  276. schedule();
  277. else {
  278. for (iter = 0; iter < 20; iter++)
  279. cpu_relax(); /*This a nop instr on i386 */
  280. }
  281. }
  282. netxen_nic_reg_write(adapter, NETXEN_ROM_LOCK_ID, ROM_LOCK_DRIVER);
  283. return 0;
  284. }
  285. static int netxen_wait_rom_done(struct netxen_adapter *adapter)
  286. {
  287. long timeout = 0;
  288. long done = 0;
  289. while (done == 0) {
  290. done = netxen_nic_reg_read(adapter, NETXEN_ROMUSB_GLB_STATUS);
  291. done &= 2;
  292. timeout++;
  293. if (timeout >= rom_max_timeout) {
  294. printk("Timeout reached waiting for rom done");
  295. return -EIO;
  296. }
  297. }
  298. return 0;
  299. }
  300. static int netxen_rom_wren(struct netxen_adapter *adapter)
  301. {
  302. /* Set write enable latch in ROM status register */
  303. netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 0);
  304. netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_INSTR_OPCODE,
  305. M25P_INSTR_WREN);
  306. if (netxen_wait_rom_done(adapter)) {
  307. return -1;
  308. }
  309. return 0;
  310. }
  311. static unsigned int netxen_rdcrbreg(struct netxen_adapter *adapter,
  312. unsigned int addr)
  313. {
  314. unsigned int data = 0xdeaddead;
  315. data = netxen_nic_reg_read(adapter, addr);
  316. return data;
  317. }
  318. static int netxen_do_rom_rdsr(struct netxen_adapter *adapter)
  319. {
  320. netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_INSTR_OPCODE,
  321. M25P_INSTR_RDSR);
  322. if (netxen_wait_rom_done(adapter)) {
  323. return -1;
  324. }
  325. return netxen_rdcrbreg(adapter, NETXEN_ROMUSB_ROM_RDATA);
  326. }
  327. static void netxen_rom_unlock(struct netxen_adapter *adapter)
  328. {
  329. u32 val;
  330. /* release semaphore2 */
  331. netxen_nic_read_w0(adapter, NETXEN_PCIE_REG(PCIE_SEM2_UNLOCK), &val);
  332. }
  333. static int netxen_rom_wip_poll(struct netxen_adapter *adapter)
  334. {
  335. long timeout = 0;
  336. long wip = 1;
  337. int val;
  338. netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 0);
  339. while (wip != 0) {
  340. val = netxen_do_rom_rdsr(adapter);
  341. wip = val & 1;
  342. timeout++;
  343. if (timeout > rom_max_timeout) {
  344. return -1;
  345. }
  346. }
  347. return 0;
  348. }
  349. static int do_rom_fast_write(struct netxen_adapter *adapter, int addr,
  350. int data)
  351. {
  352. if (netxen_rom_wren(adapter)) {
  353. return -1;
  354. }
  355. netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_WDATA, data);
  356. netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ADDRESS, addr);
  357. netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 3);
  358. netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_INSTR_OPCODE,
  359. M25P_INSTR_PP);
  360. if (netxen_wait_rom_done(adapter)) {
  361. netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 0);
  362. return -1;
  363. }
  364. return netxen_rom_wip_poll(adapter);
  365. }
  366. static int do_rom_fast_read(struct netxen_adapter *adapter,
  367. int addr, int *valp)
  368. {
  369. cond_resched();
  370. netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ADDRESS, addr);
  371. netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 3);
  372. udelay(100); /* prevent bursting on CRB */
  373. netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_DUMMY_BYTE_CNT, 0);
  374. netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_INSTR_OPCODE, 0xb);
  375. if (netxen_wait_rom_done(adapter)) {
  376. printk("Error waiting for rom done\n");
  377. return -EIO;
  378. }
  379. /* reset abyte_cnt and dummy_byte_cnt */
  380. netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 0);
  381. udelay(100); /* prevent bursting on CRB */
  382. netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_DUMMY_BYTE_CNT, 0);
  383. *valp = netxen_nic_reg_read(adapter, NETXEN_ROMUSB_ROM_RDATA);
  384. return 0;
  385. }
  386. static int do_rom_fast_read_words(struct netxen_adapter *adapter, int addr,
  387. u8 *bytes, size_t size)
  388. {
  389. int addridx;
  390. int ret = 0;
  391. for (addridx = addr; addridx < (addr + size); addridx += 4) {
  392. ret = do_rom_fast_read(adapter, addridx, (int *)bytes);
  393. if (ret != 0)
  394. break;
  395. *(int *)bytes = cpu_to_le32(*(int *)bytes);
  396. bytes += 4;
  397. }
  398. return ret;
  399. }
  400. int
  401. netxen_rom_fast_read_words(struct netxen_adapter *adapter, int addr,
  402. u8 *bytes, size_t size)
  403. {
  404. int ret;
  405. ret = rom_lock(adapter);
  406. if (ret < 0)
  407. return ret;
  408. ret = do_rom_fast_read_words(adapter, addr, bytes, size);
  409. netxen_rom_unlock(adapter);
  410. return ret;
  411. }
  412. int netxen_rom_fast_read(struct netxen_adapter *adapter, int addr, int *valp)
  413. {
  414. int ret;
  415. if (rom_lock(adapter) != 0)
  416. return -EIO;
  417. ret = do_rom_fast_read(adapter, addr, valp);
  418. netxen_rom_unlock(adapter);
  419. return ret;
  420. }
  421. #if 0
  422. int netxen_rom_fast_write(struct netxen_adapter *adapter, int addr, int data)
  423. {
  424. int ret = 0;
  425. if (rom_lock(adapter) != 0) {
  426. return -1;
  427. }
  428. ret = do_rom_fast_write(adapter, addr, data);
  429. netxen_rom_unlock(adapter);
  430. return ret;
  431. }
  432. #endif /* 0 */
  433. static int do_rom_fast_write_words(struct netxen_adapter *adapter,
  434. int addr, u8 *bytes, size_t size)
  435. {
  436. int addridx = addr;
  437. int ret = 0;
  438. while (addridx < (addr + size)) {
  439. int last_attempt = 0;
  440. int timeout = 0;
  441. int data;
  442. data = le32_to_cpu((*(u32*)bytes));
  443. ret = do_rom_fast_write(adapter, addridx, data);
  444. if (ret < 0)
  445. return ret;
  446. while(1) {
  447. int data1;
  448. ret = do_rom_fast_read(adapter, addridx, &data1);
  449. if (ret < 0)
  450. return ret;
  451. if (data1 == data)
  452. break;
  453. if (timeout++ >= rom_write_timeout) {
  454. if (last_attempt++ < 4) {
  455. ret = do_rom_fast_write(adapter,
  456. addridx, data);
  457. if (ret < 0)
  458. return ret;
  459. }
  460. else {
  461. printk(KERN_INFO "Data write did not "
  462. "succeed at address 0x%x\n", addridx);
  463. break;
  464. }
  465. }
  466. }
  467. bytes += 4;
  468. addridx += 4;
  469. }
  470. return ret;
  471. }
  472. int netxen_rom_fast_write_words(struct netxen_adapter *adapter, int addr,
  473. u8 *bytes, size_t size)
  474. {
  475. int ret = 0;
  476. ret = rom_lock(adapter);
  477. if (ret < 0)
  478. return ret;
  479. ret = do_rom_fast_write_words(adapter, addr, bytes, size);
  480. netxen_rom_unlock(adapter);
  481. return ret;
  482. }
  483. static int netxen_rom_wrsr(struct netxen_adapter *adapter, int data)
  484. {
  485. int ret;
  486. ret = netxen_rom_wren(adapter);
  487. if (ret < 0)
  488. return ret;
  489. netxen_crb_writelit_adapter(adapter, NETXEN_ROMUSB_ROM_WDATA, data);
  490. netxen_crb_writelit_adapter(adapter,
  491. NETXEN_ROMUSB_ROM_INSTR_OPCODE, 0x1);
  492. ret = netxen_wait_rom_done(adapter);
  493. if (ret < 0)
  494. return ret;
  495. return netxen_rom_wip_poll(adapter);
  496. }
  497. static int netxen_rom_rdsr(struct netxen_adapter *adapter)
  498. {
  499. int ret;
  500. ret = rom_lock(adapter);
  501. if (ret < 0)
  502. return ret;
  503. ret = netxen_do_rom_rdsr(adapter);
  504. netxen_rom_unlock(adapter);
  505. return ret;
  506. }
  507. int netxen_backup_crbinit(struct netxen_adapter *adapter)
  508. {
  509. int ret = FLASH_SUCCESS;
  510. int val;
  511. char *buffer = kmalloc(NETXEN_FLASH_SECTOR_SIZE, GFP_KERNEL);
  512. if (!buffer)
  513. return -ENOMEM;
  514. /* unlock sector 63 */
  515. val = netxen_rom_rdsr(adapter);
  516. val = val & 0xe3;
  517. ret = netxen_rom_wrsr(adapter, val);
  518. if (ret != FLASH_SUCCESS)
  519. goto out_kfree;
  520. ret = netxen_rom_wip_poll(adapter);
  521. if (ret != FLASH_SUCCESS)
  522. goto out_kfree;
  523. /* copy sector 0 to sector 63 */
  524. ret = netxen_rom_fast_read_words(adapter, NETXEN_CRBINIT_START,
  525. buffer, NETXEN_FLASH_SECTOR_SIZE);
  526. if (ret != FLASH_SUCCESS)
  527. goto out_kfree;
  528. ret = netxen_rom_fast_write_words(adapter, NETXEN_FIXED_START,
  529. buffer, NETXEN_FLASH_SECTOR_SIZE);
  530. if (ret != FLASH_SUCCESS)
  531. goto out_kfree;
  532. /* lock sector 63 */
  533. val = netxen_rom_rdsr(adapter);
  534. if (!(val & 0x8)) {
  535. val |= (0x1 << 2);
  536. /* lock sector 63 */
  537. if (netxen_rom_wrsr(adapter, val) == 0) {
  538. ret = netxen_rom_wip_poll(adapter);
  539. if (ret != FLASH_SUCCESS)
  540. goto out_kfree;
  541. /* lock SR writes */
  542. ret = netxen_rom_wip_poll(adapter);
  543. if (ret != FLASH_SUCCESS)
  544. goto out_kfree;
  545. }
  546. }
  547. out_kfree:
  548. kfree(buffer);
  549. return ret;
  550. }
  551. static int netxen_do_rom_se(struct netxen_adapter *adapter, int addr)
  552. {
  553. netxen_rom_wren(adapter);
  554. netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ADDRESS, addr);
  555. netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 3);
  556. netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_INSTR_OPCODE,
  557. M25P_INSTR_SE);
  558. if (netxen_wait_rom_done(adapter)) {
  559. netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 0);
  560. return -1;
  561. }
  562. return netxen_rom_wip_poll(adapter);
  563. }
  564. static void check_erased_flash(struct netxen_adapter *adapter, int addr)
  565. {
  566. int i;
  567. int val;
  568. int count = 0, erased_errors = 0;
  569. int range;
  570. range = (addr == NETXEN_USER_START) ?
  571. NETXEN_FIXED_START : addr + NETXEN_FLASH_SECTOR_SIZE;
  572. for (i = addr; i < range; i += 4) {
  573. netxen_rom_fast_read(adapter, i, &val);
  574. if (val != 0xffffffff)
  575. erased_errors++;
  576. count++;
  577. }
  578. if (erased_errors)
  579. printk(KERN_INFO "0x%x out of 0x%x words fail to be erased "
  580. "for sector address: %x\n", erased_errors, count, addr);
  581. }
  582. int netxen_rom_se(struct netxen_adapter *adapter, int addr)
  583. {
  584. int ret = 0;
  585. if (rom_lock(adapter) != 0) {
  586. return -1;
  587. }
  588. ret = netxen_do_rom_se(adapter, addr);
  589. netxen_rom_unlock(adapter);
  590. msleep(30);
  591. check_erased_flash(adapter, addr);
  592. return ret;
  593. }
  594. static int netxen_flash_erase_sections(struct netxen_adapter *adapter,
  595. int start, int end)
  596. {
  597. int ret = FLASH_SUCCESS;
  598. int i;
  599. for (i = start; i < end; i++) {
  600. ret = netxen_rom_se(adapter, i * NETXEN_FLASH_SECTOR_SIZE);
  601. if (ret)
  602. break;
  603. ret = netxen_rom_wip_poll(adapter);
  604. if (ret < 0)
  605. return ret;
  606. }
  607. return ret;
  608. }
  609. int
  610. netxen_flash_erase_secondary(struct netxen_adapter *adapter)
  611. {
  612. int ret = FLASH_SUCCESS;
  613. int start, end;
  614. start = NETXEN_SECONDARY_START / NETXEN_FLASH_SECTOR_SIZE;
  615. end = NETXEN_USER_START / NETXEN_FLASH_SECTOR_SIZE;
  616. ret = netxen_flash_erase_sections(adapter, start, end);
  617. return ret;
  618. }
  619. int
  620. netxen_flash_erase_primary(struct netxen_adapter *adapter)
  621. {
  622. int ret = FLASH_SUCCESS;
  623. int start, end;
  624. start = NETXEN_PRIMARY_START / NETXEN_FLASH_SECTOR_SIZE;
  625. end = NETXEN_SECONDARY_START / NETXEN_FLASH_SECTOR_SIZE;
  626. ret = netxen_flash_erase_sections(adapter, start, end);
  627. return ret;
  628. }
  629. void netxen_halt_pegs(struct netxen_adapter *adapter)
  630. {
  631. netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_0 + 0x3c, 1);
  632. netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_1 + 0x3c, 1);
  633. netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_2 + 0x3c, 1);
  634. netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_3 + 0x3c, 1);
  635. }
  636. int netxen_flash_unlock(struct netxen_adapter *adapter)
  637. {
  638. int ret = 0;
  639. ret = netxen_rom_wrsr(adapter, 0);
  640. if (ret < 0)
  641. return ret;
  642. ret = netxen_rom_wren(adapter);
  643. if (ret < 0)
  644. return ret;
  645. return ret;
  646. }
  647. #define NETXEN_BOARDTYPE 0x4008
  648. #define NETXEN_BOARDNUM 0x400c
  649. #define NETXEN_CHIPNUM 0x4010
  650. #define NETXEN_ROMBUS_RESET 0xFFFFFFFF
  651. #define NETXEN_ROM_FIRST_BARRIER 0x800000000ULL
  652. #define NETXEN_ROM_FOUND_INIT 0x400
  653. int netxen_pinit_from_rom(struct netxen_adapter *adapter, int verbose)
  654. {
  655. int addr, val, status;
  656. int n, i;
  657. int init_delay = 0;
  658. struct crb_addr_pair *buf;
  659. u32 off;
  660. /* resetall */
  661. status = netxen_nic_get_board_info(adapter);
  662. if (status)
  663. printk("%s: netxen_pinit_from_rom: Error getting board info\n",
  664. netxen_nic_driver_name);
  665. netxen_crb_writelit_adapter(adapter, NETXEN_ROMUSB_GLB_SW_RESET,
  666. NETXEN_ROMBUS_RESET);
  667. if (verbose) {
  668. int val;
  669. if (netxen_rom_fast_read(adapter, NETXEN_BOARDTYPE, &val) == 0)
  670. printk("P2 ROM board type: 0x%08x\n", val);
  671. else
  672. printk("Could not read board type\n");
  673. if (netxen_rom_fast_read(adapter, NETXEN_BOARDNUM, &val) == 0)
  674. printk("P2 ROM board num: 0x%08x\n", val);
  675. else
  676. printk("Could not read board number\n");
  677. if (netxen_rom_fast_read(adapter, NETXEN_CHIPNUM, &val) == 0)
  678. printk("P2 ROM chip num: 0x%08x\n", val);
  679. else
  680. printk("Could not read chip number\n");
  681. }
  682. if (netxen_rom_fast_read(adapter, 0, &n) == 0
  683. && (n & NETXEN_ROM_FIRST_BARRIER)) {
  684. n &= ~NETXEN_ROM_ROUNDUP;
  685. if (n < NETXEN_ROM_FOUND_INIT) {
  686. if (verbose)
  687. printk("%s: %d CRB init values found"
  688. " in ROM.\n", netxen_nic_driver_name, n);
  689. } else {
  690. printk("%s:n=0x%x Error! NetXen card flash not"
  691. " initialized.\n", __FUNCTION__, n);
  692. return -EIO;
  693. }
  694. buf = kcalloc(n, sizeof(struct crb_addr_pair), GFP_KERNEL);
  695. if (buf == NULL) {
  696. printk("%s: netxen_pinit_from_rom: Unable to calloc "
  697. "memory.\n", netxen_nic_driver_name);
  698. return -ENOMEM;
  699. }
  700. for (i = 0; i < n; i++) {
  701. if (netxen_rom_fast_read(adapter, 8 * i + 4, &val) != 0
  702. || netxen_rom_fast_read(adapter, 8 * i + 8,
  703. &addr) != 0)
  704. return -EIO;
  705. buf[i].addr = addr;
  706. buf[i].data = val;
  707. if (verbose)
  708. printk("%s: PCI: 0x%08x == 0x%08x\n",
  709. netxen_nic_driver_name, (unsigned int)
  710. netxen_decode_crb_addr(addr), val);
  711. }
  712. for (i = 0; i < n; i++) {
  713. off = netxen_decode_crb_addr(buf[i].addr);
  714. if (off == NETXEN_ADDR_ERROR) {
  715. printk(KERN_ERR"CRB init value out of range %x\n",
  716. buf[i].addr);
  717. continue;
  718. }
  719. off += NETXEN_PCI_CRBSPACE;
  720. /* skipping cold reboot MAGIC */
  721. if (off == NETXEN_CAM_RAM(0x1fc))
  722. continue;
  723. /* After writing this register, HW needs time for CRB */
  724. /* to quiet down (else crb_window returns 0xffffffff) */
  725. if (off == NETXEN_ROMUSB_GLB_SW_RESET) {
  726. init_delay = 1;
  727. /* hold xdma in reset also */
  728. buf[i].data = NETXEN_NIC_XDMA_RESET;
  729. }
  730. if (ADDR_IN_WINDOW1(off)) {
  731. writel(buf[i].data,
  732. NETXEN_CRB_NORMALIZE(adapter, off));
  733. } else {
  734. netxen_nic_pci_change_crbwindow(adapter, 0);
  735. writel(buf[i].data,
  736. pci_base_offset(adapter, off));
  737. netxen_nic_pci_change_crbwindow(adapter, 1);
  738. }
  739. if (init_delay == 1) {
  740. msleep(2000);
  741. init_delay = 0;
  742. }
  743. msleep(20);
  744. }
  745. kfree(buf);
  746. /* disable_peg_cache_all */
  747. /* unreset_net_cache */
  748. netxen_nic_hw_read_wx(adapter, NETXEN_ROMUSB_GLB_SW_RESET, &val,
  749. 4);
  750. netxen_crb_writelit_adapter(adapter, NETXEN_ROMUSB_GLB_SW_RESET,
  751. (val & 0xffffff0f));
  752. /* p2dn replyCount */
  753. netxen_crb_writelit_adapter(adapter,
  754. NETXEN_CRB_PEG_NET_D + 0xec, 0x1e);
  755. /* disable_peg_cache 0 */
  756. netxen_crb_writelit_adapter(adapter,
  757. NETXEN_CRB_PEG_NET_D + 0x4c, 8);
  758. /* disable_peg_cache 1 */
  759. netxen_crb_writelit_adapter(adapter,
  760. NETXEN_CRB_PEG_NET_I + 0x4c, 8);
  761. /* peg_clr_all */
  762. /* peg_clr 0 */
  763. netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_0 + 0x8,
  764. 0);
  765. netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_0 + 0xc,
  766. 0);
  767. /* peg_clr 1 */
  768. netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_1 + 0x8,
  769. 0);
  770. netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_1 + 0xc,
  771. 0);
  772. /* peg_clr 2 */
  773. netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_2 + 0x8,
  774. 0);
  775. netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_2 + 0xc,
  776. 0);
  777. /* peg_clr 3 */
  778. netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_3 + 0x8,
  779. 0);
  780. netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_3 + 0xc,
  781. 0);
  782. }
  783. return 0;
  784. }
  785. int netxen_initialize_adapter_offload(struct netxen_adapter *adapter)
  786. {
  787. uint64_t addr;
  788. uint32_t hi;
  789. uint32_t lo;
  790. adapter->dummy_dma.addr =
  791. pci_alloc_consistent(adapter->ahw.pdev,
  792. NETXEN_HOST_DUMMY_DMA_SIZE,
  793. &adapter->dummy_dma.phys_addr);
  794. if (adapter->dummy_dma.addr == NULL) {
  795. printk("%s: ERROR: Could not allocate dummy DMA memory\n",
  796. __FUNCTION__);
  797. return -ENOMEM;
  798. }
  799. addr = (uint64_t) adapter->dummy_dma.phys_addr;
  800. hi = (addr >> 32) & 0xffffffff;
  801. lo = addr & 0xffffffff;
  802. writel(hi, NETXEN_CRB_NORMALIZE(adapter, CRB_HOST_DUMMY_BUF_ADDR_HI));
  803. writel(lo, NETXEN_CRB_NORMALIZE(adapter, CRB_HOST_DUMMY_BUF_ADDR_LO));
  804. return 0;
  805. }
  806. void netxen_free_adapter_offload(struct netxen_adapter *adapter)
  807. {
  808. if (adapter->dummy_dma.addr) {
  809. pci_free_consistent(adapter->ahw.pdev,
  810. NETXEN_HOST_DUMMY_DMA_SIZE,
  811. adapter->dummy_dma.addr,
  812. adapter->dummy_dma.phys_addr);
  813. adapter->dummy_dma.addr = NULL;
  814. }
  815. }
  816. int netxen_phantom_init(struct netxen_adapter *adapter, int pegtune_val)
  817. {
  818. u32 val = 0;
  819. int retries = 30;
  820. if (!pegtune_val) {
  821. do {
  822. val = readl(NETXEN_CRB_NORMALIZE
  823. (adapter, CRB_CMDPEG_STATE));
  824. pegtune_val = readl(NETXEN_CRB_NORMALIZE
  825. (adapter, NETXEN_ROMUSB_GLB_PEGTUNE_DONE));
  826. if (val == PHAN_INITIALIZE_COMPLETE ||
  827. val == PHAN_INITIALIZE_ACK)
  828. return 0;
  829. msleep(1000);
  830. } while (--retries);
  831. if (!retries) {
  832. printk(KERN_WARNING "netxen_phantom_init: init failed, "
  833. "pegtune_val=%x\n", pegtune_val);
  834. return -1;
  835. }
  836. }
  837. return 0;
  838. }
  839. int netxen_nic_rx_has_work(struct netxen_adapter *adapter)
  840. {
  841. int ctx;
  842. for (ctx = 0; ctx < MAX_RCV_CTX; ++ctx) {
  843. struct netxen_recv_context *recv_ctx =
  844. &(adapter->recv_ctx[ctx]);
  845. u32 consumer;
  846. struct status_desc *desc_head;
  847. struct status_desc *desc;
  848. consumer = recv_ctx->status_rx_consumer;
  849. desc_head = recv_ctx->rcv_status_desc_head;
  850. desc = &desc_head[consumer];
  851. if (netxen_get_sts_owner(desc) & STATUS_OWNER_HOST)
  852. return 1;
  853. }
  854. return 0;
  855. }
  856. static int netxen_nic_check_temp(struct netxen_adapter *adapter)
  857. {
  858. struct net_device *netdev = adapter->netdev;
  859. uint32_t temp, temp_state, temp_val;
  860. int rv = 0;
  861. temp = readl(NETXEN_CRB_NORMALIZE(adapter, CRB_TEMP_STATE));
  862. temp_state = nx_get_temp_state(temp);
  863. temp_val = nx_get_temp_val(temp);
  864. if (temp_state == NX_TEMP_PANIC) {
  865. printk(KERN_ALERT
  866. "%s: Device temperature %d degrees C exceeds"
  867. " maximum allowed. Hardware has been shut down.\n",
  868. netxen_nic_driver_name, temp_val);
  869. netif_carrier_off(netdev);
  870. netif_stop_queue(netdev);
  871. rv = 1;
  872. } else if (temp_state == NX_TEMP_WARN) {
  873. if (adapter->temp == NX_TEMP_NORMAL) {
  874. printk(KERN_ALERT
  875. "%s: Device temperature %d degrees C "
  876. "exceeds operating range."
  877. " Immediate action needed.\n",
  878. netxen_nic_driver_name, temp_val);
  879. }
  880. } else {
  881. if (adapter->temp == NX_TEMP_WARN) {
  882. printk(KERN_INFO
  883. "%s: Device temperature is now %d degrees C"
  884. " in normal range.\n", netxen_nic_driver_name,
  885. temp_val);
  886. }
  887. }
  888. adapter->temp = temp_state;
  889. return rv;
  890. }
  891. void netxen_watchdog_task(struct work_struct *work)
  892. {
  893. struct net_device *netdev;
  894. struct netxen_adapter *adapter =
  895. container_of(work, struct netxen_adapter, watchdog_task);
  896. if ((adapter->portnum == 0) && netxen_nic_check_temp(adapter))
  897. return;
  898. if (adapter->handle_phy_intr)
  899. adapter->handle_phy_intr(adapter);
  900. netdev = adapter->netdev;
  901. if ((netif_running(netdev)) && !netif_carrier_ok(netdev) &&
  902. netxen_nic_link_ok(adapter) ) {
  903. printk(KERN_INFO "%s %s (port %d), Link is up\n",
  904. netxen_nic_driver_name, netdev->name, adapter->portnum);
  905. netif_carrier_on(netdev);
  906. netif_wake_queue(netdev);
  907. } else if(!(netif_running(netdev)) && netif_carrier_ok(netdev)) {
  908. printk(KERN_ERR "%s %s Link is Down\n",
  909. netxen_nic_driver_name, netdev->name);
  910. netif_carrier_off(netdev);
  911. netif_stop_queue(netdev);
  912. }
  913. mod_timer(&adapter->watchdog_timer, jiffies + 2 * HZ);
  914. }
  915. /*
  916. * netxen_process_rcv() send the received packet to the protocol stack.
  917. * and if the number of receives exceeds RX_BUFFERS_REFILL, then we
  918. * invoke the routine to send more rx buffers to the Phantom...
  919. */
  920. static void netxen_process_rcv(struct netxen_adapter *adapter, int ctxid,
  921. struct status_desc *desc)
  922. {
  923. struct pci_dev *pdev = adapter->pdev;
  924. struct net_device *netdev = adapter->netdev;
  925. u64 sts_data = le64_to_cpu(desc->status_desc_data);
  926. int index = netxen_get_sts_refhandle(sts_data);
  927. struct netxen_recv_context *recv_ctx = &(adapter->recv_ctx[ctxid]);
  928. struct netxen_rx_buffer *buffer;
  929. struct sk_buff *skb;
  930. u32 length = netxen_get_sts_totallength(sts_data);
  931. u32 desc_ctx;
  932. struct netxen_rcv_desc_ctx *rcv_desc;
  933. int ret;
  934. desc_ctx = netxen_get_sts_type(sts_data);
  935. if (unlikely(desc_ctx >= NUM_RCV_DESC_RINGS)) {
  936. printk("%s: %s Bad Rcv descriptor ring\n",
  937. netxen_nic_driver_name, netdev->name);
  938. return;
  939. }
  940. rcv_desc = &recv_ctx->rcv_desc[desc_ctx];
  941. if (unlikely(index > rcv_desc->max_rx_desc_count)) {
  942. DPRINTK(ERR, "Got a buffer index:%x Max is %x\n",
  943. index, rcv_desc->max_rx_desc_count);
  944. return;
  945. }
  946. buffer = &rcv_desc->rx_buf_arr[index];
  947. if (desc_ctx == RCV_DESC_LRO_CTXID) {
  948. buffer->lro_current_frags++;
  949. if (netxen_get_sts_desc_lro_last_frag(desc)) {
  950. buffer->lro_expected_frags =
  951. netxen_get_sts_desc_lro_cnt(desc);
  952. buffer->lro_length = length;
  953. }
  954. if (buffer->lro_current_frags != buffer->lro_expected_frags) {
  955. if (buffer->lro_expected_frags != 0) {
  956. printk("LRO: (refhandle:%x) recv frag."
  957. "wait for last. flags: %x expected:%d"
  958. "have:%d\n", index,
  959. netxen_get_sts_desc_lro_last_frag(desc),
  960. buffer->lro_expected_frags,
  961. buffer->lro_current_frags);
  962. }
  963. return;
  964. }
  965. }
  966. pci_unmap_single(pdev, buffer->dma, rcv_desc->dma_size,
  967. PCI_DMA_FROMDEVICE);
  968. skb = (struct sk_buff *)buffer->skb;
  969. if (likely(adapter->rx_csum &&
  970. netxen_get_sts_status(sts_data) == STATUS_CKSUM_OK)) {
  971. adapter->stats.csummed++;
  972. skb->ip_summed = CHECKSUM_UNNECESSARY;
  973. } else
  974. skb->ip_summed = CHECKSUM_NONE;
  975. skb->dev = netdev;
  976. if (desc_ctx == RCV_DESC_LRO_CTXID) {
  977. /* True length was only available on the last pkt */
  978. skb_put(skb, buffer->lro_length);
  979. } else {
  980. skb_put(skb, length);
  981. }
  982. skb->protocol = eth_type_trans(skb, netdev);
  983. ret = netif_receive_skb(skb);
  984. /*
  985. * RH: Do we need these stats on a regular basis. Can we get it from
  986. * Linux stats.
  987. */
  988. switch (ret) {
  989. case NET_RX_SUCCESS:
  990. adapter->stats.uphappy++;
  991. break;
  992. case NET_RX_CN_LOW:
  993. adapter->stats.uplcong++;
  994. break;
  995. case NET_RX_CN_MOD:
  996. adapter->stats.upmcong++;
  997. break;
  998. case NET_RX_CN_HIGH:
  999. adapter->stats.uphcong++;
  1000. break;
  1001. case NET_RX_DROP:
  1002. adapter->stats.updropped++;
  1003. break;
  1004. default:
  1005. adapter->stats.updunno++;
  1006. break;
  1007. }
  1008. netdev->last_rx = jiffies;
  1009. rcv_desc->rcv_free++;
  1010. rcv_desc->rcv_pending--;
  1011. /*
  1012. * We just consumed one buffer so post a buffer.
  1013. */
  1014. buffer->skb = NULL;
  1015. buffer->state = NETXEN_BUFFER_FREE;
  1016. buffer->lro_current_frags = 0;
  1017. buffer->lro_expected_frags = 0;
  1018. adapter->stats.no_rcv++;
  1019. adapter->stats.rxbytes += length;
  1020. }
  1021. /* Process Receive status ring */
  1022. u32 netxen_process_rcv_ring(struct netxen_adapter *adapter, int ctxid, int max)
  1023. {
  1024. struct netxen_recv_context *recv_ctx = &(adapter->recv_ctx[ctxid]);
  1025. struct status_desc *desc_head = recv_ctx->rcv_status_desc_head;
  1026. struct status_desc *desc; /* used to read status desc here */
  1027. u32 consumer = recv_ctx->status_rx_consumer;
  1028. u32 producer = 0;
  1029. int count = 0, ring;
  1030. DPRINTK(INFO, "procesing receive\n");
  1031. /*
  1032. * we assume in this case that there is only one port and that is
  1033. * port #1...changes need to be done in firmware to indicate port
  1034. * number as part of the descriptor. This way we will be able to get
  1035. * the netdev which is associated with that device.
  1036. */
  1037. while (count < max) {
  1038. desc = &desc_head[consumer];
  1039. if (!(netxen_get_sts_owner(desc) & STATUS_OWNER_HOST)) {
  1040. DPRINTK(ERR, "desc %p ownedby %x\n", desc,
  1041. netxen_get_sts_owner(desc));
  1042. break;
  1043. }
  1044. netxen_process_rcv(adapter, ctxid, desc);
  1045. netxen_set_sts_owner(desc, STATUS_OWNER_PHANTOM);
  1046. consumer = (consumer + 1) & (adapter->max_rx_desc_count - 1);
  1047. count++;
  1048. }
  1049. if (count) {
  1050. for (ring = 0; ring < NUM_RCV_DESC_RINGS; ring++) {
  1051. netxen_post_rx_buffers_nodb(adapter, ctxid, ring);
  1052. }
  1053. }
  1054. /* update the consumer index in phantom */
  1055. if (count) {
  1056. recv_ctx->status_rx_consumer = consumer;
  1057. recv_ctx->status_rx_producer = producer;
  1058. /* Window = 1 */
  1059. writel(consumer,
  1060. NETXEN_CRB_NORMALIZE(adapter,
  1061. recv_crb_registers[adapter->portnum].
  1062. crb_rcv_status_consumer));
  1063. wmb();
  1064. }
  1065. return count;
  1066. }
  1067. /* Process Command status ring */
  1068. int netxen_process_cmd_ring(unsigned long data)
  1069. {
  1070. u32 last_consumer;
  1071. u32 consumer;
  1072. struct netxen_adapter *adapter = (struct netxen_adapter *)data;
  1073. int count1 = 0;
  1074. int count2 = 0;
  1075. struct netxen_cmd_buffer *buffer;
  1076. struct pci_dev *pdev;
  1077. struct netxen_skb_frag *frag;
  1078. u32 i;
  1079. int done;
  1080. spin_lock(&adapter->tx_lock);
  1081. last_consumer = adapter->last_cmd_consumer;
  1082. DPRINTK(INFO, "procesing xmit complete\n");
  1083. /* we assume in this case that there is only one port and that is
  1084. * port #1...changes need to be done in firmware to indicate port
  1085. * number as part of the descriptor. This way we will be able to get
  1086. * the netdev which is associated with that device.
  1087. */
  1088. consumer = le32_to_cpu(*(adapter->cmd_consumer));
  1089. if (last_consumer == consumer) { /* Ring is empty */
  1090. DPRINTK(INFO, "last_consumer %d == consumer %d\n",
  1091. last_consumer, consumer);
  1092. spin_unlock(&adapter->tx_lock);
  1093. return 1;
  1094. }
  1095. adapter->proc_cmd_buf_counter++;
  1096. /*
  1097. * Not needed - does not seem to be used anywhere.
  1098. * adapter->cmd_consumer = consumer;
  1099. */
  1100. spin_unlock(&adapter->tx_lock);
  1101. while ((last_consumer != consumer) && (count1 < MAX_STATUS_HANDLE)) {
  1102. buffer = &adapter->cmd_buf_arr[last_consumer];
  1103. pdev = adapter->pdev;
  1104. if (buffer->skb) {
  1105. frag = &buffer->frag_array[0];
  1106. pci_unmap_single(pdev, frag->dma, frag->length,
  1107. PCI_DMA_TODEVICE);
  1108. frag->dma = 0ULL;
  1109. for (i = 1; i < buffer->frag_count; i++) {
  1110. DPRINTK(INFO, "getting fragment no %d\n", i);
  1111. frag++; /* Get the next frag */
  1112. pci_unmap_page(pdev, frag->dma, frag->length,
  1113. PCI_DMA_TODEVICE);
  1114. frag->dma = 0ULL;
  1115. }
  1116. adapter->stats.skbfreed++;
  1117. dev_kfree_skb_any(buffer->skb);
  1118. buffer->skb = NULL;
  1119. } else if (adapter->proc_cmd_buf_counter == 1) {
  1120. adapter->stats.txnullskb++;
  1121. }
  1122. if (unlikely(netif_queue_stopped(adapter->netdev)
  1123. && netif_carrier_ok(adapter->netdev))
  1124. && ((jiffies - adapter->netdev->trans_start) >
  1125. adapter->netdev->watchdog_timeo)) {
  1126. SCHEDULE_WORK(&adapter->tx_timeout_task);
  1127. }
  1128. last_consumer = get_next_index(last_consumer,
  1129. adapter->max_tx_desc_count);
  1130. count1++;
  1131. }
  1132. count2 = 0;
  1133. spin_lock(&adapter->tx_lock);
  1134. if ((--adapter->proc_cmd_buf_counter) == 0) {
  1135. adapter->last_cmd_consumer = last_consumer;
  1136. while ((adapter->last_cmd_consumer != consumer)
  1137. && (count2 < MAX_STATUS_HANDLE)) {
  1138. buffer =
  1139. &adapter->cmd_buf_arr[adapter->last_cmd_consumer];
  1140. count2++;
  1141. if (buffer->skb)
  1142. break;
  1143. else
  1144. adapter->last_cmd_consumer =
  1145. get_next_index(adapter->last_cmd_consumer,
  1146. adapter->max_tx_desc_count);
  1147. }
  1148. }
  1149. if (count1 || count2) {
  1150. if (netif_queue_stopped(adapter->netdev)
  1151. && (adapter->flags & NETXEN_NETDEV_STATUS)) {
  1152. netif_wake_queue(adapter->netdev);
  1153. adapter->flags &= ~NETXEN_NETDEV_STATUS;
  1154. }
  1155. }
  1156. /*
  1157. * If everything is freed up to consumer then check if the ring is full
  1158. * If the ring is full then check if more needs to be freed and
  1159. * schedule the call back again.
  1160. *
  1161. * This happens when there are 2 CPUs. One could be freeing and the
  1162. * other filling it. If the ring is full when we get out of here and
  1163. * the card has already interrupted the host then the host can miss the
  1164. * interrupt.
  1165. *
  1166. * There is still a possible race condition and the host could miss an
  1167. * interrupt. The card has to take care of this.
  1168. */
  1169. if (adapter->last_cmd_consumer == consumer &&
  1170. (((adapter->cmd_producer + 1) %
  1171. adapter->max_tx_desc_count) == adapter->last_cmd_consumer)) {
  1172. consumer = le32_to_cpu(*(adapter->cmd_consumer));
  1173. }
  1174. done = (adapter->last_cmd_consumer == consumer);
  1175. spin_unlock(&adapter->tx_lock);
  1176. DPRINTK(INFO, "last consumer is %d in %s\n", last_consumer,
  1177. __FUNCTION__);
  1178. return (done);
  1179. }
  1180. /*
  1181. * netxen_post_rx_buffers puts buffer in the Phantom memory
  1182. */
  1183. void netxen_post_rx_buffers(struct netxen_adapter *adapter, u32 ctx, u32 ringid)
  1184. {
  1185. struct pci_dev *pdev = adapter->ahw.pdev;
  1186. struct sk_buff *skb;
  1187. struct netxen_recv_context *recv_ctx = &(adapter->recv_ctx[ctx]);
  1188. struct netxen_rcv_desc_ctx *rcv_desc = NULL;
  1189. uint producer;
  1190. struct rcv_desc *pdesc;
  1191. struct netxen_rx_buffer *buffer;
  1192. int count = 0;
  1193. int index = 0;
  1194. netxen_ctx_msg msg = 0;
  1195. dma_addr_t dma;
  1196. rcv_desc = &recv_ctx->rcv_desc[ringid];
  1197. producer = rcv_desc->producer;
  1198. index = rcv_desc->begin_alloc;
  1199. buffer = &rcv_desc->rx_buf_arr[index];
  1200. /* We can start writing rx descriptors into the phantom memory. */
  1201. while (buffer->state == NETXEN_BUFFER_FREE) {
  1202. skb = dev_alloc_skb(rcv_desc->skb_size);
  1203. if (unlikely(!skb)) {
  1204. /*
  1205. * TODO
  1206. * We need to schedule the posting of buffers to the pegs.
  1207. */
  1208. rcv_desc->begin_alloc = index;
  1209. DPRINTK(ERR, "netxen_post_rx_buffers: "
  1210. " allocated only %d buffers\n", count);
  1211. break;
  1212. }
  1213. count++; /* now there should be no failure */
  1214. pdesc = &rcv_desc->desc_head[producer];
  1215. #if defined(XGB_DEBUG)
  1216. *(unsigned long *)(skb->head) = 0xc0debabe;
  1217. if (skb_is_nonlinear(skb)) {
  1218. printk("Allocated SKB @%p is nonlinear\n");
  1219. }
  1220. #endif
  1221. skb_reserve(skb, 2);
  1222. /* This will be setup when we receive the
  1223. * buffer after it has been filled FSL TBD TBD
  1224. * skb->dev = netdev;
  1225. */
  1226. dma = pci_map_single(pdev, skb->data, rcv_desc->dma_size,
  1227. PCI_DMA_FROMDEVICE);
  1228. pdesc->addr_buffer = cpu_to_le64(dma);
  1229. buffer->skb = skb;
  1230. buffer->state = NETXEN_BUFFER_BUSY;
  1231. buffer->dma = dma;
  1232. /* make a rcv descriptor */
  1233. pdesc->reference_handle = cpu_to_le16(buffer->ref_handle);
  1234. pdesc->buffer_length = cpu_to_le32(rcv_desc->dma_size);
  1235. DPRINTK(INFO, "done writing descripter\n");
  1236. producer =
  1237. get_next_index(producer, rcv_desc->max_rx_desc_count);
  1238. index = get_next_index(index, rcv_desc->max_rx_desc_count);
  1239. buffer = &rcv_desc->rx_buf_arr[index];
  1240. }
  1241. /* if we did allocate buffers, then write the count to Phantom */
  1242. if (count) {
  1243. rcv_desc->begin_alloc = index;
  1244. rcv_desc->rcv_pending += count;
  1245. rcv_desc->producer = producer;
  1246. if (rcv_desc->rcv_free >= 32) {
  1247. rcv_desc->rcv_free = 0;
  1248. /* Window = 1 */
  1249. writel((producer - 1) &
  1250. (rcv_desc->max_rx_desc_count - 1),
  1251. NETXEN_CRB_NORMALIZE(adapter,
  1252. recv_crb_registers[
  1253. adapter->portnum].
  1254. rcv_desc_crb[ringid].
  1255. crb_rcv_producer_offset));
  1256. /*
  1257. * Write a doorbell msg to tell phanmon of change in
  1258. * receive ring producer
  1259. */
  1260. netxen_set_msg_peg_id(msg, NETXEN_RCV_PEG_DB_ID);
  1261. netxen_set_msg_privid(msg);
  1262. netxen_set_msg_count(msg,
  1263. ((producer -
  1264. 1) & (rcv_desc->
  1265. max_rx_desc_count - 1)));
  1266. netxen_set_msg_ctxid(msg, adapter->portnum);
  1267. netxen_set_msg_opcode(msg, NETXEN_RCV_PRODUCER(ringid));
  1268. writel(msg,
  1269. DB_NORMALIZE(adapter,
  1270. NETXEN_RCV_PRODUCER_OFFSET));
  1271. wmb();
  1272. }
  1273. }
  1274. }
  1275. static void netxen_post_rx_buffers_nodb(struct netxen_adapter *adapter,
  1276. uint32_t ctx, uint32_t ringid)
  1277. {
  1278. struct pci_dev *pdev = adapter->ahw.pdev;
  1279. struct sk_buff *skb;
  1280. struct netxen_recv_context *recv_ctx = &(adapter->recv_ctx[ctx]);
  1281. struct netxen_rcv_desc_ctx *rcv_desc = NULL;
  1282. u32 producer;
  1283. struct rcv_desc *pdesc;
  1284. struct netxen_rx_buffer *buffer;
  1285. int count = 0;
  1286. int index = 0;
  1287. rcv_desc = &recv_ctx->rcv_desc[ringid];
  1288. producer = rcv_desc->producer;
  1289. index = rcv_desc->begin_alloc;
  1290. buffer = &rcv_desc->rx_buf_arr[index];
  1291. /* We can start writing rx descriptors into the phantom memory. */
  1292. while (buffer->state == NETXEN_BUFFER_FREE) {
  1293. skb = dev_alloc_skb(rcv_desc->skb_size);
  1294. if (unlikely(!skb)) {
  1295. /*
  1296. * We need to schedule the posting of buffers to the pegs.
  1297. */
  1298. rcv_desc->begin_alloc = index;
  1299. DPRINTK(ERR, "netxen_post_rx_buffers_nodb: "
  1300. " allocated only %d buffers\n", count);
  1301. break;
  1302. }
  1303. count++; /* now there should be no failure */
  1304. pdesc = &rcv_desc->desc_head[producer];
  1305. skb_reserve(skb, 2);
  1306. /*
  1307. * This will be setup when we receive the
  1308. * buffer after it has been filled
  1309. * skb->dev = netdev;
  1310. */
  1311. buffer->skb = skb;
  1312. buffer->state = NETXEN_BUFFER_BUSY;
  1313. buffer->dma = pci_map_single(pdev, skb->data,
  1314. rcv_desc->dma_size,
  1315. PCI_DMA_FROMDEVICE);
  1316. /* make a rcv descriptor */
  1317. pdesc->reference_handle = cpu_to_le16(buffer->ref_handle);
  1318. pdesc->buffer_length = cpu_to_le32(rcv_desc->dma_size);
  1319. pdesc->addr_buffer = cpu_to_le64(buffer->dma);
  1320. DPRINTK(INFO, "done writing descripter\n");
  1321. producer =
  1322. get_next_index(producer, rcv_desc->max_rx_desc_count);
  1323. index = get_next_index(index, rcv_desc->max_rx_desc_count);
  1324. buffer = &rcv_desc->rx_buf_arr[index];
  1325. }
  1326. /* if we did allocate buffers, then write the count to Phantom */
  1327. if (count) {
  1328. rcv_desc->begin_alloc = index;
  1329. rcv_desc->rcv_pending += count;
  1330. rcv_desc->producer = producer;
  1331. if (rcv_desc->rcv_free >= 32) {
  1332. rcv_desc->rcv_free = 0;
  1333. /* Window = 1 */
  1334. writel((producer - 1) &
  1335. (rcv_desc->max_rx_desc_count - 1),
  1336. NETXEN_CRB_NORMALIZE(adapter,
  1337. recv_crb_registers[
  1338. adapter->portnum].
  1339. rcv_desc_crb[ringid].
  1340. crb_rcv_producer_offset));
  1341. wmb();
  1342. }
  1343. }
  1344. }
  1345. int netxen_nic_tx_has_work(struct netxen_adapter *adapter)
  1346. {
  1347. if (find_diff_among(adapter->last_cmd_consumer,
  1348. adapter->cmd_producer,
  1349. adapter->max_tx_desc_count) > 0)
  1350. return 1;
  1351. return 0;
  1352. }
  1353. void netxen_nic_clear_stats(struct netxen_adapter *adapter)
  1354. {
  1355. memset(&adapter->stats, 0, sizeof(adapter->stats));
  1356. return;
  1357. }