mthca_provider.c 22 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854
  1. /*
  2. * Copyright (c) 2004, 2005 Topspin Communications. All rights reserved.
  3. * Copyright (c) 2005 Sun Microsystems, Inc. All rights reserved.
  4. * Copyright (c) 2005 Cisco Systems. All rights reserved.
  5. *
  6. * This software is available to you under a choice of one of two
  7. * licenses. You may choose to be licensed under the terms of the GNU
  8. * General Public License (GPL) Version 2, available from the file
  9. * COPYING in the main directory of this source tree, or the
  10. * OpenIB.org BSD license below:
  11. *
  12. * Redistribution and use in source and binary forms, with or
  13. * without modification, are permitted provided that the following
  14. * conditions are met:
  15. *
  16. * - Redistributions of source code must retain the above
  17. * copyright notice, this list of conditions and the following
  18. * disclaimer.
  19. *
  20. * - Redistributions in binary form must reproduce the above
  21. * copyright notice, this list of conditions and the following
  22. * disclaimer in the documentation and/or other materials
  23. * provided with the distribution.
  24. *
  25. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  26. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  27. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  28. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  29. * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  30. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  31. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  32. * SOFTWARE.
  33. *
  34. * $Id: mthca_provider.c 1397 2004-12-28 05:09:00Z roland $
  35. */
  36. #include <ib_smi.h>
  37. #include <linux/mm.h>
  38. #include "mthca_dev.h"
  39. #include "mthca_cmd.h"
  40. #include "mthca_user.h"
  41. #include "mthca_memfree.h"
  42. static int mthca_query_device(struct ib_device *ibdev,
  43. struct ib_device_attr *props)
  44. {
  45. struct ib_smp *in_mad = NULL;
  46. struct ib_smp *out_mad = NULL;
  47. int err = -ENOMEM;
  48. struct mthca_dev* mdev = to_mdev(ibdev);
  49. u8 status;
  50. in_mad = kmalloc(sizeof *in_mad, GFP_KERNEL);
  51. out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
  52. if (!in_mad || !out_mad)
  53. goto out;
  54. memset(props, 0, sizeof *props);
  55. props->fw_ver = mdev->fw_ver;
  56. memset(in_mad, 0, sizeof *in_mad);
  57. in_mad->base_version = 1;
  58. in_mad->mgmt_class = IB_MGMT_CLASS_SUBN_LID_ROUTED;
  59. in_mad->class_version = 1;
  60. in_mad->method = IB_MGMT_METHOD_GET;
  61. in_mad->attr_id = IB_SMP_ATTR_NODE_INFO;
  62. err = mthca_MAD_IFC(mdev, 1, 1,
  63. 1, NULL, NULL, in_mad, out_mad,
  64. &status);
  65. if (err)
  66. goto out;
  67. if (status) {
  68. err = -EINVAL;
  69. goto out;
  70. }
  71. props->device_cap_flags = mdev->device_cap_flags;
  72. props->vendor_id = be32_to_cpup((u32 *) (out_mad->data + 36)) &
  73. 0xffffff;
  74. props->vendor_part_id = be16_to_cpup((u16 *) (out_mad->data + 30));
  75. props->hw_ver = be16_to_cpup((u16 *) (out_mad->data + 32));
  76. memcpy(&props->sys_image_guid, out_mad->data + 4, 8);
  77. memcpy(&props->node_guid, out_mad->data + 12, 8);
  78. props->max_mr_size = ~0ull;
  79. props->max_qp = mdev->limits.num_qps - mdev->limits.reserved_qps;
  80. props->max_qp_wr = 0xffff;
  81. props->max_sge = mdev->limits.max_sg;
  82. props->max_cq = mdev->limits.num_cqs - mdev->limits.reserved_cqs;
  83. props->max_cqe = 0xffff;
  84. props->max_mr = mdev->limits.num_mpts - mdev->limits.reserved_mrws;
  85. props->max_pd = mdev->limits.num_pds - mdev->limits.reserved_pds;
  86. props->max_qp_rd_atom = 1 << mdev->qp_table.rdb_shift;
  87. props->max_qp_init_rd_atom = 1 << mdev->qp_table.rdb_shift;
  88. props->local_ca_ack_delay = mdev->limits.local_ca_ack_delay;
  89. err = 0;
  90. out:
  91. kfree(in_mad);
  92. kfree(out_mad);
  93. return err;
  94. }
  95. static int mthca_query_port(struct ib_device *ibdev,
  96. u8 port, struct ib_port_attr *props)
  97. {
  98. struct ib_smp *in_mad = NULL;
  99. struct ib_smp *out_mad = NULL;
  100. int err = -ENOMEM;
  101. u8 status;
  102. in_mad = kmalloc(sizeof *in_mad, GFP_KERNEL);
  103. out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
  104. if (!in_mad || !out_mad)
  105. goto out;
  106. memset(in_mad, 0, sizeof *in_mad);
  107. in_mad->base_version = 1;
  108. in_mad->mgmt_class = IB_MGMT_CLASS_SUBN_LID_ROUTED;
  109. in_mad->class_version = 1;
  110. in_mad->method = IB_MGMT_METHOD_GET;
  111. in_mad->attr_id = IB_SMP_ATTR_PORT_INFO;
  112. in_mad->attr_mod = cpu_to_be32(port);
  113. err = mthca_MAD_IFC(to_mdev(ibdev), 1, 1,
  114. port, NULL, NULL, in_mad, out_mad,
  115. &status);
  116. if (err)
  117. goto out;
  118. if (status) {
  119. err = -EINVAL;
  120. goto out;
  121. }
  122. props->lid = be16_to_cpup((u16 *) (out_mad->data + 16));
  123. props->lmc = out_mad->data[34] & 0x7;
  124. props->sm_lid = be16_to_cpup((u16 *) (out_mad->data + 18));
  125. props->sm_sl = out_mad->data[36] & 0xf;
  126. props->state = out_mad->data[32] & 0xf;
  127. props->phys_state = out_mad->data[33] >> 4;
  128. props->port_cap_flags = be32_to_cpup((u32 *) (out_mad->data + 20));
  129. props->gid_tbl_len = to_mdev(ibdev)->limits.gid_table_len;
  130. props->pkey_tbl_len = to_mdev(ibdev)->limits.pkey_table_len;
  131. props->qkey_viol_cntr = be16_to_cpup((u16 *) (out_mad->data + 48));
  132. props->active_width = out_mad->data[31] & 0xf;
  133. props->active_speed = out_mad->data[35] >> 4;
  134. out:
  135. kfree(in_mad);
  136. kfree(out_mad);
  137. return err;
  138. }
  139. static int mthca_modify_port(struct ib_device *ibdev,
  140. u8 port, int port_modify_mask,
  141. struct ib_port_modify *props)
  142. {
  143. struct mthca_set_ib_param set_ib;
  144. struct ib_port_attr attr;
  145. int err;
  146. u8 status;
  147. if (down_interruptible(&to_mdev(ibdev)->cap_mask_mutex))
  148. return -ERESTARTSYS;
  149. err = mthca_query_port(ibdev, port, &attr);
  150. if (err)
  151. goto out;
  152. set_ib.set_si_guid = 0;
  153. set_ib.reset_qkey_viol = !!(port_modify_mask & IB_PORT_RESET_QKEY_CNTR);
  154. set_ib.cap_mask = (attr.port_cap_flags | props->set_port_cap_mask) &
  155. ~props->clr_port_cap_mask;
  156. err = mthca_SET_IB(to_mdev(ibdev), &set_ib, port, &status);
  157. if (err)
  158. goto out;
  159. if (status) {
  160. err = -EINVAL;
  161. goto out;
  162. }
  163. out:
  164. up(&to_mdev(ibdev)->cap_mask_mutex);
  165. return err;
  166. }
  167. static int mthca_query_pkey(struct ib_device *ibdev,
  168. u8 port, u16 index, u16 *pkey)
  169. {
  170. struct ib_smp *in_mad = NULL;
  171. struct ib_smp *out_mad = NULL;
  172. int err = -ENOMEM;
  173. u8 status;
  174. in_mad = kmalloc(sizeof *in_mad, GFP_KERNEL);
  175. out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
  176. if (!in_mad || !out_mad)
  177. goto out;
  178. memset(in_mad, 0, sizeof *in_mad);
  179. in_mad->base_version = 1;
  180. in_mad->mgmt_class = IB_MGMT_CLASS_SUBN_LID_ROUTED;
  181. in_mad->class_version = 1;
  182. in_mad->method = IB_MGMT_METHOD_GET;
  183. in_mad->attr_id = IB_SMP_ATTR_PKEY_TABLE;
  184. in_mad->attr_mod = cpu_to_be32(index / 32);
  185. err = mthca_MAD_IFC(to_mdev(ibdev), 1, 1,
  186. port, NULL, NULL, in_mad, out_mad,
  187. &status);
  188. if (err)
  189. goto out;
  190. if (status) {
  191. err = -EINVAL;
  192. goto out;
  193. }
  194. *pkey = be16_to_cpu(((u16 *) out_mad->data)[index % 32]);
  195. out:
  196. kfree(in_mad);
  197. kfree(out_mad);
  198. return err;
  199. }
  200. static int mthca_query_gid(struct ib_device *ibdev, u8 port,
  201. int index, union ib_gid *gid)
  202. {
  203. struct ib_smp *in_mad = NULL;
  204. struct ib_smp *out_mad = NULL;
  205. int err = -ENOMEM;
  206. u8 status;
  207. in_mad = kmalloc(sizeof *in_mad, GFP_KERNEL);
  208. out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
  209. if (!in_mad || !out_mad)
  210. goto out;
  211. memset(in_mad, 0, sizeof *in_mad);
  212. in_mad->base_version = 1;
  213. in_mad->mgmt_class = IB_MGMT_CLASS_SUBN_LID_ROUTED;
  214. in_mad->class_version = 1;
  215. in_mad->method = IB_MGMT_METHOD_GET;
  216. in_mad->attr_id = IB_SMP_ATTR_PORT_INFO;
  217. in_mad->attr_mod = cpu_to_be32(port);
  218. err = mthca_MAD_IFC(to_mdev(ibdev), 1, 1,
  219. port, NULL, NULL, in_mad, out_mad,
  220. &status);
  221. if (err)
  222. goto out;
  223. if (status) {
  224. err = -EINVAL;
  225. goto out;
  226. }
  227. memcpy(gid->raw, out_mad->data + 8, 8);
  228. memset(in_mad, 0, sizeof *in_mad);
  229. in_mad->base_version = 1;
  230. in_mad->mgmt_class = IB_MGMT_CLASS_SUBN_LID_ROUTED;
  231. in_mad->class_version = 1;
  232. in_mad->method = IB_MGMT_METHOD_GET;
  233. in_mad->attr_id = IB_SMP_ATTR_GUID_INFO;
  234. in_mad->attr_mod = cpu_to_be32(index / 8);
  235. err = mthca_MAD_IFC(to_mdev(ibdev), 1, 1,
  236. port, NULL, NULL, in_mad, out_mad,
  237. &status);
  238. if (err)
  239. goto out;
  240. if (status) {
  241. err = -EINVAL;
  242. goto out;
  243. }
  244. memcpy(gid->raw + 8, out_mad->data + (index % 8) * 16, 8);
  245. out:
  246. kfree(in_mad);
  247. kfree(out_mad);
  248. return err;
  249. }
  250. static struct ib_ucontext *mthca_alloc_ucontext(struct ib_device *ibdev,
  251. struct ib_udata *udata)
  252. {
  253. struct mthca_alloc_ucontext_resp uresp;
  254. struct mthca_ucontext *context;
  255. int err;
  256. memset(&uresp, 0, sizeof uresp);
  257. uresp.qp_tab_size = to_mdev(ibdev)->limits.num_qps;
  258. if (mthca_is_memfree(to_mdev(ibdev)))
  259. uresp.uarc_size = to_mdev(ibdev)->uar_table.uarc_size;
  260. else
  261. uresp.uarc_size = 0;
  262. context = kmalloc(sizeof *context, GFP_KERNEL);
  263. if (!context)
  264. return ERR_PTR(-ENOMEM);
  265. err = mthca_uar_alloc(to_mdev(ibdev), &context->uar);
  266. if (err) {
  267. kfree(context);
  268. return ERR_PTR(err);
  269. }
  270. context->db_tab = mthca_init_user_db_tab(to_mdev(ibdev));
  271. if (IS_ERR(context->db_tab)) {
  272. err = PTR_ERR(context->db_tab);
  273. mthca_uar_free(to_mdev(ibdev), &context->uar);
  274. kfree(context);
  275. return ERR_PTR(err);
  276. }
  277. if (ib_copy_to_udata(udata, &uresp, sizeof uresp)) {
  278. mthca_cleanup_user_db_tab(to_mdev(ibdev), &context->uar, context->db_tab);
  279. mthca_uar_free(to_mdev(ibdev), &context->uar);
  280. kfree(context);
  281. return ERR_PTR(-EFAULT);
  282. }
  283. return &context->ibucontext;
  284. }
  285. static int mthca_dealloc_ucontext(struct ib_ucontext *context)
  286. {
  287. mthca_cleanup_user_db_tab(to_mdev(context->device), &to_mucontext(context)->uar,
  288. to_mucontext(context)->db_tab);
  289. mthca_uar_free(to_mdev(context->device), &to_mucontext(context)->uar);
  290. kfree(to_mucontext(context));
  291. return 0;
  292. }
  293. static int mthca_mmap_uar(struct ib_ucontext *context,
  294. struct vm_area_struct *vma)
  295. {
  296. if (vma->vm_end - vma->vm_start != PAGE_SIZE)
  297. return -EINVAL;
  298. vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
  299. if (remap_pfn_range(vma, vma->vm_start,
  300. to_mucontext(context)->uar.pfn,
  301. PAGE_SIZE, vma->vm_page_prot))
  302. return -EAGAIN;
  303. return 0;
  304. }
  305. static struct ib_pd *mthca_alloc_pd(struct ib_device *ibdev,
  306. struct ib_ucontext *context,
  307. struct ib_udata *udata)
  308. {
  309. struct mthca_pd *pd;
  310. int err;
  311. pd = kmalloc(sizeof *pd, GFP_KERNEL);
  312. if (!pd)
  313. return ERR_PTR(-ENOMEM);
  314. err = mthca_pd_alloc(to_mdev(ibdev), !context, pd);
  315. if (err) {
  316. kfree(pd);
  317. return ERR_PTR(err);
  318. }
  319. if (context) {
  320. if (ib_copy_to_udata(udata, &pd->pd_num, sizeof (__u32))) {
  321. mthca_pd_free(to_mdev(ibdev), pd);
  322. kfree(pd);
  323. return ERR_PTR(-EFAULT);
  324. }
  325. }
  326. return &pd->ibpd;
  327. }
  328. static int mthca_dealloc_pd(struct ib_pd *pd)
  329. {
  330. mthca_pd_free(to_mdev(pd->device), to_mpd(pd));
  331. kfree(pd);
  332. return 0;
  333. }
  334. static struct ib_ah *mthca_ah_create(struct ib_pd *pd,
  335. struct ib_ah_attr *ah_attr)
  336. {
  337. int err;
  338. struct mthca_ah *ah;
  339. ah = kmalloc(sizeof *ah, GFP_ATOMIC);
  340. if (!ah)
  341. return ERR_PTR(-ENOMEM);
  342. err = mthca_create_ah(to_mdev(pd->device), to_mpd(pd), ah_attr, ah);
  343. if (err) {
  344. kfree(ah);
  345. return ERR_PTR(err);
  346. }
  347. return &ah->ibah;
  348. }
  349. static int mthca_ah_destroy(struct ib_ah *ah)
  350. {
  351. mthca_destroy_ah(to_mdev(ah->device), to_mah(ah));
  352. kfree(ah);
  353. return 0;
  354. }
  355. static struct ib_qp *mthca_create_qp(struct ib_pd *pd,
  356. struct ib_qp_init_attr *init_attr,
  357. struct ib_udata *udata)
  358. {
  359. struct mthca_qp *qp;
  360. int err;
  361. switch (init_attr->qp_type) {
  362. case IB_QPT_RC:
  363. case IB_QPT_UC:
  364. case IB_QPT_UD:
  365. {
  366. qp = kmalloc(sizeof *qp, GFP_KERNEL);
  367. if (!qp)
  368. return ERR_PTR(-ENOMEM);
  369. qp->sq.max = init_attr->cap.max_send_wr;
  370. qp->rq.max = init_attr->cap.max_recv_wr;
  371. qp->sq.max_gs = init_attr->cap.max_send_sge;
  372. qp->rq.max_gs = init_attr->cap.max_recv_sge;
  373. err = mthca_alloc_qp(to_mdev(pd->device), to_mpd(pd),
  374. to_mcq(init_attr->send_cq),
  375. to_mcq(init_attr->recv_cq),
  376. init_attr->qp_type, init_attr->sq_sig_type,
  377. qp);
  378. qp->ibqp.qp_num = qp->qpn;
  379. break;
  380. }
  381. case IB_QPT_SMI:
  382. case IB_QPT_GSI:
  383. {
  384. qp = kmalloc(sizeof (struct mthca_sqp), GFP_KERNEL);
  385. if (!qp)
  386. return ERR_PTR(-ENOMEM);
  387. qp->sq.max = init_attr->cap.max_send_wr;
  388. qp->rq.max = init_attr->cap.max_recv_wr;
  389. qp->sq.max_gs = init_attr->cap.max_send_sge;
  390. qp->rq.max_gs = init_attr->cap.max_recv_sge;
  391. qp->ibqp.qp_num = init_attr->qp_type == IB_QPT_SMI ? 0 : 1;
  392. err = mthca_alloc_sqp(to_mdev(pd->device), to_mpd(pd),
  393. to_mcq(init_attr->send_cq),
  394. to_mcq(init_attr->recv_cq),
  395. init_attr->sq_sig_type,
  396. qp->ibqp.qp_num, init_attr->port_num,
  397. to_msqp(qp));
  398. break;
  399. }
  400. default:
  401. /* Don't support raw QPs */
  402. return ERR_PTR(-ENOSYS);
  403. }
  404. if (err) {
  405. kfree(qp);
  406. return ERR_PTR(err);
  407. }
  408. init_attr->cap.max_inline_data = 0;
  409. return &qp->ibqp;
  410. }
  411. static int mthca_destroy_qp(struct ib_qp *qp)
  412. {
  413. mthca_free_qp(to_mdev(qp->device), to_mqp(qp));
  414. kfree(qp);
  415. return 0;
  416. }
  417. static struct ib_cq *mthca_create_cq(struct ib_device *ibdev, int entries,
  418. struct ib_ucontext *context,
  419. struct ib_udata *udata)
  420. {
  421. struct mthca_cq *cq;
  422. int nent;
  423. int err;
  424. cq = kmalloc(sizeof *cq, GFP_KERNEL);
  425. if (!cq)
  426. return ERR_PTR(-ENOMEM);
  427. for (nent = 1; nent <= entries; nent <<= 1)
  428. ; /* nothing */
  429. err = mthca_init_cq(to_mdev(ibdev), nent, cq);
  430. if (err) {
  431. kfree(cq);
  432. cq = ERR_PTR(err);
  433. }
  434. return &cq->ibcq;
  435. }
  436. static int mthca_destroy_cq(struct ib_cq *cq)
  437. {
  438. mthca_free_cq(to_mdev(cq->device), to_mcq(cq));
  439. kfree(cq);
  440. return 0;
  441. }
  442. static inline u32 convert_access(int acc)
  443. {
  444. return (acc & IB_ACCESS_REMOTE_ATOMIC ? MTHCA_MPT_FLAG_ATOMIC : 0) |
  445. (acc & IB_ACCESS_REMOTE_WRITE ? MTHCA_MPT_FLAG_REMOTE_WRITE : 0) |
  446. (acc & IB_ACCESS_REMOTE_READ ? MTHCA_MPT_FLAG_REMOTE_READ : 0) |
  447. (acc & IB_ACCESS_LOCAL_WRITE ? MTHCA_MPT_FLAG_LOCAL_WRITE : 0) |
  448. MTHCA_MPT_FLAG_LOCAL_READ;
  449. }
  450. static struct ib_mr *mthca_get_dma_mr(struct ib_pd *pd, int acc)
  451. {
  452. struct mthca_mr *mr;
  453. int err;
  454. mr = kmalloc(sizeof *mr, GFP_KERNEL);
  455. if (!mr)
  456. return ERR_PTR(-ENOMEM);
  457. err = mthca_mr_alloc_notrans(to_mdev(pd->device),
  458. to_mpd(pd)->pd_num,
  459. convert_access(acc), mr);
  460. if (err) {
  461. kfree(mr);
  462. return ERR_PTR(err);
  463. }
  464. return &mr->ibmr;
  465. }
  466. static struct ib_mr *mthca_reg_phys_mr(struct ib_pd *pd,
  467. struct ib_phys_buf *buffer_list,
  468. int num_phys_buf,
  469. int acc,
  470. u64 *iova_start)
  471. {
  472. struct mthca_mr *mr;
  473. u64 *page_list;
  474. u64 total_size;
  475. u64 mask;
  476. int shift;
  477. int npages;
  478. int err;
  479. int i, j, n;
  480. /* First check that we have enough alignment */
  481. if ((*iova_start & ~PAGE_MASK) != (buffer_list[0].addr & ~PAGE_MASK))
  482. return ERR_PTR(-EINVAL);
  483. if (num_phys_buf > 1 &&
  484. ((buffer_list[0].addr + buffer_list[0].size) & ~PAGE_MASK))
  485. return ERR_PTR(-EINVAL);
  486. mask = 0;
  487. total_size = 0;
  488. for (i = 0; i < num_phys_buf; ++i) {
  489. if (i != 0 && buffer_list[i].addr & ~PAGE_MASK)
  490. return ERR_PTR(-EINVAL);
  491. if (i != 0 && i != num_phys_buf - 1 &&
  492. (buffer_list[i].size & ~PAGE_MASK))
  493. return ERR_PTR(-EINVAL);
  494. total_size += buffer_list[i].size;
  495. if (i > 0)
  496. mask |= buffer_list[i].addr;
  497. }
  498. /* Find largest page shift we can use to cover buffers */
  499. for (shift = PAGE_SHIFT; shift < 31; ++shift)
  500. if (num_phys_buf > 1) {
  501. if ((1ULL << shift) & mask)
  502. break;
  503. } else {
  504. if (1ULL << shift >=
  505. buffer_list[0].size +
  506. (buffer_list[0].addr & ((1ULL << shift) - 1)))
  507. break;
  508. }
  509. buffer_list[0].size += buffer_list[0].addr & ((1ULL << shift) - 1);
  510. buffer_list[0].addr &= ~0ull << shift;
  511. mr = kmalloc(sizeof *mr, GFP_KERNEL);
  512. if (!mr)
  513. return ERR_PTR(-ENOMEM);
  514. npages = 0;
  515. for (i = 0; i < num_phys_buf; ++i)
  516. npages += (buffer_list[i].size + (1ULL << shift) - 1) >> shift;
  517. if (!npages)
  518. return &mr->ibmr;
  519. page_list = kmalloc(npages * sizeof *page_list, GFP_KERNEL);
  520. if (!page_list) {
  521. kfree(mr);
  522. return ERR_PTR(-ENOMEM);
  523. }
  524. n = 0;
  525. for (i = 0; i < num_phys_buf; ++i)
  526. for (j = 0;
  527. j < (buffer_list[i].size + (1ULL << shift) - 1) >> shift;
  528. ++j)
  529. page_list[n++] = buffer_list[i].addr + ((u64) j << shift);
  530. mthca_dbg(to_mdev(pd->device), "Registering memory at %llx (iova %llx) "
  531. "in PD %x; shift %d, npages %d.\n",
  532. (unsigned long long) buffer_list[0].addr,
  533. (unsigned long long) *iova_start,
  534. to_mpd(pd)->pd_num,
  535. shift, npages);
  536. err = mthca_mr_alloc_phys(to_mdev(pd->device),
  537. to_mpd(pd)->pd_num,
  538. page_list, shift, npages,
  539. *iova_start, total_size,
  540. convert_access(acc), mr);
  541. if (err) {
  542. kfree(page_list);
  543. kfree(mr);
  544. return ERR_PTR(err);
  545. }
  546. kfree(page_list);
  547. return &mr->ibmr;
  548. }
  549. static int mthca_dereg_mr(struct ib_mr *mr)
  550. {
  551. struct mthca_mr *mmr = to_mmr(mr);
  552. mthca_free_mr(to_mdev(mr->device), mmr);
  553. kfree(mmr);
  554. return 0;
  555. }
  556. static struct ib_fmr *mthca_alloc_fmr(struct ib_pd *pd, int mr_access_flags,
  557. struct ib_fmr_attr *fmr_attr)
  558. {
  559. struct mthca_fmr *fmr;
  560. int err;
  561. fmr = kmalloc(sizeof *fmr, GFP_KERNEL);
  562. if (!fmr)
  563. return ERR_PTR(-ENOMEM);
  564. memcpy(&fmr->attr, fmr_attr, sizeof *fmr_attr);
  565. err = mthca_fmr_alloc(to_mdev(pd->device), to_mpd(pd)->pd_num,
  566. convert_access(mr_access_flags), fmr);
  567. if (err) {
  568. kfree(fmr);
  569. return ERR_PTR(err);
  570. }
  571. return &fmr->ibmr;
  572. }
  573. static int mthca_dealloc_fmr(struct ib_fmr *fmr)
  574. {
  575. struct mthca_fmr *mfmr = to_mfmr(fmr);
  576. int err;
  577. err = mthca_free_fmr(to_mdev(fmr->device), mfmr);
  578. if (err)
  579. return err;
  580. kfree(mfmr);
  581. return 0;
  582. }
  583. static int mthca_unmap_fmr(struct list_head *fmr_list)
  584. {
  585. struct ib_fmr *fmr;
  586. int err;
  587. u8 status;
  588. struct mthca_dev *mdev = NULL;
  589. list_for_each_entry(fmr, fmr_list, list) {
  590. if (mdev && to_mdev(fmr->device) != mdev)
  591. return -EINVAL;
  592. mdev = to_mdev(fmr->device);
  593. }
  594. if (!mdev)
  595. return 0;
  596. if (mthca_is_memfree(mdev)) {
  597. list_for_each_entry(fmr, fmr_list, list)
  598. mthca_arbel_fmr_unmap(mdev, to_mfmr(fmr));
  599. wmb();
  600. } else
  601. list_for_each_entry(fmr, fmr_list, list)
  602. mthca_tavor_fmr_unmap(mdev, to_mfmr(fmr));
  603. err = mthca_SYNC_TPT(mdev, &status);
  604. if (err)
  605. return err;
  606. if (status)
  607. return -EINVAL;
  608. return 0;
  609. }
  610. static ssize_t show_rev(struct class_device *cdev, char *buf)
  611. {
  612. struct mthca_dev *dev = container_of(cdev, struct mthca_dev, ib_dev.class_dev);
  613. return sprintf(buf, "%x\n", dev->rev_id);
  614. }
  615. static ssize_t show_fw_ver(struct class_device *cdev, char *buf)
  616. {
  617. struct mthca_dev *dev = container_of(cdev, struct mthca_dev, ib_dev.class_dev);
  618. return sprintf(buf, "%x.%x.%x\n", (int) (dev->fw_ver >> 32),
  619. (int) (dev->fw_ver >> 16) & 0xffff,
  620. (int) dev->fw_ver & 0xffff);
  621. }
  622. static ssize_t show_hca(struct class_device *cdev, char *buf)
  623. {
  624. struct mthca_dev *dev = container_of(cdev, struct mthca_dev, ib_dev.class_dev);
  625. switch (dev->pdev->device) {
  626. case PCI_DEVICE_ID_MELLANOX_TAVOR:
  627. return sprintf(buf, "MT23108\n");
  628. case PCI_DEVICE_ID_MELLANOX_ARBEL_COMPAT:
  629. return sprintf(buf, "MT25208 (MT23108 compat mode)\n");
  630. case PCI_DEVICE_ID_MELLANOX_ARBEL:
  631. return sprintf(buf, "MT25208\n");
  632. case PCI_DEVICE_ID_MELLANOX_SINAI:
  633. case PCI_DEVICE_ID_MELLANOX_SINAI_OLD:
  634. return sprintf(buf, "MT25204\n");
  635. default:
  636. return sprintf(buf, "unknown\n");
  637. }
  638. }
  639. static CLASS_DEVICE_ATTR(hw_rev, S_IRUGO, show_rev, NULL);
  640. static CLASS_DEVICE_ATTR(fw_ver, S_IRUGO, show_fw_ver, NULL);
  641. static CLASS_DEVICE_ATTR(hca_type, S_IRUGO, show_hca, NULL);
  642. static struct class_device_attribute *mthca_class_attributes[] = {
  643. &class_device_attr_hw_rev,
  644. &class_device_attr_fw_ver,
  645. &class_device_attr_hca_type
  646. };
  647. int mthca_register_device(struct mthca_dev *dev)
  648. {
  649. int ret;
  650. int i;
  651. strlcpy(dev->ib_dev.name, "mthca%d", IB_DEVICE_NAME_MAX);
  652. dev->ib_dev.owner = THIS_MODULE;
  653. dev->ib_dev.node_type = IB_NODE_CA;
  654. dev->ib_dev.phys_port_cnt = dev->limits.num_ports;
  655. dev->ib_dev.dma_device = &dev->pdev->dev;
  656. dev->ib_dev.class_dev.dev = &dev->pdev->dev;
  657. dev->ib_dev.query_device = mthca_query_device;
  658. dev->ib_dev.query_port = mthca_query_port;
  659. dev->ib_dev.modify_port = mthca_modify_port;
  660. dev->ib_dev.query_pkey = mthca_query_pkey;
  661. dev->ib_dev.query_gid = mthca_query_gid;
  662. dev->ib_dev.alloc_ucontext = mthca_alloc_ucontext;
  663. dev->ib_dev.dealloc_ucontext = mthca_dealloc_ucontext;
  664. dev->ib_dev.mmap = mthca_mmap_uar;
  665. dev->ib_dev.alloc_pd = mthca_alloc_pd;
  666. dev->ib_dev.dealloc_pd = mthca_dealloc_pd;
  667. dev->ib_dev.create_ah = mthca_ah_create;
  668. dev->ib_dev.destroy_ah = mthca_ah_destroy;
  669. dev->ib_dev.create_qp = mthca_create_qp;
  670. dev->ib_dev.modify_qp = mthca_modify_qp;
  671. dev->ib_dev.destroy_qp = mthca_destroy_qp;
  672. dev->ib_dev.create_cq = mthca_create_cq;
  673. dev->ib_dev.destroy_cq = mthca_destroy_cq;
  674. dev->ib_dev.poll_cq = mthca_poll_cq;
  675. dev->ib_dev.get_dma_mr = mthca_get_dma_mr;
  676. dev->ib_dev.reg_phys_mr = mthca_reg_phys_mr;
  677. dev->ib_dev.dereg_mr = mthca_dereg_mr;
  678. if (dev->mthca_flags & MTHCA_FLAG_FMR) {
  679. dev->ib_dev.alloc_fmr = mthca_alloc_fmr;
  680. dev->ib_dev.unmap_fmr = mthca_unmap_fmr;
  681. dev->ib_dev.dealloc_fmr = mthca_dealloc_fmr;
  682. if (mthca_is_memfree(dev))
  683. dev->ib_dev.map_phys_fmr = mthca_arbel_map_phys_fmr;
  684. else
  685. dev->ib_dev.map_phys_fmr = mthca_tavor_map_phys_fmr;
  686. }
  687. dev->ib_dev.attach_mcast = mthca_multicast_attach;
  688. dev->ib_dev.detach_mcast = mthca_multicast_detach;
  689. dev->ib_dev.process_mad = mthca_process_mad;
  690. if (mthca_is_memfree(dev)) {
  691. dev->ib_dev.req_notify_cq = mthca_arbel_arm_cq;
  692. dev->ib_dev.post_send = mthca_arbel_post_send;
  693. dev->ib_dev.post_recv = mthca_arbel_post_receive;
  694. } else {
  695. dev->ib_dev.req_notify_cq = mthca_tavor_arm_cq;
  696. dev->ib_dev.post_send = mthca_tavor_post_send;
  697. dev->ib_dev.post_recv = mthca_tavor_post_receive;
  698. }
  699. init_MUTEX(&dev->cap_mask_mutex);
  700. ret = ib_register_device(&dev->ib_dev);
  701. if (ret)
  702. return ret;
  703. for (i = 0; i < ARRAY_SIZE(mthca_class_attributes); ++i) {
  704. ret = class_device_create_file(&dev->ib_dev.class_dev,
  705. mthca_class_attributes[i]);
  706. if (ret) {
  707. ib_unregister_device(&dev->ib_dev);
  708. return ret;
  709. }
  710. }
  711. return 0;
  712. }
  713. void mthca_unregister_device(struct mthca_dev *dev)
  714. {
  715. ib_unregister_device(&dev->ib_dev);
  716. }