88pm800.c 15 KB

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  1. /*
  2. * Base driver for Marvell 88PM800
  3. *
  4. * Copyright (C) 2012 Marvell International Ltd.
  5. * Haojian Zhuang <haojian.zhuang@marvell.com>
  6. * Joseph(Yossi) Hanin <yhanin@marvell.com>
  7. * Qiao Zhou <zhouqiao@marvell.com>
  8. *
  9. * This file is subject to the terms and conditions of the GNU General
  10. * Public License. See the file "COPYING" in the main directory of this
  11. * archive for more details.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  21. */
  22. #include <linux/kernel.h>
  23. #include <linux/module.h>
  24. #include <linux/err.h>
  25. #include <linux/i2c.h>
  26. #include <linux/mfd/core.h>
  27. #include <linux/mfd/88pm80x.h>
  28. #include <linux/slab.h>
  29. /* Interrupt Registers */
  30. #define PM800_INT_STATUS1 (0x05)
  31. #define PM800_ONKEY_INT_STS1 (1 << 0)
  32. #define PM800_EXTON_INT_STS1 (1 << 1)
  33. #define PM800_CHG_INT_STS1 (1 << 2)
  34. #define PM800_BAT_INT_STS1 (1 << 3)
  35. #define PM800_RTC_INT_STS1 (1 << 4)
  36. #define PM800_CLASSD_OC_INT_STS1 (1 << 5)
  37. #define PM800_INT_STATUS2 (0x06)
  38. #define PM800_VBAT_INT_STS2 (1 << 0)
  39. #define PM800_VSYS_INT_STS2 (1 << 1)
  40. #define PM800_VCHG_INT_STS2 (1 << 2)
  41. #define PM800_TINT_INT_STS2 (1 << 3)
  42. #define PM800_GPADC0_INT_STS2 (1 << 4)
  43. #define PM800_TBAT_INT_STS2 (1 << 5)
  44. #define PM800_GPADC2_INT_STS2 (1 << 6)
  45. #define PM800_GPADC3_INT_STS2 (1 << 7)
  46. #define PM800_INT_STATUS3 (0x07)
  47. #define PM800_INT_STATUS4 (0x08)
  48. #define PM800_GPIO0_INT_STS4 (1 << 0)
  49. #define PM800_GPIO1_INT_STS4 (1 << 1)
  50. #define PM800_GPIO2_INT_STS4 (1 << 2)
  51. #define PM800_GPIO3_INT_STS4 (1 << 3)
  52. #define PM800_GPIO4_INT_STS4 (1 << 4)
  53. #define PM800_INT_ENA_1 (0x09)
  54. #define PM800_ONKEY_INT_ENA1 (1 << 0)
  55. #define PM800_EXTON_INT_ENA1 (1 << 1)
  56. #define PM800_CHG_INT_ENA1 (1 << 2)
  57. #define PM800_BAT_INT_ENA1 (1 << 3)
  58. #define PM800_RTC_INT_ENA1 (1 << 4)
  59. #define PM800_CLASSD_OC_INT_ENA1 (1 << 5)
  60. #define PM800_INT_ENA_2 (0x0A)
  61. #define PM800_VBAT_INT_ENA2 (1 << 0)
  62. #define PM800_VSYS_INT_ENA2 (1 << 1)
  63. #define PM800_VCHG_INT_ENA2 (1 << 2)
  64. #define PM800_TINT_INT_ENA2 (1 << 3)
  65. #define PM800_INT_ENA_3 (0x0B)
  66. #define PM800_GPADC0_INT_ENA3 (1 << 0)
  67. #define PM800_GPADC1_INT_ENA3 (1 << 1)
  68. #define PM800_GPADC2_INT_ENA3 (1 << 2)
  69. #define PM800_GPADC3_INT_ENA3 (1 << 3)
  70. #define PM800_GPADC4_INT_ENA3 (1 << 4)
  71. #define PM800_INT_ENA_4 (0x0C)
  72. #define PM800_GPIO0_INT_ENA4 (1 << 0)
  73. #define PM800_GPIO1_INT_ENA4 (1 << 1)
  74. #define PM800_GPIO2_INT_ENA4 (1 << 2)
  75. #define PM800_GPIO3_INT_ENA4 (1 << 3)
  76. #define PM800_GPIO4_INT_ENA4 (1 << 4)
  77. /* number of INT_ENA & INT_STATUS regs */
  78. #define PM800_INT_REG_NUM (4)
  79. /* Interrupt Number in 88PM800 */
  80. enum {
  81. PM800_IRQ_ONKEY, /*EN1b0 *//*0 */
  82. PM800_IRQ_EXTON, /*EN1b1 */
  83. PM800_IRQ_CHG, /*EN1b2 */
  84. PM800_IRQ_BAT, /*EN1b3 */
  85. PM800_IRQ_RTC, /*EN1b4 */
  86. PM800_IRQ_CLASSD, /*EN1b5 *//*5 */
  87. PM800_IRQ_VBAT, /*EN2b0 */
  88. PM800_IRQ_VSYS, /*EN2b1 */
  89. PM800_IRQ_VCHG, /*EN2b2 */
  90. PM800_IRQ_TINT, /*EN2b3 */
  91. PM800_IRQ_GPADC0, /*EN3b0 *//*10 */
  92. PM800_IRQ_GPADC1, /*EN3b1 */
  93. PM800_IRQ_GPADC2, /*EN3b2 */
  94. PM800_IRQ_GPADC3, /*EN3b3 */
  95. PM800_IRQ_GPADC4, /*EN3b4 */
  96. PM800_IRQ_GPIO0, /*EN4b0 *//*15 */
  97. PM800_IRQ_GPIO1, /*EN4b1 */
  98. PM800_IRQ_GPIO2, /*EN4b2 */
  99. PM800_IRQ_GPIO3, /*EN4b3 */
  100. PM800_IRQ_GPIO4, /*EN4b4 *//*19 */
  101. PM800_MAX_IRQ,
  102. };
  103. /* PM800: generation identification number */
  104. #define PM800_CHIP_GEN_ID_NUM 0x3
  105. static const struct i2c_device_id pm80x_id_table[] = {
  106. {"88PM800", 0},
  107. {} /* NULL terminated */
  108. };
  109. MODULE_DEVICE_TABLE(i2c, pm80x_id_table);
  110. static struct resource rtc_resources[] = {
  111. {
  112. .name = "88pm80x-rtc",
  113. .start = PM800_IRQ_RTC,
  114. .end = PM800_IRQ_RTC,
  115. .flags = IORESOURCE_IRQ,
  116. },
  117. };
  118. static struct mfd_cell rtc_devs[] = {
  119. {
  120. .name = "88pm80x-rtc",
  121. .num_resources = ARRAY_SIZE(rtc_resources),
  122. .resources = &rtc_resources[0],
  123. .id = -1,
  124. },
  125. };
  126. static struct resource onkey_resources[] = {
  127. {
  128. .name = "88pm80x-onkey",
  129. .start = PM800_IRQ_ONKEY,
  130. .end = PM800_IRQ_ONKEY,
  131. .flags = IORESOURCE_IRQ,
  132. },
  133. };
  134. static struct mfd_cell onkey_devs[] = {
  135. {
  136. .name = "88pm80x-onkey",
  137. .num_resources = 1,
  138. .resources = &onkey_resources[0],
  139. .id = -1,
  140. },
  141. };
  142. static struct mfd_cell regulator_devs[] = {
  143. {
  144. .name = "88pm80x-regulator",
  145. .id = -1,
  146. },
  147. };
  148. static const struct regmap_irq pm800_irqs[] = {
  149. /* INT0 */
  150. [PM800_IRQ_ONKEY] = {
  151. .mask = PM800_ONKEY_INT_ENA1,
  152. },
  153. [PM800_IRQ_EXTON] = {
  154. .mask = PM800_EXTON_INT_ENA1,
  155. },
  156. [PM800_IRQ_CHG] = {
  157. .mask = PM800_CHG_INT_ENA1,
  158. },
  159. [PM800_IRQ_BAT] = {
  160. .mask = PM800_BAT_INT_ENA1,
  161. },
  162. [PM800_IRQ_RTC] = {
  163. .mask = PM800_RTC_INT_ENA1,
  164. },
  165. [PM800_IRQ_CLASSD] = {
  166. .mask = PM800_CLASSD_OC_INT_ENA1,
  167. },
  168. /* INT1 */
  169. [PM800_IRQ_VBAT] = {
  170. .reg_offset = 1,
  171. .mask = PM800_VBAT_INT_ENA2,
  172. },
  173. [PM800_IRQ_VSYS] = {
  174. .reg_offset = 1,
  175. .mask = PM800_VSYS_INT_ENA2,
  176. },
  177. [PM800_IRQ_VCHG] = {
  178. .reg_offset = 1,
  179. .mask = PM800_VCHG_INT_ENA2,
  180. },
  181. [PM800_IRQ_TINT] = {
  182. .reg_offset = 1,
  183. .mask = PM800_TINT_INT_ENA2,
  184. },
  185. /* INT2 */
  186. [PM800_IRQ_GPADC0] = {
  187. .reg_offset = 2,
  188. .mask = PM800_GPADC0_INT_ENA3,
  189. },
  190. [PM800_IRQ_GPADC1] = {
  191. .reg_offset = 2,
  192. .mask = PM800_GPADC1_INT_ENA3,
  193. },
  194. [PM800_IRQ_GPADC2] = {
  195. .reg_offset = 2,
  196. .mask = PM800_GPADC2_INT_ENA3,
  197. },
  198. [PM800_IRQ_GPADC3] = {
  199. .reg_offset = 2,
  200. .mask = PM800_GPADC3_INT_ENA3,
  201. },
  202. [PM800_IRQ_GPADC4] = {
  203. .reg_offset = 2,
  204. .mask = PM800_GPADC4_INT_ENA3,
  205. },
  206. /* INT3 */
  207. [PM800_IRQ_GPIO0] = {
  208. .reg_offset = 3,
  209. .mask = PM800_GPIO0_INT_ENA4,
  210. },
  211. [PM800_IRQ_GPIO1] = {
  212. .reg_offset = 3,
  213. .mask = PM800_GPIO1_INT_ENA4,
  214. },
  215. [PM800_IRQ_GPIO2] = {
  216. .reg_offset = 3,
  217. .mask = PM800_GPIO2_INT_ENA4,
  218. },
  219. [PM800_IRQ_GPIO3] = {
  220. .reg_offset = 3,
  221. .mask = PM800_GPIO3_INT_ENA4,
  222. },
  223. [PM800_IRQ_GPIO4] = {
  224. .reg_offset = 3,
  225. .mask = PM800_GPIO4_INT_ENA4,
  226. },
  227. };
  228. static int device_gpadc_init(struct pm80x_chip *chip,
  229. struct pm80x_platform_data *pdata)
  230. {
  231. struct pm80x_subchip *subchip = chip->subchip;
  232. struct regmap *map = subchip->regmap_gpadc;
  233. int data = 0, mask = 0, ret = 0;
  234. if (!map) {
  235. dev_warn(chip->dev,
  236. "Warning: gpadc regmap is not available!\n");
  237. return -EINVAL;
  238. }
  239. /*
  240. * initialize GPADC without activating it turn on GPADC
  241. * measurments
  242. */
  243. ret = regmap_update_bits(map,
  244. PM800_GPADC_MISC_CONFIG2,
  245. PM800_GPADC_MISC_GPFSM_EN,
  246. PM800_GPADC_MISC_GPFSM_EN);
  247. if (ret < 0)
  248. goto out;
  249. /*
  250. * This function configures the ADC as requires for
  251. * CP implementation.CP does not "own" the ADC configuration
  252. * registers and relies on AP.
  253. * Reason: enable automatic ADC measurements needed
  254. * for CP to get VBAT and RF temperature readings.
  255. */
  256. ret = regmap_update_bits(map, PM800_GPADC_MEAS_EN1,
  257. PM800_MEAS_EN1_VBAT, PM800_MEAS_EN1_VBAT);
  258. if (ret < 0)
  259. goto out;
  260. ret = regmap_update_bits(map, PM800_GPADC_MEAS_EN2,
  261. (PM800_MEAS_EN2_RFTMP | PM800_MEAS_GP0_EN),
  262. (PM800_MEAS_EN2_RFTMP | PM800_MEAS_GP0_EN));
  263. if (ret < 0)
  264. goto out;
  265. /*
  266. * the defult of PM800 is GPADC operates at 100Ks/s rate
  267. * and Number of GPADC slots with active current bias prior
  268. * to GPADC sampling = 1 slot for all GPADCs set for
  269. * Temprature mesurmants
  270. */
  271. mask = (PM800_GPADC_GP_BIAS_EN0 | PM800_GPADC_GP_BIAS_EN1 |
  272. PM800_GPADC_GP_BIAS_EN2 | PM800_GPADC_GP_BIAS_EN3);
  273. if (pdata && (pdata->batt_det == 0))
  274. data = (PM800_GPADC_GP_BIAS_EN0 | PM800_GPADC_GP_BIAS_EN1 |
  275. PM800_GPADC_GP_BIAS_EN2 | PM800_GPADC_GP_BIAS_EN3);
  276. else
  277. data = (PM800_GPADC_GP_BIAS_EN0 | PM800_GPADC_GP_BIAS_EN2 |
  278. PM800_GPADC_GP_BIAS_EN3);
  279. ret = regmap_update_bits(map, PM800_GP_BIAS_ENA1, mask, data);
  280. if (ret < 0)
  281. goto out;
  282. dev_info(chip->dev, "pm800 device_gpadc_init: Done\n");
  283. return 0;
  284. out:
  285. dev_info(chip->dev, "pm800 device_gpadc_init: Failed!\n");
  286. return ret;
  287. }
  288. static int device_onkey_init(struct pm80x_chip *chip,
  289. struct pm80x_platform_data *pdata)
  290. {
  291. int ret;
  292. ret = mfd_add_devices(chip->dev, 0, &onkey_devs[0],
  293. ARRAY_SIZE(onkey_devs), &onkey_resources[0], 0,
  294. NULL);
  295. if (ret) {
  296. dev_err(chip->dev, "Failed to add onkey subdev\n");
  297. return ret;
  298. }
  299. return 0;
  300. }
  301. static int device_rtc_init(struct pm80x_chip *chip,
  302. struct pm80x_platform_data *pdata)
  303. {
  304. int ret;
  305. rtc_devs[0].platform_data = pdata->rtc;
  306. rtc_devs[0].pdata_size =
  307. pdata->rtc ? sizeof(struct pm80x_rtc_pdata) : 0;
  308. ret = mfd_add_devices(chip->dev, 0, &rtc_devs[0],
  309. ARRAY_SIZE(rtc_devs), NULL, 0, NULL);
  310. if (ret) {
  311. dev_err(chip->dev, "Failed to add rtc subdev\n");
  312. return ret;
  313. }
  314. return 0;
  315. }
  316. static int device_regulator_init(struct pm80x_chip *chip,
  317. struct pm80x_platform_data *pdata)
  318. {
  319. int ret;
  320. ret = mfd_add_devices(chip->dev, 0, &regulator_devs[0],
  321. ARRAY_SIZE(regulator_devs), NULL, 0, NULL);
  322. if (ret) {
  323. dev_err(chip->dev, "Failed to add regulator subdev\n");
  324. return ret;
  325. }
  326. return 0;
  327. }
  328. static int device_irq_init_800(struct pm80x_chip *chip)
  329. {
  330. struct regmap *map = chip->regmap;
  331. unsigned long flags = IRQF_ONESHOT;
  332. int data, mask, ret = -EINVAL;
  333. if (!map || !chip->irq) {
  334. dev_err(chip->dev, "incorrect parameters\n");
  335. return -EINVAL;
  336. }
  337. /*
  338. * irq_mode defines the way of clearing interrupt. it's read-clear by
  339. * default.
  340. */
  341. mask =
  342. PM800_WAKEUP2_INV_INT | PM800_WAKEUP2_INT_CLEAR |
  343. PM800_WAKEUP2_INT_MASK;
  344. data = PM800_WAKEUP2_INT_CLEAR;
  345. ret = regmap_update_bits(map, PM800_WAKEUP2, mask, data);
  346. if (ret < 0)
  347. goto out;
  348. ret =
  349. regmap_add_irq_chip(chip->regmap, chip->irq, flags, -1,
  350. chip->regmap_irq_chip, &chip->irq_data);
  351. out:
  352. return ret;
  353. }
  354. static void device_irq_exit_800(struct pm80x_chip *chip)
  355. {
  356. regmap_del_irq_chip(chip->irq, chip->irq_data);
  357. }
  358. static struct regmap_irq_chip pm800_irq_chip = {
  359. .name = "88pm800",
  360. .irqs = pm800_irqs,
  361. .num_irqs = ARRAY_SIZE(pm800_irqs),
  362. .num_regs = 4,
  363. .status_base = PM800_INT_STATUS1,
  364. .mask_base = PM800_INT_ENA_1,
  365. .ack_base = PM800_INT_STATUS1,
  366. .mask_invert = 1,
  367. };
  368. static int pm800_pages_init(struct pm80x_chip *chip)
  369. {
  370. struct pm80x_subchip *subchip;
  371. struct i2c_client *client = chip->client;
  372. int ret = 0;
  373. subchip = chip->subchip;
  374. if (!subchip || !subchip->power_page_addr || !subchip->gpadc_page_addr)
  375. return -ENODEV;
  376. /* PM800 block power page */
  377. subchip->power_page = i2c_new_dummy(client->adapter,
  378. subchip->power_page_addr);
  379. if (subchip->power_page == NULL) {
  380. ret = -ENODEV;
  381. goto out;
  382. }
  383. subchip->regmap_power = devm_regmap_init_i2c(subchip->power_page,
  384. &pm80x_regmap_config);
  385. if (IS_ERR(subchip->regmap_power)) {
  386. ret = PTR_ERR(subchip->regmap_power);
  387. dev_err(chip->dev,
  388. "Failed to allocate regmap_power: %d\n", ret);
  389. goto out;
  390. }
  391. i2c_set_clientdata(subchip->power_page, chip);
  392. /* PM800 block GPADC */
  393. subchip->gpadc_page = i2c_new_dummy(client->adapter,
  394. subchip->gpadc_page_addr);
  395. if (subchip->gpadc_page == NULL) {
  396. ret = -ENODEV;
  397. goto out;
  398. }
  399. subchip->regmap_gpadc = devm_regmap_init_i2c(subchip->gpadc_page,
  400. &pm80x_regmap_config);
  401. if (IS_ERR(subchip->regmap_gpadc)) {
  402. ret = PTR_ERR(subchip->regmap_gpadc);
  403. dev_err(chip->dev,
  404. "Failed to allocate regmap_gpadc: %d\n", ret);
  405. goto out;
  406. }
  407. i2c_set_clientdata(subchip->gpadc_page, chip);
  408. out:
  409. return ret;
  410. }
  411. static void pm800_pages_exit(struct pm80x_chip *chip)
  412. {
  413. struct pm80x_subchip *subchip;
  414. subchip = chip->subchip;
  415. if (subchip && subchip->power_page)
  416. i2c_unregister_device(subchip->power_page);
  417. if (subchip && subchip->gpadc_page)
  418. i2c_unregister_device(subchip->gpadc_page);
  419. }
  420. static int device_800_init(struct pm80x_chip *chip,
  421. struct pm80x_platform_data *pdata)
  422. {
  423. int ret;
  424. unsigned int val;
  425. /*
  426. * alarm wake up bit will be clear in device_irq_init(),
  427. * read before that
  428. */
  429. ret = regmap_read(chip->regmap, PM800_RTC_CONTROL, &val);
  430. if (ret < 0) {
  431. dev_err(chip->dev, "Failed to read RTC register: %d\n", ret);
  432. goto out;
  433. }
  434. if (val & PM800_ALARM_WAKEUP) {
  435. if (pdata && pdata->rtc)
  436. pdata->rtc->rtc_wakeup = 1;
  437. }
  438. ret = device_gpadc_init(chip, pdata);
  439. if (ret < 0) {
  440. dev_err(chip->dev, "[%s]Failed to init gpadc\n", __func__);
  441. goto out;
  442. }
  443. chip->regmap_irq_chip = &pm800_irq_chip;
  444. ret = device_irq_init_800(chip);
  445. if (ret < 0) {
  446. dev_err(chip->dev, "[%s]Failed to init pm800 irq\n", __func__);
  447. goto out;
  448. }
  449. ret = device_onkey_init(chip, pdata);
  450. if (ret) {
  451. dev_err(chip->dev, "Failed to add onkey subdev\n");
  452. goto out_dev;
  453. }
  454. ret = device_rtc_init(chip, pdata);
  455. if (ret) {
  456. dev_err(chip->dev, "Failed to add rtc subdev\n");
  457. goto out;
  458. }
  459. ret = device_regulator_init(chip, pdata);
  460. if (ret) {
  461. dev_err(chip->dev, "Failed to add regulators subdev\n");
  462. goto out;
  463. }
  464. return 0;
  465. out_dev:
  466. mfd_remove_devices(chip->dev);
  467. device_irq_exit_800(chip);
  468. out:
  469. return ret;
  470. }
  471. static int pm800_probe(struct i2c_client *client,
  472. const struct i2c_device_id *id)
  473. {
  474. int ret = 0;
  475. struct pm80x_chip *chip;
  476. struct pm80x_platform_data *pdata = dev_get_platdata(&client->dev);
  477. struct pm80x_subchip *subchip;
  478. ret = pm80x_init(client);
  479. if (ret) {
  480. dev_err(&client->dev, "pm800_init fail\n");
  481. goto out_init;
  482. }
  483. chip = i2c_get_clientdata(client);
  484. /* init subchip for PM800 */
  485. subchip =
  486. devm_kzalloc(&client->dev, sizeof(struct pm80x_subchip),
  487. GFP_KERNEL);
  488. if (!subchip) {
  489. ret = -ENOMEM;
  490. goto err_subchip_alloc;
  491. }
  492. /* pm800 has 2 addtional pages to support power and gpadc. */
  493. subchip->power_page_addr = client->addr + 1;
  494. subchip->gpadc_page_addr = client->addr + 2;
  495. chip->subchip = subchip;
  496. ret = pm800_pages_init(chip);
  497. if (ret) {
  498. dev_err(&client->dev, "pm800_pages_init failed!\n");
  499. goto err_page_init;
  500. }
  501. ret = device_800_init(chip, pdata);
  502. if (ret) {
  503. dev_err(chip->dev, "Failed to initialize 88pm800 devices\n");
  504. goto err_device_init;
  505. }
  506. if (pdata->plat_config)
  507. pdata->plat_config(chip, pdata);
  508. return 0;
  509. err_device_init:
  510. pm800_pages_exit(chip);
  511. err_page_init:
  512. err_subchip_alloc:
  513. pm80x_deinit();
  514. out_init:
  515. return ret;
  516. }
  517. static int pm800_remove(struct i2c_client *client)
  518. {
  519. struct pm80x_chip *chip = i2c_get_clientdata(client);
  520. mfd_remove_devices(chip->dev);
  521. device_irq_exit_800(chip);
  522. pm800_pages_exit(chip);
  523. pm80x_deinit();
  524. return 0;
  525. }
  526. static struct i2c_driver pm800_driver = {
  527. .driver = {
  528. .name = "88PM800",
  529. .owner = THIS_MODULE,
  530. .pm = &pm80x_pm_ops,
  531. },
  532. .probe = pm800_probe,
  533. .remove = pm800_remove,
  534. .id_table = pm80x_id_table,
  535. };
  536. static int __init pm800_i2c_init(void)
  537. {
  538. return i2c_add_driver(&pm800_driver);
  539. }
  540. subsys_initcall(pm800_i2c_init);
  541. static void __exit pm800_i2c_exit(void)
  542. {
  543. i2c_del_driver(&pm800_driver);
  544. }
  545. module_exit(pm800_i2c_exit);
  546. MODULE_DESCRIPTION("PMIC Driver for Marvell 88PM800");
  547. MODULE_AUTHOR("Qiao Zhou <zhouqiao@marvell.com>");
  548. MODULE_LICENSE("GPL");