mwl8k.c 108 KB

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  1. /*
  2. * drivers/net/wireless/mwl8k.c
  3. * Driver for Marvell TOPDOG 802.11 Wireless cards
  4. *
  5. * Copyright (C) 2008, 2009, 2010 Marvell Semiconductor Inc.
  6. *
  7. * This file is licensed under the terms of the GNU General Public
  8. * License version 2. This program is licensed "as is" without any
  9. * warranty of any kind, whether express or implied.
  10. */
  11. #include <linux/init.h>
  12. #include <linux/module.h>
  13. #include <linux/kernel.h>
  14. #include <linux/sched.h>
  15. #include <linux/spinlock.h>
  16. #include <linux/list.h>
  17. #include <linux/pci.h>
  18. #include <linux/delay.h>
  19. #include <linux/completion.h>
  20. #include <linux/etherdevice.h>
  21. #include <linux/slab.h>
  22. #include <net/mac80211.h>
  23. #include <linux/moduleparam.h>
  24. #include <linux/firmware.h>
  25. #include <linux/workqueue.h>
  26. #define MWL8K_DESC "Marvell TOPDOG(R) 802.11 Wireless Network Driver"
  27. #define MWL8K_NAME KBUILD_MODNAME
  28. #define MWL8K_VERSION "0.12"
  29. /* Module parameters */
  30. static unsigned ap_mode_default;
  31. module_param(ap_mode_default, bool, 0);
  32. MODULE_PARM_DESC(ap_mode_default,
  33. "Set to 1 to make ap mode the default instead of sta mode");
  34. /* Register definitions */
  35. #define MWL8K_HIU_GEN_PTR 0x00000c10
  36. #define MWL8K_MODE_STA 0x0000005a
  37. #define MWL8K_MODE_AP 0x000000a5
  38. #define MWL8K_HIU_INT_CODE 0x00000c14
  39. #define MWL8K_FWSTA_READY 0xf0f1f2f4
  40. #define MWL8K_FWAP_READY 0xf1f2f4a5
  41. #define MWL8K_INT_CODE_CMD_FINISHED 0x00000005
  42. #define MWL8K_HIU_SCRATCH 0x00000c40
  43. /* Host->device communications */
  44. #define MWL8K_HIU_H2A_INTERRUPT_EVENTS 0x00000c18
  45. #define MWL8K_HIU_H2A_INTERRUPT_STATUS 0x00000c1c
  46. #define MWL8K_HIU_H2A_INTERRUPT_MASK 0x00000c20
  47. #define MWL8K_HIU_H2A_INTERRUPT_CLEAR_SEL 0x00000c24
  48. #define MWL8K_HIU_H2A_INTERRUPT_STATUS_MASK 0x00000c28
  49. #define MWL8K_H2A_INT_DUMMY (1 << 20)
  50. #define MWL8K_H2A_INT_RESET (1 << 15)
  51. #define MWL8K_H2A_INT_DOORBELL (1 << 1)
  52. #define MWL8K_H2A_INT_PPA_READY (1 << 0)
  53. /* Device->host communications */
  54. #define MWL8K_HIU_A2H_INTERRUPT_EVENTS 0x00000c2c
  55. #define MWL8K_HIU_A2H_INTERRUPT_STATUS 0x00000c30
  56. #define MWL8K_HIU_A2H_INTERRUPT_MASK 0x00000c34
  57. #define MWL8K_HIU_A2H_INTERRUPT_CLEAR_SEL 0x00000c38
  58. #define MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK 0x00000c3c
  59. #define MWL8K_A2H_INT_DUMMY (1 << 20)
  60. #define MWL8K_A2H_INT_CHNL_SWITCHED (1 << 11)
  61. #define MWL8K_A2H_INT_QUEUE_EMPTY (1 << 10)
  62. #define MWL8K_A2H_INT_RADAR_DETECT (1 << 7)
  63. #define MWL8K_A2H_INT_RADIO_ON (1 << 6)
  64. #define MWL8K_A2H_INT_RADIO_OFF (1 << 5)
  65. #define MWL8K_A2H_INT_MAC_EVENT (1 << 3)
  66. #define MWL8K_A2H_INT_OPC_DONE (1 << 2)
  67. #define MWL8K_A2H_INT_RX_READY (1 << 1)
  68. #define MWL8K_A2H_INT_TX_DONE (1 << 0)
  69. #define MWL8K_A2H_EVENTS (MWL8K_A2H_INT_DUMMY | \
  70. MWL8K_A2H_INT_CHNL_SWITCHED | \
  71. MWL8K_A2H_INT_QUEUE_EMPTY | \
  72. MWL8K_A2H_INT_RADAR_DETECT | \
  73. MWL8K_A2H_INT_RADIO_ON | \
  74. MWL8K_A2H_INT_RADIO_OFF | \
  75. MWL8K_A2H_INT_MAC_EVENT | \
  76. MWL8K_A2H_INT_OPC_DONE | \
  77. MWL8K_A2H_INT_RX_READY | \
  78. MWL8K_A2H_INT_TX_DONE)
  79. #define MWL8K_RX_QUEUES 1
  80. #define MWL8K_TX_QUEUES 4
  81. struct rxd_ops {
  82. int rxd_size;
  83. void (*rxd_init)(void *rxd, dma_addr_t next_dma_addr);
  84. void (*rxd_refill)(void *rxd, dma_addr_t addr, int len);
  85. int (*rxd_process)(void *rxd, struct ieee80211_rx_status *status,
  86. __le16 *qos, s8 *noise);
  87. };
  88. struct mwl8k_device_info {
  89. char *part_name;
  90. char *helper_image;
  91. char *fw_image_sta;
  92. char *fw_image_ap;
  93. struct rxd_ops *ap_rxd_ops;
  94. u32 fw_api_ap;
  95. };
  96. struct mwl8k_rx_queue {
  97. int rxd_count;
  98. /* hw receives here */
  99. int head;
  100. /* refill descs here */
  101. int tail;
  102. void *rxd;
  103. dma_addr_t rxd_dma;
  104. struct {
  105. struct sk_buff *skb;
  106. DEFINE_DMA_UNMAP_ADDR(dma);
  107. } *buf;
  108. };
  109. struct mwl8k_tx_queue {
  110. /* hw transmits here */
  111. int head;
  112. /* sw appends here */
  113. int tail;
  114. unsigned int len;
  115. struct mwl8k_tx_desc *txd;
  116. dma_addr_t txd_dma;
  117. struct sk_buff **skb;
  118. };
  119. struct mwl8k_priv {
  120. struct ieee80211_hw *hw;
  121. struct pci_dev *pdev;
  122. struct mwl8k_device_info *device_info;
  123. void __iomem *sram;
  124. void __iomem *regs;
  125. /* firmware */
  126. struct firmware *fw_helper;
  127. struct firmware *fw_ucode;
  128. /* hardware/firmware parameters */
  129. bool ap_fw;
  130. struct rxd_ops *rxd_ops;
  131. struct ieee80211_supported_band band_24;
  132. struct ieee80211_channel channels_24[14];
  133. struct ieee80211_rate rates_24[14];
  134. struct ieee80211_supported_band band_50;
  135. struct ieee80211_channel channels_50[4];
  136. struct ieee80211_rate rates_50[9];
  137. u32 ap_macids_supported;
  138. u32 sta_macids_supported;
  139. /* firmware access */
  140. struct mutex fw_mutex;
  141. struct task_struct *fw_mutex_owner;
  142. int fw_mutex_depth;
  143. struct completion *hostcmd_wait;
  144. /* lock held over TX and TX reap */
  145. spinlock_t tx_lock;
  146. /* TX quiesce completion, protected by fw_mutex and tx_lock */
  147. struct completion *tx_wait;
  148. /* List of interfaces. */
  149. u32 macids_used;
  150. struct list_head vif_list;
  151. /* power management status cookie from firmware */
  152. u32 *cookie;
  153. dma_addr_t cookie_dma;
  154. u16 num_mcaddrs;
  155. u8 hw_rev;
  156. u32 fw_rev;
  157. /*
  158. * Running count of TX packets in flight, to avoid
  159. * iterating over the transmit rings each time.
  160. */
  161. int pending_tx_pkts;
  162. struct mwl8k_rx_queue rxq[MWL8K_RX_QUEUES];
  163. struct mwl8k_tx_queue txq[MWL8K_TX_QUEUES];
  164. bool radio_on;
  165. bool radio_short_preamble;
  166. bool sniffer_enabled;
  167. bool wmm_enabled;
  168. /* XXX need to convert this to handle multiple interfaces */
  169. bool capture_beacon;
  170. u8 capture_bssid[ETH_ALEN];
  171. struct sk_buff *beacon_skb;
  172. /*
  173. * This FJ worker has to be global as it is scheduled from the
  174. * RX handler. At this point we don't know which interface it
  175. * belongs to until the list of bssids waiting to complete join
  176. * is checked.
  177. */
  178. struct work_struct finalize_join_worker;
  179. /* Tasklet to perform TX reclaim. */
  180. struct tasklet_struct poll_tx_task;
  181. /* Tasklet to perform RX. */
  182. struct tasklet_struct poll_rx_task;
  183. /* Most recently reported noise in dBm */
  184. s8 noise;
  185. /*
  186. * preserve the queue configurations so they can be restored if/when
  187. * the firmware image is swapped.
  188. */
  189. struct ieee80211_tx_queue_params wmm_params[MWL8K_TX_QUEUES];
  190. /* async firmware loading state */
  191. unsigned fw_state;
  192. char *fw_pref;
  193. char *fw_alt;
  194. struct completion firmware_loading_complete;
  195. };
  196. /* Per interface specific private data */
  197. struct mwl8k_vif {
  198. struct list_head list;
  199. struct ieee80211_vif *vif;
  200. /* Firmware macid for this vif. */
  201. int macid;
  202. /* Non AMPDU sequence number assigned by driver. */
  203. u16 seqno;
  204. };
  205. #define MWL8K_VIF(_vif) ((struct mwl8k_vif *)&((_vif)->drv_priv))
  206. struct mwl8k_sta {
  207. /* Index into station database. Returned by UPDATE_STADB. */
  208. u8 peer_id;
  209. };
  210. #define MWL8K_STA(_sta) ((struct mwl8k_sta *)&((_sta)->drv_priv))
  211. static const struct ieee80211_channel mwl8k_channels_24[] = {
  212. { .center_freq = 2412, .hw_value = 1, },
  213. { .center_freq = 2417, .hw_value = 2, },
  214. { .center_freq = 2422, .hw_value = 3, },
  215. { .center_freq = 2427, .hw_value = 4, },
  216. { .center_freq = 2432, .hw_value = 5, },
  217. { .center_freq = 2437, .hw_value = 6, },
  218. { .center_freq = 2442, .hw_value = 7, },
  219. { .center_freq = 2447, .hw_value = 8, },
  220. { .center_freq = 2452, .hw_value = 9, },
  221. { .center_freq = 2457, .hw_value = 10, },
  222. { .center_freq = 2462, .hw_value = 11, },
  223. { .center_freq = 2467, .hw_value = 12, },
  224. { .center_freq = 2472, .hw_value = 13, },
  225. { .center_freq = 2484, .hw_value = 14, },
  226. };
  227. static const struct ieee80211_rate mwl8k_rates_24[] = {
  228. { .bitrate = 10, .hw_value = 2, },
  229. { .bitrate = 20, .hw_value = 4, },
  230. { .bitrate = 55, .hw_value = 11, },
  231. { .bitrate = 110, .hw_value = 22, },
  232. { .bitrate = 220, .hw_value = 44, },
  233. { .bitrate = 60, .hw_value = 12, },
  234. { .bitrate = 90, .hw_value = 18, },
  235. { .bitrate = 120, .hw_value = 24, },
  236. { .bitrate = 180, .hw_value = 36, },
  237. { .bitrate = 240, .hw_value = 48, },
  238. { .bitrate = 360, .hw_value = 72, },
  239. { .bitrate = 480, .hw_value = 96, },
  240. { .bitrate = 540, .hw_value = 108, },
  241. { .bitrate = 720, .hw_value = 144, },
  242. };
  243. static const struct ieee80211_channel mwl8k_channels_50[] = {
  244. { .center_freq = 5180, .hw_value = 36, },
  245. { .center_freq = 5200, .hw_value = 40, },
  246. { .center_freq = 5220, .hw_value = 44, },
  247. { .center_freq = 5240, .hw_value = 48, },
  248. };
  249. static const struct ieee80211_rate mwl8k_rates_50[] = {
  250. { .bitrate = 60, .hw_value = 12, },
  251. { .bitrate = 90, .hw_value = 18, },
  252. { .bitrate = 120, .hw_value = 24, },
  253. { .bitrate = 180, .hw_value = 36, },
  254. { .bitrate = 240, .hw_value = 48, },
  255. { .bitrate = 360, .hw_value = 72, },
  256. { .bitrate = 480, .hw_value = 96, },
  257. { .bitrate = 540, .hw_value = 108, },
  258. { .bitrate = 720, .hw_value = 144, },
  259. };
  260. /* Set or get info from Firmware */
  261. #define MWL8K_CMD_GET 0x0000
  262. #define MWL8K_CMD_SET 0x0001
  263. #define MWL8K_CMD_SET_LIST 0x0002
  264. /* Firmware command codes */
  265. #define MWL8K_CMD_CODE_DNLD 0x0001
  266. #define MWL8K_CMD_GET_HW_SPEC 0x0003
  267. #define MWL8K_CMD_SET_HW_SPEC 0x0004
  268. #define MWL8K_CMD_MAC_MULTICAST_ADR 0x0010
  269. #define MWL8K_CMD_GET_STAT 0x0014
  270. #define MWL8K_CMD_RADIO_CONTROL 0x001c
  271. #define MWL8K_CMD_RF_TX_POWER 0x001e
  272. #define MWL8K_CMD_TX_POWER 0x001f
  273. #define MWL8K_CMD_RF_ANTENNA 0x0020
  274. #define MWL8K_CMD_SET_BEACON 0x0100 /* per-vif */
  275. #define MWL8K_CMD_SET_PRE_SCAN 0x0107
  276. #define MWL8K_CMD_SET_POST_SCAN 0x0108
  277. #define MWL8K_CMD_SET_RF_CHANNEL 0x010a
  278. #define MWL8K_CMD_SET_AID 0x010d
  279. #define MWL8K_CMD_SET_RATE 0x0110
  280. #define MWL8K_CMD_SET_FINALIZE_JOIN 0x0111
  281. #define MWL8K_CMD_RTS_THRESHOLD 0x0113
  282. #define MWL8K_CMD_SET_SLOT 0x0114
  283. #define MWL8K_CMD_SET_EDCA_PARAMS 0x0115
  284. #define MWL8K_CMD_SET_WMM_MODE 0x0123
  285. #define MWL8K_CMD_MIMO_CONFIG 0x0125
  286. #define MWL8K_CMD_USE_FIXED_RATE 0x0126
  287. #define MWL8K_CMD_ENABLE_SNIFFER 0x0150
  288. #define MWL8K_CMD_SET_MAC_ADDR 0x0202 /* per-vif */
  289. #define MWL8K_CMD_SET_RATEADAPT_MODE 0x0203
  290. #define MWL8K_CMD_BSS_START 0x1100 /* per-vif */
  291. #define MWL8K_CMD_SET_NEW_STN 0x1111 /* per-vif */
  292. #define MWL8K_CMD_UPDATE_STADB 0x1123
  293. static const char *mwl8k_cmd_name(__le16 cmd, char *buf, int bufsize)
  294. {
  295. u16 command = le16_to_cpu(cmd);
  296. #define MWL8K_CMDNAME(x) case MWL8K_CMD_##x: do {\
  297. snprintf(buf, bufsize, "%s", #x);\
  298. return buf;\
  299. } while (0)
  300. switch (command & ~0x8000) {
  301. MWL8K_CMDNAME(CODE_DNLD);
  302. MWL8K_CMDNAME(GET_HW_SPEC);
  303. MWL8K_CMDNAME(SET_HW_SPEC);
  304. MWL8K_CMDNAME(MAC_MULTICAST_ADR);
  305. MWL8K_CMDNAME(GET_STAT);
  306. MWL8K_CMDNAME(RADIO_CONTROL);
  307. MWL8K_CMDNAME(RF_TX_POWER);
  308. MWL8K_CMDNAME(TX_POWER);
  309. MWL8K_CMDNAME(RF_ANTENNA);
  310. MWL8K_CMDNAME(SET_BEACON);
  311. MWL8K_CMDNAME(SET_PRE_SCAN);
  312. MWL8K_CMDNAME(SET_POST_SCAN);
  313. MWL8K_CMDNAME(SET_RF_CHANNEL);
  314. MWL8K_CMDNAME(SET_AID);
  315. MWL8K_CMDNAME(SET_RATE);
  316. MWL8K_CMDNAME(SET_FINALIZE_JOIN);
  317. MWL8K_CMDNAME(RTS_THRESHOLD);
  318. MWL8K_CMDNAME(SET_SLOT);
  319. MWL8K_CMDNAME(SET_EDCA_PARAMS);
  320. MWL8K_CMDNAME(SET_WMM_MODE);
  321. MWL8K_CMDNAME(MIMO_CONFIG);
  322. MWL8K_CMDNAME(USE_FIXED_RATE);
  323. MWL8K_CMDNAME(ENABLE_SNIFFER);
  324. MWL8K_CMDNAME(SET_MAC_ADDR);
  325. MWL8K_CMDNAME(SET_RATEADAPT_MODE);
  326. MWL8K_CMDNAME(BSS_START);
  327. MWL8K_CMDNAME(SET_NEW_STN);
  328. MWL8K_CMDNAME(UPDATE_STADB);
  329. default:
  330. snprintf(buf, bufsize, "0x%x", cmd);
  331. }
  332. #undef MWL8K_CMDNAME
  333. return buf;
  334. }
  335. /* Hardware and firmware reset */
  336. static void mwl8k_hw_reset(struct mwl8k_priv *priv)
  337. {
  338. iowrite32(MWL8K_H2A_INT_RESET,
  339. priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  340. iowrite32(MWL8K_H2A_INT_RESET,
  341. priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  342. msleep(20);
  343. }
  344. /* Release fw image */
  345. static void mwl8k_release_fw(struct firmware **fw)
  346. {
  347. if (*fw == NULL)
  348. return;
  349. release_firmware(*fw);
  350. *fw = NULL;
  351. }
  352. static void mwl8k_release_firmware(struct mwl8k_priv *priv)
  353. {
  354. mwl8k_release_fw(&priv->fw_ucode);
  355. mwl8k_release_fw(&priv->fw_helper);
  356. }
  357. /* states for asynchronous f/w loading */
  358. static void mwl8k_fw_state_machine(const struct firmware *fw, void *context);
  359. enum {
  360. FW_STATE_INIT = 0,
  361. FW_STATE_LOADING_PREF,
  362. FW_STATE_LOADING_ALT,
  363. FW_STATE_ERROR,
  364. };
  365. /* Request fw image */
  366. static int mwl8k_request_fw(struct mwl8k_priv *priv,
  367. const char *fname, struct firmware **fw,
  368. bool nowait)
  369. {
  370. /* release current image */
  371. if (*fw != NULL)
  372. mwl8k_release_fw(fw);
  373. if (nowait)
  374. return request_firmware_nowait(THIS_MODULE, 1, fname,
  375. &priv->pdev->dev, GFP_KERNEL,
  376. priv, mwl8k_fw_state_machine);
  377. else
  378. return request_firmware((const struct firmware **)fw,
  379. fname, &priv->pdev->dev);
  380. }
  381. static int mwl8k_request_firmware(struct mwl8k_priv *priv, char *fw_image,
  382. bool nowait)
  383. {
  384. struct mwl8k_device_info *di = priv->device_info;
  385. int rc;
  386. if (di->helper_image != NULL) {
  387. if (nowait)
  388. rc = mwl8k_request_fw(priv, di->helper_image,
  389. &priv->fw_helper, true);
  390. else
  391. rc = mwl8k_request_fw(priv, di->helper_image,
  392. &priv->fw_helper, false);
  393. if (rc)
  394. printk(KERN_ERR "%s: Error requesting helper fw %s\n",
  395. pci_name(priv->pdev), di->helper_image);
  396. if (rc || nowait)
  397. return rc;
  398. }
  399. if (nowait) {
  400. /*
  401. * if we get here, no helper image is needed. Skip the
  402. * FW_STATE_INIT state.
  403. */
  404. priv->fw_state = FW_STATE_LOADING_PREF;
  405. rc = mwl8k_request_fw(priv, fw_image,
  406. &priv->fw_ucode,
  407. true);
  408. } else
  409. rc = mwl8k_request_fw(priv, fw_image,
  410. &priv->fw_ucode, false);
  411. if (rc) {
  412. printk(KERN_ERR "%s: Error requesting firmware file %s\n",
  413. pci_name(priv->pdev), fw_image);
  414. mwl8k_release_fw(&priv->fw_helper);
  415. return rc;
  416. }
  417. return 0;
  418. }
  419. struct mwl8k_cmd_pkt {
  420. __le16 code;
  421. __le16 length;
  422. __u8 seq_num;
  423. __u8 macid;
  424. __le16 result;
  425. char payload[0];
  426. } __packed;
  427. /*
  428. * Firmware loading.
  429. */
  430. static int
  431. mwl8k_send_fw_load_cmd(struct mwl8k_priv *priv, void *data, int length)
  432. {
  433. void __iomem *regs = priv->regs;
  434. dma_addr_t dma_addr;
  435. int loops;
  436. dma_addr = pci_map_single(priv->pdev, data, length, PCI_DMA_TODEVICE);
  437. if (pci_dma_mapping_error(priv->pdev, dma_addr))
  438. return -ENOMEM;
  439. iowrite32(dma_addr, regs + MWL8K_HIU_GEN_PTR);
  440. iowrite32(0, regs + MWL8K_HIU_INT_CODE);
  441. iowrite32(MWL8K_H2A_INT_DOORBELL,
  442. regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  443. iowrite32(MWL8K_H2A_INT_DUMMY,
  444. regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  445. loops = 1000;
  446. do {
  447. u32 int_code;
  448. int_code = ioread32(regs + MWL8K_HIU_INT_CODE);
  449. if (int_code == MWL8K_INT_CODE_CMD_FINISHED) {
  450. iowrite32(0, regs + MWL8K_HIU_INT_CODE);
  451. break;
  452. }
  453. cond_resched();
  454. udelay(1);
  455. } while (--loops);
  456. pci_unmap_single(priv->pdev, dma_addr, length, PCI_DMA_TODEVICE);
  457. return loops ? 0 : -ETIMEDOUT;
  458. }
  459. static int mwl8k_load_fw_image(struct mwl8k_priv *priv,
  460. const u8 *data, size_t length)
  461. {
  462. struct mwl8k_cmd_pkt *cmd;
  463. int done;
  464. int rc = 0;
  465. cmd = kmalloc(sizeof(*cmd) + 256, GFP_KERNEL);
  466. if (cmd == NULL)
  467. return -ENOMEM;
  468. cmd->code = cpu_to_le16(MWL8K_CMD_CODE_DNLD);
  469. cmd->seq_num = 0;
  470. cmd->macid = 0;
  471. cmd->result = 0;
  472. done = 0;
  473. while (length) {
  474. int block_size = length > 256 ? 256 : length;
  475. memcpy(cmd->payload, data + done, block_size);
  476. cmd->length = cpu_to_le16(block_size);
  477. rc = mwl8k_send_fw_load_cmd(priv, cmd,
  478. sizeof(*cmd) + block_size);
  479. if (rc)
  480. break;
  481. done += block_size;
  482. length -= block_size;
  483. }
  484. if (!rc) {
  485. cmd->length = 0;
  486. rc = mwl8k_send_fw_load_cmd(priv, cmd, sizeof(*cmd));
  487. }
  488. kfree(cmd);
  489. return rc;
  490. }
  491. static int mwl8k_feed_fw_image(struct mwl8k_priv *priv,
  492. const u8 *data, size_t length)
  493. {
  494. unsigned char *buffer;
  495. int may_continue, rc = 0;
  496. u32 done, prev_block_size;
  497. buffer = kmalloc(1024, GFP_KERNEL);
  498. if (buffer == NULL)
  499. return -ENOMEM;
  500. done = 0;
  501. prev_block_size = 0;
  502. may_continue = 1000;
  503. while (may_continue > 0) {
  504. u32 block_size;
  505. block_size = ioread32(priv->regs + MWL8K_HIU_SCRATCH);
  506. if (block_size & 1) {
  507. block_size &= ~1;
  508. may_continue--;
  509. } else {
  510. done += prev_block_size;
  511. length -= prev_block_size;
  512. }
  513. if (block_size > 1024 || block_size > length) {
  514. rc = -EOVERFLOW;
  515. break;
  516. }
  517. if (length == 0) {
  518. rc = 0;
  519. break;
  520. }
  521. if (block_size == 0) {
  522. rc = -EPROTO;
  523. may_continue--;
  524. udelay(1);
  525. continue;
  526. }
  527. prev_block_size = block_size;
  528. memcpy(buffer, data + done, block_size);
  529. rc = mwl8k_send_fw_load_cmd(priv, buffer, block_size);
  530. if (rc)
  531. break;
  532. }
  533. if (!rc && length != 0)
  534. rc = -EREMOTEIO;
  535. kfree(buffer);
  536. return rc;
  537. }
  538. static int mwl8k_load_firmware(struct ieee80211_hw *hw)
  539. {
  540. struct mwl8k_priv *priv = hw->priv;
  541. struct firmware *fw = priv->fw_ucode;
  542. int rc;
  543. int loops;
  544. if (!memcmp(fw->data, "\x01\x00\x00\x00", 4)) {
  545. struct firmware *helper = priv->fw_helper;
  546. if (helper == NULL) {
  547. printk(KERN_ERR "%s: helper image needed but none "
  548. "given\n", pci_name(priv->pdev));
  549. return -EINVAL;
  550. }
  551. rc = mwl8k_load_fw_image(priv, helper->data, helper->size);
  552. if (rc) {
  553. printk(KERN_ERR "%s: unable to load firmware "
  554. "helper image\n", pci_name(priv->pdev));
  555. return rc;
  556. }
  557. msleep(5);
  558. rc = mwl8k_feed_fw_image(priv, fw->data, fw->size);
  559. } else {
  560. rc = mwl8k_load_fw_image(priv, fw->data, fw->size);
  561. }
  562. if (rc) {
  563. printk(KERN_ERR "%s: unable to load firmware image\n",
  564. pci_name(priv->pdev));
  565. return rc;
  566. }
  567. iowrite32(MWL8K_MODE_STA, priv->regs + MWL8K_HIU_GEN_PTR);
  568. loops = 500000;
  569. do {
  570. u32 ready_code;
  571. ready_code = ioread32(priv->regs + MWL8K_HIU_INT_CODE);
  572. if (ready_code == MWL8K_FWAP_READY) {
  573. priv->ap_fw = 1;
  574. break;
  575. } else if (ready_code == MWL8K_FWSTA_READY) {
  576. priv->ap_fw = 0;
  577. break;
  578. }
  579. cond_resched();
  580. udelay(1);
  581. } while (--loops);
  582. return loops ? 0 : -ETIMEDOUT;
  583. }
  584. /* DMA header used by firmware and hardware. */
  585. struct mwl8k_dma_data {
  586. __le16 fwlen;
  587. struct ieee80211_hdr wh;
  588. char data[0];
  589. } __packed;
  590. /* Routines to add/remove DMA header from skb. */
  591. static inline void mwl8k_remove_dma_header(struct sk_buff *skb, __le16 qos)
  592. {
  593. struct mwl8k_dma_data *tr;
  594. int hdrlen;
  595. tr = (struct mwl8k_dma_data *)skb->data;
  596. hdrlen = ieee80211_hdrlen(tr->wh.frame_control);
  597. if (hdrlen != sizeof(tr->wh)) {
  598. if (ieee80211_is_data_qos(tr->wh.frame_control)) {
  599. memmove(tr->data - hdrlen, &tr->wh, hdrlen - 2);
  600. *((__le16 *)(tr->data - 2)) = qos;
  601. } else {
  602. memmove(tr->data - hdrlen, &tr->wh, hdrlen);
  603. }
  604. }
  605. if (hdrlen != sizeof(*tr))
  606. skb_pull(skb, sizeof(*tr) - hdrlen);
  607. }
  608. static inline void mwl8k_add_dma_header(struct sk_buff *skb)
  609. {
  610. struct ieee80211_hdr *wh;
  611. int hdrlen;
  612. struct mwl8k_dma_data *tr;
  613. /*
  614. * Add a firmware DMA header; the firmware requires that we
  615. * present a 2-byte payload length followed by a 4-address
  616. * header (without QoS field), followed (optionally) by any
  617. * WEP/ExtIV header (but only filled in for CCMP).
  618. */
  619. wh = (struct ieee80211_hdr *)skb->data;
  620. hdrlen = ieee80211_hdrlen(wh->frame_control);
  621. if (hdrlen != sizeof(*tr))
  622. skb_push(skb, sizeof(*tr) - hdrlen);
  623. if (ieee80211_is_data_qos(wh->frame_control))
  624. hdrlen -= 2;
  625. tr = (struct mwl8k_dma_data *)skb->data;
  626. if (wh != &tr->wh)
  627. memmove(&tr->wh, wh, hdrlen);
  628. if (hdrlen != sizeof(tr->wh))
  629. memset(((void *)&tr->wh) + hdrlen, 0, sizeof(tr->wh) - hdrlen);
  630. /*
  631. * Firmware length is the length of the fully formed "802.11
  632. * payload". That is, everything except for the 802.11 header.
  633. * This includes all crypto material including the MIC.
  634. */
  635. tr->fwlen = cpu_to_le16(skb->len - sizeof(*tr));
  636. }
  637. /*
  638. * Packet reception for 88w8366 AP firmware.
  639. */
  640. struct mwl8k_rxd_8366_ap {
  641. __le16 pkt_len;
  642. __u8 sq2;
  643. __u8 rate;
  644. __le32 pkt_phys_addr;
  645. __le32 next_rxd_phys_addr;
  646. __le16 qos_control;
  647. __le16 htsig2;
  648. __le32 hw_rssi_info;
  649. __le32 hw_noise_floor_info;
  650. __u8 noise_floor;
  651. __u8 pad0[3];
  652. __u8 rssi;
  653. __u8 rx_status;
  654. __u8 channel;
  655. __u8 rx_ctrl;
  656. } __packed;
  657. #define MWL8K_8366_AP_RATE_INFO_MCS_FORMAT 0x80
  658. #define MWL8K_8366_AP_RATE_INFO_40MHZ 0x40
  659. #define MWL8K_8366_AP_RATE_INFO_RATEID(x) ((x) & 0x3f)
  660. #define MWL8K_8366_AP_RX_CTRL_OWNED_BY_HOST 0x80
  661. static void mwl8k_rxd_8366_ap_init(void *_rxd, dma_addr_t next_dma_addr)
  662. {
  663. struct mwl8k_rxd_8366_ap *rxd = _rxd;
  664. rxd->next_rxd_phys_addr = cpu_to_le32(next_dma_addr);
  665. rxd->rx_ctrl = MWL8K_8366_AP_RX_CTRL_OWNED_BY_HOST;
  666. }
  667. static void mwl8k_rxd_8366_ap_refill(void *_rxd, dma_addr_t addr, int len)
  668. {
  669. struct mwl8k_rxd_8366_ap *rxd = _rxd;
  670. rxd->pkt_len = cpu_to_le16(len);
  671. rxd->pkt_phys_addr = cpu_to_le32(addr);
  672. wmb();
  673. rxd->rx_ctrl = 0;
  674. }
  675. static int
  676. mwl8k_rxd_8366_ap_process(void *_rxd, struct ieee80211_rx_status *status,
  677. __le16 *qos, s8 *noise)
  678. {
  679. struct mwl8k_rxd_8366_ap *rxd = _rxd;
  680. if (!(rxd->rx_ctrl & MWL8K_8366_AP_RX_CTRL_OWNED_BY_HOST))
  681. return -1;
  682. rmb();
  683. memset(status, 0, sizeof(*status));
  684. status->signal = -rxd->rssi;
  685. *noise = -rxd->noise_floor;
  686. if (rxd->rate & MWL8K_8366_AP_RATE_INFO_MCS_FORMAT) {
  687. status->flag |= RX_FLAG_HT;
  688. if (rxd->rate & MWL8K_8366_AP_RATE_INFO_40MHZ)
  689. status->flag |= RX_FLAG_40MHZ;
  690. status->rate_idx = MWL8K_8366_AP_RATE_INFO_RATEID(rxd->rate);
  691. } else {
  692. int i;
  693. for (i = 0; i < ARRAY_SIZE(mwl8k_rates_24); i++) {
  694. if (mwl8k_rates_24[i].hw_value == rxd->rate) {
  695. status->rate_idx = i;
  696. break;
  697. }
  698. }
  699. }
  700. if (rxd->channel > 14) {
  701. status->band = IEEE80211_BAND_5GHZ;
  702. if (!(status->flag & RX_FLAG_HT))
  703. status->rate_idx -= 5;
  704. } else {
  705. status->band = IEEE80211_BAND_2GHZ;
  706. }
  707. status->freq = ieee80211_channel_to_frequency(rxd->channel);
  708. *qos = rxd->qos_control;
  709. return le16_to_cpu(rxd->pkt_len);
  710. }
  711. static struct rxd_ops rxd_8366_ap_ops = {
  712. .rxd_size = sizeof(struct mwl8k_rxd_8366_ap),
  713. .rxd_init = mwl8k_rxd_8366_ap_init,
  714. .rxd_refill = mwl8k_rxd_8366_ap_refill,
  715. .rxd_process = mwl8k_rxd_8366_ap_process,
  716. };
  717. /*
  718. * Packet reception for STA firmware.
  719. */
  720. struct mwl8k_rxd_sta {
  721. __le16 pkt_len;
  722. __u8 link_quality;
  723. __u8 noise_level;
  724. __le32 pkt_phys_addr;
  725. __le32 next_rxd_phys_addr;
  726. __le16 qos_control;
  727. __le16 rate_info;
  728. __le32 pad0[4];
  729. __u8 rssi;
  730. __u8 channel;
  731. __le16 pad1;
  732. __u8 rx_ctrl;
  733. __u8 rx_status;
  734. __u8 pad2[2];
  735. } __packed;
  736. #define MWL8K_STA_RATE_INFO_SHORTPRE 0x8000
  737. #define MWL8K_STA_RATE_INFO_ANTSELECT(x) (((x) >> 11) & 0x3)
  738. #define MWL8K_STA_RATE_INFO_RATEID(x) (((x) >> 3) & 0x3f)
  739. #define MWL8K_STA_RATE_INFO_40MHZ 0x0004
  740. #define MWL8K_STA_RATE_INFO_SHORTGI 0x0002
  741. #define MWL8K_STA_RATE_INFO_MCS_FORMAT 0x0001
  742. #define MWL8K_STA_RX_CTRL_OWNED_BY_HOST 0x02
  743. static void mwl8k_rxd_sta_init(void *_rxd, dma_addr_t next_dma_addr)
  744. {
  745. struct mwl8k_rxd_sta *rxd = _rxd;
  746. rxd->next_rxd_phys_addr = cpu_to_le32(next_dma_addr);
  747. rxd->rx_ctrl = MWL8K_STA_RX_CTRL_OWNED_BY_HOST;
  748. }
  749. static void mwl8k_rxd_sta_refill(void *_rxd, dma_addr_t addr, int len)
  750. {
  751. struct mwl8k_rxd_sta *rxd = _rxd;
  752. rxd->pkt_len = cpu_to_le16(len);
  753. rxd->pkt_phys_addr = cpu_to_le32(addr);
  754. wmb();
  755. rxd->rx_ctrl = 0;
  756. }
  757. static int
  758. mwl8k_rxd_sta_process(void *_rxd, struct ieee80211_rx_status *status,
  759. __le16 *qos, s8 *noise)
  760. {
  761. struct mwl8k_rxd_sta *rxd = _rxd;
  762. u16 rate_info;
  763. if (!(rxd->rx_ctrl & MWL8K_STA_RX_CTRL_OWNED_BY_HOST))
  764. return -1;
  765. rmb();
  766. rate_info = le16_to_cpu(rxd->rate_info);
  767. memset(status, 0, sizeof(*status));
  768. status->signal = -rxd->rssi;
  769. *noise = -rxd->noise_level;
  770. status->antenna = MWL8K_STA_RATE_INFO_ANTSELECT(rate_info);
  771. status->rate_idx = MWL8K_STA_RATE_INFO_RATEID(rate_info);
  772. if (rate_info & MWL8K_STA_RATE_INFO_SHORTPRE)
  773. status->flag |= RX_FLAG_SHORTPRE;
  774. if (rate_info & MWL8K_STA_RATE_INFO_40MHZ)
  775. status->flag |= RX_FLAG_40MHZ;
  776. if (rate_info & MWL8K_STA_RATE_INFO_SHORTGI)
  777. status->flag |= RX_FLAG_SHORT_GI;
  778. if (rate_info & MWL8K_STA_RATE_INFO_MCS_FORMAT)
  779. status->flag |= RX_FLAG_HT;
  780. if (rxd->channel > 14) {
  781. status->band = IEEE80211_BAND_5GHZ;
  782. if (!(status->flag & RX_FLAG_HT))
  783. status->rate_idx -= 5;
  784. } else {
  785. status->band = IEEE80211_BAND_2GHZ;
  786. }
  787. status->freq = ieee80211_channel_to_frequency(rxd->channel);
  788. *qos = rxd->qos_control;
  789. return le16_to_cpu(rxd->pkt_len);
  790. }
  791. static struct rxd_ops rxd_sta_ops = {
  792. .rxd_size = sizeof(struct mwl8k_rxd_sta),
  793. .rxd_init = mwl8k_rxd_sta_init,
  794. .rxd_refill = mwl8k_rxd_sta_refill,
  795. .rxd_process = mwl8k_rxd_sta_process,
  796. };
  797. #define MWL8K_RX_DESCS 256
  798. #define MWL8K_RX_MAXSZ 3800
  799. static int mwl8k_rxq_init(struct ieee80211_hw *hw, int index)
  800. {
  801. struct mwl8k_priv *priv = hw->priv;
  802. struct mwl8k_rx_queue *rxq = priv->rxq + index;
  803. int size;
  804. int i;
  805. rxq->rxd_count = 0;
  806. rxq->head = 0;
  807. rxq->tail = 0;
  808. size = MWL8K_RX_DESCS * priv->rxd_ops->rxd_size;
  809. rxq->rxd = pci_alloc_consistent(priv->pdev, size, &rxq->rxd_dma);
  810. if (rxq->rxd == NULL) {
  811. wiphy_err(hw->wiphy, "failed to alloc RX descriptors\n");
  812. return -ENOMEM;
  813. }
  814. memset(rxq->rxd, 0, size);
  815. rxq->buf = kmalloc(MWL8K_RX_DESCS * sizeof(*rxq->buf), GFP_KERNEL);
  816. if (rxq->buf == NULL) {
  817. wiphy_err(hw->wiphy, "failed to alloc RX skbuff list\n");
  818. pci_free_consistent(priv->pdev, size, rxq->rxd, rxq->rxd_dma);
  819. return -ENOMEM;
  820. }
  821. memset(rxq->buf, 0, MWL8K_RX_DESCS * sizeof(*rxq->buf));
  822. for (i = 0; i < MWL8K_RX_DESCS; i++) {
  823. int desc_size;
  824. void *rxd;
  825. int nexti;
  826. dma_addr_t next_dma_addr;
  827. desc_size = priv->rxd_ops->rxd_size;
  828. rxd = rxq->rxd + (i * priv->rxd_ops->rxd_size);
  829. nexti = i + 1;
  830. if (nexti == MWL8K_RX_DESCS)
  831. nexti = 0;
  832. next_dma_addr = rxq->rxd_dma + (nexti * desc_size);
  833. priv->rxd_ops->rxd_init(rxd, next_dma_addr);
  834. }
  835. return 0;
  836. }
  837. static int rxq_refill(struct ieee80211_hw *hw, int index, int limit)
  838. {
  839. struct mwl8k_priv *priv = hw->priv;
  840. struct mwl8k_rx_queue *rxq = priv->rxq + index;
  841. int refilled;
  842. refilled = 0;
  843. while (rxq->rxd_count < MWL8K_RX_DESCS && limit--) {
  844. struct sk_buff *skb;
  845. dma_addr_t addr;
  846. int rx;
  847. void *rxd;
  848. skb = dev_alloc_skb(MWL8K_RX_MAXSZ);
  849. if (skb == NULL)
  850. break;
  851. addr = pci_map_single(priv->pdev, skb->data,
  852. MWL8K_RX_MAXSZ, DMA_FROM_DEVICE);
  853. rxq->rxd_count++;
  854. rx = rxq->tail++;
  855. if (rxq->tail == MWL8K_RX_DESCS)
  856. rxq->tail = 0;
  857. rxq->buf[rx].skb = skb;
  858. dma_unmap_addr_set(&rxq->buf[rx], dma, addr);
  859. rxd = rxq->rxd + (rx * priv->rxd_ops->rxd_size);
  860. priv->rxd_ops->rxd_refill(rxd, addr, MWL8K_RX_MAXSZ);
  861. refilled++;
  862. }
  863. return refilled;
  864. }
  865. /* Must be called only when the card's reception is completely halted */
  866. static void mwl8k_rxq_deinit(struct ieee80211_hw *hw, int index)
  867. {
  868. struct mwl8k_priv *priv = hw->priv;
  869. struct mwl8k_rx_queue *rxq = priv->rxq + index;
  870. int i;
  871. for (i = 0; i < MWL8K_RX_DESCS; i++) {
  872. if (rxq->buf[i].skb != NULL) {
  873. pci_unmap_single(priv->pdev,
  874. dma_unmap_addr(&rxq->buf[i], dma),
  875. MWL8K_RX_MAXSZ, PCI_DMA_FROMDEVICE);
  876. dma_unmap_addr_set(&rxq->buf[i], dma, 0);
  877. kfree_skb(rxq->buf[i].skb);
  878. rxq->buf[i].skb = NULL;
  879. }
  880. }
  881. kfree(rxq->buf);
  882. rxq->buf = NULL;
  883. pci_free_consistent(priv->pdev,
  884. MWL8K_RX_DESCS * priv->rxd_ops->rxd_size,
  885. rxq->rxd, rxq->rxd_dma);
  886. rxq->rxd = NULL;
  887. }
  888. /*
  889. * Scan a list of BSSIDs to process for finalize join.
  890. * Allows for extension to process multiple BSSIDs.
  891. */
  892. static inline int
  893. mwl8k_capture_bssid(struct mwl8k_priv *priv, struct ieee80211_hdr *wh)
  894. {
  895. return priv->capture_beacon &&
  896. ieee80211_is_beacon(wh->frame_control) &&
  897. !compare_ether_addr(wh->addr3, priv->capture_bssid);
  898. }
  899. static inline void mwl8k_save_beacon(struct ieee80211_hw *hw,
  900. struct sk_buff *skb)
  901. {
  902. struct mwl8k_priv *priv = hw->priv;
  903. priv->capture_beacon = false;
  904. memset(priv->capture_bssid, 0, ETH_ALEN);
  905. /*
  906. * Use GFP_ATOMIC as rxq_process is called from
  907. * the primary interrupt handler, memory allocation call
  908. * must not sleep.
  909. */
  910. priv->beacon_skb = skb_copy(skb, GFP_ATOMIC);
  911. if (priv->beacon_skb != NULL)
  912. ieee80211_queue_work(hw, &priv->finalize_join_worker);
  913. }
  914. static int rxq_process(struct ieee80211_hw *hw, int index, int limit)
  915. {
  916. struct mwl8k_priv *priv = hw->priv;
  917. struct mwl8k_rx_queue *rxq = priv->rxq + index;
  918. int processed;
  919. processed = 0;
  920. while (rxq->rxd_count && limit--) {
  921. struct sk_buff *skb;
  922. void *rxd;
  923. int pkt_len;
  924. struct ieee80211_rx_status status;
  925. __le16 qos;
  926. skb = rxq->buf[rxq->head].skb;
  927. if (skb == NULL)
  928. break;
  929. rxd = rxq->rxd + (rxq->head * priv->rxd_ops->rxd_size);
  930. pkt_len = priv->rxd_ops->rxd_process(rxd, &status, &qos,
  931. &priv->noise);
  932. if (pkt_len < 0)
  933. break;
  934. rxq->buf[rxq->head].skb = NULL;
  935. pci_unmap_single(priv->pdev,
  936. dma_unmap_addr(&rxq->buf[rxq->head], dma),
  937. MWL8K_RX_MAXSZ, PCI_DMA_FROMDEVICE);
  938. dma_unmap_addr_set(&rxq->buf[rxq->head], dma, 0);
  939. rxq->head++;
  940. if (rxq->head == MWL8K_RX_DESCS)
  941. rxq->head = 0;
  942. rxq->rxd_count--;
  943. skb_put(skb, pkt_len);
  944. mwl8k_remove_dma_header(skb, qos);
  945. /*
  946. * Check for a pending join operation. Save a
  947. * copy of the beacon and schedule a tasklet to
  948. * send a FINALIZE_JOIN command to the firmware.
  949. */
  950. if (mwl8k_capture_bssid(priv, (void *)skb->data))
  951. mwl8k_save_beacon(hw, skb);
  952. memcpy(IEEE80211_SKB_RXCB(skb), &status, sizeof(status));
  953. ieee80211_rx_irqsafe(hw, skb);
  954. processed++;
  955. }
  956. return processed;
  957. }
  958. /*
  959. * Packet transmission.
  960. */
  961. #define MWL8K_TXD_STATUS_OK 0x00000001
  962. #define MWL8K_TXD_STATUS_OK_RETRY 0x00000002
  963. #define MWL8K_TXD_STATUS_OK_MORE_RETRY 0x00000004
  964. #define MWL8K_TXD_STATUS_MULTICAST_TX 0x00000008
  965. #define MWL8K_TXD_STATUS_FW_OWNED 0x80000000
  966. #define MWL8K_QOS_QLEN_UNSPEC 0xff00
  967. #define MWL8K_QOS_ACK_POLICY_MASK 0x0060
  968. #define MWL8K_QOS_ACK_POLICY_NORMAL 0x0000
  969. #define MWL8K_QOS_ACK_POLICY_BLOCKACK 0x0060
  970. #define MWL8K_QOS_EOSP 0x0010
  971. struct mwl8k_tx_desc {
  972. __le32 status;
  973. __u8 data_rate;
  974. __u8 tx_priority;
  975. __le16 qos_control;
  976. __le32 pkt_phys_addr;
  977. __le16 pkt_len;
  978. __u8 dest_MAC_addr[ETH_ALEN];
  979. __le32 next_txd_phys_addr;
  980. __le32 reserved;
  981. __le16 rate_info;
  982. __u8 peer_id;
  983. __u8 tx_frag_cnt;
  984. } __packed;
  985. #define MWL8K_TX_DESCS 128
  986. static int mwl8k_txq_init(struct ieee80211_hw *hw, int index)
  987. {
  988. struct mwl8k_priv *priv = hw->priv;
  989. struct mwl8k_tx_queue *txq = priv->txq + index;
  990. int size;
  991. int i;
  992. txq->len = 0;
  993. txq->head = 0;
  994. txq->tail = 0;
  995. size = MWL8K_TX_DESCS * sizeof(struct mwl8k_tx_desc);
  996. txq->txd = pci_alloc_consistent(priv->pdev, size, &txq->txd_dma);
  997. if (txq->txd == NULL) {
  998. wiphy_err(hw->wiphy, "failed to alloc TX descriptors\n");
  999. return -ENOMEM;
  1000. }
  1001. memset(txq->txd, 0, size);
  1002. txq->skb = kmalloc(MWL8K_TX_DESCS * sizeof(*txq->skb), GFP_KERNEL);
  1003. if (txq->skb == NULL) {
  1004. wiphy_err(hw->wiphy, "failed to alloc TX skbuff list\n");
  1005. pci_free_consistent(priv->pdev, size, txq->txd, txq->txd_dma);
  1006. return -ENOMEM;
  1007. }
  1008. memset(txq->skb, 0, MWL8K_TX_DESCS * sizeof(*txq->skb));
  1009. for (i = 0; i < MWL8K_TX_DESCS; i++) {
  1010. struct mwl8k_tx_desc *tx_desc;
  1011. int nexti;
  1012. tx_desc = txq->txd + i;
  1013. nexti = (i + 1) % MWL8K_TX_DESCS;
  1014. tx_desc->status = 0;
  1015. tx_desc->next_txd_phys_addr =
  1016. cpu_to_le32(txq->txd_dma + nexti * sizeof(*tx_desc));
  1017. }
  1018. return 0;
  1019. }
  1020. static inline void mwl8k_tx_start(struct mwl8k_priv *priv)
  1021. {
  1022. iowrite32(MWL8K_H2A_INT_PPA_READY,
  1023. priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  1024. iowrite32(MWL8K_H2A_INT_DUMMY,
  1025. priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  1026. ioread32(priv->regs + MWL8K_HIU_INT_CODE);
  1027. }
  1028. static void mwl8k_dump_tx_rings(struct ieee80211_hw *hw)
  1029. {
  1030. struct mwl8k_priv *priv = hw->priv;
  1031. int i;
  1032. for (i = 0; i < MWL8K_TX_QUEUES; i++) {
  1033. struct mwl8k_tx_queue *txq = priv->txq + i;
  1034. int fw_owned = 0;
  1035. int drv_owned = 0;
  1036. int unused = 0;
  1037. int desc;
  1038. for (desc = 0; desc < MWL8K_TX_DESCS; desc++) {
  1039. struct mwl8k_tx_desc *tx_desc = txq->txd + desc;
  1040. u32 status;
  1041. status = le32_to_cpu(tx_desc->status);
  1042. if (status & MWL8K_TXD_STATUS_FW_OWNED)
  1043. fw_owned++;
  1044. else
  1045. drv_owned++;
  1046. if (tx_desc->pkt_len == 0)
  1047. unused++;
  1048. }
  1049. wiphy_err(hw->wiphy,
  1050. "txq[%d] len=%d head=%d tail=%d "
  1051. "fw_owned=%d drv_owned=%d unused=%d\n",
  1052. i,
  1053. txq->len, txq->head, txq->tail,
  1054. fw_owned, drv_owned, unused);
  1055. }
  1056. }
  1057. /*
  1058. * Must be called with priv->fw_mutex held and tx queues stopped.
  1059. */
  1060. #define MWL8K_TX_WAIT_TIMEOUT_MS 5000
  1061. static int mwl8k_tx_wait_empty(struct ieee80211_hw *hw)
  1062. {
  1063. struct mwl8k_priv *priv = hw->priv;
  1064. DECLARE_COMPLETION_ONSTACK(tx_wait);
  1065. int retry;
  1066. int rc;
  1067. might_sleep();
  1068. /*
  1069. * The TX queues are stopped at this point, so this test
  1070. * doesn't need to take ->tx_lock.
  1071. */
  1072. if (!priv->pending_tx_pkts)
  1073. return 0;
  1074. retry = 0;
  1075. rc = 0;
  1076. spin_lock_bh(&priv->tx_lock);
  1077. priv->tx_wait = &tx_wait;
  1078. while (!rc) {
  1079. int oldcount;
  1080. unsigned long timeout;
  1081. oldcount = priv->pending_tx_pkts;
  1082. spin_unlock_bh(&priv->tx_lock);
  1083. timeout = wait_for_completion_timeout(&tx_wait,
  1084. msecs_to_jiffies(MWL8K_TX_WAIT_TIMEOUT_MS));
  1085. spin_lock_bh(&priv->tx_lock);
  1086. if (timeout) {
  1087. WARN_ON(priv->pending_tx_pkts);
  1088. if (retry) {
  1089. wiphy_notice(hw->wiphy, "tx rings drained\n");
  1090. }
  1091. break;
  1092. }
  1093. if (priv->pending_tx_pkts < oldcount) {
  1094. wiphy_notice(hw->wiphy,
  1095. "waiting for tx rings to drain (%d -> %d pkts)\n",
  1096. oldcount, priv->pending_tx_pkts);
  1097. retry = 1;
  1098. continue;
  1099. }
  1100. priv->tx_wait = NULL;
  1101. wiphy_err(hw->wiphy, "tx rings stuck for %d ms\n",
  1102. MWL8K_TX_WAIT_TIMEOUT_MS);
  1103. mwl8k_dump_tx_rings(hw);
  1104. rc = -ETIMEDOUT;
  1105. }
  1106. spin_unlock_bh(&priv->tx_lock);
  1107. return rc;
  1108. }
  1109. #define MWL8K_TXD_SUCCESS(status) \
  1110. ((status) & (MWL8K_TXD_STATUS_OK | \
  1111. MWL8K_TXD_STATUS_OK_RETRY | \
  1112. MWL8K_TXD_STATUS_OK_MORE_RETRY))
  1113. static int
  1114. mwl8k_txq_reclaim(struct ieee80211_hw *hw, int index, int limit, int force)
  1115. {
  1116. struct mwl8k_priv *priv = hw->priv;
  1117. struct mwl8k_tx_queue *txq = priv->txq + index;
  1118. int processed;
  1119. processed = 0;
  1120. while (txq->len > 0 && limit--) {
  1121. int tx;
  1122. struct mwl8k_tx_desc *tx_desc;
  1123. unsigned long addr;
  1124. int size;
  1125. struct sk_buff *skb;
  1126. struct ieee80211_tx_info *info;
  1127. u32 status;
  1128. tx = txq->head;
  1129. tx_desc = txq->txd + tx;
  1130. status = le32_to_cpu(tx_desc->status);
  1131. if (status & MWL8K_TXD_STATUS_FW_OWNED) {
  1132. if (!force)
  1133. break;
  1134. tx_desc->status &=
  1135. ~cpu_to_le32(MWL8K_TXD_STATUS_FW_OWNED);
  1136. }
  1137. txq->head = (tx + 1) % MWL8K_TX_DESCS;
  1138. BUG_ON(txq->len == 0);
  1139. txq->len--;
  1140. priv->pending_tx_pkts--;
  1141. addr = le32_to_cpu(tx_desc->pkt_phys_addr);
  1142. size = le16_to_cpu(tx_desc->pkt_len);
  1143. skb = txq->skb[tx];
  1144. txq->skb[tx] = NULL;
  1145. BUG_ON(skb == NULL);
  1146. pci_unmap_single(priv->pdev, addr, size, PCI_DMA_TODEVICE);
  1147. mwl8k_remove_dma_header(skb, tx_desc->qos_control);
  1148. /* Mark descriptor as unused */
  1149. tx_desc->pkt_phys_addr = 0;
  1150. tx_desc->pkt_len = 0;
  1151. info = IEEE80211_SKB_CB(skb);
  1152. ieee80211_tx_info_clear_status(info);
  1153. if (MWL8K_TXD_SUCCESS(status))
  1154. info->flags |= IEEE80211_TX_STAT_ACK;
  1155. ieee80211_tx_status_irqsafe(hw, skb);
  1156. processed++;
  1157. }
  1158. if (processed && priv->radio_on && !mutex_is_locked(&priv->fw_mutex))
  1159. ieee80211_wake_queue(hw, index);
  1160. return processed;
  1161. }
  1162. /* must be called only when the card's transmit is completely halted */
  1163. static void mwl8k_txq_deinit(struct ieee80211_hw *hw, int index)
  1164. {
  1165. struct mwl8k_priv *priv = hw->priv;
  1166. struct mwl8k_tx_queue *txq = priv->txq + index;
  1167. mwl8k_txq_reclaim(hw, index, INT_MAX, 1);
  1168. kfree(txq->skb);
  1169. txq->skb = NULL;
  1170. pci_free_consistent(priv->pdev,
  1171. MWL8K_TX_DESCS * sizeof(struct mwl8k_tx_desc),
  1172. txq->txd, txq->txd_dma);
  1173. txq->txd = NULL;
  1174. }
  1175. static int
  1176. mwl8k_txq_xmit(struct ieee80211_hw *hw, int index, struct sk_buff *skb)
  1177. {
  1178. struct mwl8k_priv *priv = hw->priv;
  1179. struct ieee80211_tx_info *tx_info;
  1180. struct mwl8k_vif *mwl8k_vif;
  1181. struct ieee80211_hdr *wh;
  1182. struct mwl8k_tx_queue *txq;
  1183. struct mwl8k_tx_desc *tx;
  1184. dma_addr_t dma;
  1185. u32 txstatus;
  1186. u8 txdatarate;
  1187. u16 qos;
  1188. wh = (struct ieee80211_hdr *)skb->data;
  1189. if (ieee80211_is_data_qos(wh->frame_control))
  1190. qos = le16_to_cpu(*((__le16 *)ieee80211_get_qos_ctl(wh)));
  1191. else
  1192. qos = 0;
  1193. mwl8k_add_dma_header(skb);
  1194. wh = &((struct mwl8k_dma_data *)skb->data)->wh;
  1195. tx_info = IEEE80211_SKB_CB(skb);
  1196. mwl8k_vif = MWL8K_VIF(tx_info->control.vif);
  1197. if (tx_info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
  1198. wh->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
  1199. wh->seq_ctrl |= cpu_to_le16(mwl8k_vif->seqno);
  1200. mwl8k_vif->seqno += 0x10;
  1201. }
  1202. /* Setup firmware control bit fields for each frame type. */
  1203. txstatus = 0;
  1204. txdatarate = 0;
  1205. if (ieee80211_is_mgmt(wh->frame_control) ||
  1206. ieee80211_is_ctl(wh->frame_control)) {
  1207. txdatarate = 0;
  1208. qos |= MWL8K_QOS_QLEN_UNSPEC | MWL8K_QOS_EOSP;
  1209. } else if (ieee80211_is_data(wh->frame_control)) {
  1210. txdatarate = 1;
  1211. if (is_multicast_ether_addr(wh->addr1))
  1212. txstatus |= MWL8K_TXD_STATUS_MULTICAST_TX;
  1213. qos &= ~MWL8K_QOS_ACK_POLICY_MASK;
  1214. if (tx_info->flags & IEEE80211_TX_CTL_AMPDU)
  1215. qos |= MWL8K_QOS_ACK_POLICY_BLOCKACK;
  1216. else
  1217. qos |= MWL8K_QOS_ACK_POLICY_NORMAL;
  1218. }
  1219. dma = pci_map_single(priv->pdev, skb->data,
  1220. skb->len, PCI_DMA_TODEVICE);
  1221. if (pci_dma_mapping_error(priv->pdev, dma)) {
  1222. wiphy_debug(hw->wiphy,
  1223. "failed to dma map skb, dropping TX frame.\n");
  1224. dev_kfree_skb(skb);
  1225. return NETDEV_TX_OK;
  1226. }
  1227. spin_lock_bh(&priv->tx_lock);
  1228. txq = priv->txq + index;
  1229. BUG_ON(txq->skb[txq->tail] != NULL);
  1230. txq->skb[txq->tail] = skb;
  1231. tx = txq->txd + txq->tail;
  1232. tx->data_rate = txdatarate;
  1233. tx->tx_priority = index;
  1234. tx->qos_control = cpu_to_le16(qos);
  1235. tx->pkt_phys_addr = cpu_to_le32(dma);
  1236. tx->pkt_len = cpu_to_le16(skb->len);
  1237. tx->rate_info = 0;
  1238. if (!priv->ap_fw && tx_info->control.sta != NULL)
  1239. tx->peer_id = MWL8K_STA(tx_info->control.sta)->peer_id;
  1240. else
  1241. tx->peer_id = 0;
  1242. wmb();
  1243. tx->status = cpu_to_le32(MWL8K_TXD_STATUS_FW_OWNED | txstatus);
  1244. txq->len++;
  1245. priv->pending_tx_pkts++;
  1246. txq->tail++;
  1247. if (txq->tail == MWL8K_TX_DESCS)
  1248. txq->tail = 0;
  1249. if (txq->head == txq->tail)
  1250. ieee80211_stop_queue(hw, index);
  1251. mwl8k_tx_start(priv);
  1252. spin_unlock_bh(&priv->tx_lock);
  1253. return NETDEV_TX_OK;
  1254. }
  1255. /*
  1256. * Firmware access.
  1257. *
  1258. * We have the following requirements for issuing firmware commands:
  1259. * - Some commands require that the packet transmit path is idle when
  1260. * the command is issued. (For simplicity, we'll just quiesce the
  1261. * transmit path for every command.)
  1262. * - There are certain sequences of commands that need to be issued to
  1263. * the hardware sequentially, with no other intervening commands.
  1264. *
  1265. * This leads to an implementation of a "firmware lock" as a mutex that
  1266. * can be taken recursively, and which is taken by both the low-level
  1267. * command submission function (mwl8k_post_cmd) as well as any users of
  1268. * that function that require issuing of an atomic sequence of commands,
  1269. * and quiesces the transmit path whenever it's taken.
  1270. */
  1271. static int mwl8k_fw_lock(struct ieee80211_hw *hw)
  1272. {
  1273. struct mwl8k_priv *priv = hw->priv;
  1274. if (priv->fw_mutex_owner != current) {
  1275. int rc;
  1276. mutex_lock(&priv->fw_mutex);
  1277. ieee80211_stop_queues(hw);
  1278. rc = mwl8k_tx_wait_empty(hw);
  1279. if (rc) {
  1280. ieee80211_wake_queues(hw);
  1281. mutex_unlock(&priv->fw_mutex);
  1282. return rc;
  1283. }
  1284. priv->fw_mutex_owner = current;
  1285. }
  1286. priv->fw_mutex_depth++;
  1287. return 0;
  1288. }
  1289. static void mwl8k_fw_unlock(struct ieee80211_hw *hw)
  1290. {
  1291. struct mwl8k_priv *priv = hw->priv;
  1292. if (!--priv->fw_mutex_depth) {
  1293. ieee80211_wake_queues(hw);
  1294. priv->fw_mutex_owner = NULL;
  1295. mutex_unlock(&priv->fw_mutex);
  1296. }
  1297. }
  1298. /*
  1299. * Command processing.
  1300. */
  1301. /* Timeout firmware commands after 10s */
  1302. #define MWL8K_CMD_TIMEOUT_MS 10000
  1303. static int mwl8k_post_cmd(struct ieee80211_hw *hw, struct mwl8k_cmd_pkt *cmd)
  1304. {
  1305. DECLARE_COMPLETION_ONSTACK(cmd_wait);
  1306. struct mwl8k_priv *priv = hw->priv;
  1307. void __iomem *regs = priv->regs;
  1308. dma_addr_t dma_addr;
  1309. unsigned int dma_size;
  1310. int rc;
  1311. unsigned long timeout = 0;
  1312. u8 buf[32];
  1313. cmd->result = (__force __le16) 0xffff;
  1314. dma_size = le16_to_cpu(cmd->length);
  1315. dma_addr = pci_map_single(priv->pdev, cmd, dma_size,
  1316. PCI_DMA_BIDIRECTIONAL);
  1317. if (pci_dma_mapping_error(priv->pdev, dma_addr))
  1318. return -ENOMEM;
  1319. rc = mwl8k_fw_lock(hw);
  1320. if (rc) {
  1321. pci_unmap_single(priv->pdev, dma_addr, dma_size,
  1322. PCI_DMA_BIDIRECTIONAL);
  1323. return rc;
  1324. }
  1325. priv->hostcmd_wait = &cmd_wait;
  1326. iowrite32(dma_addr, regs + MWL8K_HIU_GEN_PTR);
  1327. iowrite32(MWL8K_H2A_INT_DOORBELL,
  1328. regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  1329. iowrite32(MWL8K_H2A_INT_DUMMY,
  1330. regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  1331. timeout = wait_for_completion_timeout(&cmd_wait,
  1332. msecs_to_jiffies(MWL8K_CMD_TIMEOUT_MS));
  1333. priv->hostcmd_wait = NULL;
  1334. mwl8k_fw_unlock(hw);
  1335. pci_unmap_single(priv->pdev, dma_addr, dma_size,
  1336. PCI_DMA_BIDIRECTIONAL);
  1337. if (!timeout) {
  1338. wiphy_err(hw->wiphy, "Command %s timeout after %u ms\n",
  1339. mwl8k_cmd_name(cmd->code, buf, sizeof(buf)),
  1340. MWL8K_CMD_TIMEOUT_MS);
  1341. rc = -ETIMEDOUT;
  1342. } else {
  1343. int ms;
  1344. ms = MWL8K_CMD_TIMEOUT_MS - jiffies_to_msecs(timeout);
  1345. rc = cmd->result ? -EINVAL : 0;
  1346. if (rc)
  1347. wiphy_err(hw->wiphy, "Command %s error 0x%x\n",
  1348. mwl8k_cmd_name(cmd->code, buf, sizeof(buf)),
  1349. le16_to_cpu(cmd->result));
  1350. else if (ms > 2000)
  1351. wiphy_notice(hw->wiphy, "Command %s took %d ms\n",
  1352. mwl8k_cmd_name(cmd->code,
  1353. buf, sizeof(buf)),
  1354. ms);
  1355. }
  1356. return rc;
  1357. }
  1358. static int mwl8k_post_pervif_cmd(struct ieee80211_hw *hw,
  1359. struct ieee80211_vif *vif,
  1360. struct mwl8k_cmd_pkt *cmd)
  1361. {
  1362. if (vif != NULL)
  1363. cmd->macid = MWL8K_VIF(vif)->macid;
  1364. return mwl8k_post_cmd(hw, cmd);
  1365. }
  1366. /*
  1367. * Setup code shared between STA and AP firmware images.
  1368. */
  1369. static void mwl8k_setup_2ghz_band(struct ieee80211_hw *hw)
  1370. {
  1371. struct mwl8k_priv *priv = hw->priv;
  1372. BUILD_BUG_ON(sizeof(priv->channels_24) != sizeof(mwl8k_channels_24));
  1373. memcpy(priv->channels_24, mwl8k_channels_24, sizeof(mwl8k_channels_24));
  1374. BUILD_BUG_ON(sizeof(priv->rates_24) != sizeof(mwl8k_rates_24));
  1375. memcpy(priv->rates_24, mwl8k_rates_24, sizeof(mwl8k_rates_24));
  1376. priv->band_24.band = IEEE80211_BAND_2GHZ;
  1377. priv->band_24.channels = priv->channels_24;
  1378. priv->band_24.n_channels = ARRAY_SIZE(mwl8k_channels_24);
  1379. priv->band_24.bitrates = priv->rates_24;
  1380. priv->band_24.n_bitrates = ARRAY_SIZE(mwl8k_rates_24);
  1381. hw->wiphy->bands[IEEE80211_BAND_2GHZ] = &priv->band_24;
  1382. }
  1383. static void mwl8k_setup_5ghz_band(struct ieee80211_hw *hw)
  1384. {
  1385. struct mwl8k_priv *priv = hw->priv;
  1386. BUILD_BUG_ON(sizeof(priv->channels_50) != sizeof(mwl8k_channels_50));
  1387. memcpy(priv->channels_50, mwl8k_channels_50, sizeof(mwl8k_channels_50));
  1388. BUILD_BUG_ON(sizeof(priv->rates_50) != sizeof(mwl8k_rates_50));
  1389. memcpy(priv->rates_50, mwl8k_rates_50, sizeof(mwl8k_rates_50));
  1390. priv->band_50.band = IEEE80211_BAND_5GHZ;
  1391. priv->band_50.channels = priv->channels_50;
  1392. priv->band_50.n_channels = ARRAY_SIZE(mwl8k_channels_50);
  1393. priv->band_50.bitrates = priv->rates_50;
  1394. priv->band_50.n_bitrates = ARRAY_SIZE(mwl8k_rates_50);
  1395. hw->wiphy->bands[IEEE80211_BAND_5GHZ] = &priv->band_50;
  1396. }
  1397. /*
  1398. * CMD_GET_HW_SPEC (STA version).
  1399. */
  1400. struct mwl8k_cmd_get_hw_spec_sta {
  1401. struct mwl8k_cmd_pkt header;
  1402. __u8 hw_rev;
  1403. __u8 host_interface;
  1404. __le16 num_mcaddrs;
  1405. __u8 perm_addr[ETH_ALEN];
  1406. __le16 region_code;
  1407. __le32 fw_rev;
  1408. __le32 ps_cookie;
  1409. __le32 caps;
  1410. __u8 mcs_bitmap[16];
  1411. __le32 rx_queue_ptr;
  1412. __le32 num_tx_queues;
  1413. __le32 tx_queue_ptrs[MWL8K_TX_QUEUES];
  1414. __le32 caps2;
  1415. __le32 num_tx_desc_per_queue;
  1416. __le32 total_rxd;
  1417. } __packed;
  1418. #define MWL8K_CAP_MAX_AMSDU 0x20000000
  1419. #define MWL8K_CAP_GREENFIELD 0x08000000
  1420. #define MWL8K_CAP_AMPDU 0x04000000
  1421. #define MWL8K_CAP_RX_STBC 0x01000000
  1422. #define MWL8K_CAP_TX_STBC 0x00800000
  1423. #define MWL8K_CAP_SHORTGI_40MHZ 0x00400000
  1424. #define MWL8K_CAP_SHORTGI_20MHZ 0x00200000
  1425. #define MWL8K_CAP_RX_ANTENNA_MASK 0x000e0000
  1426. #define MWL8K_CAP_TX_ANTENNA_MASK 0x0001c000
  1427. #define MWL8K_CAP_DELAY_BA 0x00003000
  1428. #define MWL8K_CAP_MIMO 0x00000200
  1429. #define MWL8K_CAP_40MHZ 0x00000100
  1430. #define MWL8K_CAP_BAND_MASK 0x00000007
  1431. #define MWL8K_CAP_5GHZ 0x00000004
  1432. #define MWL8K_CAP_2GHZ4 0x00000001
  1433. static void
  1434. mwl8k_set_ht_caps(struct ieee80211_hw *hw,
  1435. struct ieee80211_supported_band *band, u32 cap)
  1436. {
  1437. int rx_streams;
  1438. int tx_streams;
  1439. band->ht_cap.ht_supported = 1;
  1440. if (cap & MWL8K_CAP_MAX_AMSDU)
  1441. band->ht_cap.cap |= IEEE80211_HT_CAP_MAX_AMSDU;
  1442. if (cap & MWL8K_CAP_GREENFIELD)
  1443. band->ht_cap.cap |= IEEE80211_HT_CAP_GRN_FLD;
  1444. if (cap & MWL8K_CAP_AMPDU) {
  1445. hw->flags |= IEEE80211_HW_AMPDU_AGGREGATION;
  1446. band->ht_cap.ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K;
  1447. band->ht_cap.ampdu_density = IEEE80211_HT_MPDU_DENSITY_NONE;
  1448. }
  1449. if (cap & MWL8K_CAP_RX_STBC)
  1450. band->ht_cap.cap |= IEEE80211_HT_CAP_RX_STBC;
  1451. if (cap & MWL8K_CAP_TX_STBC)
  1452. band->ht_cap.cap |= IEEE80211_HT_CAP_TX_STBC;
  1453. if (cap & MWL8K_CAP_SHORTGI_40MHZ)
  1454. band->ht_cap.cap |= IEEE80211_HT_CAP_SGI_40;
  1455. if (cap & MWL8K_CAP_SHORTGI_20MHZ)
  1456. band->ht_cap.cap |= IEEE80211_HT_CAP_SGI_20;
  1457. if (cap & MWL8K_CAP_DELAY_BA)
  1458. band->ht_cap.cap |= IEEE80211_HT_CAP_DELAY_BA;
  1459. if (cap & MWL8K_CAP_40MHZ)
  1460. band->ht_cap.cap |= IEEE80211_HT_CAP_SUP_WIDTH_20_40;
  1461. rx_streams = hweight32(cap & MWL8K_CAP_RX_ANTENNA_MASK);
  1462. tx_streams = hweight32(cap & MWL8K_CAP_TX_ANTENNA_MASK);
  1463. band->ht_cap.mcs.rx_mask[0] = 0xff;
  1464. if (rx_streams >= 2)
  1465. band->ht_cap.mcs.rx_mask[1] = 0xff;
  1466. if (rx_streams >= 3)
  1467. band->ht_cap.mcs.rx_mask[2] = 0xff;
  1468. band->ht_cap.mcs.rx_mask[4] = 0x01;
  1469. band->ht_cap.mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED;
  1470. if (rx_streams != tx_streams) {
  1471. band->ht_cap.mcs.tx_params |= IEEE80211_HT_MCS_TX_RX_DIFF;
  1472. band->ht_cap.mcs.tx_params |= (tx_streams - 1) <<
  1473. IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT;
  1474. }
  1475. }
  1476. static void
  1477. mwl8k_set_caps(struct ieee80211_hw *hw, u32 caps)
  1478. {
  1479. struct mwl8k_priv *priv = hw->priv;
  1480. if ((caps & MWL8K_CAP_2GHZ4) || !(caps & MWL8K_CAP_BAND_MASK)) {
  1481. mwl8k_setup_2ghz_band(hw);
  1482. if (caps & MWL8K_CAP_MIMO)
  1483. mwl8k_set_ht_caps(hw, &priv->band_24, caps);
  1484. }
  1485. if (caps & MWL8K_CAP_5GHZ) {
  1486. mwl8k_setup_5ghz_band(hw);
  1487. if (caps & MWL8K_CAP_MIMO)
  1488. mwl8k_set_ht_caps(hw, &priv->band_50, caps);
  1489. }
  1490. }
  1491. static int mwl8k_cmd_get_hw_spec_sta(struct ieee80211_hw *hw)
  1492. {
  1493. struct mwl8k_priv *priv = hw->priv;
  1494. struct mwl8k_cmd_get_hw_spec_sta *cmd;
  1495. int rc;
  1496. int i;
  1497. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1498. if (cmd == NULL)
  1499. return -ENOMEM;
  1500. cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_HW_SPEC);
  1501. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1502. memset(cmd->perm_addr, 0xff, sizeof(cmd->perm_addr));
  1503. cmd->ps_cookie = cpu_to_le32(priv->cookie_dma);
  1504. cmd->rx_queue_ptr = cpu_to_le32(priv->rxq[0].rxd_dma);
  1505. cmd->num_tx_queues = cpu_to_le32(MWL8K_TX_QUEUES);
  1506. for (i = 0; i < MWL8K_TX_QUEUES; i++)
  1507. cmd->tx_queue_ptrs[i] = cpu_to_le32(priv->txq[i].txd_dma);
  1508. cmd->num_tx_desc_per_queue = cpu_to_le32(MWL8K_TX_DESCS);
  1509. cmd->total_rxd = cpu_to_le32(MWL8K_RX_DESCS);
  1510. rc = mwl8k_post_cmd(hw, &cmd->header);
  1511. if (!rc) {
  1512. SET_IEEE80211_PERM_ADDR(hw, cmd->perm_addr);
  1513. priv->num_mcaddrs = le16_to_cpu(cmd->num_mcaddrs);
  1514. priv->fw_rev = le32_to_cpu(cmd->fw_rev);
  1515. priv->hw_rev = cmd->hw_rev;
  1516. mwl8k_set_caps(hw, le32_to_cpu(cmd->caps));
  1517. priv->ap_macids_supported = 0x00000000;
  1518. priv->sta_macids_supported = 0x00000001;
  1519. }
  1520. kfree(cmd);
  1521. return rc;
  1522. }
  1523. /*
  1524. * CMD_GET_HW_SPEC (AP version).
  1525. */
  1526. struct mwl8k_cmd_get_hw_spec_ap {
  1527. struct mwl8k_cmd_pkt header;
  1528. __u8 hw_rev;
  1529. __u8 host_interface;
  1530. __le16 num_wcb;
  1531. __le16 num_mcaddrs;
  1532. __u8 perm_addr[ETH_ALEN];
  1533. __le16 region_code;
  1534. __le16 num_antenna;
  1535. __le32 fw_rev;
  1536. __le32 wcbbase0;
  1537. __le32 rxwrptr;
  1538. __le32 rxrdptr;
  1539. __le32 ps_cookie;
  1540. __le32 wcbbase1;
  1541. __le32 wcbbase2;
  1542. __le32 wcbbase3;
  1543. __le32 fw_api_version;
  1544. } __packed;
  1545. static int mwl8k_cmd_get_hw_spec_ap(struct ieee80211_hw *hw)
  1546. {
  1547. struct mwl8k_priv *priv = hw->priv;
  1548. struct mwl8k_cmd_get_hw_spec_ap *cmd;
  1549. int rc;
  1550. u32 api_version;
  1551. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1552. if (cmd == NULL)
  1553. return -ENOMEM;
  1554. cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_HW_SPEC);
  1555. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1556. memset(cmd->perm_addr, 0xff, sizeof(cmd->perm_addr));
  1557. cmd->ps_cookie = cpu_to_le32(priv->cookie_dma);
  1558. rc = mwl8k_post_cmd(hw, &cmd->header);
  1559. if (!rc) {
  1560. int off;
  1561. api_version = le32_to_cpu(cmd->fw_api_version);
  1562. if (priv->device_info->fw_api_ap != api_version) {
  1563. printk(KERN_ERR "%s: Unsupported fw API version for %s."
  1564. " Expected %d got %d.\n", MWL8K_NAME,
  1565. priv->device_info->part_name,
  1566. priv->device_info->fw_api_ap,
  1567. api_version);
  1568. rc = -EINVAL;
  1569. goto done;
  1570. }
  1571. SET_IEEE80211_PERM_ADDR(hw, cmd->perm_addr);
  1572. priv->num_mcaddrs = le16_to_cpu(cmd->num_mcaddrs);
  1573. priv->fw_rev = le32_to_cpu(cmd->fw_rev);
  1574. priv->hw_rev = cmd->hw_rev;
  1575. mwl8k_setup_2ghz_band(hw);
  1576. priv->ap_macids_supported = 0x000000ff;
  1577. priv->sta_macids_supported = 0x00000000;
  1578. off = le32_to_cpu(cmd->wcbbase0) & 0xffff;
  1579. iowrite32(priv->txq[0].txd_dma, priv->sram + off);
  1580. off = le32_to_cpu(cmd->rxwrptr) & 0xffff;
  1581. iowrite32(priv->rxq[0].rxd_dma, priv->sram + off);
  1582. off = le32_to_cpu(cmd->rxrdptr) & 0xffff;
  1583. iowrite32(priv->rxq[0].rxd_dma, priv->sram + off);
  1584. off = le32_to_cpu(cmd->wcbbase1) & 0xffff;
  1585. iowrite32(priv->txq[1].txd_dma, priv->sram + off);
  1586. off = le32_to_cpu(cmd->wcbbase2) & 0xffff;
  1587. iowrite32(priv->txq[2].txd_dma, priv->sram + off);
  1588. off = le32_to_cpu(cmd->wcbbase3) & 0xffff;
  1589. iowrite32(priv->txq[3].txd_dma, priv->sram + off);
  1590. }
  1591. done:
  1592. kfree(cmd);
  1593. return rc;
  1594. }
  1595. /*
  1596. * CMD_SET_HW_SPEC.
  1597. */
  1598. struct mwl8k_cmd_set_hw_spec {
  1599. struct mwl8k_cmd_pkt header;
  1600. __u8 hw_rev;
  1601. __u8 host_interface;
  1602. __le16 num_mcaddrs;
  1603. __u8 perm_addr[ETH_ALEN];
  1604. __le16 region_code;
  1605. __le32 fw_rev;
  1606. __le32 ps_cookie;
  1607. __le32 caps;
  1608. __le32 rx_queue_ptr;
  1609. __le32 num_tx_queues;
  1610. __le32 tx_queue_ptrs[MWL8K_TX_QUEUES];
  1611. __le32 flags;
  1612. __le32 num_tx_desc_per_queue;
  1613. __le32 total_rxd;
  1614. } __packed;
  1615. #define MWL8K_SET_HW_SPEC_FLAG_HOST_DECR_MGMT 0x00000080
  1616. #define MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_PROBERESP 0x00000020
  1617. #define MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_BEACON 0x00000010
  1618. static int mwl8k_cmd_set_hw_spec(struct ieee80211_hw *hw)
  1619. {
  1620. struct mwl8k_priv *priv = hw->priv;
  1621. struct mwl8k_cmd_set_hw_spec *cmd;
  1622. int rc;
  1623. int i;
  1624. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1625. if (cmd == NULL)
  1626. return -ENOMEM;
  1627. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_HW_SPEC);
  1628. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1629. cmd->ps_cookie = cpu_to_le32(priv->cookie_dma);
  1630. cmd->rx_queue_ptr = cpu_to_le32(priv->rxq[0].rxd_dma);
  1631. cmd->num_tx_queues = cpu_to_le32(MWL8K_TX_QUEUES);
  1632. for (i = 0; i < MWL8K_TX_QUEUES; i++)
  1633. cmd->tx_queue_ptrs[i] = cpu_to_le32(priv->txq[i].txd_dma);
  1634. cmd->flags = cpu_to_le32(MWL8K_SET_HW_SPEC_FLAG_HOST_DECR_MGMT |
  1635. MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_PROBERESP |
  1636. MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_BEACON);
  1637. cmd->num_tx_desc_per_queue = cpu_to_le32(MWL8K_TX_DESCS);
  1638. cmd->total_rxd = cpu_to_le32(MWL8K_RX_DESCS);
  1639. rc = mwl8k_post_cmd(hw, &cmd->header);
  1640. kfree(cmd);
  1641. return rc;
  1642. }
  1643. /*
  1644. * CMD_MAC_MULTICAST_ADR.
  1645. */
  1646. struct mwl8k_cmd_mac_multicast_adr {
  1647. struct mwl8k_cmd_pkt header;
  1648. __le16 action;
  1649. __le16 numaddr;
  1650. __u8 addr[0][ETH_ALEN];
  1651. };
  1652. #define MWL8K_ENABLE_RX_DIRECTED 0x0001
  1653. #define MWL8K_ENABLE_RX_MULTICAST 0x0002
  1654. #define MWL8K_ENABLE_RX_ALL_MULTICAST 0x0004
  1655. #define MWL8K_ENABLE_RX_BROADCAST 0x0008
  1656. static struct mwl8k_cmd_pkt *
  1657. __mwl8k_cmd_mac_multicast_adr(struct ieee80211_hw *hw, int allmulti,
  1658. struct netdev_hw_addr_list *mc_list)
  1659. {
  1660. struct mwl8k_priv *priv = hw->priv;
  1661. struct mwl8k_cmd_mac_multicast_adr *cmd;
  1662. int size;
  1663. int mc_count = 0;
  1664. if (mc_list)
  1665. mc_count = netdev_hw_addr_list_count(mc_list);
  1666. if (allmulti || mc_count > priv->num_mcaddrs) {
  1667. allmulti = 1;
  1668. mc_count = 0;
  1669. }
  1670. size = sizeof(*cmd) + mc_count * ETH_ALEN;
  1671. cmd = kzalloc(size, GFP_ATOMIC);
  1672. if (cmd == NULL)
  1673. return NULL;
  1674. cmd->header.code = cpu_to_le16(MWL8K_CMD_MAC_MULTICAST_ADR);
  1675. cmd->header.length = cpu_to_le16(size);
  1676. cmd->action = cpu_to_le16(MWL8K_ENABLE_RX_DIRECTED |
  1677. MWL8K_ENABLE_RX_BROADCAST);
  1678. if (allmulti) {
  1679. cmd->action |= cpu_to_le16(MWL8K_ENABLE_RX_ALL_MULTICAST);
  1680. } else if (mc_count) {
  1681. struct netdev_hw_addr *ha;
  1682. int i = 0;
  1683. cmd->action |= cpu_to_le16(MWL8K_ENABLE_RX_MULTICAST);
  1684. cmd->numaddr = cpu_to_le16(mc_count);
  1685. netdev_hw_addr_list_for_each(ha, mc_list) {
  1686. memcpy(cmd->addr[i], ha->addr, ETH_ALEN);
  1687. }
  1688. }
  1689. return &cmd->header;
  1690. }
  1691. /*
  1692. * CMD_GET_STAT.
  1693. */
  1694. struct mwl8k_cmd_get_stat {
  1695. struct mwl8k_cmd_pkt header;
  1696. __le32 stats[64];
  1697. } __packed;
  1698. #define MWL8K_STAT_ACK_FAILURE 9
  1699. #define MWL8K_STAT_RTS_FAILURE 12
  1700. #define MWL8K_STAT_FCS_ERROR 24
  1701. #define MWL8K_STAT_RTS_SUCCESS 11
  1702. static int mwl8k_cmd_get_stat(struct ieee80211_hw *hw,
  1703. struct ieee80211_low_level_stats *stats)
  1704. {
  1705. struct mwl8k_cmd_get_stat *cmd;
  1706. int rc;
  1707. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1708. if (cmd == NULL)
  1709. return -ENOMEM;
  1710. cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_STAT);
  1711. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1712. rc = mwl8k_post_cmd(hw, &cmd->header);
  1713. if (!rc) {
  1714. stats->dot11ACKFailureCount =
  1715. le32_to_cpu(cmd->stats[MWL8K_STAT_ACK_FAILURE]);
  1716. stats->dot11RTSFailureCount =
  1717. le32_to_cpu(cmd->stats[MWL8K_STAT_RTS_FAILURE]);
  1718. stats->dot11FCSErrorCount =
  1719. le32_to_cpu(cmd->stats[MWL8K_STAT_FCS_ERROR]);
  1720. stats->dot11RTSSuccessCount =
  1721. le32_to_cpu(cmd->stats[MWL8K_STAT_RTS_SUCCESS]);
  1722. }
  1723. kfree(cmd);
  1724. return rc;
  1725. }
  1726. /*
  1727. * CMD_RADIO_CONTROL.
  1728. */
  1729. struct mwl8k_cmd_radio_control {
  1730. struct mwl8k_cmd_pkt header;
  1731. __le16 action;
  1732. __le16 control;
  1733. __le16 radio_on;
  1734. } __packed;
  1735. static int
  1736. mwl8k_cmd_radio_control(struct ieee80211_hw *hw, bool enable, bool force)
  1737. {
  1738. struct mwl8k_priv *priv = hw->priv;
  1739. struct mwl8k_cmd_radio_control *cmd;
  1740. int rc;
  1741. if (enable == priv->radio_on && !force)
  1742. return 0;
  1743. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1744. if (cmd == NULL)
  1745. return -ENOMEM;
  1746. cmd->header.code = cpu_to_le16(MWL8K_CMD_RADIO_CONTROL);
  1747. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1748. cmd->action = cpu_to_le16(MWL8K_CMD_SET);
  1749. cmd->control = cpu_to_le16(priv->radio_short_preamble ? 3 : 1);
  1750. cmd->radio_on = cpu_to_le16(enable ? 0x0001 : 0x0000);
  1751. rc = mwl8k_post_cmd(hw, &cmd->header);
  1752. kfree(cmd);
  1753. if (!rc)
  1754. priv->radio_on = enable;
  1755. return rc;
  1756. }
  1757. static int mwl8k_cmd_radio_disable(struct ieee80211_hw *hw)
  1758. {
  1759. return mwl8k_cmd_radio_control(hw, 0, 0);
  1760. }
  1761. static int mwl8k_cmd_radio_enable(struct ieee80211_hw *hw)
  1762. {
  1763. return mwl8k_cmd_radio_control(hw, 1, 0);
  1764. }
  1765. static int
  1766. mwl8k_set_radio_preamble(struct ieee80211_hw *hw, bool short_preamble)
  1767. {
  1768. struct mwl8k_priv *priv = hw->priv;
  1769. priv->radio_short_preamble = short_preamble;
  1770. return mwl8k_cmd_radio_control(hw, 1, 1);
  1771. }
  1772. /*
  1773. * CMD_RF_TX_POWER.
  1774. */
  1775. #define MWL8K_RF_TX_POWER_LEVEL_TOTAL 8
  1776. struct mwl8k_cmd_rf_tx_power {
  1777. struct mwl8k_cmd_pkt header;
  1778. __le16 action;
  1779. __le16 support_level;
  1780. __le16 current_level;
  1781. __le16 reserved;
  1782. __le16 power_level_list[MWL8K_RF_TX_POWER_LEVEL_TOTAL];
  1783. } __packed;
  1784. static int mwl8k_cmd_rf_tx_power(struct ieee80211_hw *hw, int dBm)
  1785. {
  1786. struct mwl8k_cmd_rf_tx_power *cmd;
  1787. int rc;
  1788. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1789. if (cmd == NULL)
  1790. return -ENOMEM;
  1791. cmd->header.code = cpu_to_le16(MWL8K_CMD_RF_TX_POWER);
  1792. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1793. cmd->action = cpu_to_le16(MWL8K_CMD_SET);
  1794. cmd->support_level = cpu_to_le16(dBm);
  1795. rc = mwl8k_post_cmd(hw, &cmd->header);
  1796. kfree(cmd);
  1797. return rc;
  1798. }
  1799. /*
  1800. * CMD_TX_POWER.
  1801. */
  1802. #define MWL8K_TX_POWER_LEVEL_TOTAL 12
  1803. struct mwl8k_cmd_tx_power {
  1804. struct mwl8k_cmd_pkt header;
  1805. __le16 action;
  1806. __le16 band;
  1807. __le16 channel;
  1808. __le16 bw;
  1809. __le16 sub_ch;
  1810. __le16 power_level_list[MWL8K_TX_POWER_LEVEL_TOTAL];
  1811. } __attribute__((packed));
  1812. static int mwl8k_cmd_tx_power(struct ieee80211_hw *hw,
  1813. struct ieee80211_conf *conf,
  1814. unsigned short pwr)
  1815. {
  1816. struct ieee80211_channel *channel = conf->channel;
  1817. struct mwl8k_cmd_tx_power *cmd;
  1818. int rc;
  1819. int i;
  1820. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1821. if (cmd == NULL)
  1822. return -ENOMEM;
  1823. cmd->header.code = cpu_to_le16(MWL8K_CMD_TX_POWER);
  1824. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1825. cmd->action = cpu_to_le16(MWL8K_CMD_SET_LIST);
  1826. if (channel->band == IEEE80211_BAND_2GHZ)
  1827. cmd->band = cpu_to_le16(0x1);
  1828. else if (channel->band == IEEE80211_BAND_5GHZ)
  1829. cmd->band = cpu_to_le16(0x4);
  1830. cmd->channel = channel->hw_value;
  1831. if (conf->channel_type == NL80211_CHAN_NO_HT ||
  1832. conf->channel_type == NL80211_CHAN_HT20) {
  1833. cmd->bw = cpu_to_le16(0x2);
  1834. } else {
  1835. cmd->bw = cpu_to_le16(0x4);
  1836. if (conf->channel_type == NL80211_CHAN_HT40MINUS)
  1837. cmd->sub_ch = cpu_to_le16(0x3);
  1838. else if (conf->channel_type == NL80211_CHAN_HT40PLUS)
  1839. cmd->sub_ch = cpu_to_le16(0x1);
  1840. }
  1841. for (i = 0; i < MWL8K_TX_POWER_LEVEL_TOTAL; i++)
  1842. cmd->power_level_list[i] = cpu_to_le16(pwr);
  1843. rc = mwl8k_post_cmd(hw, &cmd->header);
  1844. kfree(cmd);
  1845. return rc;
  1846. }
  1847. /*
  1848. * CMD_RF_ANTENNA.
  1849. */
  1850. struct mwl8k_cmd_rf_antenna {
  1851. struct mwl8k_cmd_pkt header;
  1852. __le16 antenna;
  1853. __le16 mode;
  1854. } __packed;
  1855. #define MWL8K_RF_ANTENNA_RX 1
  1856. #define MWL8K_RF_ANTENNA_TX 2
  1857. static int
  1858. mwl8k_cmd_rf_antenna(struct ieee80211_hw *hw, int antenna, int mask)
  1859. {
  1860. struct mwl8k_cmd_rf_antenna *cmd;
  1861. int rc;
  1862. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1863. if (cmd == NULL)
  1864. return -ENOMEM;
  1865. cmd->header.code = cpu_to_le16(MWL8K_CMD_RF_ANTENNA);
  1866. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1867. cmd->antenna = cpu_to_le16(antenna);
  1868. cmd->mode = cpu_to_le16(mask);
  1869. rc = mwl8k_post_cmd(hw, &cmd->header);
  1870. kfree(cmd);
  1871. return rc;
  1872. }
  1873. /*
  1874. * CMD_SET_BEACON.
  1875. */
  1876. struct mwl8k_cmd_set_beacon {
  1877. struct mwl8k_cmd_pkt header;
  1878. __le16 beacon_len;
  1879. __u8 beacon[0];
  1880. };
  1881. static int mwl8k_cmd_set_beacon(struct ieee80211_hw *hw,
  1882. struct ieee80211_vif *vif, u8 *beacon, int len)
  1883. {
  1884. struct mwl8k_cmd_set_beacon *cmd;
  1885. int rc;
  1886. cmd = kzalloc(sizeof(*cmd) + len, GFP_KERNEL);
  1887. if (cmd == NULL)
  1888. return -ENOMEM;
  1889. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_BEACON);
  1890. cmd->header.length = cpu_to_le16(sizeof(*cmd) + len);
  1891. cmd->beacon_len = cpu_to_le16(len);
  1892. memcpy(cmd->beacon, beacon, len);
  1893. rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
  1894. kfree(cmd);
  1895. return rc;
  1896. }
  1897. /*
  1898. * CMD_SET_PRE_SCAN.
  1899. */
  1900. struct mwl8k_cmd_set_pre_scan {
  1901. struct mwl8k_cmd_pkt header;
  1902. } __packed;
  1903. static int mwl8k_cmd_set_pre_scan(struct ieee80211_hw *hw)
  1904. {
  1905. struct mwl8k_cmd_set_pre_scan *cmd;
  1906. int rc;
  1907. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1908. if (cmd == NULL)
  1909. return -ENOMEM;
  1910. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_PRE_SCAN);
  1911. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1912. rc = mwl8k_post_cmd(hw, &cmd->header);
  1913. kfree(cmd);
  1914. return rc;
  1915. }
  1916. /*
  1917. * CMD_SET_POST_SCAN.
  1918. */
  1919. struct mwl8k_cmd_set_post_scan {
  1920. struct mwl8k_cmd_pkt header;
  1921. __le32 isibss;
  1922. __u8 bssid[ETH_ALEN];
  1923. } __packed;
  1924. static int
  1925. mwl8k_cmd_set_post_scan(struct ieee80211_hw *hw, const __u8 *mac)
  1926. {
  1927. struct mwl8k_cmd_set_post_scan *cmd;
  1928. int rc;
  1929. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1930. if (cmd == NULL)
  1931. return -ENOMEM;
  1932. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_POST_SCAN);
  1933. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1934. cmd->isibss = 0;
  1935. memcpy(cmd->bssid, mac, ETH_ALEN);
  1936. rc = mwl8k_post_cmd(hw, &cmd->header);
  1937. kfree(cmd);
  1938. return rc;
  1939. }
  1940. /*
  1941. * CMD_SET_RF_CHANNEL.
  1942. */
  1943. struct mwl8k_cmd_set_rf_channel {
  1944. struct mwl8k_cmd_pkt header;
  1945. __le16 action;
  1946. __u8 current_channel;
  1947. __le32 channel_flags;
  1948. } __packed;
  1949. static int mwl8k_cmd_set_rf_channel(struct ieee80211_hw *hw,
  1950. struct ieee80211_conf *conf)
  1951. {
  1952. struct ieee80211_channel *channel = conf->channel;
  1953. struct mwl8k_cmd_set_rf_channel *cmd;
  1954. int rc;
  1955. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1956. if (cmd == NULL)
  1957. return -ENOMEM;
  1958. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RF_CHANNEL);
  1959. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1960. cmd->action = cpu_to_le16(MWL8K_CMD_SET);
  1961. cmd->current_channel = channel->hw_value;
  1962. if (channel->band == IEEE80211_BAND_2GHZ)
  1963. cmd->channel_flags |= cpu_to_le32(0x00000001);
  1964. else if (channel->band == IEEE80211_BAND_5GHZ)
  1965. cmd->channel_flags |= cpu_to_le32(0x00000004);
  1966. if (conf->channel_type == NL80211_CHAN_NO_HT ||
  1967. conf->channel_type == NL80211_CHAN_HT20)
  1968. cmd->channel_flags |= cpu_to_le32(0x00000080);
  1969. else if (conf->channel_type == NL80211_CHAN_HT40MINUS)
  1970. cmd->channel_flags |= cpu_to_le32(0x000001900);
  1971. else if (conf->channel_type == NL80211_CHAN_HT40PLUS)
  1972. cmd->channel_flags |= cpu_to_le32(0x000000900);
  1973. rc = mwl8k_post_cmd(hw, &cmd->header);
  1974. kfree(cmd);
  1975. return rc;
  1976. }
  1977. /*
  1978. * CMD_SET_AID.
  1979. */
  1980. #define MWL8K_FRAME_PROT_DISABLED 0x00
  1981. #define MWL8K_FRAME_PROT_11G 0x07
  1982. #define MWL8K_FRAME_PROT_11N_HT_40MHZ_ONLY 0x02
  1983. #define MWL8K_FRAME_PROT_11N_HT_ALL 0x06
  1984. struct mwl8k_cmd_update_set_aid {
  1985. struct mwl8k_cmd_pkt header;
  1986. __le16 aid;
  1987. /* AP's MAC address (BSSID) */
  1988. __u8 bssid[ETH_ALEN];
  1989. __le16 protection_mode;
  1990. __u8 supp_rates[14];
  1991. } __packed;
  1992. static void legacy_rate_mask_to_array(u8 *rates, u32 mask)
  1993. {
  1994. int i;
  1995. int j;
  1996. /*
  1997. * Clear nonstandard rates 4 and 13.
  1998. */
  1999. mask &= 0x1fef;
  2000. for (i = 0, j = 0; i < 14; i++) {
  2001. if (mask & (1 << i))
  2002. rates[j++] = mwl8k_rates_24[i].hw_value;
  2003. }
  2004. }
  2005. static int
  2006. mwl8k_cmd_set_aid(struct ieee80211_hw *hw,
  2007. struct ieee80211_vif *vif, u32 legacy_rate_mask)
  2008. {
  2009. struct mwl8k_cmd_update_set_aid *cmd;
  2010. u16 prot_mode;
  2011. int rc;
  2012. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2013. if (cmd == NULL)
  2014. return -ENOMEM;
  2015. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_AID);
  2016. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2017. cmd->aid = cpu_to_le16(vif->bss_conf.aid);
  2018. memcpy(cmd->bssid, vif->bss_conf.bssid, ETH_ALEN);
  2019. if (vif->bss_conf.use_cts_prot) {
  2020. prot_mode = MWL8K_FRAME_PROT_11G;
  2021. } else {
  2022. switch (vif->bss_conf.ht_operation_mode &
  2023. IEEE80211_HT_OP_MODE_PROTECTION) {
  2024. case IEEE80211_HT_OP_MODE_PROTECTION_20MHZ:
  2025. prot_mode = MWL8K_FRAME_PROT_11N_HT_40MHZ_ONLY;
  2026. break;
  2027. case IEEE80211_HT_OP_MODE_PROTECTION_NONHT_MIXED:
  2028. prot_mode = MWL8K_FRAME_PROT_11N_HT_ALL;
  2029. break;
  2030. default:
  2031. prot_mode = MWL8K_FRAME_PROT_DISABLED;
  2032. break;
  2033. }
  2034. }
  2035. cmd->protection_mode = cpu_to_le16(prot_mode);
  2036. legacy_rate_mask_to_array(cmd->supp_rates, legacy_rate_mask);
  2037. rc = mwl8k_post_cmd(hw, &cmd->header);
  2038. kfree(cmd);
  2039. return rc;
  2040. }
  2041. /*
  2042. * CMD_SET_RATE.
  2043. */
  2044. struct mwl8k_cmd_set_rate {
  2045. struct mwl8k_cmd_pkt header;
  2046. __u8 legacy_rates[14];
  2047. /* Bitmap for supported MCS codes. */
  2048. __u8 mcs_set[16];
  2049. __u8 reserved[16];
  2050. } __packed;
  2051. static int
  2052. mwl8k_cmd_set_rate(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
  2053. u32 legacy_rate_mask, u8 *mcs_rates)
  2054. {
  2055. struct mwl8k_cmd_set_rate *cmd;
  2056. int rc;
  2057. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2058. if (cmd == NULL)
  2059. return -ENOMEM;
  2060. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RATE);
  2061. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2062. legacy_rate_mask_to_array(cmd->legacy_rates, legacy_rate_mask);
  2063. memcpy(cmd->mcs_set, mcs_rates, 16);
  2064. rc = mwl8k_post_cmd(hw, &cmd->header);
  2065. kfree(cmd);
  2066. return rc;
  2067. }
  2068. /*
  2069. * CMD_FINALIZE_JOIN.
  2070. */
  2071. #define MWL8K_FJ_BEACON_MAXLEN 128
  2072. struct mwl8k_cmd_finalize_join {
  2073. struct mwl8k_cmd_pkt header;
  2074. __le32 sleep_interval; /* Number of beacon periods to sleep */
  2075. __u8 beacon_data[MWL8K_FJ_BEACON_MAXLEN];
  2076. } __packed;
  2077. static int mwl8k_cmd_finalize_join(struct ieee80211_hw *hw, void *frame,
  2078. int framelen, int dtim)
  2079. {
  2080. struct mwl8k_cmd_finalize_join *cmd;
  2081. struct ieee80211_mgmt *payload = frame;
  2082. int payload_len;
  2083. int rc;
  2084. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2085. if (cmd == NULL)
  2086. return -ENOMEM;
  2087. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_FINALIZE_JOIN);
  2088. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2089. cmd->sleep_interval = cpu_to_le32(dtim ? dtim : 1);
  2090. payload_len = framelen - ieee80211_hdrlen(payload->frame_control);
  2091. if (payload_len < 0)
  2092. payload_len = 0;
  2093. else if (payload_len > MWL8K_FJ_BEACON_MAXLEN)
  2094. payload_len = MWL8K_FJ_BEACON_MAXLEN;
  2095. memcpy(cmd->beacon_data, &payload->u.beacon, payload_len);
  2096. rc = mwl8k_post_cmd(hw, &cmd->header);
  2097. kfree(cmd);
  2098. return rc;
  2099. }
  2100. /*
  2101. * CMD_SET_RTS_THRESHOLD.
  2102. */
  2103. struct mwl8k_cmd_set_rts_threshold {
  2104. struct mwl8k_cmd_pkt header;
  2105. __le16 action;
  2106. __le16 threshold;
  2107. } __packed;
  2108. static int
  2109. mwl8k_cmd_set_rts_threshold(struct ieee80211_hw *hw, int rts_thresh)
  2110. {
  2111. struct mwl8k_cmd_set_rts_threshold *cmd;
  2112. int rc;
  2113. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2114. if (cmd == NULL)
  2115. return -ENOMEM;
  2116. cmd->header.code = cpu_to_le16(MWL8K_CMD_RTS_THRESHOLD);
  2117. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2118. cmd->action = cpu_to_le16(MWL8K_CMD_SET);
  2119. cmd->threshold = cpu_to_le16(rts_thresh);
  2120. rc = mwl8k_post_cmd(hw, &cmd->header);
  2121. kfree(cmd);
  2122. return rc;
  2123. }
  2124. /*
  2125. * CMD_SET_SLOT.
  2126. */
  2127. struct mwl8k_cmd_set_slot {
  2128. struct mwl8k_cmd_pkt header;
  2129. __le16 action;
  2130. __u8 short_slot;
  2131. } __packed;
  2132. static int mwl8k_cmd_set_slot(struct ieee80211_hw *hw, bool short_slot_time)
  2133. {
  2134. struct mwl8k_cmd_set_slot *cmd;
  2135. int rc;
  2136. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2137. if (cmd == NULL)
  2138. return -ENOMEM;
  2139. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_SLOT);
  2140. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2141. cmd->action = cpu_to_le16(MWL8K_CMD_SET);
  2142. cmd->short_slot = short_slot_time;
  2143. rc = mwl8k_post_cmd(hw, &cmd->header);
  2144. kfree(cmd);
  2145. return rc;
  2146. }
  2147. /*
  2148. * CMD_SET_EDCA_PARAMS.
  2149. */
  2150. struct mwl8k_cmd_set_edca_params {
  2151. struct mwl8k_cmd_pkt header;
  2152. /* See MWL8K_SET_EDCA_XXX below */
  2153. __le16 action;
  2154. /* TX opportunity in units of 32 us */
  2155. __le16 txop;
  2156. union {
  2157. struct {
  2158. /* Log exponent of max contention period: 0...15 */
  2159. __le32 log_cw_max;
  2160. /* Log exponent of min contention period: 0...15 */
  2161. __le32 log_cw_min;
  2162. /* Adaptive interframe spacing in units of 32us */
  2163. __u8 aifs;
  2164. /* TX queue to configure */
  2165. __u8 txq;
  2166. } ap;
  2167. struct {
  2168. /* Log exponent of max contention period: 0...15 */
  2169. __u8 log_cw_max;
  2170. /* Log exponent of min contention period: 0...15 */
  2171. __u8 log_cw_min;
  2172. /* Adaptive interframe spacing in units of 32us */
  2173. __u8 aifs;
  2174. /* TX queue to configure */
  2175. __u8 txq;
  2176. } sta;
  2177. };
  2178. } __packed;
  2179. #define MWL8K_SET_EDCA_CW 0x01
  2180. #define MWL8K_SET_EDCA_TXOP 0x02
  2181. #define MWL8K_SET_EDCA_AIFS 0x04
  2182. #define MWL8K_SET_EDCA_ALL (MWL8K_SET_EDCA_CW | \
  2183. MWL8K_SET_EDCA_TXOP | \
  2184. MWL8K_SET_EDCA_AIFS)
  2185. static int
  2186. mwl8k_cmd_set_edca_params(struct ieee80211_hw *hw, __u8 qnum,
  2187. __u16 cw_min, __u16 cw_max,
  2188. __u8 aifs, __u16 txop)
  2189. {
  2190. struct mwl8k_priv *priv = hw->priv;
  2191. struct mwl8k_cmd_set_edca_params *cmd;
  2192. int rc;
  2193. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2194. if (cmd == NULL)
  2195. return -ENOMEM;
  2196. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_EDCA_PARAMS);
  2197. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2198. cmd->action = cpu_to_le16(MWL8K_SET_EDCA_ALL);
  2199. cmd->txop = cpu_to_le16(txop);
  2200. if (priv->ap_fw) {
  2201. cmd->ap.log_cw_max = cpu_to_le32(ilog2(cw_max + 1));
  2202. cmd->ap.log_cw_min = cpu_to_le32(ilog2(cw_min + 1));
  2203. cmd->ap.aifs = aifs;
  2204. cmd->ap.txq = qnum;
  2205. } else {
  2206. cmd->sta.log_cw_max = (u8)ilog2(cw_max + 1);
  2207. cmd->sta.log_cw_min = (u8)ilog2(cw_min + 1);
  2208. cmd->sta.aifs = aifs;
  2209. cmd->sta.txq = qnum;
  2210. }
  2211. rc = mwl8k_post_cmd(hw, &cmd->header);
  2212. kfree(cmd);
  2213. return rc;
  2214. }
  2215. /*
  2216. * CMD_SET_WMM_MODE.
  2217. */
  2218. struct mwl8k_cmd_set_wmm_mode {
  2219. struct mwl8k_cmd_pkt header;
  2220. __le16 action;
  2221. } __packed;
  2222. static int mwl8k_cmd_set_wmm_mode(struct ieee80211_hw *hw, bool enable)
  2223. {
  2224. struct mwl8k_priv *priv = hw->priv;
  2225. struct mwl8k_cmd_set_wmm_mode *cmd;
  2226. int rc;
  2227. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2228. if (cmd == NULL)
  2229. return -ENOMEM;
  2230. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_WMM_MODE);
  2231. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2232. cmd->action = cpu_to_le16(!!enable);
  2233. rc = mwl8k_post_cmd(hw, &cmd->header);
  2234. kfree(cmd);
  2235. if (!rc)
  2236. priv->wmm_enabled = enable;
  2237. return rc;
  2238. }
  2239. /*
  2240. * CMD_MIMO_CONFIG.
  2241. */
  2242. struct mwl8k_cmd_mimo_config {
  2243. struct mwl8k_cmd_pkt header;
  2244. __le32 action;
  2245. __u8 rx_antenna_map;
  2246. __u8 tx_antenna_map;
  2247. } __packed;
  2248. static int mwl8k_cmd_mimo_config(struct ieee80211_hw *hw, __u8 rx, __u8 tx)
  2249. {
  2250. struct mwl8k_cmd_mimo_config *cmd;
  2251. int rc;
  2252. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2253. if (cmd == NULL)
  2254. return -ENOMEM;
  2255. cmd->header.code = cpu_to_le16(MWL8K_CMD_MIMO_CONFIG);
  2256. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2257. cmd->action = cpu_to_le32((u32)MWL8K_CMD_SET);
  2258. cmd->rx_antenna_map = rx;
  2259. cmd->tx_antenna_map = tx;
  2260. rc = mwl8k_post_cmd(hw, &cmd->header);
  2261. kfree(cmd);
  2262. return rc;
  2263. }
  2264. /*
  2265. * CMD_USE_FIXED_RATE (STA version).
  2266. */
  2267. struct mwl8k_cmd_use_fixed_rate_sta {
  2268. struct mwl8k_cmd_pkt header;
  2269. __le32 action;
  2270. __le32 allow_rate_drop;
  2271. __le32 num_rates;
  2272. struct {
  2273. __le32 is_ht_rate;
  2274. __le32 enable_retry;
  2275. __le32 rate;
  2276. __le32 retry_count;
  2277. } rate_entry[8];
  2278. __le32 rate_type;
  2279. __le32 reserved1;
  2280. __le32 reserved2;
  2281. } __packed;
  2282. #define MWL8K_USE_AUTO_RATE 0x0002
  2283. #define MWL8K_UCAST_RATE 0
  2284. static int mwl8k_cmd_use_fixed_rate_sta(struct ieee80211_hw *hw)
  2285. {
  2286. struct mwl8k_cmd_use_fixed_rate_sta *cmd;
  2287. int rc;
  2288. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2289. if (cmd == NULL)
  2290. return -ENOMEM;
  2291. cmd->header.code = cpu_to_le16(MWL8K_CMD_USE_FIXED_RATE);
  2292. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2293. cmd->action = cpu_to_le32(MWL8K_USE_AUTO_RATE);
  2294. cmd->rate_type = cpu_to_le32(MWL8K_UCAST_RATE);
  2295. rc = mwl8k_post_cmd(hw, &cmd->header);
  2296. kfree(cmd);
  2297. return rc;
  2298. }
  2299. /*
  2300. * CMD_USE_FIXED_RATE (AP version).
  2301. */
  2302. struct mwl8k_cmd_use_fixed_rate_ap {
  2303. struct mwl8k_cmd_pkt header;
  2304. __le32 action;
  2305. __le32 allow_rate_drop;
  2306. __le32 num_rates;
  2307. struct mwl8k_rate_entry_ap {
  2308. __le32 is_ht_rate;
  2309. __le32 enable_retry;
  2310. __le32 rate;
  2311. __le32 retry_count;
  2312. } rate_entry[4];
  2313. u8 multicast_rate;
  2314. u8 multicast_rate_type;
  2315. u8 management_rate;
  2316. } __packed;
  2317. static int
  2318. mwl8k_cmd_use_fixed_rate_ap(struct ieee80211_hw *hw, int mcast, int mgmt)
  2319. {
  2320. struct mwl8k_cmd_use_fixed_rate_ap *cmd;
  2321. int rc;
  2322. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2323. if (cmd == NULL)
  2324. return -ENOMEM;
  2325. cmd->header.code = cpu_to_le16(MWL8K_CMD_USE_FIXED_RATE);
  2326. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2327. cmd->action = cpu_to_le32(MWL8K_USE_AUTO_RATE);
  2328. cmd->multicast_rate = mcast;
  2329. cmd->management_rate = mgmt;
  2330. rc = mwl8k_post_cmd(hw, &cmd->header);
  2331. kfree(cmd);
  2332. return rc;
  2333. }
  2334. /*
  2335. * CMD_ENABLE_SNIFFER.
  2336. */
  2337. struct mwl8k_cmd_enable_sniffer {
  2338. struct mwl8k_cmd_pkt header;
  2339. __le32 action;
  2340. } __packed;
  2341. static int mwl8k_cmd_enable_sniffer(struct ieee80211_hw *hw, bool enable)
  2342. {
  2343. struct mwl8k_cmd_enable_sniffer *cmd;
  2344. int rc;
  2345. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2346. if (cmd == NULL)
  2347. return -ENOMEM;
  2348. cmd->header.code = cpu_to_le16(MWL8K_CMD_ENABLE_SNIFFER);
  2349. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2350. cmd->action = cpu_to_le32(!!enable);
  2351. rc = mwl8k_post_cmd(hw, &cmd->header);
  2352. kfree(cmd);
  2353. return rc;
  2354. }
  2355. /*
  2356. * CMD_SET_MAC_ADDR.
  2357. */
  2358. struct mwl8k_cmd_set_mac_addr {
  2359. struct mwl8k_cmd_pkt header;
  2360. union {
  2361. struct {
  2362. __le16 mac_type;
  2363. __u8 mac_addr[ETH_ALEN];
  2364. } mbss;
  2365. __u8 mac_addr[ETH_ALEN];
  2366. };
  2367. } __packed;
  2368. #define MWL8K_MAC_TYPE_PRIMARY_CLIENT 0
  2369. #define MWL8K_MAC_TYPE_SECONDARY_CLIENT 1
  2370. #define MWL8K_MAC_TYPE_PRIMARY_AP 2
  2371. #define MWL8K_MAC_TYPE_SECONDARY_AP 3
  2372. static int mwl8k_cmd_set_mac_addr(struct ieee80211_hw *hw,
  2373. struct ieee80211_vif *vif, u8 *mac)
  2374. {
  2375. struct mwl8k_priv *priv = hw->priv;
  2376. struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif);
  2377. struct mwl8k_cmd_set_mac_addr *cmd;
  2378. int mac_type;
  2379. int rc;
  2380. mac_type = MWL8K_MAC_TYPE_PRIMARY_AP;
  2381. if (vif != NULL && vif->type == NL80211_IFTYPE_STATION) {
  2382. if (mwl8k_vif->macid + 1 == ffs(priv->sta_macids_supported))
  2383. mac_type = MWL8K_MAC_TYPE_PRIMARY_CLIENT;
  2384. else
  2385. mac_type = MWL8K_MAC_TYPE_SECONDARY_CLIENT;
  2386. } else if (vif != NULL && vif->type == NL80211_IFTYPE_AP) {
  2387. if (mwl8k_vif->macid + 1 == ffs(priv->ap_macids_supported))
  2388. mac_type = MWL8K_MAC_TYPE_PRIMARY_AP;
  2389. else
  2390. mac_type = MWL8K_MAC_TYPE_SECONDARY_AP;
  2391. }
  2392. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2393. if (cmd == NULL)
  2394. return -ENOMEM;
  2395. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_MAC_ADDR);
  2396. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2397. if (priv->ap_fw) {
  2398. cmd->mbss.mac_type = cpu_to_le16(mac_type);
  2399. memcpy(cmd->mbss.mac_addr, mac, ETH_ALEN);
  2400. } else {
  2401. memcpy(cmd->mac_addr, mac, ETH_ALEN);
  2402. }
  2403. rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
  2404. kfree(cmd);
  2405. return rc;
  2406. }
  2407. /*
  2408. * CMD_SET_RATEADAPT_MODE.
  2409. */
  2410. struct mwl8k_cmd_set_rate_adapt_mode {
  2411. struct mwl8k_cmd_pkt header;
  2412. __le16 action;
  2413. __le16 mode;
  2414. } __packed;
  2415. static int mwl8k_cmd_set_rateadapt_mode(struct ieee80211_hw *hw, __u16 mode)
  2416. {
  2417. struct mwl8k_cmd_set_rate_adapt_mode *cmd;
  2418. int rc;
  2419. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2420. if (cmd == NULL)
  2421. return -ENOMEM;
  2422. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RATEADAPT_MODE);
  2423. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2424. cmd->action = cpu_to_le16(MWL8K_CMD_SET);
  2425. cmd->mode = cpu_to_le16(mode);
  2426. rc = mwl8k_post_cmd(hw, &cmd->header);
  2427. kfree(cmd);
  2428. return rc;
  2429. }
  2430. /*
  2431. * CMD_BSS_START.
  2432. */
  2433. struct mwl8k_cmd_bss_start {
  2434. struct mwl8k_cmd_pkt header;
  2435. __le32 enable;
  2436. } __packed;
  2437. static int mwl8k_cmd_bss_start(struct ieee80211_hw *hw,
  2438. struct ieee80211_vif *vif, int enable)
  2439. {
  2440. struct mwl8k_cmd_bss_start *cmd;
  2441. int rc;
  2442. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2443. if (cmd == NULL)
  2444. return -ENOMEM;
  2445. cmd->header.code = cpu_to_le16(MWL8K_CMD_BSS_START);
  2446. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2447. cmd->enable = cpu_to_le32(enable);
  2448. rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
  2449. kfree(cmd);
  2450. return rc;
  2451. }
  2452. /*
  2453. * CMD_SET_NEW_STN.
  2454. */
  2455. struct mwl8k_cmd_set_new_stn {
  2456. struct mwl8k_cmd_pkt header;
  2457. __le16 aid;
  2458. __u8 mac_addr[6];
  2459. __le16 stn_id;
  2460. __le16 action;
  2461. __le16 rsvd;
  2462. __le32 legacy_rates;
  2463. __u8 ht_rates[4];
  2464. __le16 cap_info;
  2465. __le16 ht_capabilities_info;
  2466. __u8 mac_ht_param_info;
  2467. __u8 rev;
  2468. __u8 control_channel;
  2469. __u8 add_channel;
  2470. __le16 op_mode;
  2471. __le16 stbc;
  2472. __u8 add_qos_info;
  2473. __u8 is_qos_sta;
  2474. __le32 fw_sta_ptr;
  2475. } __packed;
  2476. #define MWL8K_STA_ACTION_ADD 0
  2477. #define MWL8K_STA_ACTION_REMOVE 2
  2478. static int mwl8k_cmd_set_new_stn_add(struct ieee80211_hw *hw,
  2479. struct ieee80211_vif *vif,
  2480. struct ieee80211_sta *sta)
  2481. {
  2482. struct mwl8k_cmd_set_new_stn *cmd;
  2483. u32 rates;
  2484. int rc;
  2485. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2486. if (cmd == NULL)
  2487. return -ENOMEM;
  2488. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_NEW_STN);
  2489. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2490. cmd->aid = cpu_to_le16(sta->aid);
  2491. memcpy(cmd->mac_addr, sta->addr, ETH_ALEN);
  2492. cmd->stn_id = cpu_to_le16(sta->aid);
  2493. cmd->action = cpu_to_le16(MWL8K_STA_ACTION_ADD);
  2494. if (hw->conf.channel->band == IEEE80211_BAND_2GHZ)
  2495. rates = sta->supp_rates[IEEE80211_BAND_2GHZ];
  2496. else
  2497. rates = sta->supp_rates[IEEE80211_BAND_5GHZ] << 5;
  2498. cmd->legacy_rates = cpu_to_le32(rates);
  2499. if (sta->ht_cap.ht_supported) {
  2500. cmd->ht_rates[0] = sta->ht_cap.mcs.rx_mask[0];
  2501. cmd->ht_rates[1] = sta->ht_cap.mcs.rx_mask[1];
  2502. cmd->ht_rates[2] = sta->ht_cap.mcs.rx_mask[2];
  2503. cmd->ht_rates[3] = sta->ht_cap.mcs.rx_mask[3];
  2504. cmd->ht_capabilities_info = cpu_to_le16(sta->ht_cap.cap);
  2505. cmd->mac_ht_param_info = (sta->ht_cap.ampdu_factor & 3) |
  2506. ((sta->ht_cap.ampdu_density & 7) << 2);
  2507. cmd->is_qos_sta = 1;
  2508. }
  2509. rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
  2510. kfree(cmd);
  2511. return rc;
  2512. }
  2513. static int mwl8k_cmd_set_new_stn_add_self(struct ieee80211_hw *hw,
  2514. struct ieee80211_vif *vif)
  2515. {
  2516. struct mwl8k_cmd_set_new_stn *cmd;
  2517. int rc;
  2518. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2519. if (cmd == NULL)
  2520. return -ENOMEM;
  2521. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_NEW_STN);
  2522. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2523. memcpy(cmd->mac_addr, vif->addr, ETH_ALEN);
  2524. rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
  2525. kfree(cmd);
  2526. return rc;
  2527. }
  2528. static int mwl8k_cmd_set_new_stn_del(struct ieee80211_hw *hw,
  2529. struct ieee80211_vif *vif, u8 *addr)
  2530. {
  2531. struct mwl8k_cmd_set_new_stn *cmd;
  2532. int rc;
  2533. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2534. if (cmd == NULL)
  2535. return -ENOMEM;
  2536. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_NEW_STN);
  2537. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2538. memcpy(cmd->mac_addr, addr, ETH_ALEN);
  2539. cmd->action = cpu_to_le16(MWL8K_STA_ACTION_REMOVE);
  2540. rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
  2541. kfree(cmd);
  2542. return rc;
  2543. }
  2544. /*
  2545. * CMD_UPDATE_STADB.
  2546. */
  2547. struct ewc_ht_info {
  2548. __le16 control1;
  2549. __le16 control2;
  2550. __le16 control3;
  2551. } __packed;
  2552. struct peer_capability_info {
  2553. /* Peer type - AP vs. STA. */
  2554. __u8 peer_type;
  2555. /* Basic 802.11 capabilities from assoc resp. */
  2556. __le16 basic_caps;
  2557. /* Set if peer supports 802.11n high throughput (HT). */
  2558. __u8 ht_support;
  2559. /* Valid if HT is supported. */
  2560. __le16 ht_caps;
  2561. __u8 extended_ht_caps;
  2562. struct ewc_ht_info ewc_info;
  2563. /* Legacy rate table. Intersection of our rates and peer rates. */
  2564. __u8 legacy_rates[12];
  2565. /* HT rate table. Intersection of our rates and peer rates. */
  2566. __u8 ht_rates[16];
  2567. __u8 pad[16];
  2568. /* If set, interoperability mode, no proprietary extensions. */
  2569. __u8 interop;
  2570. __u8 pad2;
  2571. __u8 station_id;
  2572. __le16 amsdu_enabled;
  2573. } __packed;
  2574. struct mwl8k_cmd_update_stadb {
  2575. struct mwl8k_cmd_pkt header;
  2576. /* See STADB_ACTION_TYPE */
  2577. __le32 action;
  2578. /* Peer MAC address */
  2579. __u8 peer_addr[ETH_ALEN];
  2580. __le32 reserved;
  2581. /* Peer info - valid during add/update. */
  2582. struct peer_capability_info peer_info;
  2583. } __packed;
  2584. #define MWL8K_STA_DB_MODIFY_ENTRY 1
  2585. #define MWL8K_STA_DB_DEL_ENTRY 2
  2586. /* Peer Entry flags - used to define the type of the peer node */
  2587. #define MWL8K_PEER_TYPE_ACCESSPOINT 2
  2588. static int mwl8k_cmd_update_stadb_add(struct ieee80211_hw *hw,
  2589. struct ieee80211_vif *vif,
  2590. struct ieee80211_sta *sta)
  2591. {
  2592. struct mwl8k_cmd_update_stadb *cmd;
  2593. struct peer_capability_info *p;
  2594. u32 rates;
  2595. int rc;
  2596. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2597. if (cmd == NULL)
  2598. return -ENOMEM;
  2599. cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_STADB);
  2600. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2601. cmd->action = cpu_to_le32(MWL8K_STA_DB_MODIFY_ENTRY);
  2602. memcpy(cmd->peer_addr, sta->addr, ETH_ALEN);
  2603. p = &cmd->peer_info;
  2604. p->peer_type = MWL8K_PEER_TYPE_ACCESSPOINT;
  2605. p->basic_caps = cpu_to_le16(vif->bss_conf.assoc_capability);
  2606. p->ht_support = sta->ht_cap.ht_supported;
  2607. p->ht_caps = cpu_to_le16(sta->ht_cap.cap);
  2608. p->extended_ht_caps = (sta->ht_cap.ampdu_factor & 3) |
  2609. ((sta->ht_cap.ampdu_density & 7) << 2);
  2610. if (hw->conf.channel->band == IEEE80211_BAND_2GHZ)
  2611. rates = sta->supp_rates[IEEE80211_BAND_2GHZ];
  2612. else
  2613. rates = sta->supp_rates[IEEE80211_BAND_5GHZ] << 5;
  2614. legacy_rate_mask_to_array(p->legacy_rates, rates);
  2615. memcpy(p->ht_rates, sta->ht_cap.mcs.rx_mask, 16);
  2616. p->interop = 1;
  2617. p->amsdu_enabled = 0;
  2618. rc = mwl8k_post_cmd(hw, &cmd->header);
  2619. kfree(cmd);
  2620. return rc ? rc : p->station_id;
  2621. }
  2622. static int mwl8k_cmd_update_stadb_del(struct ieee80211_hw *hw,
  2623. struct ieee80211_vif *vif, u8 *addr)
  2624. {
  2625. struct mwl8k_cmd_update_stadb *cmd;
  2626. int rc;
  2627. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2628. if (cmd == NULL)
  2629. return -ENOMEM;
  2630. cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_STADB);
  2631. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2632. cmd->action = cpu_to_le32(MWL8K_STA_DB_DEL_ENTRY);
  2633. memcpy(cmd->peer_addr, addr, ETH_ALEN);
  2634. rc = mwl8k_post_cmd(hw, &cmd->header);
  2635. kfree(cmd);
  2636. return rc;
  2637. }
  2638. /*
  2639. * Interrupt handling.
  2640. */
  2641. static irqreturn_t mwl8k_interrupt(int irq, void *dev_id)
  2642. {
  2643. struct ieee80211_hw *hw = dev_id;
  2644. struct mwl8k_priv *priv = hw->priv;
  2645. u32 status;
  2646. status = ioread32(priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
  2647. if (!status)
  2648. return IRQ_NONE;
  2649. if (status & MWL8K_A2H_INT_TX_DONE) {
  2650. status &= ~MWL8K_A2H_INT_TX_DONE;
  2651. tasklet_schedule(&priv->poll_tx_task);
  2652. }
  2653. if (status & MWL8K_A2H_INT_RX_READY) {
  2654. status &= ~MWL8K_A2H_INT_RX_READY;
  2655. tasklet_schedule(&priv->poll_rx_task);
  2656. }
  2657. if (status)
  2658. iowrite32(~status, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
  2659. if (status & MWL8K_A2H_INT_OPC_DONE) {
  2660. if (priv->hostcmd_wait != NULL)
  2661. complete(priv->hostcmd_wait);
  2662. }
  2663. if (status & MWL8K_A2H_INT_QUEUE_EMPTY) {
  2664. if (!mutex_is_locked(&priv->fw_mutex) &&
  2665. priv->radio_on && priv->pending_tx_pkts)
  2666. mwl8k_tx_start(priv);
  2667. }
  2668. return IRQ_HANDLED;
  2669. }
  2670. static void mwl8k_tx_poll(unsigned long data)
  2671. {
  2672. struct ieee80211_hw *hw = (struct ieee80211_hw *)data;
  2673. struct mwl8k_priv *priv = hw->priv;
  2674. int limit;
  2675. int i;
  2676. limit = 32;
  2677. spin_lock_bh(&priv->tx_lock);
  2678. for (i = 0; i < MWL8K_TX_QUEUES; i++)
  2679. limit -= mwl8k_txq_reclaim(hw, i, limit, 0);
  2680. if (!priv->pending_tx_pkts && priv->tx_wait != NULL) {
  2681. complete(priv->tx_wait);
  2682. priv->tx_wait = NULL;
  2683. }
  2684. spin_unlock_bh(&priv->tx_lock);
  2685. if (limit) {
  2686. writel(~MWL8K_A2H_INT_TX_DONE,
  2687. priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
  2688. } else {
  2689. tasklet_schedule(&priv->poll_tx_task);
  2690. }
  2691. }
  2692. static void mwl8k_rx_poll(unsigned long data)
  2693. {
  2694. struct ieee80211_hw *hw = (struct ieee80211_hw *)data;
  2695. struct mwl8k_priv *priv = hw->priv;
  2696. int limit;
  2697. limit = 32;
  2698. limit -= rxq_process(hw, 0, limit);
  2699. limit -= rxq_refill(hw, 0, limit);
  2700. if (limit) {
  2701. writel(~MWL8K_A2H_INT_RX_READY,
  2702. priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
  2703. } else {
  2704. tasklet_schedule(&priv->poll_rx_task);
  2705. }
  2706. }
  2707. /*
  2708. * Core driver operations.
  2709. */
  2710. static int mwl8k_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
  2711. {
  2712. struct mwl8k_priv *priv = hw->priv;
  2713. int index = skb_get_queue_mapping(skb);
  2714. int rc;
  2715. if (!priv->radio_on) {
  2716. wiphy_debug(hw->wiphy,
  2717. "dropped TX frame since radio disabled\n");
  2718. dev_kfree_skb(skb);
  2719. return NETDEV_TX_OK;
  2720. }
  2721. rc = mwl8k_txq_xmit(hw, index, skb);
  2722. return rc;
  2723. }
  2724. static int mwl8k_start(struct ieee80211_hw *hw)
  2725. {
  2726. struct mwl8k_priv *priv = hw->priv;
  2727. int rc;
  2728. rc = request_irq(priv->pdev->irq, mwl8k_interrupt,
  2729. IRQF_SHARED, MWL8K_NAME, hw);
  2730. if (rc) {
  2731. wiphy_err(hw->wiphy, "failed to register IRQ handler\n");
  2732. return -EIO;
  2733. }
  2734. /* Enable TX reclaim and RX tasklets. */
  2735. tasklet_enable(&priv->poll_tx_task);
  2736. tasklet_enable(&priv->poll_rx_task);
  2737. /* Enable interrupts */
  2738. iowrite32(MWL8K_A2H_EVENTS, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
  2739. rc = mwl8k_fw_lock(hw);
  2740. if (!rc) {
  2741. rc = mwl8k_cmd_radio_enable(hw);
  2742. if (!priv->ap_fw) {
  2743. if (!rc)
  2744. rc = mwl8k_cmd_enable_sniffer(hw, 0);
  2745. if (!rc)
  2746. rc = mwl8k_cmd_set_pre_scan(hw);
  2747. if (!rc)
  2748. rc = mwl8k_cmd_set_post_scan(hw,
  2749. "\x00\x00\x00\x00\x00\x00");
  2750. }
  2751. if (!rc)
  2752. rc = mwl8k_cmd_set_rateadapt_mode(hw, 0);
  2753. if (!rc)
  2754. rc = mwl8k_cmd_set_wmm_mode(hw, 0);
  2755. mwl8k_fw_unlock(hw);
  2756. }
  2757. if (rc) {
  2758. iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
  2759. free_irq(priv->pdev->irq, hw);
  2760. tasklet_disable(&priv->poll_tx_task);
  2761. tasklet_disable(&priv->poll_rx_task);
  2762. }
  2763. return rc;
  2764. }
  2765. static void mwl8k_stop(struct ieee80211_hw *hw)
  2766. {
  2767. struct mwl8k_priv *priv = hw->priv;
  2768. int i;
  2769. mwl8k_cmd_radio_disable(hw);
  2770. ieee80211_stop_queues(hw);
  2771. /* Disable interrupts */
  2772. iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
  2773. free_irq(priv->pdev->irq, hw);
  2774. /* Stop finalize join worker */
  2775. cancel_work_sync(&priv->finalize_join_worker);
  2776. if (priv->beacon_skb != NULL)
  2777. dev_kfree_skb(priv->beacon_skb);
  2778. /* Stop TX reclaim and RX tasklets. */
  2779. tasklet_disable(&priv->poll_tx_task);
  2780. tasklet_disable(&priv->poll_rx_task);
  2781. /* Return all skbs to mac80211 */
  2782. for (i = 0; i < MWL8K_TX_QUEUES; i++)
  2783. mwl8k_txq_reclaim(hw, i, INT_MAX, 1);
  2784. }
  2785. static int mwl8k_reload_firmware(struct ieee80211_hw *hw, char *fw_image);
  2786. static int mwl8k_add_interface(struct ieee80211_hw *hw,
  2787. struct ieee80211_vif *vif)
  2788. {
  2789. struct mwl8k_priv *priv = hw->priv;
  2790. struct mwl8k_vif *mwl8k_vif;
  2791. u32 macids_supported;
  2792. int macid, rc;
  2793. struct mwl8k_device_info *di;
  2794. /*
  2795. * Reject interface creation if sniffer mode is active, as
  2796. * STA operation is mutually exclusive with hardware sniffer
  2797. * mode. (Sniffer mode is only used on STA firmware.)
  2798. */
  2799. if (priv->sniffer_enabled) {
  2800. wiphy_info(hw->wiphy,
  2801. "unable to create STA interface because sniffer mode is enabled\n");
  2802. return -EINVAL;
  2803. }
  2804. di = priv->device_info;
  2805. switch (vif->type) {
  2806. case NL80211_IFTYPE_AP:
  2807. if (!priv->ap_fw && di->fw_image_ap) {
  2808. /* we must load the ap fw to meet this request */
  2809. if (!list_empty(&priv->vif_list))
  2810. return -EBUSY;
  2811. rc = mwl8k_reload_firmware(hw, di->fw_image_ap);
  2812. if (rc)
  2813. return rc;
  2814. }
  2815. macids_supported = priv->ap_macids_supported;
  2816. break;
  2817. case NL80211_IFTYPE_STATION:
  2818. if (priv->ap_fw && di->fw_image_sta) {
  2819. /* we must load the sta fw to meet this request */
  2820. if (!list_empty(&priv->vif_list))
  2821. return -EBUSY;
  2822. rc = mwl8k_reload_firmware(hw, di->fw_image_sta);
  2823. if (rc)
  2824. return rc;
  2825. }
  2826. macids_supported = priv->sta_macids_supported;
  2827. break;
  2828. default:
  2829. return -EINVAL;
  2830. }
  2831. macid = ffs(macids_supported & ~priv->macids_used);
  2832. if (!macid--)
  2833. return -EBUSY;
  2834. /* Setup driver private area. */
  2835. mwl8k_vif = MWL8K_VIF(vif);
  2836. memset(mwl8k_vif, 0, sizeof(*mwl8k_vif));
  2837. mwl8k_vif->vif = vif;
  2838. mwl8k_vif->macid = macid;
  2839. mwl8k_vif->seqno = 0;
  2840. /* Set the mac address. */
  2841. mwl8k_cmd_set_mac_addr(hw, vif, vif->addr);
  2842. if (priv->ap_fw)
  2843. mwl8k_cmd_set_new_stn_add_self(hw, vif);
  2844. priv->macids_used |= 1 << mwl8k_vif->macid;
  2845. list_add_tail(&mwl8k_vif->list, &priv->vif_list);
  2846. return 0;
  2847. }
  2848. static void mwl8k_remove_interface(struct ieee80211_hw *hw,
  2849. struct ieee80211_vif *vif)
  2850. {
  2851. struct mwl8k_priv *priv = hw->priv;
  2852. struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif);
  2853. if (priv->ap_fw)
  2854. mwl8k_cmd_set_new_stn_del(hw, vif, vif->addr);
  2855. mwl8k_cmd_set_mac_addr(hw, vif, "\x00\x00\x00\x00\x00\x00");
  2856. priv->macids_used &= ~(1 << mwl8k_vif->macid);
  2857. list_del(&mwl8k_vif->list);
  2858. }
  2859. static int mwl8k_config(struct ieee80211_hw *hw, u32 changed)
  2860. {
  2861. struct ieee80211_conf *conf = &hw->conf;
  2862. struct mwl8k_priv *priv = hw->priv;
  2863. int rc;
  2864. if (conf->flags & IEEE80211_CONF_IDLE) {
  2865. mwl8k_cmd_radio_disable(hw);
  2866. return 0;
  2867. }
  2868. rc = mwl8k_fw_lock(hw);
  2869. if (rc)
  2870. return rc;
  2871. rc = mwl8k_cmd_radio_enable(hw);
  2872. if (rc)
  2873. goto out;
  2874. rc = mwl8k_cmd_set_rf_channel(hw, conf);
  2875. if (rc)
  2876. goto out;
  2877. if (conf->power_level > 18)
  2878. conf->power_level = 18;
  2879. if (priv->ap_fw) {
  2880. rc = mwl8k_cmd_tx_power(hw, conf, conf->power_level);
  2881. if (rc)
  2882. goto out;
  2883. rc = mwl8k_cmd_rf_antenna(hw, MWL8K_RF_ANTENNA_RX, 0x7);
  2884. if (!rc)
  2885. rc = mwl8k_cmd_rf_antenna(hw, MWL8K_RF_ANTENNA_TX, 0x7);
  2886. } else {
  2887. rc = mwl8k_cmd_rf_tx_power(hw, conf->power_level);
  2888. if (rc)
  2889. goto out;
  2890. rc = mwl8k_cmd_mimo_config(hw, 0x7, 0x7);
  2891. }
  2892. out:
  2893. mwl8k_fw_unlock(hw);
  2894. return rc;
  2895. }
  2896. static void
  2897. mwl8k_bss_info_changed_sta(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
  2898. struct ieee80211_bss_conf *info, u32 changed)
  2899. {
  2900. struct mwl8k_priv *priv = hw->priv;
  2901. u32 ap_legacy_rates;
  2902. u8 ap_mcs_rates[16];
  2903. int rc;
  2904. if (mwl8k_fw_lock(hw))
  2905. return;
  2906. /*
  2907. * No need to capture a beacon if we're no longer associated.
  2908. */
  2909. if ((changed & BSS_CHANGED_ASSOC) && !vif->bss_conf.assoc)
  2910. priv->capture_beacon = false;
  2911. /*
  2912. * Get the AP's legacy and MCS rates.
  2913. */
  2914. if (vif->bss_conf.assoc) {
  2915. struct ieee80211_sta *ap;
  2916. rcu_read_lock();
  2917. ap = ieee80211_find_sta(vif, vif->bss_conf.bssid);
  2918. if (ap == NULL) {
  2919. rcu_read_unlock();
  2920. goto out;
  2921. }
  2922. if (hw->conf.channel->band == IEEE80211_BAND_2GHZ) {
  2923. ap_legacy_rates = ap->supp_rates[IEEE80211_BAND_2GHZ];
  2924. } else {
  2925. ap_legacy_rates =
  2926. ap->supp_rates[IEEE80211_BAND_5GHZ] << 5;
  2927. }
  2928. memcpy(ap_mcs_rates, ap->ht_cap.mcs.rx_mask, 16);
  2929. rcu_read_unlock();
  2930. }
  2931. if ((changed & BSS_CHANGED_ASSOC) && vif->bss_conf.assoc) {
  2932. rc = mwl8k_cmd_set_rate(hw, vif, ap_legacy_rates, ap_mcs_rates);
  2933. if (rc)
  2934. goto out;
  2935. rc = mwl8k_cmd_use_fixed_rate_sta(hw);
  2936. if (rc)
  2937. goto out;
  2938. }
  2939. if (changed & BSS_CHANGED_ERP_PREAMBLE) {
  2940. rc = mwl8k_set_radio_preamble(hw,
  2941. vif->bss_conf.use_short_preamble);
  2942. if (rc)
  2943. goto out;
  2944. }
  2945. if (changed & BSS_CHANGED_ERP_SLOT) {
  2946. rc = mwl8k_cmd_set_slot(hw, vif->bss_conf.use_short_slot);
  2947. if (rc)
  2948. goto out;
  2949. }
  2950. if (vif->bss_conf.assoc &&
  2951. (changed & (BSS_CHANGED_ASSOC | BSS_CHANGED_ERP_CTS_PROT |
  2952. BSS_CHANGED_HT))) {
  2953. rc = mwl8k_cmd_set_aid(hw, vif, ap_legacy_rates);
  2954. if (rc)
  2955. goto out;
  2956. }
  2957. if (vif->bss_conf.assoc &&
  2958. (changed & (BSS_CHANGED_ASSOC | BSS_CHANGED_BEACON_INT))) {
  2959. /*
  2960. * Finalize the join. Tell rx handler to process
  2961. * next beacon from our BSSID.
  2962. */
  2963. memcpy(priv->capture_bssid, vif->bss_conf.bssid, ETH_ALEN);
  2964. priv->capture_beacon = true;
  2965. }
  2966. out:
  2967. mwl8k_fw_unlock(hw);
  2968. }
  2969. static void
  2970. mwl8k_bss_info_changed_ap(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
  2971. struct ieee80211_bss_conf *info, u32 changed)
  2972. {
  2973. int rc;
  2974. if (mwl8k_fw_lock(hw))
  2975. return;
  2976. if (changed & BSS_CHANGED_ERP_PREAMBLE) {
  2977. rc = mwl8k_set_radio_preamble(hw,
  2978. vif->bss_conf.use_short_preamble);
  2979. if (rc)
  2980. goto out;
  2981. }
  2982. if (changed & BSS_CHANGED_BASIC_RATES) {
  2983. int idx;
  2984. int rate;
  2985. /*
  2986. * Use lowest supported basic rate for multicasts
  2987. * and management frames (such as probe responses --
  2988. * beacons will always go out at 1 Mb/s).
  2989. */
  2990. idx = ffs(vif->bss_conf.basic_rates);
  2991. if (idx)
  2992. idx--;
  2993. if (hw->conf.channel->band == IEEE80211_BAND_2GHZ)
  2994. rate = mwl8k_rates_24[idx].hw_value;
  2995. else
  2996. rate = mwl8k_rates_50[idx].hw_value;
  2997. mwl8k_cmd_use_fixed_rate_ap(hw, rate, rate);
  2998. }
  2999. if (changed & (BSS_CHANGED_BEACON_INT | BSS_CHANGED_BEACON)) {
  3000. struct sk_buff *skb;
  3001. skb = ieee80211_beacon_get(hw, vif);
  3002. if (skb != NULL) {
  3003. mwl8k_cmd_set_beacon(hw, vif, skb->data, skb->len);
  3004. kfree_skb(skb);
  3005. }
  3006. }
  3007. if (changed & BSS_CHANGED_BEACON_ENABLED)
  3008. mwl8k_cmd_bss_start(hw, vif, info->enable_beacon);
  3009. out:
  3010. mwl8k_fw_unlock(hw);
  3011. }
  3012. static void
  3013. mwl8k_bss_info_changed(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
  3014. struct ieee80211_bss_conf *info, u32 changed)
  3015. {
  3016. struct mwl8k_priv *priv = hw->priv;
  3017. if (!priv->ap_fw)
  3018. mwl8k_bss_info_changed_sta(hw, vif, info, changed);
  3019. else
  3020. mwl8k_bss_info_changed_ap(hw, vif, info, changed);
  3021. }
  3022. static u64 mwl8k_prepare_multicast(struct ieee80211_hw *hw,
  3023. struct netdev_hw_addr_list *mc_list)
  3024. {
  3025. struct mwl8k_cmd_pkt *cmd;
  3026. /*
  3027. * Synthesize and return a command packet that programs the
  3028. * hardware multicast address filter. At this point we don't
  3029. * know whether FIF_ALLMULTI is being requested, but if it is,
  3030. * we'll end up throwing this packet away and creating a new
  3031. * one in mwl8k_configure_filter().
  3032. */
  3033. cmd = __mwl8k_cmd_mac_multicast_adr(hw, 0, mc_list);
  3034. return (unsigned long)cmd;
  3035. }
  3036. static int
  3037. mwl8k_configure_filter_sniffer(struct ieee80211_hw *hw,
  3038. unsigned int changed_flags,
  3039. unsigned int *total_flags)
  3040. {
  3041. struct mwl8k_priv *priv = hw->priv;
  3042. /*
  3043. * Hardware sniffer mode is mutually exclusive with STA
  3044. * operation, so refuse to enable sniffer mode if a STA
  3045. * interface is active.
  3046. */
  3047. if (!list_empty(&priv->vif_list)) {
  3048. if (net_ratelimit())
  3049. wiphy_info(hw->wiphy,
  3050. "not enabling sniffer mode because STA interface is active\n");
  3051. return 0;
  3052. }
  3053. if (!priv->sniffer_enabled) {
  3054. if (mwl8k_cmd_enable_sniffer(hw, 1))
  3055. return 0;
  3056. priv->sniffer_enabled = true;
  3057. }
  3058. *total_flags &= FIF_PROMISC_IN_BSS | FIF_ALLMULTI |
  3059. FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL |
  3060. FIF_OTHER_BSS;
  3061. return 1;
  3062. }
  3063. static struct mwl8k_vif *mwl8k_first_vif(struct mwl8k_priv *priv)
  3064. {
  3065. if (!list_empty(&priv->vif_list))
  3066. return list_entry(priv->vif_list.next, struct mwl8k_vif, list);
  3067. return NULL;
  3068. }
  3069. static void mwl8k_configure_filter(struct ieee80211_hw *hw,
  3070. unsigned int changed_flags,
  3071. unsigned int *total_flags,
  3072. u64 multicast)
  3073. {
  3074. struct mwl8k_priv *priv = hw->priv;
  3075. struct mwl8k_cmd_pkt *cmd = (void *)(unsigned long)multicast;
  3076. /*
  3077. * AP firmware doesn't allow fine-grained control over
  3078. * the receive filter.
  3079. */
  3080. if (priv->ap_fw) {
  3081. *total_flags &= FIF_ALLMULTI | FIF_BCN_PRBRESP_PROMISC;
  3082. kfree(cmd);
  3083. return;
  3084. }
  3085. /*
  3086. * Enable hardware sniffer mode if FIF_CONTROL or
  3087. * FIF_OTHER_BSS is requested.
  3088. */
  3089. if (*total_flags & (FIF_CONTROL | FIF_OTHER_BSS) &&
  3090. mwl8k_configure_filter_sniffer(hw, changed_flags, total_flags)) {
  3091. kfree(cmd);
  3092. return;
  3093. }
  3094. /* Clear unsupported feature flags */
  3095. *total_flags &= FIF_ALLMULTI | FIF_BCN_PRBRESP_PROMISC;
  3096. if (mwl8k_fw_lock(hw)) {
  3097. kfree(cmd);
  3098. return;
  3099. }
  3100. if (priv->sniffer_enabled) {
  3101. mwl8k_cmd_enable_sniffer(hw, 0);
  3102. priv->sniffer_enabled = false;
  3103. }
  3104. if (changed_flags & FIF_BCN_PRBRESP_PROMISC) {
  3105. if (*total_flags & FIF_BCN_PRBRESP_PROMISC) {
  3106. /*
  3107. * Disable the BSS filter.
  3108. */
  3109. mwl8k_cmd_set_pre_scan(hw);
  3110. } else {
  3111. struct mwl8k_vif *mwl8k_vif;
  3112. const u8 *bssid;
  3113. /*
  3114. * Enable the BSS filter.
  3115. *
  3116. * If there is an active STA interface, use that
  3117. * interface's BSSID, otherwise use a dummy one
  3118. * (where the OUI part needs to be nonzero for
  3119. * the BSSID to be accepted by POST_SCAN).
  3120. */
  3121. mwl8k_vif = mwl8k_first_vif(priv);
  3122. if (mwl8k_vif != NULL)
  3123. bssid = mwl8k_vif->vif->bss_conf.bssid;
  3124. else
  3125. bssid = "\x01\x00\x00\x00\x00\x00";
  3126. mwl8k_cmd_set_post_scan(hw, bssid);
  3127. }
  3128. }
  3129. /*
  3130. * If FIF_ALLMULTI is being requested, throw away the command
  3131. * packet that ->prepare_multicast() built and replace it with
  3132. * a command packet that enables reception of all multicast
  3133. * packets.
  3134. */
  3135. if (*total_flags & FIF_ALLMULTI) {
  3136. kfree(cmd);
  3137. cmd = __mwl8k_cmd_mac_multicast_adr(hw, 1, NULL);
  3138. }
  3139. if (cmd != NULL) {
  3140. mwl8k_post_cmd(hw, cmd);
  3141. kfree(cmd);
  3142. }
  3143. mwl8k_fw_unlock(hw);
  3144. }
  3145. static int mwl8k_set_rts_threshold(struct ieee80211_hw *hw, u32 value)
  3146. {
  3147. return mwl8k_cmd_set_rts_threshold(hw, value);
  3148. }
  3149. static int mwl8k_sta_remove(struct ieee80211_hw *hw,
  3150. struct ieee80211_vif *vif,
  3151. struct ieee80211_sta *sta)
  3152. {
  3153. struct mwl8k_priv *priv = hw->priv;
  3154. if (priv->ap_fw)
  3155. return mwl8k_cmd_set_new_stn_del(hw, vif, sta->addr);
  3156. else
  3157. return mwl8k_cmd_update_stadb_del(hw, vif, sta->addr);
  3158. }
  3159. static int mwl8k_sta_add(struct ieee80211_hw *hw,
  3160. struct ieee80211_vif *vif,
  3161. struct ieee80211_sta *sta)
  3162. {
  3163. struct mwl8k_priv *priv = hw->priv;
  3164. int ret;
  3165. if (!priv->ap_fw) {
  3166. ret = mwl8k_cmd_update_stadb_add(hw, vif, sta);
  3167. if (ret >= 0) {
  3168. MWL8K_STA(sta)->peer_id = ret;
  3169. return 0;
  3170. }
  3171. return ret;
  3172. }
  3173. return mwl8k_cmd_set_new_stn_add(hw, vif, sta);
  3174. }
  3175. static int mwl8k_conf_tx(struct ieee80211_hw *hw, u16 queue,
  3176. const struct ieee80211_tx_queue_params *params)
  3177. {
  3178. struct mwl8k_priv *priv = hw->priv;
  3179. int rc;
  3180. rc = mwl8k_fw_lock(hw);
  3181. if (!rc) {
  3182. BUG_ON(queue > MWL8K_TX_QUEUES - 1);
  3183. memcpy(&priv->wmm_params[queue], params, sizeof(*params));
  3184. if (!priv->wmm_enabled)
  3185. rc = mwl8k_cmd_set_wmm_mode(hw, 1);
  3186. if (!rc)
  3187. rc = mwl8k_cmd_set_edca_params(hw, queue,
  3188. params->cw_min,
  3189. params->cw_max,
  3190. params->aifs,
  3191. params->txop);
  3192. mwl8k_fw_unlock(hw);
  3193. }
  3194. return rc;
  3195. }
  3196. static int mwl8k_get_stats(struct ieee80211_hw *hw,
  3197. struct ieee80211_low_level_stats *stats)
  3198. {
  3199. return mwl8k_cmd_get_stat(hw, stats);
  3200. }
  3201. static int mwl8k_get_survey(struct ieee80211_hw *hw, int idx,
  3202. struct survey_info *survey)
  3203. {
  3204. struct mwl8k_priv *priv = hw->priv;
  3205. struct ieee80211_conf *conf = &hw->conf;
  3206. if (idx != 0)
  3207. return -ENOENT;
  3208. survey->channel = conf->channel;
  3209. survey->filled = SURVEY_INFO_NOISE_DBM;
  3210. survey->noise = priv->noise;
  3211. return 0;
  3212. }
  3213. static int
  3214. mwl8k_ampdu_action(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
  3215. enum ieee80211_ampdu_mlme_action action,
  3216. struct ieee80211_sta *sta, u16 tid, u16 *ssn)
  3217. {
  3218. switch (action) {
  3219. case IEEE80211_AMPDU_RX_START:
  3220. case IEEE80211_AMPDU_RX_STOP:
  3221. if (!(hw->flags & IEEE80211_HW_AMPDU_AGGREGATION))
  3222. return -ENOTSUPP;
  3223. return 0;
  3224. default:
  3225. return -ENOTSUPP;
  3226. }
  3227. }
  3228. static const struct ieee80211_ops mwl8k_ops = {
  3229. .tx = mwl8k_tx,
  3230. .start = mwl8k_start,
  3231. .stop = mwl8k_stop,
  3232. .add_interface = mwl8k_add_interface,
  3233. .remove_interface = mwl8k_remove_interface,
  3234. .config = mwl8k_config,
  3235. .bss_info_changed = mwl8k_bss_info_changed,
  3236. .prepare_multicast = mwl8k_prepare_multicast,
  3237. .configure_filter = mwl8k_configure_filter,
  3238. .set_rts_threshold = mwl8k_set_rts_threshold,
  3239. .sta_add = mwl8k_sta_add,
  3240. .sta_remove = mwl8k_sta_remove,
  3241. .conf_tx = mwl8k_conf_tx,
  3242. .get_stats = mwl8k_get_stats,
  3243. .get_survey = mwl8k_get_survey,
  3244. .ampdu_action = mwl8k_ampdu_action,
  3245. };
  3246. static void mwl8k_finalize_join_worker(struct work_struct *work)
  3247. {
  3248. struct mwl8k_priv *priv =
  3249. container_of(work, struct mwl8k_priv, finalize_join_worker);
  3250. struct sk_buff *skb = priv->beacon_skb;
  3251. struct ieee80211_mgmt *mgmt = (void *)skb->data;
  3252. int len = skb->len - offsetof(struct ieee80211_mgmt, u.beacon.variable);
  3253. const u8 *tim = cfg80211_find_ie(WLAN_EID_TIM,
  3254. mgmt->u.beacon.variable, len);
  3255. int dtim_period = 1;
  3256. if (tim && tim[1] >= 2)
  3257. dtim_period = tim[3];
  3258. mwl8k_cmd_finalize_join(priv->hw, skb->data, skb->len, dtim_period);
  3259. dev_kfree_skb(skb);
  3260. priv->beacon_skb = NULL;
  3261. }
  3262. enum {
  3263. MWL8363 = 0,
  3264. MWL8687,
  3265. MWL8366,
  3266. };
  3267. #define MWL8K_8366_AP_FW_API 1
  3268. #define _MWL8K_8366_AP_FW(api) "mwl8k/fmimage_8366_ap-" #api ".fw"
  3269. #define MWL8K_8366_AP_FW(api) _MWL8K_8366_AP_FW(api)
  3270. static struct mwl8k_device_info mwl8k_info_tbl[] __devinitdata = {
  3271. [MWL8363] = {
  3272. .part_name = "88w8363",
  3273. .helper_image = "mwl8k/helper_8363.fw",
  3274. .fw_image_sta = "mwl8k/fmimage_8363.fw",
  3275. },
  3276. [MWL8687] = {
  3277. .part_name = "88w8687",
  3278. .helper_image = "mwl8k/helper_8687.fw",
  3279. .fw_image_sta = "mwl8k/fmimage_8687.fw",
  3280. },
  3281. [MWL8366] = {
  3282. .part_name = "88w8366",
  3283. .helper_image = "mwl8k/helper_8366.fw",
  3284. .fw_image_sta = "mwl8k/fmimage_8366.fw",
  3285. .fw_image_ap = MWL8K_8366_AP_FW(MWL8K_8366_AP_FW_API),
  3286. .fw_api_ap = MWL8K_8366_AP_FW_API,
  3287. .ap_rxd_ops = &rxd_8366_ap_ops,
  3288. },
  3289. };
  3290. MODULE_FIRMWARE("mwl8k/helper_8363.fw");
  3291. MODULE_FIRMWARE("mwl8k/fmimage_8363.fw");
  3292. MODULE_FIRMWARE("mwl8k/helper_8687.fw");
  3293. MODULE_FIRMWARE("mwl8k/fmimage_8687.fw");
  3294. MODULE_FIRMWARE("mwl8k/helper_8366.fw");
  3295. MODULE_FIRMWARE("mwl8k/fmimage_8366.fw");
  3296. MODULE_FIRMWARE(MWL8K_8366_AP_FW(MWL8K_8366_AP_FW_API));
  3297. static DEFINE_PCI_DEVICE_TABLE(mwl8k_pci_id_table) = {
  3298. { PCI_VDEVICE(MARVELL, 0x2a0a), .driver_data = MWL8363, },
  3299. { PCI_VDEVICE(MARVELL, 0x2a0c), .driver_data = MWL8363, },
  3300. { PCI_VDEVICE(MARVELL, 0x2a24), .driver_data = MWL8363, },
  3301. { PCI_VDEVICE(MARVELL, 0x2a2b), .driver_data = MWL8687, },
  3302. { PCI_VDEVICE(MARVELL, 0x2a30), .driver_data = MWL8687, },
  3303. { PCI_VDEVICE(MARVELL, 0x2a40), .driver_data = MWL8366, },
  3304. { PCI_VDEVICE(MARVELL, 0x2a43), .driver_data = MWL8366, },
  3305. { },
  3306. };
  3307. MODULE_DEVICE_TABLE(pci, mwl8k_pci_id_table);
  3308. static int mwl8k_request_alt_fw(struct mwl8k_priv *priv)
  3309. {
  3310. int rc;
  3311. printk(KERN_ERR "%s: Error requesting preferred fw %s.\n"
  3312. "Trying alternative firmware %s\n", pci_name(priv->pdev),
  3313. priv->fw_pref, priv->fw_alt);
  3314. rc = mwl8k_request_fw(priv, priv->fw_alt, &priv->fw_ucode, true);
  3315. if (rc) {
  3316. printk(KERN_ERR "%s: Error requesting alt fw %s\n",
  3317. pci_name(priv->pdev), priv->fw_alt);
  3318. return rc;
  3319. }
  3320. return 0;
  3321. }
  3322. static int mwl8k_firmware_load_success(struct mwl8k_priv *priv);
  3323. static void mwl8k_fw_state_machine(const struct firmware *fw, void *context)
  3324. {
  3325. struct mwl8k_priv *priv = context;
  3326. struct mwl8k_device_info *di = priv->device_info;
  3327. int rc;
  3328. switch (priv->fw_state) {
  3329. case FW_STATE_INIT:
  3330. if (!fw) {
  3331. printk(KERN_ERR "%s: Error requesting helper fw %s\n",
  3332. pci_name(priv->pdev), di->helper_image);
  3333. goto fail;
  3334. }
  3335. priv->fw_helper = fw;
  3336. rc = mwl8k_request_fw(priv, priv->fw_pref, &priv->fw_ucode,
  3337. true);
  3338. if (rc && priv->fw_alt) {
  3339. rc = mwl8k_request_alt_fw(priv);
  3340. if (rc)
  3341. goto fail;
  3342. priv->fw_state = FW_STATE_LOADING_ALT;
  3343. } else if (rc)
  3344. goto fail;
  3345. else
  3346. priv->fw_state = FW_STATE_LOADING_PREF;
  3347. break;
  3348. case FW_STATE_LOADING_PREF:
  3349. if (!fw) {
  3350. if (priv->fw_alt) {
  3351. rc = mwl8k_request_alt_fw(priv);
  3352. if (rc)
  3353. goto fail;
  3354. priv->fw_state = FW_STATE_LOADING_ALT;
  3355. } else
  3356. goto fail;
  3357. } else {
  3358. priv->fw_ucode = fw;
  3359. rc = mwl8k_firmware_load_success(priv);
  3360. if (rc)
  3361. goto fail;
  3362. else
  3363. complete(&priv->firmware_loading_complete);
  3364. }
  3365. break;
  3366. case FW_STATE_LOADING_ALT:
  3367. if (!fw) {
  3368. printk(KERN_ERR "%s: Error requesting alt fw %s\n",
  3369. pci_name(priv->pdev), di->helper_image);
  3370. goto fail;
  3371. }
  3372. priv->fw_ucode = fw;
  3373. rc = mwl8k_firmware_load_success(priv);
  3374. if (rc)
  3375. goto fail;
  3376. else
  3377. complete(&priv->firmware_loading_complete);
  3378. break;
  3379. default:
  3380. printk(KERN_ERR "%s: Unexpected firmware loading state: %d\n",
  3381. MWL8K_NAME, priv->fw_state);
  3382. BUG_ON(1);
  3383. }
  3384. return;
  3385. fail:
  3386. priv->fw_state = FW_STATE_ERROR;
  3387. complete(&priv->firmware_loading_complete);
  3388. device_release_driver(&priv->pdev->dev);
  3389. mwl8k_release_firmware(priv);
  3390. }
  3391. static int mwl8k_init_firmware(struct ieee80211_hw *hw, char *fw_image,
  3392. bool nowait)
  3393. {
  3394. struct mwl8k_priv *priv = hw->priv;
  3395. int rc;
  3396. /* Reset firmware and hardware */
  3397. mwl8k_hw_reset(priv);
  3398. /* Ask userland hotplug daemon for the device firmware */
  3399. rc = mwl8k_request_firmware(priv, fw_image, nowait);
  3400. if (rc) {
  3401. wiphy_err(hw->wiphy, "Firmware files not found\n");
  3402. return rc;
  3403. }
  3404. if (nowait)
  3405. return rc;
  3406. /* Load firmware into hardware */
  3407. rc = mwl8k_load_firmware(hw);
  3408. if (rc)
  3409. wiphy_err(hw->wiphy, "Cannot start firmware\n");
  3410. /* Reclaim memory once firmware is successfully loaded */
  3411. mwl8k_release_firmware(priv);
  3412. return rc;
  3413. }
  3414. /* initialize hw after successfully loading a firmware image */
  3415. static int mwl8k_probe_hw(struct ieee80211_hw *hw)
  3416. {
  3417. struct mwl8k_priv *priv = hw->priv;
  3418. int rc = 0;
  3419. int i;
  3420. if (priv->ap_fw) {
  3421. priv->rxd_ops = priv->device_info->ap_rxd_ops;
  3422. if (priv->rxd_ops == NULL) {
  3423. wiphy_err(hw->wiphy,
  3424. "Driver does not have AP firmware image support for this hardware\n");
  3425. goto err_stop_firmware;
  3426. }
  3427. } else {
  3428. priv->rxd_ops = &rxd_sta_ops;
  3429. }
  3430. priv->sniffer_enabled = false;
  3431. priv->wmm_enabled = false;
  3432. priv->pending_tx_pkts = 0;
  3433. rc = mwl8k_rxq_init(hw, 0);
  3434. if (rc)
  3435. goto err_stop_firmware;
  3436. rxq_refill(hw, 0, INT_MAX);
  3437. for (i = 0; i < MWL8K_TX_QUEUES; i++) {
  3438. rc = mwl8k_txq_init(hw, i);
  3439. if (rc)
  3440. goto err_free_queues;
  3441. }
  3442. iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
  3443. iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
  3444. iowrite32(MWL8K_A2H_INT_TX_DONE | MWL8K_A2H_INT_RX_READY,
  3445. priv->regs + MWL8K_HIU_A2H_INTERRUPT_CLEAR_SEL);
  3446. iowrite32(0xffffffff, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK);
  3447. rc = request_irq(priv->pdev->irq, mwl8k_interrupt,
  3448. IRQF_SHARED, MWL8K_NAME, hw);
  3449. if (rc) {
  3450. wiphy_err(hw->wiphy, "failed to register IRQ handler\n");
  3451. goto err_free_queues;
  3452. }
  3453. /*
  3454. * Temporarily enable interrupts. Initial firmware host
  3455. * commands use interrupts and avoid polling. Disable
  3456. * interrupts when done.
  3457. */
  3458. iowrite32(MWL8K_A2H_EVENTS, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
  3459. /* Get config data, mac addrs etc */
  3460. if (priv->ap_fw) {
  3461. rc = mwl8k_cmd_get_hw_spec_ap(hw);
  3462. if (!rc)
  3463. rc = mwl8k_cmd_set_hw_spec(hw);
  3464. } else {
  3465. rc = mwl8k_cmd_get_hw_spec_sta(hw);
  3466. }
  3467. if (rc) {
  3468. wiphy_err(hw->wiphy, "Cannot initialise firmware\n");
  3469. goto err_free_irq;
  3470. }
  3471. /* Turn radio off */
  3472. rc = mwl8k_cmd_radio_disable(hw);
  3473. if (rc) {
  3474. wiphy_err(hw->wiphy, "Cannot disable\n");
  3475. goto err_free_irq;
  3476. }
  3477. /* Clear MAC address */
  3478. rc = mwl8k_cmd_set_mac_addr(hw, NULL, "\x00\x00\x00\x00\x00\x00");
  3479. if (rc) {
  3480. wiphy_err(hw->wiphy, "Cannot clear MAC address\n");
  3481. goto err_free_irq;
  3482. }
  3483. /* Disable interrupts */
  3484. iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
  3485. free_irq(priv->pdev->irq, hw);
  3486. wiphy_info(hw->wiphy, "%s v%d, %pm, %s firmware %u.%u.%u.%u\n",
  3487. priv->device_info->part_name,
  3488. priv->hw_rev, hw->wiphy->perm_addr,
  3489. priv->ap_fw ? "AP" : "STA",
  3490. (priv->fw_rev >> 24) & 0xff, (priv->fw_rev >> 16) & 0xff,
  3491. (priv->fw_rev >> 8) & 0xff, priv->fw_rev & 0xff);
  3492. return 0;
  3493. err_free_irq:
  3494. iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
  3495. free_irq(priv->pdev->irq, hw);
  3496. err_free_queues:
  3497. for (i = 0; i < MWL8K_TX_QUEUES; i++)
  3498. mwl8k_txq_deinit(hw, i);
  3499. mwl8k_rxq_deinit(hw, 0);
  3500. err_stop_firmware:
  3501. mwl8k_hw_reset(priv);
  3502. return rc;
  3503. }
  3504. /*
  3505. * invoke mwl8k_reload_firmware to change the firmware image after the device
  3506. * has already been registered
  3507. */
  3508. static int mwl8k_reload_firmware(struct ieee80211_hw *hw, char *fw_image)
  3509. {
  3510. int i, rc = 0;
  3511. struct mwl8k_priv *priv = hw->priv;
  3512. mwl8k_stop(hw);
  3513. mwl8k_rxq_deinit(hw, 0);
  3514. for (i = 0; i < MWL8K_TX_QUEUES; i++)
  3515. mwl8k_txq_deinit(hw, i);
  3516. rc = mwl8k_init_firmware(hw, fw_image, false);
  3517. if (rc)
  3518. goto fail;
  3519. rc = mwl8k_probe_hw(hw);
  3520. if (rc)
  3521. goto fail;
  3522. rc = mwl8k_start(hw);
  3523. if (rc)
  3524. goto fail;
  3525. rc = mwl8k_config(hw, ~0);
  3526. if (rc)
  3527. goto fail;
  3528. for (i = 0; i < MWL8K_TX_QUEUES; i++) {
  3529. rc = mwl8k_conf_tx(hw, i, &priv->wmm_params[i]);
  3530. if (rc)
  3531. goto fail;
  3532. }
  3533. return rc;
  3534. fail:
  3535. printk(KERN_WARNING "mwl8k: Failed to reload firmware image.\n");
  3536. return rc;
  3537. }
  3538. static int mwl8k_firmware_load_success(struct mwl8k_priv *priv)
  3539. {
  3540. struct ieee80211_hw *hw = priv->hw;
  3541. int i, rc;
  3542. rc = mwl8k_load_firmware(hw);
  3543. mwl8k_release_firmware(priv);
  3544. if (rc) {
  3545. wiphy_err(hw->wiphy, "Cannot start firmware\n");
  3546. return rc;
  3547. }
  3548. /*
  3549. * Extra headroom is the size of the required DMA header
  3550. * minus the size of the smallest 802.11 frame (CTS frame).
  3551. */
  3552. hw->extra_tx_headroom =
  3553. sizeof(struct mwl8k_dma_data) - sizeof(struct ieee80211_cts);
  3554. hw->channel_change_time = 10;
  3555. hw->queues = MWL8K_TX_QUEUES;
  3556. /* Set rssi values to dBm */
  3557. hw->flags |= IEEE80211_HW_SIGNAL_DBM;
  3558. hw->vif_data_size = sizeof(struct mwl8k_vif);
  3559. hw->sta_data_size = sizeof(struct mwl8k_sta);
  3560. priv->macids_used = 0;
  3561. INIT_LIST_HEAD(&priv->vif_list);
  3562. /* Set default radio state and preamble */
  3563. priv->radio_on = 0;
  3564. priv->radio_short_preamble = 0;
  3565. /* Finalize join worker */
  3566. INIT_WORK(&priv->finalize_join_worker, mwl8k_finalize_join_worker);
  3567. /* TX reclaim and RX tasklets. */
  3568. tasklet_init(&priv->poll_tx_task, mwl8k_tx_poll, (unsigned long)hw);
  3569. tasklet_disable(&priv->poll_tx_task);
  3570. tasklet_init(&priv->poll_rx_task, mwl8k_rx_poll, (unsigned long)hw);
  3571. tasklet_disable(&priv->poll_rx_task);
  3572. /* Power management cookie */
  3573. priv->cookie = pci_alloc_consistent(priv->pdev, 4, &priv->cookie_dma);
  3574. if (priv->cookie == NULL)
  3575. return -ENOMEM;
  3576. mutex_init(&priv->fw_mutex);
  3577. priv->fw_mutex_owner = NULL;
  3578. priv->fw_mutex_depth = 0;
  3579. priv->hostcmd_wait = NULL;
  3580. spin_lock_init(&priv->tx_lock);
  3581. priv->tx_wait = NULL;
  3582. rc = mwl8k_probe_hw(hw);
  3583. if (rc)
  3584. goto err_free_cookie;
  3585. hw->wiphy->interface_modes = 0;
  3586. if (priv->ap_macids_supported || priv->device_info->fw_image_ap)
  3587. hw->wiphy->interface_modes |= BIT(NL80211_IFTYPE_AP);
  3588. if (priv->sta_macids_supported || priv->device_info->fw_image_sta)
  3589. hw->wiphy->interface_modes |= BIT(NL80211_IFTYPE_STATION);
  3590. rc = ieee80211_register_hw(hw);
  3591. if (rc) {
  3592. wiphy_err(hw->wiphy, "Cannot register device\n");
  3593. goto err_unprobe_hw;
  3594. }
  3595. return 0;
  3596. err_unprobe_hw:
  3597. for (i = 0; i < MWL8K_TX_QUEUES; i++)
  3598. mwl8k_txq_deinit(hw, i);
  3599. mwl8k_rxq_deinit(hw, 0);
  3600. err_free_cookie:
  3601. if (priv->cookie != NULL)
  3602. pci_free_consistent(priv->pdev, 4,
  3603. priv->cookie, priv->cookie_dma);
  3604. return rc;
  3605. }
  3606. static int __devinit mwl8k_probe(struct pci_dev *pdev,
  3607. const struct pci_device_id *id)
  3608. {
  3609. static int printed_version;
  3610. struct ieee80211_hw *hw;
  3611. struct mwl8k_priv *priv;
  3612. struct mwl8k_device_info *di;
  3613. int rc;
  3614. if (!printed_version) {
  3615. printk(KERN_INFO "%s version %s\n", MWL8K_DESC, MWL8K_VERSION);
  3616. printed_version = 1;
  3617. }
  3618. rc = pci_enable_device(pdev);
  3619. if (rc) {
  3620. printk(KERN_ERR "%s: Cannot enable new PCI device\n",
  3621. MWL8K_NAME);
  3622. return rc;
  3623. }
  3624. rc = pci_request_regions(pdev, MWL8K_NAME);
  3625. if (rc) {
  3626. printk(KERN_ERR "%s: Cannot obtain PCI resources\n",
  3627. MWL8K_NAME);
  3628. goto err_disable_device;
  3629. }
  3630. pci_set_master(pdev);
  3631. hw = ieee80211_alloc_hw(sizeof(*priv), &mwl8k_ops);
  3632. if (hw == NULL) {
  3633. printk(KERN_ERR "%s: ieee80211 alloc failed\n", MWL8K_NAME);
  3634. rc = -ENOMEM;
  3635. goto err_free_reg;
  3636. }
  3637. SET_IEEE80211_DEV(hw, &pdev->dev);
  3638. pci_set_drvdata(pdev, hw);
  3639. priv = hw->priv;
  3640. priv->hw = hw;
  3641. priv->pdev = pdev;
  3642. priv->device_info = &mwl8k_info_tbl[id->driver_data];
  3643. priv->sram = pci_iomap(pdev, 0, 0x10000);
  3644. if (priv->sram == NULL) {
  3645. wiphy_err(hw->wiphy, "Cannot map device SRAM\n");
  3646. goto err_iounmap;
  3647. }
  3648. /*
  3649. * If BAR0 is a 32 bit BAR, the register BAR will be BAR1.
  3650. * If BAR0 is a 64 bit BAR, the register BAR will be BAR2.
  3651. */
  3652. priv->regs = pci_iomap(pdev, 1, 0x10000);
  3653. if (priv->regs == NULL) {
  3654. priv->regs = pci_iomap(pdev, 2, 0x10000);
  3655. if (priv->regs == NULL) {
  3656. wiphy_err(hw->wiphy, "Cannot map device registers\n");
  3657. goto err_iounmap;
  3658. }
  3659. }
  3660. /*
  3661. * Choose the initial fw image depending on user input. If a second
  3662. * image is available, make it the alternative image that will be
  3663. * loaded if the first one fails.
  3664. */
  3665. init_completion(&priv->firmware_loading_complete);
  3666. di = priv->device_info;
  3667. if (ap_mode_default && di->fw_image_ap) {
  3668. priv->fw_pref = di->fw_image_ap;
  3669. priv->fw_alt = di->fw_image_sta;
  3670. } else if (!ap_mode_default && di->fw_image_sta) {
  3671. priv->fw_pref = di->fw_image_sta;
  3672. priv->fw_alt = di->fw_image_ap;
  3673. } else if (ap_mode_default && !di->fw_image_ap && di->fw_image_sta) {
  3674. printk(KERN_WARNING "AP fw is unavailable. Using STA fw.");
  3675. priv->fw_pref = di->fw_image_sta;
  3676. } else if (!ap_mode_default && !di->fw_image_sta && di->fw_image_ap) {
  3677. printk(KERN_WARNING "STA fw is unavailable. Using AP fw.");
  3678. priv->fw_pref = di->fw_image_ap;
  3679. }
  3680. rc = mwl8k_init_firmware(hw, priv->fw_pref, true);
  3681. if (rc)
  3682. goto err_stop_firmware;
  3683. return rc;
  3684. err_stop_firmware:
  3685. mwl8k_hw_reset(priv);
  3686. err_iounmap:
  3687. if (priv->regs != NULL)
  3688. pci_iounmap(pdev, priv->regs);
  3689. if (priv->sram != NULL)
  3690. pci_iounmap(pdev, priv->sram);
  3691. pci_set_drvdata(pdev, NULL);
  3692. ieee80211_free_hw(hw);
  3693. err_free_reg:
  3694. pci_release_regions(pdev);
  3695. err_disable_device:
  3696. pci_disable_device(pdev);
  3697. return rc;
  3698. }
  3699. static void __devexit mwl8k_shutdown(struct pci_dev *pdev)
  3700. {
  3701. printk(KERN_ERR "===>%s(%u)\n", __func__, __LINE__);
  3702. }
  3703. static void __devexit mwl8k_remove(struct pci_dev *pdev)
  3704. {
  3705. struct ieee80211_hw *hw = pci_get_drvdata(pdev);
  3706. struct mwl8k_priv *priv;
  3707. int i;
  3708. if (hw == NULL)
  3709. return;
  3710. priv = hw->priv;
  3711. wait_for_completion(&priv->firmware_loading_complete);
  3712. if (priv->fw_state == FW_STATE_ERROR) {
  3713. mwl8k_hw_reset(priv);
  3714. goto unmap;
  3715. }
  3716. ieee80211_stop_queues(hw);
  3717. ieee80211_unregister_hw(hw);
  3718. /* Remove TX reclaim and RX tasklets. */
  3719. tasklet_kill(&priv->poll_tx_task);
  3720. tasklet_kill(&priv->poll_rx_task);
  3721. /* Stop hardware */
  3722. mwl8k_hw_reset(priv);
  3723. /* Return all skbs to mac80211 */
  3724. for (i = 0; i < MWL8K_TX_QUEUES; i++)
  3725. mwl8k_txq_reclaim(hw, i, INT_MAX, 1);
  3726. for (i = 0; i < MWL8K_TX_QUEUES; i++)
  3727. mwl8k_txq_deinit(hw, i);
  3728. mwl8k_rxq_deinit(hw, 0);
  3729. pci_free_consistent(priv->pdev, 4, priv->cookie, priv->cookie_dma);
  3730. unmap:
  3731. pci_iounmap(pdev, priv->regs);
  3732. pci_iounmap(pdev, priv->sram);
  3733. pci_set_drvdata(pdev, NULL);
  3734. ieee80211_free_hw(hw);
  3735. pci_release_regions(pdev);
  3736. pci_disable_device(pdev);
  3737. }
  3738. static struct pci_driver mwl8k_driver = {
  3739. .name = MWL8K_NAME,
  3740. .id_table = mwl8k_pci_id_table,
  3741. .probe = mwl8k_probe,
  3742. .remove = __devexit_p(mwl8k_remove),
  3743. .shutdown = __devexit_p(mwl8k_shutdown),
  3744. };
  3745. static int __init mwl8k_init(void)
  3746. {
  3747. return pci_register_driver(&mwl8k_driver);
  3748. }
  3749. static void __exit mwl8k_exit(void)
  3750. {
  3751. pci_unregister_driver(&mwl8k_driver);
  3752. }
  3753. module_init(mwl8k_init);
  3754. module_exit(mwl8k_exit);
  3755. MODULE_DESCRIPTION(MWL8K_DESC);
  3756. MODULE_VERSION(MWL8K_VERSION);
  3757. MODULE_AUTHOR("Lennert Buytenhek <buytenh@marvell.com>");
  3758. MODULE_LICENSE("GPL");