bfin_5xx.c 25 KB

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  1. /*
  2. * File: drivers/serial/bfin_5xx.c
  3. * Based on: Based on drivers/serial/sa1100.c
  4. * Author: Aubrey Li <aubrey.li@analog.com>
  5. *
  6. * Created:
  7. * Description: Driver for blackfin 5xx serial ports
  8. *
  9. * Modified:
  10. * Copyright 2006 Analog Devices Inc.
  11. *
  12. * Bugs: Enter bugs at http://blackfin.uclinux.org/
  13. *
  14. * This program is free software; you can redistribute it and/or modify
  15. * it under the terms of the GNU General Public License as published by
  16. * the Free Software Foundation; either version 2 of the License, or
  17. * (at your option) any later version.
  18. *
  19. * This program is distributed in the hope that it will be useful,
  20. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  21. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  22. * GNU General Public License for more details.
  23. *
  24. * You should have received a copy of the GNU General Public License
  25. * along with this program; if not, see the file COPYING, or write
  26. * to the Free Software Foundation, Inc.,
  27. * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  28. */
  29. #if defined(CONFIG_SERIAL_BFIN_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
  30. #define SUPPORT_SYSRQ
  31. #endif
  32. #include <linux/module.h>
  33. #include <linux/ioport.h>
  34. #include <linux/init.h>
  35. #include <linux/console.h>
  36. #include <linux/sysrq.h>
  37. #include <linux/platform_device.h>
  38. #include <linux/tty.h>
  39. #include <linux/tty_flip.h>
  40. #include <linux/serial_core.h>
  41. #include <asm/gpio.h>
  42. #include <asm/mach/bfin_serial_5xx.h>
  43. #ifdef CONFIG_SERIAL_BFIN_DMA
  44. #include <linux/dma-mapping.h>
  45. #include <asm/io.h>
  46. #include <asm/irq.h>
  47. #include <asm/cacheflush.h>
  48. #endif
  49. /* UART name and device definitions */
  50. #define BFIN_SERIAL_NAME "ttyBF"
  51. #define BFIN_SERIAL_MAJOR 204
  52. #define BFIN_SERIAL_MINOR 64
  53. /*
  54. * Setup for console. Argument comes from the menuconfig
  55. */
  56. #define DMA_RX_XCOUNT 512
  57. #define DMA_RX_YCOUNT (PAGE_SIZE / DMA_RX_XCOUNT)
  58. #define DMA_RX_FLUSH_JIFFIES 5
  59. #ifdef CONFIG_SERIAL_BFIN_DMA
  60. static void bfin_serial_dma_tx_chars(struct bfin_serial_port *uart);
  61. #else
  62. static void bfin_serial_do_work(struct work_struct *work);
  63. static void bfin_serial_tx_chars(struct bfin_serial_port *uart);
  64. static void local_put_char(struct bfin_serial_port *uart, char ch);
  65. #endif
  66. static void bfin_serial_mctrl_check(struct bfin_serial_port *uart);
  67. /*
  68. * interrupts are disabled on entry
  69. */
  70. static void bfin_serial_stop_tx(struct uart_port *port)
  71. {
  72. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  73. #ifdef CONFIG_SERIAL_BFIN_DMA
  74. disable_dma(uart->tx_dma_channel);
  75. #else
  76. unsigned short ier;
  77. ier = UART_GET_IER(uart);
  78. ier &= ~ETBEI;
  79. UART_PUT_IER(uart, ier);
  80. #endif
  81. }
  82. /*
  83. * port is locked and interrupts are disabled
  84. */
  85. static void bfin_serial_start_tx(struct uart_port *port)
  86. {
  87. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  88. #ifdef CONFIG_SERIAL_BFIN_DMA
  89. bfin_serial_dma_tx_chars(uart);
  90. #else
  91. unsigned short ier;
  92. ier = UART_GET_IER(uart);
  93. ier |= ETBEI;
  94. UART_PUT_IER(uart, ier);
  95. bfin_serial_tx_chars(uart);
  96. #endif
  97. }
  98. /*
  99. * Interrupts are enabled
  100. */
  101. static void bfin_serial_stop_rx(struct uart_port *port)
  102. {
  103. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  104. unsigned short ier;
  105. ier = UART_GET_IER(uart);
  106. ier &= ~ERBFI;
  107. UART_PUT_IER(uart, ier);
  108. }
  109. /*
  110. * Set the modem control timer to fire immediately.
  111. */
  112. static void bfin_serial_enable_ms(struct uart_port *port)
  113. {
  114. }
  115. #ifdef CONFIG_SERIAL_BFIN_PIO
  116. static void local_put_char(struct bfin_serial_port *uart, char ch)
  117. {
  118. unsigned short status;
  119. int flags = 0;
  120. spin_lock_irqsave(&uart->port.lock, flags);
  121. do {
  122. status = UART_GET_LSR(uart);
  123. } while (!(status & THRE));
  124. UART_PUT_CHAR(uart, ch);
  125. SSYNC();
  126. spin_unlock_irqrestore(&uart->port.lock, flags);
  127. }
  128. static void bfin_serial_rx_chars(struct bfin_serial_port *uart)
  129. {
  130. struct tty_struct *tty = uart->port.info->tty;
  131. unsigned int status, ch, flg;
  132. #ifdef BF533_FAMILY
  133. static int in_break = 0;
  134. #endif
  135. status = UART_GET_LSR(uart);
  136. ch = UART_GET_CHAR(uart);
  137. uart->port.icount.rx++;
  138. #ifdef BF533_FAMILY
  139. /* The BF533 family of processors have a nice misbehavior where
  140. * they continuously generate characters for a "single" break.
  141. * We have to basically ignore this flood until the "next" valid
  142. * character comes across. All other Blackfin families operate
  143. * properly though.
  144. */
  145. if (in_break) {
  146. if (ch != 0) {
  147. in_break = 0;
  148. ch = UART_GET_CHAR(uart);
  149. if (bfin_revid() < 5)
  150. return;
  151. } else
  152. return;
  153. }
  154. #endif
  155. if (status & BI) {
  156. #ifdef BF533_FAMILY
  157. in_break = 1;
  158. #endif
  159. uart->port.icount.brk++;
  160. if (uart_handle_break(&uart->port))
  161. goto ignore_char;
  162. status &= ~(PE | FE);
  163. }
  164. if (status & PE)
  165. uart->port.icount.parity++;
  166. if (status & OE)
  167. uart->port.icount.overrun++;
  168. if (status & FE)
  169. uart->port.icount.frame++;
  170. status &= uart->port.read_status_mask;
  171. if (status & BI)
  172. flg = TTY_BREAK;
  173. else if (status & PE)
  174. flg = TTY_PARITY;
  175. else if (status & FE)
  176. flg = TTY_FRAME;
  177. else
  178. flg = TTY_NORMAL;
  179. if (uart_handle_sysrq_char(&uart->port, ch))
  180. goto ignore_char;
  181. uart_insert_char(&uart->port, status, OE, ch, flg);
  182. ignore_char:
  183. tty_flip_buffer_push(tty);
  184. }
  185. static void bfin_serial_tx_chars(struct bfin_serial_port *uart)
  186. {
  187. struct circ_buf *xmit = &uart->port.info->xmit;
  188. if (uart->port.x_char) {
  189. UART_PUT_CHAR(uart, uart->port.x_char);
  190. uart->port.icount.tx++;
  191. uart->port.x_char = 0;
  192. return;
  193. }
  194. /*
  195. * Check the modem control lines before
  196. * transmitting anything.
  197. */
  198. bfin_serial_mctrl_check(uart);
  199. if (uart_circ_empty(xmit) || uart_tx_stopped(&uart->port)) {
  200. bfin_serial_stop_tx(&uart->port);
  201. return;
  202. }
  203. local_put_char(uart, xmit->buf[xmit->tail]);
  204. xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
  205. uart->port.icount.tx++;
  206. if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
  207. uart_write_wakeup(&uart->port);
  208. if (uart_circ_empty(xmit))
  209. bfin_serial_stop_tx(&uart->port);
  210. }
  211. static irqreturn_t bfin_serial_rx_int(int irq, void *dev_id)
  212. {
  213. struct bfin_serial_port *uart = dev_id;
  214. spin_lock(&uart->port.lock);
  215. while ((UART_GET_IIR(uart) & IIR_STATUS) == IIR_RX_READY)
  216. bfin_serial_rx_chars(uart);
  217. spin_unlock(&uart->port.lock);
  218. return IRQ_HANDLED;
  219. }
  220. static irqreturn_t bfin_serial_tx_int(int irq, void *dev_id)
  221. {
  222. struct bfin_serial_port *uart = dev_id;
  223. spin_lock(&uart->port.lock);
  224. while ((UART_GET_IIR(uart) & IIR_STATUS) == IIR_TX_READY)
  225. bfin_serial_tx_chars(uart);
  226. spin_unlock(&uart->port.lock);
  227. return IRQ_HANDLED;
  228. }
  229. static void bfin_serial_do_work(struct work_struct *work)
  230. {
  231. struct bfin_serial_port *uart = container_of(work, struct bfin_serial_port, cts_workqueue);
  232. bfin_serial_mctrl_check(uart);
  233. }
  234. #endif
  235. #ifdef CONFIG_SERIAL_BFIN_DMA
  236. static void bfin_serial_dma_tx_chars(struct bfin_serial_port *uart)
  237. {
  238. struct circ_buf *xmit = &uart->port.info->xmit;
  239. unsigned short ier;
  240. int flags = 0;
  241. if (!uart->tx_done)
  242. return;
  243. uart->tx_done = 0;
  244. if (uart->port.x_char) {
  245. UART_PUT_CHAR(uart, uart->port.x_char);
  246. uart->port.icount.tx++;
  247. uart->port.x_char = 0;
  248. uart->tx_done = 1;
  249. return;
  250. }
  251. /*
  252. * Check the modem control lines before
  253. * transmitting anything.
  254. */
  255. bfin_serial_mctrl_check(uart);
  256. if (uart_circ_empty(xmit) || uart_tx_stopped(&uart->port)) {
  257. bfin_serial_stop_tx(&uart->port);
  258. uart->tx_done = 1;
  259. return;
  260. }
  261. spin_lock_irqsave(&uart->port.lock, flags);
  262. uart->tx_count = CIRC_CNT(xmit->head, xmit->tail, UART_XMIT_SIZE);
  263. if (uart->tx_count > (UART_XMIT_SIZE - xmit->tail))
  264. uart->tx_count = UART_XMIT_SIZE - xmit->tail;
  265. blackfin_dcache_flush_range((unsigned long)(xmit->buf+xmit->tail),
  266. (unsigned long)(xmit->buf+xmit->tail+uart->tx_count));
  267. set_dma_config(uart->tx_dma_channel,
  268. set_bfin_dma_config(DIR_READ, DMA_FLOW_STOP,
  269. INTR_ON_BUF,
  270. DIMENSION_LINEAR,
  271. DATA_SIZE_8));
  272. set_dma_start_addr(uart->tx_dma_channel, (unsigned long)(xmit->buf+xmit->tail));
  273. set_dma_x_count(uart->tx_dma_channel, uart->tx_count);
  274. set_dma_x_modify(uart->tx_dma_channel, 1);
  275. enable_dma(uart->tx_dma_channel);
  276. ier = UART_GET_IER(uart);
  277. ier |= ETBEI;
  278. UART_PUT_IER(uart, ier);
  279. spin_unlock_irqrestore(&uart->port.lock, flags);
  280. }
  281. static void bfin_serial_dma_rx_chars(struct bfin_serial_port *uart)
  282. {
  283. struct tty_struct *tty = uart->port.info->tty;
  284. int i, flg, status;
  285. status = UART_GET_LSR(uart);
  286. uart->port.icount.rx += CIRC_CNT(uart->rx_dma_buf.head, uart->rx_dma_buf.tail, UART_XMIT_SIZE);;
  287. if (status & BI) {
  288. uart->port.icount.brk++;
  289. if (uart_handle_break(&uart->port))
  290. goto dma_ignore_char;
  291. status &= ~(PE | FE);
  292. }
  293. if (status & PE)
  294. uart->port.icount.parity++;
  295. if (status & OE)
  296. uart->port.icount.overrun++;
  297. if (status & FE)
  298. uart->port.icount.frame++;
  299. status &= uart->port.read_status_mask;
  300. if (status & BI)
  301. flg = TTY_BREAK;
  302. else if (status & PE)
  303. flg = TTY_PARITY;
  304. else if (status & FE)
  305. flg = TTY_FRAME;
  306. else
  307. flg = TTY_NORMAL;
  308. for (i = uart->rx_dma_buf.head; i < uart->rx_dma_buf.tail; i++) {
  309. if (uart_handle_sysrq_char(&uart->port, uart->rx_dma_buf.buf[i]))
  310. goto dma_ignore_char;
  311. uart_insert_char(&uart->port, status, OE, uart->rx_dma_buf.buf[i], flg);
  312. }
  313. dma_ignore_char:
  314. tty_flip_buffer_push(tty);
  315. }
  316. void bfin_serial_rx_dma_timeout(struct bfin_serial_port *uart)
  317. {
  318. int x_pos, pos;
  319. int flags = 0;
  320. bfin_serial_dma_tx_chars(uart);
  321. spin_lock_irqsave(&uart->port.lock, flags);
  322. x_pos = DMA_RX_XCOUNT - get_dma_curr_xcount(uart->rx_dma_channel);
  323. if (x_pos == DMA_RX_XCOUNT)
  324. x_pos = 0;
  325. pos = uart->rx_dma_nrows * DMA_RX_XCOUNT + x_pos;
  326. if (pos>uart->rx_dma_buf.tail) {
  327. uart->rx_dma_buf.tail = pos;
  328. bfin_serial_dma_rx_chars(uart);
  329. uart->rx_dma_buf.head = uart->rx_dma_buf.tail;
  330. }
  331. spin_unlock_irqrestore(&uart->port.lock, flags);
  332. uart->rx_dma_timer.expires = jiffies + DMA_RX_FLUSH_JIFFIES;
  333. add_timer(&(uart->rx_dma_timer));
  334. }
  335. static irqreturn_t bfin_serial_dma_tx_int(int irq, void *dev_id)
  336. {
  337. struct bfin_serial_port *uart = dev_id;
  338. struct circ_buf *xmit = &uart->port.info->xmit;
  339. unsigned short ier;
  340. spin_lock(&uart->port.lock);
  341. if (!(get_dma_curr_irqstat(uart->tx_dma_channel)&DMA_RUN)) {
  342. clear_dma_irqstat(uart->tx_dma_channel);
  343. disable_dma(uart->tx_dma_channel);
  344. ier = UART_GET_IER(uart);
  345. ier &= ~ETBEI;
  346. UART_PUT_IER(uart, ier);
  347. xmit->tail = (xmit->tail+uart->tx_count) &(UART_XMIT_SIZE -1);
  348. uart->port.icount.tx+=uart->tx_count;
  349. if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
  350. uart_write_wakeup(&uart->port);
  351. if (uart_circ_empty(xmit))
  352. bfin_serial_stop_tx(&uart->port);
  353. uart->tx_done = 1;
  354. }
  355. spin_unlock(&uart->port.lock);
  356. return IRQ_HANDLED;
  357. }
  358. static irqreturn_t bfin_serial_dma_rx_int(int irq, void *dev_id)
  359. {
  360. struct bfin_serial_port *uart = dev_id;
  361. unsigned short irqstat;
  362. uart->rx_dma_nrows++;
  363. if (uart->rx_dma_nrows == DMA_RX_YCOUNT) {
  364. uart->rx_dma_nrows = 0;
  365. uart->rx_dma_buf.tail = DMA_RX_XCOUNT*DMA_RX_YCOUNT;
  366. bfin_serial_dma_rx_chars(uart);
  367. uart->rx_dma_buf.head = uart->rx_dma_buf.tail = 0;
  368. }
  369. spin_lock(&uart->port.lock);
  370. irqstat = get_dma_curr_irqstat(uart->rx_dma_channel);
  371. clear_dma_irqstat(uart->rx_dma_channel);
  372. spin_unlock(&uart->port.lock);
  373. return IRQ_HANDLED;
  374. }
  375. #endif
  376. /*
  377. * Return TIOCSER_TEMT when transmitter is not busy.
  378. */
  379. static unsigned int bfin_serial_tx_empty(struct uart_port *port)
  380. {
  381. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  382. unsigned short lsr;
  383. lsr = UART_GET_LSR(uart);
  384. if (lsr & TEMT)
  385. return TIOCSER_TEMT;
  386. else
  387. return 0;
  388. }
  389. static unsigned int bfin_serial_get_mctrl(struct uart_port *port)
  390. {
  391. #ifdef CONFIG_SERIAL_BFIN_CTSRTS
  392. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  393. if (uart->cts_pin < 0)
  394. return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
  395. if (gpio_get_value(uart->cts_pin))
  396. return TIOCM_DSR | TIOCM_CAR;
  397. else
  398. #endif
  399. return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
  400. }
  401. static void bfin_serial_set_mctrl(struct uart_port *port, unsigned int mctrl)
  402. {
  403. #ifdef CONFIG_SERIAL_BFIN_CTSRTS
  404. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  405. if (uart->rts_pin < 0)
  406. return;
  407. if (mctrl & TIOCM_RTS)
  408. gpio_set_value(uart->rts_pin, 0);
  409. else
  410. gpio_set_value(uart->rts_pin, 1);
  411. #endif
  412. }
  413. /*
  414. * Handle any change of modem status signal since we were last called.
  415. */
  416. static void bfin_serial_mctrl_check(struct bfin_serial_port *uart)
  417. {
  418. #ifdef CONFIG_SERIAL_BFIN_CTSRTS
  419. unsigned int status;
  420. # ifdef CONFIG_SERIAL_BFIN_DMA
  421. struct uart_info *info = uart->port.info;
  422. struct tty_struct *tty = info->tty;
  423. status = bfin_serial_get_mctrl(&uart->port);
  424. if (!(status & TIOCM_CTS)) {
  425. tty->hw_stopped = 1;
  426. } else {
  427. tty->hw_stopped = 0;
  428. }
  429. # else
  430. status = bfin_serial_get_mctrl(&uart->port);
  431. uart_handle_cts_change(&uart->port, status & TIOCM_CTS);
  432. if (!(status & TIOCM_CTS))
  433. schedule_work(&uart->cts_workqueue);
  434. # endif
  435. #endif
  436. }
  437. /*
  438. * Interrupts are always disabled.
  439. */
  440. static void bfin_serial_break_ctl(struct uart_port *port, int break_state)
  441. {
  442. }
  443. static int bfin_serial_startup(struct uart_port *port)
  444. {
  445. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  446. #ifdef CONFIG_SERIAL_BFIN_DMA
  447. dma_addr_t dma_handle;
  448. if (request_dma(uart->rx_dma_channel, "BFIN_UART_RX") < 0) {
  449. printk(KERN_NOTICE "Unable to attach Blackfin UART RX DMA channel\n");
  450. return -EBUSY;
  451. }
  452. if (request_dma(uart->tx_dma_channel, "BFIN_UART_TX") < 0) {
  453. printk(KERN_NOTICE "Unable to attach Blackfin UART TX DMA channel\n");
  454. free_dma(uart->rx_dma_channel);
  455. return -EBUSY;
  456. }
  457. set_dma_callback(uart->rx_dma_channel, bfin_serial_dma_rx_int, uart);
  458. set_dma_callback(uart->tx_dma_channel, bfin_serial_dma_tx_int, uart);
  459. uart->rx_dma_buf.buf = (unsigned char *)dma_alloc_coherent(NULL, PAGE_SIZE, &dma_handle, GFP_DMA);
  460. uart->rx_dma_buf.head = 0;
  461. uart->rx_dma_buf.tail = 0;
  462. uart->rx_dma_nrows = 0;
  463. set_dma_config(uart->rx_dma_channel,
  464. set_bfin_dma_config(DIR_WRITE, DMA_FLOW_AUTO,
  465. INTR_ON_ROW, DIMENSION_2D,
  466. DATA_SIZE_8));
  467. set_dma_x_count(uart->rx_dma_channel, DMA_RX_XCOUNT);
  468. set_dma_x_modify(uart->rx_dma_channel, 1);
  469. set_dma_y_count(uart->rx_dma_channel, DMA_RX_YCOUNT);
  470. set_dma_y_modify(uart->rx_dma_channel, 1);
  471. set_dma_start_addr(uart->rx_dma_channel, (unsigned long)uart->rx_dma_buf.buf);
  472. enable_dma(uart->rx_dma_channel);
  473. uart->rx_dma_timer.data = (unsigned long)(uart);
  474. uart->rx_dma_timer.function = (void *)bfin_serial_rx_dma_timeout;
  475. uart->rx_dma_timer.expires = jiffies + DMA_RX_FLUSH_JIFFIES;
  476. add_timer(&(uart->rx_dma_timer));
  477. #else
  478. if (request_irq
  479. (uart->port.irq, bfin_serial_rx_int, IRQF_DISABLED,
  480. "BFIN_UART_RX", uart)) {
  481. printk(KERN_NOTICE "Unable to attach BlackFin UART RX interrupt\n");
  482. return -EBUSY;
  483. }
  484. if (request_irq
  485. (uart->port.irq+1, bfin_serial_tx_int, IRQF_DISABLED,
  486. "BFIN_UART_TX", uart)) {
  487. printk(KERN_NOTICE "Unable to attach BlackFin UART TX interrupt\n");
  488. free_irq(uart->port.irq, uart);
  489. return -EBUSY;
  490. }
  491. #endif
  492. UART_PUT_IER(uart, UART_GET_IER(uart) | ERBFI);
  493. return 0;
  494. }
  495. static void bfin_serial_shutdown(struct uart_port *port)
  496. {
  497. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  498. #ifdef CONFIG_SERIAL_BFIN_DMA
  499. disable_dma(uart->tx_dma_channel);
  500. free_dma(uart->tx_dma_channel);
  501. disable_dma(uart->rx_dma_channel);
  502. free_dma(uart->rx_dma_channel);
  503. del_timer(&(uart->rx_dma_timer));
  504. #else
  505. free_irq(uart->port.irq, uart);
  506. free_irq(uart->port.irq+1, uart);
  507. #endif
  508. }
  509. static void
  510. bfin_serial_set_termios(struct uart_port *port, struct ktermios *termios,
  511. struct ktermios *old)
  512. {
  513. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  514. unsigned long flags;
  515. unsigned int baud, quot;
  516. unsigned short val, ier, lsr, lcr = 0;
  517. switch (termios->c_cflag & CSIZE) {
  518. case CS8:
  519. lcr = WLS(8);
  520. break;
  521. case CS7:
  522. lcr = WLS(7);
  523. break;
  524. case CS6:
  525. lcr = WLS(6);
  526. break;
  527. case CS5:
  528. lcr = WLS(5);
  529. break;
  530. default:
  531. printk(KERN_ERR "%s: word lengh not supported\n",
  532. __FUNCTION__);
  533. }
  534. if (termios->c_cflag & CSTOPB)
  535. lcr |= STB;
  536. if (termios->c_cflag & PARENB) {
  537. lcr |= PEN;
  538. if (!(termios->c_cflag & PARODD))
  539. lcr |= EPS;
  540. if (termios->c_cflag & CMSPAR)
  541. lcr |= STP;
  542. }
  543. port->read_status_mask = OE;
  544. if (termios->c_iflag & INPCK)
  545. port->read_status_mask |= (FE | PE);
  546. if (termios->c_iflag & (BRKINT | PARMRK))
  547. port->read_status_mask |= BI;
  548. /*
  549. * Characters to ignore
  550. */
  551. port->ignore_status_mask = 0;
  552. if (termios->c_iflag & IGNPAR)
  553. port->ignore_status_mask |= FE | PE;
  554. if (termios->c_iflag & IGNBRK) {
  555. port->ignore_status_mask |= BI;
  556. /*
  557. * If we're ignoring parity and break indicators,
  558. * ignore overruns too (for real raw support).
  559. */
  560. if (termios->c_iflag & IGNPAR)
  561. port->ignore_status_mask |= OE;
  562. }
  563. baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
  564. quot = uart_get_divisor(port, baud);
  565. spin_lock_irqsave(&uart->port.lock, flags);
  566. do {
  567. lsr = UART_GET_LSR(uart);
  568. } while (!(lsr & TEMT));
  569. /* Disable UART */
  570. ier = UART_GET_IER(uart);
  571. UART_PUT_IER(uart, 0);
  572. /* Set DLAB in LCR to Access DLL and DLH */
  573. val = UART_GET_LCR(uart);
  574. val |= DLAB;
  575. UART_PUT_LCR(uart, val);
  576. SSYNC();
  577. UART_PUT_DLL(uart, quot & 0xFF);
  578. SSYNC();
  579. UART_PUT_DLH(uart, (quot >> 8) & 0xFF);
  580. SSYNC();
  581. /* Clear DLAB in LCR to Access THR RBR IER */
  582. val = UART_GET_LCR(uart);
  583. val &= ~DLAB;
  584. UART_PUT_LCR(uart, val);
  585. SSYNC();
  586. UART_PUT_LCR(uart, lcr);
  587. /* Enable UART */
  588. UART_PUT_IER(uart, ier);
  589. val = UART_GET_GCTL(uart);
  590. val |= UCEN;
  591. UART_PUT_GCTL(uart, val);
  592. spin_unlock_irqrestore(&uart->port.lock, flags);
  593. }
  594. static const char *bfin_serial_type(struct uart_port *port)
  595. {
  596. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  597. return uart->port.type == PORT_BFIN ? "BFIN-UART" : NULL;
  598. }
  599. /*
  600. * Release the memory region(s) being used by 'port'.
  601. */
  602. static void bfin_serial_release_port(struct uart_port *port)
  603. {
  604. }
  605. /*
  606. * Request the memory region(s) being used by 'port'.
  607. */
  608. static int bfin_serial_request_port(struct uart_port *port)
  609. {
  610. return 0;
  611. }
  612. /*
  613. * Configure/autoconfigure the port.
  614. */
  615. static void bfin_serial_config_port(struct uart_port *port, int flags)
  616. {
  617. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  618. if (flags & UART_CONFIG_TYPE &&
  619. bfin_serial_request_port(&uart->port) == 0)
  620. uart->port.type = PORT_BFIN;
  621. }
  622. /*
  623. * Verify the new serial_struct (for TIOCSSERIAL).
  624. * The only change we allow are to the flags and type, and
  625. * even then only between PORT_BFIN and PORT_UNKNOWN
  626. */
  627. static int
  628. bfin_serial_verify_port(struct uart_port *port, struct serial_struct *ser)
  629. {
  630. return 0;
  631. }
  632. static struct uart_ops bfin_serial_pops = {
  633. .tx_empty = bfin_serial_tx_empty,
  634. .set_mctrl = bfin_serial_set_mctrl,
  635. .get_mctrl = bfin_serial_get_mctrl,
  636. .stop_tx = bfin_serial_stop_tx,
  637. .start_tx = bfin_serial_start_tx,
  638. .stop_rx = bfin_serial_stop_rx,
  639. .enable_ms = bfin_serial_enable_ms,
  640. .break_ctl = bfin_serial_break_ctl,
  641. .startup = bfin_serial_startup,
  642. .shutdown = bfin_serial_shutdown,
  643. .set_termios = bfin_serial_set_termios,
  644. .type = bfin_serial_type,
  645. .release_port = bfin_serial_release_port,
  646. .request_port = bfin_serial_request_port,
  647. .config_port = bfin_serial_config_port,
  648. .verify_port = bfin_serial_verify_port,
  649. };
  650. static void __init bfin_serial_init_ports(void)
  651. {
  652. static int first = 1;
  653. int i;
  654. if (!first)
  655. return;
  656. first = 0;
  657. for (i = 0; i < nr_ports; i++) {
  658. bfin_serial_ports[i].port.uartclk = get_sclk();
  659. bfin_serial_ports[i].port.ops = &bfin_serial_pops;
  660. bfin_serial_ports[i].port.line = i;
  661. bfin_serial_ports[i].port.iotype = UPIO_MEM;
  662. bfin_serial_ports[i].port.membase =
  663. (void __iomem *)bfin_serial_resource[i].uart_base_addr;
  664. bfin_serial_ports[i].port.mapbase =
  665. bfin_serial_resource[i].uart_base_addr;
  666. bfin_serial_ports[i].port.irq =
  667. bfin_serial_resource[i].uart_irq;
  668. bfin_serial_ports[i].port.flags = UPF_BOOT_AUTOCONF;
  669. #ifdef CONFIG_SERIAL_BFIN_DMA
  670. bfin_serial_ports[i].tx_done = 1;
  671. bfin_serial_ports[i].tx_count = 0;
  672. bfin_serial_ports[i].tx_dma_channel =
  673. bfin_serial_resource[i].uart_tx_dma_channel;
  674. bfin_serial_ports[i].rx_dma_channel =
  675. bfin_serial_resource[i].uart_rx_dma_channel;
  676. init_timer(&(bfin_serial_ports[i].rx_dma_timer));
  677. #else
  678. INIT_WORK(&bfin_serial_ports[i].cts_workqueue, bfin_serial_do_work);
  679. #endif
  680. #ifdef CONFIG_SERIAL_BFIN_CTSRTS
  681. bfin_serial_ports[i].cts_pin =
  682. bfin_serial_resource[i].uart_cts_pin;
  683. bfin_serial_ports[i].rts_pin =
  684. bfin_serial_resource[i].uart_rts_pin;
  685. #endif
  686. bfin_serial_hw_init(&bfin_serial_ports[i]);
  687. }
  688. }
  689. #ifdef CONFIG_SERIAL_BFIN_CONSOLE
  690. static void bfin_serial_console_putchar(struct uart_port *port, int ch)
  691. {
  692. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  693. while (!(UART_GET_LSR(uart)))
  694. barrier();
  695. UART_PUT_CHAR(uart, ch);
  696. SSYNC();
  697. }
  698. /*
  699. * Interrupts are disabled on entering
  700. */
  701. static void
  702. bfin_serial_console_write(struct console *co, const char *s, unsigned int count)
  703. {
  704. struct bfin_serial_port *uart = &bfin_serial_ports[co->index];
  705. int flags = 0;
  706. spin_lock_irqsave(&uart->port.lock, flags);
  707. uart_console_write(&uart->port, s, count, bfin_serial_console_putchar);
  708. spin_unlock_irqrestore(&uart->port.lock, flags);
  709. }
  710. /*
  711. * If the port was already initialised (eg, by a boot loader),
  712. * try to determine the current setup.
  713. */
  714. static void __init
  715. bfin_serial_console_get_options(struct bfin_serial_port *uart, int *baud,
  716. int *parity, int *bits)
  717. {
  718. unsigned short status;
  719. status = UART_GET_IER(uart) & (ERBFI | ETBEI);
  720. if (status == (ERBFI | ETBEI)) {
  721. /* ok, the port was enabled */
  722. unsigned short lcr, val;
  723. unsigned short dlh, dll;
  724. lcr = UART_GET_LCR(uart);
  725. *parity = 'n';
  726. if (lcr & PEN) {
  727. if (lcr & EPS)
  728. *parity = 'e';
  729. else
  730. *parity = 'o';
  731. }
  732. switch (lcr & 0x03) {
  733. case 0: *bits = 5; break;
  734. case 1: *bits = 6; break;
  735. case 2: *bits = 7; break;
  736. case 3: *bits = 8; break;
  737. }
  738. /* Set DLAB in LCR to Access DLL and DLH */
  739. val = UART_GET_LCR(uart);
  740. val |= DLAB;
  741. UART_PUT_LCR(uart, val);
  742. dll = UART_GET_DLL(uart);
  743. dlh = UART_GET_DLH(uart);
  744. /* Clear DLAB in LCR to Access THR RBR IER */
  745. val = UART_GET_LCR(uart);
  746. val &= ~DLAB;
  747. UART_PUT_LCR(uart, val);
  748. *baud = get_sclk() / (16*(dll | dlh << 8));
  749. }
  750. pr_debug("%s:baud = %d, parity = %c, bits= %d\n", __FUNCTION__, *baud, *parity, *bits);
  751. }
  752. static int __init
  753. bfin_serial_console_setup(struct console *co, char *options)
  754. {
  755. struct bfin_serial_port *uart;
  756. int baud = 57600;
  757. int bits = 8;
  758. int parity = 'n';
  759. #ifdef CONFIG_SERIAL_BFIN_CTSRTS
  760. int flow = 'r';
  761. #else
  762. int flow = 'n';
  763. #endif
  764. /*
  765. * Check whether an invalid uart number has been specified, and
  766. * if so, search for the first available port that does have
  767. * console support.
  768. */
  769. if (co->index == -1 || co->index >= nr_ports)
  770. co->index = 0;
  771. uart = &bfin_serial_ports[co->index];
  772. if (options)
  773. uart_parse_options(options, &baud, &parity, &bits, &flow);
  774. else
  775. bfin_serial_console_get_options(uart, &baud, &parity, &bits);
  776. return uart_set_options(&uart->port, co, baud, parity, bits, flow);
  777. }
  778. static struct uart_driver bfin_serial_reg;
  779. static struct console bfin_serial_console = {
  780. .name = BFIN_SERIAL_NAME,
  781. .write = bfin_serial_console_write,
  782. .device = uart_console_device,
  783. .setup = bfin_serial_console_setup,
  784. .flags = CON_PRINTBUFFER,
  785. .index = -1,
  786. .data = &bfin_serial_reg,
  787. };
  788. static int __init bfin_serial_rs_console_init(void)
  789. {
  790. bfin_serial_init_ports();
  791. register_console(&bfin_serial_console);
  792. return 0;
  793. }
  794. console_initcall(bfin_serial_rs_console_init);
  795. #define BFIN_SERIAL_CONSOLE &bfin_serial_console
  796. #else
  797. #define BFIN_SERIAL_CONSOLE NULL
  798. #endif
  799. static struct uart_driver bfin_serial_reg = {
  800. .owner = THIS_MODULE,
  801. .driver_name = "bfin-uart",
  802. .dev_name = BFIN_SERIAL_NAME,
  803. .major = BFIN_SERIAL_MAJOR,
  804. .minor = BFIN_SERIAL_MINOR,
  805. .nr = NR_PORTS,
  806. .cons = BFIN_SERIAL_CONSOLE,
  807. };
  808. static int bfin_serial_suspend(struct platform_device *dev, pm_message_t state)
  809. {
  810. struct bfin_serial_port *uart = platform_get_drvdata(dev);
  811. if (uart)
  812. uart_suspend_port(&bfin_serial_reg, &uart->port);
  813. return 0;
  814. }
  815. static int bfin_serial_resume(struct platform_device *dev)
  816. {
  817. struct bfin_serial_port *uart = platform_get_drvdata(dev);
  818. if (uart)
  819. uart_resume_port(&bfin_serial_reg, &uart->port);
  820. return 0;
  821. }
  822. static int bfin_serial_probe(struct platform_device *dev)
  823. {
  824. struct resource *res = dev->resource;
  825. int i;
  826. for (i = 0; i < dev->num_resources; i++, res++)
  827. if (res->flags & IORESOURCE_MEM)
  828. break;
  829. if (i < dev->num_resources) {
  830. for (i = 0; i < nr_ports; i++, res++) {
  831. if (bfin_serial_ports[i].port.mapbase != res->start)
  832. continue;
  833. bfin_serial_ports[i].port.dev = &dev->dev;
  834. uart_add_one_port(&bfin_serial_reg, &bfin_serial_ports[i].port);
  835. platform_set_drvdata(dev, &bfin_serial_ports[i]);
  836. }
  837. }
  838. return 0;
  839. }
  840. static int bfin_serial_remove(struct platform_device *pdev)
  841. {
  842. struct bfin_serial_port *uart = platform_get_drvdata(pdev);
  843. #ifdef CONFIG_SERIAL_BFIN_CTSRTS
  844. gpio_free(uart->cts_pin);
  845. gpio_free(uart->rts_pin);
  846. #endif
  847. platform_set_drvdata(pdev, NULL);
  848. if (uart)
  849. uart_remove_one_port(&bfin_serial_reg, &uart->port);
  850. return 0;
  851. }
  852. static struct platform_driver bfin_serial_driver = {
  853. .probe = bfin_serial_probe,
  854. .remove = bfin_serial_remove,
  855. .suspend = bfin_serial_suspend,
  856. .resume = bfin_serial_resume,
  857. .driver = {
  858. .name = "bfin-uart",
  859. },
  860. };
  861. static int __init bfin_serial_init(void)
  862. {
  863. int ret;
  864. pr_info("Serial: Blackfin serial driver\n");
  865. bfin_serial_init_ports();
  866. ret = uart_register_driver(&bfin_serial_reg);
  867. if (ret == 0) {
  868. ret = platform_driver_register(&bfin_serial_driver);
  869. if (ret) {
  870. pr_debug("uart register failed\n");
  871. uart_unregister_driver(&bfin_serial_reg);
  872. }
  873. }
  874. return ret;
  875. }
  876. static void __exit bfin_serial_exit(void)
  877. {
  878. platform_driver_unregister(&bfin_serial_driver);
  879. uart_unregister_driver(&bfin_serial_reg);
  880. }
  881. module_init(bfin_serial_init);
  882. module_exit(bfin_serial_exit);
  883. MODULE_AUTHOR("Aubrey.Li <aubrey.li@analog.com>");
  884. MODULE_DESCRIPTION("Blackfin generic serial port driver");
  885. MODULE_LICENSE("GPL");
  886. MODULE_ALIAS_CHARDEV_MAJOR(BFIN_SERIAL_MAJOR);