rtc-ds1307.c 24 KB

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  1. /*
  2. * rtc-ds1307.c - RTC driver for some mostly-compatible I2C chips.
  3. *
  4. * Copyright (C) 2005 James Chapman (ds1337 core)
  5. * Copyright (C) 2006 David Brownell
  6. * Copyright (C) 2009 Matthias Fuchs (rx8025 support)
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License version 2 as
  10. * published by the Free Software Foundation.
  11. */
  12. #include <linux/module.h>
  13. #include <linux/init.h>
  14. #include <linux/slab.h>
  15. #include <linux/i2c.h>
  16. #include <linux/string.h>
  17. #include <linux/rtc.h>
  18. #include <linux/bcd.h>
  19. /* We can't determine type by probing, but if we expect pre-Linux code
  20. * to have set the chip up as a clock (turning on the oscillator and
  21. * setting the date and time), Linux can ignore the non-clock features.
  22. * That's a natural job for a factory or repair bench.
  23. */
  24. enum ds_type {
  25. ds_1307,
  26. ds_1337,
  27. ds_1338,
  28. ds_1339,
  29. ds_1340,
  30. ds_1388,
  31. ds_3231,
  32. m41t00,
  33. rx_8025,
  34. // rs5c372 too? different address...
  35. };
  36. /* RTC registers don't differ much, except for the century flag */
  37. #define DS1307_REG_SECS 0x00 /* 00-59 */
  38. # define DS1307_BIT_CH 0x80
  39. # define DS1340_BIT_nEOSC 0x80
  40. #define DS1307_REG_MIN 0x01 /* 00-59 */
  41. #define DS1307_REG_HOUR 0x02 /* 00-23, or 1-12{am,pm} */
  42. # define DS1307_BIT_12HR 0x40 /* in REG_HOUR */
  43. # define DS1307_BIT_PM 0x20 /* in REG_HOUR */
  44. # define DS1340_BIT_CENTURY_EN 0x80 /* in REG_HOUR */
  45. # define DS1340_BIT_CENTURY 0x40 /* in REG_HOUR */
  46. #define DS1307_REG_WDAY 0x03 /* 01-07 */
  47. #define DS1307_REG_MDAY 0x04 /* 01-31 */
  48. #define DS1307_REG_MONTH 0x05 /* 01-12 */
  49. # define DS1337_BIT_CENTURY 0x80 /* in REG_MONTH */
  50. #define DS1307_REG_YEAR 0x06 /* 00-99 */
  51. /* Other registers (control, status, alarms, trickle charge, NVRAM, etc)
  52. * start at 7, and they differ a LOT. Only control and status matter for
  53. * basic RTC date and time functionality; be careful using them.
  54. */
  55. #define DS1307_REG_CONTROL 0x07 /* or ds1338 */
  56. # define DS1307_BIT_OUT 0x80
  57. # define DS1338_BIT_OSF 0x20
  58. # define DS1307_BIT_SQWE 0x10
  59. # define DS1307_BIT_RS1 0x02
  60. # define DS1307_BIT_RS0 0x01
  61. #define DS1337_REG_CONTROL 0x0e
  62. # define DS1337_BIT_nEOSC 0x80
  63. # define DS1339_BIT_BBSQI 0x20
  64. # define DS3231_BIT_BBSQW 0x40 /* same as BBSQI */
  65. # define DS1337_BIT_RS2 0x10
  66. # define DS1337_BIT_RS1 0x08
  67. # define DS1337_BIT_INTCN 0x04
  68. # define DS1337_BIT_A2IE 0x02
  69. # define DS1337_BIT_A1IE 0x01
  70. #define DS1340_REG_CONTROL 0x07
  71. # define DS1340_BIT_OUT 0x80
  72. # define DS1340_BIT_FT 0x40
  73. # define DS1340_BIT_CALIB_SIGN 0x20
  74. # define DS1340_M_CALIBRATION 0x1f
  75. #define DS1340_REG_FLAG 0x09
  76. # define DS1340_BIT_OSF 0x80
  77. #define DS1337_REG_STATUS 0x0f
  78. # define DS1337_BIT_OSF 0x80
  79. # define DS1337_BIT_A2I 0x02
  80. # define DS1337_BIT_A1I 0x01
  81. #define DS1339_REG_ALARM1_SECS 0x07
  82. #define DS1339_REG_TRICKLE 0x10
  83. #define RX8025_REG_CTRL1 0x0e
  84. # define RX8025_BIT_2412 0x20
  85. #define RX8025_REG_CTRL2 0x0f
  86. # define RX8025_BIT_PON 0x10
  87. # define RX8025_BIT_VDET 0x40
  88. # define RX8025_BIT_XST 0x20
  89. struct ds1307 {
  90. u8 offset; /* register's offset */
  91. u8 regs[11];
  92. enum ds_type type;
  93. unsigned long flags;
  94. #define HAS_NVRAM 0 /* bit 0 == sysfs file active */
  95. #define HAS_ALARM 1 /* bit 1 == irq claimed */
  96. struct i2c_client *client;
  97. struct rtc_device *rtc;
  98. struct work_struct work;
  99. s32 (*read_block_data)(struct i2c_client *client, u8 command,
  100. u8 length, u8 *values);
  101. s32 (*write_block_data)(struct i2c_client *client, u8 command,
  102. u8 length, const u8 *values);
  103. };
  104. struct chip_desc {
  105. unsigned nvram56:1;
  106. unsigned alarm:1;
  107. };
  108. static const struct chip_desc chips[] = {
  109. [ds_1307] = {
  110. .nvram56 = 1,
  111. },
  112. [ds_1337] = {
  113. .alarm = 1,
  114. },
  115. [ds_1338] = {
  116. .nvram56 = 1,
  117. },
  118. [ds_1339] = {
  119. .alarm = 1,
  120. },
  121. [ds_1340] = {
  122. },
  123. [ds_3231] = {
  124. .alarm = 1,
  125. },
  126. [m41t00] = {
  127. },
  128. [rx_8025] = {
  129. }, };
  130. static const struct i2c_device_id ds1307_id[] = {
  131. { "ds1307", ds_1307 },
  132. { "ds1337", ds_1337 },
  133. { "ds1338", ds_1338 },
  134. { "ds1339", ds_1339 },
  135. { "ds1388", ds_1388 },
  136. { "ds1340", ds_1340 },
  137. { "ds3231", ds_3231 },
  138. { "m41t00", m41t00 },
  139. { "rx8025", rx_8025 },
  140. { }
  141. };
  142. MODULE_DEVICE_TABLE(i2c, ds1307_id);
  143. /*----------------------------------------------------------------------*/
  144. #define BLOCK_DATA_MAX_TRIES 10
  145. static s32 ds1307_read_block_data_once(struct i2c_client *client, u8 command,
  146. u8 length, u8 *values)
  147. {
  148. s32 i, data;
  149. for (i = 0; i < length; i++) {
  150. data = i2c_smbus_read_byte_data(client, command + i);
  151. if (data < 0)
  152. return data;
  153. values[i] = data;
  154. }
  155. return i;
  156. }
  157. static s32 ds1307_read_block_data(struct i2c_client *client, u8 command,
  158. u8 length, u8 *values)
  159. {
  160. u8 oldvalues[I2C_SMBUS_BLOCK_MAX];
  161. s32 ret;
  162. int tries = 0;
  163. dev_dbg(&client->dev, "ds1307_read_block_data (length=%d)\n", length);
  164. ret = ds1307_read_block_data_once(client, command, length, values);
  165. if (ret < 0)
  166. return ret;
  167. do {
  168. if (++tries > BLOCK_DATA_MAX_TRIES) {
  169. dev_err(&client->dev,
  170. "ds1307_read_block_data failed\n");
  171. return -EIO;
  172. }
  173. memcpy(oldvalues, values, length);
  174. ret = ds1307_read_block_data_once(client, command, length,
  175. values);
  176. if (ret < 0)
  177. return ret;
  178. } while (memcmp(oldvalues, values, length));
  179. return length;
  180. }
  181. static s32 ds1307_write_block_data(struct i2c_client *client, u8 command,
  182. u8 length, const u8 *values)
  183. {
  184. u8 currvalues[I2C_SMBUS_BLOCK_MAX];
  185. int tries = 0;
  186. dev_dbg(&client->dev, "ds1307_write_block_data (length=%d)\n", length);
  187. do {
  188. s32 i, ret;
  189. if (++tries > BLOCK_DATA_MAX_TRIES) {
  190. dev_err(&client->dev,
  191. "ds1307_write_block_data failed\n");
  192. return -EIO;
  193. }
  194. for (i = 0; i < length; i++) {
  195. ret = i2c_smbus_write_byte_data(client, command + i,
  196. values[i]);
  197. if (ret < 0)
  198. return ret;
  199. }
  200. ret = ds1307_read_block_data_once(client, command, length,
  201. currvalues);
  202. if (ret < 0)
  203. return ret;
  204. } while (memcmp(currvalues, values, length));
  205. return length;
  206. }
  207. /*----------------------------------------------------------------------*/
  208. /*
  209. * The IRQ logic includes a "real" handler running in IRQ context just
  210. * long enough to schedule this workqueue entry. We need a task context
  211. * to talk to the RTC, since I2C I/O calls require that; and disable the
  212. * IRQ until we clear its status on the chip, so that this handler can
  213. * work with any type of triggering (not just falling edge).
  214. *
  215. * The ds1337 and ds1339 both have two alarms, but we only use the first
  216. * one (with a "seconds" field). For ds1337 we expect nINTA is our alarm
  217. * signal; ds1339 chips have only one alarm signal.
  218. */
  219. static void ds1307_work(struct work_struct *work)
  220. {
  221. struct ds1307 *ds1307;
  222. struct i2c_client *client;
  223. struct mutex *lock;
  224. int stat, control;
  225. ds1307 = container_of(work, struct ds1307, work);
  226. client = ds1307->client;
  227. lock = &ds1307->rtc->ops_lock;
  228. mutex_lock(lock);
  229. stat = i2c_smbus_read_byte_data(client, DS1337_REG_STATUS);
  230. if (stat < 0)
  231. goto out;
  232. if (stat & DS1337_BIT_A1I) {
  233. stat &= ~DS1337_BIT_A1I;
  234. i2c_smbus_write_byte_data(client, DS1337_REG_STATUS, stat);
  235. control = i2c_smbus_read_byte_data(client, DS1337_REG_CONTROL);
  236. if (control < 0)
  237. goto out;
  238. control &= ~DS1337_BIT_A1IE;
  239. i2c_smbus_write_byte_data(client, DS1337_REG_CONTROL, control);
  240. /* rtc_update_irq() assumes that it is called
  241. * from IRQ-disabled context.
  242. */
  243. local_irq_disable();
  244. rtc_update_irq(ds1307->rtc, 1, RTC_AF | RTC_IRQF);
  245. local_irq_enable();
  246. }
  247. out:
  248. if (test_bit(HAS_ALARM, &ds1307->flags))
  249. enable_irq(client->irq);
  250. mutex_unlock(lock);
  251. }
  252. static irqreturn_t ds1307_irq(int irq, void *dev_id)
  253. {
  254. struct i2c_client *client = dev_id;
  255. struct ds1307 *ds1307 = i2c_get_clientdata(client);
  256. disable_irq_nosync(irq);
  257. schedule_work(&ds1307->work);
  258. return IRQ_HANDLED;
  259. }
  260. /*----------------------------------------------------------------------*/
  261. static int ds1307_get_time(struct device *dev, struct rtc_time *t)
  262. {
  263. struct ds1307 *ds1307 = dev_get_drvdata(dev);
  264. int tmp;
  265. /* read the RTC date and time registers all at once */
  266. tmp = ds1307->read_block_data(ds1307->client,
  267. ds1307->offset, 7, ds1307->regs);
  268. if (tmp != 7) {
  269. dev_err(dev, "%s error %d\n", "read", tmp);
  270. return -EIO;
  271. }
  272. dev_dbg(dev, "%s: %02x %02x %02x %02x %02x %02x %02x\n",
  273. "read",
  274. ds1307->regs[0], ds1307->regs[1],
  275. ds1307->regs[2], ds1307->regs[3],
  276. ds1307->regs[4], ds1307->regs[5],
  277. ds1307->regs[6]);
  278. t->tm_sec = bcd2bin(ds1307->regs[DS1307_REG_SECS] & 0x7f);
  279. t->tm_min = bcd2bin(ds1307->regs[DS1307_REG_MIN] & 0x7f);
  280. tmp = ds1307->regs[DS1307_REG_HOUR] & 0x3f;
  281. t->tm_hour = bcd2bin(tmp);
  282. t->tm_wday = bcd2bin(ds1307->regs[DS1307_REG_WDAY] & 0x07) - 1;
  283. t->tm_mday = bcd2bin(ds1307->regs[DS1307_REG_MDAY] & 0x3f);
  284. tmp = ds1307->regs[DS1307_REG_MONTH] & 0x1f;
  285. t->tm_mon = bcd2bin(tmp) - 1;
  286. /* assume 20YY not 19YY, and ignore DS1337_BIT_CENTURY */
  287. t->tm_year = bcd2bin(ds1307->regs[DS1307_REG_YEAR]) + 100;
  288. dev_dbg(dev, "%s secs=%d, mins=%d, "
  289. "hours=%d, mday=%d, mon=%d, year=%d, wday=%d\n",
  290. "read", t->tm_sec, t->tm_min,
  291. t->tm_hour, t->tm_mday,
  292. t->tm_mon, t->tm_year, t->tm_wday);
  293. /* initial clock setting can be undefined */
  294. return rtc_valid_tm(t);
  295. }
  296. static int ds1307_set_time(struct device *dev, struct rtc_time *t)
  297. {
  298. struct ds1307 *ds1307 = dev_get_drvdata(dev);
  299. int result;
  300. int tmp;
  301. u8 *buf = ds1307->regs;
  302. dev_dbg(dev, "%s secs=%d, mins=%d, "
  303. "hours=%d, mday=%d, mon=%d, year=%d, wday=%d\n",
  304. "write", t->tm_sec, t->tm_min,
  305. t->tm_hour, t->tm_mday,
  306. t->tm_mon, t->tm_year, t->tm_wday);
  307. buf[DS1307_REG_SECS] = bin2bcd(t->tm_sec);
  308. buf[DS1307_REG_MIN] = bin2bcd(t->tm_min);
  309. buf[DS1307_REG_HOUR] = bin2bcd(t->tm_hour);
  310. buf[DS1307_REG_WDAY] = bin2bcd(t->tm_wday + 1);
  311. buf[DS1307_REG_MDAY] = bin2bcd(t->tm_mday);
  312. buf[DS1307_REG_MONTH] = bin2bcd(t->tm_mon + 1);
  313. /* assume 20YY not 19YY */
  314. tmp = t->tm_year - 100;
  315. buf[DS1307_REG_YEAR] = bin2bcd(tmp);
  316. switch (ds1307->type) {
  317. case ds_1337:
  318. case ds_1339:
  319. case ds_3231:
  320. buf[DS1307_REG_MONTH] |= DS1337_BIT_CENTURY;
  321. break;
  322. case ds_1340:
  323. buf[DS1307_REG_HOUR] |= DS1340_BIT_CENTURY_EN
  324. | DS1340_BIT_CENTURY;
  325. break;
  326. default:
  327. break;
  328. }
  329. dev_dbg(dev, "%s: %02x %02x %02x %02x %02x %02x %02x\n",
  330. "write", buf[0], buf[1], buf[2], buf[3],
  331. buf[4], buf[5], buf[6]);
  332. result = ds1307->write_block_data(ds1307->client,
  333. ds1307->offset, 7, buf);
  334. if (result < 0) {
  335. dev_err(dev, "%s error %d\n", "write", result);
  336. return result;
  337. }
  338. return 0;
  339. }
  340. static int ds1337_read_alarm(struct device *dev, struct rtc_wkalrm *t)
  341. {
  342. struct i2c_client *client = to_i2c_client(dev);
  343. struct ds1307 *ds1307 = i2c_get_clientdata(client);
  344. int ret;
  345. if (!test_bit(HAS_ALARM, &ds1307->flags))
  346. return -EINVAL;
  347. /* read all ALARM1, ALARM2, and status registers at once */
  348. ret = ds1307->read_block_data(client,
  349. DS1339_REG_ALARM1_SECS, 9, ds1307->regs);
  350. if (ret != 9) {
  351. dev_err(dev, "%s error %d\n", "alarm read", ret);
  352. return -EIO;
  353. }
  354. dev_dbg(dev, "%s: %02x %02x %02x %02x, %02x %02x %02x, %02x %02x\n",
  355. "alarm read",
  356. ds1307->regs[0], ds1307->regs[1],
  357. ds1307->regs[2], ds1307->regs[3],
  358. ds1307->regs[4], ds1307->regs[5],
  359. ds1307->regs[6], ds1307->regs[7],
  360. ds1307->regs[8]);
  361. /* report alarm time (ALARM1); assume 24 hour and day-of-month modes,
  362. * and that all four fields are checked matches
  363. */
  364. t->time.tm_sec = bcd2bin(ds1307->regs[0] & 0x7f);
  365. t->time.tm_min = bcd2bin(ds1307->regs[1] & 0x7f);
  366. t->time.tm_hour = bcd2bin(ds1307->regs[2] & 0x3f);
  367. t->time.tm_mday = bcd2bin(ds1307->regs[3] & 0x3f);
  368. t->time.tm_mon = -1;
  369. t->time.tm_year = -1;
  370. t->time.tm_wday = -1;
  371. t->time.tm_yday = -1;
  372. t->time.tm_isdst = -1;
  373. /* ... and status */
  374. t->enabled = !!(ds1307->regs[7] & DS1337_BIT_A1IE);
  375. t->pending = !!(ds1307->regs[8] & DS1337_BIT_A1I);
  376. dev_dbg(dev, "%s secs=%d, mins=%d, "
  377. "hours=%d, mday=%d, enabled=%d, pending=%d\n",
  378. "alarm read", t->time.tm_sec, t->time.tm_min,
  379. t->time.tm_hour, t->time.tm_mday,
  380. t->enabled, t->pending);
  381. return 0;
  382. }
  383. static int ds1337_set_alarm(struct device *dev, struct rtc_wkalrm *t)
  384. {
  385. struct i2c_client *client = to_i2c_client(dev);
  386. struct ds1307 *ds1307 = i2c_get_clientdata(client);
  387. unsigned char *buf = ds1307->regs;
  388. u8 control, status;
  389. int ret;
  390. if (!test_bit(HAS_ALARM, &ds1307->flags))
  391. return -EINVAL;
  392. dev_dbg(dev, "%s secs=%d, mins=%d, "
  393. "hours=%d, mday=%d, enabled=%d, pending=%d\n",
  394. "alarm set", t->time.tm_sec, t->time.tm_min,
  395. t->time.tm_hour, t->time.tm_mday,
  396. t->enabled, t->pending);
  397. /* read current status of both alarms and the chip */
  398. ret = ds1307->read_block_data(client,
  399. DS1339_REG_ALARM1_SECS, 9, buf);
  400. if (ret != 9) {
  401. dev_err(dev, "%s error %d\n", "alarm write", ret);
  402. return -EIO;
  403. }
  404. control = ds1307->regs[7];
  405. status = ds1307->regs[8];
  406. dev_dbg(dev, "%s: %02x %02x %02x %02x, %02x %02x %02x, %02x %02x\n",
  407. "alarm set (old status)",
  408. ds1307->regs[0], ds1307->regs[1],
  409. ds1307->regs[2], ds1307->regs[3],
  410. ds1307->regs[4], ds1307->regs[5],
  411. ds1307->regs[6], control, status);
  412. /* set ALARM1, using 24 hour and day-of-month modes */
  413. buf[0] = bin2bcd(t->time.tm_sec);
  414. buf[1] = bin2bcd(t->time.tm_min);
  415. buf[2] = bin2bcd(t->time.tm_hour);
  416. buf[3] = bin2bcd(t->time.tm_mday);
  417. /* set ALARM2 to non-garbage */
  418. buf[4] = 0;
  419. buf[5] = 0;
  420. buf[6] = 0;
  421. /* optionally enable ALARM1 */
  422. buf[7] = control & ~(DS1337_BIT_A1IE | DS1337_BIT_A2IE);
  423. if (t->enabled) {
  424. dev_dbg(dev, "alarm IRQ armed\n");
  425. buf[7] |= DS1337_BIT_A1IE; /* only ALARM1 is used */
  426. }
  427. buf[8] = status & ~(DS1337_BIT_A1I | DS1337_BIT_A2I);
  428. ret = ds1307->write_block_data(client,
  429. DS1339_REG_ALARM1_SECS, 9, buf);
  430. if (ret < 0) {
  431. dev_err(dev, "can't set alarm time\n");
  432. return ret;
  433. }
  434. return 0;
  435. }
  436. static int ds1307_ioctl(struct device *dev, unsigned int cmd, unsigned long arg)
  437. {
  438. struct i2c_client *client = to_i2c_client(dev);
  439. struct ds1307 *ds1307 = i2c_get_clientdata(client);
  440. int ret;
  441. switch (cmd) {
  442. case RTC_AIE_OFF:
  443. if (!test_bit(HAS_ALARM, &ds1307->flags))
  444. return -ENOTTY;
  445. ret = i2c_smbus_read_byte_data(client, DS1337_REG_CONTROL);
  446. if (ret < 0)
  447. return ret;
  448. ret &= ~DS1337_BIT_A1IE;
  449. ret = i2c_smbus_write_byte_data(client,
  450. DS1337_REG_CONTROL, ret);
  451. if (ret < 0)
  452. return ret;
  453. break;
  454. case RTC_AIE_ON:
  455. if (!test_bit(HAS_ALARM, &ds1307->flags))
  456. return -ENOTTY;
  457. ret = i2c_smbus_read_byte_data(client, DS1337_REG_CONTROL);
  458. if (ret < 0)
  459. return ret;
  460. ret |= DS1337_BIT_A1IE;
  461. ret = i2c_smbus_write_byte_data(client,
  462. DS1337_REG_CONTROL, ret);
  463. if (ret < 0)
  464. return ret;
  465. break;
  466. default:
  467. return -ENOIOCTLCMD;
  468. }
  469. return 0;
  470. }
  471. static const struct rtc_class_ops ds13xx_rtc_ops = {
  472. .read_time = ds1307_get_time,
  473. .set_time = ds1307_set_time,
  474. .read_alarm = ds1337_read_alarm,
  475. .set_alarm = ds1337_set_alarm,
  476. .ioctl = ds1307_ioctl,
  477. };
  478. /*----------------------------------------------------------------------*/
  479. #define NVRAM_SIZE 56
  480. static ssize_t
  481. ds1307_nvram_read(struct kobject *kobj, struct bin_attribute *attr,
  482. char *buf, loff_t off, size_t count)
  483. {
  484. struct i2c_client *client;
  485. struct ds1307 *ds1307;
  486. int result;
  487. client = kobj_to_i2c_client(kobj);
  488. ds1307 = i2c_get_clientdata(client);
  489. if (unlikely(off >= NVRAM_SIZE))
  490. return 0;
  491. if ((off + count) > NVRAM_SIZE)
  492. count = NVRAM_SIZE - off;
  493. if (unlikely(!count))
  494. return count;
  495. result = ds1307->read_block_data(client, 8 + off, count, buf);
  496. if (result < 0)
  497. dev_err(&client->dev, "%s error %d\n", "nvram read", result);
  498. return result;
  499. }
  500. static ssize_t
  501. ds1307_nvram_write(struct kobject *kobj, struct bin_attribute *attr,
  502. char *buf, loff_t off, size_t count)
  503. {
  504. struct i2c_client *client;
  505. struct ds1307 *ds1307;
  506. int result;
  507. client = kobj_to_i2c_client(kobj);
  508. ds1307 = i2c_get_clientdata(client);
  509. if (unlikely(off >= NVRAM_SIZE))
  510. return -EFBIG;
  511. if ((off + count) > NVRAM_SIZE)
  512. count = NVRAM_SIZE - off;
  513. if (unlikely(!count))
  514. return count;
  515. result = ds1307->write_block_data(client, 8 + off, count, buf);
  516. if (result < 0) {
  517. dev_err(&client->dev, "%s error %d\n", "nvram write", result);
  518. return result;
  519. }
  520. return count;
  521. }
  522. static struct bin_attribute nvram = {
  523. .attr = {
  524. .name = "nvram",
  525. .mode = S_IRUGO | S_IWUSR,
  526. },
  527. .read = ds1307_nvram_read,
  528. .write = ds1307_nvram_write,
  529. .size = NVRAM_SIZE,
  530. };
  531. /*----------------------------------------------------------------------*/
  532. static struct i2c_driver ds1307_driver;
  533. static int __devinit ds1307_probe(struct i2c_client *client,
  534. const struct i2c_device_id *id)
  535. {
  536. struct ds1307 *ds1307;
  537. int err = -ENODEV;
  538. int tmp;
  539. const struct chip_desc *chip = &chips[id->driver_data];
  540. struct i2c_adapter *adapter = to_i2c_adapter(client->dev.parent);
  541. int want_irq = false;
  542. unsigned char *buf;
  543. static const int bbsqi_bitpos[] = {
  544. [ds_1337] = 0,
  545. [ds_1339] = DS1339_BIT_BBSQI,
  546. [ds_3231] = DS3231_BIT_BBSQW,
  547. };
  548. if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)
  549. && !i2c_check_functionality(adapter, I2C_FUNC_SMBUS_I2C_BLOCK))
  550. return -EIO;
  551. if (!(ds1307 = kzalloc(sizeof(struct ds1307), GFP_KERNEL)))
  552. return -ENOMEM;
  553. i2c_set_clientdata(client, ds1307);
  554. ds1307->client = client;
  555. ds1307->type = id->driver_data;
  556. ds1307->offset = 0;
  557. buf = ds1307->regs;
  558. if (i2c_check_functionality(adapter, I2C_FUNC_SMBUS_I2C_BLOCK)) {
  559. ds1307->read_block_data = i2c_smbus_read_i2c_block_data;
  560. ds1307->write_block_data = i2c_smbus_write_i2c_block_data;
  561. } else {
  562. ds1307->read_block_data = ds1307_read_block_data;
  563. ds1307->write_block_data = ds1307_write_block_data;
  564. }
  565. switch (ds1307->type) {
  566. case ds_1337:
  567. case ds_1339:
  568. case ds_3231:
  569. /* has IRQ? */
  570. if (ds1307->client->irq > 0 && chip->alarm) {
  571. INIT_WORK(&ds1307->work, ds1307_work);
  572. want_irq = true;
  573. }
  574. /* get registers that the "rtc" read below won't read... */
  575. tmp = ds1307->read_block_data(ds1307->client,
  576. DS1337_REG_CONTROL, 2, buf);
  577. if (tmp != 2) {
  578. pr_debug("read error %d\n", tmp);
  579. err = -EIO;
  580. goto exit_free;
  581. }
  582. /* oscillator off? turn it on, so clock can tick. */
  583. if (ds1307->regs[0] & DS1337_BIT_nEOSC)
  584. ds1307->regs[0] &= ~DS1337_BIT_nEOSC;
  585. /* Using IRQ? Disable the square wave and both alarms.
  586. * For some variants, be sure alarms can trigger when we're
  587. * running on Vbackup (BBSQI/BBSQW)
  588. */
  589. if (want_irq) {
  590. ds1307->regs[0] |= DS1337_BIT_INTCN
  591. | bbsqi_bitpos[ds1307->type];
  592. ds1307->regs[0] &= ~(DS1337_BIT_A2IE | DS1337_BIT_A1IE);
  593. }
  594. i2c_smbus_write_byte_data(client, DS1337_REG_CONTROL,
  595. ds1307->regs[0]);
  596. /* oscillator fault? clear flag, and warn */
  597. if (ds1307->regs[1] & DS1337_BIT_OSF) {
  598. i2c_smbus_write_byte_data(client, DS1337_REG_STATUS,
  599. ds1307->regs[1] & ~DS1337_BIT_OSF);
  600. dev_warn(&client->dev, "SET TIME!\n");
  601. }
  602. break;
  603. case rx_8025:
  604. tmp = i2c_smbus_read_i2c_block_data(ds1307->client,
  605. RX8025_REG_CTRL1 << 4 | 0x08, 2, buf);
  606. if (tmp != 2) {
  607. pr_debug("read error %d\n", tmp);
  608. err = -EIO;
  609. goto exit_free;
  610. }
  611. /* oscillator off? turn it on, so clock can tick. */
  612. if (!(ds1307->regs[1] & RX8025_BIT_XST)) {
  613. ds1307->regs[1] |= RX8025_BIT_XST;
  614. i2c_smbus_write_byte_data(client,
  615. RX8025_REG_CTRL2 << 4 | 0x08,
  616. ds1307->regs[1]);
  617. dev_warn(&client->dev,
  618. "oscillator stop detected - SET TIME!\n");
  619. }
  620. if (ds1307->regs[1] & RX8025_BIT_PON) {
  621. ds1307->regs[1] &= ~RX8025_BIT_PON;
  622. i2c_smbus_write_byte_data(client,
  623. RX8025_REG_CTRL2 << 4 | 0x08,
  624. ds1307->regs[1]);
  625. dev_warn(&client->dev, "power-on detected\n");
  626. }
  627. if (ds1307->regs[1] & RX8025_BIT_VDET) {
  628. ds1307->regs[1] &= ~RX8025_BIT_VDET;
  629. i2c_smbus_write_byte_data(client,
  630. RX8025_REG_CTRL2 << 4 | 0x08,
  631. ds1307->regs[1]);
  632. dev_warn(&client->dev, "voltage drop detected\n");
  633. }
  634. /* make sure we are running in 24hour mode */
  635. if (!(ds1307->regs[0] & RX8025_BIT_2412)) {
  636. u8 hour;
  637. /* switch to 24 hour mode */
  638. i2c_smbus_write_byte_data(client,
  639. RX8025_REG_CTRL1 << 4 | 0x08,
  640. ds1307->regs[0] |
  641. RX8025_BIT_2412);
  642. tmp = i2c_smbus_read_i2c_block_data(ds1307->client,
  643. RX8025_REG_CTRL1 << 4 | 0x08, 2, buf);
  644. if (tmp != 2) {
  645. pr_debug("read error %d\n", tmp);
  646. err = -EIO;
  647. goto exit_free;
  648. }
  649. /* correct hour */
  650. hour = bcd2bin(ds1307->regs[DS1307_REG_HOUR]);
  651. if (hour == 12)
  652. hour = 0;
  653. if (ds1307->regs[DS1307_REG_HOUR] & DS1307_BIT_PM)
  654. hour += 12;
  655. i2c_smbus_write_byte_data(client,
  656. DS1307_REG_HOUR << 4 | 0x08,
  657. hour);
  658. }
  659. break;
  660. case ds_1388:
  661. ds1307->offset = 1; /* Seconds starts at 1 */
  662. break;
  663. default:
  664. break;
  665. }
  666. read_rtc:
  667. /* read RTC registers */
  668. tmp = ds1307->read_block_data(ds1307->client, 0, 8, buf);
  669. if (tmp != 8) {
  670. pr_debug("read error %d\n", tmp);
  671. err = -EIO;
  672. goto exit_free;
  673. }
  674. /* minimal sanity checking; some chips (like DS1340) don't
  675. * specify the extra bits as must-be-zero, but there are
  676. * still a few values that are clearly out-of-range.
  677. */
  678. tmp = ds1307->regs[DS1307_REG_SECS];
  679. switch (ds1307->type) {
  680. case ds_1307:
  681. case m41t00:
  682. /* clock halted? turn it on, so clock can tick. */
  683. if (tmp & DS1307_BIT_CH) {
  684. i2c_smbus_write_byte_data(client, DS1307_REG_SECS, 0);
  685. dev_warn(&client->dev, "SET TIME!\n");
  686. goto read_rtc;
  687. }
  688. break;
  689. case ds_1338:
  690. /* clock halted? turn it on, so clock can tick. */
  691. if (tmp & DS1307_BIT_CH)
  692. i2c_smbus_write_byte_data(client, DS1307_REG_SECS, 0);
  693. /* oscillator fault? clear flag, and warn */
  694. if (ds1307->regs[DS1307_REG_CONTROL] & DS1338_BIT_OSF) {
  695. i2c_smbus_write_byte_data(client, DS1307_REG_CONTROL,
  696. ds1307->regs[DS1307_REG_CONTROL]
  697. & ~DS1338_BIT_OSF);
  698. dev_warn(&client->dev, "SET TIME!\n");
  699. goto read_rtc;
  700. }
  701. break;
  702. case ds_1340:
  703. /* clock halted? turn it on, so clock can tick. */
  704. if (tmp & DS1340_BIT_nEOSC)
  705. i2c_smbus_write_byte_data(client, DS1307_REG_SECS, 0);
  706. tmp = i2c_smbus_read_byte_data(client, DS1340_REG_FLAG);
  707. if (tmp < 0) {
  708. pr_debug("read error %d\n", tmp);
  709. err = -EIO;
  710. goto exit_free;
  711. }
  712. /* oscillator fault? clear flag, and warn */
  713. if (tmp & DS1340_BIT_OSF) {
  714. i2c_smbus_write_byte_data(client, DS1340_REG_FLAG, 0);
  715. dev_warn(&client->dev, "SET TIME!\n");
  716. }
  717. break;
  718. case rx_8025:
  719. case ds_1337:
  720. case ds_1339:
  721. case ds_1388:
  722. case ds_3231:
  723. break;
  724. }
  725. tmp = ds1307->regs[DS1307_REG_HOUR];
  726. switch (ds1307->type) {
  727. case ds_1340:
  728. case m41t00:
  729. /* NOTE: ignores century bits; fix before deploying
  730. * systems that will run through year 2100.
  731. */
  732. break;
  733. case rx_8025:
  734. break;
  735. default:
  736. if (!(tmp & DS1307_BIT_12HR))
  737. break;
  738. /* Be sure we're in 24 hour mode. Multi-master systems
  739. * take note...
  740. */
  741. tmp = bcd2bin(tmp & 0x1f);
  742. if (tmp == 12)
  743. tmp = 0;
  744. if (ds1307->regs[DS1307_REG_HOUR] & DS1307_BIT_PM)
  745. tmp += 12;
  746. i2c_smbus_write_byte_data(client,
  747. DS1307_REG_HOUR,
  748. bin2bcd(tmp));
  749. }
  750. ds1307->rtc = rtc_device_register(client->name, &client->dev,
  751. &ds13xx_rtc_ops, THIS_MODULE);
  752. if (IS_ERR(ds1307->rtc)) {
  753. err = PTR_ERR(ds1307->rtc);
  754. dev_err(&client->dev,
  755. "unable to register the class device\n");
  756. goto exit_free;
  757. }
  758. if (want_irq) {
  759. err = request_irq(client->irq, ds1307_irq, 0,
  760. ds1307->rtc->name, client);
  761. if (err) {
  762. dev_err(&client->dev,
  763. "unable to request IRQ!\n");
  764. goto exit_irq;
  765. }
  766. set_bit(HAS_ALARM, &ds1307->flags);
  767. dev_dbg(&client->dev, "got IRQ %d\n", client->irq);
  768. }
  769. if (chip->nvram56) {
  770. err = sysfs_create_bin_file(&client->dev.kobj, &nvram);
  771. if (err == 0) {
  772. set_bit(HAS_NVRAM, &ds1307->flags);
  773. dev_info(&client->dev, "56 bytes nvram\n");
  774. }
  775. }
  776. return 0;
  777. exit_irq:
  778. if (ds1307->rtc)
  779. rtc_device_unregister(ds1307->rtc);
  780. exit_free:
  781. kfree(ds1307);
  782. return err;
  783. }
  784. static int __devexit ds1307_remove(struct i2c_client *client)
  785. {
  786. struct ds1307 *ds1307 = i2c_get_clientdata(client);
  787. if (test_and_clear_bit(HAS_ALARM, &ds1307->flags)) {
  788. free_irq(client->irq, client);
  789. cancel_work_sync(&ds1307->work);
  790. }
  791. if (test_and_clear_bit(HAS_NVRAM, &ds1307->flags))
  792. sysfs_remove_bin_file(&client->dev.kobj, &nvram);
  793. rtc_device_unregister(ds1307->rtc);
  794. kfree(ds1307);
  795. return 0;
  796. }
  797. static struct i2c_driver ds1307_driver = {
  798. .driver = {
  799. .name = "rtc-ds1307",
  800. .owner = THIS_MODULE,
  801. },
  802. .probe = ds1307_probe,
  803. .remove = __devexit_p(ds1307_remove),
  804. .id_table = ds1307_id,
  805. };
  806. static int __init ds1307_init(void)
  807. {
  808. return i2c_add_driver(&ds1307_driver);
  809. }
  810. module_init(ds1307_init);
  811. static void __exit ds1307_exit(void)
  812. {
  813. i2c_del_driver(&ds1307_driver);
  814. }
  815. module_exit(ds1307_exit);
  816. MODULE_DESCRIPTION("RTC driver for DS1307 and similar chips");
  817. MODULE_LICENSE("GPL");