mthca_provider.c 27 KB

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  1. /*
  2. * Copyright (c) 2004, 2005 Topspin Communications. All rights reserved.
  3. * Copyright (c) 2005 Sun Microsystems, Inc. All rights reserved.
  4. * Copyright (c) 2005 Cisco Systems. All rights reserved.
  5. * Copyright (c) 2005 Mellanox Technologies. All rights reserved.
  6. * Copyright (c) 2004 Voltaire, Inc. All rights reserved.
  7. *
  8. * This software is available to you under a choice of one of two
  9. * licenses. You may choose to be licensed under the terms of the GNU
  10. * General Public License (GPL) Version 2, available from the file
  11. * COPYING in the main directory of this source tree, or the
  12. * OpenIB.org BSD license below:
  13. *
  14. * Redistribution and use in source and binary forms, with or
  15. * without modification, are permitted provided that the following
  16. * conditions are met:
  17. *
  18. * - Redistributions of source code must retain the above
  19. * copyright notice, this list of conditions and the following
  20. * disclaimer.
  21. *
  22. * - Redistributions in binary form must reproduce the above
  23. * copyright notice, this list of conditions and the following
  24. * disclaimer in the documentation and/or other materials
  25. * provided with the distribution.
  26. *
  27. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  28. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  29. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  30. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  31. * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  32. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  33. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  34. * SOFTWARE.
  35. *
  36. * $Id: mthca_provider.c 1397 2004-12-28 05:09:00Z roland $
  37. */
  38. #include <ib_smi.h>
  39. #include <linux/mm.h>
  40. #include "mthca_dev.h"
  41. #include "mthca_cmd.h"
  42. #include "mthca_user.h"
  43. #include "mthca_memfree.h"
  44. static int mthca_query_device(struct ib_device *ibdev,
  45. struct ib_device_attr *props)
  46. {
  47. struct ib_smp *in_mad = NULL;
  48. struct ib_smp *out_mad = NULL;
  49. int err = -ENOMEM;
  50. struct mthca_dev* mdev = to_mdev(ibdev);
  51. u8 status;
  52. in_mad = kmalloc(sizeof *in_mad, GFP_KERNEL);
  53. out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
  54. if (!in_mad || !out_mad)
  55. goto out;
  56. memset(props, 0, sizeof *props);
  57. props->fw_ver = mdev->fw_ver;
  58. memset(in_mad, 0, sizeof *in_mad);
  59. in_mad->base_version = 1;
  60. in_mad->mgmt_class = IB_MGMT_CLASS_SUBN_LID_ROUTED;
  61. in_mad->class_version = 1;
  62. in_mad->method = IB_MGMT_METHOD_GET;
  63. in_mad->attr_id = IB_SMP_ATTR_NODE_INFO;
  64. err = mthca_MAD_IFC(mdev, 1, 1,
  65. 1, NULL, NULL, in_mad, out_mad,
  66. &status);
  67. if (err)
  68. goto out;
  69. if (status) {
  70. err = -EINVAL;
  71. goto out;
  72. }
  73. props->device_cap_flags = mdev->device_cap_flags;
  74. props->vendor_id = be32_to_cpup((__be32 *) (out_mad->data + 36)) &
  75. 0xffffff;
  76. props->vendor_part_id = be16_to_cpup((__be16 *) (out_mad->data + 30));
  77. props->hw_ver = be16_to_cpup((__be16 *) (out_mad->data + 32));
  78. memcpy(&props->sys_image_guid, out_mad->data + 4, 8);
  79. memcpy(&props->node_guid, out_mad->data + 12, 8);
  80. props->max_mr_size = ~0ull;
  81. props->max_qp = mdev->limits.num_qps - mdev->limits.reserved_qps;
  82. props->max_qp_wr = 0xffff;
  83. props->max_sge = mdev->limits.max_sg;
  84. props->max_cq = mdev->limits.num_cqs - mdev->limits.reserved_cqs;
  85. props->max_cqe = 0xffff;
  86. props->max_mr = mdev->limits.num_mpts - mdev->limits.reserved_mrws;
  87. props->max_pd = mdev->limits.num_pds - mdev->limits.reserved_pds;
  88. props->max_qp_rd_atom = 1 << mdev->qp_table.rdb_shift;
  89. props->max_qp_init_rd_atom = 1 << mdev->qp_table.rdb_shift;
  90. props->local_ca_ack_delay = mdev->limits.local_ca_ack_delay;
  91. err = 0;
  92. out:
  93. kfree(in_mad);
  94. kfree(out_mad);
  95. return err;
  96. }
  97. static int mthca_query_port(struct ib_device *ibdev,
  98. u8 port, struct ib_port_attr *props)
  99. {
  100. struct ib_smp *in_mad = NULL;
  101. struct ib_smp *out_mad = NULL;
  102. int err = -ENOMEM;
  103. u8 status;
  104. in_mad = kmalloc(sizeof *in_mad, GFP_KERNEL);
  105. out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
  106. if (!in_mad || !out_mad)
  107. goto out;
  108. memset(in_mad, 0, sizeof *in_mad);
  109. in_mad->base_version = 1;
  110. in_mad->mgmt_class = IB_MGMT_CLASS_SUBN_LID_ROUTED;
  111. in_mad->class_version = 1;
  112. in_mad->method = IB_MGMT_METHOD_GET;
  113. in_mad->attr_id = IB_SMP_ATTR_PORT_INFO;
  114. in_mad->attr_mod = cpu_to_be32(port);
  115. err = mthca_MAD_IFC(to_mdev(ibdev), 1, 1,
  116. port, NULL, NULL, in_mad, out_mad,
  117. &status);
  118. if (err)
  119. goto out;
  120. if (status) {
  121. err = -EINVAL;
  122. goto out;
  123. }
  124. props->lid = be16_to_cpup((__be16 *) (out_mad->data + 16));
  125. props->lmc = out_mad->data[34] & 0x7;
  126. props->sm_lid = be16_to_cpup((__be16 *) (out_mad->data + 18));
  127. props->sm_sl = out_mad->data[36] & 0xf;
  128. props->state = out_mad->data[32] & 0xf;
  129. props->phys_state = out_mad->data[33] >> 4;
  130. props->port_cap_flags = be32_to_cpup((__be32 *) (out_mad->data + 20));
  131. props->gid_tbl_len = to_mdev(ibdev)->limits.gid_table_len;
  132. props->pkey_tbl_len = to_mdev(ibdev)->limits.pkey_table_len;
  133. props->qkey_viol_cntr = be16_to_cpup((__be16 *) (out_mad->data + 48));
  134. props->active_width = out_mad->data[31] & 0xf;
  135. props->active_speed = out_mad->data[35] >> 4;
  136. out:
  137. kfree(in_mad);
  138. kfree(out_mad);
  139. return err;
  140. }
  141. static int mthca_modify_port(struct ib_device *ibdev,
  142. u8 port, int port_modify_mask,
  143. struct ib_port_modify *props)
  144. {
  145. struct mthca_set_ib_param set_ib;
  146. struct ib_port_attr attr;
  147. int err;
  148. u8 status;
  149. if (down_interruptible(&to_mdev(ibdev)->cap_mask_mutex))
  150. return -ERESTARTSYS;
  151. err = mthca_query_port(ibdev, port, &attr);
  152. if (err)
  153. goto out;
  154. set_ib.set_si_guid = 0;
  155. set_ib.reset_qkey_viol = !!(port_modify_mask & IB_PORT_RESET_QKEY_CNTR);
  156. set_ib.cap_mask = (attr.port_cap_flags | props->set_port_cap_mask) &
  157. ~props->clr_port_cap_mask;
  158. err = mthca_SET_IB(to_mdev(ibdev), &set_ib, port, &status);
  159. if (err)
  160. goto out;
  161. if (status) {
  162. err = -EINVAL;
  163. goto out;
  164. }
  165. out:
  166. up(&to_mdev(ibdev)->cap_mask_mutex);
  167. return err;
  168. }
  169. static int mthca_query_pkey(struct ib_device *ibdev,
  170. u8 port, u16 index, u16 *pkey)
  171. {
  172. struct ib_smp *in_mad = NULL;
  173. struct ib_smp *out_mad = NULL;
  174. int err = -ENOMEM;
  175. u8 status;
  176. in_mad = kmalloc(sizeof *in_mad, GFP_KERNEL);
  177. out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
  178. if (!in_mad || !out_mad)
  179. goto out;
  180. memset(in_mad, 0, sizeof *in_mad);
  181. in_mad->base_version = 1;
  182. in_mad->mgmt_class = IB_MGMT_CLASS_SUBN_LID_ROUTED;
  183. in_mad->class_version = 1;
  184. in_mad->method = IB_MGMT_METHOD_GET;
  185. in_mad->attr_id = IB_SMP_ATTR_PKEY_TABLE;
  186. in_mad->attr_mod = cpu_to_be32(index / 32);
  187. err = mthca_MAD_IFC(to_mdev(ibdev), 1, 1,
  188. port, NULL, NULL, in_mad, out_mad,
  189. &status);
  190. if (err)
  191. goto out;
  192. if (status) {
  193. err = -EINVAL;
  194. goto out;
  195. }
  196. *pkey = be16_to_cpu(((__be16 *) out_mad->data)[index % 32]);
  197. out:
  198. kfree(in_mad);
  199. kfree(out_mad);
  200. return err;
  201. }
  202. static int mthca_query_gid(struct ib_device *ibdev, u8 port,
  203. int index, union ib_gid *gid)
  204. {
  205. struct ib_smp *in_mad = NULL;
  206. struct ib_smp *out_mad = NULL;
  207. int err = -ENOMEM;
  208. u8 status;
  209. in_mad = kmalloc(sizeof *in_mad, GFP_KERNEL);
  210. out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
  211. if (!in_mad || !out_mad)
  212. goto out;
  213. memset(in_mad, 0, sizeof *in_mad);
  214. in_mad->base_version = 1;
  215. in_mad->mgmt_class = IB_MGMT_CLASS_SUBN_LID_ROUTED;
  216. in_mad->class_version = 1;
  217. in_mad->method = IB_MGMT_METHOD_GET;
  218. in_mad->attr_id = IB_SMP_ATTR_PORT_INFO;
  219. in_mad->attr_mod = cpu_to_be32(port);
  220. err = mthca_MAD_IFC(to_mdev(ibdev), 1, 1,
  221. port, NULL, NULL, in_mad, out_mad,
  222. &status);
  223. if (err)
  224. goto out;
  225. if (status) {
  226. err = -EINVAL;
  227. goto out;
  228. }
  229. memcpy(gid->raw, out_mad->data + 8, 8);
  230. memset(in_mad, 0, sizeof *in_mad);
  231. in_mad->base_version = 1;
  232. in_mad->mgmt_class = IB_MGMT_CLASS_SUBN_LID_ROUTED;
  233. in_mad->class_version = 1;
  234. in_mad->method = IB_MGMT_METHOD_GET;
  235. in_mad->attr_id = IB_SMP_ATTR_GUID_INFO;
  236. in_mad->attr_mod = cpu_to_be32(index / 8);
  237. err = mthca_MAD_IFC(to_mdev(ibdev), 1, 1,
  238. port, NULL, NULL, in_mad, out_mad,
  239. &status);
  240. if (err)
  241. goto out;
  242. if (status) {
  243. err = -EINVAL;
  244. goto out;
  245. }
  246. memcpy(gid->raw + 8, out_mad->data + (index % 8) * 16, 8);
  247. out:
  248. kfree(in_mad);
  249. kfree(out_mad);
  250. return err;
  251. }
  252. static struct ib_ucontext *mthca_alloc_ucontext(struct ib_device *ibdev,
  253. struct ib_udata *udata)
  254. {
  255. struct mthca_alloc_ucontext_resp uresp;
  256. struct mthca_ucontext *context;
  257. int err;
  258. memset(&uresp, 0, sizeof uresp);
  259. uresp.qp_tab_size = to_mdev(ibdev)->limits.num_qps;
  260. if (mthca_is_memfree(to_mdev(ibdev)))
  261. uresp.uarc_size = to_mdev(ibdev)->uar_table.uarc_size;
  262. else
  263. uresp.uarc_size = 0;
  264. context = kmalloc(sizeof *context, GFP_KERNEL);
  265. if (!context)
  266. return ERR_PTR(-ENOMEM);
  267. err = mthca_uar_alloc(to_mdev(ibdev), &context->uar);
  268. if (err) {
  269. kfree(context);
  270. return ERR_PTR(err);
  271. }
  272. context->db_tab = mthca_init_user_db_tab(to_mdev(ibdev));
  273. if (IS_ERR(context->db_tab)) {
  274. err = PTR_ERR(context->db_tab);
  275. mthca_uar_free(to_mdev(ibdev), &context->uar);
  276. kfree(context);
  277. return ERR_PTR(err);
  278. }
  279. if (ib_copy_to_udata(udata, &uresp, sizeof uresp)) {
  280. mthca_cleanup_user_db_tab(to_mdev(ibdev), &context->uar, context->db_tab);
  281. mthca_uar_free(to_mdev(ibdev), &context->uar);
  282. kfree(context);
  283. return ERR_PTR(-EFAULT);
  284. }
  285. return &context->ibucontext;
  286. }
  287. static int mthca_dealloc_ucontext(struct ib_ucontext *context)
  288. {
  289. mthca_cleanup_user_db_tab(to_mdev(context->device), &to_mucontext(context)->uar,
  290. to_mucontext(context)->db_tab);
  291. mthca_uar_free(to_mdev(context->device), &to_mucontext(context)->uar);
  292. kfree(to_mucontext(context));
  293. return 0;
  294. }
  295. static int mthca_mmap_uar(struct ib_ucontext *context,
  296. struct vm_area_struct *vma)
  297. {
  298. if (vma->vm_end - vma->vm_start != PAGE_SIZE)
  299. return -EINVAL;
  300. vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
  301. if (io_remap_pfn_range(vma, vma->vm_start,
  302. to_mucontext(context)->uar.pfn,
  303. PAGE_SIZE, vma->vm_page_prot))
  304. return -EAGAIN;
  305. return 0;
  306. }
  307. static struct ib_pd *mthca_alloc_pd(struct ib_device *ibdev,
  308. struct ib_ucontext *context,
  309. struct ib_udata *udata)
  310. {
  311. struct mthca_pd *pd;
  312. int err;
  313. pd = kmalloc(sizeof *pd, GFP_KERNEL);
  314. if (!pd)
  315. return ERR_PTR(-ENOMEM);
  316. err = mthca_pd_alloc(to_mdev(ibdev), !context, pd);
  317. if (err) {
  318. kfree(pd);
  319. return ERR_PTR(err);
  320. }
  321. if (context) {
  322. if (ib_copy_to_udata(udata, &pd->pd_num, sizeof (__u32))) {
  323. mthca_pd_free(to_mdev(ibdev), pd);
  324. kfree(pd);
  325. return ERR_PTR(-EFAULT);
  326. }
  327. }
  328. return &pd->ibpd;
  329. }
  330. static int mthca_dealloc_pd(struct ib_pd *pd)
  331. {
  332. mthca_pd_free(to_mdev(pd->device), to_mpd(pd));
  333. kfree(pd);
  334. return 0;
  335. }
  336. static struct ib_ah *mthca_ah_create(struct ib_pd *pd,
  337. struct ib_ah_attr *ah_attr)
  338. {
  339. int err;
  340. struct mthca_ah *ah;
  341. ah = kmalloc(sizeof *ah, GFP_ATOMIC);
  342. if (!ah)
  343. return ERR_PTR(-ENOMEM);
  344. err = mthca_create_ah(to_mdev(pd->device), to_mpd(pd), ah_attr, ah);
  345. if (err) {
  346. kfree(ah);
  347. return ERR_PTR(err);
  348. }
  349. return &ah->ibah;
  350. }
  351. static int mthca_ah_destroy(struct ib_ah *ah)
  352. {
  353. mthca_destroy_ah(to_mdev(ah->device), to_mah(ah));
  354. kfree(ah);
  355. return 0;
  356. }
  357. static struct ib_qp *mthca_create_qp(struct ib_pd *pd,
  358. struct ib_qp_init_attr *init_attr,
  359. struct ib_udata *udata)
  360. {
  361. struct mthca_create_qp ucmd;
  362. struct mthca_qp *qp;
  363. int err;
  364. switch (init_attr->qp_type) {
  365. case IB_QPT_RC:
  366. case IB_QPT_UC:
  367. case IB_QPT_UD:
  368. {
  369. struct mthca_ucontext *context;
  370. qp = kmalloc(sizeof *qp, GFP_KERNEL);
  371. if (!qp)
  372. return ERR_PTR(-ENOMEM);
  373. if (pd->uobject) {
  374. context = to_mucontext(pd->uobject->context);
  375. if (ib_copy_from_udata(&ucmd, udata, sizeof ucmd))
  376. return ERR_PTR(-EFAULT);
  377. err = mthca_map_user_db(to_mdev(pd->device), &context->uar,
  378. context->db_tab,
  379. ucmd.sq_db_index, ucmd.sq_db_page);
  380. if (err) {
  381. kfree(qp);
  382. return ERR_PTR(err);
  383. }
  384. err = mthca_map_user_db(to_mdev(pd->device), &context->uar,
  385. context->db_tab,
  386. ucmd.rq_db_index, ucmd.rq_db_page);
  387. if (err) {
  388. mthca_unmap_user_db(to_mdev(pd->device),
  389. &context->uar,
  390. context->db_tab,
  391. ucmd.sq_db_index);
  392. kfree(qp);
  393. return ERR_PTR(err);
  394. }
  395. qp->mr.ibmr.lkey = ucmd.lkey;
  396. qp->sq.db_index = ucmd.sq_db_index;
  397. qp->rq.db_index = ucmd.rq_db_index;
  398. }
  399. err = mthca_alloc_qp(to_mdev(pd->device), to_mpd(pd),
  400. to_mcq(init_attr->send_cq),
  401. to_mcq(init_attr->recv_cq),
  402. init_attr->qp_type, init_attr->sq_sig_type,
  403. &init_attr->cap, qp);
  404. if (err && pd->uobject) {
  405. context = to_mucontext(pd->uobject->context);
  406. mthca_unmap_user_db(to_mdev(pd->device),
  407. &context->uar,
  408. context->db_tab,
  409. ucmd.sq_db_index);
  410. mthca_unmap_user_db(to_mdev(pd->device),
  411. &context->uar,
  412. context->db_tab,
  413. ucmd.rq_db_index);
  414. }
  415. qp->ibqp.qp_num = qp->qpn;
  416. break;
  417. }
  418. case IB_QPT_SMI:
  419. case IB_QPT_GSI:
  420. {
  421. /* Don't allow userspace to create special QPs */
  422. if (pd->uobject)
  423. return ERR_PTR(-EINVAL);
  424. qp = kmalloc(sizeof (struct mthca_sqp), GFP_KERNEL);
  425. if (!qp)
  426. return ERR_PTR(-ENOMEM);
  427. qp->ibqp.qp_num = init_attr->qp_type == IB_QPT_SMI ? 0 : 1;
  428. err = mthca_alloc_sqp(to_mdev(pd->device), to_mpd(pd),
  429. to_mcq(init_attr->send_cq),
  430. to_mcq(init_attr->recv_cq),
  431. init_attr->sq_sig_type, &init_attr->cap,
  432. qp->ibqp.qp_num, init_attr->port_num,
  433. to_msqp(qp));
  434. break;
  435. }
  436. default:
  437. /* Don't support raw QPs */
  438. return ERR_PTR(-ENOSYS);
  439. }
  440. if (err) {
  441. kfree(qp);
  442. return ERR_PTR(err);
  443. }
  444. init_attr->cap.max_inline_data = 0;
  445. init_attr->cap.max_send_wr = qp->sq.max;
  446. init_attr->cap.max_recv_wr = qp->rq.max;
  447. init_attr->cap.max_send_sge = qp->sq.max_gs;
  448. init_attr->cap.max_recv_sge = qp->rq.max_gs;
  449. return &qp->ibqp;
  450. }
  451. static int mthca_destroy_qp(struct ib_qp *qp)
  452. {
  453. if (qp->uobject) {
  454. mthca_unmap_user_db(to_mdev(qp->device),
  455. &to_mucontext(qp->uobject->context)->uar,
  456. to_mucontext(qp->uobject->context)->db_tab,
  457. to_mqp(qp)->sq.db_index);
  458. mthca_unmap_user_db(to_mdev(qp->device),
  459. &to_mucontext(qp->uobject->context)->uar,
  460. to_mucontext(qp->uobject->context)->db_tab,
  461. to_mqp(qp)->rq.db_index);
  462. }
  463. mthca_free_qp(to_mdev(qp->device), to_mqp(qp));
  464. kfree(qp);
  465. return 0;
  466. }
  467. static struct ib_cq *mthca_create_cq(struct ib_device *ibdev, int entries,
  468. struct ib_ucontext *context,
  469. struct ib_udata *udata)
  470. {
  471. struct mthca_create_cq ucmd;
  472. struct mthca_cq *cq;
  473. int nent;
  474. int err;
  475. if (context) {
  476. if (ib_copy_from_udata(&ucmd, udata, sizeof ucmd))
  477. return ERR_PTR(-EFAULT);
  478. err = mthca_map_user_db(to_mdev(ibdev), &to_mucontext(context)->uar,
  479. to_mucontext(context)->db_tab,
  480. ucmd.set_db_index, ucmd.set_db_page);
  481. if (err)
  482. return ERR_PTR(err);
  483. err = mthca_map_user_db(to_mdev(ibdev), &to_mucontext(context)->uar,
  484. to_mucontext(context)->db_tab,
  485. ucmd.arm_db_index, ucmd.arm_db_page);
  486. if (err)
  487. goto err_unmap_set;
  488. }
  489. cq = kmalloc(sizeof *cq, GFP_KERNEL);
  490. if (!cq) {
  491. err = -ENOMEM;
  492. goto err_unmap_arm;
  493. }
  494. if (context) {
  495. cq->mr.ibmr.lkey = ucmd.lkey;
  496. cq->set_ci_db_index = ucmd.set_db_index;
  497. cq->arm_db_index = ucmd.arm_db_index;
  498. }
  499. for (nent = 1; nent <= entries; nent <<= 1)
  500. ; /* nothing */
  501. err = mthca_init_cq(to_mdev(ibdev), nent,
  502. context ? to_mucontext(context) : NULL,
  503. context ? ucmd.pdn : to_mdev(ibdev)->driver_pd.pd_num,
  504. cq);
  505. if (err)
  506. goto err_free;
  507. if (context && ib_copy_to_udata(udata, &cq->cqn, sizeof (__u32))) {
  508. mthca_free_cq(to_mdev(ibdev), cq);
  509. goto err_free;
  510. }
  511. return &cq->ibcq;
  512. err_free:
  513. kfree(cq);
  514. err_unmap_arm:
  515. if (context)
  516. mthca_unmap_user_db(to_mdev(ibdev), &to_mucontext(context)->uar,
  517. to_mucontext(context)->db_tab, ucmd.arm_db_index);
  518. err_unmap_set:
  519. if (context)
  520. mthca_unmap_user_db(to_mdev(ibdev), &to_mucontext(context)->uar,
  521. to_mucontext(context)->db_tab, ucmd.set_db_index);
  522. return ERR_PTR(err);
  523. }
  524. static int mthca_destroy_cq(struct ib_cq *cq)
  525. {
  526. if (cq->uobject) {
  527. mthca_unmap_user_db(to_mdev(cq->device),
  528. &to_mucontext(cq->uobject->context)->uar,
  529. to_mucontext(cq->uobject->context)->db_tab,
  530. to_mcq(cq)->arm_db_index);
  531. mthca_unmap_user_db(to_mdev(cq->device),
  532. &to_mucontext(cq->uobject->context)->uar,
  533. to_mucontext(cq->uobject->context)->db_tab,
  534. to_mcq(cq)->set_ci_db_index);
  535. }
  536. mthca_free_cq(to_mdev(cq->device), to_mcq(cq));
  537. kfree(cq);
  538. return 0;
  539. }
  540. static inline u32 convert_access(int acc)
  541. {
  542. return (acc & IB_ACCESS_REMOTE_ATOMIC ? MTHCA_MPT_FLAG_ATOMIC : 0) |
  543. (acc & IB_ACCESS_REMOTE_WRITE ? MTHCA_MPT_FLAG_REMOTE_WRITE : 0) |
  544. (acc & IB_ACCESS_REMOTE_READ ? MTHCA_MPT_FLAG_REMOTE_READ : 0) |
  545. (acc & IB_ACCESS_LOCAL_WRITE ? MTHCA_MPT_FLAG_LOCAL_WRITE : 0) |
  546. MTHCA_MPT_FLAG_LOCAL_READ;
  547. }
  548. static struct ib_mr *mthca_get_dma_mr(struct ib_pd *pd, int acc)
  549. {
  550. struct mthca_mr *mr;
  551. int err;
  552. mr = kmalloc(sizeof *mr, GFP_KERNEL);
  553. if (!mr)
  554. return ERR_PTR(-ENOMEM);
  555. err = mthca_mr_alloc_notrans(to_mdev(pd->device),
  556. to_mpd(pd)->pd_num,
  557. convert_access(acc), mr);
  558. if (err) {
  559. kfree(mr);
  560. return ERR_PTR(err);
  561. }
  562. return &mr->ibmr;
  563. }
  564. static struct ib_mr *mthca_reg_phys_mr(struct ib_pd *pd,
  565. struct ib_phys_buf *buffer_list,
  566. int num_phys_buf,
  567. int acc,
  568. u64 *iova_start)
  569. {
  570. struct mthca_mr *mr;
  571. u64 *page_list;
  572. u64 total_size;
  573. u64 mask;
  574. int shift;
  575. int npages;
  576. int err;
  577. int i, j, n;
  578. /* First check that we have enough alignment */
  579. if ((*iova_start & ~PAGE_MASK) != (buffer_list[0].addr & ~PAGE_MASK))
  580. return ERR_PTR(-EINVAL);
  581. if (num_phys_buf > 1 &&
  582. ((buffer_list[0].addr + buffer_list[0].size) & ~PAGE_MASK))
  583. return ERR_PTR(-EINVAL);
  584. mask = 0;
  585. total_size = 0;
  586. for (i = 0; i < num_phys_buf; ++i) {
  587. if (i != 0 && buffer_list[i].addr & ~PAGE_MASK)
  588. return ERR_PTR(-EINVAL);
  589. if (i != 0 && i != num_phys_buf - 1 &&
  590. (buffer_list[i].size & ~PAGE_MASK))
  591. return ERR_PTR(-EINVAL);
  592. total_size += buffer_list[i].size;
  593. if (i > 0)
  594. mask |= buffer_list[i].addr;
  595. }
  596. /* Find largest page shift we can use to cover buffers */
  597. for (shift = PAGE_SHIFT; shift < 31; ++shift)
  598. if (num_phys_buf > 1) {
  599. if ((1ULL << shift) & mask)
  600. break;
  601. } else {
  602. if (1ULL << shift >=
  603. buffer_list[0].size +
  604. (buffer_list[0].addr & ((1ULL << shift) - 1)))
  605. break;
  606. }
  607. buffer_list[0].size += buffer_list[0].addr & ((1ULL << shift) - 1);
  608. buffer_list[0].addr &= ~0ull << shift;
  609. mr = kmalloc(sizeof *mr, GFP_KERNEL);
  610. if (!mr)
  611. return ERR_PTR(-ENOMEM);
  612. npages = 0;
  613. for (i = 0; i < num_phys_buf; ++i)
  614. npages += (buffer_list[i].size + (1ULL << shift) - 1) >> shift;
  615. if (!npages)
  616. return &mr->ibmr;
  617. page_list = kmalloc(npages * sizeof *page_list, GFP_KERNEL);
  618. if (!page_list) {
  619. kfree(mr);
  620. return ERR_PTR(-ENOMEM);
  621. }
  622. n = 0;
  623. for (i = 0; i < num_phys_buf; ++i)
  624. for (j = 0;
  625. j < (buffer_list[i].size + (1ULL << shift) - 1) >> shift;
  626. ++j)
  627. page_list[n++] = buffer_list[i].addr + ((u64) j << shift);
  628. mthca_dbg(to_mdev(pd->device), "Registering memory at %llx (iova %llx) "
  629. "in PD %x; shift %d, npages %d.\n",
  630. (unsigned long long) buffer_list[0].addr,
  631. (unsigned long long) *iova_start,
  632. to_mpd(pd)->pd_num,
  633. shift, npages);
  634. err = mthca_mr_alloc_phys(to_mdev(pd->device),
  635. to_mpd(pd)->pd_num,
  636. page_list, shift, npages,
  637. *iova_start, total_size,
  638. convert_access(acc), mr);
  639. if (err) {
  640. kfree(page_list);
  641. kfree(mr);
  642. return ERR_PTR(err);
  643. }
  644. kfree(page_list);
  645. return &mr->ibmr;
  646. }
  647. static struct ib_mr *mthca_reg_user_mr(struct ib_pd *pd, struct ib_umem *region,
  648. int acc, struct ib_udata *udata)
  649. {
  650. struct mthca_dev *dev = to_mdev(pd->device);
  651. struct ib_umem_chunk *chunk;
  652. struct mthca_mr *mr;
  653. u64 *pages;
  654. int shift, n, len;
  655. int i, j, k;
  656. int err = 0;
  657. shift = ffs(region->page_size) - 1;
  658. mr = kmalloc(sizeof *mr, GFP_KERNEL);
  659. if (!mr)
  660. return ERR_PTR(-ENOMEM);
  661. n = 0;
  662. list_for_each_entry(chunk, &region->chunk_list, list)
  663. n += chunk->nents;
  664. mr->mtt = mthca_alloc_mtt(dev, n);
  665. if (IS_ERR(mr->mtt)) {
  666. err = PTR_ERR(mr->mtt);
  667. goto err;
  668. }
  669. pages = (u64 *) __get_free_page(GFP_KERNEL);
  670. if (!pages) {
  671. err = -ENOMEM;
  672. goto err_mtt;
  673. }
  674. i = n = 0;
  675. list_for_each_entry(chunk, &region->chunk_list, list)
  676. for (j = 0; j < chunk->nmap; ++j) {
  677. len = sg_dma_len(&chunk->page_list[j]) >> shift;
  678. for (k = 0; k < len; ++k) {
  679. pages[i++] = sg_dma_address(&chunk->page_list[j]) +
  680. region->page_size * k;
  681. /*
  682. * Be friendly to WRITE_MTT command
  683. * and leave two empty slots for the
  684. * index and reserved fields of the
  685. * mailbox.
  686. */
  687. if (i == PAGE_SIZE / sizeof (u64) - 2) {
  688. err = mthca_write_mtt(dev, mr->mtt,
  689. n, pages, i);
  690. if (err)
  691. goto mtt_done;
  692. n += i;
  693. i = 0;
  694. }
  695. }
  696. }
  697. if (i)
  698. err = mthca_write_mtt(dev, mr->mtt, n, pages, i);
  699. mtt_done:
  700. free_page((unsigned long) pages);
  701. if (err)
  702. goto err_mtt;
  703. err = mthca_mr_alloc(dev, to_mpd(pd)->pd_num, shift, region->virt_base,
  704. region->length, convert_access(acc), mr);
  705. if (err)
  706. goto err_mtt;
  707. return &mr->ibmr;
  708. err_mtt:
  709. mthca_free_mtt(dev, mr->mtt);
  710. err:
  711. kfree(mr);
  712. return ERR_PTR(err);
  713. }
  714. static int mthca_dereg_mr(struct ib_mr *mr)
  715. {
  716. struct mthca_mr *mmr = to_mmr(mr);
  717. mthca_free_mr(to_mdev(mr->device), mmr);
  718. kfree(mmr);
  719. return 0;
  720. }
  721. static struct ib_fmr *mthca_alloc_fmr(struct ib_pd *pd, int mr_access_flags,
  722. struct ib_fmr_attr *fmr_attr)
  723. {
  724. struct mthca_fmr *fmr;
  725. int err;
  726. fmr = kmalloc(sizeof *fmr, GFP_KERNEL);
  727. if (!fmr)
  728. return ERR_PTR(-ENOMEM);
  729. memcpy(&fmr->attr, fmr_attr, sizeof *fmr_attr);
  730. err = mthca_fmr_alloc(to_mdev(pd->device), to_mpd(pd)->pd_num,
  731. convert_access(mr_access_flags), fmr);
  732. if (err) {
  733. kfree(fmr);
  734. return ERR_PTR(err);
  735. }
  736. return &fmr->ibmr;
  737. }
  738. static int mthca_dealloc_fmr(struct ib_fmr *fmr)
  739. {
  740. struct mthca_fmr *mfmr = to_mfmr(fmr);
  741. int err;
  742. err = mthca_free_fmr(to_mdev(fmr->device), mfmr);
  743. if (err)
  744. return err;
  745. kfree(mfmr);
  746. return 0;
  747. }
  748. static int mthca_unmap_fmr(struct list_head *fmr_list)
  749. {
  750. struct ib_fmr *fmr;
  751. int err;
  752. u8 status;
  753. struct mthca_dev *mdev = NULL;
  754. list_for_each_entry(fmr, fmr_list, list) {
  755. if (mdev && to_mdev(fmr->device) != mdev)
  756. return -EINVAL;
  757. mdev = to_mdev(fmr->device);
  758. }
  759. if (!mdev)
  760. return 0;
  761. if (mthca_is_memfree(mdev)) {
  762. list_for_each_entry(fmr, fmr_list, list)
  763. mthca_arbel_fmr_unmap(mdev, to_mfmr(fmr));
  764. wmb();
  765. } else
  766. list_for_each_entry(fmr, fmr_list, list)
  767. mthca_tavor_fmr_unmap(mdev, to_mfmr(fmr));
  768. err = mthca_SYNC_TPT(mdev, &status);
  769. if (err)
  770. return err;
  771. if (status)
  772. return -EINVAL;
  773. return 0;
  774. }
  775. static ssize_t show_rev(struct class_device *cdev, char *buf)
  776. {
  777. struct mthca_dev *dev = container_of(cdev, struct mthca_dev, ib_dev.class_dev);
  778. return sprintf(buf, "%x\n", dev->rev_id);
  779. }
  780. static ssize_t show_fw_ver(struct class_device *cdev, char *buf)
  781. {
  782. struct mthca_dev *dev = container_of(cdev, struct mthca_dev, ib_dev.class_dev);
  783. return sprintf(buf, "%x.%x.%x\n", (int) (dev->fw_ver >> 32),
  784. (int) (dev->fw_ver >> 16) & 0xffff,
  785. (int) dev->fw_ver & 0xffff);
  786. }
  787. static ssize_t show_hca(struct class_device *cdev, char *buf)
  788. {
  789. struct mthca_dev *dev = container_of(cdev, struct mthca_dev, ib_dev.class_dev);
  790. switch (dev->pdev->device) {
  791. case PCI_DEVICE_ID_MELLANOX_TAVOR:
  792. return sprintf(buf, "MT23108\n");
  793. case PCI_DEVICE_ID_MELLANOX_ARBEL_COMPAT:
  794. return sprintf(buf, "MT25208 (MT23108 compat mode)\n");
  795. case PCI_DEVICE_ID_MELLANOX_ARBEL:
  796. return sprintf(buf, "MT25208\n");
  797. case PCI_DEVICE_ID_MELLANOX_SINAI:
  798. case PCI_DEVICE_ID_MELLANOX_SINAI_OLD:
  799. return sprintf(buf, "MT25204\n");
  800. default:
  801. return sprintf(buf, "unknown\n");
  802. }
  803. }
  804. static CLASS_DEVICE_ATTR(hw_rev, S_IRUGO, show_rev, NULL);
  805. static CLASS_DEVICE_ATTR(fw_ver, S_IRUGO, show_fw_ver, NULL);
  806. static CLASS_DEVICE_ATTR(hca_type, S_IRUGO, show_hca, NULL);
  807. static struct class_device_attribute *mthca_class_attributes[] = {
  808. &class_device_attr_hw_rev,
  809. &class_device_attr_fw_ver,
  810. &class_device_attr_hca_type
  811. };
  812. int mthca_register_device(struct mthca_dev *dev)
  813. {
  814. int ret;
  815. int i;
  816. strlcpy(dev->ib_dev.name, "mthca%d", IB_DEVICE_NAME_MAX);
  817. dev->ib_dev.owner = THIS_MODULE;
  818. dev->ib_dev.node_type = IB_NODE_CA;
  819. dev->ib_dev.phys_port_cnt = dev->limits.num_ports;
  820. dev->ib_dev.dma_device = &dev->pdev->dev;
  821. dev->ib_dev.class_dev.dev = &dev->pdev->dev;
  822. dev->ib_dev.query_device = mthca_query_device;
  823. dev->ib_dev.query_port = mthca_query_port;
  824. dev->ib_dev.modify_port = mthca_modify_port;
  825. dev->ib_dev.query_pkey = mthca_query_pkey;
  826. dev->ib_dev.query_gid = mthca_query_gid;
  827. dev->ib_dev.alloc_ucontext = mthca_alloc_ucontext;
  828. dev->ib_dev.dealloc_ucontext = mthca_dealloc_ucontext;
  829. dev->ib_dev.mmap = mthca_mmap_uar;
  830. dev->ib_dev.alloc_pd = mthca_alloc_pd;
  831. dev->ib_dev.dealloc_pd = mthca_dealloc_pd;
  832. dev->ib_dev.create_ah = mthca_ah_create;
  833. dev->ib_dev.destroy_ah = mthca_ah_destroy;
  834. dev->ib_dev.create_qp = mthca_create_qp;
  835. dev->ib_dev.modify_qp = mthca_modify_qp;
  836. dev->ib_dev.destroy_qp = mthca_destroy_qp;
  837. dev->ib_dev.create_cq = mthca_create_cq;
  838. dev->ib_dev.destroy_cq = mthca_destroy_cq;
  839. dev->ib_dev.poll_cq = mthca_poll_cq;
  840. dev->ib_dev.get_dma_mr = mthca_get_dma_mr;
  841. dev->ib_dev.reg_phys_mr = mthca_reg_phys_mr;
  842. dev->ib_dev.reg_user_mr = mthca_reg_user_mr;
  843. dev->ib_dev.dereg_mr = mthca_dereg_mr;
  844. if (dev->mthca_flags & MTHCA_FLAG_FMR) {
  845. dev->ib_dev.alloc_fmr = mthca_alloc_fmr;
  846. dev->ib_dev.unmap_fmr = mthca_unmap_fmr;
  847. dev->ib_dev.dealloc_fmr = mthca_dealloc_fmr;
  848. if (mthca_is_memfree(dev))
  849. dev->ib_dev.map_phys_fmr = mthca_arbel_map_phys_fmr;
  850. else
  851. dev->ib_dev.map_phys_fmr = mthca_tavor_map_phys_fmr;
  852. }
  853. dev->ib_dev.attach_mcast = mthca_multicast_attach;
  854. dev->ib_dev.detach_mcast = mthca_multicast_detach;
  855. dev->ib_dev.process_mad = mthca_process_mad;
  856. if (mthca_is_memfree(dev)) {
  857. dev->ib_dev.req_notify_cq = mthca_arbel_arm_cq;
  858. dev->ib_dev.post_send = mthca_arbel_post_send;
  859. dev->ib_dev.post_recv = mthca_arbel_post_receive;
  860. } else {
  861. dev->ib_dev.req_notify_cq = mthca_tavor_arm_cq;
  862. dev->ib_dev.post_send = mthca_tavor_post_send;
  863. dev->ib_dev.post_recv = mthca_tavor_post_receive;
  864. }
  865. init_MUTEX(&dev->cap_mask_mutex);
  866. ret = ib_register_device(&dev->ib_dev);
  867. if (ret)
  868. return ret;
  869. for (i = 0; i < ARRAY_SIZE(mthca_class_attributes); ++i) {
  870. ret = class_device_create_file(&dev->ib_dev.class_dev,
  871. mthca_class_attributes[i]);
  872. if (ret) {
  873. ib_unregister_device(&dev->ib_dev);
  874. return ret;
  875. }
  876. }
  877. return 0;
  878. }
  879. void mthca_unregister_device(struct mthca_dev *dev)
  880. {
  881. ib_unregister_device(&dev->ib_dev);
  882. }