mthca_memfree.c 15 KB

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  1. /*
  2. * Copyright (c) 2004, 2005 Topspin Communications. All rights reserved.
  3. * Copyright (c) 2005 Cisco Systems. All rights reserved.
  4. * Copyright (c) 2005 Mellanox Technologies. All rights reserved.
  5. *
  6. * This software is available to you under a choice of one of two
  7. * licenses. You may choose to be licensed under the terms of the GNU
  8. * General Public License (GPL) Version 2, available from the file
  9. * COPYING in the main directory of this source tree, or the
  10. * OpenIB.org BSD license below:
  11. *
  12. * Redistribution and use in source and binary forms, with or
  13. * without modification, are permitted provided that the following
  14. * conditions are met:
  15. *
  16. * - Redistributions of source code must retain the above
  17. * copyright notice, this list of conditions and the following
  18. * disclaimer.
  19. *
  20. * - Redistributions in binary form must reproduce the above
  21. * copyright notice, this list of conditions and the following
  22. * disclaimer in the documentation and/or other materials
  23. * provided with the distribution.
  24. *
  25. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  26. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  27. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  28. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  29. * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  30. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  31. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  32. * SOFTWARE.
  33. *
  34. * $Id$
  35. */
  36. #include <linux/mm.h>
  37. #include "mthca_memfree.h"
  38. #include "mthca_dev.h"
  39. #include "mthca_cmd.h"
  40. /*
  41. * We allocate in as big chunks as we can, up to a maximum of 256 KB
  42. * per chunk.
  43. */
  44. enum {
  45. MTHCA_ICM_ALLOC_SIZE = 1 << 18,
  46. MTHCA_TABLE_CHUNK_SIZE = 1 << 18
  47. };
  48. struct mthca_user_db_table {
  49. struct semaphore mutex;
  50. struct {
  51. u64 uvirt;
  52. struct scatterlist mem;
  53. int refcount;
  54. } page[0];
  55. };
  56. void mthca_free_icm(struct mthca_dev *dev, struct mthca_icm *icm)
  57. {
  58. struct mthca_icm_chunk *chunk, *tmp;
  59. int i;
  60. if (!icm)
  61. return;
  62. list_for_each_entry_safe(chunk, tmp, &icm->chunk_list, list) {
  63. if (chunk->nsg > 0)
  64. pci_unmap_sg(dev->pdev, chunk->mem, chunk->npages,
  65. PCI_DMA_BIDIRECTIONAL);
  66. for (i = 0; i < chunk->npages; ++i)
  67. __free_pages(chunk->mem[i].page,
  68. get_order(chunk->mem[i].length));
  69. kfree(chunk);
  70. }
  71. kfree(icm);
  72. }
  73. struct mthca_icm *mthca_alloc_icm(struct mthca_dev *dev, int npages,
  74. unsigned int gfp_mask)
  75. {
  76. struct mthca_icm *icm;
  77. struct mthca_icm_chunk *chunk = NULL;
  78. int cur_order;
  79. icm = kmalloc(sizeof *icm, gfp_mask & ~(__GFP_HIGHMEM | __GFP_NOWARN));
  80. if (!icm)
  81. return icm;
  82. icm->refcount = 0;
  83. INIT_LIST_HEAD(&icm->chunk_list);
  84. cur_order = get_order(MTHCA_ICM_ALLOC_SIZE);
  85. while (npages > 0) {
  86. if (!chunk) {
  87. chunk = kmalloc(sizeof *chunk,
  88. gfp_mask & ~(__GFP_HIGHMEM | __GFP_NOWARN));
  89. if (!chunk)
  90. goto fail;
  91. chunk->npages = 0;
  92. chunk->nsg = 0;
  93. list_add_tail(&chunk->list, &icm->chunk_list);
  94. }
  95. while (1 << cur_order > npages)
  96. --cur_order;
  97. chunk->mem[chunk->npages].page = alloc_pages(gfp_mask, cur_order);
  98. if (chunk->mem[chunk->npages].page) {
  99. chunk->mem[chunk->npages].length = PAGE_SIZE << cur_order;
  100. chunk->mem[chunk->npages].offset = 0;
  101. if (++chunk->npages == MTHCA_ICM_CHUNK_LEN) {
  102. chunk->nsg = pci_map_sg(dev->pdev, chunk->mem,
  103. chunk->npages,
  104. PCI_DMA_BIDIRECTIONAL);
  105. if (chunk->nsg <= 0)
  106. goto fail;
  107. chunk = NULL;
  108. }
  109. npages -= 1 << cur_order;
  110. } else {
  111. --cur_order;
  112. if (cur_order < 0)
  113. goto fail;
  114. }
  115. }
  116. if (chunk) {
  117. chunk->nsg = pci_map_sg(dev->pdev, chunk->mem,
  118. chunk->npages,
  119. PCI_DMA_BIDIRECTIONAL);
  120. if (chunk->nsg <= 0)
  121. goto fail;
  122. }
  123. return icm;
  124. fail:
  125. mthca_free_icm(dev, icm);
  126. return NULL;
  127. }
  128. int mthca_table_get(struct mthca_dev *dev, struct mthca_icm_table *table, int obj)
  129. {
  130. int i = (obj & (table->num_obj - 1)) * table->obj_size / MTHCA_TABLE_CHUNK_SIZE;
  131. int ret = 0;
  132. u8 status;
  133. down(&table->mutex);
  134. if (table->icm[i]) {
  135. ++table->icm[i]->refcount;
  136. goto out;
  137. }
  138. table->icm[i] = mthca_alloc_icm(dev, MTHCA_TABLE_CHUNK_SIZE >> PAGE_SHIFT,
  139. (table->lowmem ? GFP_KERNEL : GFP_HIGHUSER) |
  140. __GFP_NOWARN);
  141. if (!table->icm[i]) {
  142. ret = -ENOMEM;
  143. goto out;
  144. }
  145. if (mthca_MAP_ICM(dev, table->icm[i], table->virt + i * MTHCA_TABLE_CHUNK_SIZE,
  146. &status) || status) {
  147. mthca_free_icm(dev, table->icm[i]);
  148. table->icm[i] = NULL;
  149. ret = -ENOMEM;
  150. goto out;
  151. }
  152. ++table->icm[i]->refcount;
  153. out:
  154. up(&table->mutex);
  155. return ret;
  156. }
  157. void mthca_table_put(struct mthca_dev *dev, struct mthca_icm_table *table, int obj)
  158. {
  159. int i;
  160. u8 status;
  161. if (!mthca_is_memfree(dev))
  162. return;
  163. i = (obj & (table->num_obj - 1)) * table->obj_size / MTHCA_TABLE_CHUNK_SIZE;
  164. down(&table->mutex);
  165. if (--table->icm[i]->refcount == 0) {
  166. mthca_UNMAP_ICM(dev, table->virt + i * MTHCA_TABLE_CHUNK_SIZE,
  167. MTHCA_TABLE_CHUNK_SIZE >> 12, &status);
  168. mthca_free_icm(dev, table->icm[i]);
  169. table->icm[i] = NULL;
  170. }
  171. up(&table->mutex);
  172. }
  173. void *mthca_table_find(struct mthca_icm_table *table, int obj)
  174. {
  175. int idx, offset, i;
  176. struct mthca_icm_chunk *chunk;
  177. struct mthca_icm *icm;
  178. struct page *page = NULL;
  179. if (!table->lowmem)
  180. return NULL;
  181. down(&table->mutex);
  182. idx = (obj & (table->num_obj - 1)) * table->obj_size;
  183. icm = table->icm[idx / MTHCA_TABLE_CHUNK_SIZE];
  184. offset = idx % MTHCA_TABLE_CHUNK_SIZE;
  185. if (!icm)
  186. goto out;
  187. list_for_each_entry(chunk, &icm->chunk_list, list) {
  188. for (i = 0; i < chunk->npages; ++i) {
  189. if (chunk->mem[i].length >= offset) {
  190. page = chunk->mem[i].page;
  191. break;
  192. }
  193. offset -= chunk->mem[i].length;
  194. }
  195. }
  196. out:
  197. up(&table->mutex);
  198. return page ? lowmem_page_address(page) + offset : NULL;
  199. }
  200. int mthca_table_get_range(struct mthca_dev *dev, struct mthca_icm_table *table,
  201. int start, int end)
  202. {
  203. int inc = MTHCA_TABLE_CHUNK_SIZE / table->obj_size;
  204. int i, err;
  205. for (i = start; i <= end; i += inc) {
  206. err = mthca_table_get(dev, table, i);
  207. if (err)
  208. goto fail;
  209. }
  210. return 0;
  211. fail:
  212. while (i > start) {
  213. i -= inc;
  214. mthca_table_put(dev, table, i);
  215. }
  216. return err;
  217. }
  218. void mthca_table_put_range(struct mthca_dev *dev, struct mthca_icm_table *table,
  219. int start, int end)
  220. {
  221. int i;
  222. if (!mthca_is_memfree(dev))
  223. return;
  224. for (i = start; i <= end; i += MTHCA_TABLE_CHUNK_SIZE / table->obj_size)
  225. mthca_table_put(dev, table, i);
  226. }
  227. struct mthca_icm_table *mthca_alloc_icm_table(struct mthca_dev *dev,
  228. u64 virt, int obj_size,
  229. int nobj, int reserved,
  230. int use_lowmem)
  231. {
  232. struct mthca_icm_table *table;
  233. int num_icm;
  234. int i;
  235. u8 status;
  236. num_icm = obj_size * nobj / MTHCA_TABLE_CHUNK_SIZE;
  237. table = kmalloc(sizeof *table + num_icm * sizeof *table->icm, GFP_KERNEL);
  238. if (!table)
  239. return NULL;
  240. table->virt = virt;
  241. table->num_icm = num_icm;
  242. table->num_obj = nobj;
  243. table->obj_size = obj_size;
  244. table->lowmem = use_lowmem;
  245. init_MUTEX(&table->mutex);
  246. for (i = 0; i < num_icm; ++i)
  247. table->icm[i] = NULL;
  248. for (i = 0; i * MTHCA_TABLE_CHUNK_SIZE < reserved * obj_size; ++i) {
  249. table->icm[i] = mthca_alloc_icm(dev, MTHCA_TABLE_CHUNK_SIZE >> PAGE_SHIFT,
  250. (use_lowmem ? GFP_KERNEL : GFP_HIGHUSER) |
  251. __GFP_NOWARN);
  252. if (!table->icm[i])
  253. goto err;
  254. if (mthca_MAP_ICM(dev, table->icm[i], virt + i * MTHCA_TABLE_CHUNK_SIZE,
  255. &status) || status) {
  256. mthca_free_icm(dev, table->icm[i]);
  257. table->icm[i] = NULL;
  258. goto err;
  259. }
  260. /*
  261. * Add a reference to this ICM chunk so that it never
  262. * gets freed (since it contains reserved firmware objects).
  263. */
  264. ++table->icm[i]->refcount;
  265. }
  266. return table;
  267. err:
  268. for (i = 0; i < num_icm; ++i)
  269. if (table->icm[i]) {
  270. mthca_UNMAP_ICM(dev, virt + i * MTHCA_TABLE_CHUNK_SIZE,
  271. MTHCA_TABLE_CHUNK_SIZE >> 12, &status);
  272. mthca_free_icm(dev, table->icm[i]);
  273. }
  274. kfree(table);
  275. return NULL;
  276. }
  277. void mthca_free_icm_table(struct mthca_dev *dev, struct mthca_icm_table *table)
  278. {
  279. int i;
  280. u8 status;
  281. for (i = 0; i < table->num_icm; ++i)
  282. if (table->icm[i]) {
  283. mthca_UNMAP_ICM(dev, table->virt + i * MTHCA_TABLE_CHUNK_SIZE,
  284. MTHCA_TABLE_CHUNK_SIZE >> 12, &status);
  285. mthca_free_icm(dev, table->icm[i]);
  286. }
  287. kfree(table);
  288. }
  289. static u64 mthca_uarc_virt(struct mthca_dev *dev, struct mthca_uar *uar, int page)
  290. {
  291. return dev->uar_table.uarc_base +
  292. uar->index * dev->uar_table.uarc_size +
  293. page * 4096;
  294. }
  295. int mthca_map_user_db(struct mthca_dev *dev, struct mthca_uar *uar,
  296. struct mthca_user_db_table *db_tab, int index, u64 uaddr)
  297. {
  298. int ret = 0;
  299. u8 status;
  300. int i;
  301. if (!mthca_is_memfree(dev))
  302. return 0;
  303. if (index < 0 || index > dev->uar_table.uarc_size / 8)
  304. return -EINVAL;
  305. down(&db_tab->mutex);
  306. i = index / MTHCA_DB_REC_PER_PAGE;
  307. if ((db_tab->page[i].refcount >= MTHCA_DB_REC_PER_PAGE) ||
  308. (db_tab->page[i].uvirt && db_tab->page[i].uvirt != uaddr) ||
  309. (uaddr & 4095)) {
  310. ret = -EINVAL;
  311. goto out;
  312. }
  313. if (db_tab->page[i].refcount) {
  314. ++db_tab->page[i].refcount;
  315. goto out;
  316. }
  317. ret = get_user_pages(current, current->mm, uaddr & PAGE_MASK, 1, 1, 0,
  318. &db_tab->page[i].mem.page, NULL);
  319. if (ret < 0)
  320. goto out;
  321. db_tab->page[i].mem.length = 4096;
  322. db_tab->page[i].mem.offset = uaddr & ~PAGE_MASK;
  323. ret = pci_map_sg(dev->pdev, &db_tab->page[i].mem, 1, PCI_DMA_TODEVICE);
  324. if (ret < 0) {
  325. put_page(db_tab->page[i].mem.page);
  326. goto out;
  327. }
  328. ret = mthca_MAP_ICM_page(dev, sg_dma_address(&db_tab->page[i].mem),
  329. mthca_uarc_virt(dev, uar, i), &status);
  330. if (!ret && status)
  331. ret = -EINVAL;
  332. if (ret) {
  333. pci_unmap_sg(dev->pdev, &db_tab->page[i].mem, 1, PCI_DMA_TODEVICE);
  334. put_page(db_tab->page[i].mem.page);
  335. goto out;
  336. }
  337. db_tab->page[i].uvirt = uaddr;
  338. db_tab->page[i].refcount = 1;
  339. out:
  340. up(&db_tab->mutex);
  341. return ret;
  342. }
  343. void mthca_unmap_user_db(struct mthca_dev *dev, struct mthca_uar *uar,
  344. struct mthca_user_db_table *db_tab, int index)
  345. {
  346. if (!mthca_is_memfree(dev))
  347. return;
  348. /*
  349. * To make our bookkeeping simpler, we don't unmap DB
  350. * pages until we clean up the whole db table.
  351. */
  352. down(&db_tab->mutex);
  353. --db_tab->page[index / MTHCA_DB_REC_PER_PAGE].refcount;
  354. up(&db_tab->mutex);
  355. }
  356. struct mthca_user_db_table *mthca_init_user_db_tab(struct mthca_dev *dev)
  357. {
  358. struct mthca_user_db_table *db_tab;
  359. int npages;
  360. int i;
  361. if (!mthca_is_memfree(dev))
  362. return NULL;
  363. npages = dev->uar_table.uarc_size / 4096;
  364. db_tab = kmalloc(sizeof *db_tab + npages * sizeof *db_tab->page, GFP_KERNEL);
  365. if (!db_tab)
  366. return ERR_PTR(-ENOMEM);
  367. init_MUTEX(&db_tab->mutex);
  368. for (i = 0; i < npages; ++i) {
  369. db_tab->page[i].refcount = 0;
  370. db_tab->page[i].uvirt = 0;
  371. }
  372. return db_tab;
  373. }
  374. void mthca_cleanup_user_db_tab(struct mthca_dev *dev, struct mthca_uar *uar,
  375. struct mthca_user_db_table *db_tab)
  376. {
  377. int i;
  378. u8 status;
  379. if (!mthca_is_memfree(dev))
  380. return;
  381. for (i = 0; i < dev->uar_table.uarc_size / 4096; ++i) {
  382. if (db_tab->page[i].uvirt) {
  383. mthca_UNMAP_ICM(dev, mthca_uarc_virt(dev, uar, i), 1, &status);
  384. pci_unmap_sg(dev->pdev, &db_tab->page[i].mem, 1, PCI_DMA_TODEVICE);
  385. put_page(db_tab->page[i].mem.page);
  386. }
  387. }
  388. }
  389. int mthca_alloc_db(struct mthca_dev *dev, int type, u32 qn, __be32 **db)
  390. {
  391. int group;
  392. int start, end, dir;
  393. int i, j;
  394. struct mthca_db_page *page;
  395. int ret = 0;
  396. u8 status;
  397. down(&dev->db_tab->mutex);
  398. switch (type) {
  399. case MTHCA_DB_TYPE_CQ_ARM:
  400. case MTHCA_DB_TYPE_SQ:
  401. group = 0;
  402. start = 0;
  403. end = dev->db_tab->max_group1;
  404. dir = 1;
  405. break;
  406. case MTHCA_DB_TYPE_CQ_SET_CI:
  407. case MTHCA_DB_TYPE_RQ:
  408. case MTHCA_DB_TYPE_SRQ:
  409. group = 1;
  410. start = dev->db_tab->npages - 1;
  411. end = dev->db_tab->min_group2;
  412. dir = -1;
  413. break;
  414. default:
  415. ret = -EINVAL;
  416. goto out;
  417. }
  418. for (i = start; i != end; i += dir)
  419. if (dev->db_tab->page[i].db_rec &&
  420. !bitmap_full(dev->db_tab->page[i].used,
  421. MTHCA_DB_REC_PER_PAGE)) {
  422. page = dev->db_tab->page + i;
  423. goto found;
  424. }
  425. if (dev->db_tab->max_group1 >= dev->db_tab->min_group2 - 1) {
  426. ret = -ENOMEM;
  427. goto out;
  428. }
  429. page = dev->db_tab->page + end;
  430. page->db_rec = dma_alloc_coherent(&dev->pdev->dev, 4096,
  431. &page->mapping, GFP_KERNEL);
  432. if (!page->db_rec) {
  433. ret = -ENOMEM;
  434. goto out;
  435. }
  436. memset(page->db_rec, 0, 4096);
  437. ret = mthca_MAP_ICM_page(dev, page->mapping,
  438. mthca_uarc_virt(dev, &dev->driver_uar, i), &status);
  439. if (!ret && status)
  440. ret = -EINVAL;
  441. if (ret) {
  442. dma_free_coherent(&dev->pdev->dev, 4096,
  443. page->db_rec, page->mapping);
  444. goto out;
  445. }
  446. bitmap_zero(page->used, MTHCA_DB_REC_PER_PAGE);
  447. if (group == 0)
  448. ++dev->db_tab->max_group1;
  449. else
  450. --dev->db_tab->min_group2;
  451. found:
  452. j = find_first_zero_bit(page->used, MTHCA_DB_REC_PER_PAGE);
  453. set_bit(j, page->used);
  454. if (group == 1)
  455. j = MTHCA_DB_REC_PER_PAGE - 1 - j;
  456. ret = i * MTHCA_DB_REC_PER_PAGE + j;
  457. page->db_rec[j] = cpu_to_be64((qn << 8) | (type << 5));
  458. *db = (__be32 *) &page->db_rec[j];
  459. out:
  460. up(&dev->db_tab->mutex);
  461. return ret;
  462. }
  463. void mthca_free_db(struct mthca_dev *dev, int type, int db_index)
  464. {
  465. int i, j;
  466. struct mthca_db_page *page;
  467. u8 status;
  468. i = db_index / MTHCA_DB_REC_PER_PAGE;
  469. j = db_index % MTHCA_DB_REC_PER_PAGE;
  470. page = dev->db_tab->page + i;
  471. down(&dev->db_tab->mutex);
  472. page->db_rec[j] = 0;
  473. if (i >= dev->db_tab->min_group2)
  474. j = MTHCA_DB_REC_PER_PAGE - 1 - j;
  475. clear_bit(j, page->used);
  476. if (bitmap_empty(page->used, MTHCA_DB_REC_PER_PAGE) &&
  477. i >= dev->db_tab->max_group1 - 1) {
  478. mthca_UNMAP_ICM(dev, mthca_uarc_virt(dev, &dev->driver_uar, i), 1, &status);
  479. dma_free_coherent(&dev->pdev->dev, 4096,
  480. page->db_rec, page->mapping);
  481. page->db_rec = NULL;
  482. if (i == dev->db_tab->max_group1) {
  483. --dev->db_tab->max_group1;
  484. /* XXX may be able to unmap more pages now */
  485. }
  486. if (i == dev->db_tab->min_group2)
  487. ++dev->db_tab->min_group2;
  488. }
  489. up(&dev->db_tab->mutex);
  490. }
  491. int mthca_init_db_tab(struct mthca_dev *dev)
  492. {
  493. int i;
  494. if (!mthca_is_memfree(dev))
  495. return 0;
  496. dev->db_tab = kmalloc(sizeof *dev->db_tab, GFP_KERNEL);
  497. if (!dev->db_tab)
  498. return -ENOMEM;
  499. init_MUTEX(&dev->db_tab->mutex);
  500. dev->db_tab->npages = dev->uar_table.uarc_size / 4096;
  501. dev->db_tab->max_group1 = 0;
  502. dev->db_tab->min_group2 = dev->db_tab->npages - 1;
  503. dev->db_tab->page = kmalloc(dev->db_tab->npages *
  504. sizeof *dev->db_tab->page,
  505. GFP_KERNEL);
  506. if (!dev->db_tab->page) {
  507. kfree(dev->db_tab);
  508. return -ENOMEM;
  509. }
  510. for (i = 0; i < dev->db_tab->npages; ++i)
  511. dev->db_tab->page[i].db_rec = NULL;
  512. return 0;
  513. }
  514. void mthca_cleanup_db_tab(struct mthca_dev *dev)
  515. {
  516. int i;
  517. u8 status;
  518. if (!mthca_is_memfree(dev))
  519. return;
  520. /*
  521. * Because we don't always free our UARC pages when they
  522. * become empty to make mthca_free_db() simpler we need to
  523. * make a sweep through the doorbell pages and free any
  524. * leftover pages now.
  525. */
  526. for (i = 0; i < dev->db_tab->npages; ++i) {
  527. if (!dev->db_tab->page[i].db_rec)
  528. continue;
  529. if (!bitmap_empty(dev->db_tab->page[i].used, MTHCA_DB_REC_PER_PAGE))
  530. mthca_warn(dev, "Kernel UARC page %d not empty\n", i);
  531. mthca_UNMAP_ICM(dev, mthca_uarc_virt(dev, &dev->driver_uar, i), 1, &status);
  532. dma_free_coherent(&dev->pdev->dev, 4096,
  533. dev->db_tab->page[i].db_rec,
  534. dev->db_tab->page[i].mapping);
  535. }
  536. kfree(dev->db_tab->page);
  537. kfree(dev->db_tab);
  538. }