apply.c 31 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364656667686970717273747576777879808182838485868788899091929394959697989910010110210310410510610710810911011111211311411511611711811912012112212312412512612712812913013113213313413513613713813914014114214314414514614714814915015115215315415515615715815916016116216316416516616716816917017117217317417517617717817918018118218318418518618718818919019119219319419519619719819920020120220320420520620720820921021121221321421521621721821922022122222322422522622722822923023123223323423523623723823924024124224324424524624724824925025125225325425525625725825926026126226326426526626726826927027127227327427527627727827928028128228328428528628728828929029129229329429529629729829930030130230330430530630730830931031131231331431531631731831932032132232332432532632732832933033133233333433533633733833934034134234334434534634734834935035135235335435535635735835936036136236336436536636736836937037137237337437537637737837938038138238338438538638738838939039139239339439539639739839940040140240340440540640740840941041141241341441541641741841942042142242342442542642742842943043143243343443543643743843944044144244344444544644744844945045145245345445545645745845946046146246346446546646746846947047147247347447547647747847948048148248348448548648748848949049149249349449549649749849950050150250350450550650750850951051151251351451551651751851952052152252352452552652752852953053153253353453553653753853954054154254354454554654754854955055155255355455555655755855956056156256356456556656756856957057157257357457557657757857958058158258358458558658758858959059159259359459559659759859960060160260360460560660760860961061161261361461561661761861962062162262362462562662762862963063163263363463563663763863964064164264364464564664764864965065165265365465565665765865966066166266366466566666766866967067167267367467567667767867968068168268368468568668768868969069169269369469569669769869970070170270370470570670770870971071171271371471571671771871972072172272372472572672772872973073173273373473573673773873974074174274374474574674774874975075175275375475575675775875976076176276376476576676776876977077177277377477577677777877978078178278378478578678778878979079179279379479579679779879980080180280380480580680780880981081181281381481581681781881982082182282382482582682782882983083183283383483583683783883984084184284384484584684784884985085185285385485585685785885986086186286386486586686786886987087187287387487587687787887988088188288388488588688788888989089189289389489589689789889990090190290390490590690790890991091191291391491591691791891992092192292392492592692792892993093193293393493593693793893994094194294394494594694794894995095195295395495595695795895996096196296396496596696796896997097197297397497597697797897998098198298398498598698798898999099199299399499599699799899910001001100210031004100510061007100810091010101110121013101410151016101710181019102010211022102310241025102610271028102910301031103210331034103510361037103810391040104110421043104410451046104710481049105010511052105310541055105610571058105910601061106210631064106510661067106810691070107110721073107410751076107710781079108010811082108310841085108610871088108910901091109210931094109510961097109810991100110111021103110411051106110711081109111011111112111311141115111611171118111911201121112211231124112511261127112811291130113111321133113411351136113711381139114011411142114311441145114611471148114911501151115211531154115511561157115811591160116111621163116411651166116711681169117011711172117311741175117611771178117911801181118211831184118511861187118811891190119111921193119411951196119711981199120012011202120312041205120612071208120912101211121212131214121512161217121812191220122112221223122412251226122712281229123012311232123312341235123612371238123912401241124212431244124512461247124812491250125112521253125412551256125712581259126012611262126312641265126612671268126912701271127212731274127512761277127812791280128112821283128412851286128712881289129012911292129312941295129612971298129913001301130213031304130513061307130813091310131113121313131413151316131713181319132013211322132313241325132613271328132913301331133213331334133513361337133813391340134113421343134413451346134713481349135013511352135313541355135613571358135913601361136213631364136513661367136813691370137113721373137413751376137713781379138013811382138313841385138613871388138913901391139213931394139513961397139813991400140114021403140414051406140714081409141014111412141314141415141614171418141914201421142214231424142514261427142814291430143114321433143414351436143714381439144014411442144314441445144614471448144914501451145214531454145514561457145814591460146114621463146414651466146714681469147014711472147314741475147614771478147914801481148214831484148514861487148814891490149114921493149414951496149714981499150015011502150315041505150615071508150915101511151215131514151515161517151815191520152115221523152415251526152715281529153015311532153315341535153615371538
  1. /*
  2. * Copyright (C) 2011 Texas Instruments
  3. * Author: Tomi Valkeinen <tomi.valkeinen@ti.com>
  4. *
  5. * This program is free software; you can redistribute it and/or modify it
  6. * under the terms of the GNU General Public License version 2 as published by
  7. * the Free Software Foundation.
  8. *
  9. * This program is distributed in the hope that it will be useful, but WITHOUT
  10. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  12. * more details.
  13. *
  14. * You should have received a copy of the GNU General Public License along with
  15. * this program. If not, see <http://www.gnu.org/licenses/>.
  16. */
  17. #define DSS_SUBSYS_NAME "APPLY"
  18. #include <linux/kernel.h>
  19. #include <linux/slab.h>
  20. #include <linux/spinlock.h>
  21. #include <linux/jiffies.h>
  22. #include <video/omapdss.h>
  23. #include "dss.h"
  24. #include "dss_features.h"
  25. /*
  26. * We have 4 levels of cache for the dispc settings. First two are in SW and
  27. * the latter two in HW.
  28. *
  29. * set_info()
  30. * v
  31. * +--------------------+
  32. * | user_info |
  33. * +--------------------+
  34. * v
  35. * apply()
  36. * v
  37. * +--------------------+
  38. * | info |
  39. * +--------------------+
  40. * v
  41. * write_regs()
  42. * v
  43. * +--------------------+
  44. * | shadow registers |
  45. * +--------------------+
  46. * v
  47. * VFP or lcd/digit_enable
  48. * v
  49. * +--------------------+
  50. * | registers |
  51. * +--------------------+
  52. */
  53. struct ovl_priv_data {
  54. bool user_info_dirty;
  55. struct omap_overlay_info user_info;
  56. bool info_dirty;
  57. struct omap_overlay_info info;
  58. bool shadow_info_dirty;
  59. bool extra_info_dirty;
  60. bool shadow_extra_info_dirty;
  61. bool enabled;
  62. enum omap_channel channel;
  63. u32 fifo_low, fifo_high;
  64. /*
  65. * True if overlay is to be enabled. Used to check and calculate configs
  66. * for the overlay before it is enabled in the HW.
  67. */
  68. bool enabling;
  69. };
  70. struct mgr_priv_data {
  71. bool user_info_dirty;
  72. struct omap_overlay_manager_info user_info;
  73. bool info_dirty;
  74. struct omap_overlay_manager_info info;
  75. bool shadow_info_dirty;
  76. /* If true, GO bit is up and shadow registers cannot be written.
  77. * Never true for manual update displays */
  78. bool busy;
  79. /* If true, dispc output is enabled */
  80. bool updating;
  81. /* If true, a display is enabled using this manager */
  82. bool enabled;
  83. bool extra_info_dirty;
  84. bool shadow_extra_info_dirty;
  85. struct omap_video_timings timings;
  86. struct dss_lcd_mgr_config lcd_config;
  87. };
  88. static struct {
  89. struct ovl_priv_data ovl_priv_data_array[MAX_DSS_OVERLAYS];
  90. struct mgr_priv_data mgr_priv_data_array[MAX_DSS_MANAGERS];
  91. bool irq_enabled;
  92. } dss_data;
  93. /* protects dss_data */
  94. static spinlock_t data_lock;
  95. /* lock for blocking functions */
  96. static DEFINE_MUTEX(apply_lock);
  97. static DECLARE_COMPLETION(extra_updated_completion);
  98. static void dss_register_vsync_isr(void);
  99. static struct ovl_priv_data *get_ovl_priv(struct omap_overlay *ovl)
  100. {
  101. return &dss_data.ovl_priv_data_array[ovl->id];
  102. }
  103. static struct mgr_priv_data *get_mgr_priv(struct omap_overlay_manager *mgr)
  104. {
  105. return &dss_data.mgr_priv_data_array[mgr->id];
  106. }
  107. void dss_apply_init(void)
  108. {
  109. const int num_ovls = dss_feat_get_num_ovls();
  110. struct mgr_priv_data *mp;
  111. int i;
  112. spin_lock_init(&data_lock);
  113. for (i = 0; i < num_ovls; ++i) {
  114. struct ovl_priv_data *op;
  115. op = &dss_data.ovl_priv_data_array[i];
  116. op->info.global_alpha = 255;
  117. switch (i) {
  118. case 0:
  119. op->info.zorder = 0;
  120. break;
  121. case 1:
  122. op->info.zorder =
  123. dss_has_feature(FEAT_ALPHA_FREE_ZORDER) ? 3 : 0;
  124. break;
  125. case 2:
  126. op->info.zorder =
  127. dss_has_feature(FEAT_ALPHA_FREE_ZORDER) ? 2 : 0;
  128. break;
  129. case 3:
  130. op->info.zorder =
  131. dss_has_feature(FEAT_ALPHA_FREE_ZORDER) ? 1 : 0;
  132. break;
  133. }
  134. op->user_info = op->info;
  135. }
  136. /*
  137. * Initialize some of the lcd_config fields for TV manager, this lets
  138. * us prevent checking if the manager is LCD or TV at some places
  139. */
  140. mp = &dss_data.mgr_priv_data_array[OMAP_DSS_CHANNEL_DIGIT];
  141. mp->lcd_config.video_port_width = 24;
  142. mp->lcd_config.clock_info.lck_div = 1;
  143. mp->lcd_config.clock_info.pck_div = 1;
  144. }
  145. /*
  146. * A LCD manager's stallmode decides whether it is in manual or auto update. TV
  147. * manager is always auto update, stallmode field for TV manager is false by
  148. * default
  149. */
  150. static bool ovl_manual_update(struct omap_overlay *ovl)
  151. {
  152. struct mgr_priv_data *mp = get_mgr_priv(ovl->manager);
  153. return mp->lcd_config.stallmode;
  154. }
  155. static bool mgr_manual_update(struct omap_overlay_manager *mgr)
  156. {
  157. struct mgr_priv_data *mp = get_mgr_priv(mgr);
  158. return mp->lcd_config.stallmode;
  159. }
  160. static int dss_check_settings_low(struct omap_overlay_manager *mgr,
  161. bool applying)
  162. {
  163. struct omap_overlay_info *oi;
  164. struct omap_overlay_manager_info *mi;
  165. struct omap_overlay *ovl;
  166. struct omap_overlay_info *ois[MAX_DSS_OVERLAYS];
  167. struct ovl_priv_data *op;
  168. struct mgr_priv_data *mp;
  169. mp = get_mgr_priv(mgr);
  170. if (!mp->enabled)
  171. return 0;
  172. if (applying && mp->user_info_dirty)
  173. mi = &mp->user_info;
  174. else
  175. mi = &mp->info;
  176. /* collect the infos to be tested into the array */
  177. list_for_each_entry(ovl, &mgr->overlays, list) {
  178. op = get_ovl_priv(ovl);
  179. if (!op->enabled && !op->enabling)
  180. oi = NULL;
  181. else if (applying && op->user_info_dirty)
  182. oi = &op->user_info;
  183. else
  184. oi = &op->info;
  185. ois[ovl->id] = oi;
  186. }
  187. return dss_mgr_check(mgr, mi, &mp->timings, &mp->lcd_config, ois);
  188. }
  189. /*
  190. * check manager and overlay settings using overlay_info from data->info
  191. */
  192. static int dss_check_settings(struct omap_overlay_manager *mgr)
  193. {
  194. return dss_check_settings_low(mgr, false);
  195. }
  196. /*
  197. * check manager and overlay settings using overlay_info from ovl->info if
  198. * dirty and from data->info otherwise
  199. */
  200. static int dss_check_settings_apply(struct omap_overlay_manager *mgr)
  201. {
  202. return dss_check_settings_low(mgr, true);
  203. }
  204. static bool need_isr(void)
  205. {
  206. const int num_mgrs = dss_feat_get_num_mgrs();
  207. int i;
  208. for (i = 0; i < num_mgrs; ++i) {
  209. struct omap_overlay_manager *mgr;
  210. struct mgr_priv_data *mp;
  211. struct omap_overlay *ovl;
  212. mgr = omap_dss_get_overlay_manager(i);
  213. mp = get_mgr_priv(mgr);
  214. if (!mp->enabled)
  215. continue;
  216. if (mgr_manual_update(mgr)) {
  217. /* to catch FRAMEDONE */
  218. if (mp->updating)
  219. return true;
  220. } else {
  221. /* to catch GO bit going down */
  222. if (mp->busy)
  223. return true;
  224. /* to write new values to registers */
  225. if (mp->info_dirty)
  226. return true;
  227. /* to set GO bit */
  228. if (mp->shadow_info_dirty)
  229. return true;
  230. /*
  231. * NOTE: we don't check extra_info flags for disabled
  232. * managers, once the manager is enabled, the extra_info
  233. * related manager changes will be taken in by HW.
  234. */
  235. /* to write new values to registers */
  236. if (mp->extra_info_dirty)
  237. return true;
  238. /* to set GO bit */
  239. if (mp->shadow_extra_info_dirty)
  240. return true;
  241. list_for_each_entry(ovl, &mgr->overlays, list) {
  242. struct ovl_priv_data *op;
  243. op = get_ovl_priv(ovl);
  244. /*
  245. * NOTE: we check extra_info flags even for
  246. * disabled overlays, as extra_infos need to be
  247. * always written.
  248. */
  249. /* to write new values to registers */
  250. if (op->extra_info_dirty)
  251. return true;
  252. /* to set GO bit */
  253. if (op->shadow_extra_info_dirty)
  254. return true;
  255. if (!op->enabled)
  256. continue;
  257. /* to write new values to registers */
  258. if (op->info_dirty)
  259. return true;
  260. /* to set GO bit */
  261. if (op->shadow_info_dirty)
  262. return true;
  263. }
  264. }
  265. }
  266. return false;
  267. }
  268. static bool need_go(struct omap_overlay_manager *mgr)
  269. {
  270. struct omap_overlay *ovl;
  271. struct mgr_priv_data *mp;
  272. struct ovl_priv_data *op;
  273. mp = get_mgr_priv(mgr);
  274. if (mp->shadow_info_dirty || mp->shadow_extra_info_dirty)
  275. return true;
  276. list_for_each_entry(ovl, &mgr->overlays, list) {
  277. op = get_ovl_priv(ovl);
  278. if (op->shadow_info_dirty || op->shadow_extra_info_dirty)
  279. return true;
  280. }
  281. return false;
  282. }
  283. /* returns true if an extra_info field is currently being updated */
  284. static bool extra_info_update_ongoing(void)
  285. {
  286. const int num_mgrs = dss_feat_get_num_mgrs();
  287. int i;
  288. for (i = 0; i < num_mgrs; ++i) {
  289. struct omap_overlay_manager *mgr;
  290. struct omap_overlay *ovl;
  291. struct mgr_priv_data *mp;
  292. mgr = omap_dss_get_overlay_manager(i);
  293. mp = get_mgr_priv(mgr);
  294. if (!mp->enabled)
  295. continue;
  296. if (!mp->updating)
  297. continue;
  298. if (mp->extra_info_dirty || mp->shadow_extra_info_dirty)
  299. return true;
  300. list_for_each_entry(ovl, &mgr->overlays, list) {
  301. struct ovl_priv_data *op = get_ovl_priv(ovl);
  302. if (op->extra_info_dirty || op->shadow_extra_info_dirty)
  303. return true;
  304. }
  305. }
  306. return false;
  307. }
  308. /* wait until no extra_info updates are pending */
  309. static void wait_pending_extra_info_updates(void)
  310. {
  311. bool updating;
  312. unsigned long flags;
  313. unsigned long t;
  314. int r;
  315. spin_lock_irqsave(&data_lock, flags);
  316. updating = extra_info_update_ongoing();
  317. if (!updating) {
  318. spin_unlock_irqrestore(&data_lock, flags);
  319. return;
  320. }
  321. init_completion(&extra_updated_completion);
  322. spin_unlock_irqrestore(&data_lock, flags);
  323. t = msecs_to_jiffies(500);
  324. r = wait_for_completion_timeout(&extra_updated_completion, t);
  325. if (r == 0)
  326. DSSWARN("timeout in wait_pending_extra_info_updates\n");
  327. else if (r < 0)
  328. DSSERR("wait_pending_extra_info_updates failed: %d\n", r);
  329. }
  330. int dss_mgr_wait_for_go(struct omap_overlay_manager *mgr)
  331. {
  332. unsigned long timeout = msecs_to_jiffies(500);
  333. struct mgr_priv_data *mp = get_mgr_priv(mgr);
  334. u32 irq;
  335. unsigned long flags;
  336. int r;
  337. int i;
  338. spin_lock_irqsave(&data_lock, flags);
  339. if (mgr_manual_update(mgr)) {
  340. spin_unlock_irqrestore(&data_lock, flags);
  341. return 0;
  342. }
  343. if (!mp->enabled) {
  344. spin_unlock_irqrestore(&data_lock, flags);
  345. return 0;
  346. }
  347. spin_unlock_irqrestore(&data_lock, flags);
  348. r = dispc_runtime_get();
  349. if (r)
  350. return r;
  351. irq = dispc_mgr_get_vsync_irq(mgr->id);
  352. i = 0;
  353. while (1) {
  354. bool shadow_dirty, dirty;
  355. spin_lock_irqsave(&data_lock, flags);
  356. dirty = mp->info_dirty;
  357. shadow_dirty = mp->shadow_info_dirty;
  358. spin_unlock_irqrestore(&data_lock, flags);
  359. if (!dirty && !shadow_dirty) {
  360. r = 0;
  361. break;
  362. }
  363. /* 4 iterations is the worst case:
  364. * 1 - initial iteration, dirty = true (between VFP and VSYNC)
  365. * 2 - first VSYNC, dirty = true
  366. * 3 - dirty = false, shadow_dirty = true
  367. * 4 - shadow_dirty = false */
  368. if (i++ == 3) {
  369. DSSERR("mgr(%d)->wait_for_go() not finishing\n",
  370. mgr->id);
  371. r = 0;
  372. break;
  373. }
  374. r = omap_dispc_wait_for_irq_interruptible_timeout(irq, timeout);
  375. if (r == -ERESTARTSYS)
  376. break;
  377. if (r) {
  378. DSSERR("mgr(%d)->wait_for_go() timeout\n", mgr->id);
  379. break;
  380. }
  381. }
  382. dispc_runtime_put();
  383. return r;
  384. }
  385. int dss_mgr_wait_for_go_ovl(struct omap_overlay *ovl)
  386. {
  387. unsigned long timeout = msecs_to_jiffies(500);
  388. struct ovl_priv_data *op;
  389. struct mgr_priv_data *mp;
  390. u32 irq;
  391. unsigned long flags;
  392. int r;
  393. int i;
  394. if (!ovl->manager)
  395. return 0;
  396. mp = get_mgr_priv(ovl->manager);
  397. spin_lock_irqsave(&data_lock, flags);
  398. if (ovl_manual_update(ovl)) {
  399. spin_unlock_irqrestore(&data_lock, flags);
  400. return 0;
  401. }
  402. if (!mp->enabled) {
  403. spin_unlock_irqrestore(&data_lock, flags);
  404. return 0;
  405. }
  406. spin_unlock_irqrestore(&data_lock, flags);
  407. r = dispc_runtime_get();
  408. if (r)
  409. return r;
  410. irq = dispc_mgr_get_vsync_irq(ovl->manager->id);
  411. op = get_ovl_priv(ovl);
  412. i = 0;
  413. while (1) {
  414. bool shadow_dirty, dirty;
  415. spin_lock_irqsave(&data_lock, flags);
  416. dirty = op->info_dirty;
  417. shadow_dirty = op->shadow_info_dirty;
  418. spin_unlock_irqrestore(&data_lock, flags);
  419. if (!dirty && !shadow_dirty) {
  420. r = 0;
  421. break;
  422. }
  423. /* 4 iterations is the worst case:
  424. * 1 - initial iteration, dirty = true (between VFP and VSYNC)
  425. * 2 - first VSYNC, dirty = true
  426. * 3 - dirty = false, shadow_dirty = true
  427. * 4 - shadow_dirty = false */
  428. if (i++ == 3) {
  429. DSSERR("ovl(%d)->wait_for_go() not finishing\n",
  430. ovl->id);
  431. r = 0;
  432. break;
  433. }
  434. r = omap_dispc_wait_for_irq_interruptible_timeout(irq, timeout);
  435. if (r == -ERESTARTSYS)
  436. break;
  437. if (r) {
  438. DSSERR("ovl(%d)->wait_for_go() timeout\n", ovl->id);
  439. break;
  440. }
  441. }
  442. dispc_runtime_put();
  443. return r;
  444. }
  445. static void dss_ovl_write_regs(struct omap_overlay *ovl)
  446. {
  447. struct ovl_priv_data *op = get_ovl_priv(ovl);
  448. struct omap_overlay_info *oi;
  449. bool replication;
  450. struct mgr_priv_data *mp;
  451. int r;
  452. DSSDBGF("%d", ovl->id);
  453. if (!op->enabled || !op->info_dirty)
  454. return;
  455. oi = &op->info;
  456. mp = get_mgr_priv(ovl->manager);
  457. replication = dss_ovl_use_replication(mp->lcd_config, oi->color_mode);
  458. r = dispc_ovl_setup(ovl->id, oi, replication, &mp->timings);
  459. if (r) {
  460. /*
  461. * We can't do much here, as this function can be called from
  462. * vsync interrupt.
  463. */
  464. DSSERR("dispc_ovl_setup failed for ovl %d\n", ovl->id);
  465. /* This will leave fifo configurations in a nonoptimal state */
  466. op->enabled = false;
  467. dispc_ovl_enable(ovl->id, false);
  468. return;
  469. }
  470. op->info_dirty = false;
  471. if (mp->updating)
  472. op->shadow_info_dirty = true;
  473. }
  474. static void dss_ovl_write_regs_extra(struct omap_overlay *ovl)
  475. {
  476. struct ovl_priv_data *op = get_ovl_priv(ovl);
  477. struct mgr_priv_data *mp;
  478. DSSDBGF("%d", ovl->id);
  479. if (!op->extra_info_dirty)
  480. return;
  481. /* note: write also when op->enabled == false, so that the ovl gets
  482. * disabled */
  483. dispc_ovl_enable(ovl->id, op->enabled);
  484. dispc_ovl_set_channel_out(ovl->id, op->channel);
  485. dispc_ovl_set_fifo_threshold(ovl->id, op->fifo_low, op->fifo_high);
  486. mp = get_mgr_priv(ovl->manager);
  487. op->extra_info_dirty = false;
  488. if (mp->updating)
  489. op->shadow_extra_info_dirty = true;
  490. }
  491. static void dss_mgr_write_regs(struct omap_overlay_manager *mgr)
  492. {
  493. struct mgr_priv_data *mp = get_mgr_priv(mgr);
  494. struct omap_overlay *ovl;
  495. DSSDBGF("%d", mgr->id);
  496. if (!mp->enabled)
  497. return;
  498. WARN_ON(mp->busy);
  499. /* Commit overlay settings */
  500. list_for_each_entry(ovl, &mgr->overlays, list) {
  501. dss_ovl_write_regs(ovl);
  502. dss_ovl_write_regs_extra(ovl);
  503. }
  504. if (mp->info_dirty) {
  505. dispc_mgr_setup(mgr->id, &mp->info);
  506. mp->info_dirty = false;
  507. if (mp->updating)
  508. mp->shadow_info_dirty = true;
  509. }
  510. }
  511. static void dss_mgr_write_regs_extra(struct omap_overlay_manager *mgr)
  512. {
  513. struct mgr_priv_data *mp = get_mgr_priv(mgr);
  514. DSSDBGF("%d", mgr->id);
  515. if (!mp->extra_info_dirty)
  516. return;
  517. dispc_mgr_set_timings(mgr->id, &mp->timings);
  518. /* lcd_config parameters */
  519. if (dss_mgr_is_lcd(mgr->id)) {
  520. dispc_mgr_set_io_pad_mode(mp->lcd_config.io_pad_mode);
  521. dispc_mgr_enable_stallmode(mgr->id, mp->lcd_config.stallmode);
  522. dispc_mgr_enable_fifohandcheck(mgr->id,
  523. mp->lcd_config.fifohandcheck);
  524. dispc_mgr_set_clock_div(mgr->id, &mp->lcd_config.clock_info);
  525. dispc_mgr_set_tft_data_lines(mgr->id,
  526. mp->lcd_config.video_port_width);
  527. dispc_lcd_enable_signal_polarity(mp->lcd_config.lcden_sig_polarity);
  528. dispc_mgr_set_lcd_type_tft(mgr->id);
  529. }
  530. mp->extra_info_dirty = false;
  531. if (mp->updating)
  532. mp->shadow_extra_info_dirty = true;
  533. }
  534. static void dss_write_regs(void)
  535. {
  536. const int num_mgrs = omap_dss_get_num_overlay_managers();
  537. int i;
  538. for (i = 0; i < num_mgrs; ++i) {
  539. struct omap_overlay_manager *mgr;
  540. struct mgr_priv_data *mp;
  541. int r;
  542. mgr = omap_dss_get_overlay_manager(i);
  543. mp = get_mgr_priv(mgr);
  544. if (!mp->enabled || mgr_manual_update(mgr) || mp->busy)
  545. continue;
  546. r = dss_check_settings(mgr);
  547. if (r) {
  548. DSSERR("cannot write registers for manager %s: "
  549. "illegal configuration\n", mgr->name);
  550. continue;
  551. }
  552. dss_mgr_write_regs(mgr);
  553. dss_mgr_write_regs_extra(mgr);
  554. }
  555. }
  556. static void dss_set_go_bits(void)
  557. {
  558. const int num_mgrs = omap_dss_get_num_overlay_managers();
  559. int i;
  560. for (i = 0; i < num_mgrs; ++i) {
  561. struct omap_overlay_manager *mgr;
  562. struct mgr_priv_data *mp;
  563. mgr = omap_dss_get_overlay_manager(i);
  564. mp = get_mgr_priv(mgr);
  565. if (!mp->enabled || mgr_manual_update(mgr) || mp->busy)
  566. continue;
  567. if (!need_go(mgr))
  568. continue;
  569. mp->busy = true;
  570. if (!dss_data.irq_enabled && need_isr())
  571. dss_register_vsync_isr();
  572. dispc_mgr_go(mgr->id);
  573. }
  574. }
  575. static void mgr_clear_shadow_dirty(struct omap_overlay_manager *mgr)
  576. {
  577. struct omap_overlay *ovl;
  578. struct mgr_priv_data *mp;
  579. struct ovl_priv_data *op;
  580. mp = get_mgr_priv(mgr);
  581. mp->shadow_info_dirty = false;
  582. mp->shadow_extra_info_dirty = false;
  583. list_for_each_entry(ovl, &mgr->overlays, list) {
  584. op = get_ovl_priv(ovl);
  585. op->shadow_info_dirty = false;
  586. op->shadow_extra_info_dirty = false;
  587. }
  588. }
  589. void dss_mgr_start_update(struct omap_overlay_manager *mgr)
  590. {
  591. struct mgr_priv_data *mp = get_mgr_priv(mgr);
  592. unsigned long flags;
  593. int r;
  594. spin_lock_irqsave(&data_lock, flags);
  595. WARN_ON(mp->updating);
  596. r = dss_check_settings(mgr);
  597. if (r) {
  598. DSSERR("cannot start manual update: illegal configuration\n");
  599. spin_unlock_irqrestore(&data_lock, flags);
  600. return;
  601. }
  602. dss_mgr_write_regs(mgr);
  603. dss_mgr_write_regs_extra(mgr);
  604. mp->updating = true;
  605. if (!dss_data.irq_enabled && need_isr())
  606. dss_register_vsync_isr();
  607. dispc_mgr_enable(mgr->id, true);
  608. mgr_clear_shadow_dirty(mgr);
  609. spin_unlock_irqrestore(&data_lock, flags);
  610. }
  611. static void dss_apply_irq_handler(void *data, u32 mask);
  612. static void dss_register_vsync_isr(void)
  613. {
  614. const int num_mgrs = dss_feat_get_num_mgrs();
  615. u32 mask;
  616. int r, i;
  617. mask = 0;
  618. for (i = 0; i < num_mgrs; ++i)
  619. mask |= dispc_mgr_get_vsync_irq(i);
  620. for (i = 0; i < num_mgrs; ++i)
  621. mask |= dispc_mgr_get_framedone_irq(i);
  622. r = omap_dispc_register_isr(dss_apply_irq_handler, NULL, mask);
  623. WARN_ON(r);
  624. dss_data.irq_enabled = true;
  625. }
  626. static void dss_unregister_vsync_isr(void)
  627. {
  628. const int num_mgrs = dss_feat_get_num_mgrs();
  629. u32 mask;
  630. int r, i;
  631. mask = 0;
  632. for (i = 0; i < num_mgrs; ++i)
  633. mask |= dispc_mgr_get_vsync_irq(i);
  634. for (i = 0; i < num_mgrs; ++i)
  635. mask |= dispc_mgr_get_framedone_irq(i);
  636. r = omap_dispc_unregister_isr(dss_apply_irq_handler, NULL, mask);
  637. WARN_ON(r);
  638. dss_data.irq_enabled = false;
  639. }
  640. static void dss_apply_irq_handler(void *data, u32 mask)
  641. {
  642. const int num_mgrs = dss_feat_get_num_mgrs();
  643. int i;
  644. bool extra_updating;
  645. spin_lock(&data_lock);
  646. /* clear busy, updating flags, shadow_dirty flags */
  647. for (i = 0; i < num_mgrs; i++) {
  648. struct omap_overlay_manager *mgr;
  649. struct mgr_priv_data *mp;
  650. bool was_updating;
  651. mgr = omap_dss_get_overlay_manager(i);
  652. mp = get_mgr_priv(mgr);
  653. if (!mp->enabled)
  654. continue;
  655. was_updating = mp->updating;
  656. mp->updating = dispc_mgr_is_enabled(i);
  657. if (!mgr_manual_update(mgr)) {
  658. bool was_busy = mp->busy;
  659. mp->busy = dispc_mgr_go_busy(i);
  660. if (was_busy && !mp->busy)
  661. mgr_clear_shadow_dirty(mgr);
  662. }
  663. }
  664. dss_write_regs();
  665. dss_set_go_bits();
  666. extra_updating = extra_info_update_ongoing();
  667. if (!extra_updating)
  668. complete_all(&extra_updated_completion);
  669. if (!need_isr())
  670. dss_unregister_vsync_isr();
  671. spin_unlock(&data_lock);
  672. }
  673. static void omap_dss_mgr_apply_ovl(struct omap_overlay *ovl)
  674. {
  675. struct ovl_priv_data *op;
  676. op = get_ovl_priv(ovl);
  677. if (!op->user_info_dirty)
  678. return;
  679. op->user_info_dirty = false;
  680. op->info_dirty = true;
  681. op->info = op->user_info;
  682. }
  683. static void omap_dss_mgr_apply_mgr(struct omap_overlay_manager *mgr)
  684. {
  685. struct mgr_priv_data *mp;
  686. mp = get_mgr_priv(mgr);
  687. if (!mp->user_info_dirty)
  688. return;
  689. mp->user_info_dirty = false;
  690. mp->info_dirty = true;
  691. mp->info = mp->user_info;
  692. }
  693. int omap_dss_mgr_apply(struct omap_overlay_manager *mgr)
  694. {
  695. unsigned long flags;
  696. struct omap_overlay *ovl;
  697. int r;
  698. DSSDBG("omap_dss_mgr_apply(%s)\n", mgr->name);
  699. spin_lock_irqsave(&data_lock, flags);
  700. r = dss_check_settings_apply(mgr);
  701. if (r) {
  702. spin_unlock_irqrestore(&data_lock, flags);
  703. DSSERR("failed to apply settings: illegal configuration.\n");
  704. return r;
  705. }
  706. /* Configure overlays */
  707. list_for_each_entry(ovl, &mgr->overlays, list)
  708. omap_dss_mgr_apply_ovl(ovl);
  709. /* Configure manager */
  710. omap_dss_mgr_apply_mgr(mgr);
  711. dss_write_regs();
  712. dss_set_go_bits();
  713. spin_unlock_irqrestore(&data_lock, flags);
  714. return 0;
  715. }
  716. static void dss_apply_ovl_enable(struct omap_overlay *ovl, bool enable)
  717. {
  718. struct ovl_priv_data *op;
  719. op = get_ovl_priv(ovl);
  720. if (op->enabled == enable)
  721. return;
  722. op->enabled = enable;
  723. op->extra_info_dirty = true;
  724. }
  725. static void dss_apply_ovl_fifo_thresholds(struct omap_overlay *ovl,
  726. u32 fifo_low, u32 fifo_high)
  727. {
  728. struct ovl_priv_data *op = get_ovl_priv(ovl);
  729. if (op->fifo_low == fifo_low && op->fifo_high == fifo_high)
  730. return;
  731. op->fifo_low = fifo_low;
  732. op->fifo_high = fifo_high;
  733. op->extra_info_dirty = true;
  734. }
  735. static void dss_ovl_setup_fifo(struct omap_overlay *ovl)
  736. {
  737. struct ovl_priv_data *op = get_ovl_priv(ovl);
  738. u32 fifo_low, fifo_high;
  739. bool use_fifo_merge = false;
  740. if (!op->enabled && !op->enabling)
  741. return;
  742. dispc_ovl_compute_fifo_thresholds(ovl->id, &fifo_low, &fifo_high,
  743. use_fifo_merge, ovl_manual_update(ovl));
  744. dss_apply_ovl_fifo_thresholds(ovl, fifo_low, fifo_high);
  745. }
  746. static void dss_mgr_setup_fifos(struct omap_overlay_manager *mgr)
  747. {
  748. struct omap_overlay *ovl;
  749. struct mgr_priv_data *mp;
  750. mp = get_mgr_priv(mgr);
  751. if (!mp->enabled)
  752. return;
  753. list_for_each_entry(ovl, &mgr->overlays, list)
  754. dss_ovl_setup_fifo(ovl);
  755. }
  756. static void dss_setup_fifos(void)
  757. {
  758. const int num_mgrs = omap_dss_get_num_overlay_managers();
  759. struct omap_overlay_manager *mgr;
  760. int i;
  761. for (i = 0; i < num_mgrs; ++i) {
  762. mgr = omap_dss_get_overlay_manager(i);
  763. dss_mgr_setup_fifos(mgr);
  764. }
  765. }
  766. int dss_mgr_enable(struct omap_overlay_manager *mgr)
  767. {
  768. struct mgr_priv_data *mp = get_mgr_priv(mgr);
  769. unsigned long flags;
  770. int r;
  771. mutex_lock(&apply_lock);
  772. if (mp->enabled)
  773. goto out;
  774. spin_lock_irqsave(&data_lock, flags);
  775. mp->enabled = true;
  776. r = dss_check_settings(mgr);
  777. if (r) {
  778. DSSERR("failed to enable manager %d: check_settings failed\n",
  779. mgr->id);
  780. goto err;
  781. }
  782. dss_setup_fifos();
  783. dss_write_regs();
  784. dss_set_go_bits();
  785. if (!mgr_manual_update(mgr))
  786. mp->updating = true;
  787. spin_unlock_irqrestore(&data_lock, flags);
  788. if (!mgr_manual_update(mgr))
  789. dispc_mgr_enable(mgr->id, true);
  790. out:
  791. mutex_unlock(&apply_lock);
  792. return 0;
  793. err:
  794. mp->enabled = false;
  795. spin_unlock_irqrestore(&data_lock, flags);
  796. mutex_unlock(&apply_lock);
  797. return r;
  798. }
  799. void dss_mgr_disable(struct omap_overlay_manager *mgr)
  800. {
  801. struct mgr_priv_data *mp = get_mgr_priv(mgr);
  802. unsigned long flags;
  803. mutex_lock(&apply_lock);
  804. if (!mp->enabled)
  805. goto out;
  806. if (!mgr_manual_update(mgr))
  807. dispc_mgr_enable(mgr->id, false);
  808. spin_lock_irqsave(&data_lock, flags);
  809. mp->updating = false;
  810. mp->enabled = false;
  811. spin_unlock_irqrestore(&data_lock, flags);
  812. out:
  813. mutex_unlock(&apply_lock);
  814. }
  815. int dss_mgr_set_info(struct omap_overlay_manager *mgr,
  816. struct omap_overlay_manager_info *info)
  817. {
  818. struct mgr_priv_data *mp = get_mgr_priv(mgr);
  819. unsigned long flags;
  820. int r;
  821. r = dss_mgr_simple_check(mgr, info);
  822. if (r)
  823. return r;
  824. spin_lock_irqsave(&data_lock, flags);
  825. mp->user_info = *info;
  826. mp->user_info_dirty = true;
  827. spin_unlock_irqrestore(&data_lock, flags);
  828. return 0;
  829. }
  830. void dss_mgr_get_info(struct omap_overlay_manager *mgr,
  831. struct omap_overlay_manager_info *info)
  832. {
  833. struct mgr_priv_data *mp = get_mgr_priv(mgr);
  834. unsigned long flags;
  835. spin_lock_irqsave(&data_lock, flags);
  836. *info = mp->user_info;
  837. spin_unlock_irqrestore(&data_lock, flags);
  838. }
  839. int dss_mgr_set_device(struct omap_overlay_manager *mgr,
  840. struct omap_dss_device *dssdev)
  841. {
  842. int r;
  843. mutex_lock(&apply_lock);
  844. if (dssdev->manager) {
  845. DSSERR("display '%s' already has a manager '%s'\n",
  846. dssdev->name, dssdev->manager->name);
  847. r = -EINVAL;
  848. goto err;
  849. }
  850. if ((mgr->supported_displays & dssdev->type) == 0) {
  851. DSSERR("display '%s' does not support manager '%s'\n",
  852. dssdev->name, mgr->name);
  853. r = -EINVAL;
  854. goto err;
  855. }
  856. dssdev->manager = mgr;
  857. mgr->device = dssdev;
  858. mutex_unlock(&apply_lock);
  859. return 0;
  860. err:
  861. mutex_unlock(&apply_lock);
  862. return r;
  863. }
  864. int dss_mgr_unset_device(struct omap_overlay_manager *mgr)
  865. {
  866. int r;
  867. mutex_lock(&apply_lock);
  868. if (!mgr->device) {
  869. DSSERR("failed to unset display, display not set.\n");
  870. r = -EINVAL;
  871. goto err;
  872. }
  873. /*
  874. * Don't allow currently enabled displays to have the overlay manager
  875. * pulled out from underneath them
  876. */
  877. if (mgr->device->state != OMAP_DSS_DISPLAY_DISABLED) {
  878. r = -EINVAL;
  879. goto err;
  880. }
  881. mgr->device->manager = NULL;
  882. mgr->device = NULL;
  883. mutex_unlock(&apply_lock);
  884. return 0;
  885. err:
  886. mutex_unlock(&apply_lock);
  887. return r;
  888. }
  889. int dss_mgr_set_output(struct omap_overlay_manager *mgr,
  890. struct omap_dss_output *output)
  891. {
  892. int r;
  893. mutex_lock(&apply_lock);
  894. if (mgr->output) {
  895. DSSERR("manager %s is already connected to an output\n",
  896. mgr->name);
  897. r = -EINVAL;
  898. goto err;
  899. }
  900. if ((mgr->supported_outputs & output->id) == 0) {
  901. DSSERR("output does not support manager %s\n",
  902. mgr->name);
  903. r = -EINVAL;
  904. goto err;
  905. }
  906. output->manager = mgr;
  907. mgr->output = output;
  908. mutex_unlock(&apply_lock);
  909. return 0;
  910. err:
  911. mutex_unlock(&apply_lock);
  912. return r;
  913. }
  914. int dss_mgr_unset_output(struct omap_overlay_manager *mgr)
  915. {
  916. int r;
  917. struct mgr_priv_data *mp = get_mgr_priv(mgr);
  918. unsigned long flags;
  919. mutex_lock(&apply_lock);
  920. if (!mgr->output) {
  921. DSSERR("failed to unset output, output not set\n");
  922. r = -EINVAL;
  923. goto err;
  924. }
  925. spin_lock_irqsave(&data_lock, flags);
  926. if (mp->enabled) {
  927. DSSERR("output can't be unset when manager is enabled\n");
  928. r = -EINVAL;
  929. goto err1;
  930. }
  931. spin_unlock_irqrestore(&data_lock, flags);
  932. mgr->output->manager = NULL;
  933. mgr->output = NULL;
  934. mutex_unlock(&apply_lock);
  935. return 0;
  936. err1:
  937. spin_unlock_irqrestore(&data_lock, flags);
  938. err:
  939. mutex_unlock(&apply_lock);
  940. return r;
  941. }
  942. static void dss_apply_mgr_timings(struct omap_overlay_manager *mgr,
  943. const struct omap_video_timings *timings)
  944. {
  945. struct mgr_priv_data *mp = get_mgr_priv(mgr);
  946. mp->timings = *timings;
  947. mp->extra_info_dirty = true;
  948. }
  949. void dss_mgr_set_timings(struct omap_overlay_manager *mgr,
  950. const struct omap_video_timings *timings)
  951. {
  952. unsigned long flags;
  953. struct mgr_priv_data *mp = get_mgr_priv(mgr);
  954. spin_lock_irqsave(&data_lock, flags);
  955. if (mp->updating) {
  956. DSSERR("cannot set timings for %s: manager needs to be disabled\n",
  957. mgr->name);
  958. goto out;
  959. }
  960. dss_apply_mgr_timings(mgr, timings);
  961. out:
  962. spin_unlock_irqrestore(&data_lock, flags);
  963. }
  964. static void dss_apply_mgr_lcd_config(struct omap_overlay_manager *mgr,
  965. const struct dss_lcd_mgr_config *config)
  966. {
  967. struct mgr_priv_data *mp = get_mgr_priv(mgr);
  968. mp->lcd_config = *config;
  969. mp->extra_info_dirty = true;
  970. }
  971. void dss_mgr_set_lcd_config(struct omap_overlay_manager *mgr,
  972. const struct dss_lcd_mgr_config *config)
  973. {
  974. unsigned long flags;
  975. struct mgr_priv_data *mp = get_mgr_priv(mgr);
  976. spin_lock_irqsave(&data_lock, flags);
  977. if (mp->enabled) {
  978. DSSERR("cannot apply lcd config for %s: manager needs to be disabled\n",
  979. mgr->name);
  980. goto out;
  981. }
  982. dss_apply_mgr_lcd_config(mgr, config);
  983. out:
  984. spin_unlock_irqrestore(&data_lock, flags);
  985. }
  986. int dss_ovl_set_info(struct omap_overlay *ovl,
  987. struct omap_overlay_info *info)
  988. {
  989. struct ovl_priv_data *op = get_ovl_priv(ovl);
  990. unsigned long flags;
  991. int r;
  992. r = dss_ovl_simple_check(ovl, info);
  993. if (r)
  994. return r;
  995. spin_lock_irqsave(&data_lock, flags);
  996. op->user_info = *info;
  997. op->user_info_dirty = true;
  998. spin_unlock_irqrestore(&data_lock, flags);
  999. return 0;
  1000. }
  1001. void dss_ovl_get_info(struct omap_overlay *ovl,
  1002. struct omap_overlay_info *info)
  1003. {
  1004. struct ovl_priv_data *op = get_ovl_priv(ovl);
  1005. unsigned long flags;
  1006. spin_lock_irqsave(&data_lock, flags);
  1007. *info = op->user_info;
  1008. spin_unlock_irqrestore(&data_lock, flags);
  1009. }
  1010. int dss_ovl_set_manager(struct omap_overlay *ovl,
  1011. struct omap_overlay_manager *mgr)
  1012. {
  1013. struct ovl_priv_data *op = get_ovl_priv(ovl);
  1014. unsigned long flags;
  1015. int r;
  1016. if (!mgr)
  1017. return -EINVAL;
  1018. mutex_lock(&apply_lock);
  1019. if (ovl->manager) {
  1020. DSSERR("overlay '%s' already has a manager '%s'\n",
  1021. ovl->name, ovl->manager->name);
  1022. r = -EINVAL;
  1023. goto err;
  1024. }
  1025. spin_lock_irqsave(&data_lock, flags);
  1026. if (op->enabled) {
  1027. spin_unlock_irqrestore(&data_lock, flags);
  1028. DSSERR("overlay has to be disabled to change the manager\n");
  1029. r = -EINVAL;
  1030. goto err;
  1031. }
  1032. op->channel = mgr->id;
  1033. op->extra_info_dirty = true;
  1034. ovl->manager = mgr;
  1035. list_add_tail(&ovl->list, &mgr->overlays);
  1036. spin_unlock_irqrestore(&data_lock, flags);
  1037. /* XXX: When there is an overlay on a DSI manual update display, and
  1038. * the overlay is first disabled, then moved to tv, and enabled, we
  1039. * seem to get SYNC_LOST_DIGIT error.
  1040. *
  1041. * Waiting doesn't seem to help, but updating the manual update display
  1042. * after disabling the overlay seems to fix this. This hints that the
  1043. * overlay is perhaps somehow tied to the LCD output until the output
  1044. * is updated.
  1045. *
  1046. * Userspace workaround for this is to update the LCD after disabling
  1047. * the overlay, but before moving the overlay to TV.
  1048. */
  1049. mutex_unlock(&apply_lock);
  1050. return 0;
  1051. err:
  1052. mutex_unlock(&apply_lock);
  1053. return r;
  1054. }
  1055. int dss_ovl_unset_manager(struct omap_overlay *ovl)
  1056. {
  1057. struct ovl_priv_data *op = get_ovl_priv(ovl);
  1058. unsigned long flags;
  1059. int r;
  1060. mutex_lock(&apply_lock);
  1061. if (!ovl->manager) {
  1062. DSSERR("failed to detach overlay: manager not set\n");
  1063. r = -EINVAL;
  1064. goto err;
  1065. }
  1066. spin_lock_irqsave(&data_lock, flags);
  1067. if (op->enabled) {
  1068. spin_unlock_irqrestore(&data_lock, flags);
  1069. DSSERR("overlay has to be disabled to unset the manager\n");
  1070. r = -EINVAL;
  1071. goto err;
  1072. }
  1073. spin_unlock_irqrestore(&data_lock, flags);
  1074. /* wait for pending extra_info updates to ensure the ovl is disabled */
  1075. wait_pending_extra_info_updates();
  1076. spin_lock_irqsave(&data_lock, flags);
  1077. op->channel = -1;
  1078. ovl->manager = NULL;
  1079. list_del(&ovl->list);
  1080. spin_unlock_irqrestore(&data_lock, flags);
  1081. mutex_unlock(&apply_lock);
  1082. return 0;
  1083. err:
  1084. mutex_unlock(&apply_lock);
  1085. return r;
  1086. }
  1087. bool dss_ovl_is_enabled(struct omap_overlay *ovl)
  1088. {
  1089. struct ovl_priv_data *op = get_ovl_priv(ovl);
  1090. unsigned long flags;
  1091. bool e;
  1092. spin_lock_irqsave(&data_lock, flags);
  1093. e = op->enabled;
  1094. spin_unlock_irqrestore(&data_lock, flags);
  1095. return e;
  1096. }
  1097. int dss_ovl_enable(struct omap_overlay *ovl)
  1098. {
  1099. struct ovl_priv_data *op = get_ovl_priv(ovl);
  1100. unsigned long flags;
  1101. int r;
  1102. mutex_lock(&apply_lock);
  1103. if (op->enabled) {
  1104. r = 0;
  1105. goto err1;
  1106. }
  1107. if (ovl->manager == NULL || ovl->manager->device == NULL) {
  1108. r = -EINVAL;
  1109. goto err1;
  1110. }
  1111. spin_lock_irqsave(&data_lock, flags);
  1112. op->enabling = true;
  1113. r = dss_check_settings(ovl->manager);
  1114. if (r) {
  1115. DSSERR("failed to enable overlay %d: check_settings failed\n",
  1116. ovl->id);
  1117. goto err2;
  1118. }
  1119. dss_setup_fifos();
  1120. op->enabling = false;
  1121. dss_apply_ovl_enable(ovl, true);
  1122. dss_write_regs();
  1123. dss_set_go_bits();
  1124. spin_unlock_irqrestore(&data_lock, flags);
  1125. mutex_unlock(&apply_lock);
  1126. return 0;
  1127. err2:
  1128. op->enabling = false;
  1129. spin_unlock_irqrestore(&data_lock, flags);
  1130. err1:
  1131. mutex_unlock(&apply_lock);
  1132. return r;
  1133. }
  1134. int dss_ovl_disable(struct omap_overlay *ovl)
  1135. {
  1136. struct ovl_priv_data *op = get_ovl_priv(ovl);
  1137. unsigned long flags;
  1138. int r;
  1139. mutex_lock(&apply_lock);
  1140. if (!op->enabled) {
  1141. r = 0;
  1142. goto err;
  1143. }
  1144. if (ovl->manager == NULL || ovl->manager->device == NULL) {
  1145. r = -EINVAL;
  1146. goto err;
  1147. }
  1148. spin_lock_irqsave(&data_lock, flags);
  1149. dss_apply_ovl_enable(ovl, false);
  1150. dss_write_regs();
  1151. dss_set_go_bits();
  1152. spin_unlock_irqrestore(&data_lock, flags);
  1153. mutex_unlock(&apply_lock);
  1154. return 0;
  1155. err:
  1156. mutex_unlock(&apply_lock);
  1157. return r;
  1158. }