netxen_nic_phan_reg.h 6.3 KB

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  1. /*
  2. * Copyright (C) 2003 - 2006 NetXen, Inc.
  3. * All rights reserved.
  4. *
  5. * This program is free software; you can redistribute it and/or
  6. * modify it under the terms of the GNU General Public License
  7. * as published by the Free Software Foundation; either version 2
  8. * of the License, or (at your option) any later version.
  9. *
  10. * This program is distributed in the hope that it will be useful, but
  11. * WITHOUT ANY WARRANTY; without even the implied warranty of
  12. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. * GNU General Public License for more details.
  14. *
  15. * You should have received a copy of the GNU General Public License
  16. * along with this program; if not, write to the Free Software
  17. * Foundation, Inc., 59 Temple Place - Suite 330, Boston,
  18. * MA 02111-1307, USA.
  19. *
  20. * The full GNU General Public License is included in this distribution
  21. * in the file called LICENSE.
  22. *
  23. * Contact Information:
  24. * info@netxen.com
  25. * NetXen,
  26. * 3965 Freedom Circle, Fourth floor,
  27. * Santa Clara, CA 95054
  28. */
  29. #ifndef __NIC_PHAN_REG_H_
  30. #define __NIC_PHAN_REG_H_
  31. /*
  32. * CRB Registers or queue message done only at initialization time.
  33. */
  34. /*
  35. * The following 2 are the base adresses for the CRB registers and their
  36. * offsets will be added to get addresses for the index addresses.
  37. */
  38. #define NIC_CRB_BASE_PORT1 NETXEN_CAM_RAM(0x200)
  39. #define NIC_CRB_BASE_PORT2 NETXEN_CAM_RAM(0x250)
  40. #define NETXEN_NIC_REG(X) (NIC_CRB_BASE_PORT1+(X))
  41. /*
  42. * CrbPortPhanCntrHi/Lo is used to pass the address of HostPhantomIndex address
  43. * which can be read by the Phantom host to get producer/consumer indexes from
  44. * Phantom/Casper. If it is not HOST_SHARED_MEMORY, then the following
  45. * registers will be used for the addresses of the ring's shared memory
  46. * on the Phantom.
  47. */
  48. #define CRB_PHAN_CNTRL_LO_OFFSET NETXEN_NIC_REG(0x00)
  49. #define CRB_PHAN_CNTRL_HI_OFFSET NETXEN_NIC_REG(0x04)
  50. /* point to the indexes */
  51. #define CRB_CMD_PRODUCER_OFFSET NETXEN_NIC_REG(0x08)
  52. #define CRB_CMD_CONSUMER_OFFSET NETXEN_NIC_REG(0x0c)
  53. #define CRB_PAUSE_ADDR_LO NETXEN_NIC_REG(0x10)
  54. #define CRB_PAUSE_ADDR_HI NETXEN_NIC_REG(0x14)
  55. /* address of command descriptors in the host memory */
  56. #define CRB_HOST_CMD_ADDR_HI NETXEN_NIC_REG(0x30)
  57. #define CRB_HOST_CMD_ADDR_LO NETXEN_NIC_REG(0x34)
  58. /* The following 4 CRB registers are for doing performance coal */
  59. #define CRB_CMD_INTR_LOOP NETXEN_NIC_REG(0x38)
  60. #define CRB_CMD_DMA_LOOP NETXEN_NIC_REG(0x3c)
  61. #define CRB_RCV_INTR_LOOP NETXEN_NIC_REG(0x40)
  62. #define CRB_RCV_DMA_LOOP NETXEN_NIC_REG(0x44)
  63. /* Needed by the host to find out the state of Phantom's initialization */
  64. #define CRB_ENABLE_TX_INTR NETXEN_NIC_REG(0x4c)
  65. #define CRB_CMDPEG_STATE NETXEN_NIC_REG(0x50)
  66. #define CRB_CMDPEG_CMDRING NETXEN_NIC_REG(0x54)
  67. /* Interrupt coalescing parameters */
  68. #define CRB_GLOBAL_INT_COAL NETXEN_NIC_REG(0x80)
  69. #define CRB_INT_COAL_MODE NETXEN_NIC_REG(0x84)
  70. #define CRB_MAX_RCV_BUFS NETXEN_NIC_REG(0x88)
  71. #define CRB_TX_INT_THRESHOLD NETXEN_NIC_REG(0x8c)
  72. #define CRB_RX_PKT_TIMER NETXEN_NIC_REG(0x90)
  73. #define CRB_TX_PKT_TIMER NETXEN_NIC_REG(0x94)
  74. #define CRB_RX_PKT_CNT NETXEN_NIC_REG(0x98)
  75. #define CRB_RX_TMR_CNT NETXEN_NIC_REG(0x9c)
  76. #define CRB_INT_THRESH NETXEN_NIC_REG(0xa4)
  77. /* Register for communicating XG link status */
  78. #define CRB_XG_STATE NETXEN_NIC_REG(0xa0)
  79. /* Register for communicating card temperature */
  80. /* Upper 16 bits are temperature value. Lower 16 bits are the state */
  81. #define CRB_TEMP_STATE NETXEN_NIC_REG(0xa8)
  82. #define nx_get_temp_val(x) ((x) >> 16)
  83. #define nx_get_temp_state(x) ((x) & 0xffff)
  84. #define nx_encode_temp(val, state) (((val) << 16) | (state))
  85. /* Debug registers for controlling NIC pkt gen agent */
  86. #define CRB_AGENT_GO NETXEN_NIC_REG(0xb0)
  87. #define CRB_AGENT_TX_SIZE NETXEN_NIC_REG(0xb4)
  88. #define CRB_AGENT_TX_TYPE NETXEN_NIC_REG(0xb8)
  89. #define CRB_AGENT_TX_ADDR NETXEN_NIC_REG(0xbc)
  90. #define CRB_AGENT_TX_MSS NETXEN_NIC_REG(0xc0)
  91. /* Debug registers for observing NIC performance */
  92. #define CRB_TX_STATE NETXEN_NIC_REG(0xd0)
  93. #define CRB_TX_COUNT NETXEN_NIC_REG(0xd4)
  94. #define CRB_RX_STATE NETXEN_NIC_REG(0xd8)
  95. /* CRB registers per Rcv Descriptor ring */
  96. struct netxen_rcv_desc_crb {
  97. u32 crb_rcv_producer_offset __attribute__ ((aligned(512)));
  98. u32 crb_rcv_consumer_offset;
  99. u32 crb_globalrcv_ring;
  100. };
  101. /*
  102. * CRB registers used by the receive peg logic. One instance of these
  103. * needs to be instantiated per instance of the receive peg.
  104. */
  105. struct netxen_recv_crb {
  106. struct netxen_rcv_desc_crb rcv_desc_crb[NUM_RCV_DESC_RINGS];
  107. u32 crb_rcvstatus_ring;
  108. u32 crb_rcv_status_producer;
  109. u32 crb_rcv_status_consumer;
  110. u32 crb_rcvpeg_state;
  111. };
  112. #if defined(DEFINE_GLOBAL_RECV_CRB)
  113. struct netxen_recv_crb recv_crb_registers[] = {
  114. /*
  115. * Instance 0.
  116. */
  117. {
  118. /* rcv_desc_crb: */
  119. {
  120. {
  121. /* crb_rcv_producer_offset: */
  122. NETXEN_NIC_REG(0x18),
  123. /* crb_rcv_consumer_offset: */
  124. NETXEN_NIC_REG(0x1c),
  125. /* crb_gloablrcv_ring: */
  126. NETXEN_NIC_REG(0x20),
  127. },
  128. /* Jumbo frames */
  129. {
  130. /* crb_rcv_producer_offset: */
  131. NETXEN_NIC_REG(0x100),
  132. /* crb_rcv_consumer_offset: */
  133. NETXEN_NIC_REG(0x104),
  134. /* crb_gloablrcv_ring: */
  135. NETXEN_NIC_REG(0x108),
  136. }
  137. },
  138. /* crb_rcvstatus_ring: */
  139. NETXEN_NIC_REG(0x24),
  140. /* crb_rcv_status_producer: */
  141. NETXEN_NIC_REG(0x28),
  142. /* crb_rcv_status_consumer: */
  143. NETXEN_NIC_REG(0x2c),
  144. /* crb_rcvpeg_state: */
  145. NETXEN_NIC_REG(0x48),
  146. },
  147. /*
  148. * Instance 1,
  149. */
  150. {
  151. /* rcv_desc_crb: */
  152. {
  153. {
  154. /* crb_rcv_producer_offset: */
  155. NETXEN_NIC_REG(0x80),
  156. /* crb_rcv_consumer_offset: */
  157. NETXEN_NIC_REG(0x84),
  158. /* crb_globalrcv_ring: */
  159. NETXEN_NIC_REG(0x88),
  160. },
  161. /* Jumbo frames */
  162. {
  163. /* crb_rcv_producer_offset: */
  164. NETXEN_NIC_REG(0x10C),
  165. /* crb_rcv_consumer_offset: */
  166. NETXEN_NIC_REG(0x110),
  167. /* crb_globalrcv_ring: */
  168. NETXEN_NIC_REG(0x114),
  169. }
  170. },
  171. /* crb_rcvstatus_ring: */
  172. NETXEN_NIC_REG(0x8c),
  173. /* crb_rcv_status_producer: */
  174. NETXEN_NIC_REG(0x90),
  175. /* crb_rcv_status_consumer: */
  176. NETXEN_NIC_REG(0x94),
  177. /* crb_rcvpeg_state: */
  178. NETXEN_NIC_REG(0x98),
  179. },
  180. };
  181. #else
  182. extern struct netxen_recv_crb recv_crb_registers[];
  183. #endif /* DEFINE_GLOBAL_RECEIVE_CRB */
  184. /*
  185. * Temperature control.
  186. */
  187. enum {
  188. NX_TEMP_NORMAL = 0x1, /* Normal operating range */
  189. NX_TEMP_WARN, /* Sound alert, temperature getting high */
  190. NX_TEMP_PANIC /* Fatal error, hardware has shut down. */
  191. };
  192. #endif /* __NIC_PHAN_REG_H_ */